June 2010 - U-Boot

[U-Boot] IRQ in realmode and sleep()
by Reinhard Arlt 01 Jul '10

01 Jul '10

Hello, the data cache is disabled on the CPCI750 board for the SDRAM by the DBAT entry for the SDRAM, but the data cache is enabled for most 74xx_7xx boards in cpu/74xx_7xx/start.S together with the translation. The decrementer irq is executed in real mode with translation disabled. Now in the irq routine, the processor writes the data into the cache, and the sleep() reads directly from RAM, and do not see the timer running. A good solution would be to have translation on for the irq's too, but a simple solution is to put an '#if !(defined CPCI750)' around the routine, that enables the l1 data cache. I am not shure, if the problem with the sleep() (and the missing timeouts in the networks stack) hits other boards too. Reinhard

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[U-Boot] Pull request: u-boot-usb
by Remy Bohmer 30 Jun '10

30 Jun '10

The following changes since commit 39ddd10b046fb791f47281ffb2100be01909ad72: Wolfgang Denk (1): Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master are available in the git repository at: git://git.denx.de/u-boot-usb.git master Ajay Kumar Gupta (4): musb: Use name based initialization for musb_config musb: Add Phy programming for using external Vbus omap3evm: Add board revision function musb: Program extvbus for OMAP3EVM Rev >= E Becky Bruce (1): drivers/usb/host/ohci-hcd: rename readl/writel to ohci_readl/ohci_writel Sergey Matyukevich (1): USB OHCI support for at91sam9g45 SoC arch/arm/include/asm/arch-at91/at91_pmc.h | 14 ++- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 13 ++ board/ti/evm/evm.c | 43 +++++++ board/ti/evm/evm.h | 14 ++ drivers/usb/host/ohci-at91.c | 14 ++ drivers/usb/host/ohci-hcd.c | 150 +++++++++++------------ drivers/usb/host/ohci.h | 15 ++- drivers/usb/musb/da8xx.c | 6 +- drivers/usb/musb/davinci.c | 6 +- drivers/usb/musb/musb_core.c | 7 + drivers/usb/musb/musb_core.h | 30 +++++- drivers/usb/musb/omap3.c | 9 +- drivers/usb/musb/omap3.h | 4 + 13 files changed, 233 insertions(+), 92 deletions(-)

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[U-Boot] AT91: Apply for the owner of AT91 custodian tree
by Xu, Hong 30 Jun '10

30 Jun '10

Dear Wolfgang, We noticed that the AT91 custodian tree has been left orphaned for a period of time. We're going to take care of AT91 custodian tree and continue bug fixing, patch review, and new board support. Thanks. BR, hong

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[U-Boot] [PATCH v2 RESEND] OMAP: mmc: add support for second and third mmc channels
by Steve Sakoman 30 Jun '10

30 Jun '10

This patch adds support for the second and third mmc channels on OMAP3 processors Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV in the board config Tested on Overo Signed-off-by: Steve Sakoman <steve(a)sakoman.com> Tested-by: Philip Balister <philip(a)opensdr.com> --- arch/arm/include/asm/arch-omap3/mmc_host_def.h | 15 +++++++-- drivers/mmc/omap3_mmc.c | 39 ++++++++++++++++++++++- 2 files changed, 49 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h index aa751c9..43dd705 100644 --- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h @@ -29,13 +29,20 @@ #define T2_BASE 0x48002000 typedef struct t2 { - unsigned char res1[0x274]; + unsigned char res1[0x274]; /* 0x000 */ unsigned int devconf0; /* 0x274 */ - unsigned char res2[0x2A8]; + unsigned char res2[0x060]; /* 0x278 */ + unsigned int devconf1; /* 0x2D8 */ + unsigned char res3[0x244]; /* 0x2DC */ unsigned int pbias_lite; /* 0x520 */ } t2_t; #define MMCSDIO1ADPCLKISEL (1 << 24) +#define MMCSDIO2ADPCLKISEL (1 << 6) + +#define EN_MMC1 (1 << 24) +#define EN_MMC2 (1 << 25) +#define EN_MMC3 (1 << 30) #define PBIASLITEPWRDNZ0 (1 << 1) #define PBIASSPEEDCTRL0 (1 << 2) @@ -44,7 +51,9 @@ typedef struct t2 { /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC_BASE 0x4809C000 +#define OMAP_HSMMC1_BASE 0x4809C000 +#define OMAP_HSMMC2_BASE 0x480B4000 +#define OMAP_HSMMC3_BASE 0x480AD000 typedef struct hsmmc { unsigned char res1[0x10]; diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index 96c0e65..bf650ba 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -52,7 +52,27 @@ const unsigned short mmc_transspeed_val[15][4] = { mmc_card_data cur_card_data; static block_dev_desc_t mmc_blk_dev; -static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE; +static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; + +unsigned char mmc_set_dev(int dev) +{ + switch (dev) { + case 1: + mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; + break; + case 2: + mmc_base = (hsmmc_t *)OMAP_HSMMC2_BASE; + break; + case 3: + mmc_base = (hsmmc_t *)OMAP_HSMMC3_BASE; + break; + default: + mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE; + return 1; + } + + return 0; +} block_dev_desc_t *mmc_get_dev(int dev) { @@ -62,6 +82,7 @@ block_dev_desc_t *mmc_get_dev(int dev) unsigned char mmc_board_init(void) { t2_t *t2_base = (t2_t *)T2_BASE; + struct prcm *prcm_base = (struct prcm *)PRCM_BASE; #if defined(CONFIG_TWL4030_POWER) twl4030_power_mmc_init(); @@ -74,6 +95,17 @@ unsigned char mmc_board_init(void) writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, &t2_base->devconf0); + writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, + &t2_base->devconf1); + + writel(readl(&prcm_base->fclken1_core) | + EN_MMC1 | EN_MMC2 | EN_MMC3, + &prcm_base->fclken1_core); + + writel(readl(&prcm_base->iclken1_core) | + EN_MMC1 | EN_MMC2 | EN_MMC3, + &prcm_base->iclken1_core); + return 1; } @@ -512,8 +544,11 @@ unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt, return 1; } -int mmc_legacy_init(int verbose) +int mmc_legacy_init(int dev) { + if (mmc_set_dev(dev) != 0) + return 1; + if (configure_mmc(&cur_card_data) != 1) return 1; -- 1.7.0.4

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[U-Boot] Mettre à niveau votre compte immédiatement
by WEBMAIL MASTER ONLINE 30 Jun '10

30 Jun '10

Ceci est pour vous informer que vous avez dépassé votre quota de courriel limite de 425 Mo et vous avez besoin pour augmenter votre limite de quota de courriel parce que dans moins de 48 heures de votre e-mail sera désactiver. Augmentation votre limite de quota de courriel et de continuer à utiliser votre compte webmail. Pour augmenter votre limite de quota de courriel à 2,5 Go, cliquez sur le lien ci-dessous: http://www.emailmeform.com/builder/form/756283 Nous vous remercions de votre compréhension. Copyright © 2010 Centre Webmail Helpdest Support

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[U-Boot] [PATCH] 85xx/p1_p2_rdb: enable hwconfig
by Poonam Aggrwal 30 Jun '10

30 Jun '10

Signed-off-by: Vivek Mahajan <vivek.mahajan(a)freescale.com> --- include/configs/P1_P2_RDB.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 612c669..de8e60b 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -99,6 +99,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_MP #endif +#define CONFIG_HWCONFIG + /* * These can be toggled for performance analysis, otherwise use default. */ -- 1.5.6.5

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[U-Boot] [PATCH] ppc/85xx: Add a structure defn for PIXIS registers
by Kumar Gala 30 Jun '10

30 Jun '10

The various boards that have PIXIS FPGAs have slightly different register definitions, however there is some common functionality (like reset, ICS307 clk control, etc) that can be shared. The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS, MPC8610HPCD, and MPC8641HPCN boards. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- board/freescale/common/pixis.h | 182 ++++++++++++++++++++++++++++++++++++++++ 1 files changed, 182 insertions(+), 0 deletions(-) create mode 100644 board/freescale/common/pixis.h diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h new file mode 100644 index 0000000..bc57d42 --- /dev/null +++ b/board/freescale/common/pixis.h @@ -0,0 +1,182 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __PIXIS_H_ +#define __PIXIS_H_ 1 + +/* PIXIS register set. */ +#if defined(CONFIG_MPC8536DS) +typedef struct pixis { + u8 id; + u8 ver; + u8 pver; + u8 csr; + u8 rst; + u8 rst2; + u8 aux1; + u8 spd; + u8 aux2; + u8 csr2; + u8 watch; + u8 led; + u8 pwr; + u8 res[3]; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 vcfgen1; + u8 vcore0; + u8 res1; + u8 vboot; + u8 vspeed[3]; + u8 sclk[3]; + u8 dclk[3]; + u8 i2cdacr; + u8 vcoreacc[4]; + u8 vcorecnt[3]; + u8 vcoremax[2]; + u8 vplatacc[4]; + u8 vplatcnt[3]; + u8 vplatmax[2]; + u8 vtempacc[4]; + u8 vtempcnt[3]; + u8 vtempmax[2]; + u8 res2[4]; +} pixis_t __attribute__ ((aligned(1))); + +#elif defined(CONFIG_MPC8544DS) +typedef struct pixis { + u8 id; + u8 ver; + u8 pver; + u8 csr; + u8 rst; + u8 pwr; + u8 aux1; + u8 spd; + u8 res[8]; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 vcfgen1; + u8 vcore0; + u8 res1; + u8 vboot; + u8 vspeed[2]; + u8 vclkh; + u8 vclkl; + u8 watch; + u8 led; + u8 vspeed2; + u8 res2[34]; +} pixis_t __attribute__ ((aligned(1))); + +#elif defined(CONFIG_MPC8572DS) +typedef struct pixis { + u8 id; + u8 ver; + u8 pver; + u8 csr; + u8 rst; + u8 pwr1; + u8 aux1; + u8 spd; + u8 aux2; + u8 res[7]; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 vcfgen1; + u8 vcore0; + u8 res1; + u8 vboot; + u8 vspeed[3]; + u8 res2[2]; + u8 sclk[3]; + u8 dclk[3]; + u8 res3[2]; + u8 watch; + u8 led; + u8 res4[25]; +} pixis_t __attribute__ ((aligned(1))); + +#elif defined(CONFIG_MPC8610HPCD) +typedef struct pixis { + u8 id; + u8 ver; /* also called arch */ + u8 pver; + u8 csr; + u8 rst; + u8 pwr; + u8 aux; + u8 spd; + u8 brdcfg0; + u8 brdcfg1; + u8 res[4]; + u8 led; + u8 serno; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 vcfgen1; + u8 vcore0; + u8 res1; + u8 vboot; + u8 vspeed[2]; + u8 res2; + u8 sclk[3]; + u8 res3; + u8 watch; + u8 res4[33]; +} pixis_t __attribute__ ((aligned(1))); + +#elif defined(CONFIG_MPC8641HPCN) +typedef struct pixis { + u8 id; + u8 ver; + u8 pver; + u8 csr; + u8 rst; + u8 pwr; + u8 aux; + u8 spd; + u8 res[8]; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 vcfgen1; + u8 vcore0; + u8 res1; + u8 vboot; + u8 vspeed[2]; + u8 vclkh; + u8 vclkl; + u8 watch; + u8 res3[36]; +} pixis_t __attribute__ ((aligned(1))); +#else +#error Need to define pixis_t for this board +#endif + +/* Pointer to the PIXIS register set */ +#define pixis ((pixis_t *)PIXIS_BASE) + +#endif /* __PIXIS_H_ */ -- 1.6.0.6

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[U-Boot] [PATCH] ppc/8xxx: Add is_core_disabled to remove disabled cores from dtb
by Kumar Gala 30 Jun '10

30 Jun '10

If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/mp.c | 25 +++++++++++++++++++++++++ arch/powerpc/cpu/mpc86xx/mp.c | 19 +++++++++++++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 3 ++- arch/powerpc/include/asm/mp.h | 3 ++- 4 files changed, 48 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 826bf32..0d39f3b 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -77,6 +77,13 @@ int cpu_disable(int nr) return 0; } + +int is_core_disabled(int nr) { + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 coredisrl = in_be32(&gur->coredisrl); + + return (coredisrl & (1 << nr)); +} #else int cpu_disable(int nr) { @@ -96,6 +103,24 @@ int cpu_disable(int nr) return 0; } + +int is_core_disabled(int nr) { + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 devdisr = in_be32(&gur->devdisr); + + switch (nr) { + case 0: + return (devdisr & MPC85xx_DEVDISR_CPU0); + break; + case 1: + return (devdisr & MPC85xx_DEVDISR_CPU1); + break; + default: + printf("Invalid cpu number for disable %d\n", nr); + } + + return 0; +} #endif static u8 boot_entry_map[4] = { diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c index b4a0faa..97e4692 100644 --- a/arch/powerpc/cpu/mpc86xx/mp.c +++ b/arch/powerpc/cpu/mpc86xx/mp.c @@ -66,6 +66,25 @@ int cpu_disable(int nr) return 0; } +int is_core_disabled(int nr) { + volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; + volatile ccsr_gur_t *gur = &immap->im_gur; + u32 devdisr = in_be32(&gur->devdisr); + + switch (nr) { + case 0: + return (devdisr & MPC86xx_DEVDISR_CPU0); + break; + case 1: + return (devdisr & MPC86xx_DEVDISR_CPU1); + break; + default: + printf("Invalid cpu number for disable %d\n", nr); + } + + return 0; +} + int cpu_release(int nr, int argc, char *argv[]) { /* dummy function so common/cmd_mp.c will build diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index c9956b6..02bdb70 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -26,6 +26,7 @@ #include <common.h> #include <libfdt.h> #include <fdt_support.h> +#include <asm/mp.h> #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) static int ft_del_cpuhandle(void *blob, int cpuhandle) @@ -57,7 +58,7 @@ void ft_fixup_num_cores(void *blob) { while (off != -FDT_ERR_NOTFOUND) { u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); - if (*reg > num_cores-1) { + if ((*reg > num_cores-1) || (is_core_disabled(*reg))) { int ph = fdt_get_phandle(blob, off); /* Delete the cpu node once there are no cpu handles */ diff --git a/arch/powerpc/include/asm/mp.h b/arch/powerpc/include/asm/mp.h index 5388c95..3ffa30b 100644 --- a/arch/powerpc/include/asm/mp.h +++ b/arch/powerpc/include/asm/mp.h @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2009-2010 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -26,5 +26,6 @@ void setup_mp(void); void cpu_mp_lmb_reserve(struct lmb *lmb); u32 determine_mp_bootpg(void); +int is_core_disabled(int nr); #endif -- 1.6.0.6

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[U-Boot] [PATCH] mpc8xxx: Remove cpu-handles for cpus we delete
by Kumar Gala 30 Jun '10

30 Jun '10

We may have cpu-handles pointing to the cpu nodes we delete. If so we should delete the handles as well. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc8xxx/fdt.c | 36 ++++++++++++++++++++++++++++++------ 1 files changed, 30 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 738394f..c9956b6 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -28,6 +28,25 @@ #include <fdt_support.h> #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) +static int ft_del_cpuhandle(void *blob, int cpuhandle) +{ + int off, ret = -FDT_ERR_NOTFOUND; + + /* if we find a match, we'll delete at it which point the offsets are + * invalid so we start over from the beginning + */ + off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle", + &cpuhandle, 4); + while (off != -FDT_ERR_NOTFOUND) { + fdt_delprop(blob, off, "cpu-handle"); + ret = 1; + off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle", + &cpuhandle, 4); + } + + return ret; +} + void ft_fixup_num_cores(void *blob) { int off, num_cores, del_cores; @@ -38,13 +57,18 @@ void ft_fixup_num_cores(void *blob) { while (off != -FDT_ERR_NOTFOUND) { u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); - /* if we find a cpu node outside of what we expect delete it - * and reset the offset back to the start since we can't - * trust the offsets anymore - */ if (*reg > num_cores-1) { - fdt_del_node(blob, off); - del_cores++; + int ph = fdt_get_phandle(blob, off); + + /* Delete the cpu node once there are no cpu handles */ + if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) { + fdt_del_node(blob, off); + del_cores++; + } + /* either we deleted some cpu handles or the cpu node + * so we reset the offset back to the start since we + * can't trust the offsets anymore + */ off = -1; } off = fdt_node_offset_by_prop_value(blob, off, -- 1.6.0.6

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[U-Boot] [PATCH] powerpc/8xxx: Distinguish between incompatible SEC h/w types
by Kumar Gala 30 Jun '10

30 Jun '10

From: Kim Phillips <kim.phillips(a)freescale.com> CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc8xxx/fdt.c | 6 +++--- arch/powerpc/include/asm/config.h | 7 +++++++ include/fdt_support.h | 2 +- 3 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 79d3cdf..d0e06e2 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -97,11 +97,11 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) } #endif /* CONFIG_HAS_FSL_DR_USB */ -#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) /* * update crypto node properties to a specified revision of the SEC - * called with sec_rev == 0 if not on an mpc8xxxE processor + * called with sec_rev == 0 if not on an E processor */ +#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */ void fdt_fixup_crypto_node(void *blob, int sec_rev) { const struct sec_rev_prop { @@ -183,4 +183,4 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); } -#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */ +#endif diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index fc3facb..1c61784 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -66,6 +66,13 @@ #define CONFIG_TSECV2 #endif +/* + * SEC (crypto unit) major compatible version determination + */ +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx) +#define CONFIG_SYS_FSL_SEC_COMPAT 2 +#endif + /* Number of TLB CAM entries we have on FSL Book-E chips */ #if defined(CONFIG_E500MC) #define CONFIG_SYS_NUM_TLBCAMS 64 diff --git a/include/fdt_support.h b/include/fdt_support.h index 9a453af..fc16159 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -59,7 +59,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd); static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} #endif /* CONFIG_HAS_FSL_DR_USB */ -#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx) +#if defined(CONFIG_SYS_FSL_SEC_COMPAT) void fdt_fixup_crypto_node(void *blob, int sec_rev); #else static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} -- 1.6.0.6

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