February 2010 - U-Boot

[U-Boot] mcf5307
by angelo 24 Feb '10

24 Feb '10

Hello all, is ColdFire mcf5307 supported ? in 1.1.6 i found mcf52x2 cpu only. Regards, Angelo -- AD

1 0

[U-Boot] Please pull u-boot-ti/master
by s-paulraj＠ti.com 24 Feb '10

24 Feb '10

Tom, Please accept this pull request for this rather important looking fix Regards, Sandeep The following changes since commit 2a6e25632fd71eae9cb9d9e098d72e90dfec8af1: Ladislav Michl (1): VoiceBlue: fix linker errors are available in the git repository at: git://git.denx.de/u-boot-ti.git master Siarhei Siamashka (1): OMAP3: workaround for ARM Cortex-A8 erratum 725233 cpu/arm_cortexa8/omap3/board.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)

1 0

[U-Boot] [PATCH 2/2] ep93xx: Refactoring of timer code
by Matthias Kaehlcke 24 Feb '10

24 Feb '10

ep93xx: Refactoring of the timer code, including the following changes * use a free running timer instead of a periodical one * use unsigned long long for total number of ticks * hold the timer state in a structure instead of separate variables * increment the timer counter instead of decrementing it * remove unused function udelay_masked() * remove unused function set_timer() Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> --- cpu/arm920t/ep93xx/timer.c | 71 ++++++++++++++++--------------------------- 1 files changed, 27 insertions(+), 44 deletions(-) diff --git a/cpu/arm920t/ep93xx/timer.c b/cpu/arm920t/ep93xx/timer.c index 98c759c..84bdb12 100644 --- a/cpu/arm920t/ep93xx/timer.c +++ b/cpu/arm920t/ep93xx/timer.c @@ -34,16 +34,19 @@ #include <div64.h> #define TIMER_CLKSEL (1 << 3) -#define TIMER_MODE (1 << 6) #define TIMER_ENABLE (1 << 7) -#define TIMER_FREQ 508469 -#define TIMER_LOAD_VAL (TIMER_FREQ / CONFIG_SYS_HZ) +#define TIMER_FREQ 508469 +#define CLK_TICKS_PER_SYS_TICK (TIMER_FREQ / CONFIG_SYS_HZ) +#define TIMER_MAX_VAL 0xFFFFFFFF -static ulong timestamp; -static ulong lastdec; +static struct ep93xx_timer +{ + unsigned long long ticks; + unsigned long last_update; +} timer; -static inline unsigned long clk_to_systicks(unsigned long clk_ticks) +static inline unsigned long clk_to_systicks(unsigned long long clk_ticks) { unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ); do_div(sys_ticks, TIMER_FREQ); @@ -57,10 +60,10 @@ static inline unsigned long usecs_to_ticks(unsigned long usecs) if (usecs >= 1000) { ticks = usecs / 1000; - ticks *= (TIMER_LOAD_VAL * CONFIG_SYS_HZ); + ticks *= (CLK_TICKS_PER_SYS_TICK * CONFIG_SYS_HZ); ticks /= 1000; } else { - ticks = usecs * TIMER_LOAD_VAL * CONFIG_SYS_HZ; + ticks = usecs * CLK_TICKS_PER_SYS_TICK * CONFIG_SYS_HZ; ticks /= (1000 * 1000); } @@ -71,7 +74,7 @@ static inline unsigned long read_timer(void) { struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; - return readl(&timer->timer3.value); + return TIMER_MAX_VAL - readl(&timer->timer3.value); } /* @@ -81,17 +84,15 @@ unsigned long long get_ticks(void) { const unsigned long now = read_timer(); - if (lastdec >= now) { - /* normal mode */ - timestamp += lastdec - now; - } else { - /* we have an overflow ... */ - timestamp += lastdec + TIMER_LOAD_VAL - now; - } + if (now >= timer.last_update) + timer.ticks += now - timer.last_update; + else + /* an overflow occurred */ + timer.ticks += TIMER_MAX_VAL - timer.last_update + now; - lastdec = now; + timer.last_update = now; - return timestamp; + return timer.ticks; } unsigned long get_timer_masked(void) @@ -106,8 +107,8 @@ unsigned long get_timer(unsigned long base) void reset_timer_masked(void) { - lastdec = read_timer(); - timestamp = 0; + timer.last_update = read_timer(); + timer.ticks = 0; } void reset_timer(void) @@ -115,28 +116,11 @@ void reset_timer(void) reset_timer_masked(); } -void set_timer(unsigned long t) -{ - timestamp = t; -} - void __udelay(unsigned long usec) { - const unsigned long ticks = usecs_to_ticks(usec); - const unsigned long target = clk_to_systicks(ticks) + get_timer(0); - - while (get_timer_masked() < target) - /* noop */; -} - -void udelay_masked(unsigned long usec) -{ - const unsigned long ticks = usecs_to_ticks(usec); - const unsigned long target = clk_to_systicks(ticks) + get_timer(0); - - reset_timer_masked(); + const unsigned long target = get_ticks() + usecs_to_ticks(usec); - while (get_timer_masked() < target) + while (get_ticks() < target) /* noop */; } @@ -147,12 +131,11 @@ int timer_init(void) /* use timer 3 with 508KHz and free running */ writel(TIMER_CLKSEL, &timer->timer3.control); - /* auto load, manual update of Timer 3 */ - lastdec = TIMER_LOAD_VAL; - writel(TIMER_LOAD_VAL, &timer->timer3.load); + /* set initial timer value 3 */ + writel(TIMER_MAX_VAL, &timer->timer3.load); - /* Enable the timer and periodic mode */ - writel(TIMER_ENABLE | TIMER_MODE | TIMER_CLKSEL, + /* Enable the timer */ + writel(TIMER_ENABLE | TIMER_CLKSEL, &timer->timer3.control); reset_timer_masked(); -- 1.6.5

3 3

[U-Boot] [PATCH] edb93xx: Fix SDRAM initialization
by Matthias Kaehlcke 24 Feb '10

24 Feb '10

edb93xx: Fix SDRAM initialization by issuing a precharge all command before forcing the precharge and select mode register update mode before programming the mode registers. Write to the SDRAM banks in order to force a precharge, reading causes the edb93xx boards to hang Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> --- board/edb93xx/sdram_cfg.c | 40 ++++++++++++++++++++++++++++++++-------- 1 files changed, 32 insertions(+), 8 deletions(-) diff --git a/board/edb93xx/sdram_cfg.c b/board/edb93xx/sdram_cfg.c index 6155f0e..5070744 100644 --- a/board/edb93xx/sdram_cfg.c +++ b/board/edb93xx/sdram_cfg.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2009 Matthias Kaehlcke <matthias(a)kaehlcke.net> + * Copyright (C) 2010, 2009 + * Matthias Kaehlcke <matthias(a)kaehlcke.net> * * Copyright (C) 2006 Dominic Rath <Dominic.Rath(a)gmx.de> * @@ -30,9 +31,9 @@ (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank | SDRAM_MODE_REG_VAL)) #define PRECHARGE_BANK(bank) (*(volatile uint32_t *) \ - (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) + (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) = 0 -static void force_precharge(void); +static void precharge_all_banks(void); static void setup_refresh_timer(void); static void program_mode_registers(void); @@ -47,7 +48,7 @@ void sdram_cfg(void) early_udelay(200); - force_precharge(); + precharge_all_banks(); setup_refresh_timer(); @@ -57,19 +58,37 @@ void sdram_cfg(void) writel(GLCONFIG_CKE, &sdram->glconfig); } -static void force_precharge(void) +static void precharge_all_banks(void) { + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; + + /* Issue PRECHARGE ALL commands */ + writel(GLCONFIG_INIT | GLCONFIG_CKE, &sdram->glconfig); + /* - * Errata most EP93xx revisions say that PRECHARGE ALL isn't always - * issued. + * Errata of most EP93xx revisions say that PRECHARGE ALL isn't always + * issued * - * Do a read from each bank to make sure they're precharged + * Cirrus proposes a workaround which consists in performing a read from + * each bank to force the precharge. This causes some boards to hang. + * Writing to the SDRAM banks instead of reading has the same + * side-effect (the SDRAM controller issues the necessary precharges), + * but is known to work on all supported boards */ PRECHARGE_BANK(0); + +#if (CONFIG_NR_DRAM_BANKS >= 2) PRECHARGE_BANK(1); +#endif + +#if (CONFIG_NR_DRAM_BANKS >= 3) PRECHARGE_BANK(2); +#endif + +#if (CONFIG_NR_DRAM_BANKS == 4) PRECHARGE_BANK(3); +#endif } static void setup_refresh_timer(void) @@ -101,6 +120,11 @@ static void setup_refresh_timer(void) static void program_mode_registers(void) { + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; + + /* Select mode register update mode */ + writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig); + /* * The mode registers are programmed by performing a read from each * SDRAM bank. The value of the address that is read defines the value -- 1.6.5

2 1

[U-Boot] [PATCH 1/2] ep93xx: Fix calculation of sys ticks in clk_to_systicks()
by Matthias Kaehlcke 24 Feb '10

24 Feb '10

ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks() for proper handling of large intermediate values Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> --- cpu/arm920t/ep93xx/timer.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/cpu/arm920t/ep93xx/timer.c b/cpu/arm920t/ep93xx/timer.c index 6d969d9..98c759c 100644 --- a/cpu/arm920t/ep93xx/timer.c +++ b/cpu/arm920t/ep93xx/timer.c @@ -31,6 +31,7 @@ #include <linux/types.h> #include <asm/arch/ep93xx.h> #include <asm/io.h> +#include <div64.h> #define TIMER_CLKSEL (1 << 3) #define TIMER_MODE (1 << 6) @@ -44,9 +45,10 @@ static ulong lastdec; static inline unsigned long clk_to_systicks(unsigned long clk_ticks) { - unsigned long sys_ticks = (clk_ticks * CONFIG_SYS_HZ) / TIMER_FREQ; + unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ); + do_div(sys_ticks, TIMER_FREQ); - return sys_ticks; + return (unsigned long)sys_ticks; } static inline unsigned long usecs_to_ticks(unsigned long usecs) -- 1.6.5

1 0

[U-Boot] [PATCH 2/2] cmd_itest.c: fix pointer dereferencing
by Frans Meulenbroeks 24 Feb '10

24 Feb '10

fix pointer dereferencing if the size is .b and .w an 8 or 16 bit access is done. Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks(a)gmail.com> --- common/cmd_itest.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/common/cmd_itest.c b/common/cmd_itest.c index 5b301bf..58c5e7b 100644 --- a/common/cmd_itest.c +++ b/common/cmd_itest.c @@ -66,12 +66,17 @@ op_tbl_t op_table [] = { static long evalexp(char *s, int w) { - long l, *p; + long l = 0; + long *p; /* if the parameter starts with a * then assume is a pointer to the value we want */ if (s[0] == '*') { p = (long *)simple_strtoul(&s[1], NULL, 16); - l = *p; + switch (w) { + case 1: return((long)(*(unsigned char *)p)); + case 2: return((long)(*(unsigned short *)p)); + case 4: return(*p); + } } else { l = simple_strtoul(s, NULL, 16); } -- 1.6.4.2

3 2

[U-Boot] [PATCH] tools: fix imximage warning: passing argument 2 of ‘getline’ from incompatible pointer type
by Kim Phillips 24 Feb '10

24 Feb '10

Configuring for MPC837XEMDS board... imximage.c: In function ‘imximage_parse_cfg_file’: imximage.c:146: warning: passing argument 2 of ‘getline’ from incompatible pointer type /usr/include/bits/stdio.h:116: note: expected ‘size_t *’ but argument is of type ‘uint32_t *’ Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- tools/imximage.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 43da678..df2d8c4 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -129,7 +129,7 @@ static uint32_t imximage_parse_cfg_file(struct imx_header *imxhdr, char *name) char *token, *saveptr1, *saveptr2; int lineno = 0; int fld, value; - uint32_t len; + size_t len; int dcd_len = 0; dcd_t *dcd = &imxhdr->dcd_table; int32_t cmd; -- 1.7.0

2 1

[U-Boot] [PATCH] mkimage: SEGFAULT with imximage on 64 bit systems
by Stefano Babic 24 Feb '10

24 Feb '10

Running mkimage to generate an imximage produces a SEGFAULT on 64 bit machines due to pointer arithmetic limited to 32 bit. Signed-off-by: Stefano Babic <sbabic(a)denx.de> --- tools/imximage.c | 10 +++++----- tools/imximage.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 59923ff..76cd903 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -111,7 +111,7 @@ static void imximage_print_header(const void *ptr) exit(EXIT_FAILURE); } - ext_header = (flash_cfg_parms_t *) ((uint32_t)&imx_hdr->dcd_table + + ext_header = (flash_cfg_parms_t *) ((uint64_t)&imx_hdr->dcd_table + sizeof(dcd_preamble_t) + size); printf("Image Type: Freescale IMX Boot Image\n"); @@ -264,15 +264,15 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, fhdr->app_code_jump_vector = params->ep; base_offset = fhdr->app_dest_ptr + hdr->flash_offset ; - fhdr->dcd_ptr_ptr = (uint32_t) ((uint32_t)&fhdr->dcd_ptr - - (uint32_t)&fhdr->app_code_jump_vector) + base_offset ; + fhdr->dcd_ptr_ptr = (uint32_t) ((uint64_t)&fhdr->dcd_ptr - + (uint64_t)&fhdr->app_code_jump_vector) + base_offset ; fhdr->dcd_ptr = base_offset + ((uint32_t)&hdr->dcd_table - (uint32_t)&hdr->fhdr); /* The external flash header must be at the end of the DCD table */ - ext_header = (flash_cfg_parms_t *) ((uint32_t)&hdr->dcd_table + + ext_header = (flash_cfg_parms_t *) ((uint64_t)&hdr->dcd_table + dcd_len + sizeof(dcd_preamble_t)); ext_header->length = sbuf->st_size + @@ -281,7 +281,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, /* Security feature are not supported */ fhdr->app_code_csf = 0; - fhdr->super_root_key = NULL; + fhdr->super_root_key = 0; } diff --git a/tools/imximage.h b/tools/imximage.h index c579f51..b4d926d 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -81,7 +81,7 @@ typedef struct { uint32_t app_code_barker; uint32_t app_code_csf; uint32_t dcd_ptr_ptr; - hab_rsa_public_key *super_root_key; + uint32_t super_root_key; uint32_t dcd_ptr; uint32_t app_dest_ptr; } flash_header_t; -- 1.6.3.3

4 5

[U-Boot] [PATCH v2] cmd_mtdparts.c: prevent printbuffer overflows
by Anatolij Gustschin 23 Feb '10

23 Feb '10

The length of configured MTDPARTS_DEFAULT string could be greater than console printbuffer size. Replace printf() by puts() to avoid potential buffer overflows. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- Changes since v1: - use puts() instead of printf() as suggested by Wolfgang. common/cmd_mtdparts.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c index b375fea..0fd5ce2 100644 --- a/common/cmd_mtdparts.c +++ b/common/cmd_mtdparts.c @@ -1254,8 +1254,9 @@ static void list_partitions(void) printf("\ndefaults:\n"); printf("mtdids : %s\n", mtdids_default ? mtdids_default : "none"); - printf("mtdparts: %s\n", - mtdparts_default ? mtdparts_default : "none"); + puts("mtdparts: "); + puts(mtdparts_default ? mtdparts_default : "none"); + puts("\n"); } /** -- 1.6.3.3

2 2

[U-Boot] [PATCH 1/2] ep93xx: Fix calculation of sys ticks in clk_to_systicks()
by Matthias Kaehlcke 23 Feb '10

23 Feb '10

ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks() for proper handling of large intermediate values Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> --- cpu/arm920t/ep93xx/timer.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/cpu/arm920t/ep93xx/timer.c b/cpu/arm920t/ep93xx/timer.c index 6d969d9..98c759c 100644 --- a/cpu/arm920t/ep93xx/timer.c +++ b/cpu/arm920t/ep93xx/timer.c @@ -31,6 +31,7 @@ #include <linux/types.h> #include <asm/arch/ep93xx.h> #include <asm/io.h> +#include <div64.h> #define TIMER_CLKSEL (1 << 3) #define TIMER_MODE (1 << 6) @@ -44,9 +45,10 @@ static ulong lastdec; static inline unsigned long clk_to_systicks(unsigned long clk_ticks) { - unsigned long sys_ticks = (clk_ticks * CONFIG_SYS_HZ) / TIMER_FREQ; + unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ); + do_div(sys_ticks, TIMER_FREQ); - return sys_ticks; + return (unsigned long)sys_ticks; } static inline unsigned long usecs_to_ticks(unsigned long usecs) -- 1.6.5

1 0

[U-Boot] Please pull u-boot-ti/master
by s-paulraj＠ti.com 23 Feb '10

23 Feb '10

The following changes since commit 77e7273c40315abd2f3c17ad8d46a78950e3e65f: Jens Scharsig (1): new board (eb_cpux9k2) are available in the git repository at: git://git.denx.de/u-boot-ti.git master Ladislav Michl (8): NetStar: eeprom - undefined reference to `memset' NetStar: eeprom - be less verbose NetStar: eeprom - fix linker error NetStar: fix default environment NetStar: make mtdparts default ready for recent kernels netstar.h: do not exceed 80 columns VoiceBlue: limit line lenght to 80 characters VoiceBlue: fix linker errors Nick Thompson (1): da830evm: Add support for TI EMAC Sandeep Paulraj (1): DaVinci: Adding entry to MAKEALL for DM365 EVM MAKEALL | 1 + board/davinci/da830evm/da830evm.c | 65 +++++++++++- board/netstar/Makefile | 54 +++++----- board/netstar/eeprom.c | 95 +++++++++-------- board/netstar/eeprom.lds | 51 --------- board/netstar/eeprom_start.S | 13 --- board/voiceblue/Makefile | 33 +++--- board/voiceblue/eeprom.c | 97 +++++++++-------- board/voiceblue/eeprom.lds | 51 --------- board/voiceblue/eeprom_start.S | 11 -- include/asm-arm/arch-davinci/emac_defs.h | 1 + include/configs/da830evm.h | 1 + include/configs/netstar.h | 114 ++++++++++----------- include/configs/voiceblue.h | 168 +++++++++++++++--------------- 14 files changed, 343 insertions(+), 412 deletions(-) delete mode 100644 board/netstar/eeprom.lds delete mode 100644 board/netstar/eeprom_start.S delete mode 100644 board/voiceblue/eeprom.lds delete mode 100644 board/voiceblue/eeprom_start.S

3 5

Re: [U-Boot] Problem executing hello world as specified on wiki
by Wolfgang Denk 23 Feb '10

23 Feb '10

Dear Vipul Jain, please do not top post / full quote. Please read http://www.netmeister.org/news/learn2quote.html Please always post plain text only, no HTML ever. And please keep the mailing list on Cc: In message <b178b0fc1002231227u4993cc42q90bf71dfd8ce0d68(a)mail.gmail.com> you wrote: > > when I captured the make output for u-boot which as part of buildiing > u=boot.bin also builds standalone examples, this is what I noticed. > > arm-linux-ld -g -Ttext 0xc100000 \ > -o hello_world -e hello_world hello_world.o libstubs.a \ OK, so you know your text address is 0xc100000. > In lib_arm/config.mk I could see code that says ... > ifeq ($(BOARD),omap2420h4) > STANDALONE_LOAD_ADDR = 0x80300000 > else > ifeq ($(SOC),omap3) > STANDALONE_LOAD_ADDR = 0x80300000 > else > STANDALONE_LOAD_ADDR = 0xc100000 > endif > endif Here you can see where the number above is actually coming from. > Do I need to add one more case here specifically for EDB9203 board. if yes, > can you please suggest Why would you want to do that? What makes you think 0xc100000 would not be a suitable address for your system? In previous postings you showed that you were able to TFTP your image to this address just fine. In those examples you downloaded the ELF image, but we explained you that this does not work with the "go" ommand, and that you have to use the binary image (.bin) instead - as documented. You also tried to start it right at the download address, but I also pointed you to the entry in the FAQ which explains that the actual entry point address might be elsewhere, and how you can find it. Did you read this documentation? Did you attempt to try following the many hints you received? If you got stuck on that way then please feel free to ask again (on the list), but please show that you at least attempted to do what you have been told. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Q: Do you know what the death rate around here is? A: One per person.

1 0

[U-Boot] [STATUS] Release on hold, wait for i.MX custodian
by Wolfgang Denk 23 Feb '10

23 Feb '10

Hi, this is to let you know that Freescale has informed me that they will appoint a custodian for the Freescale ARM processors Really Soon Now. I would like to give him a chance to introduce himself here and get some overview of the open i.MX patches that are supposed to go into this release, which I hope will be acchieved before the end of this week. Until then, I will continue to work on fixes and process pull requests, but otherwise hold the release so the i.MX stuff can go in before we have -rc1 out. Thanks for your patience. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "An open mind has but one disadvantage: it collects dirt." - a saying at RPI

1 0

[U-Boot] (no subject)
by Eloan Finance International Loans 23 Feb '10

23 Feb '10

ELOAN FINANCE INTERNATIONAL LOANS ELOAN FINANCE INTERNATIONAL is a consulting group for international debt and equity project finance in addition to commercial mortgage finance in the WORLDWIDE market. We are certified loan lender and offer secured loans to individuals and companies at 3% low interest. We are focused on attempting to fill the void that exists where there are limited options for suitable funding of major corporate and real estate projects, and especially where the request is large. WE OFFER THE FOLLWING KINDS OF LOANS * Student/Educational Loan * Personal Loan * Business Loan * Company Loan * Combination Loan. If you are interested in our offer please state briefly the following information to the management FIRST INFORMATION NEEDED ARE: Full Name:............................... Location:................................. Marital status:........................... Contact Phone numbers:.................... Amount Needed:............................. Contact E-mail:......................... Occupation:.............................. Loan Duration ........................ Annual Income ...................... THERE IS NOTHING TO LOSE BUT YOUR DEBT AND FINANCIAL PROBLEMS.Contact us with this Email: eloanfinancial2009(a)yahoo.com.hk Best Regards Rev. Larry Smith General Consultant Tel: +44-702-407-4939 Email: eloanfinancial2009(a)yahoo.com.hk Eloan Finance International Loans

1 0

[U-Boot] [PATCH] cmd_mtdparts.c: prevent printbuffer overflows
by Anatolij Gustschin 23 Feb '10

23 Feb '10

The length of configured MTDPARTS_DEFAULT string could be greather than console printbuffer size. Check the lenght of the string before printing to prevent U-Boot crashes. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- common/cmd_mtdparts.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c index 230e96e..d4cb194 100644 --- a/common/cmd_mtdparts.c +++ b/common/cmd_mtdparts.c @@ -1254,6 +1254,14 @@ static void list_partitions(void) printf("\ndefaults:\n"); printf("mtdids : %s\n", mtdids_default ? mtdids_default : "none"); + + /* Check to prevent printbuffer overflows */ + if (mtdparts_default && strlen(mtdparts_default) > CONFIG_SYS_PBSIZE) { + puts("Warning: mtdparts too long," + " please increase CONFIG_SYS_PBSIZE\n"); + return; + } + printf("mtdparts: %s\n", mtdparts_default ? mtdparts_default : "none"); } -- 1.6.3.3

3 4

[U-Boot] [PATCH 3/3 v4] SAMSUNG: SMDKC100: Adds ethernet support.
by ch.naveen＠samsung.com 23 Feb '10

23 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be loaded over tftp. The preinit function will configure GPIO (GPK0CON) & SROMC to look for environment in SROM Bank 3. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. The CONFIG_BOOTP* and Net config Macros are removed from config header. Comments from Ben Warren are fixed 2. The GPIO configuration is modified & Macro and Function are renamed. Comments from Minkyu Kang are fixedChanges since V2 Changes since V2: 1. GPIO configurations function has been implemented. Changes since V3: 1. Comments from Minkyu Kang are fixed. board/samsung/smdkc100/smdkc100.c | 39 +++++++++++++++++++++++++++++++++++++ include/configs/smdkc100.h | 12 ++++++++++- 2 files changed, 50 insertions(+), 1 deletions(-) diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 15a1a27..4fc802e 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -23,10 +23,40 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> +#include <asm/arch/gpio.h> + DECLARE_GLOBAL_DATA_PTR; +/* + * Miscellaneous platform dependent initialisations + */ +static void smc9115_pre_init(void) +{ + u32 tmp; + u32 smc_bw_conf, smc_bc_conf; + + struct s5pc100_gpio *const gpio = + (struct s5pc100_gpio *)S5PC100_GPIO_BASE; + + /* gpio configuration GPK0CON */ + gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + + /* Ethernet needs bus width of 16 bits */ + smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); + smc_bc_conf = SMC_BC_TACS(0x0) | SMC_BC_TCOS(0x4) | SMC_BC_TACC(0xe) + | SMC_BC_TCOH(0x1) | SMC_BC_TAH(0x4) + | SMC_BC_TACP(0x6) | SMC_BC_PMC(0x0); + + /* Select and configure the SROMC bank */ + s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf); +} + int board_init(void) { + smc9115_pre_init(); + gd->bd->bi_arch_number = MACH_TYPE_SMDKC100; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -49,3 +79,12 @@ int checkboard(void) return 0; } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index f12fea3..c8abad6 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -83,7 +83,6 @@ #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NET #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO @@ -235,4 +234,15 @@ #define CONFIG_DOS_PARTITION 1 +/* + * Ethernet Contoller driver + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ +#define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ +#endif /* CONFIG_CMD_NET */ + #endif /* __CONFIG_H */ -- 1.6.6

1 0

[U-Boot] [PATCH 2/3 v4] S5PC100: Function to configure the SROMC registers.
by ch.naveen＠samsung.com 23 Feb '10

23 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Nand Flash, Ethernet, other features might need to configure the SROMC registers accordingly. The config_sromc() functions helps with this. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc(). Comments from Minkyu Kang are fixed Changes since V2: 1.cpu_is_s5pc100() function is used instead of Macros. Changes since V3: 1. Comments from Minkyu Kang are fixed. cpu/arm_cortexa8/s5pc1xx/Makefile | 1 + cpu/arm_cortexa8/s5pc1xx/sromc.c | 53 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-s5pc1xx/smc.h | 3 ++ 3 files changed, 57 insertions(+), 0 deletions(-) create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/cpu/arm_cortexa8/s5pc1xx/Makefile index 7290c2f..01c93fe 100644 --- a/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile @@ -34,6 +34,7 @@ SOBJS += reset.o COBJS += clock.o COBJS += cpu_info.o COBJS += gpio.o +COBJS += sromc.o COBJS += timer.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c new file mode 100644 index 0000000..380be81 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Naveen Krishna Ch <ch.naveen(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> + +/* + * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the + * band width control and bank control registers + * srom_bank - SROM Bank 0 to 5 + * smc_bw_conf - SMC Band witdh reg configuration value + * smc_bc_conf - SMC Bank Control reg configuration value + */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf) +{ + u32 tmp; + struct s5pc1xx_smc *srom; + + if (cpu_is_s5pc100()) + srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE; + else + srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE; + + /* Configure SMC_BW register to handle proper SROMC bank */ + tmp = srom->bw; + tmp &= ~(0xF << (srom_bank * 4)); + tmp |= smc_bw_conf; + srom->bw = tmp; + + /* Configure SMC_BC register */ + srom->bc[srom_bank] = smc_bc_conf; +} diff --git a/include/asm-arm/arch-s5pc1xx/smc.h b/include/asm-arm/arch-s5pc1xx/smc.h index e1a5399..88f4ffe 100644 --- a/include/asm-arm/arch-s5pc1xx/smc.h +++ b/include/asm-arm/arch-s5pc1xx/smc.h @@ -47,4 +47,7 @@ struct s5pc1xx_smc { }; #endif /* __ASSEMBLY__ */ +/* Configure the Band Width and Bank Control Regs for required SROMC Bank */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf); + #endif /* __ASM_ARCH_SMC_H_ */ -- 1.6.6

1 0

[U-Boot] [PATCH 2/3 v3] S5PC100: Function to configure the SROMC registers.
by ch.naveen＠samsung.com 23 Feb '10

23 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Nand Flash, Ethernet, other features might need to configure the SROMC registers accordingly. The config_sromc() functions helps with this. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc(). Comments from Minkyu Kang are fixed Changes since V2: 1.cpu_is_s5pc100() function is used instead of Macros. cpu/arm_cortexa8/s5pc1xx/Makefile | 1 + cpu/arm_cortexa8/s5pc1xx/sromc.c | 53 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-s5pc1xx/smc.h | 3 ++ 3 files changed, 57 insertions(+), 0 deletions(-) create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/cpu/arm_cortexa8/s5pc1xx/Makefile index 4f922e6..0a6a9b4 100644 --- a/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile @@ -34,6 +34,7 @@ SOBJS += reset.o COBJS += clock.o COBJS += cpu_info.o COBJS += timer.o +COBJS += sromc.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c new file mode 100644 index 0000000..7630367 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Naveen Krishna Ch <ch.naveen(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> + +/* + * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the + * band width control and bank control registers + * srom_bank - SROM Bank 0 to 5 + * smc_bw_conf - SMC Band witdh reg configuration value + * smc_bc_conf - SMC Bank Control reg configuration value + */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf) +{ + u32 tmp; + struct s5pc1xx_smc *srom; + + if (cpu_is_s5pc100()) + srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE; + else + srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE; + + /* Configure SMC_BW register to handle proper SROMC bank */ + tmp = srom->bw; + tmp &= ~(0xF << (srom_bank * 4)); + tmp |= smc_bw_conf; + srom->bw = tmp; + + /* Configure SMC_BC register */ + srom->bc[srom_bank] = smc_bc_conf; +} diff --git a/include/asm-arm/arch-s5pc1xx/smc.h b/include/asm-arm/arch-s5pc1xx/smc.h index e1a5399..88f4ffe 100644 --- a/include/asm-arm/arch-s5pc1xx/smc.h +++ b/include/asm-arm/arch-s5pc1xx/smc.h @@ -47,4 +47,7 @@ struct s5pc1xx_smc { }; #endif /* __ASSEMBLY__ */ +/* Configure the Band Width and Bank Control Regs for required SROMC Bank */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf); + #endif /* __ASM_ARCH_SMC_H_ */ -- 1.6.6

3 2

[U-Boot] [PATCH 3/3 v3] SAMSUNG: SMDKC100: Adds ethernet support.
by ch.naveen＠samsung.com 23 Feb '10

23 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be loaded over tftp. The preinit function will configure GPIO (GPK0CON) & SROMC to look for environment in SROM Bank 3. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. The CONFIG_BOOTP* and Net config Macros are removed from config header. Comments from Ben Warren are fixed 2. The GPIO configuration is modified & Macro and Function are renamed. Comments from Minkyu Kang are fixedChanges since V2 Changes since V2: 1. GPIO configurations function has been implemented. board/samsung/smdkc100/smdkc100.c | 39 +++++++++++++++++++++++++++++++++++++ include/configs/smdkc100.h | 13 +++++++++++- 2 files changed, 51 insertions(+), 1 deletions(-) diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 15a1a27..946f7af 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -23,10 +23,40 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> +#include <asm/arch/gpio.h> + DECLARE_GLOBAL_DATA_PTR; +/* + * Miscellaneous platform dependent initialisations + */ +static void smc9115_pre_init(void) +{ + u32 tmp; + u32 smc_bw_conf, smc_bc_conf; + + struct s5pc100_gpio *const gpio = + (struct s5pc100_gpio *)S5PC100_GPIO_BASE; + + /* gpio configuration GPK0CON */ + gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + + /* Ethernet needs bus width of 16 bits */ + smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); + smc_bc_conf = SMC_BC_TACS(0x0) | SMC_BC_TCOS(0x4) | SMC_BC_TACC(0xe) \ + | SMC_BC_TCOH(0x1) | SMC_BC_TAH(0x4) + | SMC_BC_TACP(0x6) | SMC_BC_PMC(0x0); + + /* Select and configure the SROMC bank */ + s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf); +} + int board_init(void) { + smc9115_pre_init(); + gd->bd->bi_arch_number = MACH_TYPE_SMDKC100; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -49,3 +79,12 @@ int checkboard(void) return 0; } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index f12fea3..22e8e95 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -83,7 +83,7 @@ #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NET +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO @@ -235,4 +235,15 @@ #define CONFIG_DOS_PARTITION 1 +/* + * Ethernet Contoller driver + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ +#define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ +#endif /* CONFIG_CMD_NET */ + #endif /* __CONFIG_H */ -- 1.6.6

2 1

[U-Boot] [PATCH 1/1] ppc4xx: add support for alternate format for ndfc
by fkan＠amcc.com 23 Feb '10

23 Feb '10

From: Feng Kan <fkan(a)amcc.com> This is to lock down the ordering in the correction routine against the calculate routine. Otherwise, incorrect define would cause ECC errors. Signed-off-by: Feng Kan <fkan(a)amcc.com> Acked-by: Victor Gallardo <vgallardo(a)amcc.com> --- drivers/mtd/nand/ndfc.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 0dd6789..88e341d 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -89,9 +89,15 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ +#ifdef CONFIG_MTD_NAND_ECC_SMC ecc_code[0] = p[1]; ecc_code[1] = p[2]; ecc_code[2] = p[3]; +#else + ecc_code[0] = p[2]; + ecc_code[1] = p[1]; + ecc_code[2] = p[3]; +#endif return 0; } -- 1.5.5

4 9

[U-Boot] [PATCH] mpc83xx: remove hardcoded network addresses from config files
by Kim Phillips 23 Feb '10

23 Feb '10

and avoid e.g., two identical boards from causing random networking conflicts when hooked up to the same network. Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- include/configs/MPC8313ERDB.h | 7 ------- include/configs/MPC8315ERDB.h | 2 -- include/configs/MPC8323ERDB.h | 6 ------ include/configs/MPC832XEMDS.h | 2 -- include/configs/MPC8349EMDS.h | 8 -------- include/configs/MPC8349ITX.h | 12 ------------ include/configs/MPC8360EMDS.h | 2 -- include/configs/MPC8360ERDK.h | 8 -------- include/configs/MPC837XEMDS.h | 2 -- include/configs/MPC837XERDB.h | 12 ------------ include/configs/sbc8349.h | 8 -------- 11 files changed, 0 insertions(+), 69 deletions(-) diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 0a4ba29..1478ec8 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -580,13 +580,6 @@ */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_ETHADDR 00:E0:0C:00:95:01 -#define CONFIG_ETH1ADDR 00:E0:0C:00:95:02 - -#define CONFIG_IPADDR 10.0.0.2 -#define CONFIG_SERVERIP 10.0.0.1 -#define CONFIG_GATEWAYIP 10.0.0.1 -#define CONFIG_NETMASK 255.0.0.0 #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME mpc8313erdb diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index cfed4ca..a8570ce 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -616,9 +616,7 @@ #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 04:00:00:00:00:0A #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 04:00:00:00:00:0B #endif #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 8e6f7ce..4046f80 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -525,17 +525,11 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_HAS_ETH0 /* add support for "ethaddr" */ -#define CONFIG_ETHADDR 00:04:9f:ef:03:01 #define CONFIG_HAS_ETH1 /* add support for "eth1addr" */ -#define CONFIG_ETH1ADDR 00:04:9f:ef:03:02 /* use mac_read_from_eeprom() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */ #define CONFIG_SYS_I2C_MAC_OFFSET 0x7f00 /* MAC address offset in I2C EEPROM */ -#define CONFIG_IPADDR 10.0.0.2 -#define CONFIG_SERVERIP 10.0.0.1 -#define CONFIG_GATEWAYIP 10.0.0.1 -#define CONFIG_NETMASK 255.0.0.0 #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME mpc8323erdb diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 1adac64..2ad5f60 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -544,9 +544,7 @@ #if defined(CONFIG_UEC_ETH) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:04:9f:ef:03:01 #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:04:9f:ef:03:02 #endif #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 6361c45..bf28d9e 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -685,22 +685,14 @@ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_TSEC_ENET) -#define CONFIG_ETHADDR 00:04:9f:ef:23:33 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH0 -#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21 #endif -#define CONFIG_IPADDR 192.168.1.253 - #define CONFIG_HOSTNAME mpc8349emds #define CONFIG_ROOTPATH /nfsroot/rootfs #define CONFIG_BOOTFILE uImage -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ #define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index eaa59fd..52e2851 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -678,18 +678,6 @@ boards, we say we have two, but don't display a message if we find only one. */ */ #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:E0:0C:00:8C:01 -#endif - -#ifdef CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02 -#endif - -#define CONFIG_IPADDR 192.168.1.253 -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.252.0 #define CONFIG_NETDEV eth0 #ifdef CONFIG_MPC8349ITX diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 6fa7287..b9b5eab 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -587,9 +587,7 @@ #if defined(CONFIG_UEC_ETH) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:04:9f:ef:01:01 #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02 #endif #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index c6f1409..c7bc9cd 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -506,10 +506,6 @@ #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 #define CONFIG_HAS_ETH3 -#define CONFIG_ETHADDR 00:04:9f:ef:01:01 -#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02 -#define CONFIG_ETH2ADDR 00:04:9f:ef:01:03 -#define CONFIG_ETH3ADDR 00:04:9f:ef:01:04 #endif #define CONFIG_BAUDRATE 115200 @@ -518,10 +514,6 @@ #define CONFIG_HOSTNAME mpc8360erdk #define CONFIG_BOOTFILE uImage -#define CONFIG_IPADDR 10.0.0.99 -#define CONFIG_SERVERIP 10.0.0.2 -#define CONFIG_GATEWAYIP 10.0.0.2 -#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_ROOTPATH /nfsroot/ #define CONFIG_BOOTDELAY 2 /* -1 disables auto-boot */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 63f1d85..65d49ec 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -637,9 +637,7 @@ extern int board_pci_host_broken(void); #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:E0:0C:00:83:79 #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:E0:0C:00:83:78 #endif #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 913184c..ca60272 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -643,20 +643,8 @@ */ #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:04:9f:ef:04:01 -#endif - -#ifdef CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:04:9f:ef:04:02 -#endif - #define CONFIG_HAS_FSL_DR_USB -#define CONFIG_IPADDR 10.0.0.2 -#define CONFIG_SERVERIP 10.0.0.1 -#define CONFIG_GATEWAYIP 10.0.0.1 -#define CONFIG_NETMASK 255.0.0.0 #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME mpc837x_rdb diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 7bef119..4ea65ce 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -631,21 +631,13 @@ #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e #endif -#define CONFIG_IPADDR 192.168.1.234 - #define CONFIG_HOSTNAME SBC8349 #define CONFIG_ROOTPATH /tftpboot/rootfs #define CONFIG_BOOTFILE uImage -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ #define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */ -- 1.7.0

1 1

[U-Boot] Problem executing hello world as specified on wiki
by Vipul Jain 22 Feb '10

22 Feb '10

Hello U-Boot alias, I am trying to execute the standlone examples of hello world by following the steps specified at the U-Boot wiki but have no success. This is what I am getting. Method 1: --------------- EDB9302> tftp 40000 /tftpboot/hello_world.srec Using ep93xx_eth-0 device TFTP from server 192.168.15.6; our IP address is 192.168.15.15 Filename '/tftpboot/hello_world.srec'. Load address: 0x40000 Loading: # done Bytes transferred = 1916 (77c hex) EDB9302> go 40004 ## Starting application at 0x00040004 ... <nothing just hung> Method 2: ---------------- EDB9302> tftp 40000 /tftpboot/hello_world.bin Using ep93xx_eth-0 device TFTP from server 192.168.15.6; our IP address is 192.168.15.15 Filename '/tftpboot/hello_world.bin'. Load address: 0x40000 Loading: # done Bytes transferred = 616 (268 hex) EDB9302> go 40004 ## Starting application at 0x00040004 ... �� <some garbage> Method 3: EDB9302> loadb 0x100000 ## Ready for binary (kermit) download to 0x00100000 at 115200 bps... (Back at Gladiator) ---------------------------------------------------- (./) C-Kermit>send /tftpboot/hello_world (./) C-Kermit>connect Connecting to /dev/ttyUSB0, speed 115200 Escape character: Ctrl-\ (ASCII 28, FS): enabled Type the escape character followed by C to get back, or followed by ? to see other options. ---------------------------------------------------- Total Size = 0x0000937c = 37756 Bytes ## Start Addr = 0x00100000 EDB9302> go 0x00100000 ## Starting application at 0x00100000 ... undefined instruction pc : [<0010001c>] lr : [<05706e50>] sp : 0567fe4c ip : fffffffe fp : 00000001 r10: 056a01d8 r9 : 00000000 r8 : 0567ffe0 r7 : 00000000 r6 : 00000002 r5 : 056a028c r4 : 00100000 r3 : 00100000 r2 : 056a028c r1 : 056a028c r0 : 0008000c Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... Please help me, how can I test simple hello world program like this on U-Boot. Regards, Vipul.

2 5

Re: [U-Boot] building and updating u-boot on redboot based
by Vipul Jain 22 Feb '10

22 Feb '10

Hi Matthias, I did update my board after applying the patch you sent and I found no problem with booting up of the board. The only visible change to me was in U-Boot version string with latest time stamp and -dirty appended as below. Before Update: U-Boot 2009.11-00400-g77e7273 (Feb 21 2010 - 01:15:31) After Update: U-Boot 2009.11-00400-g77e7273-dirty (Feb 22 2010 - 13:06:39) Is there any specific test/command you would like me to execute? Regards, Vipul. On Mon, Feb 22, 2010 at 12:35 PM, Matthias Kaehlcke <matthias(a)kaehlcke.net>wrote: > hi vipul, > > something must have gone wrong when copying the patch to the mail ... > i attached the patch to this mail, i hope this works better > > thanks for testing! > > matthias > > > El Mon, Feb 22, 2010 at 12:05:29PM -0800 Vipul Jain ha dit: > > > I tried to copy paste the diffs into a text file called > > ep93xx.sdram.patch and ran patch command > > but it rejected/failed. I did notice that in the email the diff has > > mingled around the @@ -R +R@@ > > with the source code line as below: > > @@ -101,6 +120,11 @@ static void setup_refresh_timer(void) > > > > I was wondering, if you could send me the diff in text file rather can > > copy paste it in email. > > > > I am attaching the patch file I created the rej report that got > created in > > case you would like to > > have a look. > > > > Regards, > > Vipul. > > > > On Mon, Feb 22, 2010 at 1:04 AM, Matthias Kaehlcke < > matthias(a)kaehlcke.net> > > wrote: > > > > hi vipul, > > > > El Sun, Feb 21, 2010 at 01:13:22PM -0800 Vipul Jain ha dit: > > > I had two workspaces one which I got from main u-boot source > base > > and > > > other from > > > git clone git://gitorious.org/u-boot-ep93xx/u-boot-ep93xx.git > > > and by mistake I used u-boot.bin image build from this ep93xx > > specific > > > > > > source tree which made my board unbootable. This time I build > the > > image > > > from main > > > u-boot git source while using the download tool and it powered > up > > as > > > smooth as it > > > can without any issues. so I believe that main u-boot source is > > perfect. > > > > > > Sorry about any confusion. Will have to now figure out how to > > restore > > > linux kernel > > > back? ... :) > > > > > > Please kindly let me know if you want me to perform any kind of > > testing > > > for ep9302. > > > I will be more than happy if I could be of any help to you. > > > > as i told you in a previous mail the current SDRAM initialization > > isn't totally correct. it works on most boards, but doesn't follow > the > > sequence in the specification. below is a patch that works on my > > edb9301 and edb9307a boards, it would be good to know if this is > also > > true for the edb9302. > > > > when you find some time could you please apply it on your tree and > > tell me if the board boots? > > > > thanks > > > > Matthias > > > > --- > > > > diff --git a/board/edb93xx/sdram_cfg.c b/board/edb93xx/sdram_cfg.c > > index 6155f0e..61950f3 100644 > > --- a/board/edb93xx/sdram_cfg.c > > +++ b/board/edb93xx/sdram_cfg.c > > @@ -1,5 +1,6 @@ > > /* > > - * Copyright (C) 2009 Matthias Kaehlcke <matthias(a)kaehlcke.net> > > + * Copyright (C) 2010, 2009 > > + * Matthias Kaehlcke <matthias(a)kaehlcke.net> > > * > > * Copyright (C) 2006 Dominic Rath <Dominic.Rath(a)gmx.de> > > * > > @@ -26,13 +27,13 @@ > > #include "sdram_cfg.h" > > #include "early_udelay.h" > > > > +#define PRECHARGE_BANK(bank) (*(volatile uint32_t *) > > \ > > + (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) = 0 > > + > > #define PROGRAM_MODE_REG(bank) (*(volatile uint32_t *) > > \ > > (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank | > > SDRAM_MODE_REG_VAL)) > > > > -#define PRECHARGE_BANK(bank) (*(volatile uint32_t *) > > \ > > - (SDRAM_BASE_ADDR | > > SDRAM_BANK_SEL_##bank)) > > - > > -static void force_precharge(void); > > +static void precharge_all_banks(void); > > static void setup_refresh_timer(void); > > static void program_mode_registers(void); > > > > @@ -47,7 +48,7 @@ void sdram_cfg(void) > > > > early_udelay(200); > > > > - force_precharge(); > > + precharge_all_banks(); > > > > setup_refresh_timer(); > > > > @@ -57,19 +58,37 @@ void sdram_cfg(void) > > writel(GLCONFIG_CKE, &sdram->glconfig); > > } > > > > -static void force_precharge(void) > > +static void precharge_all_banks(void) > > { > > + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; > > + > > + /* Issue PRECHARGE ALL commands */ > > + writel(GLCONFIG_INIT | GLCONFIG_CKE, &sdram->glconfig); > > + > > /* > > - * Errata most EP93xx revisions say that PRECHARGE ALL isn't > > always > > - * issued. > > + * Errata of most EP93xx revisions say that PRECHARGE ALL > isn't > > always > > + * issued > > * > > - * Do a read from each bank to make sure they're precharged > > + * Cirrus proposes a workaround which consists in performing > a > > read from > > + * each bank to force the precharge. This causes some boards > to > > hang. > > + * Writing to the SDRAM banks instead of reading has the > same > > + * side-effect (the SDRAM controller issues the necessary > > precharges), > > + * but is known to work on all supported boards > > */ > > > > PRECHARGE_BANK(0); > > + > > +#if (CONFIG_NR_DRAM_BANKS >= 2) > > PRECHARGE_BANK(1); > > +#endif > > + > > +#if (CONFIG_NR_DRAM_BANKS >= 3) > > PRECHARGE_BANK(2); > > +#endif > > + > > +#if (CONFIG_NR_DRAM_BANKS == 4) > > PRECHARGE_BANK(3); > > +#endif > > } > > > > static void setup_refresh_timer(void) > > @@ -101,6 +120,11 @@ static void setup_refresh_timer(void) > > > > static void program_mode_registers(void) > > { > > + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; > > + > > + /* Select mode register update mode */ > > + writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig); > > + > > > > La guerra es un acto abominable en el que se matan personas que > no > > se conocen, dirigidas por personas que se conocen y no se matan > > > .''`. > > using free software / Debian GNU/Linux | http://debian.org : :' > : > > `. > `'` > > gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4 > `- > > > > --- board/edb93xx/sdram_cfg.c > > +++ board/edb93xx/sdram_cfg.c > > @@ -1,5 +1,6 @@ > > /* > > - * Copyright (C) 2009 Matthias Kaehlcke <matthias(a)kaehlcke.net> > > + * Copyright (C) 2010, 2009 > > + * Matthias Kaehlcke <matthias(a)kaehlcke.net> > > * > > * Copyright (C) 2006 Dominic Rath <Dominic.Rath(a)gmx.de> > > * > > @@ -26,13 +27,13 @@ > > #include "sdram_cfg.h" > > #include "early_udelay.h" > > > > +#define PRECHARGE_BANK(bank) (*(volatile uint32_t *) \ > > + (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) = 0 > > + > > #define PROGRAM_MODE_REG(bank) (*(volatile uint32_t *) \ > > (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank | > SDRAM_MODE_REG_VAL)) > > > > -#define PRECHARGE_BANK(bank) (*(volatile uint32_t *) \ > > - (SDRAM_BASE_ADDR | > SDRAM_BANK_SEL_##bank)) > > - > > -static void force_precharge(void); > > +static void precharge_all_banks(void); > > static void setup_refresh_timer(void); > > static void program_mode_registers(void); > > > > @@ -47,7 +48,7 @@ void sdram_cfg(void) > > > > early_udelay(200); > > > > - force_precharge(); > > + precharge_all_banks(); > > > > setup_refresh_timer(); > > > > @@ -57,19 +58,37 @@ void sdram_cfg(void) > > writel(GLCONFIG_CKE, &sdram->glconfig); > > } > > > > -static void force_precharge(void) > > +static void precharge_all_banks(void) > > { > > + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; > > + > > + /* Issue PRECHARGE ALL commands */ > > + writel(GLCONFIG_INIT | GLCONFIG_CKE, &sdram->glconfig); > > + > > /* > > - * Errata most EP93xx revisions say that PRECHARGE ALL isn't > always > > - * issued. > > + * Errata of most EP93xx revisions say that PRECHARGE ALL isn't > always > > + * issued > > * > > - * Do a read from each bank to make sure they're precharged > > + * Cirrus proposes a workaround which consists in performing a > read from > > + * each bank to force the precharge. This causes some boards to > hang. > > + * Writing to the SDRAM banks instead of reading has the same > > + * side-effect (the SDRAM controller issues the necessary > precharges), > > + * but is known to work on all supported boards > > */ > > > > PRECHARGE_BANK(0); > > + > > +#if (CONFIG_NR_DRAM_BANKS >= 2) > > PRECHARGE_BANK(1); > > +#endif > > + > > +#if (CONFIG_NR_DRAM_BANKS >= 3) > > PRECHARGE_BANK(2); > > +#endif > > + > > +#if (CONFIG_NR_DRAM_BANKS == 4) > > PRECHARGE_BANK(3); > > +#endif > > } > > > > static void setup_refresh_timer(void) > > @@ -101,6 +120,11 @@ static void setup_refresh_timer(void) > > > > static void program_mode_registers(void) > > { > > + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; > > + > > + /* Select mode register update mode */ > > + writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig); > > + > > > -- > Matthias Kaehlcke > Embedded Linux Developer > Barcelona > > You must have a plan. If you don't have a plan, > you'll become part of somebody else's plan > .''`. > using free software / Debian GNU/Linux | http://debian.org : :' : > `. `'` > gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4 `- >

2 1

[U-Boot] [PATCH] AT91: Added support for taskit Stamp9G20 and PortuxG20
by Achim Ehrlich 22 Feb '10

22 Feb '10

Signed-off-by: Achim Ehrlich <aehrlich(a)taskit.de> --- Makefile | 9 ++ board/taskit/stamp9G20/Makefile | 56 ++++++++++ board/taskit/stamp9G20/config.mk | 1 + board/taskit/stamp9G20/led.c | 35 ++++++ board/taskit/stamp9G20/partition.c | 40 +++++++ board/taskit/stamp9G20/stamp9G20.c | 200 ++++++++++++++++++++++++++++++++++++ include/configs/stamp9G20.h | 197 +++++++++++++++++++++++++++++++++++ 7 files changed, 538 insertions(+), 0 deletions(-) create mode 100644 board/taskit/stamp9G20/Makefile create mode 100644 board/taskit/stamp9G20/config.mk create mode 100644 board/taskit/stamp9G20/led.c create mode 100644 board/taskit/stamp9G20/partition.c create mode 100644 board/taskit/stamp9G20/stamp9G20.c create mode 100644 include/configs/stamp9G20.h diff --git a/Makefile b/Makefile index 524b9da..ef1a7d4 100644 --- a/Makefile +++ b/Makefile @@ -2906,6 +2906,15 @@ TNY_A9260_config : unconfig @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +portuxG20_config \ +stamp9G20_config : unconfig + @mkdir -p $(obj)include + @if [ "$(findstring portux,$@)" ] ; then \ + echo "#define CONFIG_PORTUXG20 1" >$(obj)include/config.h; \ + $(XECHO) "... PortuxG20";\ + fi; + @$(MKCONFIG) -a stamp9G20 arm arm926ejs stamp9G20 taskit at91 + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/taskit/stamp9G20/Makefile b/board/taskit/stamp9G20/Makefile new file mode 100644 index 0000000..ef82428 --- /dev/null +++ b/board/taskit/stamp9G20/Makefile @@ -0,0 +1,56 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += stamp9G20.o +COBJS-y += led.o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/taskit/stamp9G20/config.mk b/board/taskit/stamp9G20/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/taskit/stamp9G20/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/taskit/stamp9G20/led.c b/board/taskit/stamp9G20/led.c new file mode 100644 index 0000000..dc6ac63 --- /dev/null +++ b/board/taskit/stamp9G20/led.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); +} diff --git a/board/taskit/stamp9G20/partition.c b/board/taskit/stamp9G20/partition.c new file mode 100644 index 0000000..2629c67 --- /dev/null +++ b/board/taskit/stamp9G20/partition.c @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf(a)atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1} +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/taskit/stamp9G20/stamp9G20.c b/board/taskit/stamp9G20/stamp9G20.c new file mode 100644 index 0000000..28cd8b1 --- /dev/null +++ b/board/taskit/stamp9G20/stamp9G20.c @@ -0,0 +1,200 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * Achim Ehrlich <aehrlich(a)taskit.de> + * taskit GmbH <www.taskit.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9260.h> +#include <asm/arch/at91sam9260_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +#ifdef CONFIG_CMD_NAND +static void stamp9G20_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif + +#ifdef CONFIG_MACB +static void stamp9G20_macb_hw_init(void) +{ + + /* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/ + at91_set_gpio_output(AT91_PIN_PA26,0); + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); + + /* + * Disable pull-up on: + * RXDV (PA17) => PHY normal mode (not Test mode) + * ERX0 (PA14) => PHY ADDR0 + * ERX1 (PA15) => PHY ADDR1 + * ERX2 (PA25) => PHY ADDR2 + * ERX3 (PA26) => PHY ADDR3 + * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 + * + * PHY has internal pull-down + */ + writel(pin_to_mask(AT91_PIN_PA14) | + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA28), + pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); + + /* Need to reset PHY -> 500ms reset */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0D << 8)) | + AT91_RSTC_URSTEN); + + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + + /* Wait for end hardware reset */ + while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + + /* Re-enable pull-up */ + writel(pin_to_mask(AT91_PIN_PA14) | + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA28), + pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + + at91_macb_hw_init(); +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + +#ifdef CONFIG_PORTUXG20 + gd->bd->bi_arch_number = MACH_TYPE_PORTUXG20; +#else + gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20; +#endif + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_set_gpio_output(AT91_PIN_PC9, 1); + at91_set_gpio_output(AT91_PIN_PC5, 1); + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + stamp9G20_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init((1 << 0) || (1 << 1)); +#endif +#ifdef CONFIG_MACB + stamp9G20_macb_hw_init(); +#endif + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_MACB + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/include/configs/stamp9G20.h b/include/configs/stamp9G20.h new file mode 100644 index 0000000..5008554 --- /dev/null +++ b/include/configs/stamp9G20.h @@ -0,0 +1,197 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * (C) Achim Ehrlich <aehrlich(a)taskit.de> + * taskit GmbH <www.taskit.de> + * + * Configuation settings for the Stamp9G20 CPU module. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AT91_LEGACY +#define CONFIG_AT91_GPIO + +/* ARM asynchronous clock */ +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define CONFIG_SYS_HZ 1000 /* 1ms resolution */ + + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define AT91_CPU_NAME "AT91SAM9G20" +#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* pad the watchdog */ + +#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_HW_WATCHDOG + + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +/* LED */ + +#undef CONFIG_AT91_LED + + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_SOURCE + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +/* DataFlash */ +#undef CONFIG_ATMEL_DATAFLASH_SPI +#undef CONFIG_HAS_DATAFLASH + + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#endif + +/* NOR flash - no real flash on this board */ +#define CONFIG_SYS_NO_FLASH 1 + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R 1 + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x23e00000 + + + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "run sdboot" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \ + "256k(uboot)ro,128k(env1)ro," \ + "128k(env2)ro,2M(linux),-(root)rw\0" \ + "sdboot=setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/mmcblk0p1 rootdelay=1; " \ + "nand read 0x22000000 0xA0000 0x200000; " \ + "bootm 22000000\0" \ + "flashboot=setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/mtdblock5 rootfstype=jffs2; " \ + "nand read 0x22000000 0xA0000 0x200000; " \ + "bootm 22000000\0" \ + "basicargs=console=ttyS0,115200 mem=64M\0" \ + "" + + + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- 1.6.4.4

3 6

[U-Boot] Taskit Portux920T port - Some issues
by Luca Lazzarin 22 Feb '10

22 Feb '10

Hi, we are Enrico & Luca. We have tried to port u-boot to a Portux920T MiniPC. It seems we are successful, in fact u-boot brings up the device with no error and can boot a linux kernel. Ethernet driver works, dhcp works and major problems are present. The only thing we can't get right is flash programming. We are trying to use CFI flash driver that shows evident timing issues, at least in our opinion. When running saveenv more than once we get the typical "Flash not erased" error, while running cp.b (for example) does not give us any problem. Running a "bootm kerneladdr initaddr" command it frequently gives us a "No boot image - CRC error", but running it another time, without rebooting the machine, results in a successful boot. We ended up thinking that is a CFI driver bug, but we know we could easily be wrong, so we include our config in this message. Our flash chip is a AMD MIRROR S29L128N 128Mbit - AMD (Spansion) (227e) - 16MB. P.S.: we have tried to disable buffered writing (as suggested for example in the voiceblue.h file, with no success) /* * Ulf Samuelsson <ulf(a)atmel.com> * Rick Bronson <rick(a)efn.org> * * Configuration settings for the AT91RM9200EK board. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ #ifndef __CONFIG_H #define __CONFIG_H /* ARM asynchronous clock */ /* * from 18.432 MHz crystal * (18432000 / 4 * 39) */ #define AT91C_MAIN_CLOCK 179712000 /* * peripheral clock * (AT91C_MASTER_CLOCK / 3) */ #define AT91C_MASTER_CLOCK 59904000 #define AT91_SLOW_CLOCK 32768 /* slow clock */ #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ #define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define USE_920T_MMU 1 /* Those following defines are needed to support latest kernel - don't bother... */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 /* and remember to "mkimage" initrd */ /* * LowLevel Init */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ #define CONFIG_SYS_MCKR_VAL 0x00000202 /* sdram */ #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ #define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 /* * Memory Configuration */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END \ (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144) /* * Hardware drivers */ /* * UART Configuration * * define one of these to choose the DBGU, * USART0 or USART1 as console */ #define CONFIG_AT91RM9200_USART #define CONFIG_DBGU #undef CONFIG_USART0 #undef CONFIG_USART1 /* don't include RTS/CTS flow control support */ #undef CONFIG_HWFLOW /* disable modem initialization stuff */ #undef CONFIG_MODEM_SUPPORT #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } #define CONFIG_BAUDRATE 115200 /* * Command line configuration. */ #include <config_cmd_all.h> #include "ourboard.h" /* let our new include file decide about this */ #define CONFIG_CMD_DHCP #define CONFIG_CMD_FAT #define CONFIG_CMD_MII #define CONFIG_CMD_PING /* holds on... */ #undef CONFIG_CMD_BDI /* see below */ #define CONFIG_CMD_IMI #undef CONFIG_CMD_FPGA #define CONFIG_CMD_MISC #define CONFIG_CMD_LOADS #include <asm/arch/AT91RM9200.h> /* needed for port definitions */ /* Options for MMC/SD Card */ #define CONFIG_DOS_PARTITION 1 #undef CONFIG_MMC #define CONFIG_SYS_MMC_BASE 0xFFFB4000 #define CONFIG_SYS_MMC_BLOCKSIZE 512 /* * Network Driver Setting */ #define CONFIG_DRIVER_ETHER #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91C_USE_RMII /* * AC Characteristics * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ #define DATAFLASH_TCSS (0xC << 16) #define DATAFLASH_TCHS (0x1 << 24) /* and our board has dataflash... */ #define CONFIG_HAS_DATAFLASH #if defined(CONFIG_HAS_DATAFLASH) #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 #define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 /* Logical adress for CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS3 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 #define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1 #define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22 #endif /* * NOR Flash */ #define CONFIG_SYS_FLASH_BASE 0x10000000 #define PHYS_FLASH_SIZE 0x1000000 /* 16MB */ #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_FLASH_PROTECTION /* yes, it seems to use hw protection */ /* * Environment Settings */ #ifdef CONFIG_ENV_IS_IN_DATAFLASH /* * Datasflash Environment Settings */ #define CONFIG_ENV_OFFSET 0x4200 #define CONFIG_ENV_ADDR \ (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) /* 8 * 1056 really , but start.s is not OK with this*/ #define CONFIG_ENV_SIZE 0x2000 #else /* * NOR Flash Environment Settings */ #define CONFIG_ENV_IS_IN_FLASH 1 #ifdef CONFIG_SKIP_LOWLEVEL_INIT /* * between boot.bin and u-boot.bin.gz */ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000) #define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ #else /* * after u-boot.bin */ #define CONFIG_ENV_ADDR \ (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_SIZE 0x20000 /* sectors are 128K here */ /* The following #defines are needed to get flash environment right */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MONITOR_LEN \ (CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE) #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CONFIG_ENV_IS_IN_DATAFLASH */ /* * Boot option */ #define CONFIG_BOOTDELAY 3 #ifdef CONFIG_SKIP_LOWLEVEL_INIT /* boot.bin, env, u-boot.bin.gz */ #define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */ #define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000) #define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */ #else /* u-boot.bin */ #define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */ #define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE /* Here the comment was wrong - without any modification, this specifies a 256k u-boot, more realistic those days... */ #define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 256 KBytes */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ #define CONFIG_ENV_OVERWRITE 1 /* we're not vendors... yes... */ /* * USB Config */ #define CONFIG_CMD_USB #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_USB_KEYBOARD 1 #define CONFIG_USB_STORAGE 1 #define CONFIG_DOS_PARTITION 1 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 /* * I2C */ #define CONFIG_HARD_I2C #ifdef CONFIG_HARD_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C_SPEED 0 /* not used */ #define CONFIG_SYS_I2C_SLAVE 0 /* not used */ #endif /* * Shell Settings */ #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_LONGHELP 1 #define CONFIG_AUTO_COMPLETE 1 //#define CONFIG_SYS_HUSH_PARSER 1 /* I don't like hush */ #define CONFIG_SYS_PROMPT "NS U-Boot> " //#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 26 /* max number of command args */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #ifndef __ASSEMBLY__ /*----------------------------------------------------------------------- * Board specific extension for bd_info * * This structure is embedded in the global bd_info (bd_t) structure * and can be used by the board specific code (eg board/...) */ struct bd_info_ext { /* helper variable for board environment handling * * env_crc_valid == 0 => uninitialised * env_crc_valid > 0 => environment crc in flash is valid * env_crc_valid < 0 => environment crc in flash is invalid */ int env_crc_valid; }; #endif #define CONFIG_SYS_HZ 1000 /* * AT91C_TC0_CMR is implicitly set to * AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \ , 0x1000) /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/ #define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/ #endif Thank you in advance for reading this mail Enrico & Luca

3 2