February 2010 - U-Boot

[U-Boot] [UBOOT] AVR32-UC3 (EVK1100) status
by Tobias Frost 02 Mar '10

02 Mar '10

I received a new toy, one Atmel EVK 1105 evaluation board. (MCU: AVR32, AT32 UC3A 0512). The board is quite similar to the EVK 1100. Checking the schematic, the changes are indeed minor, (like channel for SPI1 instead of SPI0 for Flash memory) As I saw on the list that there were some patches to support the 1100, it seems feasible for me also to add support for the 1105. So the first question is: How stable / good is the support of the EVK1100? I read on the avr32linux wiki that there are some issues ("commments needs to be adressed") but I found no details. So, does it make sense to use this as a starting point? I'm new to uboot development, so maybe you also have some pointers to get started. Thanks! Tobi

2 1

[U-Boot] I2C Register
by Ronny D 02 Mar '10

02 Mar '10

Hi, I am trying to read SPD data from dimm though I2c. as the board that i am using it has different I2c register so it is difficult to match with the register used in u-boot. Can i get the information about /*----------------------------------------------------------------------------- | IIC Register Offsets '----------------------------------------------------------------------------*/ #define IICMDBUF 0x00 #define IICSDBUF 0x02 #define IICLMADR 0x04 #define IICHMADR 0x05 #define IICCNTL 0x06 #define IICMDCNTL 0x07 #define IICSTS 0x08 #define IICEXTSTS 0x09 #define IICLSADR 0x0A #define IICHSADR 0x0B #define IICCLKDIV 0x0C #define IICINTRMSK 0x0D #define IICXFRCNT 0x0E #define IICXTCNTLSS 0x0F #define IICDIRECTCNTL 0x10 these register to that it will be easy for me to match with the register that i am using. Regards, Ronny The INTERNET now has a personality. YOURS! See your Yahoo! Homepage. http://in.yahoo.com/

3 9

[U-Boot] [PATCH 3/3 v6] SAMSUNG: SMDKC100: Adds ethernet support.
by ch.naveen＠samsung.com 02 Mar '10

02 Mar '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be loaded over tftp. The preinit function will configure GPIO (GPK0CON) & SROMC to look for environment in SROM Bank 3. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. The CONFIG_BOOTP* and Net config Macros are removed from config header. Comments from Ben Warren are fixed 2. The GPIO configuration is modified & Macro and Function are renamed. Comments from Minkyu Kang are fixedChanges since V2 Changes since V2: 1. GPIO configurations function has been implemented. Changes since V3: 1. Comments from Minkyu Kang are fixed. Changes since V4: None Changes since v5: 1. Compile time warning are fixed. board/samsung/smdkc100/smdkc100.c | 40 +++++++++++++++++++++++++++++++++++++ include/configs/smdkc100.h | 12 ++++++++++- 2 files changed, 51 insertions(+), 1 deletions(-) diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 15a1a27..76bd4cc 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -23,10 +23,41 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> +#include <asm/arch/gpio.h> +#include <netdev.h> + DECLARE_GLOBAL_DATA_PTR; +/* + * Miscellaneous platform dependent initialisations + */ +static void smc9115_pre_init(void) +{ + u32 tmp; + u32 smc_bw_conf, smc_bc_conf; + + struct s5pc100_gpio *const gpio = + (struct s5pc100_gpio *)S5PC100_GPIO_BASE; + + /* gpio configuration GPK0CON */ + gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + + /* Ethernet needs bus width of 16 bits */ + smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); + smc_bc_conf = SMC_BC_TACS(0x0) | SMC_BC_TCOS(0x4) | SMC_BC_TACC(0xe) + | SMC_BC_TCOH(0x1) | SMC_BC_TAH(0x4) + | SMC_BC_TACP(0x6) | SMC_BC_PMC(0x0); + + /* Select and configure the SROMC bank */ + s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf); +} + int board_init(void) { + smc9115_pre_init(); + gd->bd->bi_arch_number = MACH_TYPE_SMDKC100; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -49,3 +80,12 @@ int checkboard(void) return 0; } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a8ba052..09bce6d 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -83,7 +83,6 @@ #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NET #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO @@ -235,4 +234,15 @@ #define CONFIG_DOS_PARTITION 1 +/* + * Ethernet Contoller driver + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ +#define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ +#endif /* CONFIG_CMD_NET */ + #endif /* __CONFIG_H */ -- 1.6.6

3 3

[U-Boot] [PATCH 1/4] EHCI: fix root hub device descriptor
by Sergei Shtylyov 01 Mar '10

01 Mar '10

On little endian machines, EHCI root hub's USB revision is reported as 0.2 -- cpu_to_le16() was missed in the initializer for the 'bcdUSB' descriptor field. The same should be done for the 'bcdDevice' field. Signed-off-by: Sergei Shtylyov <sshtylyov(a)mvista.com> --- drivers/usb/host/ehci-hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: u-boot/drivers/usb/host/ehci-hcd.c =================================================================== --- u-boot.orig/drivers/usb/host/ehci-hcd.c +++ u-boot/drivers/usb/host/ehci-hcd.c @@ -55,14 +55,14 @@ static struct descriptor { { 0x12, /* bLength */ 1, /* bDescriptorType: UDESC_DEVICE */ - 0x0002, /* bcdUSB: v2.0 */ + cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 9, /* bDeviceClass: UDCLASS_HUB */ 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 64, /* bMaxPacketSize: 64 bytes */ 0x0000, /* idVendor */ 0x0000, /* idProduct */ - 0x0001, /* bcdDevice */ + cpu_to_le16(0x0100), /* bcdDevice */ 1, /* iManufacturer */ 2, /* iProduct */ 0, /* iSerialNumber */

2 1

[U-Boot] [PATCH 2/4] EHCI: fix off-by-one error in ehci_submit_root()
by Sergei Shtylyov 01 Mar '10

01 Mar '10

USB devices on the 2nd port are not detected and I get the following message: The request port(1) is not configured That's with default CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS value of 2. 'req->index' is 1-based, so the comparison in ehci_submit_root() can't be correct. Signed-off-by: Sergei Shtylyov <sshtylyov(a)mvista.com> --- drivers/usb/host/ehci-hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: u-boot/drivers/usb/host/ehci-hcd.c =================================================================== --- u-boot.orig/drivers/usb/host/ehci-hcd.c +++ u-boot/drivers/usb/host/ehci-hcd.c @@ -536,7 +536,7 @@ ehci_submit_root(struct usb_device *dev, uint32_t reg; uint32_t *status_reg; - if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { + if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { printf("The request port(%d) is not configured\n", le16_to_cpu(req->index) - 1); return -1;

2 1

[U-Boot] [PATCH 4/4] EHCI: add NEC PCI ID
by Sergei Shtylyov 01 Mar '10

01 Mar '10

Add NEC EHCI controller to the list of the supported devices. Signed-off-by: Sergei Shtylyov <sshtylyov(a)mvista.com> drivers/usb/host/ehci-pci.c | 1 + 1 file changed, 1 insertion(+) Index: u-boot/drivers/usb/host/ehci-pci.c =================================================================== --- u-boot.orig/drivers/usb/host/ehci-pci.c +++ u-boot/drivers/usb/host/ehci-pci.c @@ -28,6 +28,7 @@ #ifdef CONFIG_PCI_EHCI_DEVICE static struct pci_device_id ehci_pci_ids[] = { /* Please add supported PCI EHCI controller ids here */ + {0x1033, 0x00E0}, {0, 0} }; #endif

2 1

[U-Boot] Where can I find the git repostory for mx51evk
by Lv Terry-R65388 01 Mar '10

01 Mar '10

Hi Denx, I have cloned u-boot-imx and want to apply the patch "[U-Boot] [PATCH V4 11/11] Add initial support for Freescale mx51evk board" for a test. But the patch can't be appled. error: patch failed: MAINTAINERS:152 error: MAINTAINERS: patch does not apply How can I get the repostory for mx51evk? Thanks~~ Yours Terry General Business Information Freescale Internal Use Only Freescale Confidential Proprietary

4 9

[U-Boot] [PATCH V3 10/11] fsl_esdhc: add support for mx51 processor
by Stefano Babic 01 Mar '10

01 Mar '10

The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic(a)denx.de> --- cpu/arm_cortexa8/mx51/Makefile | 2 +- cpu/arm_cortexa8/mx51/speed.c | 38 ++++++++++ drivers/mmc/fsl_esdhc.c | 147 ++++++++++++++++++++++++++------------- include/asm-arm/global_data.h | 3 + include/fsl_esdhc.h | 11 +++- lib_arm/board.c | 3 + 6 files changed, 153 insertions(+), 51 deletions(-) create mode 100644 cpu/arm_cortexa8/mx51/speed.c diff --git a/cpu/arm_cortexa8/mx51/Makefile b/cpu/arm_cortexa8/mx51/Makefile index 4d82293..7cfaa2c 100644 --- a/cpu/arm_cortexa8/mx51/Makefile +++ b/cpu/arm_cortexa8/mx51/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS = soc.o clock.o iomux.o timer.o +COBJS = soc.o clock.o iomux.o timer.o speed.o SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm_cortexa8/mx51/speed.c b/cpu/arm_cortexa8/mx51/speed.c new file mode 100644 index 0000000..10acbbf --- /dev/null +++ b/cpu/arm_cortexa8/mx51/speed.c @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +int get_clocks(void) +{ + DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_FSL_ESDHC + gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK); +#endif + return 0; +} diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c6e9e6e..112beb6 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -37,7 +37,6 @@ #include <fdt_support.h> #include <asm/io.h> - DECLARE_GLOBAL_DATA_PTR; struct fsl_esdhc { @@ -102,7 +101,8 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) { uint wml_value; int timeout; - struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; wml_value = data->blocksize/4; @@ -112,24 +112,24 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) wml_value = 0x100000 | wml_value; - out_be32(&regs->dsaddr, (u32)data->dest); + write_reg32(&regs->dsaddr, (u32)data->dest); } else { if (wml_value > 0x80) wml_value = 0x80; - if ((in_be32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) { + if ((read_reg32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) { printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return TIMEOUT; } wml_value = wml_value << 16 | 0x10; - out_be32(&regs->dsaddr, (u32)data->src); + write_reg32(&regs->dsaddr, (u32)data->src); } - out_be32(&regs->wml, wml_value); + write_reg32(&regs->wml, wml_value); - out_be32(&regs->blkattr, data->blocks << 16 | data->blocksize); + write_reg32(&regs->blkattr, data->blocks << 16 | data->blocksize); /* Calculate the timeout period for data transactions */ - timeout = __ilog2(mmc->tran_speed/10); + timeout = fls(mmc->tran_speed/10) - 1; timeout -= 13; if (timeout > 14) @@ -138,7 +138,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) if (timeout < 0) timeout = 0; - clrsetbits_be32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16); + clrsetbits_reg32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16); return 0; } @@ -153,17 +153,20 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { uint xfertyp; uint irqstat; - volatile struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; - out_be32(&regs->irqstat, -1); + write_reg32(&regs->irqstat, -1); sync(); /* Wait for the bus to be idle */ - while ((in_be32(&regs->prsstat) & PRSSTAT_CICHB) || - (in_be32(&regs->prsstat) & PRSSTAT_CIDHB)); + while ((read_reg32(&regs->prsstat) & PRSSTAT_CICHB) || + (read_reg32(&regs->prsstat) & PRSSTAT_CIDHB)) + ; - while (in_be32(&regs->prsstat) & PRSSTAT_DLA); + while (read_reg32(&regs->prsstat) & PRSSTAT_DLA) + ; /* Wait at least 8 SD clock cycles before the next command */ /* @@ -185,14 +188,15 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) xfertyp = esdhc_xfertyp(cmd, data); /* Send the command */ - out_be32(&regs->cmdarg, cmd->cmdarg); - out_be32(&regs->xfertyp, xfertyp); + write_reg32(&regs->cmdarg, cmd->cmdarg); + write_reg32(&regs->xfertyp, xfertyp); /* Wait for the command to complete */ - while (!(in_be32(&regs->irqstat) & IRQSTAT_CC)); + while (!(read_reg32(&regs->irqstat) & IRQSTAT_CC)) + ; - irqstat = in_be32(&regs->irqstat); - out_be32(&regs->irqstat, irqstat); + irqstat = read_reg32(&regs->irqstat); + write_reg32(&regs->irqstat, irqstat); if (irqstat & CMD_ERR) return COMM_ERR; @@ -204,21 +208,21 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (cmd->resp_type & MMC_RSP_136) { u32 cmdrsp3, cmdrsp2, cmdrsp1, cmdrsp0; - cmdrsp3 = in_be32(&regs->cmdrsp3); - cmdrsp2 = in_be32(&regs->cmdrsp2); - cmdrsp1 = in_be32(&regs->cmdrsp1); - cmdrsp0 = in_be32(&regs->cmdrsp0); + cmdrsp3 = read_reg32(&regs->cmdrsp3); + cmdrsp2 = read_reg32(&regs->cmdrsp2); + cmdrsp1 = read_reg32(&regs->cmdrsp1); + cmdrsp0 = read_reg32(&regs->cmdrsp0); cmd->response[0] = (cmdrsp3 << 8) | (cmdrsp2 >> 24); cmd->response[1] = (cmdrsp2 << 8) | (cmdrsp1 >> 24); cmd->response[2] = (cmdrsp1 << 8) | (cmdrsp0 >> 24); cmd->response[3] = (cmdrsp0 << 8); } else - cmd->response[0] = in_be32(&regs->cmdrsp0); + cmd->response[0] = read_reg32(&regs->cmdrsp0); /* Wait until all of the blocks are transferred */ if (data) { do { - irqstat = in_be32(&regs->irqstat); + irqstat = read_reg32(&regs->irqstat); if (irqstat & DATA_ERR) return COMM_ERR; @@ -226,10 +230,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (irqstat & IRQSTAT_DTOE) return TIMEOUT; } while (!(irqstat & IRQSTAT_TC) && - (in_be32(&regs->prsstat) & PRSSTAT_DLA)); + (read_reg32(&regs->prsstat) & PRSSTAT_DLA)); } - out_be32(&regs->irqstat, -1); + write_reg32(&regs->irqstat, -1); return 0; } @@ -238,9 +242,13 @@ void set_sysctl(struct mmc *mmc, uint clock) { int sdhc_clk = gd->sdhc_clk; int div, pre_div; - volatile struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; uint clk; + if (clock < mmc->f_min) + clock = mmc->f_min; + if (sdhc_clk / 16 > clock) { for (pre_div = 2; pre_div < 256; pre_div *= 2) if ((sdhc_clk / pre_div) <= (clock * 16)) @@ -257,67 +265,100 @@ void set_sysctl(struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); - clrsetbits_be32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk); + /* On imx the clock must be stopped before changing frequency */ + clrbits_reg32(&regs->sysctl, SYSCTL_CKEN); + + clrsetbits_reg32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk); udelay(10000); - setbits_be32(&regs->sysctl, SYSCTL_PEREN); + setbits_reg32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); } static void esdhc_set_ios(struct mmc *mmc) { - struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; /* Set the clock speed */ set_sysctl(mmc, mmc->clock); /* Set the bus width */ - clrbits_be32(&regs->proctl, PROCTL_DTW_4 | PROCTL_DTW_8); + clrbits_reg32(&regs->proctl, PROCTL_DTW_4 | PROCTL_DTW_8); if (mmc->bus_width == 4) - setbits_be32(&regs->proctl, PROCTL_DTW_4); + setbits_reg32(&regs->proctl, PROCTL_DTW_4); else if (mmc->bus_width == 8) - setbits_be32(&regs->proctl, PROCTL_DTW_8); + setbits_reg32(&regs->proctl, PROCTL_DTW_8); + } static int esdhc_init(struct mmc *mmc) { - struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; int timeout = 1000; + int ret = 0; + u8 card_absent; /* Enable cache snooping */ - out_be32(&regs->scr, 0x00000040); + if (cfg && !cfg->no_snoop) + write_reg32(&regs->scr, 0x00000040); - out_be32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); + /* Reset the entire host controller */ + write_reg32(&regs->sysctl, SYSCTL_RSTA); + + /* Wait until the controller is available */ + while ((read_reg32(&regs->sysctl) & SYSCTL_RSTA) && --timeout) + udelay(1000); + + write_reg32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); /* Set the initial clock speed */ set_sysctl(mmc, 400000); /* Disable the BRR and BWR bits in IRQSTAT */ - clrbits_be32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); + clrbits_reg32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); /* Put the PROCTL reg back to the default */ - out_be32(&regs->proctl, PROCTL_INIT); + write_reg32(&regs->proctl, PROCTL_INIT); - while (!(in_be32(&regs->prsstat) & PRSSTAT_CINS) && --timeout) - udelay(1000); + /* Set timout to the maximum value */ + clrsetbits_reg32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); - if (timeout <= 0) - return NO_CARD_ERR; + /* Check if there is a callback for detecting the card */ + if (board_mmc_getcd(&card_absent, mmc)) { + timeout = 1000; + while (!(read_reg32(&regs->prsstat) & PRSSTAT_CINS) && + --timeout) + udelay(1000); - return 0; + if (timeout <= 0) + ret = NO_CARD_ERR; + } else { + if (card_absent) + ret = NO_CARD_ERR; + } + + return ret; } -static int esdhc_initialize(bd_t *bis) +int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) { - struct fsl_esdhc *regs = (struct fsl_esdhc *)CONFIG_SYS_FSL_ESDHC_ADDR; + int sdhc_clk = gd->sdhc_clk; + struct fsl_esdhc *regs; struct mmc *mmc; u32 caps; + if (!cfg) + return -1; + mmc = malloc(sizeof(struct mmc)); sprintf(mmc->name, "FSL_ESDHC"); - mmc->priv = regs; + regs = (struct fsl_esdhc *)cfg->esdhc_base; + + mmc->priv = cfg; mmc->send_cmd = esdhc_send_cmd; mmc->set_ios = esdhc_set_ios; mmc->init = esdhc_init; @@ -337,7 +378,7 @@ static int esdhc_initialize(bd_t *bis) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; mmc->f_min = 400000; - mmc->f_max = MIN(gd->sdhc_clk, 50000000); + mmc->f_max = MIN(sdhc_clk, 50000000); mmc_register(mmc); @@ -346,9 +387,16 @@ static int esdhc_initialize(bd_t *bis) int fsl_esdhc_mmc_init(bd_t *bis) { - return esdhc_initialize(bis); + struct fsl_esdhc_cfg *cfg; + + cfg = malloc(sizeof(struct fsl_esdhc_cfg)); + memset(cfg, 0, sizeof(struct fsl_esdhc_cfg)); + cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR; + printf("HERE NOT!!!\n"); + return fsl_esdhc_initialize(bis, cfg); } +#ifdef CONFIG_OF_LIBFDT void fdt_fixup_esdhc(void *blob, bd_t *bd) { const char *compat = "fsl,esdhc"; @@ -365,3 +413,4 @@ out: do_fixup_by_compat(blob, compat, "status", status, strlen(status) + 1, 1); } +#endif diff --git a/include/asm-arm/global_data.h b/include/asm-arm/global_data.h index 8115a24..02cfe45 100644 --- a/include/asm-arm/global_data.h +++ b/include/asm-arm/global_data.h @@ -44,6 +44,9 @@ typedef struct global_data { #ifdef CONFIG_VFD unsigned char vfd_type; /* display type */ #endif +#ifdef CONFIG_FSL_ESDHC + unsigned long sdhc_clk; +#endif #if 0 unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 89b8304..dc177de 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -32,7 +32,9 @@ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 -#define SYSCTL_CLOCK_MASK 0x00000fff +#define SYSCTL_CLOCK_MASK 0x0000ffff +#define SYSCTL_RSTA 0x01000000 +#define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 @@ -142,8 +144,15 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 +struct fsl_esdhc_cfg { + u32 esdhc_base; + u32 no_snoop; + u32 clk_enable; +}; + #ifdef CONFIG_FSL_ESDHC int fsl_esdhc_mmc_init(bd_t *bis); +int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } diff --git a/lib_arm/board.c b/lib_arm/board.c index e148739..f5660a9 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -243,6 +243,9 @@ init_fnc_t *init_sequence[] = { interrupt_init, /* set up exceptions */ #endif timer_init, /* initialize timer */ +#ifdef CONFIG_FSL_ESDHC + get_clocks, +#endif env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */ -- 1.6.3.3

2 3

[U-Boot] £1,000,000.00 Pounds
by Lottery Board 28 Feb '10

28 Feb '10

Contact Claims agent for your won prize awarded to you by the Lottery Board with your : Names : Address:

1 0

[U-Boot] [PATCH] ep93xx timer: Fix get_ticks() and usecs_to_ticks()
by Matthias Kaehlcke 28 Feb '10

28 Feb '10

ep93xx timer: Make get_ticks() consistent with get_tbclk(), returning a value with CONFIG_SYS_HZ resolution. This fix obsoletes the function clk_to_systicks(), leading to a simplification of the timer code. Further a variable in usecs_to_ticks() is promoted to a 64-bit value, to avoid overflows of intermediate values. Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> Tested-by: Alessandro Rubini <rubini-list(a)gnudd.com> --- cpu/arm920t/ep93xx/timer.c | 83 +++++++++++++++++++------------------------ 1 files changed, 37 insertions(+), 46 deletions(-) diff --git a/cpu/arm920t/ep93xx/timer.c b/cpu/arm920t/ep93xx/timer.c index b1a01a0..c4c1fb0 100644 --- a/cpu/arm920t/ep93xx/timer.c +++ b/cpu/arm920t/ep93xx/timer.c @@ -1,8 +1,7 @@ /* * Cirrus Logic EP93xx timer support. * - * Copyright (C) 2009, 2010 - * Matthias Kaehlcke <matthias(a)kaehlcke.net> + * Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias(a)kaehlcke.net> * * Copyright (C) 2004, 2005 * Cory T. Tusar, Videon Central, Inc., <ctusar(a)videon-central.com> @@ -36,67 +35,55 @@ #define TIMER_CLKSEL (1 << 3) #define TIMER_ENABLE (1 << 7) -#define TIMER_FREQ 508469 +#define TIMER_FREQ 508469 /* ticks / second */ #define TIMER_MAX_VAL 0xFFFFFFFF static struct ep93xx_timer { unsigned long long ticks; - unsigned long last_update; + unsigned long last_read; } timer; -static inline unsigned long clk_to_systicks(unsigned long long clk_ticks) +static inline unsigned long long usecs_to_ticks(unsigned long usecs) { - unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ); - do_div(sys_ticks, TIMER_FREQ); - - return (unsigned long)sys_ticks; -} - -static inline unsigned long usecs_to_ticks(unsigned long usecs) -{ - unsigned long ticks; - - if (usecs >= 1000) { - ticks = usecs / 1000; - ticks *= TIMER_FREQ; - ticks /= 1000; - } else { - ticks = usecs * TIMER_FREQ; - ticks /= (1000 * 1000); - } + unsigned long long ticks = usecs * TIMER_FREQ; + do_div(ticks, 1000 * 1000); return ticks; } -static inline unsigned long read_timer(void) +static inline void read_timer(void) { - struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; + struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE; + const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value); + + if (now >= timer.last_read) + timer.ticks += now - timer.last_read; + else + /* an overflow occurred */ + timer.ticks += TIMER_MAX_VAL - timer.last_read + now; - return TIMER_MAX_VAL - readl(&timer->timer3.value); + timer.last_read = now; } /* - * timer without interrupts + * Get the number of ticks (in CONFIG_SYS_HZ resolution) */ unsigned long long get_ticks(void) { - const unsigned long now = read_timer(); + unsigned long long sys_ticks; - if (now >= timer.last_update) - timer.ticks += now - timer.last_update; - else - /* an overflow occurred */ - timer.ticks += TIMER_MAX_VAL - timer.last_update + now; + read_timer(); - timer.last_update = now; + sys_ticks = timer.ticks * CONFIG_SYS_HZ; + do_div(sys_ticks, TIMER_FREQ); - return timer.ticks; + return sys_ticks; } unsigned long get_timer_masked(void) { - return clk_to_systicks(get_ticks()); + return get_ticks(); } unsigned long get_timer(unsigned long base) @@ -106,7 +93,7 @@ unsigned long get_timer(unsigned long base) void reset_timer_masked(void) { - timer.last_update = read_timer(); + read_timer(); timer.ticks = 0; } @@ -117,25 +104,29 @@ void reset_timer(void) void __udelay(unsigned long usec) { - const unsigned long target = get_ticks() + usecs_to_ticks(usec); + unsigned long long target; + + read_timer(); + + target = timer.ticks + usecs_to_ticks(usec); - while (get_ticks() < target) - /* noop */; + while (timer.ticks < target) + read_timer(); } int timer_init(void) { - struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; + struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE; - /* use timer 3 with 508KHz and free running */ - writel(TIMER_CLKSEL, &timer->timer3.control); + /* use timer 3 with 508KHz and free running, not enabled now */ + writel(TIMER_CLKSEL, &timer_regs->timer3.control); - /* set initial timer value 3 */ - writel(TIMER_MAX_VAL, &timer->timer3.load); + /* set initial timer value */ + writel(TIMER_MAX_VAL, &timer_regs->timer3.load); /* Enable the timer */ writel(TIMER_ENABLE | TIMER_CLKSEL, - &timer->timer3.control); + &timer_regs->timer3.control); reset_timer_masked(); -- 1.6.5

2 2

[U-Boot] ARM Update mach-types
by Tom 28 Feb '10

28 Feb '10

This is a regular update of mach-types Tom Author: Tom Rix <Tom.Rix(a)windriver.com> Date: Thu Feb 25 12:05:32 2010 -0600 ARM Update mach-types Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit aea187c46f7d03ce985e55eb1398d0776a15b928 Signed-off-by: Tom Rix <Tom.Rix(a)windriver.com>

1 0

[U-Boot] [PATCH v2] edb93xx: Fix SDRAM initialization
by Matthias Kaehlcke 28 Feb '10

28 Feb '10

edb93xx: Fix SDRAM initialization by issuing a precharge all command before forcing the precharge and select mode register update mode before programming the mode registers. Write to the SDRAM banks in order to force a precharge, reading causes the edb93xx boards to hang Signed-off-by: Matthias Kaehlcke <matthias(a)kaehlcke.net> --- Changes with with regard to v1: * Fixed order of years in copyright notice board/edb93xx/sdram_cfg.c | 39 +++++++++++++++++++++++++++++++-------- 1 files changed, 31 insertions(+), 8 deletions(-) diff --git a/board/edb93xx/sdram_cfg.c b/board/edb93xx/sdram_cfg.c index 6155f0e..440ad11 100644 --- a/board/edb93xx/sdram_cfg.c +++ b/board/edb93xx/sdram_cfg.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2009 Matthias Kaehlcke <matthias(a)kaehlcke.net> + * Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias(a)kaehlcke.net> * * Copyright (C) 2006 Dominic Rath <Dominic.Rath(a)gmx.de> * @@ -30,9 +30,9 @@ (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank | SDRAM_MODE_REG_VAL)) #define PRECHARGE_BANK(bank) (*(volatile uint32_t *) \ - (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) + (SDRAM_BASE_ADDR | SDRAM_BANK_SEL_##bank)) = 0 -static void force_precharge(void); +static void precharge_all_banks(void); static void setup_refresh_timer(void); static void program_mode_registers(void); @@ -47,7 +47,7 @@ void sdram_cfg(void) early_udelay(200); - force_precharge(); + precharge_all_banks(); setup_refresh_timer(); @@ -57,19 +57,37 @@ void sdram_cfg(void) writel(GLCONFIG_CKE, &sdram->glconfig); } -static void force_precharge(void) +static void precharge_all_banks(void) { + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; + + /* Issue PRECHARGE ALL commands */ + writel(GLCONFIG_INIT | GLCONFIG_CKE, &sdram->glconfig); + /* - * Errata most EP93xx revisions say that PRECHARGE ALL isn't always - * issued. + * Errata of most EP93xx revisions say that PRECHARGE ALL isn't always + * issued * - * Do a read from each bank to make sure they're precharged + * Cirrus proposes a workaround which consists in performing a read from + * each bank to force the precharge. This causes some boards to hang. + * Writing to the SDRAM banks instead of reading has the same + * side-effect (the SDRAM controller issues the necessary precharges), + * but is known to work on all supported boards */ PRECHARGE_BANK(0); + +#if (CONFIG_NR_DRAM_BANKS >= 2) PRECHARGE_BANK(1); +#endif + +#if (CONFIG_NR_DRAM_BANKS >= 3) PRECHARGE_BANK(2); +#endif + +#if (CONFIG_NR_DRAM_BANKS == 4) PRECHARGE_BANK(3); +#endif } static void setup_refresh_timer(void) @@ -101,6 +119,11 @@ static void setup_refresh_timer(void) static void program_mode_registers(void) { + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; + + /* Select mode register update mode */ + writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig); + /* * The mode registers are programmed by performing a read from each * SDRAM bank. The value of the address that is read defines the value -- 1.6.5

2 1

[U-Boot] KAMIO-1251 equipped with AU1250 CPU
by Frédéric SOSSON 28 Feb '10

28 Feb '10

Hello, I'm back with my KAMIO-1251 equipped with AU1250 CPU. I'm still trying to boot Android from SD card using that arch. Is someone thinking it's possible? Any clue for me? kind regards, Frédéric

1 0

[U-Boot] [PATCH 3/4] EHCI: fix port reset reporting
by Sergei Shtylyov 27 Feb '10

27 Feb '10

Commit b416191a14770c6bcc6fd67be7decf8159b2baee (Fix EHCI port reset.) didn't move the code that checked for successful clearing of the port reset bit from ehci_submit_root(), relying on wait_ms() call instead. The mentioned code also erroneously reported port reset state when the reset was already completed. Signed-off-by: Sergei Shtylyov <sshtylyov(a)mvista.com> --- drivers/usb/host/ehci-hcd.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) Index: u-boot/drivers/usb/host/ehci-hcd.c =================================================================== --- u-boot.orig/drivers/usb/host/ehci-hcd.c +++ u-boot/drivers/usb/host/ehci-hcd.c @@ -630,19 +630,8 @@ ehci_submit_root(struct usb_device *dev, tmpbuf[0] |= USB_PORT_STAT_SUSPEND; if (reg & EHCI_PS_OCA) tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; - if (reg & EHCI_PS_PR && - (portreset & (1 << le16_to_cpu(req->index)))) { - int ret; - /* force reset to complete */ - reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR); - ehci_writel(status_reg, reg); - ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000); - if (!ret) - tmpbuf[0] |= USB_PORT_STAT_RESET; - else - printf("port(%d) reset error\n", - le16_to_cpu(req->index) - 1); - } + if (reg & EHCI_PS_PR) + tmpbuf[0] |= USB_PORT_STAT_RESET; if (reg & EHCI_PS_PP) tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; @@ -699,6 +688,8 @@ ehci_submit_root(struct usb_device *dev, ehci_writel(status_reg, reg); break; } else { + int ret; + reg |= EHCI_PS_PR; reg &= ~EHCI_PS_PE; ehci_writel(status_reg, reg); @@ -710,8 +701,19 @@ ehci_submit_root(struct usb_device *dev, wait_ms(50); /* terminate the reset */ ehci_writel(status_reg, reg & ~EHCI_PS_PR); - wait_ms(2); - portreset |= 1 << le16_to_cpu(req->index); + /* + * A host controller must terminate the reset + * and stabilize the state of the port within + * 2 milliseconds + */ + ret = handshake(status_reg, EHCI_PS_PR, 0, + 2 * 1000); + if (!ret) + portreset |= + 1 << le16_to_cpu(req->index); + else + printf("port(%d) reset error\n", + le16_to_cpu(req->index) - 1); } break; default:

1 0

[U-Boot] putting U-boot in Nand flash for Tms320dm6467
by Balaji Sivakumar, ERS, HCLTech 27 Feb '10

27 Feb '10

Hi, We have developed new board with TMS320DM6467, My question here is can I use same the U-boot.bin that came with DM6467 EVM. We are using the RBL supported Nand Device and no change in the memory map. The only I change we are using Nand Flash from different manufacturer Micron. I have got u-boot 1.2.0 folder, but it contains different folders, could anyone explain if I need to change the configurations for my board what are the files I need to look. If I build the code, whether it will generate the binary file or different format. Thanks, - Balaji S DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. -----------------------------------------------------------------------------------------------------------------------

2 2

[U-Boot] boot from ram on rd-6281-a
by Juergen Schindele 27 Feb '10

27 Feb '10

Hello u-boot list i have an Eval-Board RD-6281 from Marvell for which i found u-boot support on latest version "U-Boot 2009.11.1" i need a different bootloader than the one installed. so i tried to develop a private one by loading it to RAM. So i modified the TEXT_BASE = 0x00400000 to not collide with the installed one. But when i load the "u-boot.bin" to the TEXT_BASE via TFTP and enter "go 0x00400000" the system hangs. Can somebody please tell me where I am wrong ??? -------------------------------------------------------------- Jürgen Schindele Software-Entwicklung NENTEC Netzwerktechnologie GmbH Greschbachstr. 12 76229 Karlsruhe Deutschland Telefon: +49 721 94249-51 Telefax: +49 721 94249-10 E-Mail: schindele(a)nentec.de WEB: www.nentec.de Geschäftsführung: Klaus Becker, Roland Knapp Sitz der Gesellschaft: Karlsruhe Handelsregister: Amtsgericht Mannheim HRB 107658 Diese E-Mail enthält vertrauliche oder rechtlich geschützte Informationen. Wenn Sie nicht der vorgesehene Empfänger sind, informieren Sie bitte sofort den Absender und löschen Sie diese E-Mail. Das unbefugte Kopieren dieser E-Mail oder die unbefugte Weitergabe der enthaltenen Informationen ist nicht gestattet. The information contained in this message is confidential or protected by law. If you are not the intended recipient, please contact the sender and delete this message. Any unauthorised copying of this message or unauthorised distribution of the information contained herein is prohibited. --------------------------------------------------------------

4 5

[U-Boot] Veterinarians - 78, 986 total records with 1, 438 emails and 1, 050 fax numbers
by Butts _ Nell 26 Feb '10

26 Feb '10

Email me at this address for a catalog of all our US lists: Alton.Elliot(a)xxcvbgre.Co.CC Also, ask about our sale pricing for more than one list. By emailing rembox(a)xxcvbgre.Co.CC you will have your email taken off

1 0

[U-Boot] [PATCH 0/5] i2c patches. Again!
by Frans Meulenbroeks 26 Feb '10

26 Feb '10

Below are my i2c patches again, (and the bootm one but that is pretty minor) Now decently numbered and with the remarks of Heiko applied. Thanks go to - Heiko for the comments - Eric and Wolfgang for teaching me a little bit more git (btw: what happend to sccs? :-) ) - everyone for having patience with me while I am struggling to submit patches in a proper way. I have a few more things I'm working on, but would like to see feedback or at least acks for these, so I avoid a lot of rework because something in this patches is not considered proper. (I saw some code in i2c that can be refactored; also might implement subcommand handling in a few other files). Have fun, Frans. Frans Meulenbroeks (5): cmd_i2c.c: reduced subaddress length to 3 bytes cmd_bootm.c: made subcommand array static cmd_i2c.c: reworked subcommand handling cmd_i2c.c: sorted commands alphabetically cmd_i2c.c: added i2c read to memory function common/cmd_bootm.c | 2 +- common/cmd_i2c.c | 160 +++++++++++++++++++++++++++++++++++++--------------- 2 files changed, 116 insertions(+), 46 deletions(-)

2 8

[U-Boot] [PATCH 7/7] cmd_setexpr: allow memory addresses and env vars in expressions
by Frans Meulenbroeks 26 Feb '10

26 Feb '10

This patch add functionality to use memory addresses and environment variables in expressions. This increases the power of expressions substantially It adheres to the standard convemtions: memory addresses can be given in the format *address (e.g. *1000), environment variables as $this_var. environment variables are not processed recursively but can contain both constants and memory addresses. Rationale for this change is that it allows masking off bits from a byte that is obtained by reading data from e.g. i2c. Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks(a)gmail.com> --- If recursive environment vars is desired: this can be added easily by changing the if statement into a while statement. I figured that would be somewhat over the top though (and, unless you take special precautions you can run into an endless loop if an env var contains its own name. If it is desired, please let me know and I happily will add it. And a snippet from the test log: => mm.b 1000 00001000: de ? 12 00001001: ad ? 34 00001002: be ? 56 00001003: ef ? 78 00001004: de ? 00001005: ad ? . => setexpr aap 3 + *1000 => echo $aap 1234567b => setexpr.b aap 3 + *1000 => echo $aap 15 => setexpr.w nut $aap + *1000 => echo $nut 1249 --- common/cmd_setexpr.c | 33 +++++++++++++++++++++++++++++---- 1 files changed, 29 insertions(+), 4 deletions(-) diff --git a/common/cmd_setexpr.c b/common/cmd_setexpr.c index f8b5d4d..6ea9296 100644 --- a/common/cmd_setexpr.c +++ b/common/cmd_setexpr.c @@ -28,10 +28,32 @@ #include <config.h> #include <command.h> +static ulong get_arg(char *s, int w) +{ + ulong *p; + + /* if the parameter starts with a $ replace it with the environment value */ + if (s[0] == '$') { + s = getenv(&s[1]); + } + /* if the parameter starts with a * then assume is a pointer to the value we want */ + if (s[0] == '*') { + p = (ulong *)simple_strtoul(&s[1], NULL, 16); + switch (w) { + case 1: return((ulong)(*(uchar *)p)); + case 2: return((ulong)(*(ushort *)p)); + case 4: return(*p); + } + } else { + return simple_strtoul(s, NULL, 16); + } +} + int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong a, b; char buf[16]; + int w; /* Validate arguments */ if ((argc != 5) || (strlen(argv[3]) != 1)) { @@ -39,8 +61,10 @@ int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } - a = simple_strtoul(argv[2], NULL, 16); - b = simple_strtoul(argv[4], NULL, 16); + w = cmd_get_data_size(argv[0], 4); + + a = get_arg(argv[2], w); + b = get_arg(argv[4], w); switch (argv[3][0]) { case '|': sprintf(buf, "%lx", (a | b)); break; @@ -64,7 +88,8 @@ int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) U_BOOT_CMD( setexpr, 5, 0, do_setexpr, "set environment variable as the result of eval expression", - "name value1 <op> value2\n" + "[.b, .w, .l] name value1 <op> value2\n" " - set environment variable 'name' to the result of the evaluated\n" - " express specified by <op>. <op> can be &, |, ^, +, -, *, /, %" + " express specified by <op>. <op> can be &, |, ^, +, -, *, /, %\n" + " size argument is only meaningful if value1 and/or value2 are memory addresses" ); -- 1.7.0

2 4

[U-Boot] [PATCH] cmd_itest.c: also support environment variables as arguments
by Frans Meulenbroeks 26 Feb '10

26 Feb '10

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks(a)gmail.com> --- common/cmd_itest.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/common/cmd_itest.c b/common/cmd_itest.c index 58c5e7b..78a4082 100644 --- a/common/cmd_itest.c +++ b/common/cmd_itest.c @@ -69,6 +69,10 @@ static long evalexp(char *s, int w) long l = 0; long *p; + /* if the parameter starts with a $ replace it with the environment value */ + if (s[0] == '$') { + s = getenv(&s[1]); + } /* if the parameter starts with a * then assume is a pointer to the value we want */ if (s[0] == '*') { p = (long *)simple_strtoul(&s[1], NULL, 16); @@ -86,6 +90,10 @@ static long evalexp(char *s, int w) static char * evalstr(char *s) { + /* if the parameter starts with a $ replace it with the environment value */ + if (s[0] == '$') { + s = getenv(&s[1]); + } /* if the parameter starts with a * then assume a string pointer else its a literal */ if (s[0] == '*') { return (char *)simple_strtoul(&s[1], NULL, 16); -- 1.5.4.3

3 2

[U-Boot] MPC8548 based board Hanging at different conditions
by Ravi Prakash Reddy M 26 Feb '10

26 Feb '10

Dear All, we are using MPC8548 based custom board, with DDR2 memory. we have successfully ported U-boot 1.3.1 and linux 2.6.19. but sometimes the board is hanging at the following conditions - afer relocating to RAM U-Boot 1.3.1 (Aug 21 2009 - 16:42:56) CPU: 8548_E, Version: 2.1, (0x80390021) Core: E500, Version: 2.2, (0x80210022) Clock Configuration: CPU:1056 MHz, CCB: 528 MHz, DDR: 264 MHz, LBC: 66 MHz L1: D-cache 32 kB enabled I-cache 32 kB enabled Board: CDS Version 0xf8, PCI Slot 4 CPU Board Revision 255.248 (0xfff8) I2C: ready DRAM: Initializing SDRAM: 64 MB DDR: 1024 MB HANG.... - sometime it will boot u-boot, HANG while executing u-boot commands - sometime booting Linux, HANG while running some applications in linux what could be the reason, can anyboby explain thank you mrp Confidentiality Notice The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain confidential or privileged information. If you are not the intended recipient, please notify the sender at Bharat Electronics or support(a)bel.co.in immediately and destroy all copies of this message and any attachments.

2 1

[U-Boot] [PATCH 2/3 v6] S5PC100: Function to configure the SROMC registers.
by ch.naveen＠samsung.com 26 Feb '10

26 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Nand Flash, Ethernet, other features might need to configure the SROMC registers accordingly. The config_sromc() functions helps with this. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc(). Comments from Minkyu Kang are fixed Changes since V2: 1.cpu_is_s5pc100() function is used instead of Macros. Changes since V3: 1. Comments from Minkyu Kang are fixed. Changes since V4: None Changes since V5: None cpu/arm_cortexa8/s5pc1xx/Makefile | 1 + cpu/arm_cortexa8/s5pc1xx/sromc.c | 53 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-s5pc1xx/smc.h | 3 ++ 3 files changed, 57 insertions(+), 0 deletions(-) create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/cpu/arm_cortexa8/s5pc1xx/Makefile index 7290c2f..01c93fe 100644 --- a/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile @@ -34,6 +34,7 @@ SOBJS += reset.o COBJS += clock.o COBJS += cpu_info.o COBJS += gpio.o +COBJS += sromc.o COBJS += timer.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c new file mode 100644 index 0000000..380be81 --- /dev/null +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Naveen Krishna Ch <ch.naveen(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> + +/* + * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the + * band width control and bank control registers + * srom_bank - SROM Bank 0 to 5 + * smc_bw_conf - SMC Band witdh reg configuration value + * smc_bc_conf - SMC Bank Control reg configuration value + */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf) +{ + u32 tmp; + struct s5pc1xx_smc *srom; + + if (cpu_is_s5pc100()) + srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE; + else + srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE; + + /* Configure SMC_BW register to handle proper SROMC bank */ + tmp = srom->bw; + tmp &= ~(0xF << (srom_bank * 4)); + tmp |= smc_bw_conf; + srom->bw = tmp; + + /* Configure SMC_BC register */ + srom->bc[srom_bank] = smc_bc_conf; +} diff --git a/include/asm-arm/arch-s5pc1xx/smc.h b/include/asm-arm/arch-s5pc1xx/smc.h index e1a5399..88f4ffe 100644 --- a/include/asm-arm/arch-s5pc1xx/smc.h +++ b/include/asm-arm/arch-s5pc1xx/smc.h @@ -47,4 +47,7 @@ struct s5pc1xx_smc { }; #endif /* __ASSEMBLY__ */ +/* Configure the Band Width and Bank Control Regs for required SROMC Bank */ +void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf); + #endif /* __ASM_ARCH_SMC_H_ */ -- 1.6.6

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[U-Boot] [PATCH 1/3 v6] S5PC100: Memory SubSystem Header file, register description(SROMC).
by ch.naveen＠samsung.com 26 Feb '10

26 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand, NAND Flash, DDRs. smc.h is a common place for the register description of Memory subsystem of S5PC100. Note: Only SROM related registers are descibed now. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. The header file is renamed to smc.h from smc.h 2. The Macros are renamed according to TRM. Comments from Minkyu kang are fixed. Changes since V2: 1. Macros have been modified to be generic. Comments from Minkyu kang are fixed Changes since V3: 1. No Changes. Changes since v4: 1. The header file name int he Description was changed. Changes since V5: 1. No Changes. include/asm-arm/arch-s5pc1xx/smc.h | 50 ++++++++++++++++++++++++++++++++++++ 1 files changed, 50 insertions(+), 0 deletions(-) create mode 100644 include/asm-arm/arch-s5pc1xx/smc.h diff --git a/include/asm-arm/arch-s5pc1xx/smc.h b/include/asm-arm/arch-s5pc1xx/smc.h new file mode 100644 index 0000000..e1a5399 --- /dev/null +++ b/include/asm-arm/arch-s5pc1xx/smc.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2010 Samsung Electronics + * Naveen Krishna Ch <ch.naveen(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Note: This file contains the register description for Memory subsystem + * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX. + * + * Only SROMC is defined as of now + */ + +#ifndef __ASM_ARCH_SMC_H_ +#define __ASM_ARCH_SMC_H_ + +#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0)) +#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/ + /* 1-> Byte base address*/ +#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2)) +#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3)) + +#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */ +#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */ +#define SMC_BC_TACC(x) (x << 16) /* 14clk access cycle */ +#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */ +#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */ +#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */ +#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */ + +#ifndef __ASSEMBLY__ +struct s5pc1xx_smc { + unsigned int bw; + unsigned int bc[6]; +}; +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ARCH_SMC_H_ */ -- 1.6.6

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[U-Boot] [PATCH 3/3 v5] SAMSUNG: SMDKC100: Adds ethernet support.
by ch.naveen＠samsung.com 26 Feb '10

26 Feb '10

From: Naveen Krishna CH <ch.naveen(a)samsung.com> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be loaded over tftp. The preinit function will configure GPIO (GPK0CON) & SROMC to look for environment in SROM Bank 3. Signed-off-by: Naveen Krishna Ch <ch.naveen(a)samsung.com> --- Changes since V1: 1. The CONFIG_BOOTP* and Net config Macros are removed from config header. Comments from Ben Warren are fixed 2. The GPIO configuration is modified & Macro and Function are renamed. Comments from Minkyu Kang are fixedChanges since V2 Changes since V2: 1. GPIO configurations function has been implemented. Changes since V3: 1. Comments from Minkyu Kang are fixed. Changes since V4: None board/samsung/smdkc100/smdkc100.c | 39 +++++++++++++++++++++++++++++++++++++ include/configs/smdkc100.h | 12 ++++++++++- 2 files changed, 50 insertions(+), 1 deletions(-) diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 15a1a27..4fc802e 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -23,10 +23,40 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/arch/smc.h> +#include <asm/arch/gpio.h> + DECLARE_GLOBAL_DATA_PTR; +/* + * Miscellaneous platform dependent initialisations + */ +static void smc9115_pre_init(void) +{ + u32 tmp; + u32 smc_bw_conf, smc_bc_conf; + + struct s5pc100_gpio *const gpio = + (struct s5pc100_gpio *)S5PC100_GPIO_BASE; + + /* gpio configuration GPK0CON */ + gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + + /* Ethernet needs bus width of 16 bits */ + smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); + smc_bc_conf = SMC_BC_TACS(0x0) | SMC_BC_TCOS(0x4) | SMC_BC_TACC(0xe) + | SMC_BC_TCOH(0x1) | SMC_BC_TAH(0x4) + | SMC_BC_TACP(0x6) | SMC_BC_PMC(0x0); + + /* Select and configure the SROMC bank */ + s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf); +} + int board_init(void) { + smc9115_pre_init(); + gd->bd->bi_arch_number = MACH_TYPE_SMDKC100; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -49,3 +79,12 @@ int checkboard(void) return 0; } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index f12fea3..c8abad6 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -83,7 +83,6 @@ #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NET #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO @@ -235,4 +234,15 @@ #define CONFIG_DOS_PARTITION 1 +/* + * Ethernet Contoller driver + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ +#define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ +#endif /* CONFIG_CMD_NET */ + #endif /* __CONFIG_H */ -- 1.6.6

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[U-Boot] Where can I find the git repostory for mx51evk
by Lv Terry-R65388 26 Feb '10

26 Feb '10

Hi Denx, I have cloned u-boot-imx and want to apply the patch "[U-Boot] [PATCH V4 11/11] Add initial support for Freescale mx51evk board" for a test. But the patch can't be appled. error: patch failed: MAINTAINERS:152 error: MAINTAINERS: patch does not apply How can I get the repostory for mx51evk? Thanks~~ Yours Terry General Business Information Freescale Internal Use Only Freescale Confidential Proprietary

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