December 2010 - U-Boot

[U-Boot] [PATCH] DaVinci Sonata: Fix Build Error
by s-paulraj＠ti.com 29 Dec '10

29 Dec '10

From: Sandeep Paulraj <s-paulraj(a)ti.com> Fix a build error in the DaVinci Sonata Board Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> --- include/configs/davinci_sonata.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index ebfdafa..2336129 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -139,6 +139,7 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2) +#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ #define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ #define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ -- 1.6.0.4

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[U-Boot] [PATCH] DaVinci DM6467: Fix Build Error
by s-paulraj＠ti.com 29 Dec '10

29 Dec '10

From: Sandeep Paulraj <s-paulraj(a)ti.com> This commit fixes build errors on the DM6467 port. Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> --- arch/arm/cpu/arm926ejs/davinci/cpu.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c index fc3551c..340c5be 100644 --- a/arch/arm/cpu/arm926ejs/davinci/cpu.c +++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c @@ -60,6 +60,12 @@ #define DDR_PLLDIV PLLC_PLLDIV1 #endif +#ifdef CONFIG_SOC_DM646X +#define DSP_PLLDIV PLLC_PLLDIV1 +#define ARM_PLLDIV PLLC_PLLDIV2 +#define DDR_PLLDIV PLLC_PLLDIV1 +#endif + #ifdef CONFIG_SOC_DA8XX const dv_reg * const sysdiv[7] = { &davinci_pllc_regs->plldiv1, &davinci_pllc_regs->plldiv2, @@ -145,7 +151,11 @@ static inline unsigned pll_postdiv(volatile void *pllbase) static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) { volatile void *pllbase = (volatile void *) pll_addr; +#ifdef CONFIG_SOC_DM646X + unsigned base = CFG_REFCLK_FREQ / 1000; +#else unsigned base = CONFIG_SYS_HZ_CLOCK / 1000; +#endif /* the PLL might be bypassed */ if (REG(pllbase + PLLC_PLLCTL) & BIT(0)) { @@ -176,6 +186,12 @@ int print_cpuinfo(void) return 0; } +#ifdef DAVINCI_DM6467EVM +unsigned int davinci_arm_clk_get() +{ + return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; +} +#endif #endif /* -- 1.6.0.4

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[U-Boot] [PATCH v2] pci_ftpci100: Implementation FTPCI100 PCI driver
by Gavin Guo 29 Dec '10

29 Dec '10

FTPCI100 is a SoC PCI componenet of Faraday company. Which is usually built into SoC chips for providing embedded PCI functions. Signed-off-by: Gavin Guo <gavinguo(a)andestech.com> --- Change v2: add Makefile into this patch. drivers/pci/Makefile | 1 + drivers/pci/pci_ftpci100.c | 282 ++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci_ftpci100.h | 117 ++++++++++++++++++ 3 files changed, 400 insertions(+), 0 deletions(-) create mode 100644 drivers/pci/pci_ftpci100.c create mode 100644 drivers/pci/pci_ftpci100.h diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index ee0c64d..1ae35d3 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libpci.o COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o COBJS-$(CONFIG_PCI) += pci.o pci_auto.o pci_indirect.o +COBJS-$(CONFIG_FTPCI100) += pci_ftpci100.o COBJS-$(CONFIG_IXP_PCI) += pci_ixp.o COBJS-$(CONFIG_SH4_PCI) += pci_sh4.o COBJS-$(CONFIG_SH7751_PCI) +=pci_sh7751.o diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c new file mode 100644 index 0000000..4c534c2 --- /dev/null +++ b/drivers/pci/pci_ftpci100.c @@ -0,0 +1,282 @@ +/* + * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation + * + * Copyright (C) 2010 Andes Technology Corporation + * Gavin Guo, Andes Technology Corporation <gavinguo(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __io +#define __io +#endif + +#include <asm/io.h> +#include <asm/types.h> /* u32, u16.... used by pci.h */ +#include <common.h> +#include <pci.h> +#include "pci_ftpci100.h" + +int ftpci_probed; +struct pci_controller hose; +static unsigned int pci_config_addr; +static unsigned int pci_config_data; +static unsigned int mmio_base; +static unsigned int io_base; +static unsigned int mem_base; +unsigned int ndevices; +unsigned int nmbars; +unsigned int niobars; + +struct pci_config devices[FTPCI100_MAX_FUNCTIONS]; + +void setup_pci_bar (unsigned int bus, unsigned int dev, unsigned func, + unsigned char header) +{ + unsigned int i, tmp32, bar_no, iovsmem = 1; + pci_dev_t dev_nu; + + /* A device is present, add an entry to the array */ + devices[ndevices].bus = bus; + devices[ndevices].device = dev; + devices[ndevices].func = func; + + dev_nu = PCI_BDF(bus, dev, func); + + if ((header & 0x7f) == 0x01) + /* PCI-PCI Bridge */ + bar_no = 2; + else + bar_no = 6; + /* Allocate address spaces by configuring BARs */ + for (i = 0; i < bar_no; i++) { + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, 0xffffffff); + pci_hose_read_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, &tmp32); + + if (tmp32 == 0x0) + continue; + + /* IO space */ + if (tmp32 & 0x1) { + iovsmem = 0; + unsigned int size_mask = ~(tmp32 & 0xfffffffc); + + if (io_base & size_mask) + io_base = (io_base & ~size_mask) + size_mask + 1; + + devices[ndevices].bar[i].address = io_base; + devices[ndevices].bar[i].size = size_mask + 1; + + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, io_base); +#ifdef CONFIG_FTPCI100_DEBUG + printf ("Allocated IO address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + io_base, io_base + size_mask, bus, dev, func); +#endif + io_base += size_mask + 1; + } + /* Memory space */ + else { + unsigned int is_64bit = ((tmp32 & 0x6) == 0x4); + unsigned int is_pref = tmp32 & 0x8; + unsigned int size_mask = ~(tmp32 & 0xfffffff0); + unsigned int alloc_base; + unsigned int *addr_mem_base; + + if (is_pref) { + addr_mem_base = &mem_base; + } else { + addr_mem_base = &mmio_base; + } + + alloc_base = *addr_mem_base; + + if (alloc_base & size_mask) + alloc_base = (alloc_base & ~size_mask) + size_mask + 1; + + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, alloc_base); +#ifdef CONFIG_FTPCI100_DEBUG + printf ("Allocated %s address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + is_pref ? "MEM" : "MMIO", alloc_base, + alloc_base + size_mask, bus, dev, func); +#endif + + devices[ndevices].bar[i].address = alloc_base; + devices[ndevices].bar[i].size = size_mask + 1; +#ifdef CONFIG_FTPCI100_DEBUG + printf ("BAR address BAR size\n"); + printf ("%010x %08d\n", + devices[ndevices].bar[0].address, + devices[ndevices].bar[0].size); +#endif + alloc_base += size_mask + 1; + *addr_mem_base = alloc_base; + + if (is_64bit) { + i++; + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, 0x0); + } + } + } + + /* Enable Bus Master, Memory Space, and IO Space */ + pci_hose_read_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32); + pci_hose_write_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_read_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32); + + pci_hose_read_config_dword (&hose, dev_nu, PCI_COMMAND, &tmp32); + + tmp32 &= 0xffff; + if (iovsmem == 0) + tmp32 |= 0x5; + else + tmp32 |= 0x6; + + pci_hose_write_config_dword (&hose, dev_nu, PCI_COMMAND, tmp32); +} + +void pci_bus_scan (void) +{ + unsigned int bus, dev, func; + pci_dev_t dev_nu; + unsigned int data32, membase; + unsigned char header; + unsigned char intPin; + + ndevices = 1; + + nmbars = 0; + niobars = 0; + + for (bus = 0; bus < MAX_BUS_NUM; bus++) + for (dev = 0; dev < MAX_DEV_NUM; dev++) + for (func = 0; func < MAX_FUN_NUM; func++) { + dev_nu = PCI_BDF(bus, dev, func); + pci_hose_read_config_dword (&hose, dev_nu, + PCI_VENDOR_ID, &data32); + + /* + * some broken boards return 0 or ~0, + * if a slot is empty. + */ + if (data32 == 0xffffffff || data32 == 0x00000000 || + data32 == 0x0000ffff || data32 == 0xffff0000) + continue; + + pci_hose_read_config_dword (&hose, dev_nu, PCI_HEADER_TYPE, &header); + setup_pci_bar (bus, dev, func, header); + + devices[ndevices].vendor_id = (unsigned short)(data32 & 0x0000ffff); + + devices[ndevices].device_id = (unsigned short)((data32 & 0xffff0000) >> 16); + + /* Figure out what INTX# line the card uses */ + pci_hose_read_config_byte (&hose, dev_nu, + PCI_INTERRUPT_PIN, &intPin); + + /* assign the appropriate irq line */ + if (intPin > PCI_IRQ_LINES) { + printf ("more irq lines than expect\n"); + } else if (intPin != 0) { + /* This device uses an interrupt line */ + devices[ndevices].pin = intPin; + } + + pci_hose_read_config_dword (&hose, dev_nu, + PCI_CLASS_DEVICE, &data32); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf ("%06d %03d %03d " \ + "%04d %08x %08x " \ + "%03d %08x %06d %08x\n", + ndevices, devices[ndevices].bus, devices[ndevices].device, + devices[ndevices].func, devices[ndevices].device_id, devices[ndevices].vendor_id, + devices[ndevices].pin, devices[ndevices].bar[0].address, + devices[ndevices].bar[0].size, data32 >> 8); + ndevices++; +#endif + + } +} + +static int ftpci_probe (unsigned int addr_p) +{ + unsigned int *addr = (unsigned int *) addr_p; + *(volatile unsigned int *) addr = 0x80000000; + + if (*(volatile unsigned int *) addr == 0x80000000) { + printf ("Faraday ftpci100 PCI bridge probed ok\n"); + ftpci_probed = 1; + } else + ftpci_probed = 0; + + *(volatile unsigned int *) addr = 0x0; + return ftpci_probed; +} + +void ftpci_preinit () +{ + printf ("ftpci_preinit()\n\r"); + + pci_config_addr = CONFIG_FTPCI100_BASE + FTPCI100_CFG_ADR_REG; + pci_config_data = CONFIG_FTPCI100_BASE + FTPCI100_CFG_DATA_REG; + printf ("Config addr is %08X, data port is %08X\n", + (int) pci_config_addr, (int) pci_config_data); + + io_base = CONFIG_FTPCI100_BASE + CONFIG_FTPCI100_IO_SIZE; + mmio_base = CONFIG_FTPCI100_MEM_BASE; + mem_base = CONFIG_FTPCI100_MEM_BASE + CONFIG_FTPCI100_MEM_SIZE; + pci_setup_indirect(&hose, pci_config_addr, pci_config_data); + pci_register_hose(&hose); + + if (!ftpci_probe(pci_config_addr)) + return; +} + +void pci_ftpci_init () +{ + struct pci_device_id bridge_ids[] = { + {FTPCI100_BRIDGE_VENDORID, FTPCI100_BRIDGE_DEVICEID}, + {0, 0} + }; + pci_dev_t bridge_num; + + ftpci_preinit (); +#ifdef CONFIG_PCI_SCAN_SHOW + printf ("Device bus dev func deviceID vendorID pin address" \ + " size class\n"); +#endif + pci_bus_scan (); + + /* + * Setup the PCI Bridge Window to 1GB, + * it will cause USB OHCI Host controller Unrecoverable Error + * if it is not set. + */ + bridge_num = pci_find_devices (bridge_ids, 0); + if (bridge_num == -1) { + printf("PCI Bridge not found\n"); + return; + } + pci_hose_write_config_dword (&hose, bridge_num, PCI_MEM_BASE_SIZE1, + FTPCI100_WINDOW_BASE_ADR_SIZE_1GB); + return; +} diff --git a/drivers/pci/pci_ftpci100.h b/drivers/pci/pci_ftpci100.h new file mode 100644 index 0000000..7bb056d --- /dev/null +++ b/drivers/pci/pci_ftpci100.h @@ -0,0 +1,117 @@ +/* + * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation + * + * Copyright (C) 2010 Andes Technology Corporation + * Gavin Guo, Andes Technology Corporation <gavinguo(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __FTPCI100_H +#define __FTPCI100_H + +#define FTPCI100_IOSIZE_REG 0x0 +#define FTPCI100_PROT_REG 0x4 +#define FTPCI100_CTRL_REG 0x8 +#define FTPCI100_ERREN_REG 0xc +#define FTPCI100_SOFTRST_REG 0x10 +#define FTPCI100_EN64_REG 0x14 +#define FTPCI100_ADDRH32_REG 0x18 +#define FTPCI100_CFG_ADR_REG 0x28 +#define FTPCI100_CFG_DATA_REG 0x2c + +/* + * FTPCI100_IOSIZE_REG's constant definitions + */ +#define FTPCI100_BASE_IO_SIZE_1M 0x0 +#define FTPCI100_BASE_IO_SIZE_2M 0x1 +#define FTPCI100_BASE_IO_SIZE_4M 0x2 +#define FTPCI100_BASE_IO_SIZE_8M 0x3 +#define FTPCI100_BASE_IO_SIZE_17M 0x4 +#define FTPCI100_BASE_IO_SIZE_32M 0x5 +#define FTPCI100_BASE_IO_SIZE_64M 0x6 +#define FTPCI100_BASE_IO_SIZE_128M 0x7 +#define FTPCI100_BASE_IO_SIZE_256M 0x8 +#define FTPCI100_BASE_IO_SIZE_512M 0x9 +#define FTPCI100_BASE_IO_SIZE_1G 0xa +#define FTPCI100_BASE_IO_SIZE_2G 0xb + +/* + * PCI Configuration Register + */ +#define PCI_INT_MASK 0x4c +#define PCI_MEM_BASE_SIZE1 0x50 +#define PCI_MEM_BASE_SIZE2 0x54 +#define PCI_MEM_BASE_SIZE3 0x58 + +/* + * PCI_INT_MASK's bit definitions + */ +#define PCI_INTA_ENABLE (1U<<22) +#define PCI_INTB_ENABLE (1U<<23) +#define PCI_INTC_ENABLE (1U<<24) +#define PCI_INTD_ENABLE (1U<<25) + +/* + * PCI_MEM_BASE_SIZE1's constant definitions + */ +#define FTPCI100_BASE_ADR_SIZE_1MB (PHYS_OFFSET | (0x0<<16)) +#define FTPCI100_BASE_ADR_SIZE_2MB (PHYS_OFFSET | (0x1<<16)) +#define FTPCI100_BASE_ADR_SIZE_4MB (PHYS_OFFSET | (0x2<<16)) +#define FTPCI100_BASE_ADR_SIZE_8MB (PHYS_OFFSET | (0x3<<16)) +#define FTPCI100_BASE_ADR_SIZE_16MB (PHYS_OFFSET | (0x4<<16)) +#define FTPCI100_BASE_ADR_SIZE_32MB (PHYS_OFFSET | (0x5<<16)) +#define FTPCI100_BASE_ADR_SIZE_64MB (PHYS_OFFSET | (0x6<<16)) +#define FTPCI100_BASE_ADR_SIZE_128MB (PHYS_OFFSET | (0x7<<16)) +#define FTPCI100_BASE_ADR_SIZE_256MB (PHYS_OFFSET | (0x8<<16)) +#define FTPCI100_BASE_ADR_SIZE_512MB (PHYS_OFFSET | (0x9<<16)) +#define FTPCI100_BASE_ADR_SIZE_1GB (PHYS_OFFSET | (0xa<<16)) +#define FTPCI100_BASE_ADR_SIZE_2GB (PHYS_OFFSET | (0xb<<16)) + +#define FTPCI100_MAX_FUNCTIONS 20 +#define PCI_IRQ_LINES 4 + +#define MAX_BUS_NUM 256 +#define MAX_DEV_NUM 32 +#define MAX_FUN_NUM 8 + +#define PCI_MAX_BAR_PER_FUNC 6 + +/* This is quick reference for io and mem size */ +#define FTPCI100_SIZE_256 (1 << 8) /* 0x00000100 */ +#define FTPCI100_SIZE_128M (1 << 27) /* 0x08000000 */ + +/* This definition is used by pci_ftpci_init() */ +#define FTPCI100_BRIDGE_VENDORID 0x159b +#define FTPCI100_BRIDGE_DEVICEID 0x4321 +#define FTPCI100_WINDOW_BASE_ADR_SIZE_1GB (0x0 | (0xa<<16)) + +struct pcibar { + unsigned int size; + unsigned int address; +}; + +struct pci_config { + unsigned int bus; + unsigned int device; + unsigned int func; + unsigned int pin; + unsigned short vendor_id; + unsigned short device_id; + struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1]; +}; + +#endif -- 1.7.3.2

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[U-Boot] [PATCH] pci_ftpci100: Implementation FTPCI100 PCI driver
by Gavin Guo 29 Dec '10

29 Dec '10

FTPCI100 is a SoC PCI componenet of Faraday company. Which is usually built into SoC chips for providing embedded PCI functions. Signed-off-by: Gavin Guo <gavinguo(a)andestech.com> --- drivers/pci/pci_ftpci100.c | 282 ++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci_ftpci100.h | 117 ++++++++++++++++++ 2 files changed, 399 insertions(+), 0 deletions(-) create mode 100644 drivers/pci/pci_ftpci100.c create mode 100644 drivers/pci/pci_ftpci100.h diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c new file mode 100644 index 0000000..4c534c2 --- /dev/null +++ b/drivers/pci/pci_ftpci100.c @@ -0,0 +1,282 @@ +/* + * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation + * + * Copyright (C) 2010 Andes Technology Corporation + * Gavin Guo, Andes Technology Corporation <gavinguo(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __io +#define __io +#endif + +#include <asm/io.h> +#include <asm/types.h> /* u32, u16.... used by pci.h */ +#include <common.h> +#include <pci.h> +#include "pci_ftpci100.h" + +int ftpci_probed; +struct pci_controller hose; +static unsigned int pci_config_addr; +static unsigned int pci_config_data; +static unsigned int mmio_base; +static unsigned int io_base; +static unsigned int mem_base; +unsigned int ndevices; +unsigned int nmbars; +unsigned int niobars; + +struct pci_config devices[FTPCI100_MAX_FUNCTIONS]; + +void setup_pci_bar (unsigned int bus, unsigned int dev, unsigned func, + unsigned char header) +{ + unsigned int i, tmp32, bar_no, iovsmem = 1; + pci_dev_t dev_nu; + + /* A device is present, add an entry to the array */ + devices[ndevices].bus = bus; + devices[ndevices].device = dev; + devices[ndevices].func = func; + + dev_nu = PCI_BDF(bus, dev, func); + + if ((header & 0x7f) == 0x01) + /* PCI-PCI Bridge */ + bar_no = 2; + else + bar_no = 6; + /* Allocate address spaces by configuring BARs */ + for (i = 0; i < bar_no; i++) { + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, 0xffffffff); + pci_hose_read_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, &tmp32); + + if (tmp32 == 0x0) + continue; + + /* IO space */ + if (tmp32 & 0x1) { + iovsmem = 0; + unsigned int size_mask = ~(tmp32 & 0xfffffffc); + + if (io_base & size_mask) + io_base = (io_base & ~size_mask) + size_mask + 1; + + devices[ndevices].bar[i].address = io_base; + devices[ndevices].bar[i].size = size_mask + 1; + + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, io_base); +#ifdef CONFIG_FTPCI100_DEBUG + printf ("Allocated IO address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + io_base, io_base + size_mask, bus, dev, func); +#endif + io_base += size_mask + 1; + } + /* Memory space */ + else { + unsigned int is_64bit = ((tmp32 & 0x6) == 0x4); + unsigned int is_pref = tmp32 & 0x8; + unsigned int size_mask = ~(tmp32 & 0xfffffff0); + unsigned int alloc_base; + unsigned int *addr_mem_base; + + if (is_pref) { + addr_mem_base = &mem_base; + } else { + addr_mem_base = &mmio_base; + } + + alloc_base = *addr_mem_base; + + if (alloc_base & size_mask) + alloc_base = (alloc_base & ~size_mask) + size_mask + 1; + + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, alloc_base); +#ifdef CONFIG_FTPCI100_DEBUG + printf ("Allocated %s address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + is_pref ? "MEM" : "MMIO", alloc_base, + alloc_base + size_mask, bus, dev, func); +#endif + + devices[ndevices].bar[i].address = alloc_base; + devices[ndevices].bar[i].size = size_mask + 1; +#ifdef CONFIG_FTPCI100_DEBUG + printf ("BAR address BAR size\n"); + printf ("%010x %08d\n", + devices[ndevices].bar[0].address, + devices[ndevices].bar[0].size); +#endif + alloc_base += size_mask + 1; + *addr_mem_base = alloc_base; + + if (is_64bit) { + i++; + pci_hose_write_config_dword (&hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, 0x0); + } + } + } + + /* Enable Bus Master, Memory Space, and IO Space */ + pci_hose_read_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32); + pci_hose_write_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_read_config_dword (&hose, dev_nu, PCI_CACHE_LINE_SIZE, &tmp32); + + pci_hose_read_config_dword (&hose, dev_nu, PCI_COMMAND, &tmp32); + + tmp32 &= 0xffff; + if (iovsmem == 0) + tmp32 |= 0x5; + else + tmp32 |= 0x6; + + pci_hose_write_config_dword (&hose, dev_nu, PCI_COMMAND, tmp32); +} + +void pci_bus_scan (void) +{ + unsigned int bus, dev, func; + pci_dev_t dev_nu; + unsigned int data32, membase; + unsigned char header; + unsigned char intPin; + + ndevices = 1; + + nmbars = 0; + niobars = 0; + + for (bus = 0; bus < MAX_BUS_NUM; bus++) + for (dev = 0; dev < MAX_DEV_NUM; dev++) + for (func = 0; func < MAX_FUN_NUM; func++) { + dev_nu = PCI_BDF(bus, dev, func); + pci_hose_read_config_dword (&hose, dev_nu, + PCI_VENDOR_ID, &data32); + + /* + * some broken boards return 0 or ~0, + * if a slot is empty. + */ + if (data32 == 0xffffffff || data32 == 0x00000000 || + data32 == 0x0000ffff || data32 == 0xffff0000) + continue; + + pci_hose_read_config_dword (&hose, dev_nu, PCI_HEADER_TYPE, &header); + setup_pci_bar (bus, dev, func, header); + + devices[ndevices].vendor_id = (unsigned short)(data32 & 0x0000ffff); + + devices[ndevices].device_id = (unsigned short)((data32 & 0xffff0000) >> 16); + + /* Figure out what INTX# line the card uses */ + pci_hose_read_config_byte (&hose, dev_nu, + PCI_INTERRUPT_PIN, &intPin); + + /* assign the appropriate irq line */ + if (intPin > PCI_IRQ_LINES) { + printf ("more irq lines than expect\n"); + } else if (intPin != 0) { + /* This device uses an interrupt line */ + devices[ndevices].pin = intPin; + } + + pci_hose_read_config_dword (&hose, dev_nu, + PCI_CLASS_DEVICE, &data32); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf ("%06d %03d %03d " \ + "%04d %08x %08x " \ + "%03d %08x %06d %08x\n", + ndevices, devices[ndevices].bus, devices[ndevices].device, + devices[ndevices].func, devices[ndevices].device_id, devices[ndevices].vendor_id, + devices[ndevices].pin, devices[ndevices].bar[0].address, + devices[ndevices].bar[0].size, data32 >> 8); + ndevices++; +#endif + + } +} + +static int ftpci_probe (unsigned int addr_p) +{ + unsigned int *addr = (unsigned int *) addr_p; + *(volatile unsigned int *) addr = 0x80000000; + + if (*(volatile unsigned int *) addr == 0x80000000) { + printf ("Faraday ftpci100 PCI bridge probed ok\n"); + ftpci_probed = 1; + } else + ftpci_probed = 0; + + *(volatile unsigned int *) addr = 0x0; + return ftpci_probed; +} + +void ftpci_preinit () +{ + printf ("ftpci_preinit()\n\r"); + + pci_config_addr = CONFIG_FTPCI100_BASE + FTPCI100_CFG_ADR_REG; + pci_config_data = CONFIG_FTPCI100_BASE + FTPCI100_CFG_DATA_REG; + printf ("Config addr is %08X, data port is %08X\n", + (int) pci_config_addr, (int) pci_config_data); + + io_base = CONFIG_FTPCI100_BASE + CONFIG_FTPCI100_IO_SIZE; + mmio_base = CONFIG_FTPCI100_MEM_BASE; + mem_base = CONFIG_FTPCI100_MEM_BASE + CONFIG_FTPCI100_MEM_SIZE; + pci_setup_indirect(&hose, pci_config_addr, pci_config_data); + pci_register_hose(&hose); + + if (!ftpci_probe(pci_config_addr)) + return; +} + +void pci_ftpci_init () +{ + struct pci_device_id bridge_ids[] = { + {FTPCI100_BRIDGE_VENDORID, FTPCI100_BRIDGE_DEVICEID}, + {0, 0} + }; + pci_dev_t bridge_num; + + ftpci_preinit (); +#ifdef CONFIG_PCI_SCAN_SHOW + printf ("Device bus dev func deviceID vendorID pin address" \ + " size class\n"); +#endif + pci_bus_scan (); + + /* + * Setup the PCI Bridge Window to 1GB, + * it will cause USB OHCI Host controller Unrecoverable Error + * if it is not set. + */ + bridge_num = pci_find_devices (bridge_ids, 0); + if (bridge_num == -1) { + printf("PCI Bridge not found\n"); + return; + } + pci_hose_write_config_dword (&hose, bridge_num, PCI_MEM_BASE_SIZE1, + FTPCI100_WINDOW_BASE_ADR_SIZE_1GB); + return; +} diff --git a/drivers/pci/pci_ftpci100.h b/drivers/pci/pci_ftpci100.h new file mode 100644 index 0000000..7bb056d --- /dev/null +++ b/drivers/pci/pci_ftpci100.h @@ -0,0 +1,117 @@ +/* + * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation + * + * Copyright (C) 2010 Andes Technology Corporation + * Gavin Guo, Andes Technology Corporation <gavinguo(a)andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __FTPCI100_H +#define __FTPCI100_H + +#define FTPCI100_IOSIZE_REG 0x0 +#define FTPCI100_PROT_REG 0x4 +#define FTPCI100_CTRL_REG 0x8 +#define FTPCI100_ERREN_REG 0xc +#define FTPCI100_SOFTRST_REG 0x10 +#define FTPCI100_EN64_REG 0x14 +#define FTPCI100_ADDRH32_REG 0x18 +#define FTPCI100_CFG_ADR_REG 0x28 +#define FTPCI100_CFG_DATA_REG 0x2c + +/* + * FTPCI100_IOSIZE_REG's constant definitions + */ +#define FTPCI100_BASE_IO_SIZE_1M 0x0 +#define FTPCI100_BASE_IO_SIZE_2M 0x1 +#define FTPCI100_BASE_IO_SIZE_4M 0x2 +#define FTPCI100_BASE_IO_SIZE_8M 0x3 +#define FTPCI100_BASE_IO_SIZE_17M 0x4 +#define FTPCI100_BASE_IO_SIZE_32M 0x5 +#define FTPCI100_BASE_IO_SIZE_64M 0x6 +#define FTPCI100_BASE_IO_SIZE_128M 0x7 +#define FTPCI100_BASE_IO_SIZE_256M 0x8 +#define FTPCI100_BASE_IO_SIZE_512M 0x9 +#define FTPCI100_BASE_IO_SIZE_1G 0xa +#define FTPCI100_BASE_IO_SIZE_2G 0xb + +/* + * PCI Configuration Register + */ +#define PCI_INT_MASK 0x4c +#define PCI_MEM_BASE_SIZE1 0x50 +#define PCI_MEM_BASE_SIZE2 0x54 +#define PCI_MEM_BASE_SIZE3 0x58 + +/* + * PCI_INT_MASK's bit definitions + */ +#define PCI_INTA_ENABLE (1U<<22) +#define PCI_INTB_ENABLE (1U<<23) +#define PCI_INTC_ENABLE (1U<<24) +#define PCI_INTD_ENABLE (1U<<25) + +/* + * PCI_MEM_BASE_SIZE1's constant definitions + */ +#define FTPCI100_BASE_ADR_SIZE_1MB (PHYS_OFFSET | (0x0<<16)) +#define FTPCI100_BASE_ADR_SIZE_2MB (PHYS_OFFSET | (0x1<<16)) +#define FTPCI100_BASE_ADR_SIZE_4MB (PHYS_OFFSET | (0x2<<16)) +#define FTPCI100_BASE_ADR_SIZE_8MB (PHYS_OFFSET | (0x3<<16)) +#define FTPCI100_BASE_ADR_SIZE_16MB (PHYS_OFFSET | (0x4<<16)) +#define FTPCI100_BASE_ADR_SIZE_32MB (PHYS_OFFSET | (0x5<<16)) +#define FTPCI100_BASE_ADR_SIZE_64MB (PHYS_OFFSET | (0x6<<16)) +#define FTPCI100_BASE_ADR_SIZE_128MB (PHYS_OFFSET | (0x7<<16)) +#define FTPCI100_BASE_ADR_SIZE_256MB (PHYS_OFFSET | (0x8<<16)) +#define FTPCI100_BASE_ADR_SIZE_512MB (PHYS_OFFSET | (0x9<<16)) +#define FTPCI100_BASE_ADR_SIZE_1GB (PHYS_OFFSET | (0xa<<16)) +#define FTPCI100_BASE_ADR_SIZE_2GB (PHYS_OFFSET | (0xb<<16)) + +#define FTPCI100_MAX_FUNCTIONS 20 +#define PCI_IRQ_LINES 4 + +#define MAX_BUS_NUM 256 +#define MAX_DEV_NUM 32 +#define MAX_FUN_NUM 8 + +#define PCI_MAX_BAR_PER_FUNC 6 + +/* This is quick reference for io and mem size */ +#define FTPCI100_SIZE_256 (1 << 8) /* 0x00000100 */ +#define FTPCI100_SIZE_128M (1 << 27) /* 0x08000000 */ + +/* This definition is used by pci_ftpci_init() */ +#define FTPCI100_BRIDGE_VENDORID 0x159b +#define FTPCI100_BRIDGE_DEVICEID 0x4321 +#define FTPCI100_WINDOW_BASE_ADR_SIZE_1GB (0x0 | (0xa<<16)) + +struct pcibar { + unsigned int size; + unsigned int address; +}; + +struct pci_config { + unsigned int bus; + unsigned int device; + unsigned int func; + unsigned int pin; + unsigned short vendor_id; + unsigned short device_id; + struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1]; +}; + +#endif -- 1.7.3.2

1 0

[U-Boot] [PATCH v3 8/8] MX5:MX53: add initial support for MX53EVK board
by Jason Liu 29 Dec '10

29 Dec '10

Add initial support for MX53EVK board support. FEC, SD/MMC, UART, I2C, have been support. Signed-off-by: Jason Liu <r64343(a)freescale.com> --- Changes for v2: -Address the comments from Stefano, Albert and Wolfgang, -remove the ivt.S file and use imximage.cfg instead, -remove the ivt link to u-boot -Address the comments from Stefano, -Correct the copyright issue, -Use mxc_get_gpio() and mxc_set_gpio() accessors. -Get rid of system_rev, -use i2c enumeration value (0,1,..N) instead of BASE address, -use fsl_pmic i2c interface, -Add comments for why manage the pmic in a different way for TO2 -Remove the comments from configs/mx53evk.h, - /* - * Disabled for now due to build problems under Debian and a significant - * increase in the final file size: 144260 vs. 109536 Bytes. - */ -Address the comments from Wolfgang, -Move CONFIG_SYS_TEXT_BASE to board config file, -Remove the comments from configs/mx53evk.h - /* size in bytes reserved for initial data */ #define BOARD_LATE_INIT -Change the comments, * Hardware drivers to * UART drivers Changes for v3: - Address the comments from Stefano, - put uart and fec iomux setting to board_early_init_f so that uart can print out the early information such as uboot banner and cpuinfo etc. - Put maintainer name to ARM list, - Use Macro instead of constant value for PMIC, - Remove CONFIG_I2C_MXC and BOARD_LATE_INIT, - Add config.mk and imximage.cfg files to this patch, --- MAINTAINERS | 4 + board/freescale/mx53evk/Makefile | 48 ++++ board/freescale/mx53evk/config.mk | 25 +++ board/freescale/mx53evk/imximage.cfg | 112 ++++++++++ board/freescale/mx53evk/mx53evk.c | 397 ++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/mx53evk.h | 217 +++++++++++++++++++ include/mc13892.h | 5 + 8 files changed, 809 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 0590ad9..698d401 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -555,6 +555,10 @@ Stefano Babic <sbabic(a)denx.de> mx51evk i.MX51 vision2 i.MX51 +Jason Liu <r64343(a)freescale.com> + + MX53evk i.MX53 + Enric Balletbo i Serra <eballetbo(a)iseebcn.com> igep0020 ARM ARMV7 (OMAP3xx SoC) diff --git a/board/freescale/mx53evk/Makefile b/board/freescale/mx53evk/Makefile new file mode 100755 index 0000000..6b820f4 --- /dev/null +++ b/board/freescale/mx53evk/Makefile @@ -0,0 +1,48 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski <lg(a)denx.de> +# +# (C) Copyright 2010 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := mx53evk.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mx53evk/config.mk b/board/freescale/mx53evk/config.mk new file mode 100755 index 0000000..0153165 --- /dev/null +++ b/board/freescale/mx53evk/config.mk @@ -0,0 +1,25 @@ +# +# Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg +ALL += $(obj)u-boot.imx + diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg new file mode 100644 index 0000000..49dc18d --- /dev/null +++ b/board/freescale/mx53evk/imximage.cfg @@ -0,0 +1,112 @@ +# +# (C Copyright 2009 +# Stefano Babic DENX Software Engineering sbabic(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not write to the Free Software +# Foundation Inc. 51 Franklin Street Fifth Floor Boston, +# MA 02110-1301 USA +# +# Refer docs/README.imxmage for more details about how-to configure +# and create imximage boot image +# +# The syntax is taken as close as possible with the kwbimage + +# Imximage version + +IMXIMAGE_VERSION 2 + +# Boot Device : one of +# spi, sd (the board has no nand neither onenand) + +BOOT_FROM sd + +# Device Configuration Data (DCD) +# +# Each entry must have the format: +# Addr-type Address Value +# +# where: +# Addr-type register length (1,2 or 4 bytes) +# Address absolute address of the register +# value value to be stored in the register + +# Setting IOMUXC +DATA 4 0x53fa8554 0x00200000 +DATA 4 0x53fa8560 0x00200000 +DATA 4 0x53fa8594 0x00200000 +DATA 4 0x53fa8584 0x00200000 +DATA 4 0x53fa8558 0x00200040 +DATA 4 0x53fa8568 0x00200040 +DATA 4 0x53fa8590 0x00200040 +DATA 4 0x53fa857c 0x00200040 +DATA 4 0x53fa8564 0x00200040 +DATA 4 0x53fa8580 0x00200040 +DATA 4 0x53fa8570 0x00200000 +DATA 4 0x53fa8578 0x00200000 +DATA 4 0x53fa872c 0x00200000 +DATA 4 0x53fa8728 0x00200000 +DATA 4 0x53fa871c 0x00200000 +DATA 4 0x53fa8718 0x00200000 +DATA 4 0x53fa8574 0x00280000 +DATA 4 0x53fa8588 0x00280000 +DATA 4 0x53fa86f0 0x00280000 +DATA 4 0x53fa8720 0x00280000 +DATA 4 0x53fa86fc 0x00000000 +DATA 4 0x53fa86f4 0x00000200 +DATA 4 0x53fa8714 0x00000000 +DATA 4 0x53fa8724 0x06000000 +DATA 4 0x63fd9088 0x34333936 +DATA 4 0x63fd9090 0x49434942 +DATA 4 0x63fd90F8 0x00000800 +DATA 4 0x63fd907c 0x01350138 +DATA 4 0x63fd9080 0x01380139 +DATA 4 0x63fd9018 0x00001710 +DATA 4 0x63fd9000 0xc4110000 +DATA 4 0x63fd900C 0x4d5122d2 +DATA 4 0x63fd9010 0x92d18a22 +DATA 4 0x63fd9014 0x00c70092 +DATA 4 0x63fd902c 0x000026d2 +DATA 4 0x63fd9030 0x009f000e +DATA 4 0x63fd9008 0x12272000 +DATA 4 0x63fd9004 0x00030012 +DATA 4 0x63fd901c 0x04008010 +DATA 4 0x63fd901c 0x00008032 +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00008031 +DATA 4 0x63fd901c 0x0b5280b0 +DATA 4 0x63fd901c 0x04008010 +DATA 4 0x63fd901c 0x00008020 +DATA 4 0x63fd901c 0x00008020 +DATA 4 0x63fd901c 0x0a528030 +DATA 4 0x63fd901c 0x03c68031 +DATA 4 0x63fd901c 0x00448031 +DATA 4 0x63fd901c 0x04008018 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00008039 +DATA 4 0x63fd901c 0x0b528138 +DATA 4 0x63fd901c 0x04008018 +DATA 4 0x63fd901c 0x00008028 +DATA 4 0x63fd901c 0x00008028 +DATA 4 0x63fd901c 0x0a528038 +DATA 4 0x63fd901c 0x03c68039 +DATA 4 0x63fd901c 0x00448039 +DATA 4 0x63fd9020 0x00005800 +DATA 4 0x63fd9058 0x00033335 +DATA 4 0x63fd901c 0x00000000 +DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x53fa8004 0x00194005 diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c new file mode 100755 index 0000000..73bf53a --- /dev/null +++ b/board/freescale/mx53evk/mx53evk.c @@ -0,0 +1,397 @@ +/* + * (C) Copyright 2010 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx5x_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/errno.h> +#include <netdev.h> +#include <i2c.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <fsl_pmic.h> +#include <mxc_gpio.h> +#include <mc13892.h> + +DECLARE_GLOBAL_DATA_PTR; + +u32 get_board_rev(void) +{ + return get_cpu_rev(); +} + +int dram_init(void) +{ + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + PHYS_SDRAM_1_SIZE); + return 0; +} + +static void setup_iomux_uart(void) +{ + /* UART1 RXD */ + mxc_request_iomux(MX53_PIN_CSI0_D11, IOMUX_CONFIG_ALT2); + mxc_iomux_set_pad(MX53_PIN_CSI0_D11, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + mxc_iomux_set_input(MX53_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, 0x1); + + /* UART1 TXD */ + mxc_request_iomux(MX53_PIN_CSI0_D10, IOMUX_CONFIG_ALT2); + mxc_iomux_set_pad(MX53_PIN_CSI0_D10, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_ODE_OPENDRAIN_ENABLE); +} + +static void setup_i2c(unsigned int port_number) +{ + switch (port_number) { + case 0: + /* i2c1 SDA */ + mxc_request_iomux(MX53_PIN_CSI0_D8, + IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MX53_I2C1_IPP_SDA_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX53_PIN_CSI0_D8, + PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + /* i2c1 SCL */ + mxc_request_iomux(MX53_PIN_CSI0_D9, + IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MX53_I2C1_IPP_SCL_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX53_PIN_CSI0_D9, + PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + break; + case 1: + /* i2c2 SDA */ + mxc_request_iomux(MX53_PIN_KEY_ROW3, + IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MX53_I2C2_IPP_SDA_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX53_PIN_KEY_ROW3, + PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + + /* i2c2 SCL */ + mxc_request_iomux(MX53_PIN_KEY_COL3, + IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MX53_I2C2_IPP_SCL_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX53_PIN_KEY_COL3, + PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + break; + default: + printf("Warning: Wrong I2C port number\n"); + break; + } +} + +void power_init(void) +{ + unsigned int val; + + /* Set VDDA to 1.25V */ + val = pmic_reg_read(REG_SW_2); + val &= ~SWX_OUT_MASK; + val |= SWX_OUT_1_25; + pmic_reg_write(REG_SW_2, val); + + /* + * Need increase VCC and VDDA to 1.3V + * according to MX53 IC TO2 datasheet. + */ + if (is_soc_rev(CHIP_REV_2_0) == 0) { + /* Set VCC to 1.3V for TO2 */ + val = pmic_reg_read(REG_SW_1); + val &= ~SWX_OUT_MASK; + val |= SWX_OUT_1_30; + pmic_reg_write(REG_SW_2, val); + + /* Set VDDA to 1.3V for TO2 */ + val = pmic_reg_read(REG_SW_2); + val &= ~SWX_OUT_MASK; + val |= SWX_OUT_1_30; + pmic_reg_write(REG_SW_2, val); + } +} + +static void setup_iomux_fec(void) +{ + /*FEC_MDIO*/ + mxc_request_iomux(MX53_PIN_FEC_MDIO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_MDIO, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_22K_PU | PAD_CTL_ODE_OPENDRAIN_ENABLE); + mxc_iomux_set_input(MX53_FEC_FEC_MDI_SELECT_INPUT, 0x1); + + /*FEC_MDC*/ + mxc_request_iomux(MX53_PIN_FEC_MDC, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_MDC, PAD_CTL_DRV_HIGH); + + /* FEC RXD1 */ + mxc_request_iomux(MX53_PIN_FEC_RXD1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RXD1, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC RXD0 */ + mxc_request_iomux(MX53_PIN_FEC_RXD0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RXD0, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC TXD1 */ + mxc_request_iomux(MX53_PIN_FEC_TXD1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TXD1, PAD_CTL_DRV_HIGH); + + /* FEC TXD0 */ + mxc_request_iomux(MX53_PIN_FEC_TXD0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TXD0, PAD_CTL_DRV_HIGH); + + /* FEC TX_EN */ + mxc_request_iomux(MX53_PIN_FEC_TX_EN, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TX_EN, PAD_CTL_DRV_HIGH); + + /* FEC TX_CLK */ + mxc_request_iomux(MX53_PIN_FEC_REF_CLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_REF_CLK, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC RX_ER */ + mxc_request_iomux(MX53_PIN_FEC_RX_ER, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RX_ER, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC CRS */ + mxc_request_iomux(MX53_PIN_FEC_CRS_DV, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_CRS_DV, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[2] = { + {MMC_SDHC1_BASE_ADDR, 1}, + {MMC_SDHC3_BASE_ADDR, 1}, +}; + +int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + + if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) + *cd = mxc_gpio_get(77); /*GPIO3_13*/ + else + *cd = mxc_gpio_get(75); /*GPIO3_11*/ + + return 0; +} + +int board_mmc_init(bd_t *bis) +{ + u32 index; + s32 status = 0; + + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { + switch (index) { + case 0: + mxc_request_iomux(MX53_PIN_SD1_CMD, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_CLK, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA0, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA1, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA2, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA3, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_EIM_DA13, + IOMUX_CONFIG_ALT1); + + mxc_iomux_set_pad(MX53_PIN_SD1_CMD, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_CLK, + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA0, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA1, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA2, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA3, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + break; + case 1: + mxc_request_iomux(MX53_PIN_ATA_RESET_B, + IOMUX_CONFIG_ALT2); + mxc_request_iomux(MX53_PIN_ATA_IORDY, + IOMUX_CONFIG_ALT2); + mxc_request_iomux(MX53_PIN_ATA_DATA8, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA9, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA10, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA11, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA0, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA1, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA2, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA3, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_EIM_DA11, + IOMUX_CONFIG_ALT1); + + mxc_iomux_set_pad(MX53_PIN_ATA_RESET_B, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_IORDY, + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA8, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA9, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA10, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA11, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA0, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA1, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA2, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA3, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + + break; + default: + printf("Warning: you configured more ESDHC controller" + "(%d) as supported by the board(2)\n", + CONFIG_SYS_FSL_ESDHC_NUM); + return status; + } + status |= fsl_esdhc_initialize(bis, &esdhc_cfg[index]); + } + + return status; +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + setup_iomux_fec(); + + return 0; +} + +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_MX53_EVK; + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +int board_late_init(void) +{ + setup_i2c(1); + power_init(); + + return 0; +} + +int checkboard(void) +{ + u32 cause; + struct src *src_regs = (struct src *)SRC_BASE_ADDR; + + puts("Board: MX53EVK ["); + + cause = src_regs->srsr; + switch (cause) { + case 0x0001: + printf("POR"); + break; + case 0x0009: + printf("RST"); + break; + case 0x0010: + case 0x0011: + printf("WDOG"); + break; + default: + printf("unknown"); + } + printf("]\n"); + return 0; +} diff --git a/boards.cfg b/boards.cfg index dcd5a12..736e88e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -101,6 +101,7 @@ omap5912osk arm arm926ejs - ti edminiv2 arm arm926ejs - LaCie orion5x ca9x4_ct_vxp arm armv7 vexpress armltd mx51evk arm armv7 mx51evk freescale mx5 +mx53evk arm armv7 mx53evk freescale mx5 vision2 arm armv7 vision2 ttcontrol mx5 omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h new file mode 100755 index 0000000..d6cf04e --- /dev/null +++ b/include/configs/mx53evk.h @@ -0,0 +1,217 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. + * + * Configuration settings for the MX53-EVK Freescale board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + + /* High Level Configuration Options */ + +#define CONFIG_MX53 + +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_L2_OFF + +#include <asm/arch/imx-regs.h> + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_REVISION_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define BOARD_LATE_INIT +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_SYS_MX53_UART1 + +/* + * I2C Configs + */ +#define CONFIG_CMD_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MXC 1 +#define CONFIG_SYS_I2C_MX53_PORT2 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + +/* + * PMIC Configs + */ +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_I2C +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 + +/* + * MMC Configs + */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* + * Eth Configs + */ +#define CONFIG_HAS_ETH1 +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1F + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/*********************************************************** + * Command definition + ***********************************************************/ + +#include <config_cmd_default.h> + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_PRIME "FEC0" + +#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0x77800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "uimage=uImage\0" \ + "mmcdev=0\0" \ + "mmcpart=2\0" \ + "mmcroot=/dev/mmcblk0p3 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm\0" \ + "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "dhcp ${uimage}; bootm\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan ${mmcdev}; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +#define CONFIG_ARP_TIMEOUT 200UL + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "MX53EVK U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x10000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_CMDLINE_EDITING + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#endif /* __CONFIG_H */ diff --git a/include/mc13892.h b/include/mc13892.h index 61c3e6e..001cf56 100644 --- a/include/mc13892.h +++ b/include/mc13892.h @@ -160,4 +160,9 @@ /* Reg Power Control 2*/ #define WDIRESET (1 << 12) +/* SWx Output Volts */ +#define SWX_OUT_MASK 0x1F +#define SWX_OUT_1_25 0x1A +#define SWX_OUT_1_30 0X1C + #endif -- 1.7.0.4

1 0

[U-Boot] IXP42x patch series
by Michael Schwingen 29 Dec '10

29 Dec '10

Hi, here is my IXP42x patch series, which brings my IXP boards back to life after relocation was added. Some comments: I added the XScale sub-architecture to the MAINTAINERS list to get a better overview which boards may still need work: [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list The NPE library needs a fix for B1 silicon - the special handling is only needed for Rev. A0, but the code treats everything *but* B0 as being the old A0 silicon: [PATCH 02/13] add support for IXP42x Rev. B1 and newer The dvlhost board has a watchdog that needs to be triggered regularly: [PATCH 03/13] trigger hardware watchdog in IXP42x serial driver Rework the startup and timer code: [PATCH 04/13] Fix IXP code to work after relocation was added: make fails during depend pass in the NPE directory, due to missing include files: [PATCH 05/13] fix "depend" target in npe directory Board updates: [PATCH 06/13] update/fix AcTux1 board [PATCH 07/13] update/fix AcTux2 board [PATCH 08/13] update/fix AcTux3 board [PATCH 09/13] update/fix AcTux4 board These fixes should be OK (not sure about the environment location on IXDP425 - the old value is inside the monitor area, which seems to be wrong). I do not know if these should be committed, or should be left for the board maintainers: [PATCH 10/13] update/fix some more IXP42x boards (only compile tested) Add one new board: [PATCH 11/13] add dvlhost (dLAN 200 AV Wireless G) board Add support for -ffunction-sections / --gc-sections. This cuts the size of u-boot.bin from 288548 bytes down to 226820 bytes on AcTux-3, probably in part due to unused code in the Intel NPE library. I found no way to implement this in board-specific parts, so I added a global option to enable this: [PATCH 12/13] add support for function-sections Add support for MII links that run at fixed speed, without a PHY with standard registers (ethernet switch on AcTux-2/AcTux-3, powerline modem on dvlhost): [PATCH 13/13] add support for fixed-speed MII ports (no standard PHY registers) cu Michael

3 18

[U-Boot] [PATCH] ARM: Update mach types
by s-paulraj＠ti.com 29 Dec '10

29 Dec '10

From: Sandeep Paulraj <s-paulraj(a)ti.com> This commit updates the mach-types for ARM Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> --- arch/arm/include/asm/mach-types.h | 2305 ++++++++++++++++++++++++++++++++++++- 1 files changed, 2290 insertions(+), 15 deletions(-) diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index 8b0208a..d95e6d6 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -2317,7 +2317,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_U380 2333 #define MACH_TYPE_HUALU_BOARD 2334 #define MACH_TYPE_NPCMX50 2335 -#define MACH_TYPE_MX51_LANGE51 2336 +#define MACH_TYPE_MX51_EFIKAMX 2336 #define MACH_TYPE_MX51_LANGE52 2337 #define MACH_TYPE_RIOM 2338 #define MACH_TYPE_COMCAS 2339 @@ -2351,7 +2351,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_CSB732 2367 #define MACH_TYPE_U8500 2368 #define MACH_TYPE_HUQIU 2369 -#define MACH_TYPE_MX51_KUNLUN 2370 +#define MACH_TYPE_MX51_EFIKASB 2370 #define MACH_TYPE_PMT1G 2371 #define MACH_TYPE_HTCELF 2372 #define MACH_TYPE_ARMADILLO420 2373 @@ -2967,7 +2967,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_WASABI 2986 #define MACH_TYPE_VIVOW 2987 #define MACH_TYPE_MX50_RDP 2988 -#define MACH_TYPE_UNIVERSAL 2989 +#define MACH_TYPE_UNIVERSAL_C210 2989 #define MACH_TYPE_REAL6410 2990 #define MACH_TYPE_SPX_SAKURA 2991 #define MACH_TYPE_IJ3K_2440 2992 @@ -3040,6 +3040,181 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_MSM8X60_QRDC 3060 #define MACH_TYPE_SPEAR900 3061 #define MACH_TYPE_PCONTROL_G20 3062 +#define MACH_TYPE_RDSTOR 3063 +#define MACH_TYPE_USDLOADER 3064 +#define MACH_TYPE_TSOPLOADER 3065 +#define MACH_TYPE_KRONOS 3066 +#define MACH_TYPE_FFCORE 3067 +#define MACH_TYPE_MONE 3068 +#define MACH_TYPE_UNIT2S 3069 +#define MACH_TYPE_ACER_A5 3070 +#define MACH_TYPE_ETHERPRO_ISP 3071 +#define MACH_TYPE_STRETCHS7000 3072 +#define MACH_TYPE_P87_SMARTSIM 3073 +#define MACH_TYPE_TULIP 3074 +#define MACH_TYPE_SUNFLOWER 3075 +#define MACH_TYPE_RIB 3076 +#define MACH_TYPE_CLOD 3077 +#define MACH_TYPE_RUMP 3078 +#define MACH_TYPE_TENDERLOIN 3079 +#define MACH_TYPE_SHORTLOIN 3080 +#define MACH_TYPE_CRESPO 3081 +#define MACH_TYPE_ANTARES 3082 +#define MACH_TYPE_WB40N 3083 +#define MACH_TYPE_HERRING 3084 +#define MACH_TYPE_NAXY400 3085 +#define MACH_TYPE_NAXY1200 3086 +#define MACH_TYPE_VPR200 3087 +#define MACH_TYPE_BUG20 3088 +#define MACH_TYPE_GOFLEXNET 3089 +#define MACH_TYPE_TORBRECK 3090 +#define MACH_TYPE_SAARB_MG1 3091 +#define MACH_TYPE_CALLISTO 3092 +#define MACH_TYPE_MULTHSU 3093 +#define MACH_TYPE_SALUDA 3094 +#define MACH_TYPE_PEMP_OMAP3_APOLLO 3095 +#define MACH_TYPE_VC0718 3096 +#define MACH_TYPE_MVBLX 3097 +#define MACH_TYPE_INHAND_APEIRON 3098 +#define MACH_TYPE_INHAND_FURY 3099 +#define MACH_TYPE_INHAND_SIREN 3100 +#define MACH_TYPE_HDNVP 3101 +#define MACH_TYPE_SOFTWINNER 3102 +#define MACH_TYPE_PRIMA2_EVB 3103 +#define MACH_TYPE_NAS6210 3104 +#define MACH_TYPE_UNISDEV 3105 +#define MACH_TYPE_SBCA11 3106 +#define MACH_TYPE_SAGA 3107 +#define MACH_TYPE_NS_K330 3108 +#define MACH_TYPE_TANNA 3109 +#define MACH_TYPE_IMATE8502 3110 +#define MACH_TYPE_ASPEN 3111 +#define MACH_TYPE_DAINTREE_CWAC 3112 +#define MACH_TYPE_ZMX25 3113 +#define MACH_TYPE_MAPLE1 3114 +#define MACH_TYPE_QSD8X72_SURF 3115 +#define MACH_TYPE_QSD8X72_FFA 3116 +#define MACH_TYPE_ABILENE 3117 +#define MACH_TYPE_EIGEN_TTR 3118 +#define MACH_TYPE_IOMEGA_IX2_200 3119 +#define MACH_TYPE_CORETEC_VCX7400 3120 +#define MACH_TYPE_SANTIAGO 3121 +#define MACH_TYPE_MX257SOL 3122 +#define MACH_TYPE_STRASBOURG 3123 +#define MACH_TYPE_MSM8X60_FLUID 3124 +#define MACH_TYPE_SMARTQV5 3125 +#define MACH_TYPE_SMARTQV3 3126 +#define MACH_TYPE_SMARTQV7 3127 +#define MACH_TYPE_PAZ00 3128 +#define MACH_TYPE_ACMENETUSFOXG20 3129 +#define MACH_TYPE_HTCWILLOW 3130 +#define MACH_TYPE_FWBD_0404 3131 +#define MACH_TYPE_HDGU 3132 +#define MACH_TYPE_PYRAMID 3133 +#define MACH_TYPE_EPIPHAN 3134 +#define MACH_TYPE_OMAP_BENDER 3135 +#define MACH_TYPE_GURNARD 3136 +#define MACH_TYPE_GTL_IT5100 3137 +#define MACH_TYPE_BCM2708 3138 +#define MACH_TYPE_MX51_GGC 3139 +#define MACH_TYPE_SHARESPACE 3140 +#define MACH_TYPE_HABA_KNX_EXPLORER 3141 +#define MACH_TYPE_SIMTEC_KIRKMOD 3142 +#define MACH_TYPE_CRUX 3143 +#define MACH_TYPE_MX51_BRAVO 3144 +#define MACH_TYPE_CHARON 3145 +#define MACH_TYPE_PICOCOM3 3146 +#define MACH_TYPE_PICOCOM4 3147 +#define MACH_TYPE_SERRANO 3148 +#define MACH_TYPE_DOUBLESHOT 3149 +#define MACH_TYPE_EVSY 3150 +#define MACH_TYPE_HUASHAN 3151 +#define MACH_TYPE_LAUSANNE 3152 +#define MACH_TYPE_EMERALD 3153 +#define MACH_TYPE_TQMA35 3154 +#define MACH_TYPE_MARVEL 3155 +#define MACH_TYPE_MANUAE 3156 +#define MACH_TYPE_CHACHA 3157 +#define MACH_TYPE_LEMON 3158 +#define MACH_TYPE_CSC 3159 +#define MACH_TYPE_GIRA_KNXIP_ROUTER 3160 +#define MACH_TYPE_T20 3161 +#define MACH_TYPE_HDMINI 3162 +#define MACH_TYPE_SCIPHONE_G2 3163 +#define MACH_TYPE_EXPRESS 3164 +#define MACH_TYPE_EXPRESS_KT 3165 +#define MACH_TYPE_MAXIMASP 3166 +#define MACH_TYPE_NITROGEN_IMX51 3167 +#define MACH_TYPE_NITROGEN_IMX53 3168 +#define MACH_TYPE_SUNFIRE 3169 +#define MACH_TYPE_AROWANA 3170 +#define MACH_TYPE_TEGRA_DAYTONA 3171 +#define MACH_TYPE_TEGRA_SWORDFISH 3172 +#define MACH_TYPE_EDISON 3173 +#define MACH_TYPE_SVP8500V1 3174 +#define MACH_TYPE_SVP8500V2 3175 +#define MACH_TYPE_SVP5500 3176 +#define MACH_TYPE_B5500 3177 +#define MACH_TYPE_S5500 3178 +#define MACH_TYPE_ICON 3179 +#define MACH_TYPE_ELEPHANT 3180 +#define MACH_TYPE_MSM8X60_FUSION 3181 +#define MACH_TYPE_SHOOTER 3182 +#define MACH_TYPE_SPADE_LTE 3183 +#define MACH_TYPE_PHILHWANI 3184 +#define MACH_TYPE_GSNCOMM 3185 +#define MACH_TYPE_STRASBOURG_A2 3186 +#define MACH_TYPE_MMM 3187 +#define MACH_TYPE_DAVINCI_DM365_BV 3188 +#define MACH_TYPE_AG5EVM 3189 +#define MACH_TYPE_SC575PLC 3190 +#define MACH_TYPE_SC575IPC 3191 +#define MACH_TYPE_OMAP3_TDM3730 3192 +#define MACH_TYPE_G7 3193 +#define MACH_TYPE_TOP9000_EVAL 3194 +#define MACH_TYPE_TOP9000_SU 3195 +#define MACH_TYPE_UTM300 3196 +#define MACH_TYPE_TSUNAGI 3197 +#define MACH_TYPE_TS75XX 3198 +#define MACH_TYPE_MSM8X60_FUSN_FFA 3199 +#define MACH_TYPE_TS47XX 3200 +#define MACH_TYPE_DA850_K5 3201 +#define MACH_TYPE_AX502 3202 +#define MACH_TYPE_IGEP0032 3203 +#define MACH_TYPE_ANTERO 3204 +#define MACH_TYPE_SYNERGY 3205 +#define MACH_TYPE_ICS_IF_VOIP 3206 +#define MACH_TYPE_WLF_CRAGG_6410 3207 +#define MACH_TYPE_PUNICA 3208 +#define MACH_TYPE_SBC_NT250 3209 +#define MACH_TYPE_MX27_WMULTRA 3210 +#define MACH_TYPE_MACKEREL 3211 +#define MACH_TYPE_FA9X27 3213 +#define MACH_TYPE_NS2816TB 3214 +#define MACH_TYPE_NS2816_NTPAD 3215 +#define MACH_TYPE_NS2816_NTNB 3216 +#define MACH_TYPE_KAEN 3217 +#define MACH_TYPE_NV1000 3218 +#define MACH_TYPE_NUC950TS 3219 +#define MACH_TYPE_NOKIA_RM680 3220 +#define MACH_TYPE_AST2200 3221 +#define MACH_TYPE_LEAD 3222 +#define MACH_TYPE_UNINO1 3223 +#define MACH_TYPE_GREECO 3224 +#define MACH_TYPE_VERDI 3225 +#define MACH_TYPE_DM6446_ADBOX 3226 +#define MACH_TYPE_QUAD_SALSA 3227 +#define MACH_TYPE_ABB_GMA_1_1 3228 +#define MACH_TYPE_SVCID 3229 +#define MACH_TYPE_MSM8960_SIM 3230 +#define MACH_TYPE_MSM8960_RUMI3 3231 +#define MACH_TYPE_ICON_G 3232 +#define MACH_TYPE_MB3 3233 +#define MACH_TYPE_GSIA18S 3234 +#define MACH_TYPE_PIVICC 3235 +#define MACH_TYPE_PCM048 3236 +#define MACH_TYPE_DDS 3237 +#define MACH_TYPE_CHALTEN_XA1 3238 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -30701,16 +30876,16 @@ extern unsigned int __machine_arch_type; # define machine_is_npcmx50() (0) #endif -#ifdef CONFIG_MACH_MX51_LANGE51 +#ifdef CONFIG_MACH_MX51_EFIKAMX # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_MX51_LANGE51 +# define machine_arch_type MACH_TYPE_MX51_EFIKAMX # endif -# define machine_is_mx51_lange51() (machine_arch_type == MACH_TYPE_MX51_LANGE51) +# define machine_is_mx51_efikamx() (machine_arch_type == MACH_TYPE_MX51_EFIKAMX) #else -# define machine_is_mx51_lange51() (0) +# define machine_is_mx51_efikamx() (0) #endif #ifdef CONFIG_MACH_MX51_LANGE52 @@ -31109,16 +31284,16 @@ extern unsigned int __machine_arch_type; # define machine_is_huqiu() (0) #endif -#ifdef CONFIG_MACH_MX51_KUNLUN +#ifdef CONFIG_MACH_MX51_EFIKASB # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_MX51_KUNLUN +# define machine_arch_type MACH_TYPE_MX51_EFIKASB # endif -# define machine_is_mx51_kunlun() (machine_arch_type == MACH_TYPE_MX51_KUNLUN) +# define machine_is_mx51_efikasb() (machine_arch_type == MACH_TYPE_MX51_EFIKASB) #else -# define machine_is_mx51_kunlun() (0) +# define machine_is_mx51_efikasb() (0) #endif #ifdef CONFIG_MACH_PMT1G @@ -38501,16 +38676,16 @@ extern unsigned int __machine_arch_type; # define machine_is_mx50_rdp() (0) #endif -#ifdef CONFIG_MACH_UNIVERSAL +#ifdef CONFIG_MACH_UNIVERSAL_C210 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_UNIVERSAL +# define machine_arch_type MACH_TYPE_UNIVERSAL_C210 # endif -# define machine_is_universal() (machine_arch_type == MACH_TYPE_UNIVERSAL) +# define machine_is_universal_c210() (machine_arch_type == MACH_TYPE_UNIVERSAL_C210) #else -# define machine_is_universal() (0) +# define machine_is_universal_c210() (0) #endif #ifdef CONFIG_MACH_REAL6410 @@ -39377,6 +39552,2106 @@ extern unsigned int __machine_arch_type; # define machine_is_pcontrol_g20() (0) #endif +#ifdef CONFIG_MACH_RDSTOR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RDSTOR +# endif +# define machine_is_rdstor() (machine_arch_type == MACH_TYPE_RDSTOR) +#else +# define machine_is_rdstor() (0) +#endif + +#ifdef CONFIG_MACH_USDLOADER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_USDLOADER +# endif +# define machine_is_usdloader() (machine_arch_type == MACH_TYPE_USDLOADER) +#else +# define machine_is_usdloader() (0) +#endif + +#ifdef CONFIG_MACH_TSOPLOADER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TSOPLOADER +# endif +# define machine_is_tsoploader() (machine_arch_type == MACH_TYPE_TSOPLOADER) +#else +# define machine_is_tsoploader() (0) +#endif + +#ifdef CONFIG_MACH_KRONOS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_KRONOS +# endif +# define machine_is_kronos() (machine_arch_type == MACH_TYPE_KRONOS) +#else +# define machine_is_kronos() (0) +#endif + +#ifdef CONFIG_MACH_FFCORE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_FFCORE +# endif +# define machine_is_ffcore() (machine_arch_type == MACH_TYPE_FFCORE) +#else +# define machine_is_ffcore() (0) +#endif + +#ifdef CONFIG_MACH_MONE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MONE +# endif +# define machine_is_mone() (machine_arch_type == MACH_TYPE_MONE) +#else +# define machine_is_mone() (0) +#endif + +#ifdef CONFIG_MACH_UNIT2S +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UNIT2S +# endif +# define machine_is_unit2s() (machine_arch_type == MACH_TYPE_UNIT2S) +#else +# define machine_is_unit2s() (0) +#endif + +#ifdef CONFIG_MACH_ACER_A5 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ACER_A5 +# endif +# define machine_is_acer_a5() (machine_arch_type == MACH_TYPE_ACER_A5) +#else +# define machine_is_acer_a5() (0) +#endif + +#ifdef CONFIG_MACH_ETHERPRO_ISP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ETHERPRO_ISP +# endif +# define machine_is_etherpro_isp() (machine_arch_type == MACH_TYPE_ETHERPRO_ISP) +#else +# define machine_is_etherpro_isp() (0) +#endif + +#ifdef CONFIG_MACH_STRETCHS7000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_STRETCHS7000 +# endif +# define machine_is_stretchs7000() (machine_arch_type == MACH_TYPE_STRETCHS7000) +#else +# define machine_is_stretchs7000() (0) +#endif + +#ifdef CONFIG_MACH_P87_SMARTSIM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_P87_SMARTSIM +# endif +# define machine_is_p87_smartsim() (machine_arch_type == MACH_TYPE_P87_SMARTSIM) +#else +# define machine_is_p87_smartsim() (0) +#endif + +#ifdef CONFIG_MACH_TULIP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TULIP +# endif +# define machine_is_tulip() (machine_arch_type == MACH_TYPE_TULIP) +#else +# define machine_is_tulip() (0) +#endif + +#ifdef CONFIG_MACH_SUNFLOWER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SUNFLOWER +# endif +# define machine_is_sunflower() (machine_arch_type == MACH_TYPE_SUNFLOWER) +#else +# define machine_is_sunflower() (0) +#endif + +#ifdef CONFIG_MACH_RIB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RIB +# endif +# define machine_is_rib() (machine_arch_type == MACH_TYPE_RIB) +#else +# define machine_is_rib() (0) +#endif + +#ifdef CONFIG_MACH_CLOD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CLOD +# endif +# define machine_is_clod() (machine_arch_type == MACH_TYPE_CLOD) +#else +# define machine_is_clod() (0) +#endif + +#ifdef CONFIG_MACH_RUMP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RUMP +# endif +# define machine_is_rump() (machine_arch_type == MACH_TYPE_RUMP) +#else +# define machine_is_rump() (0) +#endif + +#ifdef CONFIG_MACH_TENDERLOIN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TENDERLOIN +# endif +# define machine_is_tenderloin() (machine_arch_type == MACH_TYPE_TENDERLOIN) +#else +# define machine_is_tenderloin() (0) +#endif + +#ifdef CONFIG_MACH_SHORTLOIN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SHORTLOIN +# endif +# define machine_is_shortloin() (machine_arch_type == MACH_TYPE_SHORTLOIN) +#else +# define machine_is_shortloin() (0) +#endif + +#ifdef CONFIG_MACH_CRESPO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CRESPO +# endif +# define machine_is_crespo() (machine_arch_type == MACH_TYPE_CRESPO) +#else +# define machine_is_crespo() (0) +#endif + +#ifdef CONFIG_MACH_ANTARES +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ANTARES +# endif +# define machine_is_antares() (machine_arch_type == MACH_TYPE_ANTARES) +#else +# define machine_is_antares() (0) +#endif + +#ifdef CONFIG_MACH_WB40N +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WB40N +# endif +# define machine_is_wb40n() (machine_arch_type == MACH_TYPE_WB40N) +#else +# define machine_is_wb40n() (0) +#endif + +#ifdef CONFIG_MACH_HERRING +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HERRING +# endif +# define machine_is_herring() (machine_arch_type == MACH_TYPE_HERRING) +#else +# define machine_is_herring() (0) +#endif + +#ifdef CONFIG_MACH_NAXY400 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NAXY400 +# endif +# define machine_is_naxy400() (machine_arch_type == MACH_TYPE_NAXY400) +#else +# define machine_is_naxy400() (0) +#endif + +#ifdef CONFIG_MACH_NAXY1200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NAXY1200 +# endif +# define machine_is_naxy1200() (machine_arch_type == MACH_TYPE_NAXY1200) +#else +# define machine_is_naxy1200() (0) +#endif + +#ifdef CONFIG_MACH_VPR200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VPR200 +# endif +# define machine_is_vpr200() (machine_arch_type == MACH_TYPE_VPR200) +#else +# define machine_is_vpr200() (0) +#endif + +#ifdef CONFIG_MACH_BUG20 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BUG20 +# endif +# define machine_is_bug20() (machine_arch_type == MACH_TYPE_BUG20) +#else +# define machine_is_bug20() (0) +#endif + +#ifdef CONFIG_MACH_GOFLEXNET +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GOFLEXNET +# endif +# define machine_is_goflexnet() (machine_arch_type == MACH_TYPE_GOFLEXNET) +#else +# define machine_is_goflexnet() (0) +#endif + +#ifdef CONFIG_MACH_TORBRECK +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TORBRECK +# endif +# define machine_is_torbreck() (machine_arch_type == MACH_TYPE_TORBRECK) +#else +# define machine_is_torbreck() (0) +#endif + +#ifdef CONFIG_MACH_SAARB_MG1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SAARB_MG1 +# endif +# define machine_is_saarb_mg1() (machine_arch_type == MACH_TYPE_SAARB_MG1) +#else +# define machine_is_saarb_mg1() (0) +#endif + +#ifdef CONFIG_MACH_CALLISTO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CALLISTO +# endif +# define machine_is_callisto() (machine_arch_type == MACH_TYPE_CALLISTO) +#else +# define machine_is_callisto() (0) +#endif + +#ifdef CONFIG_MACH_MULTHSU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MULTHSU +# endif +# define machine_is_multhsu() (machine_arch_type == MACH_TYPE_MULTHSU) +#else +# define machine_is_multhsu() (0) +#endif + +#ifdef CONFIG_MACH_SALUDA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SALUDA +# endif +# define machine_is_saluda() (machine_arch_type == MACH_TYPE_SALUDA) +#else +# define machine_is_saluda() (0) +#endif + +#ifdef CONFIG_MACH_PEMP_OMAP3_APOLLO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PEMP_OMAP3_APOLLO +# endif +# define machine_is_pemp_omap3_apollo() (machine_arch_type == MACH_TYPE_PEMP_OMAP3_APOLLO) +#else +# define machine_is_pemp_omap3_apollo() (0) +#endif + +#ifdef CONFIG_MACH_VC0718 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VC0718 +# endif +# define machine_is_vc0718() (machine_arch_type == MACH_TYPE_VC0718) +#else +# define machine_is_vc0718() (0) +#endif + +#ifdef CONFIG_MACH_MVBLX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MVBLX +# endif +# define machine_is_mvblx() (machine_arch_type == MACH_TYPE_MVBLX) +#else +# define machine_is_mvblx() (0) +#endif + +#ifdef CONFIG_MACH_INHAND_APEIRON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_INHAND_APEIRON +# endif +# define machine_is_inhand_apeiron() (machine_arch_type == MACH_TYPE_INHAND_APEIRON) +#else +# define machine_is_inhand_apeiron() (0) +#endif + +#ifdef CONFIG_MACH_INHAND_FURY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_INHAND_FURY +# endif +# define machine_is_inhand_fury() (machine_arch_type == MACH_TYPE_INHAND_FURY) +#else +# define machine_is_inhand_fury() (0) +#endif + +#ifdef CONFIG_MACH_INHAND_SIREN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_INHAND_SIREN +# endif +# define machine_is_inhand_siren() (machine_arch_type == MACH_TYPE_INHAND_SIREN) +#else +# define machine_is_inhand_siren() (0) +#endif + +#ifdef CONFIG_MACH_HDNVP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HDNVP +# endif +# define machine_is_hdnvp() (machine_arch_type == MACH_TYPE_HDNVP) +#else +# define machine_is_hdnvp() (0) +#endif + +#ifdef CONFIG_MACH_SOFTWINNER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SOFTWINNER +# endif +# define machine_is_softwinner() (machine_arch_type == MACH_TYPE_SOFTWINNER) +#else +# define machine_is_softwinner() (0) +#endif + +#ifdef CONFIG_MACH_PRIMA2_EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PRIMA2_EVB +# endif +# define machine_is_prima2_evb() (machine_arch_type == MACH_TYPE_PRIMA2_EVB) +#else +# define machine_is_prima2_evb() (0) +#endif + +#ifdef CONFIG_MACH_NAS6210 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NAS6210 +# endif +# define machine_is_nas6210() (machine_arch_type == MACH_TYPE_NAS6210) +#else +# define machine_is_nas6210() (0) +#endif + +#ifdef CONFIG_MACH_UNISDEV +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UNISDEV +# endif +# define machine_is_unisdev() (machine_arch_type == MACH_TYPE_UNISDEV) +#else +# define machine_is_unisdev() (0) +#endif + +#ifdef CONFIG_MACH_SBCA11 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBCA11 +# endif +# define machine_is_sbca11() (machine_arch_type == MACH_TYPE_SBCA11) +#else +# define machine_is_sbca11() (0) +#endif + +#ifdef CONFIG_MACH_SAGA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SAGA +# endif +# define machine_is_saga() (machine_arch_type == MACH_TYPE_SAGA) +#else +# define machine_is_saga() (0) +#endif + +#ifdef CONFIG_MACH_NS_K330 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NS_K330 +# endif +# define machine_is_ns_k330() (machine_arch_type == MACH_TYPE_NS_K330) +#else +# define machine_is_ns_k330() (0) +#endif + +#ifdef CONFIG_MACH_TANNA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TANNA +# endif +# define machine_is_tanna() (machine_arch_type == MACH_TYPE_TANNA) +#else +# define machine_is_tanna() (0) +#endif + +#ifdef CONFIG_MACH_IMATE8502 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IMATE8502 +# endif +# define machine_is_imate8502() (machine_arch_type == MACH_TYPE_IMATE8502) +#else +# define machine_is_imate8502() (0) +#endif + +#ifdef CONFIG_MACH_ASPEN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ASPEN +# endif +# define machine_is_aspen() (machine_arch_type == MACH_TYPE_ASPEN) +#else +# define machine_is_aspen() (0) +#endif + +#ifdef CONFIG_MACH_DAINTREE_CWAC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAINTREE_CWAC +# endif +# define machine_is_daintree_cwac() (machine_arch_type == MACH_TYPE_DAINTREE_CWAC) +#else +# define machine_is_daintree_cwac() (0) +#endif + +#ifdef CONFIG_MACH_ZMX25 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ZMX25 +# endif +# define machine_is_zmx25() (machine_arch_type == MACH_TYPE_ZMX25) +#else +# define machine_is_zmx25() (0) +#endif + +#ifdef CONFIG_MACH_MAPLE1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MAPLE1 +# endif +# define machine_is_maple1() (machine_arch_type == MACH_TYPE_MAPLE1) +#else +# define machine_is_maple1() (0) +#endif + +#ifdef CONFIG_MACH_QSD8X72_SURF +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QSD8X72_SURF +# endif +# define machine_is_qsd8x72_surf() (machine_arch_type == MACH_TYPE_QSD8X72_SURF) +#else +# define machine_is_qsd8x72_surf() (0) +#endif + +#ifdef CONFIG_MACH_QSD8X72_FFA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QSD8X72_FFA +# endif +# define machine_is_qsd8x72_ffa() (machine_arch_type == MACH_TYPE_QSD8X72_FFA) +#else +# define machine_is_qsd8x72_ffa() (0) +#endif + +#ifdef CONFIG_MACH_ABILENE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ABILENE +# endif +# define machine_is_abilene() (machine_arch_type == MACH_TYPE_ABILENE) +#else +# define machine_is_abilene() (0) +#endif + +#ifdef CONFIG_MACH_EIGEN_TTR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EIGEN_TTR +# endif +# define machine_is_eigen_ttr() (machine_arch_type == MACH_TYPE_EIGEN_TTR) +#else +# define machine_is_eigen_ttr() (0) +#endif + +#ifdef CONFIG_MACH_IOMEGA_IX2_200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IOMEGA_IX2_200 +# endif +# define machine_is_iomega_ix2_200() (machine_arch_type == MACH_TYPE_IOMEGA_IX2_200) +#else +# define machine_is_iomega_ix2_200() (0) +#endif + +#ifdef CONFIG_MACH_CORETEC_VCX7400 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CORETEC_VCX7400 +# endif +# define machine_is_coretec_vcx7400() (machine_arch_type == MACH_TYPE_CORETEC_VCX7400) +#else +# define machine_is_coretec_vcx7400() (0) +#endif + +#ifdef CONFIG_MACH_SANTIAGO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SANTIAGO +# endif +# define machine_is_santiago() (machine_arch_type == MACH_TYPE_SANTIAGO) +#else +# define machine_is_santiago() (0) +#endif + +#ifdef CONFIG_MACH_MX257SOL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX257SOL +# endif +# define machine_is_mx257sol() (machine_arch_type == MACH_TYPE_MX257SOL) +#else +# define machine_is_mx257sol() (0) +#endif + +#ifdef CONFIG_MACH_STRASBOURG +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_STRASBOURG +# endif +# define machine_is_strasbourg() (machine_arch_type == MACH_TYPE_STRASBOURG) +#else +# define machine_is_strasbourg() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X60_FLUID +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X60_FLUID +# endif +# define machine_is_msm8x60_fluid() (machine_arch_type == MACH_TYPE_MSM8X60_FLUID) +#else +# define machine_is_msm8x60_fluid() (0) +#endif + +#ifdef CONFIG_MACH_SMARTQV5 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMARTQV5 +# endif +# define machine_is_smartqv5() (machine_arch_type == MACH_TYPE_SMARTQV5) +#else +# define machine_is_smartqv5() (0) +#endif + +#ifdef CONFIG_MACH_SMARTQV3 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMARTQV3 +# endif +# define machine_is_smartqv3() (machine_arch_type == MACH_TYPE_SMARTQV3) +#else +# define machine_is_smartqv3() (0) +#endif + +#ifdef CONFIG_MACH_SMARTQV7 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMARTQV7 +# endif +# define machine_is_smartqv7() (machine_arch_type == MACH_TYPE_SMARTQV7) +#else +# define machine_is_smartqv7() (0) +#endif + +#ifdef CONFIG_MACH_PAZ00 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PAZ00 +# endif +# define machine_is_paz00() (machine_arch_type == MACH_TYPE_PAZ00) +#else +# define machine_is_paz00() (0) +#endif + +#ifdef CONFIG_MACH_ACMENETUSFOXG20 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ACMENETUSFOXG20 +# endif +# define machine_is_acmenetusfoxg20() (machine_arch_type == MACH_TYPE_ACMENETUSFOXG20) +#else +# define machine_is_acmenetusfoxg20() (0) +#endif + +#ifdef CONFIG_MACH_HTCWILLOW +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCWILLOW +# endif +# define machine_is_htcwillow() (machine_arch_type == MACH_TYPE_HTCWILLOW) +#else +# define machine_is_htcwillow() (0) +#endif + +#ifdef CONFIG_MACH_FWBD_0404 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_FWBD_0404 +# endif +# define machine_is_fwbd_0404() (machine_arch_type == MACH_TYPE_FWBD_0404) +#else +# define machine_is_fwbd_0404() (0) +#endif + +#ifdef CONFIG_MACH_HDGU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HDGU +# endif +# define machine_is_hdgu() (machine_arch_type == MACH_TYPE_HDGU) +#else +# define machine_is_hdgu() (0) +#endif + +#ifdef CONFIG_MACH_PYRAMID +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PYRAMID +# endif +# define machine_is_pyramid() (machine_arch_type == MACH_TYPE_PYRAMID) +#else +# define machine_is_pyramid() (0) +#endif + +#ifdef CONFIG_MACH_EPIPHAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EPIPHAN +# endif +# define machine_is_epiphan() (machine_arch_type == MACH_TYPE_EPIPHAN) +#else +# define machine_is_epiphan() (0) +#endif + +#ifdef CONFIG_MACH_OMAP_BENDER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP_BENDER +# endif +# define machine_is_omap_bender() (machine_arch_type == MACH_TYPE_OMAP_BENDER) +#else +# define machine_is_omap_bender() (0) +#endif + +#ifdef CONFIG_MACH_GURNARD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GURNARD +# endif +# define machine_is_gurnard() (machine_arch_type == MACH_TYPE_GURNARD) +#else +# define machine_is_gurnard() (0) +#endif + +#ifdef CONFIG_MACH_GTL_IT5100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GTL_IT5100 +# endif +# define machine_is_gtl_it5100() (machine_arch_type == MACH_TYPE_GTL_IT5100) +#else +# define machine_is_gtl_it5100() (0) +#endif + +#ifdef CONFIG_MACH_BCM2708 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BCM2708 +# endif +# define machine_is_bcm2708() (machine_arch_type == MACH_TYPE_BCM2708) +#else +# define machine_is_bcm2708() (0) +#endif + +#ifdef CONFIG_MACH_MX51_GGC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX51_GGC +# endif +# define machine_is_mx51_ggc() (machine_arch_type == MACH_TYPE_MX51_GGC) +#else +# define machine_is_mx51_ggc() (0) +#endif + +#ifdef CONFIG_MACH_SHARESPACE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SHARESPACE +# endif +# define machine_is_sharespace() (machine_arch_type == MACH_TYPE_SHARESPACE) +#else +# define machine_is_sharespace() (0) +#endif + +#ifdef CONFIG_MACH_HABA_KNX_EXPLORER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HABA_KNX_EXPLORER +# endif +# define machine_is_haba_knx_explorer() (machine_arch_type == MACH_TYPE_HABA_KNX_EXPLORER) +#else +# define machine_is_haba_knx_explorer() (0) +#endif + +#ifdef CONFIG_MACH_SIMTEC_KIRKMOD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SIMTEC_KIRKMOD +# endif +# define machine_is_simtec_kirkmod() (machine_arch_type == MACH_TYPE_SIMTEC_KIRKMOD) +#else +# define machine_is_simtec_kirkmod() (0) +#endif + +#ifdef CONFIG_MACH_CRUX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CRUX +# endif +# define machine_is_crux() (machine_arch_type == MACH_TYPE_CRUX) +#else +# define machine_is_crux() (0) +#endif + +#ifdef CONFIG_MACH_MX51_BRAVO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX51_BRAVO +# endif +# define machine_is_mx51_bravo() (machine_arch_type == MACH_TYPE_MX51_BRAVO) +#else +# define machine_is_mx51_bravo() (0) +#endif + +#ifdef CONFIG_MACH_CHARON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHARON +# endif +# define machine_is_charon() (machine_arch_type == MACH_TYPE_CHARON) +#else +# define machine_is_charon() (0) +#endif + +#ifdef CONFIG_MACH_PICOCOM3 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PICOCOM3 +# endif +# define machine_is_picocom3() (machine_arch_type == MACH_TYPE_PICOCOM3) +#else +# define machine_is_picocom3() (0) +#endif + +#ifdef CONFIG_MACH_PICOCOM4 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PICOCOM4 +# endif +# define machine_is_picocom4() (machine_arch_type == MACH_TYPE_PICOCOM4) +#else +# define machine_is_picocom4() (0) +#endif + +#ifdef CONFIG_MACH_SERRANO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SERRANO +# endif +# define machine_is_serrano() (machine_arch_type == MACH_TYPE_SERRANO) +#else +# define machine_is_serrano() (0) +#endif + +#ifdef CONFIG_MACH_DOUBLESHOT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DOUBLESHOT +# endif +# define machine_is_doubleshot() (machine_arch_type == MACH_TYPE_DOUBLESHOT) +#else +# define machine_is_doubleshot() (0) +#endif + +#ifdef CONFIG_MACH_EVSY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EVSY +# endif +# define machine_is_evsy() (machine_arch_type == MACH_TYPE_EVSY) +#else +# define machine_is_evsy() (0) +#endif + +#ifdef CONFIG_MACH_HUASHAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HUASHAN +# endif +# define machine_is_huashan() (machine_arch_type == MACH_TYPE_HUASHAN) +#else +# define machine_is_huashan() (0) +#endif + +#ifdef CONFIG_MACH_LAUSANNE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LAUSANNE +# endif +# define machine_is_lausanne() (machine_arch_type == MACH_TYPE_LAUSANNE) +#else +# define machine_is_lausanne() (0) +#endif + +#ifdef CONFIG_MACH_EMERALD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EMERALD +# endif +# define machine_is_emerald() (machine_arch_type == MACH_TYPE_EMERALD) +#else +# define machine_is_emerald() (0) +#endif + +#ifdef CONFIG_MACH_TQMA35 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TQMA35 +# endif +# define machine_is_tqma35() (machine_arch_type == MACH_TYPE_TQMA35) +#else +# define machine_is_tqma35() (0) +#endif + +#ifdef CONFIG_MACH_MARVEL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MARVEL +# endif +# define machine_is_marvel() (machine_arch_type == MACH_TYPE_MARVEL) +#else +# define machine_is_marvel() (0) +#endif + +#ifdef CONFIG_MACH_MANUAE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MANUAE +# endif +# define machine_is_manuae() (machine_arch_type == MACH_TYPE_MANUAE) +#else +# define machine_is_manuae() (0) +#endif + +#ifdef CONFIG_MACH_CHACHA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHACHA +# endif +# define machine_is_chacha() (machine_arch_type == MACH_TYPE_CHACHA) +#else +# define machine_is_chacha() (0) +#endif + +#ifdef CONFIG_MACH_LEMON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LEMON +# endif +# define machine_is_lemon() (machine_arch_type == MACH_TYPE_LEMON) +#else +# define machine_is_lemon() (0) +#endif + +#ifdef CONFIG_MACH_CSC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CSC +# endif +# define machine_is_csc() (machine_arch_type == MACH_TYPE_CSC) +#else +# define machine_is_csc() (0) +#endif + +#ifdef CONFIG_MACH_GIRA_KNXIP_ROUTER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GIRA_KNXIP_ROUTER +# endif +# define machine_is_gira_knxip_router() (machine_arch_type == MACH_TYPE_GIRA_KNXIP_ROUTER) +#else +# define machine_is_gira_knxip_router() (0) +#endif + +#ifdef CONFIG_MACH_T20 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_T20 +# endif +# define machine_is_t20() (machine_arch_type == MACH_TYPE_T20) +#else +# define machine_is_t20() (0) +#endif + +#ifdef CONFIG_MACH_HDMINI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HDMINI +# endif +# define machine_is_hdmini() (machine_arch_type == MACH_TYPE_HDMINI) +#else +# define machine_is_hdmini() (0) +#endif + +#ifdef CONFIG_MACH_SCIPHONE_G2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SCIPHONE_G2 +# endif +# define machine_is_sciphone_g2() (machine_arch_type == MACH_TYPE_SCIPHONE_G2) +#else +# define machine_is_sciphone_g2() (0) +#endif + +#ifdef CONFIG_MACH_EXPRESS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EXPRESS +# endif +# define machine_is_express() (machine_arch_type == MACH_TYPE_EXPRESS) +#else +# define machine_is_express() (0) +#endif + +#ifdef CONFIG_MACH_EXPRESS_KT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EXPRESS_KT +# endif +# define machine_is_express_kt() (machine_arch_type == MACH_TYPE_EXPRESS_KT) +#else +# define machine_is_express_kt() (0) +#endif + +#ifdef CONFIG_MACH_MAXIMASP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MAXIMASP +# endif +# define machine_is_maximasp() (machine_arch_type == MACH_TYPE_MAXIMASP) +#else +# define machine_is_maximasp() (0) +#endif + +#ifdef CONFIG_MACH_NITROGEN_IMX51 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NITROGEN_IMX51 +# endif +# define machine_is_nitrogen_imx51() (machine_arch_type == MACH_TYPE_NITROGEN_IMX51) +#else +# define machine_is_nitrogen_imx51() (0) +#endif + +#ifdef CONFIG_MACH_NITROGEN_IMX53 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NITROGEN_IMX53 +# endif +# define machine_is_nitrogen_imx53() (machine_arch_type == MACH_TYPE_NITROGEN_IMX53) +#else +# define machine_is_nitrogen_imx53() (0) +#endif + +#ifdef CONFIG_MACH_SUNFIRE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SUNFIRE +# endif +# define machine_is_sunfire() (machine_arch_type == MACH_TYPE_SUNFIRE) +#else +# define machine_is_sunfire() (0) +#endif + +#ifdef CONFIG_MACH_AROWANA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AROWANA +# endif +# define machine_is_arowana() (machine_arch_type == MACH_TYPE_AROWANA) +#else +# define machine_is_arowana() (0) +#endif + +#ifdef CONFIG_MACH_TEGRA_DAYTONA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TEGRA_DAYTONA +# endif +# define machine_is_tegra_daytona() (machine_arch_type == MACH_TYPE_TEGRA_DAYTONA) +#else +# define machine_is_tegra_daytona() (0) +#endif + +#ifdef CONFIG_MACH_TEGRA_SWORDFISH +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TEGRA_SWORDFISH +# endif +# define machine_is_tegra_swordfish() (machine_arch_type == MACH_TYPE_TEGRA_SWORDFISH) +#else +# define machine_is_tegra_swordfish() (0) +#endif + +#ifdef CONFIG_MACH_EDISON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EDISON +# endif +# define machine_is_edison() (machine_arch_type == MACH_TYPE_EDISON) +#else +# define machine_is_edison() (0) +#endif + +#ifdef CONFIG_MACH_SVP8500V1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SVP8500V1 +# endif +# define machine_is_svp8500v1() (machine_arch_type == MACH_TYPE_SVP8500V1) +#else +# define machine_is_svp8500v1() (0) +#endif + +#ifdef CONFIG_MACH_SVP8500V2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SVP8500V2 +# endif +# define machine_is_svp8500v2() (machine_arch_type == MACH_TYPE_SVP8500V2) +#else +# define machine_is_svp8500v2() (0) +#endif + +#ifdef CONFIG_MACH_SVP5500 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SVP5500 +# endif +# define machine_is_svp5500() (machine_arch_type == MACH_TYPE_SVP5500) +#else +# define machine_is_svp5500() (0) +#endif + +#ifdef CONFIG_MACH_B5500 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_B5500 +# endif +# define machine_is_b5500() (machine_arch_type == MACH_TYPE_B5500) +#else +# define machine_is_b5500() (0) +#endif + +#ifdef CONFIG_MACH_S5500 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_S5500 +# endif +# define machine_is_s5500() (machine_arch_type == MACH_TYPE_S5500) +#else +# define machine_is_s5500() (0) +#endif + +#ifdef CONFIG_MACH_ICON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ICON +# endif +# define machine_is_icon() (machine_arch_type == MACH_TYPE_ICON) +#else +# define machine_is_icon() (0) +#endif + +#ifdef CONFIG_MACH_ELEPHANT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ELEPHANT +# endif +# define machine_is_elephant() (machine_arch_type == MACH_TYPE_ELEPHANT) +#else +# define machine_is_elephant() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X60_FUSION +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X60_FUSION +# endif +# define machine_is_msm8x60_fusion() (machine_arch_type == MACH_TYPE_MSM8X60_FUSION) +#else +# define machine_is_msm8x60_fusion() (0) +#endif + +#ifdef CONFIG_MACH_SHOOTER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SHOOTER +# endif +# define machine_is_shooter() (machine_arch_type == MACH_TYPE_SHOOTER) +#else +# define machine_is_shooter() (0) +#endif + +#ifdef CONFIG_MACH_SPADE_LTE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SPADE_LTE +# endif +# define machine_is_spade_lte() (machine_arch_type == MACH_TYPE_SPADE_LTE) +#else +# define machine_is_spade_lte() (0) +#endif + +#ifdef CONFIG_MACH_PHILHWANI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PHILHWANI +# endif +# define machine_is_philhwani() (machine_arch_type == MACH_TYPE_PHILHWANI) +#else +# define machine_is_philhwani() (0) +#endif + +#ifdef CONFIG_MACH_GSNCOMM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GSNCOMM +# endif +# define machine_is_gsncomm() (machine_arch_type == MACH_TYPE_GSNCOMM) +#else +# define machine_is_gsncomm() (0) +#endif + +#ifdef CONFIG_MACH_STRASBOURG_A2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_STRASBOURG_A2 +# endif +# define machine_is_strasbourg_a2() (machine_arch_type == MACH_TYPE_STRASBOURG_A2) +#else +# define machine_is_strasbourg_a2() (0) +#endif + +#ifdef CONFIG_MACH_MMM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MMM +# endif +# define machine_is_mmm() (machine_arch_type == MACH_TYPE_MMM) +#else +# define machine_is_mmm() (0) +#endif + +#ifdef CONFIG_MACH_DAVINCI_DM365_BV +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAVINCI_DM365_BV +# endif +# define machine_is_davinci_dm365_bv() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_BV) +#else +# define machine_is_davinci_dm365_bv() (0) +#endif + +#ifdef CONFIG_MACH_AG5EVM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AG5EVM +# endif +# define machine_is_ag5evm() (machine_arch_type == MACH_TYPE_AG5EVM) +#else +# define machine_is_ag5evm() (0) +#endif + +#ifdef CONFIG_MACH_SC575PLC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SC575PLC +# endif +# define machine_is_sc575plc() (machine_arch_type == MACH_TYPE_SC575PLC) +#else +# define machine_is_sc575plc() (0) +#endif + +#ifdef CONFIG_MACH_SC575IPC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SC575IPC +# endif +# define machine_is_sc575hmi() (machine_arch_type == MACH_TYPE_SC575IPC) +#else +# define machine_is_sc575hmi() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_TDM3730 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_TDM3730 +# endif +# define machine_is_omap3_tdm3730() (machine_arch_type == MACH_TYPE_OMAP3_TDM3730) +#else +# define machine_is_omap3_tdm3730() (0) +#endif + +#ifdef CONFIG_MACH_G7 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_G7 +# endif +# define machine_is_g7() (machine_arch_type == MACH_TYPE_G7) +#else +# define machine_is_g7() (0) +#endif + +#ifdef CONFIG_MACH_TOP9000_EVAL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TOP9000_EVAL +# endif +# define machine_is_top9000_eval() (machine_arch_type == MACH_TYPE_TOP9000_EVAL) +#else +# define machine_is_top9000_eval() (0) +#endif + +#ifdef CONFIG_MACH_TOP9000_SU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TOP9000_SU +# endif +# define machine_is_top9000_su() (machine_arch_type == MACH_TYPE_TOP9000_SU) +#else +# define machine_is_top9000_su() (0) +#endif + +#ifdef CONFIG_MACH_UTM300 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UTM300 +# endif +# define machine_is_utm300() (machine_arch_type == MACH_TYPE_UTM300) +#else +# define machine_is_utm300() (0) +#endif + +#ifdef CONFIG_MACH_TSUNAGI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TSUNAGI +# endif +# define machine_is_tsunagi() (machine_arch_type == MACH_TYPE_TSUNAGI) +#else +# define machine_is_tsunagi() (0) +#endif + +#ifdef CONFIG_MACH_TS75XX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TS75XX +# endif +# define machine_is_ts75xx() (machine_arch_type == MACH_TYPE_TS75XX) +#else +# define machine_is_ts75xx() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X60_FUSN_FFA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X60_FUSN_FFA +# endif +# define machine_is_msm8x60_fusn_ffa() (machine_arch_type == MACH_TYPE_MSM8X60_FUSN_FFA) +#else +# define machine_is_msm8x60_fusn_ffa() (0) +#endif + +#ifdef CONFIG_MACH_TS47XX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TS47XX +# endif +# define machine_is_ts47xx() (machine_arch_type == MACH_TYPE_TS47XX) +#else +# define machine_is_ts47xx() (0) +#endif + +#ifdef CONFIG_MACH_DA850_K5 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DA850_K5 +# endif +# define machine_is_da850_k5() (machine_arch_type == MACH_TYPE_DA850_K5) +#else +# define machine_is_da850_k5() (0) +#endif + +#ifdef CONFIG_MACH_AX502 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AX502 +# endif +# define machine_is_ax502() (machine_arch_type == MACH_TYPE_AX502) +#else +# define machine_is_ax502() (0) +#endif + +#ifdef CONFIG_MACH_IGEP0032 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IGEP0032 +# endif +# define machine_is_igep0032() (machine_arch_type == MACH_TYPE_IGEP0032) +#else +# define machine_is_igep0032() (0) +#endif + +#ifdef CONFIG_MACH_ANTERO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ANTERO +# endif +# define machine_is_antero() (machine_arch_type == MACH_TYPE_ANTERO) +#else +# define machine_is_antero() (0) +#endif + +#ifdef CONFIG_MACH_SYNERGY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SYNERGY +# endif +# define machine_is_synergy() (machine_arch_type == MACH_TYPE_SYNERGY) +#else +# define machine_is_synergy() (0) +#endif + +#ifdef CONFIG_MACH_ICS_IF_VOIP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ICS_IF_VOIP +# endif +# define machine_is_ics_if_voip() (machine_arch_type == MACH_TYPE_ICS_IF_VOIP) +#else +# define machine_is_ics_if_voip() (0) +#endif + +#ifdef CONFIG_MACH_WLF_CRAGG_6410 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WLF_CRAGG_6410 +# endif +# define machine_is_wlf_cragg_6410() (machine_arch_type == MACH_TYPE_WLF_CRAGG_6410) +#else +# define machine_is_wlf_cragg_6410() (0) +#endif + +#ifdef CONFIG_MACH_PUNICA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PUNICA +# endif +# define machine_is_punica() (machine_arch_type == MACH_TYPE_PUNICA) +#else +# define machine_is_punica() (0) +#endif + +#ifdef CONFIG_MACH_SBC_NT250 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC_NT250 +# endif +# define machine_is_sbc_nt250() (machine_arch_type == MACH_TYPE_SBC_NT250) +#else +# define machine_is_sbc_nt250() (0) +#endif + +#ifdef CONFIG_MACH_MX27_WMULTRA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX27_WMULTRA +# endif +# define machine_is_mx27_wmultra() (machine_arch_type == MACH_TYPE_MX27_WMULTRA) +#else +# define machine_is_mx27_wmultra() (0) +#endif + +#ifdef CONFIG_MACH_MACKEREL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MACKEREL +# endif +# define machine_is_mackerel() (machine_arch_type == MACH_TYPE_MACKEREL) +#else +# define machine_is_mackerel() (0) +#endif + +#ifdef CONFIG_MACH_FA9X27 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_FA9X27 +# endif +# define machine_is_fa9x27() (machine_arch_type == MACH_TYPE_FA9X27) +#else +# define machine_is_fa9x27() (0) +#endif + +#ifdef CONFIG_MACH_NS2816TB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NS2816TB +# endif +# define machine_is_ns2816tb() (machine_arch_type == MACH_TYPE_NS2816TB) +#else +# define machine_is_ns2816tb() (0) +#endif + +#ifdef CONFIG_MACH_NS2816_NTPAD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NS2816_NTPAD +# endif +# define machine_is_ns2816_ntpad() (machine_arch_type == MACH_TYPE_NS2816_NTPAD) +#else +# define machine_is_ns2816_ntpad() (0) +#endif + +#ifdef CONFIG_MACH_NS2816_NTNB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NS2816_NTNB +# endif +# define machine_is_ns2816_ntnb() (machine_arch_type == MACH_TYPE_NS2816_NTNB) +#else +# define machine_is_ns2816_ntnb() (0) +#endif + +#ifdef CONFIG_MACH_KAEN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_KAEN +# endif +# define machine_is_kaen() (machine_arch_type == MACH_TYPE_KAEN) +#else +# define machine_is_kaen() (0) +#endif + +#ifdef CONFIG_MACH_NV1000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NV1000 +# endif +# define machine_is_nv1000() (machine_arch_type == MACH_TYPE_NV1000) +#else +# define machine_is_nv1000() (0) +#endif + +#ifdef CONFIG_MACH_NUC950TS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NUC950TS +# endif +# define machine_is_nuc950ts() (machine_arch_type == MACH_TYPE_NUC950TS) +#else +# define machine_is_nuc950ts() (0) +#endif + +#ifdef CONFIG_MACH_NOKIA_RM680 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NOKIA_RM680 +# endif +# define machine_is_nokia_rm680() (machine_arch_type == MACH_TYPE_NOKIA_RM680) +#else +# define machine_is_nokia_rm680() (0) +#endif + +#ifdef CONFIG_MACH_AST2200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AST2200 +# endif +# define machine_is_ast2200() (machine_arch_type == MACH_TYPE_AST2200) +#else +# define machine_is_ast2200() (0) +#endif + +#ifdef CONFIG_MACH_LEAD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LEAD +# endif +# define machine_is_lead() (machine_arch_type == MACH_TYPE_LEAD) +#else +# define machine_is_lead() (0) +#endif + +#ifdef CONFIG_MACH_UNINO1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UNINO1 +# endif +# define machine_is_unino1() (machine_arch_type == MACH_TYPE_UNINO1) +#else +# define machine_is_unino1() (0) +#endif + +#ifdef CONFIG_MACH_GREECO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GREECO +# endif +# define machine_is_greeco() (machine_arch_type == MACH_TYPE_GREECO) +#else +# define machine_is_greeco() (0) +#endif + +#ifdef CONFIG_MACH_VERDI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VERDI +# endif +# define machine_is_verdi() (machine_arch_type == MACH_TYPE_VERDI) +#else +# define machine_is_verdi() (0) +#endif + +#ifdef CONFIG_MACH_DM6446_ADBOX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DM6446_ADBOX +# endif +# define machine_is_dm6446_adbox() (machine_arch_type == MACH_TYPE_DM6446_ADBOX) +#else +# define machine_is_dm6446_adbox() (0) +#endif + +#ifdef CONFIG_MACH_QUAD_SALSA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QUAD_SALSA +# endif +# define machine_is_quad_salsa() (machine_arch_type == MACH_TYPE_QUAD_SALSA) +#else +# define machine_is_quad_salsa() (0) +#endif + +#ifdef CONFIG_MACH_ABB_GMA_1_1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ABB_GMA_1_1 +# endif +# define machine_is_abb_gma_1_1() (machine_arch_type == MACH_TYPE_ABB_GMA_1_1) +#else +# define machine_is_abb_gma_1_1() (0) +#endif + +#ifdef CONFIG_MACH_SVCID +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SVCID +# endif +# define machine_is_svcid() (machine_arch_type == MACH_TYPE_SVCID) +#else +# define machine_is_svcid() (0) +#endif + +#ifdef CONFIG_MACH_MSM8960_SIM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8960_SIM +# endif +# define machine_is_msm8960_sim() (machine_arch_type == MACH_TYPE_MSM8960_SIM) +#else +# define machine_is_msm8960_sim() (0) +#endif + +#ifdef CONFIG_MACH_MSM8960_RUMI3 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8960_RUMI3 +# endif +# define machine_is_msm8960_rumi3() (machine_arch_type == MACH_TYPE_MSM8960_RUMI3) +#else +# define machine_is_msm8960_rumi3() (0) +#endif + +#ifdef CONFIG_MACH_ICON_G +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ICON_G +# endif +# define machine_is_icon_g() (machine_arch_type == MACH_TYPE_ICON_G) +#else +# define machine_is_icon_g() (0) +#endif + +#ifdef CONFIG_MACH_MB3 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MB3 +# endif +# define machine_is_mb3() (machine_arch_type == MACH_TYPE_MB3) +#else +# define machine_is_mb3() (0) +#endif + +#ifdef CONFIG_MACH_GSIA18S +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GSIA18S +# endif +# define machine_is_gsia18s() (machine_arch_type == MACH_TYPE_GSIA18S) +#else +# define machine_is_gsia18s() (0) +#endif + +#ifdef CONFIG_MACH_PIVICC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PIVICC +# endif +# define machine_is_pivicc() (machine_arch_type == MACH_TYPE_PIVICC) +#else +# define machine_is_pivicc() (0) +#endif + +#ifdef CONFIG_MACH_PCM048 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PCM048 +# endif +# define machine_is_pcm048() (machine_arch_type == MACH_TYPE_PCM048) +#else +# define machine_is_pcm048() (0) +#endif + +#ifdef CONFIG_MACH_DDS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DDS +# endif +# define machine_is_dds() (machine_arch_type == MACH_TYPE_DDS) +#else +# define machine_is_dds() (0) +#endif + +#ifdef CONFIG_MACH_CHALTEN_XA1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHALTEN_XA1 +# endif +# define machine_is_chalten_xa1() (machine_arch_type == MACH_TYPE_CHALTEN_XA1) +#else +# define machine_is_chalten_xa1() (0) +#endif + /* * These have not yet been registered */ -- 1.6.0.4

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[U-Boot] [PATCH] libgenwrap.c: fix build error
by Wolfgang Denk 29 Dec '10

29 Dec '10

Commit 882b7d7 "do_reset: unify duplicate prototypes" introduced build problems like this: libgenwrap.c:85: error: conflicting types for 'do_reset' /home/wd/git/u-boot/work/include/command.h:102: error: previous declaration of 'do_reset' was here Signed-off-by: Wolfgang Denk <wd(a)denx.de> Cc: Mike Frysinger <vapier(a)gentoo.org> --- examples/api/libgenwrap.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c index 9733bbc..873cf34 100644 --- a/examples/api/libgenwrap.c +++ b/examples/api/libgenwrap.c @@ -81,9 +81,10 @@ void __udelay(unsigned long usec) ub_udelay(usec); } -void do_reset (void) +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ub_reset(); + return 0; } void *malloc (size_t len) -- 1.7.3.3

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[U-Boot] Please pull u-boot-ti/master
by s-paulraj＠ti.com 29 Dec '10

29 Dec '10

Albert, Please pull u-boot-ti/master This pull request consists of an update to the ARM mach-types. Also added some fixes and minor enhancements to DaVinci support. Most of the patches are either in an internal TI tree or have been sent to the list but never made it upstream. Regards, Sandeep The following changes since commit 71bbbc293f1b55b8650807588344508dc6e259b3: Sandeep Paulraj (1): Merge branch 'master' of git://git.denx.de/u-boot-ti are available in the git repository at: git://git.denx.de/u-boot-ti.git master Sandeep Paulraj (6): DM365: Fix Build Error DaVinci EMAC: Fix davinci_eth_gigabit_enable DaVinci EMAC: Add name to Ethernet device DaVinci DM6467: Added ET1011C (LSI) PHY support ARM: Update mach types DaVinci DM6467: Enhance board Support arch/arm/cpu/arm926ejs/davinci/Makefile | 2 +- arch/arm/cpu/arm926ejs/davinci/et1011c.c | 55 + arch/arm/include/asm/arch-davinci/emac_defs.h | 3 + arch/arm/include/asm/arch-davinci/hardware.h | 1 + arch/arm/include/asm/mach-types.h | 2305 ++++++++++++++++++++++++- board/davinci/common/misc.c | 2 +- board/davinci/dm6467evm/dm6467evm.c | 26 + drivers/net/davinci_emac.c | 15 +- include/configs/davinci_dm6467evm.h | 30 +- 9 files changed, 2417 insertions(+), 22 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/davinci/et1011c.c

3 3

[U-Boot] [PATCH] DaVinci DM6467: Enhance board Support
by s-paulraj＠ti.com 28 Dec '10

28 Dec '10

From: Sandeep Paulraj <s-paulraj(a)ti.com> Support for DM6467 was incomplete and the build failed as well. Patches were sent to the list but have not been added. This enhances the DM6467 support. Some more patches will need to be sent to bring it in line with what is available in internal TI trees Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> --- arch/arm/include/asm/arch-davinci/hardware.h | 1 + board/davinci/dm6467evm/dm6467evm.c | 26 ++++++++++++++++++++++ include/configs/davinci_dm6467evm.h | 30 ++++++++++++++++++++++++- 3 files changed, 55 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index b95fa97..df3f549 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -209,6 +209,7 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_DM646X_LPSC_EMAC 14 #define DAVINCI_DM646X_LPSC_UART0 26 #define DAVINCI_DM646X_LPSC_I2C 31 +#define DAVINCI_DM646X_LPSC_TIMER0 34 #else /* CONFIG_SOC_DA8XX */ diff --git a/board/davinci/dm6467evm/dm6467evm.c b/board/davinci/dm6467evm/dm6467evm.c index 994a9aa..1a01c3c 100644 --- a/board/davinci/dm6467evm/dm6467evm.c +++ b/board/davinci/dm6467evm/dm6467evm.c @@ -17,6 +17,7 @@ */ #include <common.h> +#include <netdev.h> #include <asm/io.h> #include <nand.h> #include <asm/arch/nand_defs.h> @@ -28,8 +29,33 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM6467_EVM; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + lpsc_on(DAVINCI_DM646X_LPSC_TIMER0); + lpsc_on(DAVINCI_DM646X_LPSC_UART0); + lpsc_on(DAVINCI_DM646X_LPSC_I2C); + lpsc_on(DAVINCI_DM646X_LPSC_EMAC); + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0x80000c0; + + /* Select UART function on UART0 */ + REG(PINMUX0) &= ~(0x0000003f << 18); + REG(PINMUX1) &= ~(0x00000003); + + return 0; +} + +#if defined(CONFIG_DRIVER_TI_EMAC) + +int board_eth_init(bd_t *bis) +{ + if (!davinci_emac_initialize()) { + printf("Error: Ethernet init failed!\n"); + return -1; + } + return 0; } +#endif /* CONFIG_DRIVER_TI_EMAC */ #ifdef CONFIG_NAND_DAVINCI int board_nand_init(struct nand_chip *nand) diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index 3ef4555..a0a30f5 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -22,13 +22,26 @@ /* Spectrum Digital TMS320DM6467 EVM board */ #define DAVINCI_DM6467EVM +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_USE_NAND +#define CONFIG_SYS_NAND_SMALLPAGE #define CONFIG_SKIP_LOWLEVEL_INIT /* SoC Configuration */ #define CONFIG_ARM926EJS /* arm926ejs CPU */ + +/* Clock rates detection */ +#ifndef __ASSEMBLY__ +extern unsigned int davinci_arm_clk_get(void); +#endif + +#define CFG_REFCLK_FREQ 27000000 +/* Arm Clock frequency */ +#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get() +/* Timer Input clock freq */ +#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2) #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ -#define CONFIG_SYS_HZ_CLOCK 27000000 #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM646X @@ -69,6 +82,18 @@ #define CONFIG_SYS_I2C_SPEED 80000 #define CONFIG_SYS_I2C_SLAVE 10 +/* Network & Ethernet Configuration */ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_EMAC_MDIO_PHY_NUM 1 +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#define CONFIG_CMD_NET + /* Flash & Environment */ #define CONFIG_SYS_NO_FLASH #ifdef CONFIG_SYS_USE_NAND @@ -116,7 +141,8 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_SAVES #define CONFIG_CMD_EEPROM -#undef CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR -- 1.6.0.4

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