December 2010 - U-Boot

[U-Boot] I Need Your Help
by Mrs Elizabeth Etters 05 Dec '10

05 Dec '10

I am Mrs. Elizabeth Etters,a devoted Christian. I have a foundation/Estateuncompleted{valued at GBP 2.1 million Pounds}and need you to help me finishit because of my health,Everything is available. Please contact me for more details. Private contactemail: eliza.etters(a)yahoo.com thank you

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[U-Boot] I Need Your Help
by Mrs Elizabeth Etters 05 Dec '10

05 Dec '10

I am Mrs. Elizabeth Etters,a devoted Christian. I have a foundation/Estateuncompleted{valued at GBP 2.1 million Pounds}and need you to help me finishit because of my health,Everything is available. Please contact me for more details. Private contactemail: eliza.etters(a)yahoo.com thank you

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[U-Boot] [PATCH] AT91: fix EMAC gpio init in at91sam9260_devices.c
by Reinhard Meyer 05 Dec '10

05 Dec '10

The AT91SAM9G20 BOOT ROM apparently initializes PA23 and PA24 to multi drive (open drain). Revert this, if those pins are going to be used for MII. Signed-off-by: Reinhard Meyer <u-boot(a)emk-elektronik.de> --- arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c index f699f4d..c1822b7 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -204,6 +204,11 @@ void at91_macb_hw_init(void) #else at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */ at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */ +#if defined(CONFIG_AT91SAM9G20) + /* 9G20 BOOT ROM initializes those pins to multi-drive, undo that */ + at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 0); + at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 0); +#endif #endif at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */ #endif -- 1.5.6.5

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[U-Boot] [PATCH] AT91: gen_atmel_mci.c: fix bug when Slot B is used
by Reinhard Meyer 05 Dec '10

05 Dec '10

Signed-off-by: Reinhard Meyer <u-boot(a)emk-elektronik.de> --- drivers/mmc/gen_atmel_mci.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 5463250..c28c469 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -308,6 +308,7 @@ static int mci_init(struct mmc *mmc) writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */ writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */ writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */ + writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); /* select port */ /* Initial Time-outs */ writel(0x5f, &mci->dtor); -- 1.5.6.5

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[U-Boot] [RFC 0/3] Enhance env tools
by Steve Sakoman 05 Dec '10

05 Dec '10

There are circustances where it is desirable to run the environment tools on your build machine in order to create an environment image that can be written to the target machine at a later time. This patch series introduces a number of enhancements to the tools that make this possible. The first patch allows allows one to override the default location of the tool config file by setting a FW_CONFIG_FILE environment variable. The second patch allows the environment to be written to a regular file. The third patch increases the devname length to 4096 in order to support writing to normal files in addition to mtd devices. Loïc Minier (3): tools/env: Default to the config specified in FW_CONFIG_FILE tools/env: Support writing to files tools/env: Bump devname length to PATH_MAX for filenames tools/env/fw_env.c | 107 ++++++++++++++++++++++++++++++++++++---------------- 1 files changed, 74 insertions(+), 33 deletions(-)

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[U-Boot] Issues after resetenv!
by Meisam Farsi 05 Dec '10

05 Dec '10

Summary: I had some issues with the uboot to many commands that I wanted to remove so i did a resetenv, without RTFM. Thinking that I could do a "resetenv" to clear out the environment variable and start scratch as I got a listing of the known good environment variables. Did a reset Result: uboot loaded, but all of the variable are GONE... eg. ## Error: environment overflow, "ethaddr" deleted ## Error: environment overflow, "ipaddr" deleted ## Error: environment overflow, "serverip" deleted ## Error: environment overflow, "netmask" deleted ## Error: environment overflow, "image_name" deleted ## Error: environment overflow, "console" deleted ## Error: environment overflow, "bootargs_root" deleted ## Error: environment overflow, "rootpath" deleted ## Error: environment overflow, "ethact" deleted Notice: The ethact variable never came up, so the Gig-E interface never booted. 1) I tried to re-applied each variable that I had save using setenv .... and then saveenv. - NO LUCK. 2) I've have a TFTP server on my machine, after I get into uboot serial, I tried a "rcvr" and it tried to pick up a and load a "uImage" from the TFTP server, then it bomb out because the variable are not set. Looking for help: Before I really dig myself into a deeper hole, is there a way to restore the env. Is it in the original factory u-boot.bin. If it's in the u-boot.bin, How do I load this u-boot.bin back into NAND? I have a Prolific PL-2303 USB cable connected to the box. I can post log of the boot process if needed. __ __ _ _ | \/ | __ _ _ ____ _____| | | | |\/| |/ _` | '__\ \ / / _ \ | | | | | | (_| | | \ V / __/ | | |_| |_|\__,_|_| \_/ \___|_|_| _ _ ____ _ | | | | | __ ) ___ ___ | |_ | | | |___| _ \ / _ \ / _ \| __| | |_| |___| |_) | (_) | (_) | |_ \___/ |____/ \___/ \___/ \__| ** MARVELL BOARD: RD-88F6281A LE U-Boot 1.1.4 (Sep 4 2009 - 09:36:11) Marvell version: 3.4.14 U-Boot code: 00600000 -> 0067FFF0 BSS: -> 006CEE60 Soc: 88F6281 A0 (DDR2) CPU running @ 1000Mhz L2 running @ 333Mhz SysClock = 333Mhz , TClock = 200Mhz DRAM CAS Latency = 5 tRP = 5 tRAS = 18 tRCD=6 DRAM CS[0] base 0x00000000 size 64MB DRAM CS[1] base 0x04000000 size 64MB DRAM Total size 128MB 16bit width Flash: 0 kB Addresses 8M - 0M are saved for the U-Boot usage. Mem malloc Initialization (8M - 7M): Done NAND:256 MB CRC in Flash: ffffffff, Calculated CRC: 619d86db +++++++++++++++++++++++++++Checksum Error!++++++++++++++++++++++++++++++ +++++++++++++++++++++++++++Checksum Error!++++++++++++++++++++++++++++++ +++++++++++++++++++++++++++Checksum Error!++++++++++++++++++++++++++++++ +++++++++++++++++++++++++++Checksum Error!++++++++++++++++++++++++++++++ +++++++++++++++++++++++++++Checksum Error!++++++++++++++++++++++++++++++ ## Error: environment overflow, "stdin" deleted ## Error: environment overflow, "stdout" deleted ## Error: environment overflow, "stderr" deleted CPU : Marvell Feroceon (Rev 1) ## Error: environment overflow, "console" deleted ## Error: environment overflow, "mainlineLinux" deleted ## Error: environment overflow, "CASset" deleted ## Error: environment overflow, "enaMonExt" deleted ## Error: environment overflow, "enaCpuStream" deleted ## Error: environment overflow, "enaWrAllo" deleted ## Error: environment overflow, "pexMode" deleted ## Error: environment overflow, "disL2Cache" deleted ## Error: environment overflow, "setL2CacheWT" deleted ## Error: environment overflow, "disL2Prefetch" deleted ## Error: environment overflow, "enaICPref" deleted ## Error: environment overflow, "enaDCPref" deleted ## Error: environment overflow, "sata_dma_mode" deleted ## Error: environment overflow, "MALLOC_len" deleted ## Error: environment overflow, "ethprime" deleted ## Error: environment overflow, "netbsd_en" deleted ## Error: environment overflow, "vxworks_en" deleted ## Error: environment overflow, "bootargs_root" deleted ## Error: environment overflow, "bootargs_end" deleted ## Error: environment overflow, "image_name" deleted ## Error: environment overflow, "bootcmd" deleted ## Error: environment overflow, "standalone" deleted ## Error: environment overflow, "bootdelay" deleted ## Error: environment overflow, "disaMvPnp" deleted ## Error: environment overflow, "disaMvPnp" deleted ## Error: environment overflow, "ethaddr" deleted ## Error: environment overflow, "ethmtu" deleted ## Error: environment overflow, "eth1addr" deleted ## Error: environment overflow, "eth1mtu" deleted ## Error: environment overflow, "mvPhoneConfig" deleted ## Error: environment overflow, "mvNetConfig" deleted ## Error: environment overflow, "usb0Mode" deleted ## Error: environment overflow, "yuk_ethaddr" deleted ## Error: environment overflow, "nandEcc" deleted ## Error: environment overflow, "hddPowerCtrl" deleted ## Error: environment overflow, "netretry" deleted ## Error: environment overflow, "rcvrip" deleted ## Error: environment overflow, "loadaddr" deleted ## Error: environment overflow, "autoload" deleted ## Error: environment overflow, "enaAutoRecovery" deleted Streaming disabled Write allocate disabled Module 0 is RGMII Module 1 is TDM USB 0: device mode PEX 0: interface detected no Link. Net: ## Error: environment overflow, "ethact" deleted egiga0, egiga1## Error: environment overflow, "ethact" deleted USB: scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found Aquiring an IP address using DHCP... ## Error: environment overflow, "ethact" deleted *** ERROR: `ethaddr' not set ## Error: environment overflow, "ethact" deleted egiga1 no link ## Error: environment overflow, "ethact" deleted ## Error: environment overflow, "ethact" deleted *** ERROR: `ethaddr' not set ## Error: environment overflow, "ethact" deleted egiga1 no link ## Error: environment overflow, "ethact" deleted ## Error: environment overflow, "ethact" deleted *** ERROR: `ethaddr' not set ## Error: environment overflow, "ethact" deleted egiga1 no link ## Error: environment overflow, "ethact" deleted Failed to retreive an IP address assuming default (<NULL>)! Starting the Recovery process to retreive the file... ## Error: environment overflow, "ethact" deleted *** ERROR: `ethaddr' not set ## Error: environment overflow, "ethact" deleted egiga1 no link ## Error: environment overflow, "ethact" deleted Failed Power Button is pressed! MPP Sel: 00000530, Data IN Enable: 00020058, Data In Polarity: 00000040, Data In: 00000011 Power Button is released! MAC: 00:01:01:E6:33:72, IP: 10.230.51.114 ## Error: environment overflow, "ethaddr" deleted ## Error: environment overflow, "ipaddr" deleted ## Error: environment overflow, "serverip" deleted ## Error: environment overflow, "netmask" deleted ## Error: environment overflow, "image_name" deleted ## Error: environment overflow, "console" deleted ## Error: environment overflow, "bootargs_root" deleted ## Error: environment overflow, "rootpath" deleted ## Error: environment overflow, "ethact" deleted *** ERROR: `serverip' not set ## Error: environment overflow, "bootargs" deleted ## Booting image at 00800000 ... Bad Magic Number Marvell>> Marvell>> Marvell>> Marvell>> printenv ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ Best Regards

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[U-Boot] [PATCH 0/6 v2] Support for Bootstrap Code
by Luigi 'Comio' Mantellini 05 Dec '10

05 Dec '10

From: Luigi 'Comio' Mantellini <luigi.mantellini(a)idf-hit.com> The following patch set add the support for Bootstrap code. This permits to have a compressed full featured U-Boot binary. See README file in the U-Boot root. The patchset includes also the XZ format support and a fix to LZMA code. Luigi 'Comio' Mantellini (6): Add support for XZ decompression algorithm. LZMA: Avoid free on null pointer Enable garbage collelction of unused input sections. Add support for Bootstrap infrastructure. Enable bootstrap support for MIPS architecture. Enable bootstrap code for QEMU-MIPS board. .gitignore | 25 +- Makefile | 175 +++++- README | 56 ++ arch/mips/config.mk | 2 +- arch/mips/cpu/Makefile | 28 +- arch/mips/cpu/cpu.c | 12 - arch/mips/cpu/reset.c | 39 ++ arch/mips/cpu/reset_bootstrap.c | 39 ++ arch/mips/cpu/start_bootstrap.S | 455 +++++++++++++ arch/mips/lib/Makefile | 15 +- arch/mips/lib/board_bootstrap.c | 331 +++++++++ board/qemu-mips/Makefile | 15 +- board/qemu-mips/config.mk | 7 +- board/qemu-mips/qemu-mips_bootstrap.c | 48 ++ board/qemu-mips/u-boot-bootstrap.lds | 73 ++ common/Makefile | 16 +- common/cmd_bootm.c | 27 +- common/console_bootstrap.c | 85 +++ common/image.c | 1 + config.mk | 29 + include/bootstrap.h | 59 ++ include/common.h | 21 + include/configs/qemu-mips.h | 15 +- include/image.h | 1 + include/unxz.h | 16 + include/xz.h | 237 +++++++ lib/Makefile | 29 +- lib/bootstrap.c | 97 +++ lib/lzma/LzmaDec.c | 4 +- lib/lzma/Makefile | 4 +- lib/lzo/Makefile | 4 +- lib/xz/Makefile | 53 ++ lib/xz/decompress_unxz.c | 231 +++++++ lib/xz/xz_dec_bcj.c | 564 ++++++++++++++++ lib/xz/xz_dec_lzma2.c | 1175 +++++++++++++++++++++++++++++++++ lib/xz/xz_dec_stream.c | 823 +++++++++++++++++++++++ lib/xz/xz_lzma2.h | 204 ++++++ lib/xz/xz_private.h | 154 +++++ lib/xz/xz_stream.h | 50 ++ tools/xz_wrap.sh | 45 ++ 40 files changed, 5232 insertions(+), 32 deletions(-) create mode 100644 arch/mips/cpu/reset.c create mode 100644 arch/mips/cpu/reset_bootstrap.c create mode 100644 arch/mips/cpu/start_bootstrap.S create mode 100644 arch/mips/lib/board_bootstrap.c create mode 100644 board/qemu-mips/qemu-mips_bootstrap.c create mode 100644 board/qemu-mips/u-boot-bootstrap.lds create mode 100644 common/console_bootstrap.c create mode 100644 include/bootstrap.h create mode 100644 include/unxz.h create mode 100644 include/xz.h create mode 100644 lib/bootstrap.c create mode 100644 lib/xz/Makefile create mode 100644 lib/xz/decompress_unxz.c create mode 100644 lib/xz/xz_dec_bcj.c create mode 100644 lib/xz/xz_dec_lzma2.c create mode 100644 lib/xz/xz_dec_stream.c create mode 100644 lib/xz/xz_lzma2.h create mode 100644 lib/xz/xz_private.h create mode 100644 lib/xz/xz_stream.h create mode 100755 tools/xz_wrap.sh -- 1.7.3

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[U-Boot] [PATCH] OMAP3: SPI driver
by Dirk Behme 04 Dec '10

04 Dec '10

CC: Ruslan N. Araslanov <byaaka(a)yandex.ru> Signed-off-by: Ruslan Araslanov <ruslan.araslanov(a)vitecmm.com> --- I got this patch in a private mail from Ruslan with the comment: "I have some changes in this driver. It works with SPI flash memory and with other devices." He seems to be too shy to send it himself (?) So I just send it, maybe it's useful for somebody. If you like to comment on this patch, please send comments or questions directly to Ruslan. Note: Checkpatch still complains about some lines over 80 characters. I think this is acceptable, fixing this would make the style even worse. Thanks Dirk drivers/spi/Makefile | 1 drivers/spi/omap3_spi.c | 352 +++++++++++++++++++++++++++++++++++++++++ drivers/spi/omap3_spi.h | 117 +++++++++++++ include/configs/omap3_beagle.h | 2 4 files changed, 472 insertions(+) Index: u-boot.git/drivers/spi/Makefile =================================================================== --- u-boot.git.orig/drivers/spi/Makefile +++ u-boot.git/drivers/spi/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o +COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o COBJS := $(COBJS-y) Index: u-boot.git/include/configs/omap3_beagle.h =================================================================== --- u-boot.git.orig/include/configs/omap3_beagle.h +++ u-boot.git/include/configs/omap3_beagle.h @@ -335,4 +335,6 @@ extern unsigned int boot_flash_type; CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +#define CONFIG_OMAP3_SPI + #endif /* __CONFIG_H */ Index: u-boot.git/drivers/spi/omap3_spi.c =================================================================== --- /dev/null +++ u-boot.git/drivers/spi/omap3_spi.c @@ -0,0 +1,352 @@ +/* + * Copyright (C) 2010 Dirk Behme <dirk.behme(a)googlemail.com> + * + * Driver for McSPI controller on OMAP3. Based on davinci_spi.c + * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * + * Copyright (C) 2007 Atmel Corporation + * + * Parts taken from linux/drivers/spi/omap2_mcspi.c + * Copyright (C) 2005, 2006 Nokia Corporation + * + * Modified by Ruslan Araslanov <ruslan.araslanov(a)vitecmm.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <spi.h> +#include <malloc.h> +#include <asm/io.h> +#include "omap3_spi.h" + +#define WORD_LEN 8 +#define SPI_WAIT_TIMEOUT 3000000; + +static void spi_reset(struct omap3_spi_slave *ds) +{ + unsigned int tmp; + + writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, &ds->regs->sysconfig); + do { + tmp = readl(&ds->regs->sysstatus); + } while (!(tmp & OMAP3_MCSPI_SYSSTATUS_RESETDONE)); + + writel(OMAP3_MCSPI_SYSCONFIG_AUTOIDLE | + OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP | + OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, + &ds->regs->sysconfig); + + writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, &ds->regs->wakeupenable); +} + +void spi_init() +{ + /* do nothing */ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct omap3_spi_slave *ds; + + ds = malloc(sizeof(struct omap3_spi_slave)); + if (!ds) { + printf("SPI error: malloc of SPI structure failed\n"); + return NULL; + } + + /* + * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) + * with different number of chip selects (CS, channels): + * McSPI1 has 4 CS (bus 0, cs 0 - 3) + * McSPI2 has 2 CS (bus 1, cs 0 - 1) + * McSPI3 has 2 CS (bus 2, cs 0 - 1) + * McSPI4 has 1 CS (bus 3, cs 0) + */ + + switch (bus) { + case 0: + ds->regs = (struct mcspi *)OMAP3_MCSPI1_BASE; + break; + case 1: + ds->regs = (struct mcspi *)OMAP3_MCSPI2_BASE; + break; + case 2: + ds->regs = (struct mcspi *)OMAP3_MCSPI3_BASE; + break; + case 3: + ds->regs = (struct mcspi *)OMAP3_MCSPI4_BASE; + break; + default: + printf("SPI error: unsupported bus %i. \ + Supported busses 0 - 3\n", bus); + return NULL; + } + ds->slave.bus = bus; + + if (((bus == 0) && (cs > 3)) || + ((bus == 1) && (cs > 1)) || + ((bus == 2) && (cs > 1)) || + ((bus == 3) && (cs > 0))) { + printf("SPI error: unsupported chip select %i \ + on bus %i\n", cs, bus); + return NULL; + } + ds->slave.cs = cs; + + if (max_hz > OMAP3_MCSPI_MAX_FREQ) { + printf("SPI error: unsupported frequency %i Hz. \ + Max frequency is 48 Mhz\n", max_hz); + return NULL; + } + ds->freq = max_hz; + + if (mode > SPI_MODE_3) { + printf("SPI error: unsupported SPI mode %i\n", mode); + return NULL; + } + ds->mode = mode; + + return &ds->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + + free(ds); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + unsigned int conf, div = 0; + + /* McSPI global module configuration */ + + /* + * setup when switching from (reset default) slave mode + * to single-channel master mode + */ + spi_reset(ds); + conf = readl(&ds->regs->modulctrl); + conf &= ~(OMAP3_MCSPI_MODULCTRL_STEST | OMAP3_MCSPI_MODULCTRL_MS); + conf |= OMAP3_MCSPI_MODULCTRL_SINGLE; + writel(conf, &ds->regs->modulctrl); + + /* McSPI individual channel configuration */ + + /* Calculate clock divisor. Valid range: 0x0 - 0xC ( /1 - /4096 ) */ + if (ds->freq) { + while (div <= 0xC && (OMAP3_MCSPI_MAX_FREQ / (1 << div)) + > ds->freq) + div++; + } else + div = 0xC; + + conf = readl(&ds->regs->channel[ds->slave.cs].chconf); + + /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS + * REVISIT: this controller could support SPI_3WIRE mode. + */ + conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); + conf |= OMAP3_MCSPI_CHCONF_DPE0; + + /* wordlength */ + conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; + conf |= (WORD_LEN - 1) << 7; + + /* set chipselect polarity; manage with FORCE */ + if (!(ds->mode & SPI_CS_HIGH)) + conf |= OMAP3_MCSPI_CHCONF_EPOL; /* active-low; normal */ + else + conf &= ~OMAP3_MCSPI_CHCONF_EPOL; + + /* set clock divisor */ + conf &= ~OMAP3_MCSPI_CHCONF_CLKD_MASK; + conf |= div << 2; + + /* set SPI mode 0..3 */ + if (ds->mode & SPI_CPOL) + conf |= OMAP3_MCSPI_CHCONF_POL; + else + conf &= ~OMAP3_MCSPI_CHCONF_POL; + if (ds->mode & SPI_CPHA) + conf |= OMAP3_MCSPI_CHCONF_PHA; + else + conf &= ~OMAP3_MCSPI_CHCONF_PHA; + + /* Transmit & receive mode */ + conf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK; + + writel(conf, &ds->regs->channel[ds->slave.cs].chconf); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + + /* Reset the SPI hardware */ + spi_reset(ds); +} + +int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp, + unsigned long flags) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + int i; + int timeout = SPI_WAIT_TIMEOUT; + int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + + if (flags & SPI_XFER_BEGIN) + writel(OMAP3_MCSPI_CHCTRL_EN, + &ds->regs->channel[ds->slave.cs].chctrl); + + chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK; + chconf |= OMAP3_MCSPI_CHCONF_TRM_TX_ONLY; + chconf |= OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, &ds->regs->channel[ds->slave.cs].chconf); + + for (i = 0; i < len; i++) { + /* wait till TX register is empty (TXS == 1) */ + while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + OMAP3_MCSPI_CHSTAT_TXS)) { + if (--timeout <= 0) { + printf("SPI TXS timed out, status=0x%08x\n", + readl(&ds->regs->channel[ds->slave.cs].chstat)); + return -1; + } + } + /* Write the data */ + writel(txp[i], &ds->regs->channel[ds->slave.cs].tx); + } + + if (flags & SPI_XFER_END) { + /* wait to finish of transfer */ + while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + OMAP3_MCSPI_CHSTAT_EOT)); + + chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, &ds->regs->channel[ds->slave.cs].chconf); + + writel(0, &ds->regs->channel[ds->slave.cs].chctrl); + } + return 0; +} + +int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp, + unsigned long flags) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + int i; + int timeout = SPI_WAIT_TIMEOUT; + int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + + if (flags & SPI_XFER_BEGIN) + writel(OMAP3_MCSPI_CHCTRL_EN, + &ds->regs->channel[ds->slave.cs].chctrl); + + chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK; + chconf |= OMAP3_MCSPI_CHCONF_TRM_RX_ONLY; + chconf |= OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, &ds->regs->channel[ds->slave.cs].chconf); + + writel(0, &ds->regs->channel[ds->slave.cs].tx); + + for (i = 0; i < len; i++) { + /* Wait till RX register contains data (RXS == 1) */ + while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) & + OMAP3_MCSPI_CHSTAT_RXS)) { + if (--timeout <= 0) { + printf("SPI RXS timed out, status=0x%08x\n", + readl(&ds->regs->channel[ds->slave.cs].chstat)); + return -1; + } + } + /* Read the data */ + rxp[i] = readl(&ds->regs->channel[ds->slave.cs].rx); + } + + if (flags & SPI_XFER_END) { + chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, &ds->regs->channel[ds->slave.cs].chconf); + + writel(0, &ds->regs->channel[ds->slave.cs].chctrl); + } + + return 0; +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct omap3_spi_slave *ds = to_omap3_spi(slave); + unsigned int len; + const u8 *txp = dout; + u8 *rxp = din; + int ret = -1; + + if (bitlen % 8) + return -1; + + len = bitlen / 8; + + if (bitlen == 0) { /* only change CS */ + int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf); + + if (flags & SPI_XFER_BEGIN) { + writel(OMAP3_MCSPI_CHCTRL_EN, + &ds->regs->channel[ds->slave.cs].chctrl); + chconf |= OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, + &ds->regs->channel[ds->slave.cs].chconf); + } + if (flags & SPI_XFER_END) { + chconf &= ~OMAP3_MCSPI_CHCONF_FORCE; + writel(chconf, + &ds->regs->channel[ds->slave.cs].chconf); + writel(0, &ds->regs->channel[ds->slave.cs].chctrl); + } + ret = 0; + } else { + if (dout != NULL) + ret = omap3_spi_write(slave, len, txp, flags); + + if (din != NULL) + ret = omap3_spi_read(slave, len, rxp, flags); + } + return ret; +} + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return 1; +} + +void spi_cs_activate(struct spi_slave *slave) +{ +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ +} Index: u-boot.git/drivers/spi/omap3_spi.h =================================================================== --- /dev/null +++ u-boot.git/drivers/spi/omap3_spi.h @@ -0,0 +1,117 @@ +/* + * Register definitions for the OMAP3 McSPI Controller + * + * Copyright (C) 2010 Dirk Behme <dirk.behme(a)googlemail.com> + * + * Parts taken from linux/drivers/spi/omap2_mcspi.c + * Copyright (C) 2005, 2006 Nokia Corporation + * + * Modified by Ruslan Araslanov <ruslan.araslanov(a)vitecmm.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _OMAP3_SPI_H_ +#define _OMAP3_SPI_H_ + +#define OMAP3_MCSPI1_BASE 0x48098000 +#define OMAP3_MCSPI2_BASE 0x4809A000 +#define OMAP3_MCSPI3_BASE 0x480B8000 +#define OMAP3_MCSPI4_BASE 0x480BA000 + +#define OMAP3_MCSPI_MAX_FREQ 48000000 + +/* OMAP3 McSPI registers */ +struct mcspi_channel { + unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ + unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ + unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ + unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ + unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ +}; + +struct mcspi { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned int irqstatus; /* 0x18 */ + unsigned int irqenable; /* 0x1C */ + unsigned int wakeupenable; /* 0x20 */ + unsigned int syst; /* 0x24 */ + unsigned int modulctrl; /* 0x28 */ + struct mcspi_channel channel[4]; /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ + /* channel1: 0x40 - 0x50, bus 0 & 1 */ + /* channel2: 0x54 - 0x64, bus 0 & 1 */ + /* channel3: 0x68 - 0x78, bus 0 */ +}; + +/* per-register bitmasks */ +#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) +#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0) +#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET (1 << 1) + +#define OMAP3_MCSPI_SYSSTATUS_RESETDONE (1 << 0) + +#define OMAP3_MCSPI_MODULCTRL_SINGLE (1 << 0) +#define OMAP3_MCSPI_MODULCTRL_MS (1 << 2) +#define OMAP3_MCSPI_MODULCTRL_STEST (1 << 3) + +#define OMAP3_MCSPI_CHCONF_PHA (1 << 0) +#define OMAP3_MCSPI_CHCONF_POL (1 << 1) +#define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2) +#define OMAP3_MCSPI_CHCONF_EPOL (1 << 6) +#define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7) +#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12) +#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12) +#define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12) +#define OMAP3_MCSPI_CHCONF_DMAW (1 << 14) +#define OMAP3_MCSPI_CHCONF_DMAR (1 << 15) +#define OMAP3_MCSPI_CHCONF_DPE0 (1 << 16) +#define OMAP3_MCSPI_CHCONF_DPE1 (1 << 17) +#define OMAP3_MCSPI_CHCONF_IS (1 << 18) +#define OMAP3_MCSPI_CHCONF_TURBO (1 << 19) +#define OMAP3_MCSPI_CHCONF_FORCE (1 << 20) + +#define OMAP3_MCSPI_CHSTAT_RXS (1 << 0) +#define OMAP3_MCSPI_CHSTAT_TXS (1 << 1) +#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2) + +#define OMAP3_MCSPI_CHCTRL_EN (1 << 0) + +#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0) + +struct omap3_spi_slave { + struct spi_slave slave; + struct mcspi *regs; + unsigned int freq; + unsigned int mode; +}; + +static inline struct omap3_spi_slave *to_omap3_spi(struct spi_slave *slave) +{ + return container_of(slave, struct omap3_spi_slave, slave); +} + +int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp, + unsigned long flags); +int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp, + unsigned long flags); + +#endif /* _OMAP3_SPI_H_ */

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[U-Boot] [PATCH] at91rm9200ek: fix SDRAM initialistation values
by Andreas Bießmann 04 Dec '10

04 Dec '10

Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- Dear Reinhard, please considre this patch to be added into v2010.12, I misconfigured the SDRAM initialisation values in 99fa97e9 regards Andreas Bießmann include/configs/at91rm9200ek.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 57e17e9..9d87e03 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -106,7 +106,7 @@ #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ -#define CONFIG_SYS_SDRAM1 CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80) #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ -- 1.7.3.2

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[U-Boot] Your Email Id Has Been Awarded 315, 810.00GBP In United Nation Xmas Online Promo.For Claims Send
by at-802a＠sbcglobal.net 04 Dec '10

04 Dec '10

Name:........ Country:.... Occupation.... TeL ....

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