December 2010 - U-Boot

[U-Boot] Pull request: u-boot-arm (master)
by Wolfgang Denk 08 Dec '10

08 Dec '10

The following changes since commit 52eb2c79110151b9017a0829c4d44ee7b8e2ca04: Merge branch 'master' of git://git.denx.de/u-boot-samsung (2010-11-30 21:30:13 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm.git master Andreas Bießmann (5): at91rm9200ek: fix SDRAM initialistation values at91rm9200ek: add configure target for RAM boot MAKEALL: fix AT91 arm920t/at91/reset: board_reset: define weak symbol arm920t/at91/timer: replace bss variables by gd Reinhard Meyer (3): AT91: gen_atmel_mci.c: fix bug when Slot B is used AT91: fix EMAC gpio init in at91sam9260_devices.c AT91: add TOP9000 support MAINTAINERS | 3 +- MAKEALL | 18 +- arch/arm/cpu/arm920t/at91/reset.c | 8 +- arch/arm/cpu/arm920t/at91/timer.c | 29 +- arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 5 + arch/arm/include/asm/global_data.h | 1 + board/atmel/at91rm9200ek/config.mk | 2 - board/emk/top9000/Makefile | 54 ++++ board/emk/top9000/spi.c | 61 ++++ board/emk/top9000/top9000.c | 290 +++++++++++++++++++ boards.cfg | 5 +- drivers/mmc/gen_atmel_mci.c | 1 + include/configs/at91rm9200ek.h | 18 ++- include/configs/top9000.h | 314 +++++++++++++++++++++ 14 files changed, 771 insertions(+), 38 deletions(-) delete mode 100644 board/atmel/at91rm9200ek/config.mk create mode 100644 board/emk/top9000/Makefile create mode 100644 board/emk/top9000/spi.c create mode 100644 board/emk/top9000/top9000.c create mode 100644 include/configs/top9000.h

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[U-Boot] Pull request: nand flash
by Scott Wood 08 Dec '10

08 Dec '10

The following changes since commit f12af1f38dc59a6dfe0fed1359e1a05e700a435b: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-video are available in the git repository at: git://git.denx.de/u-boot-nand-flash.git master David Müller (ELSOFT AG) (1): fix s3c2410_nand timing default values Lei Wen (1): onenand: fix oob print out issue Scott Wood (1): 83xx NAND boot: fix boards.cfg Steve Sakoman (1): env_nand: Use nand_read_skip_bad instead of nand_read boards.cfg | 6 +++--- common/cmd_onenand.c | 4 +++- common/env_nand.c | 2 +- drivers/mtd/nand/s3c2410_nand.c | 12 +++++++++--- 4 files changed, 16 insertions(+), 8 deletions(-)

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[U-Boot] Please pull u-boot-atmel/for2010.12
by Reinhard Meyer 08 Dec '10

08 Dec '10

Dear Wolfgang, Albert, The following changes since commit 49733aa0b9d29803384ad4bce74985f4bbe7e9aa: Wolfgang Denk (1): Merge branch 'master' of /home/wd/git/u-boot/custodians are available in the git repository at: git://git.denx.de/u-boot-atmel.git for2010.12 Andreas Bießmann (1): arm920t/at91/reset: board_reset: define weak symbol Reinhard Meyer (3): AT91: gen_atmel_mci.c: fix bug when Slot B is used AT91: fix EMAC gpio init in at91sam9260_devices.c AT91: add TOP9000 support andreas.devel(a)googlemail.com (4): at91rm9200ek: add configure target for RAM boot MAKEALL: fix AT91 arm920t/at91/timer: replace bss variables by gd at91rm9200ek: fix SDRAM initialistation values MAINTAINERS | 3 +- MAKEALL | 18 +- arch/arm/cpu/arm920t/at91/reset.c | 8 +- arch/arm/cpu/arm920t/at91/timer.c | 29 +- arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 5 + arch/arm/include/asm/global_data.h | 1 + board/atmel/at91rm9200ek/config.mk | 2 - board/emk/top9000/Makefile | 54 ++++ board/emk/top9000/spi.c | 61 ++++ board/emk/top9000/top9000.c | 290 +++++++++++++++++++ boards.cfg | 5 +- drivers/mmc/gen_atmel_mci.c | 1 + include/configs/at91rm9200ek.h | 18 ++- include/configs/top9000.h | 314 +++++++++++++++++++++ 14 files changed, 771 insertions(+), 38 deletions(-) delete mode 100644 board/atmel/at91rm9200ek/config.mk create mode 100644 board/emk/top9000/Makefile create mode 100644 board/emk/top9000/spi.c create mode 100644 board/emk/top9000/top9000.c create mode 100644 include/configs/top9000.h I think this time, it's still Wolfgang doing the pull to ARM, right? Best Regards, Reinhard

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[U-Boot] Elf relocation issues with jornada
by Kristoffer Ericson 08 Dec '10

08 Dec '10

Greetings, Im obviously doing something wrong. This is what I get at bootup: U-Boot 2010.12-rc2-00029-g49733aa-dirty (Dec 08 2010 - 21:04:16) DRAM: 361.9 MiB The DRAM is pulling some random number each time, so Ive gotten 0,0,146.2,361.8.Patch attached. Best wishes Kristoffer Ericson

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[U-Boot] gen_atmel_mci freeze on at91sam9g45
by eric cariat 08 Dec '10

08 Dec '10

Hi, I'm currently working on a custom board with an at91sam9g45 : I followed the instruction in README.atmel_mci. In U-boot, if I use the command mmcinfo, the system hang. The uSD is working correctly with at91bootstrap and linux. In U-boot everything seems fine, the card exchange a few command and response, and then freeze on the command 55 51 (the first command that will receive some data on DAT0 ) : U-Boot> mmcinfo mci: bus_hz is 133333333, setting clock 150000 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: bus_hz is 133333333, setting clock 0 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: bus_hz is 133333333, setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 gen_atmel_mci: CMDR 00001000 ( 0) ARGR 00000000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001077 (55) ARGR 00000000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001069 (41) ARGR 40300000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001077 (55) ARGR 00000000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001069 (41) ARGR 40300000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001082 ( 2) ARGR 00000000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001043 ( 3) ARGR 00000000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001089 ( 9) ARGR 88f70000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 000010c7 ( 7) ARGR 88f70000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00001077 (55) ARGR 88f70000 (SR: 00000000) DEBUG gen_atmel_mci: CMDR 00051073 (51) ARGR 00000000 (SR: 00000000) DEBUG Read Data: 00000000: 02 25 00 00 00 00 00 00 .%...... filling rest of block... then everything freeze ... But if I add some printf to debug , just after the mci_data_op=mci_data_read() in gen_atmel_mci, then everything is OK and I can now use the uSD without any problem. Here is where I add the printf, so uSD is correctly handled : diff -crbN u-boot-2010.09.orig/drivers/mmc/gen_atmel_mci.c u-boot-2010.09/drivers/mmc/gen_atmel_mci.c *** u-boot-2010.09.orig/drivers/mmc/gen_atmel_mci.c 2010-09-28 23:20:55.000000000 +0200 --- u-boot-2010.09/drivers/mmc/gen_atmel_mci.c 2010-12-04 17:52:59.092770689 +0100 *************** *** 252,257 **** --- 252,258 ---- while (!status && word_count < (sys_blocksize / 4)) { status = mci_data_op(mci, &dummy, error_flags); + printf("status=%x\n",status); word_count++; } if (status) { The result (status) from mci_data_op (=mci_data_read()) is always 0. It's a bit like if there was a timeout not correctly handled. I had the same sympton on different uSD. Actually U-boot is started by At91Bootstrap, so some HMCI register are probably not at there default value ? Any advice to investigate further ? best regards, Eric Cariat

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[U-Boot] Port to at91sam9g45-ekes
by Morten Kristiansen 08 Dec '10

08 Dec '10

Hi U-boot members. I have ported u-boot to the AT91SAM9G45-EKES board. I have, however, run into a little problem. The internal boot-ROM in the SAM9G45 processor only accepts boot-loaders up to 60K and the loader I have is already 70K. I therefore need an chainloader in between. Is there a recommended approach for this, something like 1. Use some other smaller bootloader to boot u-boot. 2. Use a tiny version of u-boot to boot the real u-boot. 3. Use pieces u-boot, e.g. by replacing start_armboot ... or should I just use man fantasy? ;-) Regards, Morten Kristiansen -- All opinions are not equal. Some are a very great deal more robust, sophisticated and well supported in logic and argument than others. --Douglas Adams

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[U-Boot] [PATCH v2] OMAP3: add CM-T35 board
by Mike Rapoport 08 Dec '10

08 Dec '10

This patch adds support for CM-T35 board Signed-off-by: Mike Rapoport <mike(a)compulab.co.il> --- v2 changes: * address Nishanth's comments MAINTAINERS | 4 + MAKEALL | 1 + board/cm_t35/Makefile | 47 ++++++ board/cm_t35/cm_t35.c | 222 ++++++++++++++++++++++++++++ board/cm_t35/cm_t35.h | 184 +++++++++++++++++++++++ board/cm_t35/config.mk | 30 ++++ boards.cfg | 1 + doc/README.omap3 | 16 ++- include/configs/cm_t35.h | 369 ++++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 872 insertions(+), 2 deletions(-) create mode 100644 board/cm_t35/Makefile create mode 100644 board/cm_t35/cm_t35.c create mode 100644 board/cm_t35/cm_t35.h create mode 100644 board/cm_t35/config.mk create mode 100644 include/configs/cm_t35.h diff --git a/MAINTAINERS b/MAINTAINERS index 9258cb1..b44b843 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -750,6 +750,10 @@ Stelian Pop <stelian.pop(a)leadtechdesign.com> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC) +Mike Rapoport <mike(a)compulab.co.il> + + cm_t35 ARM ARMV7 (OMAP3xx SoC) + Tom Rix <Tom.Rix(a)windriver.com> omap3_zoom2 ARM ARMV7 (OMAP3xx SoC) diff --git a/MAKEALL b/MAKEALL index c54c6e8..e0fe12f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -412,6 +412,7 @@ LIST_ARM11=" \ LIST_ARMV7=" \ am3517_evm \ ca9x4_ct_vxp \ + cm_t35 \ devkit8000 \ igep0020 \ igep0030 \ diff --git a/board/cm_t35/Makefile b/board/cm_t35/Makefile new file mode 100644 index 0000000..320a817 --- /dev/null +++ b/board/cm_t35/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := cm_t35.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c new file mode 100644 index 0000000..21e8762 --- /dev/null +++ b/board/cm_t35/cm_t35.c @@ -0,0 +1,222 @@ +/* + * (C) Copyright 2010 + * CompuLab, Ltd. <www.compulab.co.il> + * + * Author: Mike Rapoport <mike(a)compulab.co.il> + * + * Derived from omap3evm and Beagle Board by + * Manikandan Pillai <mani.pillai(a)ti.com> + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <x0khasim(a)ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <net.h> +#include <i2c.h> +#include <twl4030.h> + +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-types.h> + +#include "cm_t35.h" + +static u32 gpmc_net_config[GPMC_MAX_REG] = { + NET_GPMC_CONFIG1, + NET_GPMC_CONFIG2, + NET_GPMC_CONFIG3, + NET_GPMC_CONFIG4, + NET_GPMC_CONFIG5, + NET_GPMC_CONFIG6, + 0 +}; + +static u32 gpmc_nand_config[GPMC_MAX_REG] = { + SMNAND_GPMC_CONFIG1, + SMNAND_GPMC_CONFIG2, + SMNAND_GPMC_CONFIG3, + SMNAND_GPMC_CONFIG4, + SMNAND_GPMC_CONFIG5, + SMNAND_GPMC_CONFIG6, + 0, +}; + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + + enable_gpmc_cs_config(gpmc_nand_config, &gpmc_cfg->cs[0], + CONFIG_SYS_NAND_BASE, GPMC_SIZE_16M); + + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_CM_T35; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/* + * Routine: misc_init_r + * Description: Init ethernet (done here so udelay works) + */ +int misc_init_r(void) +{ +#ifdef CONFIG_DRIVER_OMAP34XX_I2C + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_CM_T35(); +} + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0); + return 0; +} +#endif + +/* + * Routine: setup_net_chip_gmpc + * Description: Setting up the configuration GPMC registers specific to the + * Ethernet hardware. + */ +static void setup_net_chip_gmpc(void) +{ + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; + + enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[5], + CM_T35_SMC911X_BASE, GPMC_SIZE_16M); + enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[4], + SB_T35_SMC911X_BASE, GPMC_SIZE_16M); + + /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ + writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); + + /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); + + /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, + &ctrl_base->gpmc_nadv_ale); +} + +#ifdef CONFIG_DRIVER_OMAP34XX_I2C +/* + * Routine: reset_net_chip + * Description: reset the Ethernet controller via TPS65930 GPIO + */ +static void reset_net_chip(void) +{ + /* Set GPIO1 of TPS65930 as output */ + twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, + TWL4030_BASEADD_GPIO+0x03); + /* Send a pulse on the GPIO pin */ + twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, + TWL4030_BASEADD_GPIO+0x0C); + udelay(1); + twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, + TWL4030_BASEADD_GPIO+0x09); + udelay(1); + twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, + TWL4030_BASEADD_GPIO+0x0C); +} +#else +static inline void reset_net_chip(void) {} +#endif + +/* + * Routine: handle_mac_address + * Description: prepare MAC address for on-board Ethernet. + */ +static int handle_mac_address(void) +{ + unsigned char enetaddr[6]; + int rc; + + memset(enetaddr, 0, 6); + rc = eth_getenv_enetaddr("ethaddr", enetaddr); + if (rc) + return 0; + +#ifdef CONFIG_DRIVER_OMAP34XX_I2C + rc = i2c_read(0x50, 0, 1, enetaddr, 6); + if (rc) + return rc; +#endif + + if (!is_valid_ether_addr(enetaddr)) + return -1; + + return eth_setenv_enetaddr("ethaddr", enetaddr); +} + + +/* + * Routine: board_eth_init + * Description: initialize module and base-board Ethernet chips + */ +int board_eth_init(bd_t *bis) +{ + int rc = 0, rc1 = 0; + +#ifdef CONFIG_SMC911X + setup_net_chip_gmpc(); + reset_net_chip(); + + rc1 = handle_mac_address(); + if (rc1) + printf("CM-T35: No MAC address found\n"); + + rc1 = smc911x_initialize(0, CM_T35_SMC911X_BASE); + if (rc1 > 0) + rc++; + + rc1 = smc911x_initialize(1, SB_T35_SMC911X_BASE); + if (rc1 > 0) + rc++; +#endif + + return rc; +} diff --git a/board/cm_t35/cm_t35.h b/board/cm_t35/cm_t35.h new file mode 100644 index 0000000..f7b025e --- /dev/null +++ b/board/cm_t35/cm_t35.h @@ -0,0 +1,184 @@ +/* + * (C) Copyright 2010 CompuLab, Ltd + * Author: Mike Rapoport <mike(a)compulab.co.il> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _CM_T35_H_ +#define _CM_T35_H_ + +const omap3_sysinfo sysinfo = { + DDR_DISCRETE, + "CM-T35 board", + "NAND", +}; + +/* static void setup_net_chip(void); */ + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_CM_T35() \ + /*SDRC*/\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*SDRC_CKE0*/\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*SDRC_CKE1*/\ + /*GPMC*/\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ + /* SB-T35 Ethernet */\ + MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)) /*GPMC_nCS4*/\ + /* CM-T35 Ethernet */\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)) /*GPIO_59*/\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*nADV_ALE*/\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*nOE*/\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*nWE*/\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) /*nBE0_CLE*/\ + MUX_VAL(CP(GPMC_NBE1), (IDIS | PTD | DIS | M4)) /*GPIO_61*/\ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*nWP*/\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*WAIT0*/\ + /*DSS*/\ + MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ + MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ + MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ + MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ + MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ + MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ + MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ + MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ + MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ + MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ + MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ + MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ + MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ + MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ + MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ + MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ + MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ + MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ + MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ + MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ + MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ + MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ + MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ + MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ + MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ + MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ + MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ + MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ + /*Serial Interface*/\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX*/\ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX*/\ + /* mUSB */\ + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ + /*Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ + MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*OFF_MODE*/\ + MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*CLKOUT1*/\ + MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTD | DIS | M4)) /*green LED*/\ + MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\ + MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ + MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ + MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ + +#endif diff --git a/board/cm_t35/config.mk b/board/cm_t35/config.mk new file mode 100644 index 0000000..e81e283 --- /dev/null +++ b/board/cm_t35/config.mk @@ -0,0 +1,30 @@ +# +# (C) Copyright 2009 +# CompuLab, Ltd., <www.compulab.co.il> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 8000'0000 (bank0) +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) + +# For use with external or internal boots. +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/boards.cfg b/boards.cfg index 6c2a667..e79b2d7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -392,6 +392,7 @@ igep0020 arm armv7 igep0020 isee omap3 igep0030 arm armv7 igep0030 isee omap3 am3517_evm arm armv7 am3517evm logicpd omap3 devkit8000 arm armv7 devkit8000 timll omap3 +cm_t35 arm armv7 cm_t35 - omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsung s5pc1xx diff --git a/doc/README.omap3 b/doc/README.omap3 index 6227151..460950d 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -21,6 +21,8 @@ Currently the following boards are supported: * TI/Logic PD Zoom 2 [7] +* CompuLab Ltd. CM-T35 [8] + Toolchain ========= @@ -61,6 +63,11 @@ make make omap3_zoom2_config make +* CM-T35: + +make cm_t35_config +make + Custom commands =============== @@ -119,7 +126,7 @@ To read a bit : Acknowledgements ================ -OMAP3 U-Boot is based on U-Boot tar ball [8] for BeagleBoard and EVM done by +OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by several TI employees. Links @@ -153,6 +160,11 @@ http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit [7] TI/Logic PD Zoom 2 http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Bri… -[8] TI OMAP3 U-Boot: + +[8] CompuLab Ltd. CM-T35: + +http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm + +[9] TI OMAP3 U-Boot: http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h new file mode 100644 index 0000000..7533b65 --- /dev/null +++ b/include/configs/cm_t35.h @@ -0,0 +1,369 @@ +/* + * (C) Copyright 2010 + * CompuLab, Ltd. + * Mike Rapoport <mike(a)compulab.co.il> + * + * Based on omap3_beagle.h + * (C) Copyright 2006-2008 + * Texas Instruments. + * Richard Woodruff <r-woodruff2(a)ti.com> + * Syed Mohammed Khasim <x0khasim(a)ti.com> + * + * Configuration settings for the CompuLab CM-T35 board + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_CM_T35 1 /* working with CM-T35 */ + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include <asm/arch/cpu.h> /* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_OF_LIBFDT 1 +/* + * The early kernel mapping on ARM currently only maps from the base of DRAM + * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. + * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, + * so that leaves DRAM base to DRAM base + 0x4000 available. + */ +#define CONFIG_SYS_BOOTMAPSZ 0x4000 + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ + /* Sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) + /* initial data */ + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_MMC 1 +#define CONFIG_OMAP_HSMMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* DDR - I use Micron DDR */ +#define CONFIG_OMAP3_MICRON_DDR 1 + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 +#define CONFIG_TWL4030_USB 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nand0=nand" +#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ + "1920k(u-boot),128k(u-boot-env),"\ + "4m(kernel),-(fs)" + +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1 + +/* + * Board NAND Info. + */ +#define CONFIG_SYS_NAND_QUIET_TEST 1 +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access nand at */ + /* CS0 */ +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ + /* devices */ +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ + /* partition */ + +/* Environment information */ +#define CONFIG_BOOTDELAY 10 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x82000000\0" \ + "usbtty=cdc_acm\0" \ + "console=ttyS2,115200n8\0" \ + "mpurate=500\0" \ + "vram=12M\0" \ + "dvimode=1024x768MR-16@60\0" \ + "defaultdisplay=dvi\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "nandroot=/dev/mtdblock4 rw\0" \ + "nandrootfstype=jffs2\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ + "vram=${vram} " \ + "omapfb.mode=dvi:${dvimode} " \ + "omapfb.debug=y " \ + "omapdss.def_disp=${defaultdisplay} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "nandargs=setenv bootargs console=${console} " \ + "mpurate=${mpurate} " \ + "vram=${vram} " \ + "omapfb.mode=dvi:${dvimode} " \ + "omapfb.debug=y " \ + "omapdss.def_disp=${defaultdisplay} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} 280000 400000; " \ + "bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan ${mmcdev}; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "else run nandboot; " \ + "fi; " \ + "fi; " \ + "else run nandboot; fi" + +#define CONFIG_AUTO_COMPLETE 1 +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "CM-T35 # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ +#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M + +#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ + /* one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ + +#define CONFIG_SYS_FLASH_BASE boot_flash_base + +/* Monitor at start of flash */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define CONFIG_ENV_IS_IN_NAND 1 +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ +#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +#define CONFIG_ENV_OFFSET boot_flash_off +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +/* Flash banks JFFS2 should use */ +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ + CONFIG_SYS_MAX_NAND_DEVICE) +#define CONFIG_SYS_JFFS2_MEM_NAND +/* use flash_info[2] */ +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 + +#ifndef __ASSEMBLY__ +extern unsigned int boot_flash_base; +extern volatile unsigned int boot_flash_env_addr; +extern unsigned int boot_flash_off; +extern unsigned int boot_flash_sec; +extern unsigned int boot_flash_type; +#endif + +#if defined(CONFIG_CMD_NET) +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X +#define CONFIG_SMC911X_32_BIT +#define CM_T35_SMC911X_BASE 0x2C000000 +#define SB_T35_SMC911X_BASE (CM_T35_SMC911X_BASE + (16 << 20)) +#define CONFIG_SMC911X_BASE CM_T35_SMC911X_BASE +#endif /* (CONFIG_CMD_NET) */ + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */ -- 1.7.3.1 -- Sincerely yours, Mike.

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[U-Boot] [PATCH] remove-flash.c-in-board-dbau1x00
by Xiangfu Liu 08 Dec '10

08 Dec '10

Signed-off-by: Xiangfu Liu <xiangfu(a)openmobilefree.net> --- Hi when I run "CROSS_COMPILE=mips_4KCle- ./MAKEALL mips_el". I got those[1] errors. this patch fixed that error. make board compile fine. but I am not sure if the bin image works fine in device. please test it. [1] ====== Configuring for dbau1x00 board... board/dbau1x00/libdbau1x00.o: In function `flash_init': /home/xiangfu/u-boot/u-boot.github/board/dbau1x00/flash.c:34: multiple definition of `flash_init' drivers/mtd/libmtd.o:/home/xiangfu/u-boot/u-boot.github/drivers/mtd/cfi_flash.c:2027: first defined here board/dbau1x00/libdbau1x00.o: In function `write_buff': /home/xiangfu/u-boot/u-boot.github/board/dbau1x00/flash.c:40: multiple definition of `write_buff' drivers/mtd/libmtd.o:/home/xiangfu/u-boot/u-boot.github/drivers/mtd/cfi_flash.c:1247: first defined here make: *** [/home/xiangfu/u-boot/u-boot-build/u-boot] Error 1 board/dbau1x00/Makefile | 2 +- board/dbau1x00/flash.c | 43 ------------------------------------------- 2 files changed, 1 insertions(+), 44 deletions(-) delete mode 100644 board/dbau1x00/flash.c diff --git a/board/dbau1x00/Makefile b/board/dbau1x00/Makefile index f1594a2..e36a9d2 100644 --- a/board/dbau1x00/Makefile +++ b/board/dbau1x00/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o flash.o +COBJS = $(BOARD).o SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/dbau1x00/flash.c b/board/dbau1x00/flash.c deleted file mode 100644 index a2fed1d..0000000 --- a/board/dbau1x00/flash.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/*----------------------------------------------------------------------- - * flash_init() - * - * sets up flash_info and returns size of FLASH (bytes) - */ -unsigned long flash_init (void) -{ - printf ("Skipping flash_init\n"); - return (0); -} - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - printf ("write_buff not implemented\n"); - return (-1); -} -- 1.7.0.4

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[U-Boot] [PATCH 1/5] sh: Delete the function that was not necessary
by nobuhiro.iwamatsu.yj＠renesas.com 08 Dec '10

08 Dec '10

From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- arch/sh/lib/bootm.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c index 19b3a94..fe23b58 100644 --- a/arch/sh/lib/bootm.c +++ b/arch/sh/lib/bootm.c @@ -100,7 +100,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima /* Set commandline */ strcpy(cmdline, bootargs); - sh_check_cmd_arg(bootargs, CMD_ARG_RD_DOLOAD, 10); /* Initrd */ if (images->rd_start || images->rd_end) { unsigned long ramdisk_flags = 0; -- 1.7.2.3

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[U-Boot] Aspire Property Magazine - Spring 2011 and beyond! SW London
by Aspire Property Magazine London 07 Dec '10

07 Dec '10

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