December 2010 - U-Boot

[U-Boot] Karo TX25 environment variable
by davide doninelli 17 Dec '10

17 Dec '10

Hi, My board is a Karo tx25 (imx25) and the purpose is to speedup the boot process. For thats reason i tried to change bootloader from Redboot to uboot. but i had some problem when save environment on nand. When i save the environment variables the first time work but aftre reboot see a badblock. Tanks in advance Davide Doninelli Redboot nand info: RedBoot> nand info Type: Samsung K9F1G08U0A 8-bit 2K page 128MB Total size: 0x08000000 bytes (128 MiB) Total blocks: 0x400 (1024) Block size: 0x20000 (131072) Page size: 0x800 (2048) Spare size: 0x40 (64) Pages per block: 0x40 (64) block 253 at offset 0x01fa0000 is a factory bad block ================================== Found 1 bad block(s) out of 1024 RedBoot> Here some output of prebuilt image for this card: U-Boot 2009.11-00146-g7d259a1-dirty (Jan 07 2010 - 21:05:46) CPU: Freescale i.MX25 at 532 MHz DRAM: 32 MB NAND: 128 MiB No Valid Environment Area Found No Valid Reundant Environment Area Found *** Warning - bad CRC or NAND, using default environment In: serial Out: serial Err: serial tx25_fec_init resetting phy Net: FEC_MXC Hit any key to stop autoboot: 0 => saveenv Saving Environment to NAND... Erasing redundant Nand... Skipping bad block at 0x00080000 Skipping bad block at 0x000a0000 Writing to redundant Nand... FAILED! => nand bad Device 0 bad blocks: 00000000 00020000 00040000 00060000 00080000 000a0000 000c0000 000e0000 01fa0000 07f60000 Here some output of my uboot image for this card standard config: U-Boot 2010.09 (Dec 17 2010 - 14:35:56) CPU: Freescale i.MX25 at 399 MHz DRAM: 32 MiB NAND: 128 MiB *** Warning - bad CRC or NAND, using default environment In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0 => saveenv Saving Environment to NAND... Erasing redundant Nand... Erasing at 0x60000 -- 100% complete. Writing to redundant Nand... done => saveenv Saving Environment to NAND... Erasing Nand... Erasing at 0x40000 -- 100% complete. Writing to Nand... done After reset: CPU: Freescale i.MX25 at 399 MHz DRAM: 32 MiB NAND: 128 MiB MXC_NAND: HWECC uncorrectable ECC error in block 2 page 128 subpage 0 No Valid Environment Area Found No Valid Reundant Environment Area Found *** Warning - bad CRC or NAND, using default environment In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0 => => saveenv Saving Environment to NAND... Erasing redundant Nand... Skipping bad block at 0x00060000 Writing to redundant Nand... FAILED! => nand bad Device 0 bad blocks: 00000000 00060000 00140000 00160000 01fa0000 07fc0000 07fe0000 =>

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[U-Boot] [PATCH][v4] RTC driver for PT7C4338 chip.
by Priyanka Jain 17 Dec '10

17 Dec '10

PT7C4338 chip is being manufactured by Pericom Technology Inc. It is a serial real-time clock which provides: 1)Low-power clock/calendar. 2)Programmable square-wave output. It has 56 bytes of nonvolatile RAM. Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> Acked-by: Timur Tabi <timur(a)freescale.com> --- PT7C4338 RTC driver is verified on Freescale P1010RDB. Changes for v1: Incoperated Heiko's review comments -keeping the Makefile list sorted. -Removing unneccesary blank lines. Changes for v2: Incoperated Wolfgang Denk's review comments -Merging two checks of RTC Oscillator stop check into one Changes for v3: -Removing board name from pt7c4338.c file as this can be used for any board having PT7C4338 chip. Changes for v4: Incoperated Wolfgang Denk's review comments -Attaching patch change log drivers/rtc/Makefile | 1 + drivers/rtc/pt7c4338.c | 144 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/pt7c4338.c diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 98734db..bbf9a7e 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -57,6 +57,7 @@ COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o COBJS-$(CONFIG_RTC_PL031) += pl031.o +COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o COBJS-$(CONFIG_RTC_RX8025) += rx8025.o diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c new file mode 100644 index 0000000..26e2c1e --- /dev/null +++ b/drivers/rtc/pt7c4338.c @@ -0,0 +1,144 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * + * Author: Priyanka Jain <Priyanka.Jain(a)freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file provides Date & Time support (no alarms) for PT7C4338 chip. + * + * This file is based on drivers/rtc/ds1337.c + * + * PT7C4338 chip is manufactured by Pericom Technology Inc. + * It is a serial real-time clock which provides + * 1)Low-power clock/calendar. + * 2)Programmable square-wave output. + * It has 56 bytes of nonvolatile RAM. + */ + +#include <common.h> +#include <command.h> +#include <rtc.h> +#include <i2c.h> + +/* RTC register addresses */ +#define RTC_SEC_REG_ADDR 0x0 +#define RTC_MIN_REG_ADDR 0x1 +#define RTC_HR_REG_ADDR 0x2 +#define RTC_DAY_REG_ADDR 0x3 +#define RTC_DATE_REG_ADDR 0x4 +#define RTC_MON_REG_ADDR 0x5 +#define RTC_YR_REG_ADDR 0x6 +#define RTC_CTL_STAT_REG_ADDR 0x7 + +/* RTC second register address bit */ +#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */ + +/* RTC control and status register bits */ +#define RTC_CTL_STAT_BIT_RS0 0x1 /* Rate select 0 */ +#define RTC_CTL_STAT_BIT_RS1 0x2 /* Rate select 1 */ +#define RTC_CTL_STAT_BIT_SQWE 0x10 /* Square Wave Enable */ +#define RTC_CTL_STAT_BIT_OSF 0x20 /* Oscillator Stop Flag */ +#define RTC_CTL_STAT_BIT_OUT 0x80 /* Output Level Control */ + +/* RTC reset value */ +#define RTC_PT7C4338_RESET_VAL \ + (RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT) + +/****** Helper functions ****************************************/ +static u8 rtc_read(u8 reg) +{ + return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg); +} + +static void rtc_write(u8 reg, u8 val) +{ + i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val); +} +/****************************************************************/ + +/* Get the current time from the RTC */ +int rtc_get(struct rtc_time *tmp) +{ + int ret = 0; + u8 sec, min, hour, mday, wday, mon, year, ctl_stat; + + ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR); + sec = rtc_read(RTC_SEC_REG_ADDR); + min = rtc_read(RTC_MIN_REG_ADDR); + hour = rtc_read(RTC_HR_REG_ADDR); + wday = rtc_read(RTC_DAY_REG_ADDR); + mday = rtc_read(RTC_DATE_REG_ADDR); + mon = rtc_read(RTC_MON_REG_ADDR); + year = rtc_read(RTC_YR_REG_ADDR); + debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x control_status: %02x\n", + year, mon, mday, wday, hour, min, sec, ctl_stat); + + if (ctl_stat & RTC_CTL_STAT_BIT_OSF) { + printf("### Warning: RTC oscillator has stopped\n"); + /* clear the OSF flag */ + rtc_write(RTC_CTL_STAT_REG_ADDR, + rtc_read(RTC_CTL_STAT_REG_ADDR)\ + & ~RTC_CTL_STAT_BIT_OSF); + ret = -1; + } + + tmp->tm_sec = bcd2bin(sec & 0x7F); + tmp->tm_min = bcd2bin(min & 0x7F); + tmp->tm_hour = bcd2bin(hour & 0x3F); + tmp->tm_mday = bcd2bin(mday & 0x3F); + tmp->tm_mon = bcd2bin(mon & 0x1F); + tmp->tm_year = bcd2bin(year) + 2000; + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return ret; +} + +/* Set the RTC */ +int rtc_set(struct rtc_time *tmp) +{ + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)); + rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon)); + rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1)); + rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)); + rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)); + rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)); + rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)); + + return 0; +} + +/* Reset the RTC */ +void rtc_reset(void) +{ + rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ + rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL); +} -- 1.6.5.6

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[U-Boot] [PATCH 2/2][NEXT] mpc52xx, charon: change mtd default partitions
by Heiko Schocher 17 Dec '10

17 Dec '10

new default partittions on nor flash: 640k (firmware) 1408k (kernel) 2m (initrd) 4m (small-fs) 24320k (big-fs) 256k (dts) Signed-off-by: Heiko Schocher <hs(a)denx.de> --- include/configs/TQM5200.h | 14 +++++++++++++- include/configs/charon.h | 1 + 2 files changed, 14 insertions(+), 1 deletions(-) diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 58774ff..3154e13 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -273,6 +273,11 @@ "fdt_addr=FC100000\0" \ "kernel_addr=FC140000\0" \ "ramdisk_addr=FC600000\0" +#elif defined(CONFIG_CHARON) +#define ENV_FLASH_LAYOUT \ + "fdt_addr=FDFC0000\0" \ + "kernel_addr=FC0A0000\0" \ + "ramdisk_addr=FC200000\0" #else /* !CONFIG_TQM5200_B */ #define ENV_FLASH_LAYOUT \ "fdt_addr=FC0A0000\0" \ @@ -426,7 +431,7 @@ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define MTDIDS_DEFAULT "nor0=fc000000.flash" -#if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX) +#if defined(CONFIG_STK52XX) # if defined(CONFIG_TQM5200_B) # if defined(CONFIG_SYS_LOWBOOT) # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \ @@ -458,6 +463,13 @@ "1792k(kernel)," \ "5632k(rootfs)," \ "24m(home)" +#elif defined (CONFIG_CHARON) +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\ + "1408k(kernel)," \ + "2m(initrd)," \ + "4m(small-fs)," \ + "24320k(big-fs)," \ + "256k(dts)" #elif defined (CONFIG_FO300) # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\ "1408k(kernel)," \ diff --git a/include/configs/charon.h b/include/configs/charon.h index 80a273c..f29ceaf 100644 --- a/include/configs/charon.h +++ b/include/configs/charon.h @@ -47,6 +47,7 @@ "bootfile=/tftpboot/charon/uImage\0" \ "fdt_file=/tftpboot/charon/charon.dtb\0" \ "u-boot=/tftpboot/charon/u-boot.bin\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" -- 1.7.2.3

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[U-Boot] [PATCH 1/2][NEXT] mpc5200, tqm5200: correct MTDIDS_DEFAULT to fit with name linux assigns
by Heiko Schocher 17 Dec '10

17 Dec '10

Signed-off-by: Heiko Schocher <hs(a)denx.de> --- include/configs/TQM5200.h | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e822a59..58774ff 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -424,12 +424,12 @@ /* Dynamic MTD partition support */ #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define MTDIDS_DEFAULT "nor0=TQM5200-0" +#define MTDIDS_DEFAULT "nor0=fc000000.flash" #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX) # if defined(CONFIG_TQM5200_B) # if defined(CONFIG_SYS_LOWBOOT) -# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \ +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \ "256k(dtb)," \ "2304k(kernel)," \ "2560k(small-fs)," \ @@ -437,7 +437,7 @@ "8m(misc)," \ "16m(big-fs)" # else /* highboot */ -# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \ +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\ "3584k(small-fs)," \ "2m(initrd)," \ "8m(misc)," \ @@ -445,7 +445,7 @@ "1m(firmware)" # endif /* CONFIG_SYS_LOWBOOT */ # else /* !CONFIG_TQM5200_B */ -# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\ "128k(dtb)," \ "2304k(kernel)," \ "2m(initrd)," \ @@ -454,12 +454,12 @@ "15m(big-fs)" # endif /* CONFIG_TQM5200_B */ #elif defined (CONFIG_CAM5200) -# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \ +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\ "1792k(kernel)," \ "5632k(rootfs)," \ "24m(home)" #elif defined (CONFIG_FO300) -# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ +# define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\ "1408k(kernel)," \ "2m(initrd)," \ "4m(small-fs)," \ -- 1.7.2.3

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[U-Boot] Please pull u-boot-cfi-flash/next
by Stefan Roese 17 Dec '10

17 Dec '10

Hi Wolfgang, The following changes since commit 97a85b223ab316d11f3a374fecc5d449a1c8a694: powerpc/nand spl: link libgcc (2010-12-16 23:19:14 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git next Stefan Roese (3): cfi_flash: Fix problems with status/id read mode cfi_flash: Use flash_read32() in sector_erased() cfi_flash: Add optional config register write to cfi-detection drivers/mtd/cfi_flash.c | 61 ++++++++++++++++++++++++++++++++++++++++++++-- include/mtd/cfi_flash.h | 2 + 2 files changed, 60 insertions(+), 3 deletions(-)

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[U-Boot] Please pull u-boot-ppc4xx/next
by Stefan Roese 17 Dec '10

17 Dec '10

Hi Wolfgang, The following changes since commit 97a85b223ab316d11f3a374fecc5d449a1c8a694: powerpc/nand spl: link libgcc (2010-12-16 23:19:14 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-ppc4xx.git next Ricardo Ribalda Delgado (1): xilinx-ppc4xx-generic: Use common u-boot.lds Stefan Roese (4): ppc4xx: t3corp: Add support for the Xilinx DS617 flash chip ppc4xx: Clarify comment about boot chip-select in start.S ppc4xx: Update lwmon5 board support ppc4xx/POST: Change ethernet test loop count to a default of 10 arch/powerpc/cpu/ppc4xx/start.S | 28 +++--- arch/powerpc/cpu/ppc4xx/u-boot.lds | 8 ++ board/lwmon5/sdram.c | 22 ++++- board/t3corp/t3corp.c | 38 ++++++++ board/xilinx/ppc405-generic/Makefile | 4 +- board/xilinx/ppc405-generic/u-boot-ram.lds | 131 ------------------------- board/xilinx/ppc405-generic/u-boot-rom.lds | 141 --------------------------- board/xilinx/ppc440-generic/Makefile | 4 +- board/xilinx/ppc440-generic/u-boot-ram.lds | 132 -------------------------- board/xilinx/ppc440-generic/u-boot-rom.lds | 142 ---------------------------- boards.cfg | 20 ++-- include/configs/lwmon5.h | 22 +++-- include/configs/t3corp.h | 18 +++- include/configs/xilinx-ppc.h | 1 + post/cpu/ppc4xx/ether.c | 35 ++++--- 15 files changed, 142 insertions(+), 604 deletions(-) delete mode 100644 board/xilinx/ppc405-generic/u-boot-ram.lds delete mode 100644 board/xilinx/ppc405-generic/u-boot-rom.lds delete mode 100644 board/xilinx/ppc440-generic/u-boot-ram.lds delete mode 100644 board/xilinx/ppc440-generic/u-boot-rom.lds

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[U-Boot] [NEXT] Pull request u-boot-blackfin.git (sf branch)
by Mike Frysinger 17 Dec '10

17 Dec '10

The following changes since commit 97a85b223ab316d11f3a374fecc5d449a1c8a694: powerpc/nand spl: link libgcc (2010-12-16 23:19:14 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git sf Chong Huang (1): sf: new driver for EON devices Wojtek Skulski (1): sf: winbond: add support for W25Q16/32/128 parts drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/eon.c | 275 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash.c | 3 + drivers/mtd/spi/spi_flash_internal.h | 1 + drivers/mtd/spi/winbond.c | 39 ++++-- 5 files changed, 309 insertions(+), 10 deletions(-) create mode 100644 drivers/mtd/spi/eon.c

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[U-Boot] [PULL] please pull u-boot-atmel.git/for-upstream
by Reinhard Meyer 17 Dec '10

17 Dec '10

Dear Wolfgang, The following changes since commit 6741b5310f81ae5ae0132ad85b09fb31d6377b6c: Asen Dimov (1): pm9261: enable cache command are available in the git repository at: git://git.denx.de/u-boot-atmel.git for-upstream Reinhard Meyer (1): AT91: fix TOP9000 build problem and change CONFIG_SYS_TEXT_BASE clagix(a)gmail.com (1): AT91RM9200: fix AT91_PMC_MCKR_MDIV_* defines for this CPU arch/arm/include/asm/arch-at91/at91_pmc.h | 8 ++++++++ board/emk/top9000/Makefile | 6 +++--- board/emk/top9000/top9000.c | 2 +- include/configs/top9000.h | 4 ++-- 4 files changed, 14 insertions(+), 6 deletions(-) And.. before you complain.. "From: clagix(a)gmail.com <clagix(a)gmail.com>" is really the submitter. Best Regards, Reinhard

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[U-Boot] Slow standalone routine with U-Boot
by Lennart Sundberg 17 Dec '10

17 Dec '10

Dear Sirs, I am trying to implement a memory and CPU demanding standalone application on the beagleboard by hacking U-Boot. To my surprise, the U-Boot program is ten times slower than the same program running under Linux on the beagleboard. This test loop when inserted in u-boot/common/main.c.main_loop takes 8.9 s with caches enabled and 10.1 s with caches disabled: Unsigned long *p; long i, error; p = 0x81000000; printf("filling:\n"); for (i = 0; i < 25000000; i++) *(p+i) = i; printf("testing:\n"); error = 0; for (i = 0; i < 25000000; i++) { if (*(p+i) != i) { error = i+1; break; } } printf("error=%ld\n",error); The same loop (with p = malloc( 25000000 * 4) takes less than a second on Angstrom Linux on the beagleboard. The routine cpy_clk_code in lowlevel_init.S that copies the go_to_speed routine to SRAM is executed at start-up but the go_to_speed code apparently never gets executed. I have verified this by inserting hang loops in cpy_clk_code() and go_to_speed(). Beagleboard version = C4 U-Boot version = u-boot-2010.09

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[U-Boot] [STATUS] v2010.12-rc3 released
by Wolfgang Denk 17 Dec '10

17 Dec '10

Hello everybody. * U-Boot v2010.12-rc3 was released on Friday, December 17. * Release "v2010.12" is scheduled in 5 days: on December 22, 2010 (9 days delayed). Please help testing, and check if all your relevant patches have been included. Current status is so-so. Power Architecture appears to look OK. ARM has still a lot of broken boards (which is not unexpected). I didn't test much for other architectures. Comments and especially patches welcome. Note that we have a "next" branch again, so custodians can send out pull requests of new stuff for "next". Thanks, and best regards, Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de In an infinite universe all things are possible, including the possi- bility that the universe does not exist. - Terry Pratchett, _The Dark Side of the Sun_

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