October 2010 - U-Boot

[U-Boot] [PATCH 1/4] tools: enable img2srec for "all" target
by Mike Frysinger 15 Nov '10

15 Nov '10

Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- tools/Makefile | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/tools/Makefile b/tools/Makefile index 749d994..ea271bf 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -41,6 +41,7 @@ include $(TOPDIR)/config.mk # Enable all the config-independent tools ifneq ($(HOST_TOOLS_ALL),) CONFIG_LCD_LOGO = y +CONFIG_CMD_LOADS = y CONFIG_CMD_NET = y CONFIG_INCA_IP = y CONFIG_NETCONSOLE = y -- 1.7.2

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[U-Boot] Pull request - microblaze
by Michal Simek 15 Nov '10

15 Nov '10

Dear Wolfgang, please pull the following changes to your tree. Thanks, Michal The following changes since commit bfc7bea6adc46e1db2f5a5e3464d7652ed67c864: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-x86 are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master Michal Simek (3): microblaze: Fix microblaze-generic config file microblaze: Add support for NET_MULTI api microblaze: Support little-endian microblaze target Stephan Linz (2): microblaze: generic: adding DHCP support microblaze: generic: rename MTD partition set to 'flash-0' arch/microblaze/cpu/start.S | 60 +++++- arch/microblaze/include/asm/byteorder.h | 4 + arch/microblaze/lib/board.c | 12 +- .../xilinx/microblaze-generic/microblaze-generic.c | 13 + include/configs/microblaze-generic.h | 236 +++++++++++--------- 5 files changed, 207 insertions(+), 118 deletions(-) -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian

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[U-Boot] [PATCH 1/5] e1000: Clean up handling of dual-port NICs and support 82571
by Kyle Moffett 15 Nov '10

15 Nov '10

Consolidate the test for a dual-port NIC to one location for easy modification, then fix support for the dual-port 82571. Signed-off-by: Kyle Moffett <Kyle.D.Moffett(a)boeing.com> --- drivers/net/e1000.c | 66 +++++++++++++++++++++++++------------------------- drivers/net/e1000.h | 6 ---- 2 files changed, 33 insertions(+), 39 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 2825342..28cedf7 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -1096,6 +1096,20 @@ e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask) return E1000_SUCCESS; } +static boolean_t e1000_is_second_port(struct e1000_hw *hw) +{ + switch (hw->mac_type) { + case e1000_80003es2lan: + case e1000_82546: + case e1000_82571: + if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) + return TRUE; + /* Fallthrough */ + default: + return FALSE; + } +} + /****************************************************************************** * Reads the adapter's MAC address from the EEPROM and inverts the LSB for the * second function of dual function devices @@ -1122,11 +1136,11 @@ e1000_read_mac_addr(struct eth_device *nic) nic->enetaddr[i] = eeprom_data & 0xff; nic->enetaddr[i + 1] = (eeprom_data >> 8) & 0xff; } - if ((hw->mac_type == e1000_82546) && - (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) { - /* Invert the last bit if this is the second device */ - nic->enetaddr[5] += 1; - } + + /* Invert the last bit if this is the second device */ + if (e1000_is_second_port(hw)) + nic->enetaddr[5] ^= 1; + #ifdef CONFIG_E1000_FALLBACK_MAC if ( *(u32*)(nic->enetaddr) == 0 || *(u32*)(nic->enetaddr) == ~0 ) { unsigned char fb_mac[NODE_ADDRESS_SIZE] = CONFIG_E1000_FALLBACK_MAC; @@ -2528,16 +2542,13 @@ e1000_check_mng_mode(struct e1000_hw *hw) static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data) { + uint16_t swfw = E1000_SWFW_PHY0_SM; uint32_t reg_val; - uint16_t swfw; DEBUGFUNC(); - if ((hw->mac_type == e1000_80003es2lan) && - (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) { + if (e1000_is_second_port(hw)) swfw = E1000_SWFW_PHY1_SM; - } else { - swfw = E1000_SWFW_PHY0_SM; - } + if (e1000_swfw_sync_acquire(hw, swfw)) return -E1000_ERR_SWFW_SYNC; @@ -2552,16 +2563,13 @@ e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data) static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data) { + uint16_t swfw = E1000_SWFW_PHY0_SM; uint32_t reg_val; - uint16_t swfw; DEBUGFUNC(); - if ((hw->mac_type == e1000_80003es2lan) && - (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) { + if (e1000_is_second_port(hw)) swfw = E1000_SWFW_PHY1_SM; - } else { - swfw = E1000_SWFW_PHY0_SM; - } + if (e1000_swfw_sync_acquire(hw, swfw)) return -E1000_ERR_SWFW_SYNC; @@ -4259,11 +4267,13 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw) default: mdelay(10); break; + case e1000_80003es2lan: /* Separate *_CFG_DONE_* bit for each port */ - if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) + if (e1000_is_second_port(hw)) cfg_mask = E1000_EEPROM_CFG_DONE_PORT_1; - /* Fall Through */ + /* Fall Through */ + case e1000_82571: case e1000_82572: while (timeout) { @@ -4292,10 +4302,10 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw) int32_t e1000_phy_hw_reset(struct e1000_hw *hw) { + uint16_t swfw = E1000_SWFW_PHY0_SM; uint32_t ctrl, ctrl_ext; uint32_t led_ctrl; int32_t ret_val; - uint16_t swfw; DEBUGFUNC(); @@ -4308,16 +4318,14 @@ e1000_phy_hw_reset(struct e1000_hw *hw) DEBUGOUT("Resetting Phy...\n"); if (hw->mac_type > e1000_82543) { - if ((hw->mac_type == e1000_80003es2lan) && - (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) { + if (e1000_is_second_port(hw)) swfw = E1000_SWFW_PHY1_SM; - } else { - swfw = E1000_SWFW_PHY0_SM; - } + if (e1000_swfw_sync_acquire(hw, swfw)) { DEBUGOUT("Unable to acquire swfw sync\n"); return -E1000_ERR_SWFW_SYNC; } + /* Read the device control register and assert the E1000_CTRL_PHY_RST * bit. Then, take it out of reset. */ @@ -4771,14 +4779,6 @@ e1000_sw_init(struct eth_device *nic, int cardnum) break; } - /* lan a vs. lan b settings */ - if (hw->mac_type == e1000_82546) - /*this also works w/ multiple 82546 cards */ - /*but not if they're intermingled /w other e1000s */ - hw->lan_loc = (cardnum % 2) ? e1000_lan_b : e1000_lan_a; - else - hw->lan_loc = e1000_lan_a; - /* flow control settings */ hw->fc_high_water = E1000_FC_HIGH_THRESH; hw->fc_low_water = E1000_FC_LOW_THRESH; diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index eb0804b..8597e23 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -111,11 +111,6 @@ typedef enum { e1000_100_full = 3 } e1000_speed_duplex_type; -typedef enum { - e1000_lan_a = 0, - e1000_lan_b = 1 -} e1000_lan_loc; - /* Flow Control Settings */ typedef enum { e1000_fc_none = 0, @@ -1055,7 +1050,6 @@ struct e1000_hw { uint32_t phy_init_script; uint32_t txd_cmd; e1000_media_type media_type; - e1000_lan_loc lan_loc; e1000_fc_type fc; e1000_bus_type bus_type; #if 0 -- 1.7.1

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[U-Boot] [PATCH NET 1/2] Net: Remove redundant CONFIG_NET_MULTI directives
by Ben Warren 15 Nov '10

15 Nov '10

All are within an #ifdef CONFIG_NET_MULTI block already Signed-off-by: Ben Warren <biggerbadderben(a)gmail.com> --- net/eth.c | 16 ++++------------ 1 files changed, 4 insertions(+), 12 deletions(-) diff --git a/net/eth.c b/net/eth.c index 993306f..5c70d4f 100644 --- a/net/eth.c +++ b/net/eth.c @@ -263,7 +263,6 @@ int eth_initialize(bd_t *bis) dev = dev->next; } while(dev != eth_devices); -#ifdef CONFIG_NET_MULTI /* update current ethernet name */ if (eth_current) { char *act = getenv("ethact"); @@ -271,7 +270,6 @@ int eth_initialize(bd_t *bis) setenv("ethact", eth_current->name); } else setenv("ethact", NULL); -#endif putc ('\n'); } @@ -441,7 +439,7 @@ int eth_receive(volatile void *packet, int length) void eth_try_another(int first_restart) { static struct eth_device *first_failed = NULL; - char *ethrotate; + char *ethrotate, *act; /* * Do not rotate between network interfaces when @@ -460,21 +458,16 @@ void eth_try_another(int first_restart) eth_current = eth_current->next; -#ifdef CONFIG_NET_MULTI /* update current ethernet name */ - { - char *act = getenv("ethact"); - if (act == NULL || strcmp(act, eth_current->name) != 0) - setenv("ethact", eth_current->name); - } -#endif + act = getenv("ethact"); + if (act == NULL || strcmp(act, eth_current->name) != 0) + setenv("ethact", eth_current->name); if (first_failed == eth_current) { NetRestartWrap = 1; } } -#ifdef CONFIG_NET_MULTI void eth_set_current(void) { static char *act = NULL; @@ -501,7 +494,6 @@ void eth_set_current(void) setenv("ethact", eth_current->name); } -#endif char *eth_get_name (void) { -- 1.6.0.4

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[U-Boot] [PATCH] Reorder including config.mk and the HOSTCC check so HOSTCC is actually defined when checking for it.
by François Revol 14 Nov '10

14 Nov '10

cf. title. François.

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[U-Boot] [PATCH] MAKEALL: Do a sanity check on user-supplied arguments
by Peter Tyser 14 Nov '10

14 Nov '10

Add a check to make sure that the user's arguments actually find a board in boards.cfg. Previously, if a user misspelled an argument the argument would be discarded without warning. For example, running 'MAKEALL -c 85xx' with the intention of compiling all Freescale 85xx boards would instead silently discard the '-c 85xx' argument since the proper cpu name is 'mpc85xx' and then proceed to compile all PowerPC boards (MAKEALL's default). Also fix an unrelated typo. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- MAKEALL | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/MAKEALL b/MAKEALL index c54c6e8..767d561 100755 --- a/MAKEALL +++ b/MAKEALL @@ -11,7 +11,7 @@ # line; without any arguments, MAKEALL defaults to building all Power # Architecture systems (i. e. same as for "MAKEALL powerpc"). # -# With the iontroduction of the board.cfg file, it has become possible +# With the introduction of the board.cfg file, it has become possible # to provide additional selections. We use standard command line # options for this: # @@ -125,6 +125,12 @@ FILTER="\$1 !~ /^#/" if [ "$SELECTED" ] ; then SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg) + + # Make sure some boards from boards.cfg are actually found + if [ -z "$SELECTED" ] ; then + echo "Error: No boards selected, invalid arguments" + exit 1 + fi fi ######################################################################### -- 1.7.0.4

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[U-Boot] [PATCH 1/6] fsl: Clean up printing of PCI boot info
by Peter Tyser 14 Nov '10

14 Nov '10

Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> CC: wd(a)denx.de CC: sr(a)denx.de CC: galak(a)kernel.crashing.org --- This series assumes "fsl_pci_init: Make fsl_pci_init_port() PCI/PCIe aware" has already been applied. board/atum8548/atum8548.c | 12 ++++++------ board/freescale/corenet_ds/pci.c | 16 ++++++++-------- board/freescale/mpc8536ds/mpc8536ds.c | 16 ++++++++-------- board/freescale/mpc8540ads/mpc8540ads.c | 4 ++-- board/freescale/mpc8541cds/mpc8541cds.c | 6 +++--- board/freescale/mpc8544ds/mpc8544ds.c | 24 ++++++++++++------------ board/freescale/mpc8548cds/mpc8548cds.c | 16 ++++++++-------- board/freescale/mpc8555cds/mpc8555cds.c | 6 +++--- board/freescale/mpc8560ads/mpc8560ads.c | 4 ++-- board/freescale/mpc8568mds/mpc8568mds.c | 8 ++++---- board/freescale/mpc8569mds/mpc8569mds.c | 8 ++++---- board/freescale/mpc8572ds/mpc8572ds.c | 20 ++++++++++---------- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 20 ++++++++++---------- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 18 +++++++++--------- board/freescale/p1022ds/p1022ds.c | 8 ++++---- board/freescale/p1_p2_rdb/pci.c | 16 ++++++++-------- board/freescale/p2020ds/p2020ds.c | 24 ++++++++++++------------ board/pm854/pm854.c | 4 ++-- board/pm856/pm856.c | 4 ++-- board/sbc8548/sbc8548.c | 8 ++++---- board/sbc8641d/sbc8641d.c | 18 +++++++++--------- board/tqc/tqm85xx/tqm85xx.c | 8 ++++---- board/xes/common/fsl_8xxx_pci.c | 16 ++++++++-------- drivers/pci/fsl_pci_init.c | 10 +++++----- 24 files changed, 147 insertions(+), 147 deletions(-) diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 671f9e9..4fcbb18 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -218,14 +218,14 @@ void pci_init_board(void) pcie1_hose.region_count = 1; #endif - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", + printf ("PCIE1: connected to Slot as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -242,7 +242,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -254,7 +254,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI1: disabled\n"); } puts("\n"); @@ -267,11 +267,11 @@ void pci_init_board(void) SET_STD_PCI_INFO(pci_info[num], 2); pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs); - puts (" PCI2\n"); + puts("PCI2\n"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } puts("\n"); #else diff --git a/board/freescale/corenet_ds/pci.c b/board/freescale/corenet_ds/pci.c index e1bca19..775b623 100644 --- a/board/freescale/corenet_ds/pci.c +++ b/board/freescale/corenet_ds/pci.c @@ -68,13 +68,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_1); SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 1 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 1 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE1); /* disable */ @@ -90,13 +90,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_2); SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to Slot 3 as %s (base addr %lx)\n", + printf("PCIE2: connected to Slot 3 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE2); /* disable */ @@ -112,13 +112,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_3); SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE3: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */ @@ -134,13 +134,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_4); SET_STD_PCIE_INFO(pci_info[num], 4); pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs); - printf(" PCIE4 connected to as %s (base addr %lx)\n", + printf("PCIE4: connected to as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie4_hose, first_free_busno); } else { - printf (" PCIE4: disabled\n"); + printf("PCIE4: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index c8e0856..8ad7549 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -229,13 +229,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_3); SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n", + printf("PCIE3: connected to Slot3 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); @@ -253,13 +253,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_1); SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n", + printf("PCIE1: connected to Slot1 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -277,13 +277,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_2); SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n", + printf("PCIE2: connected to Slot 2 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -304,7 +304,7 @@ void pci_init_board(void) LAW_TRGT_IF_PCI); SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -316,7 +316,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c index f9ff827..d354a26 100644 --- a/board/freescale/mpc8540ads/mpc8540ads.c +++ b/board/freescale/mpc8540ads/mpc8540ads.c @@ -47,10 +47,10 @@ int checkboard (void) puts("Board: ADS\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c index 0580fe7..59ec604 100644 --- a/board/freescale/mpc8541cds/mpc8541cds.c +++ b/board/freescale/mpc8541cds/mpc8541cds.c @@ -221,17 +221,17 @@ int checkboard (void) MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev), MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev); - printf (" PCI1: %d bit, %s MHz, %s\n", + printf("PCI1: %d bit, %s MHz, %s\n", (pci1_32) ? 32 : 64, (pci1_speed == 33000000) ? "33" : (pci1_speed == 66000000) ? "66" : "unknown", pci1_clk_sel ? "sync" : "async"); if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } /* diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index da3a2b6..3bbf0c2 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -142,9 +142,9 @@ void pci_init_board(void) pcie3_hose.region_count = 1; #endif - printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); @@ -154,7 +154,7 @@ void pci_init_board(void) */ in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -177,14 +177,14 @@ void pci_init_board(void) pcie1_hose.region_count = 1; #endif - printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -208,13 +208,13 @@ void pci_init_board(void) pcie2_hose.region_count = 1; #endif - printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -231,7 +231,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -243,7 +243,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 23e552b..14c902c 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -284,7 +284,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -308,7 +308,7 @@ void pci_init_board(void) } #endif } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -321,10 +321,10 @@ void pci_init_board(void) uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */ uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */ if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } } #else @@ -337,14 +337,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c index b7e0e0c..edaba26 100644 --- a/board/freescale/mpc8555cds/mpc8555cds.c +++ b/board/freescale/mpc8555cds/mpc8555cds.c @@ -219,17 +219,17 @@ int checkboard (void) MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev), MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev); - printf (" PCI1: %d bit, %s MHz, %s\n", + printf("PCI1: %d bit, %s MHz, %s\n", (pci1_32) ? 32 : 64, (pci1_speed == 33000000) ? "33" : (pci1_speed == 66000000) ? "66" : "unknown", pci1_clk_sel ? "sync" : "async"); if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } /* diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c index 423e9d7..1761431 100644 --- a/board/freescale/mpc8560ads/mpc8560ads.c +++ b/board/freescale/mpc8560ads/mpc8560ads.c @@ -252,10 +252,10 @@ int checkboard (void) puts("Board: ADS\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index bd859e4..d74fcac 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -378,7 +378,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -390,7 +390,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -404,14 +404,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 743e712..dc0884e 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -584,13 +584,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 6b96dfc..2125274 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -192,9 +192,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){ SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); /* @@ -211,7 +211,7 @@ void pci_init_board(void) in_be32(p); } } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -224,13 +224,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -244,13 +244,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index f67f3e3..61a635d 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -244,14 +244,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -265,13 +265,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -283,14 +283,14 @@ void pci_init_board(void) if (!(devdisr & MPC86xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf(" PCI connected to PCI slots as %s" \ + printf("PCI: connected to PCI slots as %s" \ " (base address %lx)\n", pci_agent ? "Agent" : "Host", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 092ead6..812111d 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -157,9 +157,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); @@ -171,22 +171,22 @@ void pci_init_board(void) + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000))); } else { - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); } #else - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); #else - puts(" PCIE2: disabled\n"); + puts("PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index ee93e8b..7cb549b 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info, set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law); set_next_law(info->io_phys, law_size_bits(info->io_size), info->law); is_endpoint = fsl_setup_hose(hose, info->regs); - printf(" PCIE%u connected to %s as %s (base addr %lx)\n", + printf("PCIE%u: connected to %s as %s (base addr %lx)\n", info->pci_num, connected, is_endpoint ? "Endpoint" : "Root Complex", info->regs); bus_number = fsl_pci_init_port(info, hose, bus_number); @@ -255,7 +255,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 1); configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1)); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */ @@ -266,7 +266,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 2); configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2)); } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */ @@ -277,7 +277,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 3); configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3)); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c index 97d4f83..e2ed29c 100644 --- a/board/freescale/p1_p2_rdb/pci.c +++ b/board/freescale/p1_p2_rdb/pci.c @@ -65,13 +65,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); #else @@ -84,13 +84,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); #else diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 608ff91..f988272 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -218,9 +218,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); @@ -245,7 +245,7 @@ void pci_init_board(void) } #endif } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); #else @@ -258,13 +258,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -277,13 +277,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); #else diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index a302b91..0b8ea81 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -59,10 +59,10 @@ int checkboard (void) puts("Board: MicroSys PM854\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c index f9d92d9..4e059b0 100644 --- a/board/pm856/pm856.c +++ b/board/pm856/pm856.c @@ -213,10 +213,10 @@ int checkboard (void) puts("Board: MicroSys PM856\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 733979c..272428f 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -342,7 +342,7 @@ pci_init_board(void) uint pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; uint pci_speed = CONFIG_SYS_CLK_FREQ; /* get_clock_freq() */ - printf (" PCI host: %d bit, %s MHz, %s, %s\n", + printf("PCI: Host, %d bit, %s MHz, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33000000) ? "33" : (pci_speed == 66000000) ? "66" : "unknown", @@ -353,7 +353,7 @@ pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -368,11 +368,11 @@ pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); - printf (" PCIE at base address %lx\n", pci_info[num].regs); + printf("PCIE: base address %lx\n", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE: disabled\n"); + printf("PCIE: disabled\n"); } puts("\n"); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index d954d2f..5bf2364 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -221,29 +221,29 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); } #else - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); #else - puts(" PCIE2: disabled\n"); + puts("PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 2c3885f..362b335 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -567,7 +567,7 @@ void pci_init_board (void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s\n", + printf("PCI1: %d bit, %s MHz, %s, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33333333) ? "33" : (pci_speed == 66666666) ? "66" : "unknown", @@ -591,7 +591,7 @@ void pci_init_board (void) } #endif } else { - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); @@ -603,12 +603,12 @@ void pci_init_board (void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s\n", + printf("PCIE1: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c index f425cee..4a0965b 100644 --- a/board/xes/common/fsl_8xxx_pci.c +++ b/board/xes/common/fsl_8xxx_pci.c @@ -95,7 +95,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n", + printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n", pci_32 ? 32 : 64, pcix ? "PCIX" : "PCI", pci_spd_norm ? ">=" : "<=", @@ -106,7 +106,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); } #elif defined CONFIG_MPC8548 /* PCI1 not present on MPC8572 */ @@ -119,12 +119,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s\n", + printf("PCIE1: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1); @@ -136,12 +136,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s\n", + printf("PCIE2: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2); @@ -153,12 +153,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected as %s\n", + printf("PCIE3: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3); diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 45794da..21cbb3b 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -391,11 +391,11 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) * 1 == pci agent or pcie end-point */ if (!temp8) { - printf(" Scanning PCI bus %02x\n", + printf(" Scanning PCI bus %02x\n", hose->current_busno); hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno); } else { - debug(" Not scanning PCI bus %02x. PI=%x\n", + debug(" Not scanning PCI bus %02x. PI=%x\n", hose->current_busno, temp8); hose->last_busno = hose->current_busno; } @@ -482,9 +482,9 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, } pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap); - printf(" PCI%s%x on bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? - "E" : "", pci_info->pci_num, - hose->first_busno, hose->last_busno); + printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? + "E" : "", pci_info->pci_num, + hose->first_busno, hose->last_busno); return(hose->last_busno + 1); } -- 1.7.0.4

2 11

[U-Boot] [PATCH 1/3] mpc8641hpcn: Update PCI code
by Peter Tyser 14 Nov '10

14 Nov '10

Update to use the recent, common FSL PCI initialization code. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- I was making the same changes to X-ES code, so applied them to other users of the old PCI init code. I only compile tested them on these boards. board/freescale/mpc8641hpcn/mpc8641hpcn.c | 97 +++++++---------------------- 1 files changed, 22 insertions(+), 75 deletions(-) diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index fee310a..092ead6 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -142,56 +142,26 @@ int first_free_busno = 0; void pci_init_board(void) { + struct fsl_pci_info pci_info[2]; + int pcie_ep; + int num = 0; + #ifdef CONFIG_PCIE1 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; - struct pci_controller *hose = &pcie1_hose; - struct pci_region *r = hose->regions; volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; volatile ccsr_gur_t *gur = &immap->im_gur; - uint devdisr = gur->devdisr; + uint devdisr = in_be32(&gur->devdisr); uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL) >> MPC8641_PORDEVSR_IO_SEL_SHIFT; int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); -#ifdef DEBUG - uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA) - >> MPC8641_PORBMSR_HA_SHIFT; - uint pex1_agent = (host1_agent == 0) || (host1_agent == 1); -#endif if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { - debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host"); - debug("0x%08x=0x%08x ", &pci->pme_msg_det, pci->pme_msg_det); - if (pci->pme_msg_det) { - pci->pme_msg_det = 0xffffffff; - debug(" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); - } - debug("\n"); - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BUS, - CONFIG_SYS_PCIE1_MEM_PHYS, - CONFIG_SYS_PCIE1_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE1_IO_BUS, - CONFIG_SYS_PCIE1_IO_PHYS, - CONFIG_SYS_PCIE1_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf (" PCI-EXPRESS 1 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); + SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); + printf(" PCIE1 connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie1_hose, first_free_busno); /* * Activate ULI1575 legacy chip by performing a fake @@ -201,45 +171,22 @@ void pci_init_board(void) + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000))); } else { - puts("PCI-EXPRESS 1: Disabled\n"); + puts(" PCIE1: disabled\n"); } -} #else - puts("PCI-EXPRESS1: Disabled\n"); + puts(" PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; - struct pci_controller *hose = &pcie2_hose; - struct pci_region *r = hose->regions; - - /* outbound memory */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BUS, - CONFIG_SYS_PCIE2_MEM_PHYS, - CONFIG_SYS_PCIE2_MEM_SIZE, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - CONFIG_SYS_PCIE2_IO_BUS, - CONFIG_SYS_PCIE2_IO_PHYS, - CONFIG_SYS_PCIE2_IO_SIZE, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - - hose->first_busno=first_free_busno; - - fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - first_free_busno=hose->last_busno+1; - printf (" PCI-EXPRESS 2 on bus %02x - %02x\n", - hose->first_busno,hose->last_busno); -} + SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); + printf(" PCIE2 connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie2_hose, first_free_busno); #else - puts("PCI-EXPRESS 2: Disabled\n"); + puts(" PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } -- 1.7.0.4

3 14

[U-Boot] [PATCH 01/10 v2] net: rtl8169: Add initialized eth_device structure
by Nobuhiro Iwamatsu 14 Nov '10

14 Nov '10

rtl8169 does not have write_hwaddr function. However, eth stuff executes write_hwaddr function because eth_device structure has not been initialized. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> CC: Ben Warren <biggerbadderben(a)gmail.com> --- drivers/net/rtl8169.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e45d1a5..d6bc514 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -894,7 +894,12 @@ int rtl8169_initialize(bd_t *bis) debug ("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); dev = (struct eth_device *)malloc(sizeof *dev); - + if (!dev) { + printf("Can not allocate memory of rtl8169\n"); + break; + } + + memset(dev, 0, sizeof(*dev)); sprintf (dev->name, "RTL8169#%d", card_number); dev->priv = (void *) devno; -- 1.7.1

2 22

[U-Boot] [RFCv2 0/3] Add support for quick boot
by Sanjeev Premi 14 Nov '10

14 Nov '10

This series attempts to address specific feedback[1] from Wolfgang Denk to my previous submission. Since this series is based on u-boot master, it is missing these patches for successful build: a) omap3evm: Support relocation http://marc.info/?l=u-boot&m=128748423503307&w=2 b) omap3evm: Move function to identify board revision http://marc.info/?l=u-boot&m=128749414618147&w=2 c) omap3evm: Fix mechanism to identify board revision http://marc.info/?l=u-boot&m=128757192518074&w=2 I am hoping this series illustrates exact changes done. However, my choice of filenames results in rather long config names for two new configurations. I plan to replace "quick" with simple "q". Does it sound ok? References: [1] http://marc.info/?l=u-boot&m=128828487429161&w=2 [2] http://marc.info/?l=u-boot&m=128818733126234&w=2 [3] http://marc.info/?l=u-boot&m=128818664024766&w=2 Patch (a) is required for successful build for current configuration. Patches (b) and (c) were required for successful build of "quick" configurations. I am yet to test these on this patchset. Will do before final submission. Sanjeev Premi (3): omap3evm: Reorder related config options omap3evm: move common config options to new file omap3evm: Add quick boot configurations boards.cfg | 2 + include/configs/omap3_evm.h | 302 +++++++------------------------- include/configs/omap3_evm_common.h | 226 ++++++++++++++++++++++++ include/configs/omap3_evm_quick_mmc.h | 53 ++++++ include/configs/omap3_evm_quick_nand.h | 48 +++++ 5 files changed, 391 insertions(+), 240 deletions(-) create mode 100644 include/configs/omap3_evm_common.h create mode 100644 include/configs/omap3_evm_quick_mmc.h create mode 100644 include/configs/omap3_evm_quick_nand.h -- 1.7.2.2

3 2