October 2010 - U-Boot

[U-Boot] [PATCH] Kirkwood: bugfix: broken early console messages
by Prafulla Wadaskar 20 Oct '10

20 Oct '10

It has been observed that, the complete u-boot banner does not appear on the console when the system is booted from NAND/NOR/SPI flash. This patch fixes this issue on all Marvell boards by adding board_early_init_f() support Signed-off-by: Prafulla Wadaskar <prafulla(a)marvell.com> --- board/Marvell/guruplug/guruplug.c | 6 +++++- board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 6 +++++- board/Marvell/openrd_base/openrd_base.c | 6 +++++- board/Marvell/rd6281a/rd6281a.c | 6 +++++- board/Marvell/sheevaplug/sheevaplug.c | 6 +++++- include/configs/mv-common.h | 1 + 6 files changed, 26 insertions(+), 5 deletions(-) diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c index 4df4e9b..1f0e67a 100644 --- a/board/Marvell/guruplug/guruplug.c +++ b/board/Marvell/guruplug/guruplug.c @@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) +int board_early_init_f(void) { /* * default gpio configuration @@ -96,7 +96,11 @@ int board_init(void) 0 }; kirkwood_mpp_conf(kwmpp_config); + return 0; +} +int board_init(void) +{ /* * arch number of board */ diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c index 93d1400..80fd20b 100644 --- a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c @@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) +int board_early_init_f(void) { /* * default gpio configuration @@ -98,7 +98,11 @@ int board_init(void) 0 }; kirkwood_mpp_conf(kwmpp_config); + return 0; +} +int board_init(void) +{ /* * arch number of board */ diff --git a/board/Marvell/openrd_base/openrd_base.c b/board/Marvell/openrd_base/openrd_base.c index d006b2d..10109c1 100644 --- a/board/Marvell/openrd_base/openrd_base.c +++ b/board/Marvell/openrd_base/openrd_base.c @@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) +int board_early_init_f(void) { /* * default gpio configuration @@ -102,7 +102,11 @@ int board_init(void) }; kirkwood_mpp_conf(kwmpp_config); + return 0; +} +int board_init(void) +{ /* * arch number of board */ diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c index 0d76146..e69e035 100644 --- a/board/Marvell/rd6281a/rd6281a.c +++ b/board/Marvell/rd6281a/rd6281a.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) +int board_early_init_f(void) { /* * default gpio configuration @@ -97,7 +97,11 @@ int board_init(void) 0 }; kirkwood_mpp_conf(kwmpp_config); + return 0; +} +int board_init(void) +{ /* * arch number of board */ diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 173a7b8..d7dc80c 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init(void) +int board_early_init_f(void) { /* * default gpio configuration @@ -96,7 +96,11 @@ int board_init(void) 0 }; kirkwood_mpp_conf(kwmpp_config); + return 0; +} +int board_init(void) +{ /* * arch number of board */ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index bdcebd3..39f0f08 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -142,6 +142,7 @@ #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits*/ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ #define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ -- 1.5.3.3

2 2

[U-Boot] [PATCH] mmc: constify & localize data
by Mike Frysinger 20 Oct '10

20 Oct '10

These local vars need not be writable nor exported. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- drivers/mmc/mmc.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index c543d83..0e6c710 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -567,7 +567,7 @@ retry_scr: /* frequency bases */ /* divided by 10 to be nice to platforms without floating point */ -int fbase[] = { +static const int fbase[] = { 10000, 100000, 1000000, @@ -577,7 +577,7 @@ int fbase[] = { /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice * to platforms without floating point. */ -int multipliers[] = { +static const int multipliers[] = { 0, /* reserved */ 10, 12, -- 1.7.3.1

1 0

[U-Boot] Notification in Malloc
by Kostaras Nikolaos 20 Oct '10

20 Oct '10

Hi, During some tests with the u-boot-2010.09 source release, I discovered that when invoking malloc with size 0, the code proceeds and corrupts the malloc structures, thus totally breaking the malloc invocations from then on (malloc will always fail after that). The cause of my problem was a burned flash chip, that returned 0 in regions, in the "cfi_mtd_set_erasesize" call. My solution was to modify the first check of malloc, in order not to freeze when there was an error on the requested space. New condition includes the equal as well as the less: if ((long)bytes <= 0) return 0; This seems to fix the problems, after the malloc invocation with size 0. If there is another way to deal with this, plz keep me posted. Thanks, Nik

2 1

[U-Boot] [Patch] update board EB+CPUx9K2
by Jens Scharsig 20 Oct '10

20 Oct '10

* update to support arm reloaction * unnecessary environment variables removed Signed-off-by: Jens Scharsig <js_at_ng(a)scharsoft.de> --- board/BuS/eb_cpux9k2/config.mk | 2 +- board/BuS/eb_cpux9k2/cpux9k2.c | 7 +++---- include/configs/eb_cpux9k2.h | 21 +++++++-------------- 3 files changed, 11 insertions(+), 19 deletions(-) diff --git a/board/BuS/eb_cpux9k2/config.mk b/board/BuS/eb_cpux9k2/config.mk index ff2cfd1..ac2515d 100644 --- a/board/BuS/eb_cpux9k2/config.mk +++ b/board/BuS/eb_cpux9k2/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +TEXT_BASE = 0x00000000 diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index bbceaf3..fe62a0f 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -66,7 +66,7 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2; /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_STATUS_LED status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); @@ -134,9 +134,8 @@ void reset_phy(void) int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = - get_ram_size((volatile long *) PHYS_SDRAM, PHYS_SDRAM_SIZE); + gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; } diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 4ff4a85..2569bf9 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -98,12 +98,14 @@ */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ +#define CONFIG_SYS_INIT_SP_ADDR 0x00204000 /* use internal SRAM */ + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - PHYS_SDRAM_SIZE - 0x00400000 - \ + CONFIG_SYS_SDRAM_SIZE - 0x00400000 - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* PIOC as D16/D31 */ @@ -249,6 +251,7 @@ /* FLASH organization */ /* NOR-FLASH */ +#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_FLASH_CFI_DRIVER 1 @@ -396,16 +399,6 @@ "nandboot=run bootargsdefaults;" \ "set bootargs $(bootargs) root=initramfs boot=nand " \ ";bootm $(kerneladdr)\0" \ - "uu=run update_uboot\0" \ - "ur=run update_root;run nk\0" \ - "nk=run bootargsdefaults;set bootargs $(bootargs) root=initramfs " \ - "boot=local " \ - ";echo $(bootargs)" \ - ";dhcp uImage_cpux9k2;bootm\0" \ - "nn=run bootargsdefaults;set bootargs $(bootargs) root=initramfs " \ - "boot=nand " \ - ";echo $(bootargs)" \ - ";dhcp uImage_cpux9k2;bootm\0" \ " " /*--------------------------------------------------------------------------*/ -- 1.7.1

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[U-Boot] [PATCH] MX51: add CONFIG_SYS_TEXT_BASE to vision2 board, use general ld script
by Stefano Babic 20 Oct '10

20 Oct '10

Recent patch changed TEXT_BASE to CONFIG_SYS_TEXT_BASE and vision2 board was not updated. Signed-off-by: Stefano Babic <sbabic(a)denx.de> --- board/ttcontrol/vision2/config.mk | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/ttcontrol/vision2/config.mk b/board/ttcontrol/vision2/config.mk index 59f3367..952037e 100644 --- a/board/ttcontrol/vision2/config.mk +++ b/board/ttcontrol/vision2/config.mk @@ -20,6 +20,6 @@ # MA 02111-1307 USA # -LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds -TEXT_BASE = 0x97800000 +CONFIG_SYS_TEXT_BASE = 0x97800000 IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage_hynix.cfg +ALL += $(obj)u-boot.imx -- 1.7.1

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[U-Boot] [PATCH][v2] RTC driver for PT7C4338 chip.
by Priyanka Jain 20 Oct '10

20 Oct '10

PT7C4338 chip is manufactured by Pericom Technology Inc. It is a serial real-time clock which provides: 1)Low-power clock/calendar. 2)Programmable square-wave output. It has 56 bytes of nonvolatile RAM. Freescale P1010RDB uses PT7C4338 as RTC. Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> Acked-by: Timur Tabi <timur(a)freescale.com> --- Incoperated Heiko's review comments. drivers/rtc/Makefile | 1 + drivers/rtc/pt7c4338.c | 154 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 155 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/pt7c4338.c diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 98734db..bbf9a7e 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -57,6 +57,7 @@ COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o COBJS-$(CONFIG_RTC_PL031) += pl031.o +COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o COBJS-$(CONFIG_RTC_RX8025) += rx8025.o diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c new file mode 100644 index 0000000..016da4f --- /dev/null +++ b/drivers/rtc/pt7c4338.c @@ -0,0 +1,154 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * + * Author: Priyanka Jain <Priyanka.Jain(a)freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file provides Date & Time support (no alarms) for PT7C4338 chip. + * + * This file is based on drivers/rtc/ds1337.c + * + * PT7C4338 chip is manufactured by Pericom Technology Inc. + * It is a serial real-time clock which provides + * 1)Low-power clock/calendar. + * 2)Programmable square-wave output. + * It has 56 bytes of nonvolatile RAM. + * + * Freescale P1010RDB uses PT7C4338 as RTC. + */ + +#include <common.h> +#include <command.h> +#include <rtc.h> +#include <i2c.h> + +/* RTC register addresses */ +#define RTC_SEC_REG_ADDR 0x0 +#define RTC_MIN_REG_ADDR 0x1 +#define RTC_HR_REG_ADDR 0x2 +#define RTC_DAY_REG_ADDR 0x3 +#define RTC_DATE_REG_ADDR 0x4 +#define RTC_MON_REG_ADDR 0x5 +#define RTC_YR_REG_ADDR 0x6 +#define RTC_CTL_STAT_REG_ADDR 0x7 + +/* RTC second register address bit */ +#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */ + +/* RTC control and status register bits */ +#define RTC_CTL_STAT_BIT_RS0 0x1 /* Rate select 0 */ +#define RTC_CTL_STAT_BIT_RS1 0x2 /* Rate select 1 */ +#define RTC_CTL_STAT_BIT_SQWE 0x10 /* Square Wave Enable */ +#define RTC_CTL_STAT_BIT_OSF 0x20 /* Oscillator Stop Flag */ +#define RTC_CTL_STAT_BIT_OUT 0x80 /* Output Level Control */ + +/* RTC reset value */ +#define RTC_PT7C4338_RESET_VAL \ + (RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT) + +/****** Helper functions ****************************************/ +static u8 rtc_read(u8 reg) +{ + return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg); +} + +static void rtc_write(u8 reg, u8 val) +{ + i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val); +} +/****************************************************************/ + +/* Get the current time from the RTC */ +int rtc_get(struct rtc_time *tmp) +{ + int ret = 0; + u8 sec, min, hour, mday, wday, mon, year, ctl_stat; + + ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR); + sec = rtc_read(RTC_SEC_REG_ADDR); + min = rtc_read(RTC_MIN_REG_ADDR); + hour = rtc_read(RTC_HR_REG_ADDR); + wday = rtc_read(RTC_DAY_REG_ADDR); + mday = rtc_read(RTC_DATE_REG_ADDR); + mon = rtc_read(RTC_MON_REG_ADDR); + year = rtc_read(RTC_YR_REG_ADDR); + debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x control_status: %02x\n", + year, mon, mday, wday, hour, min, sec, ctl_stat); + + if (ctl_stat & RTC_CTL_STAT_BIT_OSF) { + printf("### Warning: RTC oscillator has stopped\n"); + /* clear the OSF flag */ + rtc_write(RTC_CTL_STAT_REG_ADDR, + rtc_read(RTC_CTL_STAT_REG_ADDR)\ + & ~RTC_CTL_STAT_BIT_OSF); + ret = -1; + } + + if (sec & RTC_SEC_BIT_CH) { + printf("### Warning: RTC oscillator has stopped\n"); + /* clear the CH flag */ + rtc_write(RTC_SEC_REG_ADDR, + rtc_read(RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); + ret = -1; + } + + tmp->tm_sec = bcd2bin(sec & 0x7F); + tmp->tm_min = bcd2bin(min & 0x7F); + tmp->tm_hour = bcd2bin(hour & 0x3F); + tmp->tm_mday = bcd2bin(mday & 0x3F); + tmp->tm_mon = bcd2bin(mon & 0x1F); + tmp->tm_year = bcd2bin(year) + 2000; + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return ret; +} + +/* Set the RTC */ +int rtc_set(struct rtc_time *tmp) +{ + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)); + rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon)); + rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1)); + rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)); + rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)); + rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)); + rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)); + + return 0; +} + +/* Reset the RTC */ +void rtc_reset(void) +{ + rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ + rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL); +} -- 1.6.5.6

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[U-Boot] [PATCH] arm926ejs, suen3: fix relocation issues
by Heiko Schocher 20 Oct '10

20 Oct '10

- use internal 2k security SRAM as RAM for early stack. - do early inits in board_init_f() Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Prafulla Wadaskar <prafulla(a)marvell.com> --- board/keymile/km_arm/km_arm.c | 24 +++++++++++++++--------- include/configs/km_arm.h | 6 ++++-- 2 files changed, 19 insertions(+), 11 deletions(-) diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 7c0b858..a2a8bfe 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -143,7 +143,7 @@ int misc_init_r(void) return 0; } -int board_init(void) +int board_early_init_f(void) { u32 tmp; @@ -160,14 +160,6 @@ int board_init(void) writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4); printf("KM: setting NAND mode\n"); - /* - * arch number of board - */ - gd->bd->bi_arch_number = MACH_TYPE_SUEN3; - - /* address of boot parameters */ - gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; - #if defined(CONFIG_SOFT_I2C) /* init the GPIO for I2C Bitbang driver */ kw_gpio_set_valid(SUEN3_SDA_PIN, 1); @@ -179,6 +171,20 @@ int board_init(void) kw_gpio_set_valid(SUEN3_ENV_WP, 38); kw_gpio_direction_output(SUEN3_ENV_WP, 1); #endif + + return 0; +} + +int board_init(void) +{ + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_SUEN3; + + /* address of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + return 0; } diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h index faa0f50..9270296 100644 --- a/include/configs/km_arm.h +++ b/include/configs/km_arm.h @@ -182,6 +182,8 @@ int get_scl (void); /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INIT_SP_ADDR (0x00000000 + 0x1000 - /* Fix this */ \ - CONFIG_SYS_GBL_DATA_SIZE) +/* Kirkwood has 2k of Security SRAM, use it for SP */ +#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 +/* Do early setups now in board_init_f() */ +#define CONFIG_BOARD_EARLY_INIT_F 1 #endif /* _CONFIG_KM_ARM_H */ -- 1.7.2.3

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[U-Boot] [PATCH v4 00/01] NDS32: Add NDS32 architecture support to u-boot.
by Macpaul Lin 20 Oct '10

20 Oct '10

NDS32 is a new 32-bit RISC architecture invented by andestech.com. It has a 16-bit/32-bit mixed-length instruction set to achieve optimal system performance, code density, and power efficiency. NDS32 also provide N9, N10, N12 different CPU core families for soft-core and hard-core SoC design. Macpaul Lin (1): nds32: add header files support for nds32 Patch v1: First commit of NDS32 arch to u-boot, add ag101, adp-ag101 into u-boot. Patch v2: Clean up for Patch v1, and reorganize code of ag101 from a320. Patch v3: Clean up for Patch v2, and reordering and reduce the size and patches. Patch v4: Clear up for Patch v3, remove code that haven't used in the system. Then commit header files only. Note: Empty headers config.h, memory.h, processor.h are necessary for compiling some device drivers. Otherwise those drivers won't be build. -- 1.7.2.2

1 1

[U-Boot] [PATCH] Blackfin: adi boards: set compiled size limits
by Mike Frysinger 20 Oct '10

20 Oct '10

Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- include/configs/bf548-ezkit.h | 1 + include/configs/bfin_adi_common.h | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 4412177..1c035cf 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -180,6 +180,7 @@ * Misc Settings */ #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_SIZE_LIMIT $$(( 512 * 1024 )) #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 1 #define CONFIG_BFIN_SPI_IMG_SIZE 0x50000 diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 608788a..03c6433 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -295,6 +295,9 @@ /* * Misc Settings */ +#ifndef CONFIG_BOARD_SIZE_LIMIT +# define CONFIG_BOARD_SIZE_LIMIT $$(( 256 * 1024 )) +#endif #define CONFIG_BFIN_SPI_GPIO_CS /* Only matters if BFIN_SPI is enabled */ #define CONFIG_LZMA -- 1.7.3.1

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[U-Boot] [PATCH/RFC] cmd_tbl_t: constify (and sometimes localize)
by Mike Frysinger 20 Oct '10

20 Oct '10

1 0