August 2009 - U-Boot

[U-Boot] Ping on u-boot patch status
by Richard Retanubun 11 Aug '09

11 Aug '09

Hi Ben, Just ping-ing the status of these patches to u-boot. If I have sent them badly, please let me know and I can repost. 1. 83xx: UEC: Added support for bitBang MII driver access to PHYs ================================================================ http://www.mail-archive.com/u-boot@lists.denx.de/msg16588.html >> I am aware of peter tyser's comment and will /s CONFIG_MPC83XX with CONFIG_MPC83xx << 2. UEC FIXED PHY: Determine fixed-phy port using UEC interface name =================================================================== http://www.mail-archive.com/u-boot@lists.denx.de/msg16587.html 3. Assigned a static SMI address to all UECs TBIPA address ========================================================== http://www.mail-archive.com/u-boot@lists.denx.de/msg16586.html Thanks very much for your time - Richard

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[U-Boot] [PATCH] ARM: Davinci DM355: Enabling DM9000 on DM355 EVM
by s-paulraj＠ti.com 11 Aug '09

11 Aug '09

From: Sandeep Paulraj <s-paulraj(a)ti.com> Due to recent changes to the NET support on U-boot, DM9000 is no longer detected on the DM355 EVM. This minor update enables DM9000 on the DM355 EVM. Tested on the DM355 EVM Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> --- board/davinci/dm355evm/dm355evm.c | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/board/davinci/dm355evm/dm355evm.c b/board/davinci/dm355evm/dm355evm.c index 398f527..0a44748 100644 --- a/board/davinci/dm355evm/dm355evm.c +++ b/board/davinci/dm355evm/dm355evm.c @@ -23,7 +23,8 @@ #include <asm/arch/emif_defs.h> #include <asm/arch/nand_defs.h> #include "../common/misc.h" - +#include <net.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -79,6 +80,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_DRIVER_DM9000 +int board_eth_init(bd_t *bis) +{ + return dm9000_initialize(bis); +} +#endif + #ifdef CONFIG_NAND_DAVINCI static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip) -- 1.6.0.4

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[U-Boot] [PATCH] Fix E1000 build warning on AP1000 board
by Roy Zang 10 Aug '09

10 Aug '09

From: Roy Zang <tie-fei.zang(a)freescale.com> Fix E1000 build warning on AP1000 board Fix the build warning on AP1000 board: e1000.c:131: warning: 'e1000_read_eeprom' used but never defined e1000.c:2012: warning: 'e1000_set_phy_mode' defined but not used Signed-off-by: Roy Zang <tie-fei.zang(a)freescale.com> --- drivers/net/e1000.c | 88 +++++++++++++++++++++++++------------------------- 1 files changed, 44 insertions(+), 44 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index e3c6cea..777783a 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -126,9 +126,6 @@ static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, static int32_t e1000_phy_hw_reset(struct e1000_hw *hw); static int e1000_phy_reset(struct e1000_hw *hw); static int e1000_detect_gig_phy(struct e1000_hw *hw); -static int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset, - uint16_t words, - uint16_t *data); static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw); static void e1000_set_media_type(struct e1000_hw *hw); @@ -143,6 +140,9 @@ static int32_t e1000_check_phy_reset_block(struct e1000_hw *hw); #define E1000_WRITE_FLUSH(a) {uint32_t x; x = E1000_READ_REG(a, STATUS);} #ifndef CONFIG_AP1000 /* remove for warnings */ +static int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset, + uint16_t words, + uint16_t *data); /****************************************************************************** * Raises the EEPROM's clock input. * @@ -896,6 +896,47 @@ e1000_validate_eeprom_checksum(struct eth_device *nic) return -E1000_ERR_EEPROM; } } + +/***************************************************************************** + * Set PHY to class A mode + * Assumes the following operations will follow to enable the new class mode. + * 1. Do a PHY soft reset + * 2. Restart auto-negotiation or force link. + * + * hw - Struct containing variables accessed by shared code + ****************************************************************************/ +static int32_t +e1000_set_phy_mode(struct e1000_hw *hw) +{ + int32_t ret_val; + uint16_t eeprom_data; + + DEBUGFUNC(); + + if ((hw->mac_type == e1000_82545_rev_3) && + (hw->media_type == e1000_media_type_copper)) { + ret_val = e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, + 1, &eeprom_data); + if (ret_val) + return ret_val; + + if ((eeprom_data != EEPROM_RESERVED_WORD) && + (eeprom_data & EEPROM_PHY_CLASS_A)) { + ret_val = e1000_write_phy_reg(hw, + M88E1000_PHY_PAGE_SELECT, 0x000B); + if (ret_val) + return ret_val; + ret_val = e1000_write_phy_reg(hw, + M88E1000_PHY_GEN_CONTROL, 0x8104); + if (ret_val) + return ret_val; + + hw->phy_reset_disable = FALSE; + } + } + + return E1000_SUCCESS; +} #endif /* #ifndef CONFIG_AP1000 */ /*************************************************************************** @@ -1999,47 +2040,6 @@ e1000_setup_fiber_link(struct eth_device *nic) return 0; } -/***************************************************************************** - * Set PHY to class A mode - * Assumes the following operations will follow to enable the new class mode. - * 1. Do a PHY soft reset - * 2. Restart auto-negotiation or force link. - * - * hw - Struct containing variables accessed by shared code - ****************************************************************************/ -static int32_t -e1000_set_phy_mode(struct e1000_hw *hw) -{ - int32_t ret_val; - uint16_t eeprom_data; - - DEBUGFUNC(); - - if ((hw->mac_type == e1000_82545_rev_3) && - (hw->media_type == e1000_media_type_copper)) { - ret_val = e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, - 1, &eeprom_data); - if (ret_val) - return ret_val; - - if ((eeprom_data != EEPROM_RESERVED_WORD) && - (eeprom_data & EEPROM_PHY_CLASS_A)) { - ret_val = e1000_write_phy_reg(hw, - M88E1000_PHY_PAGE_SELECT, 0x000B); - if (ret_val) - return ret_val; - ret_val = e1000_write_phy_reg(hw, - M88E1000_PHY_GEN_CONTROL, 0x8104); - if (ret_val) - return ret_val; - - hw->phy_reset_disable = FALSE; - } - } - - return E1000_SUCCESS; -} - /****************************************************************************** * Make sure we have a valid PHY and change PHY mode before link setup. * -- 1.5.6.5

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[U-Boot] [PATCH] net/tftp.c: fix warning: pointer targets differ in signedness
by Wolfgang Denk 10 Aug '09

10 Aug '09

tftp.c:294: warning: pointer targets in passing argument 1 of 'strlen' differ in signedness This was only visible for the utx8245 board which seems to have DEBUG enabled. Signed-off-by: Wolfgang Denk <wd(a)denx.de> --- net/tftp.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/net/tftp.c b/net/tftp.c index 74d9e42..fb98a34 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -291,7 +291,9 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len) break; case TFTP_OACK: - debug("Got OACK: %s %s\n", pkt, pkt+strlen(pkt)+1); + debug("Got OACK: %s %s\n", + pkt, + pkt + strlen((char *)pkt) + 1); TftpState = STATE_OACK; TftpServerPort = src; /* -- 1.6.0.6

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[U-Boot] [PATCH v5 1/3] arm: A320: driver for FTMAC100 ethernet controller
by ratbert.chuang＠gmail.com 10 Aug '09

10 Aug '09

From: Po-Yu Chuang <ratbert(a)faraday-tech.com> This patch adds an FTMAC100 ethernet driver for Faraday A320 evaluation board. Signed-off-by: Po-Yu Chuang <ratbert(a)faraday-tech.com> --- drivers/net/Makefile | 1 + drivers/net/ftmac100.c | 278 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/ftmac100.h | 154 ++++++++++++++++++++++++++ include/netdev.h | 1 + 4 files changed, 434 insertions(+), 0 deletions(-) create mode 100644 drivers/net/ftmac100.c create mode 100644 drivers/net/ftmac100.h diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 34b56d8..1c6e402 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -39,6 +39,7 @@ COBJS-$(CONFIG_EEPRO100) += eepro100.o COBJS-$(CONFIG_ENC28J60) += enc28j60.o COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o +COBJS-$(CONFIG_FTMAC100) += ftmac100.o COBJS-$(CONFIG_GRETH) += greth.o COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o COBJS-$(CONFIG_KIRKWOOD_EGIGA) += kirkwood_egiga.o diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c new file mode 100644 index 0000000..2328cb5 --- /dev/null +++ b/drivers/net/ftmac100.c @@ -0,0 +1,278 @@ +/* + * Faraday FTMAC100 Ethernet + * + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert(a)faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <config.h> +#include <common.h> +#include <malloc.h> +#include <net.h> +#include <asm/io.h> + +#include "ftmac100.h" + +#define ETH_ZLEN 60 + +struct ftmac100_data { + volatile struct ftmac100_txdes txdes[1]; + volatile struct ftmac100_rxdes rxdes[PKTBUFSRX]; + int rx_index; +}; + +/* + * Reset MAC + */ +static void ftmac100_reset (struct eth_device *dev) +{ + struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + + debug ("%s()\n", __func__); + + writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr); + + while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST) + ; +} + +/* + * Set MAC address + */ +static void ftmac100_set_mac (struct eth_device *dev, const unsigned char *mac) +{ + struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + unsigned int maddr = mac[0] << 8 | mac[1]; + unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; + + debug ("%s(%x %x)\n", __func__, maddr, laddr); + + writel (maddr, &ftmac100->mac_madr); + writel (laddr, &ftmac100->mac_ladr); +} + +static void ftmac100_set_mac_from_env (struct eth_device *dev) +{ + eth_getenv_enetaddr ("ethaddr", dev->enetaddr); + + ftmac100_set_mac (dev, dev->enetaddr); +} + +/* + * disable transmitter, receiver + */ +static void ftmac100_halt (struct eth_device *dev) +{ + struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + + debug ("%s()\n", __func__); + + writel (0, &ftmac100->maccr); +} + +static int ftmac100_init (struct eth_device *dev, bd_t *bd) +{ + struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_txdes *txdes = priv->txdes; + volatile struct ftmac100_rxdes *rxdes = priv->rxdes; + unsigned int maccr; + int i; + + debug ("%s()\n", __func__); + + ftmac100_reset (dev); + + /* set the ethernet address */ + + ftmac100_set_mac_from_env (dev); + + /* disable all interrupts */ + + writel (0, &ftmac100->imr); + + /* initialize descriptors */ + + priv->rx_index = 0; + + txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR; + rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR; + + for (i = 0; i < PKTBUFSRX; i++) { + /* RXBUF_BADR */ + rxdes[i].rxdes2 = (unsigned int)NetRxPackets[i]; + rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); + rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; + } + + /* transmit ring */ + + writel ((unsigned int)txdes, &ftmac100->txr_badr); + + /* receive ring */ + + writel ((unsigned int)rxdes, &ftmac100->rxr_badr); + + /* poll receive descriptor automatically */ + + writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc); + + /* enable transmitter, receiver */ + + maccr = FTMAC100_MACCR_XMT_EN | + FTMAC100_MACCR_RCV_EN | + FTMAC100_MACCR_XDMA_EN | + FTMAC100_MACCR_RDMA_EN | + FTMAC100_MACCR_CRC_APD | + FTMAC100_MACCR_ENRX_IN_HALFTX | + FTMAC100_MACCR_RX_RUNT | + FTMAC100_MACCR_RX_BROADPKT; + + writel (maccr, &ftmac100->maccr); + + return 0; +} + +/* + * Get a data block via Ethernet + */ +static int ftmac100_recv (struct eth_device *dev) +{ + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_rxdes *curr_des; + unsigned short rxlen; + + curr_des = &priv->rxdes[priv->rx_index]; + + if (curr_des->rxdes0 & FTMAC100_RXDES0_RXDMA_OWN) + return -1; + + if (curr_des->rxdes0 & (FTMAC100_RXDES0_RX_ERR | + FTMAC100_RXDES0_CRC_ERR | + FTMAC100_RXDES0_FTL | + FTMAC100_RXDES0_RUNT | + FTMAC100_RXDES0_RX_ODD_NB)) { + return -1; + } + + rxlen = FTMAC100_RXDES0_RFL (curr_des->rxdes0); + + debug ("%s(): RX buffer %d, %x received\n", + __func__, priv->rx_index, rxlen); + + /* pass the packet up to the protocol layers. */ + + NetReceive ((void *)curr_des->rxdes2, rxlen); + + /* release buffer to DMA */ + + curr_des->rxdes0 |= FTMAC100_RXDES0_RXDMA_OWN; + + priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX; + + return 0; +} + +/* + * Send a data block via Ethernet + */ +static int +ftmac100_send (struct eth_device *dev, volatile void *packet, int length) +{ + struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase; + struct ftmac100_data *priv = dev->priv; + volatile struct ftmac100_txdes *curr_des = priv->txdes; + int tmo; + + if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { + debug ("%s(): no TX descriptor available\n", __func__); + return -1; + } + + debug ("%s(%x, %x)\n", __func__, (int)packet, length); + + length = (length < ETH_ZLEN) ? ETH_ZLEN : length; + + /* initiate a transmit sequence */ + + curr_des->txdes2 = (unsigned int)packet; /* TXBUF_BADR */ + + curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; + curr_des->txdes1 |= FTMAC100_TXDES1_FTS | + FTMAC100_TXDES1_LTS | + FTMAC100_TXDES1_TXBUF_SIZE (length); + + curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN; + + /* start transmit */ + + writel (1, &ftmac100->txpd); + + /* wait for transfer to succeed */ + + tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; + while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { + if (get_timer (0) >= tmo) { + debug ("%s(): timed out\n", __func__); + return -1; + } + } + + debug ("%s(): packet sent\n", __func__); + + return 0; +} + +int ftmac100_initialize (bd_t *bd) +{ + struct eth_device *dev; + struct ftmac100_data *priv; + + dev = malloc (sizeof *dev); + if (!dev) { + printf ("%s(): failed to allocate dev\n", __func__); + goto out; + } + + /* Transmit and receive descriptors should align to 16 bytes */ + + priv = memalign (16, sizeof (struct ftmac100_data)); + if (!priv) { + printf ("%s(): failed to allocate priv\n", __func__); + goto free_dev; + } + + memset (dev, 0, sizeof (*dev)); + memset (priv, 0, sizeof (*priv)); + + sprintf (dev->name, "FTMAC100"); + dev->iobase = CONFIG_FTMAC100_BASE; + dev->init = ftmac100_init; + dev->halt = ftmac100_halt; + dev->send = ftmac100_send; + dev->recv = ftmac100_recv; + dev->priv = priv; + + eth_register (dev); + + return 1; + +free_dev: + free (dev); +out: + return 0; +} diff --git a/drivers/net/ftmac100.h b/drivers/net/ftmac100.h new file mode 100644 index 0000000..21142d9 --- /dev/null +++ b/drivers/net/ftmac100.h @@ -0,0 +1,154 @@ +/* + * Faraday FTMAC100 Ethernet + * + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert(a)faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __FTMAC100_H +#define __FTMAC100_H + +struct ftmac100 { + unsigned int isr; /* 0x00 */ + unsigned int imr; /* 0x04 */ + unsigned int mac_madr; /* 0x08 */ + unsigned int mac_ladr; /* 0x0c */ + unsigned int maht0; /* 0x10 */ + unsigned int maht1; /* 0x14 */ + unsigned int txpd; /* 0x18 */ + unsigned int rxpd; /* 0x1c */ + unsigned int txr_badr; /* 0x20 */ + unsigned int rxr_badr; /* 0x24 */ + unsigned int itc; /* 0x28 */ + unsigned int aptc; /* 0x2c */ + unsigned int dblac; /* 0x30 */ + unsigned int pad1[3]; /* 0x34 - 0x3c */ + unsigned int pad2[16]; /* 0x40 - 0x7c */ + unsigned int pad3[2]; /* 0x80 - 0x84 */ + unsigned int maccr; /* 0x88 */ + unsigned int macsr; /* 0x8c */ + unsigned int phycr; /* 0x90 */ + unsigned int phywdata; /* 0x94 */ + unsigned int fcr; /* 0x98 */ + unsigned int bpr; /* 0x9c */ + unsigned int pad4[8]; /* 0xa0 - 0xbc */ + unsigned int pad5; /* 0xc0 */ + unsigned int ts; /* 0xc4 */ + unsigned int dmafifos; /* 0xc8 */ + unsigned int tm; /* 0xcc */ + unsigned int pad6; /* 0xd0 */ + unsigned int tx_mcol_scol; /* 0xd4 */ + unsigned int rpf_aep; /* 0xd8 */ + unsigned int xm_pg; /* 0xdc */ + unsigned int runt_tlcc; /* 0xe0 */ + unsigned int crcer_ftl; /* 0xe4 */ + unsigned int rlc_rcc; /* 0xe8 */ + unsigned int broc; /* 0xec */ + unsigned int mulca; /* 0xf0 */ + unsigned int rp; /* 0xf4 */ + unsigned int xp; /* 0xf8 */ +}; + +/* + * Interrupt status register & interrupt mask register + */ +#define FTMAC100_INT_RPKT_FINISH (1 << 0) +#define FTMAC100_INT_NORXBUF (1 << 1) +#define FTMAC100_INT_XPKT_FINISH (1 << 2) +#define FTMAC100_INT_NOTXBUF (1 << 3) +#define FTMAC100_INT_XPKT_OK (1 << 4) +#define FTMAC100_INT_XPKT_LOST (1 << 5) +#define FTMAC100_INT_RPKT_SAV (1 << 6) +#define FTMAC100_INT_RPKT_LOST (1 << 7) +#define FTMAC100_INT_AHB_ERR (1 << 8) +#define FTMAC100_INT_PHYSTS_CHG (1 << 9) + +/* + * Automatic polling timer control register + */ +#define FTMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) +#define FTMAC100_APTC_RXPOLL_TIME_SEL (1 << 4) +#define FTMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) +#define FTMAC100_APTC_TXPOLL_TIME_SEL (1 << 12) + +/* + * MAC control register + */ +#define FTMAC100_MACCR_XDMA_EN (1 << 0) +#define FTMAC100_MACCR_RDMA_EN (1 << 1) +#define FTMAC100_MACCR_SW_RST (1 << 2) +#define FTMAC100_MACCR_LOOP_EN (1 << 3) +#define FTMAC100_MACCR_CRC_DIS (1 << 4) +#define FTMAC100_MACCR_XMT_EN (1 << 5) +#define FTMAC100_MACCR_ENRX_IN_HALFTX (1 << 6) +#define FTMAC100_MACCR_RCV_EN (1 << 8) +#define FTMAC100_MACCR_HT_MULTI_EN (1 << 9) +#define FTMAC100_MACCR_RX_RUNT (1 << 10) +#define FTMAC100_MACCR_RX_FTL (1 << 11) +#define FTMAC100_MACCR_RCV_ALL (1 << 12) +#define FTMAC100_MACCR_CRC_APD (1 << 14) +#define FTMAC100_MACCR_FULLDUP (1 << 15) +#define FTMAC100_MACCR_RX_MULTIPKT (1 << 16) +#define FTMAC100_MACCR_RX_BROADPKT (1 << 17) + +/* + * Transmit descriptor, aligned to 16 bytes + */ +struct ftmac100_txdes { + unsigned int txdes0; + unsigned int txdes1; + unsigned int txdes2; /* TXBUF_BADR */ + unsigned int txdes3; /* not used by HW */ +} __attribute__ ((aligned(16))); + +#define FTMAC100_TXDES0_TXPKT_LATECOL (1 << 0) +#define FTMAC100_TXDES0_TXPKT_EXSCOL (1 << 1) +#define FTMAC100_TXDES0_TXDMA_OWN (1 << 31) + +#define FTMAC100_TXDES1_TXBUF_SIZE(x) ((x) & 0x7ff) +#define FTMAC100_TXDES1_LTS (1 << 27) +#define FTMAC100_TXDES1_FTS (1 << 28) +#define FTMAC100_TXDES1_TX2FIC (1 << 29) +#define FTMAC100_TXDES1_TXIC (1 << 30) +#define FTMAC100_TXDES1_EDOTR (1 << 31) + +/* + * Receive descriptor, aligned to 16 bytes + */ +struct ftmac100_rxdes { + unsigned int rxdes0; + unsigned int rxdes1; + unsigned int rxdes2; /* RXBUF_BADR */ + unsigned int rxdes3; /* not used by HW */ +} __attribute__ ((aligned(16))); + +#define FTMAC100_RXDES0_RFL(des) ((des) & 0x7ff) +#define FTMAC100_RXDES0_MULTICAST (1 << 16) +#define FTMAC100_RXDES0_BROADCAST (1 << 17) +#define FTMAC100_RXDES0_RX_ERR (1 << 18) +#define FTMAC100_RXDES0_CRC_ERR (1 << 19) +#define FTMAC100_RXDES0_FTL (1 << 20) +#define FTMAC100_RXDES0_RUNT (1 << 21) +#define FTMAC100_RXDES0_RX_ODD_NB (1 << 22) +#define FTMAC100_RXDES0_LRS (1 << 28) +#define FTMAC100_RXDES0_FRS (1 << 29) +#define FTMAC100_RXDES0_RXDMA_OWN (1 << 31) + +#define FTMAC100_RXDES1_RXBUF_SIZE(x) ((x) & 0x7ff) +#define FTMAC100_RXDES1_EDORR (1 << 31) + +#endif /* __FTMAC100_H */ diff --git a/include/netdev.h b/include/netdev.h index 3e66586..50329a3 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -51,6 +51,7 @@ int eepro100_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int fec_initialize (bd_t *bis); int fecmxc_initialize (bd_t *bis); +int ftmac100_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); -- 1.6.3.3

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[U-Boot] [PATCH] 85xx: Removed BEDBUG support from FSL 85xx boards
by Kumar Gala 10 Aug '09

10 Aug '09

For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG support has never been made to work completely on e500/85xx so we just disable it to save space and match the other FSL 85xx boards. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- include/configs/MPC8536DS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/P2020DS.h | 1 - 4 files changed, 0 insertions(+), 4 deletions(-) diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 0aaab4a..9d2b860 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -534,7 +534,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #endif diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 2de3139..0caf456 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -433,7 +433,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI - #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 64f5c4b..d0933ba 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -585,7 +585,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 5c2c5cb..ad24e0c 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -614,7 +614,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 -- 1.6.0.6

1 0

[U-Boot] how big is the NOR flash on 85xx boards?
by Kumar Gala 10 Aug '09

10 Aug '09

I was wondering if we can see how big the NOR flash is on the XES & TQM boards. thanks. - k

3 5

[U-Boot] 85xx: MPC8536DS board does not build
by Wolfgang Denk 10 Aug '09

10 Aug '09

Dear Kumar, I cannot build the MPC8536DS board any more using the ELDK 4.2 tool chain (gcc 4.2.2): ppc_85xx-ld: section .bootpg [effff000 -> effff1cb] overlaps section .data.rel.local [efffe5d0 -> effff c7b] ppc_85xx-ld: section .resetvec [effffffc -> efffffff] overlaps section .u_boot_cmd [effffc9c -> f00003e b] ppc_85xx-ld: u-boot: section .bootpg lma 0xeffff000 overlaps previous sections ppc_85xx-ld: u-boot: section .data.rel.ro lma 0xeffffc7c overlaps previous sections ppc_85xx-ld: u-boot: section .u_boot_cmd lma 0xeffffc9c overlaps previous sections ppc_85xx-ld: u-boot: section .resetvec lma 0xeffffffc overlaps previous sections Could you please have a look? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "Why waste negative entropy on comments, when you could use the same entropy to create bugs instead?" - Steve Elias

7 14

[U-Boot] [v2][PATCH 2/2] Removed CONFIG_NUM_CPUS from 85xx/86xx
by Poonam Aggrwal 10 Aug '09

10 Aug '09

The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal(a)freescale.com> --- - based of 2009.08-rc1 - depends on the patch "[PATCH 1/2] Refactored common cpu specific code for 85xx and 86xx into one file." - Changes over v1: Incorporated Wolfgang's comments common/cmd_mp.c | 6 +- cpu/mpc85xx/cpu.c | 21 ++++----- cpu/mpc85xx/mp.c | 6 +- cpu/mpc85xx/release.S | 25 +++++++++++- cpu/mpc85xx/speed.c | 4 +- cpu/mpc86xx/cpu.c | 10 +++-- cpu/mpc86xx/cpu_init.c | 4 +- cpu/mpc8xxx/cpu.c | 93 ++++++++++++++++++++++++++--------------- include/asm-ppc/config.h | 7 +++ include/asm-ppc/global_data.h | 1 + include/asm-ppc/processor.h | 5 +- include/common.h | 2 + include/configs/MPC8572DS.h | 1 - include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/P2020DS.h | 1 - include/configs/XPEDITE5170.h | 1 - include/configs/XPEDITE5370.h | 1 - include/configs/sbc8641d.h | 1 - include/e500.h | 6 +-- lib_ppc/board.c | 3 + lib_ppc/bootm.c | 2 +- 22 files changed, 127 insertions(+), 75 deletions(-) diff --git a/common/cmd_mp.c b/common/cmd_mp.c index faa8700..71e4303 100644 --- a/common/cmd_mp.c +++ b/common/cmd_mp.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor, Inc. + * Copyright 2008-2009 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -34,9 +34,9 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } cpuid = simple_strtoul(argv[1], NULL, 10); - if (cpuid >= CONFIG_NUM_CPUS) { + if (cpuid >= cpu_numcores()) { printf ("Core num: %lu is out of range[0..%d]\n", - cpuid, CONFIG_NUM_CPUS - 1); + cpuid, cpu_numcores() - 1); return 1; } diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 4724f27..6be98dc 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -54,24 +54,23 @@ int checkcpu (void) int i; svr = get_svr(); - ver = SVR_SOC_VER(svr); major = SVR_MAJ(svr); #ifdef CONFIG_MPC8536 major &= 0x7; /* the msb of this nibble is a mfg code */ #endif minor = SVR_MIN(svr); -#if (CONFIG_NUM_CPUS > 1) - volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); - printf("CPU%d: ", pic->whoami); -#else - puts("CPU: "); -#endif + if (cpu_numcores() > 1) { + volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); + printf("CPU%d: ", pic->whoami); + } else { + puts("CPU: "); + } - cpu = identify_cpu(ver); - if (cpu) { - puts(cpu->name); + cpu = gd->cpu; + if (cpu->name) { + puts(cpu->name); if (IS_E_PROCESSOR(svr)) puts("E"); } else { @@ -104,7 +103,7 @@ int checkcpu (void) get_sys_info(&sysinfo); puts("Clock Configuration:"); - for (i = 0; i < CONFIG_NUM_CPUS; i++) { + for (i = 0; i < cpu_numcores(); i++) { if (!(i & 3)) printf ("\n "); printf("CPU%d:%-4s MHz, ", diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c index 76f02a4..2df55c7 100644 --- a/cpu/mpc85xx/mp.c +++ b/cpu/mpc85xx/mp.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor. + * Copyright 2008-2009 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -157,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg) out_be32(&gur->devdisr, devdisr); /* release the hounds */ - up = ((1 << CONFIG_NUM_CPUS) - 1); + up = ((1 << cpu_numcores()) - 1); bpcr = in_be32(&ecm->eebpcr); bpcr |= (up << 24); out_be32(&ecm->eebpcr, bpcr); @@ -167,7 +167,7 @@ static void pq3_mp_up(unsigned long bootpg) /* wait for everyone */ while (timeout) { int i; - for (i = 0; i < CONFIG_NUM_CPUS; i++) { + for (i = 0; i < cpu_numcores(); i++) { if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER]) cpu_up_mask |= (1 << i); }; diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index fbefc2c..2d4f219 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -1,3 +1,26 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * Kumar Gala <kumar.gala(a)freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + #include <config.h> #include <mpc85xx.h> #include <version.h> @@ -203,7 +226,7 @@ __secondary_start_page: .align L1_CACHE_SHIFT .globl __spin_table __spin_table: - .space CONFIG_NUM_CPUS*ENTRY_SIZE + .space CONFIG_MAX_CPUS*ENTRY_SIZE /* Fill in the empty space. The actual reset vector is * the last word of the page */ diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 286b6b2..3ef49b4 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007-2009 Freescale Semiconductor Inc. + * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc. * (C) Copyright 2003 Motorola Inc. * Xianghua Xiao, (X.Xiao(a)motorola.com) * @@ -51,7 +51,7 @@ void get_sys_info (sys_info_t * sysInfo) /* Divide before multiply to avoid integer * overflow for processor speeds above 2GHz */ half_freqSystemBus = sysInfo->freqSystemBus/2; - for (i = 0; i < CONFIG_NUM_CPUS; i++) { + for (i = 0; i < cpu_numcores(); i++) { e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f; sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus; } diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 32d06d2..04409ce 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -30,6 +30,8 @@ #include <mpc86xx.h> #include <asm/fsl_law.h> +DECLARE_GLOBAL_DATA_PTR; + /* * Default board reset function */ @@ -61,12 +63,12 @@ checkcpu(void) puts("CPU: "); - cpu = identify_cpu(ver); - if (cpu) { + cpu = gd->cpu; + + if (cpu->name) puts(cpu->name); - } else { + else puts("Unknown"); - } printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); puts("Core: "); diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index 341e815..5a78a9c 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004,2009 Freescale Semiconductor, Inc. * Jeff Brown * Srikanth Srinivasan (srikanth.srinivasan(a)freescale.com) * @@ -129,7 +129,7 @@ void cpu_init_f(void) */ int cpu_init_r(void) { -#if (CONFIG_NUM_CPUS > 1) +#if defined(CONFIG_MP) setup_mp(); #endif return 0; diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c index e34ef33..17aed62 100644 --- a/cpu/mpc8xxx/cpu.c +++ b/cpu/mpc8xxx/cpu.c @@ -35,41 +35,41 @@ DECLARE_GLOBAL_DATA_PTR; struct cpu_type cpu_type_list [] = { #if defined(CONFIG_MPC85xx) - CPU_TYPE_ENTRY(8533, 8533), - CPU_TYPE_ENTRY(8533, 8533_E), - CPU_TYPE_ENTRY(8535, 8535), - CPU_TYPE_ENTRY(8535, 8535_E), - CPU_TYPE_ENTRY(8536, 8536), - CPU_TYPE_ENTRY(8536, 8536_E), - CPU_TYPE_ENTRY(8540, 8540), - CPU_TYPE_ENTRY(8541, 8541), - CPU_TYPE_ENTRY(8541, 8541_E), - CPU_TYPE_ENTRY(8543, 8543), - CPU_TYPE_ENTRY(8543, 8543_E), - CPU_TYPE_ENTRY(8544, 8544), - CPU_TYPE_ENTRY(8544, 8544_E), - CPU_TYPE_ENTRY(8545, 8545), - CPU_TYPE_ENTRY(8545, 8545_E), - CPU_TYPE_ENTRY(8547, 8547_E), - CPU_TYPE_ENTRY(8548, 8548), - CPU_TYPE_ENTRY(8548, 8548_E), - CPU_TYPE_ENTRY(8555, 8555), - CPU_TYPE_ENTRY(8555, 8555_E), - CPU_TYPE_ENTRY(8560, 8560), - CPU_TYPE_ENTRY(8567, 8567), - CPU_TYPE_ENTRY(8567, 8567_E), - CPU_TYPE_ENTRY(8568, 8568), - CPU_TYPE_ENTRY(8568, 8568_E), - CPU_TYPE_ENTRY(8569, 8569), - CPU_TYPE_ENTRY(8569, 8569_E), - CPU_TYPE_ENTRY(8572, 8572), - CPU_TYPE_ENTRY(8572, 8572_E), - CPU_TYPE_ENTRY(P2020, P2020), - CPU_TYPE_ENTRY(P2020, P2020_E), + CPU_TYPE_ENTRY(8533, 8533, 1), + CPU_TYPE_ENTRY(8533, 8533_E, 1), + CPU_TYPE_ENTRY(8535, 8535, 1), + CPU_TYPE_ENTRY(8535, 8535_E, 1), + CPU_TYPE_ENTRY(8536, 8536, 1), + CPU_TYPE_ENTRY(8536, 8536_E, 1), + CPU_TYPE_ENTRY(8540, 8540, 1), + CPU_TYPE_ENTRY(8541, 8541, 1), + CPU_TYPE_ENTRY(8541, 8541_E, 1), + CPU_TYPE_ENTRY(8543, 8543, 1), + CPU_TYPE_ENTRY(8543, 8543_E, 1), + CPU_TYPE_ENTRY(8544, 8544, 1), + CPU_TYPE_ENTRY(8544, 8544_E, 1), + CPU_TYPE_ENTRY(8545, 8545, 1), + CPU_TYPE_ENTRY(8545, 8545_E, 1), + CPU_TYPE_ENTRY(8547, 8547_E, 1), + CPU_TYPE_ENTRY(8548, 8548, 1), + CPU_TYPE_ENTRY(8548, 8548_E, 1), + CPU_TYPE_ENTRY(8555, 8555, 1), + CPU_TYPE_ENTRY(8555, 8555_E, 1), + CPU_TYPE_ENTRY(8560, 8560, 1), + CPU_TYPE_ENTRY(8567, 8567, 1), + CPU_TYPE_ENTRY(8567, 8567_E, 1), + CPU_TYPE_ENTRY(8568, 8568, 1), + CPU_TYPE_ENTRY(8568, 8568_E, 1), + CPU_TYPE_ENTRY(8569, 8569, 1), + CPU_TYPE_ENTRY(8569, 8569_E, 1), + CPU_TYPE_ENTRY(8572, 8572, 2), + CPU_TYPE_ENTRY(8572, 8572_E, 2), + CPU_TYPE_ENTRY(P2020, P2020, 2), + CPU_TYPE_ENTRY(P2020, P2020_E, 2), #elif defined(CONFIG_MPC86xx) - CPU_TYPE_ENTRY(8610, 8610), - CPU_TYPE_ENTRY(8641, 8641), - CPU_TYPE_ENTRY(8641D, 8641D), + CPU_TYPE_ENTRY(8610, 8610, 1), + CPU_TYPE_ENTRY(8641, 8641, 2), + CPU_TYPE_ENTRY(8641D, 8641D, 2), #endif }; @@ -84,6 +84,31 @@ struct cpu_type *identify_cpu(u32 ver) return NULL; } +int cpu_numcores() { + struct cpu_type *cpu; + cpu = gd->cpu; + return cpu->num_cores; +} + +int probecpu (void) +{ + uint svr; + uint ver; + + svr = get_svr(); + ver = SVR_SOC_VER(svr); + + gd->cpu = identify_cpu(ver); + +#ifndef CONFIG_MP + if (cpu_numcores() > 1) { + puts("Unicore software on multiprocessor system!!\n" + "To enable mutlticore build define CONFIG_MP\n"); + } +#endif + return 0; +} + /* * Initializes on-chip ethernet controllers. * to override, implement board_eth_init() diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h index c9ba805..fd7961c 100644 --- a/include/asm-ppc/config.h +++ b/include/asm-ppc/config.h @@ -38,4 +38,11 @@ #endif #endif +#if defined(CONFIG_MPC8572) || defined(CONFIG_P2020) \ + || defined(CONFIG_MPC8641) +#define CONFIG_MAX_CPUS 2 +#else +#define CONFIG_MAX_CPUS 1 +#endif + #endif /* _ASM_CONFIG_H_ */ diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index 244c161..a5747e1 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -91,6 +91,7 @@ typedef struct global_data { #endif #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 lbc_clk; + void *cpu; #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 i2c1_clk; diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 2c0c0ce..f9e17cd 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -1063,13 +1063,14 @@ n: struct cpu_type { char name[15]; u32 soc_ver; + u32 num_cores; }; struct cpu_type *identify_cpu(u32 ver); #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) -#define CPU_TYPE_ENTRY(n, v) \ - { .name = #n, .soc_ver = SVR_##v, } +#define CPU_TYPE_ENTRY(n, v, nc) \ + { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), } #else #if defined(CONFIG_MPC83xx) #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} diff --git a/include/common.h b/include/common.h index a6922fd..35f12c0 100644 --- a/include/common.h +++ b/include/common.h @@ -441,6 +441,8 @@ void ppcDWstore(unsigned int *addr, unsigned int *value); #endif /* $(CPU)/cpu.c */ +int cpu_numcores (void); +int probecpu (void); int checkcpu (void); int checkicache (void); int checkdcache (void); diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 64f5c4b..6d309c5 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -34,7 +34,6 @@ #define CONFIG_MPC8572 1 #define CONFIG_MPC8572DS 1 #define CONFIG_MP 1 /* support multiple processors */ -#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index a3b5c7c..37796bc 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -17,7 +17,6 @@ #define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8610 1 /* MPC8610 specific */ #define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */ -#define CONFIG_NUM_CPUS 1 /* Number of CPUs in the system */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index bf2e359..b0ae25c 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -37,7 +37,6 @@ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */ #define CONFIG_MP 1 /* support multiple processors */ -#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ /*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */ #define CONFIG_ADDR_MAP 1 /* Use addr map */ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 5c2c5cb..7a6d599 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -34,7 +34,6 @@ #define CONFIG_P2020 1 #define CONFIG_P2020DS 1 #define CONFIG_MP 1 /* support multiple processors */ -#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ diff --git a/include/configs/XPEDITE5170.h b/include/configs/XPEDITE5170.h index 8be9fa0..242466a 100644 --- a/include/configs/XPEDITE5170.h +++ b/include/configs/XPEDITE5170.h @@ -34,7 +34,6 @@ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */ #define CONFIG_SYS_BOARD_NAME "XPedite5170" -#define CONFIG_NUM_CPUS 1 /* Number of CPUs in the system */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ #define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h index acb62ad..3c58ebe 100644 --- a/include/configs/XPEDITE5370.h +++ b/include/configs/XPEDITE5370.h @@ -36,7 +36,6 @@ #define CONFIG_MPC8572 1 #define CONFIG_XPEDITE5370 1 #define CONFIG_SYS_BOARD_NAME "XPedite5370" -#define CONFIG_NUM_CPUS 2 /* 2 Cores */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ #define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index ef0f627..5376e4a 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -41,7 +41,6 @@ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_SBC8641D 1 /* SBC8641D board specific */ #define CONFIG_MP 1 /* support multiple processors */ -#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #ifdef RUN_DIAG diff --git a/include/e500.h b/include/e500.h index 84b580d..f8c8266 100644 --- a/include/e500.h +++ b/include/e500.h @@ -8,13 +8,9 @@ #ifndef __ASSEMBLY__ -#ifndef CONFIG_NUM_CPUS -#define CONFIG_NUM_CPUS 1 -#endif - typedef struct { - unsigned long freqProcessor[CONFIG_NUM_CPUS]; + unsigned long freqProcessor[CONFIG_MAX_CPUS]; unsigned long freqSystemBus; unsigned long freqDDRBus; unsigned long freqLocalBus; diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 6dd4d56..9faf7f2 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -291,6 +291,9 @@ init_fnc_t *init_sequence[] = { board_early_init_f, #endif +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + probecpu, +#endif #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) get_clocks, /* get CPU and bus clocks (etc.) */ #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 0d702bf..dd1fcf1 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -170,7 +170,7 @@ void arch_lmb_reserve(struct lmb *lmb) static void boot_prep_linux(void) { -#if (CONFIG_NUM_CPUS > 1) +#ifdef CONFIG_MP /* if we are MP make sure to flush the dcache() to any changes are made * visibile to all other cores */ flush_dcache(); -- 1.5.6.5

3 3

[U-Boot] [PATCH 2/2] MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
by s-paulraj＠dal.design.ti.com 10 Aug '09

10 Aug '09

From: Sandeep Paulraj <s-paulraj(a)ti.com> This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND chips. This ECC mode is similar to NAND_ECC_HW, with the exception of read_page API that first reads the OOB area, reads the data in chunks, feeds the ECC from OOB area to the ECC hw engine and perform any correction on the data as per the ECC status reported by the engine. This patch has been accepted by Andrew Morton and can be found at http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-… Signed-off-by: Sandeep Paulraj <s-paulraj(a)ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha(a)ti.com> --- drivers/mtd/nand/nand_base.c | 59 ++++++++++++++++++++++++++++++++++++++++++ include/linux/mtd/nand.h | 1 + 2 files changed, 60 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ca02628..426bb95 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1068,6 +1068,54 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, } /** + * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: buffer to store read data + * + * Hardware ECC for large page chips, require OOB to be read first. + * For this ECC mode, the write_page method is re-used from ECC_HW. + * These methods read/write ECC from the OOB area, unlike the + * ECC_HW_SYNDROME support with multiple ECC steps, follows the + * "infix ECC" scheme and reads/writes ECC from the data area, by + * overwriting the NAND manufacturer bad block markings. + */ +static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, + struct nand_chip *chip, uint8_t *buf, int page) +{ + int i, eccsize = chip->ecc.size; + int eccbytes = chip->ecc.bytes; + int eccsteps = chip->ecc.steps; + uint8_t *p = buf; + uint8_t *ecc_code = chip->buffers->ecccode; + uint32_t *eccpos = chip->ecc.layout->eccpos; + uint8_t *ecc_calc = chip->buffers->ecccalc; + + /* Read the OOB area first */ + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); + + for (i = 0; i < chip->ecc.total; i++) + ecc_code[i] = chip->oob_poi[eccpos[i]]; + + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + int stat; + + chip->ecc.hwctl(mtd, NAND_ECC_READ); + chip->read_buf(mtd, p, eccsize); + chip->ecc.calculate(mtd, p, &ecc_calc[i]); + + stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); + if (stat < 0) + mtd->ecc_stats.failed++; + else + mtd->ecc_stats.corrected += stat; + } + return 0; +} + +/** * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read * @mtd: mtd info structure * @chip: nand chip info structure @@ -2730,6 +2778,17 @@ int nand_scan_tail(struct mtd_info *mtd) chip->ecc.write_page_raw = nand_write_page_raw; switch (chip->ecc.mode) { + case NAND_ECC_HW_OOB_FIRST: + /* Similar to NAND_ECC_HW, but a separate read_page handle */ + if (!chip->ecc.calculate || !chip->ecc.correct || + !chip->ecc.hwctl) { + printk(KERN_WARNING "No ECC functions supplied, " + "Hardware ECC not possible\n"); + BUG(); + } + if (!chip->ecc.read_page) + chip->ecc.read_page = nand_read_page_hwecc_oob_first; + case NAND_ECC_HW: /* Use standard hwecc read page function ? */ if (!chip->ecc.read_page) diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index d6aa392..cb7c19a 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -128,6 +128,7 @@ typedef enum { NAND_ECC_SOFT, NAND_ECC_HW, NAND_ECC_HW_SYNDROME, + NAND_ECC_HW_OOB_FIRST, } nand_ecc_modes_t; /* -- 1.6.0.4

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