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May 2009

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[U-Boot] [PATCH 1/1] at91: Add command to control up to 3 GPIO LEDs from the console
by Daniel Gorsulowski 14 May '09

14 May '09

This patch allows any at91 board, implementing the GPIO LED API, to control the LEDs from the console. led [ 1 | 2 | 3 | all ] [ on | off ] Adding configuration items CONFIG_AT91_LED and CONFIG_CMD_LED enables the command. Moreover the GPIO Pins have to be defined by CONFIG_USER1_LED ... CONFIG_USER3_LED. --- common/Makefile | 1 + common/cmd_led.c | 86 +++++++++++++++++++++++++++++++++++++++ cpu/arm926ejs/at91/led.c | 79 +++++++++++++++++++++++++++++++++++ include/asm-arm/arch-at91/led.h | 52 +++++++++++++++++++++++ 4 files changed, 218 insertions(+), 0 deletions(-) create mode 100644 common/cmd_led.c create mode 100644 include/asm-arm/arch-at91/led.h diff --git a/common/Makefile b/common/Makefile index b9f4ca7..e0f571c 100644 --- a/common/Makefile +++ b/common/Makefile @@ -103,6 +103,7 @@ COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o +COBJS-$(CONFIG_CMD_LED) += cmd_led.o COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o COBJS-y += cmd_load.o COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o diff --git a/common/cmd_led.c b/common/cmd_led.c new file mode 100644 index 0000000..f914d2d --- /dev/null +++ b/common/cmd_led.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf.samuelsson at atmel.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> + * esd electronic system design gmbh <www.esd.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/arch/led.h> + +int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int led; + + /* Validate arguments */ + if ((argc != 3)) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + if (strcmp(argv[1], "1") == 0) { + led = (1 << 0); + } else if (strcmp(argv[1], "2") == 0) { + led = (1 << 1); + } else if (strcmp(argv[1], "3") == 0) { + led = (1 << 2); + } else if (strcmp(argv[1], "all") == 0) { + led = 31; + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + if (strcmp(argv[2], "off") == 0) { +#ifdef CONFIG_USER1_LED + if(led & 1) user1_led_off(); +#endif +#ifdef CONFIG_USER2_LED + if(led & 2) user2_led_off(); +#endif +#ifdef CONFIG_USER3_LED + if(led & 4) user3_led_off(); +#endif + } else if (strcmp(argv[2], "on") == 0) { +#ifdef CONFIG_USER1_LED + if(led & 1) user1_led_on(); +#endif +#ifdef CONFIG_USER2_LED + if(led & 2) user2_led_on(); +#endif +#ifdef CONFIG_USER3_LED + if(led & 4) user3_led_on(); +#endif + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + return 0; +} + +U_BOOT_CMD( + led, 3, 1, do_led, + "[1|2|3|all] [on|off]", + "[1|2|3|all] [on|off] sets/clears led 1,2,3" +); diff --git a/cpu/arm926ejs/at91/led.c b/cpu/arm926ejs/at91/led.c index be68f59..46a74fe 100644 --- a/cpu/arm926ejs/at91/led.c +++ b/cpu/arm926ejs/at91/led.c @@ -3,6 +3,10 @@ * Stelian Pop <stelian.pop(a)leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * + * (C) Copyright 2009 + * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> + * esd electronic system design gmbh <www.esd.eu> + * * See file CREDITS for list of people who contributed to this * project. * @@ -27,6 +31,81 @@ #include <asm/arch/gpio.h> #include <asm/arch/io.h> +#ifdef CONFIG_AT91_LED + +#if defined(CONFIG_AT91RM9200) +#include <asm/arch/at91rm9200.h> +#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) +#include <asm/arch/at91sam9260.h> +#elif defined(CONFIG_AT91SAM9261) +#include <asm/arch/at91sam9261.h> +#elif defined(CONFIG_AT91SAM9263) +#include <asm/arch/at91sam9263.h> +#elif defined(CONFIG_AT91SAM9RL) +#include <asm/arch/at91sam9rl.h> +#elif defined(CONFIG_AT91CAP9) +#include <asm/arch/at91cap9.h> +#endif + +#include <asm/arch/led.h> + +void at91_led_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE); + +#ifdef CONFIG_USER1_LED + at91_set_gpio_output(CONFIG_USER1_LED, 1); + at91_set_gpio_value(CONFIG_USER1_LED, 1); +#endif +#ifdef CONFIG_USER2_LED + at91_set_gpio_output(CONFIG_USER2_LED, 1); + at91_set_gpio_value(CONFIG_USER2_LED, 1); +#endif +#ifdef CONFIG_USER3_LED + at91_set_gpio_output(CONFIG_USER3_LED, 1); + at91_set_gpio_value(CONFIG_USER3_LED, 1); +#endif +} +#ifdef CONFIG_USER1_LED +void user1_led_on(void) +{ + at91_set_gpio_value(CONFIG_USER1_LED, 0); +} + +void user1_led_off(void) +{ + at91_set_gpio_value(CONFIG_USER1_LED, 1); +} +#endif + +#ifdef CONFIG_USER2_LED +void user2_led_on(void) +{ + at91_set_gpio_value(CONFIG_USER2_LED, 0); +} + +void user2_led_off(void) +{ + at91_set_gpio_value(CONFIG_USER2_LED, 1); +} +#endif + +#ifdef CONFIG_USER3_LED +void user3_led_on(void) +{ + at91_set_gpio_value(CONFIG_USER3_LED, 0); +} + +void user3_led_off(void) +{ + at91_set_gpio_value(CONFIG_USER3_LED, 1); +} +#endif + +#endif /* CONFIG_AT91_LED */ + #ifdef CONFIG_RED_LED void red_LED_on(void) { diff --git a/include/asm-arm/arch-at91/led.h b/include/asm-arm/arch-at91/led.h new file mode 100644 index 0000000..878b2cf --- /dev/null +++ b/include/asm-arm/arch-at91/led.h @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2009 + * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> + * esd electronic system design gmbh <www.esd.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_LED_H +#define __ASM_ARCH_LED_H + +/* + * User LEDs API + */ +#ifndef __ASSEMBLY__ +extern void at91_led_init(void); +extern void user1_led_on(void); +extern void user1_led_off(void); +extern void user2_led_on(void); +extern void user2_led_off(void); +extern void user3_led_on(void); +extern void user3_led_off(void); +#else + .extern at91_led_init + .extern user1_led_on + .extern user1_led_off + .extern user2_led_on + .extern user2_led_off + .extern user3_led_on + .extern user3_led_off +#endif + +#endif /* __ASM_ARCH_LED_H */ -- 1.6.1

4 9

[U-Boot] [PATCH] at91: regroup IP hw init in one cpu file per soc
by Jean-Christophe PLAGNIOL-VILLARD 13 May '09

13 May '09

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- cpu/arm926ejs/at91/Makefile | 35 +--- cpu/arm926ejs/at91/at91cap9_devices.c | 176 +++++++++++++++++++ cpu/arm926ejs/at91/at91cap9_macb.c | 54 ------ cpu/arm926ejs/at91/at91cap9_serial.c | 76 -------- cpu/arm926ejs/at91/at91cap9_spi.c | 100 ----------- cpu/arm926ejs/at91/at91sam9260_devices.c | 184 ++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_macb.c | 63 ------- cpu/arm926ejs/at91/at91sam9260_serial.c | 76 -------- cpu/arm926ejs/at91/at91sam9260_spi.c | 99 ----------- .../{at91sam9261_spi.c => at91sam9261_devices.c} | 49 +++++ cpu/arm926ejs/at91/at91sam9261_serial.c | 76 -------- cpu/arm926ejs/at91/at91sam9263_devices.c | 184 ++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_macb.c | 54 ------ cpu/arm926ejs/at91/at91sam9263_serial.c | 76 -------- cpu/arm926ejs/at91/at91sam9263_spi.c | 99 ----------- cpu/arm926ejs/at91/at91sam9263_usb.c | 35 ---- .../{at91sam9rl_serial.c => at91sam9rl_devices.c} | 37 ++++ cpu/arm926ejs/at91/at91sam9rl_spi.c | 64 ------- 18 files changed, 636 insertions(+), 901 deletions(-) create mode 100644 cpu/arm926ejs/at91/at91cap9_devices.c delete mode 100644 cpu/arm926ejs/at91/at91cap9_macb.c delete mode 100644 cpu/arm926ejs/at91/at91cap9_serial.c delete mode 100644 cpu/arm926ejs/at91/at91cap9_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_devices.c delete mode 100644 cpu/arm926ejs/at91/at91sam9260_macb.c delete mode 100644 cpu/arm926ejs/at91/at91sam9260_serial.c delete mode 100644 cpu/arm926ejs/at91/at91sam9260_spi.c rename cpu/arm926ejs/at91/{at91sam9261_spi.c => at91sam9261_devices.c} (72%) delete mode 100644 cpu/arm926ejs/at91/at91sam9261_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_devices.c delete mode 100644 cpu/arm926ejs/at91/at91sam9263_macb.c delete mode 100644 cpu/arm926ejs/at91/at91sam9263_serial.c delete mode 100644 cpu/arm926ejs/at91/at91sam9263_spi.c delete mode 100644 cpu/arm926ejs/at91/at91sam9263_usb.c rename cpu/arm926ejs/at91/{at91sam9rl_serial.c => at91sam9rl_devices.c} (70%) delete mode 100644 cpu/arm926ejs/at91/at91sam9rl_spi.c diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile index e300d97..71acb0b 100644 --- a/cpu/arm926ejs/at91/Makefile +++ b/cpu/arm926ejs/at91/Makefile @@ -25,35 +25,12 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -ifdef CONFIG_AT91CAP9 -COBJS-$(CONFIG_MACB) += at91cap9_macb.o -COBJS-y += at91cap9_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91cap9_spi.o -endif -ifdef CONFIG_AT91SAM9260 -COBJS-$(CONFIG_MACB) += at91sam9260_macb.o -COBJS-y += at91sam9260_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o -endif -ifdef CONFIG_AT91SAM9G20 -COBJS-$(CONFIG_MACB) += at91sam9260_macb.o -COBJS-y += at91sam9260_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o -endif -ifdef CONFIG_AT91SAM9261 -COBJS-y += at91sam9261_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9261_spi.o -endif -ifdef CONFIG_AT91SAM9263 -COBJS-$(CONFIG_MACB) += at91sam9263_macb.o -COBJS-y += at91sam9263_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9263_spi.o -COBJS-$(CONFIG_USB_OHCI_NEW) += at91sam9263_usb.o -endif -ifdef CONFIG_AT91SAM9RL -COBJS-y += at91sam9rl_serial.o -COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o -endif +COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o +COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o +COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o +COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o +COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o +COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o COBJS-$(CONFIG_AT91_LED) += led.o COBJS-y += clock.o COBJS-y += cpu.o diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c new file mode 100644 index 0000000..c0024ac --- /dev/null +++ b/cpu/arm926ejs/at91/at91cap9_devices.c @@ -0,0 +1,176 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_serial0_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); +} + +void at91_serial1_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); +} + +void at91_serial2_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); +} + +void at91_serial3_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +} + +void at91_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_serial0_hw_init(); +#endif + +#ifdef CONFIG_USART1 + at91_serial1_hw_init(); +#endif + +#ifdef CONFIG_USART2 + at91_serial2_hw_init(); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_serial3_hw_init(); +#endif +} + +#ifdef CONFIG_HAS_DATAFLASH +void at91_spi0_hw_init(unsigned long cs_mask) +{ + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); + + if (cs_mask & (1 << 0)) { + at91_set_B_periph(AT91_PIN_PA5, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PD0, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PD1, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PA5, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PD0, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PD1, 1); + } +} + +void at91_spi1_hw_init(unsigned long cs_mask) +{ + at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ + at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1); + + if (cs_mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PB15, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PB16, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PB17, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PB18, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PB15, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PB16, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PB17, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PB18, 1); + } + +} +#endif + +#ifdef CONFIG_MACB +void at91_macb_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ + +#ifndef CONFIG_RMII + at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ + at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ +#endif +} +#endif diff --git a/cpu/arm926ejs/at91/at91cap9_macb.c b/cpu/arm926ejs/at91/at91cap9_macb.c deleted file mode 100644 index 5095d8d..0000000 --- a/cpu/arm926ejs/at91/at91cap9_macb.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_macb_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ - -#ifndef CONFIG_RMII - at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ - at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ - at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ -#endif -} diff --git a/cpu/arm926ejs/at91/at91cap9_serial.c b/cpu/arm926ejs/at91/at91cap9_serial.c deleted file mode 100644 index 5f41f7e..0000000 --- a/cpu/arm926ejs/at91/at91cap9_serial.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_serial0_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); -} - -void at91_serial1_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); -} - -void at91_serial2_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); -} - -void at91_serial3_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -} - -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} diff --git a/cpu/arm926ejs/at91/at91cap9_spi.c b/cpu/arm926ejs/at91/at91cap9_spi.c deleted file mode 100644 index cd8143b..0000000 --- a/cpu/arm926ejs/at91/at91cap9_spi.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_spi0_hw_init(unsigned long cs_mask) -{ - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); - - if (cs_mask & (1 << 0)) { - at91_set_B_periph(AT91_PIN_PA5, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_B_periph(AT91_PIN_PD0, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PD1, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA5, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PD0, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PD1, 1); - } -} - -void at91_spi1_hw_init(unsigned long cs_mask) -{ - at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1); - - if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PB15, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_A_periph(AT91_PIN_PB16, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_A_periph(AT91_PIN_PB17, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_A_periph(AT91_PIN_PB18, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PB15, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PB16, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PB17, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PB18, 1); - } - -} diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c new file mode 100644 index 0000000..6dc0acc --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -0,0 +1,184 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_serial0_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); +} + +void at91_serial1_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); +} + +void at91_serial2_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); +} + +void at91_serial3_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +} + +void at91_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_serial0_hw_init(); +#endif + +#ifdef CONFIG_USART1 + at91_serial1_hw_init(); +#endif + +#ifdef CONFIG_USART2 + at91_serial2_hw_init(); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_serial3_hw_init(); +#endif +} + +#ifdef CONFIG_HAS_DATAFLASH +void at91_spi0_hw_init(unsigned long cs_mask) +{ + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); + + if (cs_mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PC11, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PC16, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PC17, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PC11, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PC16, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PC17, 1); + } +} + +void at91_spi1_hw_init(unsigned long cs_mask) +{ + at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ + at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1); + + if (cs_mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PB3, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PC5, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PC4, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_gpio_output(AT91_PIN_PC3, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PB3, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PC5, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PC4, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PC3, 1); + } +} +#endif + +#ifdef CONFIG_MACB +void at91_macb_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ + +#ifndef CONFIG_RMII + at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ +#if defined(CONFIG_AT91SAM9260EK) + /* + * use PA10, PA11 for ETX2, ETX3. + * PA23 and PA24 are for TWI EEPROM + */ + at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ +#else + at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ +#endif + at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ +#endif +} +#endif diff --git a/cpu/arm926ejs/at91/at91sam9260_macb.c b/cpu/arm926ejs/at91/at91sam9260_macb.c deleted file mode 100644 index ab60fb7..0000000 --- a/cpu/arm926ejs/at91/at91sam9260_macb.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_macb_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ - -#ifndef CONFIG_RMII - at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ -#if defined(CONFIG_AT91SAM9260EK) - /* - * use PA10, PA11 for ETX2, ETX3. - * PA23 and PA24 are for TWI EEPROM - */ - at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ -#else - at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ -#endif - at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ -#endif -} diff --git a/cpu/arm926ejs/at91/at91sam9260_serial.c b/cpu/arm926ejs/at91/at91sam9260_serial.c deleted file mode 100644 index 43f1971..0000000 --- a/cpu/arm926ejs/at91/at91sam9260_serial.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_serial0_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); -} - -void at91_serial1_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); -} - -void at91_serial2_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); -} - -void at91_serial3_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -} - -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} diff --git a/cpu/arm926ejs/at91/at91sam9260_spi.c b/cpu/arm926ejs/at91/at91sam9260_spi.c deleted file mode 100644 index d6fd80e..0000000 --- a/cpu/arm926ejs/at91/at91sam9260_spi.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_spi0_hw_init(unsigned long cs_mask) -{ - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); - - if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PC11, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_B_periph(AT91_PIN_PC16, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PC17, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PC11, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PC16, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PC17, 1); - } -} - -void at91_spi1_hw_init(unsigned long cs_mask) -{ - at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1); - - if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PB3, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PC5, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_B_periph(AT91_PIN_PC4, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_gpio_output(AT91_PIN_PC3, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PB3, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PC5, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PC4, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PC3, 1); - } -} diff --git a/cpu/arm926ejs/at91/at91sam9261_spi.c b/cpu/arm926ejs/at91/at91sam9261_devices.c similarity index 72% rename from cpu/arm926ejs/at91/at91sam9261_spi.c rename to cpu/arm926ejs/at91/at91sam9261_devices.c index 9383dc6..16d411f 100644 --- a/cpu/arm926ejs/at91/at91sam9261_spi.c +++ b/cpu/arm926ejs/at91/at91sam9261_devices.c @@ -28,6 +28,54 @@ #include <asm/arch/gpio.h> #include <asm/arch/io.h> +void at91_serial0_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); +} + +void at91_serial1_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); +} + +void at91_serial2_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); +} + +void at91_serial3_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +} + +void at91_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_serial0_hw_init(); +#endif + +#ifdef CONFIG_USART1 + at91_serial1_hw_init(); +#endif + +#ifdef CONFIG_USART2 + at91_serial2_hw_init(); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_serial3_hw_init(); +#endif +} + +#ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ @@ -97,3 +145,4 @@ void at91_spi1_hw_init(unsigned long cs_mask) at91_set_gpio_output(AT91_PIN_PA26, 1); } } +#endif diff --git a/cpu/arm926ejs/at91/at91sam9261_serial.c b/cpu/arm926ejs/at91/at91sam9261_serial.c deleted file mode 100644 index c262a92..0000000 --- a/cpu/arm926ejs/at91/at91sam9261_serial.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_serial0_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); -} - -void at91_serial1_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); -} - -void at91_serial2_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); -} - -void at91_serial3_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -} - -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/cpu/arm926ejs/at91/at91sam9263_devices.c new file mode 100644 index 0000000..0f2613e --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -0,0 +1,184 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_serial0_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); +} + +void at91_serial1_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); +} + +void at91_serial2_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); +} + +void at91_serial3_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +} + +void at91_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_serial0_hw_init(); +#endif + +#ifdef CONFIG_USART1 + at91_serial1_hw_init(); +#endif + +#ifdef CONFIG_USART2 + at91_serial2_hw_init(); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_serial3_hw_init(); +#endif +} + +#ifdef CONFIG_HAS_DATAFLASH +void at91_spi0_hw_init(unsigned long cs_mask) +{ + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); + + if (cs_mask & (1 << 0)) { + at91_set_B_periph(AT91_PIN_PA5, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA4, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PB11, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PA5, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PA3, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PA4, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PB11, 1); + } +} + +void at91_spi1_hw_init(unsigned long cs_mask) +{ + at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ + at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1); + + if (cs_mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PB15, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PB16, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PB17, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PB18, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PB15, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PB16, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PB17, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PB18, 1); + } +} +#endif + +#ifdef CONFIG_MACB +void at91_macb_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ + at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ + +#ifndef CONFIG_RMII + at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ + at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ +#endif +} +#endif + +#ifdef CONFIG_USB_OHCI_NEW +void at91_uhp_hw_init(void) +{ + /* Enable VBus on UHP ports */ + at91_set_gpio_output(AT91_PIN_PA21, 0); + at91_set_gpio_output(AT91_PIN_PA24, 0); +} +#endif diff --git a/cpu/arm926ejs/at91/at91sam9263_macb.c b/cpu/arm926ejs/at91/at91sam9263_macb.c deleted file mode 100644 index 4223d37..0000000 --- a/cpu/arm926ejs/at91/at91sam9263_macb.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_macb_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ - at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ - -#ifndef CONFIG_RMII - at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ - at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ - at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ -#endif -} diff --git a/cpu/arm926ejs/at91/at91sam9263_serial.c b/cpu/arm926ejs/at91/at91sam9263_serial.c deleted file mode 100644 index 1076195..0000000 --- a/cpu/arm926ejs/at91/at91sam9263_serial.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_serial0_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); -} - -void at91_serial1_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); -} - -void at91_serial2_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); -} - -void at91_serial3_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -} - -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif -} diff --git a/cpu/arm926ejs/at91/at91sam9263_spi.c b/cpu/arm926ejs/at91/at91sam9263_spi.c deleted file mode 100644 index e52dd61..0000000 --- a/cpu/arm926ejs/at91/at91sam9263_spi.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_spi0_hw_init(unsigned long cs_mask) -{ - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); - - if (cs_mask & (1 << 0)) { - at91_set_B_periph(AT91_PIN_PA5, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_B_periph(AT91_PIN_PA4, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PB11, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA5, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PA3, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PA4, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PB11, 1); - } -} - -void at91_spi1_hw_init(unsigned long cs_mask) -{ - at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1); - - if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PB15, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_A_periph(AT91_PIN_PB16, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_A_periph(AT91_PIN_PB17, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_A_periph(AT91_PIN_PB18, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PB15, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PB16, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PB17, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PB18, 1); - } -} diff --git a/cpu/arm926ejs/at91/at91sam9263_usb.c b/cpu/arm926ejs/at91/at91sam9263_usb.c deleted file mode 100644 index ff5593b..0000000 --- a/cpu/arm926ejs/at91/at91sam9263_usb.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_uhp_hw_init(void) -{ - /* Enable VBus on UHP ports */ - at91_set_gpio_output(AT91_PIN_PA21, 0); - at91_set_gpio_output(AT91_PIN_PA24, 0); -} diff --git a/cpu/arm926ejs/at91/at91sam9rl_serial.c b/cpu/arm926ejs/at91/at91sam9rl_devices.c similarity index 70% rename from cpu/arm926ejs/at91/at91sam9rl_serial.c rename to cpu/arm926ejs/at91/at91sam9rl_devices.c index 99ce418..ebed193 100644 --- a/cpu/arm926ejs/at91/at91sam9rl_serial.c +++ b/cpu/arm926ejs/at91/at91sam9rl_devices.c @@ -74,3 +74,40 @@ void at91_serial_hw_init(void) at91_serial3_hw_init(); #endif } + +#ifdef CONFIG_HAS_DATAFLASH +void at91_spi0_hw_init(unsigned long cs_mask) +{ + at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); + + if (cs_mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA28, 1); + } + if (cs_mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PB7, 1); + } + if (cs_mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PD8, 1); + } + if (cs_mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PD9, 1); + } + if (cs_mask & (1 << 4)) { + at91_set_gpio_output(AT91_PIN_PA28, 1); + } + if (cs_mask & (1 << 5)) { + at91_set_gpio_output(AT91_PIN_PB7, 1); + } + if (cs_mask & (1 << 6)) { + at91_set_gpio_output(AT91_PIN_PD8, 1); + } + if (cs_mask & (1 << 7)) { + at91_set_gpio_output(AT91_PIN_PD9, 1); + } +} +#endif diff --git a/cpu/arm926ejs/at91/at91sam9rl_spi.c b/cpu/arm926ejs/at91/at91sam9rl_spi.c deleted file mode 100644 index 389d6d8..0000000 --- a/cpu/arm926ejs/at91/at91sam9rl_spi.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop(a)leadtechdesign.com> - * Lead Tech Design <www.leadtechdesign.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> - -void at91_spi0_hw_init(unsigned long cs_mask) -{ - at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); - - if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PA28, 1); - } - if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PB7, 1); - } - if (cs_mask & (1 << 2)) { - at91_set_A_periph(AT91_PIN_PD8, 1); - } - if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PD9, 1); - } - if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA28, 1); - } - if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PB7, 1); - } - if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PD8, 1); - } - if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PD9, 1); - } -} -- 1.6.1.3

1 0

[U-Boot] [PATCH] common/cmd_ide.c: Coding style cleanup (Lindent)
by Stefan Roese 13 May '09

13 May '09

While trying to fix a problem in the IDE detection of the CPCI750 I noticed the extreme bad coding style in the cmd_ide.c file. Before fixing the real problem I ran Lindent on this file. I also removed some "#if 0" parts. Not sure if this patch will be accepted. It's probably not so easy to understand the history of changes in this file with this coding style cleanup. But the current condition is so bad that I think it's worth the change. Signed-off-by: Stefan Roese <sr(a)denx.de> --- common/cmd_ide.c | 1754 ++++++++++++++++++++++++++---------------------------- 1 files changed, 837 insertions(+), 917 deletions(-) diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 782ad1c..12d81a1 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -64,8 +64,8 @@ DECLARE_GLOBAL_DATA_PTR; # define EIEIO __asm__ volatile ("eieio") # define SYNC __asm__ volatile ("sync") #else -# define EIEIO /* nothing */ -# define SYNC /* nothing */ +# define EIEIO /* nothing */ +# define SYNC /* nothing */ #endif #ifdef CONFIG_IDE_8xx_DIRECT @@ -84,20 +84,19 @@ DECLARE_GLOBAL_DATA_PTR; * 2 4 1 [Cycles] */ -const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] = -{ - /* Setup Length Hold */ - { 70, 165, 30 }, /* PIO-Mode 0, [ns] */ - { 50, 125, 20 }, /* PIO-Mode 1, [ns] */ - { 30, 101, 15 }, /* PIO-Mode 2, [ns] */ - { 30, 80, 10 }, /* PIO-Mode 3, [ns] */ - { 25, 70, 10 }, /* PIO-Mode 4, [ns] */ +const static pio_config_t pio_config_ns[IDE_MAX_PIO_MODE + 1] = { + /* Setup Length Hold */ + {70, 165, 30}, /* PIO-Mode 0, [ns] */ + {50, 125, 20}, /* PIO-Mode 1, [ns] */ + {30, 101, 15}, /* PIO-Mode 2, [ns] */ + {30, 80, 10}, /* PIO-Mode 3, [ns] */ + {25, 70, 10}, /* PIO-Mode 4, [ns] */ }; -static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1]; +static pio_config_t pio_config_clk[IDE_MAX_PIO_MODE + 1]; #ifndef CONFIG_SYS_PIO_MODE -#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */ +#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */ #endif static int pio_mode = CONFIG_SYS_PIO_MODE; @@ -122,11 +121,10 @@ ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = { #endif }; - #ifndef CONFIG_AMIGAONEG3SE static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS]; #else -static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = {0,}; +static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = { 0, }; #endif block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; @@ -134,13 +132,13 @@ block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; #ifdef CONFIG_IDE_LED #if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45) -static void ide_led (uchar led, uchar status); +static void ide_led(uchar led, uchar status); #else -extern void ide_led (uchar led, uchar status); +extern void ide_led(uchar led, uchar status); #endif #else #ifndef CONFIG_AMIGAONEG3SE -#define ide_led(a,b) /* dummy */ +#define ide_led(a,b) /* dummy */ #else extern void ide_led(uchar led, uchar status); #define LED_IDE1 1 @@ -151,215 +149,204 @@ extern void ide_led(uchar led, uchar status); #endif #ifdef CONFIG_IDE_RESET -static void ide_reset (void); +static void ide_reset(void); #else -#define ide_reset() /* dummy */ +#define ide_reset() /* dummy */ #endif -static void ide_ident (block_dev_desc_t *dev_desc); -static uchar ide_wait (int dev, ulong t); +static void ide_ident(block_dev_desc_t * dev_desc); +static uchar ide_wait(int dev, ulong t); #define IDE_TIME_OUT 2000 /* 2 sec timeout */ #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */ -#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ +#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ -static void input_data(int dev, ulong *sect_buf, int words); -static void output_data(int dev, ulong *sect_buf, int words); -static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); +static void input_data(int dev, ulong * sect_buf, int words); +static void output_data(int dev, ulong * sect_buf, int words); +static void ident_cpy(unsigned char *dest, unsigned char *src, + unsigned int len); #ifndef CONFIG_SYS_ATA_PORT_ADDR #define CONFIG_SYS_ATA_PORT_ADDR(port) (port) #endif #ifdef CONFIG_ATAPI -static void atapi_inquiry(block_dev_desc_t *dev_desc); -ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer); +static void atapi_inquiry(block_dev_desc_t * dev_desc); +ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer); #endif - #ifdef CONFIG_IDE_8xx_DIRECT -static void set_pcmcia_timing (int pmode); +static void set_pcmcia_timing(int pmode); #endif /* ------------------------------------------------------------------------- */ -int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_ide(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - int rcode = 0; - - switch (argc) { - case 0: - case 1: - cmd_usage(cmdtp); - return 1; - case 2: - if (strncmp(argv[1],"res",3) == 0) { - puts ("\nReset IDE" + int rcode = 0; + + switch (argc) { + case 0: + case 1: + cmd_usage(cmdtp); + return 1; + case 2: + if (strncmp(argv[1], "res", 3) == 0) { + puts("\nReset IDE" #ifdef CONFIG_IDE_8xx_DIRECT - " on PCMCIA " PCMCIA_SLOT_MSG + " on PCMCIA " PCMCIA_SLOT_MSG #endif - ": "); + ": "); - ide_init (); - return 0; - } else if (strncmp(argv[1],"inf",3) == 0) { - int i; + ide_init(); + return 0; + } else if (strncmp(argv[1], "inf", 3) == 0) { + int i; - putc ('\n'); + putc('\n'); - for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) { - if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN) - continue; /* list only known devices */ - printf ("IDE device %d: ", i); - dev_print(&ide_dev_desc[i]); - } - return 0; + for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { + if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN) + continue; /* list only known devices */ + printf("IDE device %d: ", i); + dev_print(&ide_dev_desc[i]); + } + return 0; - } else if (strncmp(argv[1],"dev",3) == 0) { - if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) { - puts ("\nno IDE devices available\n"); - return 1; - } - printf ("\nIDE device %d: ", curr_device); - dev_print(&ide_dev_desc[curr_device]); - return 0; - } else if (strncmp(argv[1],"part",4) == 0) { - int dev, ok; - - for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) { - if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) { - ++ok; - if (dev) - putc ('\n'); - print_part(&ide_dev_desc[dev]); + } else if (strncmp(argv[1], "dev", 3) == 0) { + if ((curr_device < 0) + || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) { + puts("\nno IDE devices available\n"); + return 1; } + printf("\nIDE device %d: ", curr_device); + dev_print(&ide_dev_desc[curr_device]); + return 0; + } else if (strncmp(argv[1], "part", 4) == 0) { + int dev, ok; + + for (ok = 0, dev = 0; dev < CONFIG_SYS_IDE_MAXDEVICE; + ++dev) { + if (ide_dev_desc[dev].part_type != + PART_TYPE_UNKNOWN) { + ++ok; + if (dev) + putc('\n'); + print_part(&ide_dev_desc[dev]); + } + } + if (!ok) { + puts("\nno IDE devices available\n"); + rcode++; + } + return rcode; } - if (!ok) { - puts ("\nno IDE devices available\n"); - rcode ++; - } - return rcode; - } - cmd_usage(cmdtp); - return 1; - case 3: - if (strncmp(argv[1],"dev",3) == 0) { - int dev = (int)simple_strtoul(argv[2], NULL, 10); - - printf ("\nIDE device %d: ", dev); - if (dev >= CONFIG_SYS_IDE_MAXDEVICE) { - puts ("unknown device\n"); - return 1; - } - dev_print(&ide_dev_desc[dev]); - /*ide_print (dev);*/ + cmd_usage(cmdtp); + return 1; + case 3: + if (strncmp(argv[1], "dev", 3) == 0) { + int dev = (int)simple_strtoul(argv[2], NULL, 10); - if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) { - return 1; - } + printf("\nIDE device %d: ", dev); + if (dev >= CONFIG_SYS_IDE_MAXDEVICE) { + puts("unknown device\n"); + return 1; + } + dev_print(&ide_dev_desc[dev]); + /*ide_print (dev); */ - curr_device = dev; + if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) { + return 1; + } + + curr_device = dev; - puts ("... is now current device\n"); + puts("... is now current device\n"); - return 0; - } else if (strncmp(argv[1],"part",4) == 0) { - int dev = (int)simple_strtoul(argv[2], NULL, 10); + return 0; + } else if (strncmp(argv[1], "part", 4) == 0) { + int dev = (int)simple_strtoul(argv[2], NULL, 10); - if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) { + if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) { print_part(&ide_dev_desc[dev]); - } else { - printf ("\nIDE device %d not available\n", dev); - rcode = 1; - } - return rcode; -#if 0 - } else if (strncmp(argv[1],"pio",4) == 0) { - int mode = (int)simple_strtoul(argv[2], NULL, 10); - - if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) { - puts ("\nSetting "); - pio_mode = mode; - ide_init (); - } else { - printf ("\nInvalid PIO mode %d (0 ... %d only)\n", - mode, IDE_MAX_PIO_MODE); + } else { + printf("\nIDE device %d not available\n", dev); + rcode = 1; + } + return rcode; } - return; -#endif - } - cmd_usage(cmdtp); - return 1; - default: - /* at least 4 args */ + cmd_usage(cmdtp); + return 1; + default: + /* at least 4 args */ - if (strcmp(argv[1],"read") == 0) { - ulong addr = simple_strtoul(argv[2], NULL, 16); - ulong cnt = simple_strtoul(argv[4], NULL, 16); - ulong n; + if (strcmp(argv[1], "read") == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong cnt = simple_strtoul(argv[4], NULL, 16); + ulong n; #ifdef CONFIG_SYS_64BIT_LBA - lbaint_t blk = simple_strtoull(argv[3], NULL, 16); + lbaint_t blk = simple_strtoull(argv[3], NULL, 16); - printf ("\nIDE read: device %d block # %Ld, count %ld ... ", - curr_device, blk, cnt); + printf("\nIDE read: device %d block # %Ld, count %ld ... ", + curr_device, blk, cnt); #else - lbaint_t blk = simple_strtoul(argv[3], NULL, 16); - - printf ("\nIDE read: device %d block # %ld, count %ld ... ", - curr_device, blk, cnt); -#endif - - n = ide_dev_desc[curr_device].block_read (curr_device, - blk, cnt, - (ulong *)addr); - /* flush cache after read */ - flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz); - - printf ("%ld blocks read: %s\n", - n, (n==cnt) ? "OK" : "ERROR"); - if (n==cnt) { - return 0; - } else { - return 1; - } - } else if (strcmp(argv[1],"write") == 0) { - ulong addr = simple_strtoul(argv[2], NULL, 16); - ulong cnt = simple_strtoul(argv[4], NULL, 16); - ulong n; + lbaint_t blk = simple_strtoul(argv[3], NULL, 16); + + printf("\nIDE read: device %d block # %ld, count %ld ... ", + curr_device, blk, cnt); +#endif + + n = ide_dev_desc[curr_device].block_read(curr_device, + blk, cnt, + (ulong *) + addr); + /* flush cache after read */ + flush_cache(addr, + cnt * ide_dev_desc[curr_device].blksz); + + printf("%ld blocks read: %s\n", + n, (n == cnt) ? "OK" : "ERROR"); + if (n == cnt) + return 0; + else + return 1; + } else if (strcmp(argv[1], "write") == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong cnt = simple_strtoul(argv[4], NULL, 16); + ulong n; #ifdef CONFIG_SYS_64BIT_LBA - lbaint_t blk = simple_strtoull(argv[3], NULL, 16); + lbaint_t blk = simple_strtoull(argv[3], NULL, 16); - printf ("\nIDE write: device %d block # %Ld, count %ld ... ", - curr_device, blk, cnt); + printf("\nIDE write: device %d block # %Ld, count %ld ... ", + curr_device, blk, cnt); #else - lbaint_t blk = simple_strtoul(argv[3], NULL, 16); + lbaint_t blk = simple_strtoul(argv[3], NULL, 16); - printf ("\nIDE write: device %d block # %ld, count %ld ... ", - curr_device, blk, cnt); + printf("\nIDE write: device %d block # %ld, count %ld ... ", + curr_device, blk, cnt); #endif - n = ide_write (curr_device, blk, cnt, (ulong *)addr); + n = ide_write(curr_device, blk, cnt, (ulong *) addr); - printf ("%ld blocks written: %s\n", - n, (n==cnt) ? "OK" : "ERROR"); - if (n==cnt) { - return 0; + printf("%ld blocks written: %s\n", + n, (n == cnt) ? "OK" : "ERROR"); + if (n == cnt) + return 0; + else + return 1; } else { - return 1; + cmd_usage(cmdtp); + rcode = 1; } - } else { - cmd_usage(cmdtp); - rcode = 1; - } - return rcode; - } + return rcode; + } } -int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_diskboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { char *boot_device = NULL; char *ep; @@ -372,15 +359,15 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) const void *fit_hdr = NULL; #endif - show_boot_progress (41); + show_boot_progress(41); switch (argc) { case 1: addr = CONFIG_SYS_LOAD_ADDR; - boot_device = getenv ("bootdevice"); + boot_device = getenv("bootdevice"); break; case 2: addr = simple_strtoul(argv[1], NULL, 16); - boot_device = getenv ("bootdevice"); + boot_device = getenv("bootdevice"); break; case 3: addr = simple_strtoul(argv[1], NULL, 16); @@ -388,93 +375,91 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) break; default: cmd_usage(cmdtp); - show_boot_progress (-42); + show_boot_progress(-42); return 1; } - show_boot_progress (42); + show_boot_progress(42); if (!boot_device) { - puts ("\n** No boot device **\n"); - show_boot_progress (-43); + puts("\n** No boot device **\n"); + show_boot_progress(-43); return 1; } - show_boot_progress (43); + show_boot_progress(43); dev = simple_strtoul(boot_device, &ep, 16); - if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) { - printf ("\n** Device %d not available\n", dev); - show_boot_progress (-44); + if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) { + printf("\n** Device %d not available\n", dev); + show_boot_progress(-44); return 1; } - show_boot_progress (44); + show_boot_progress(44); if (*ep) { if (*ep != ':') { - puts ("\n** Invalid boot device, use `dev[:part]' **\n"); - show_boot_progress (-45); + puts("\n** Invalid boot device, use `dev[:part]' **\n"); + show_boot_progress(-45); return 1; } part = simple_strtoul(++ep, NULL, 16); } - show_boot_progress (45); - if (get_partition_info (&ide_dev_desc[dev], part, &info)) { - show_boot_progress (-46); + show_boot_progress(45); + if (get_partition_info(&ide_dev_desc[dev], part, &info)) { + show_boot_progress(-46); return 1; } - show_boot_progress (46); - if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) && - (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) { - printf ("\n** Invalid partition type \"%.32s\"" - " (expect \"" BOOT_PART_TYPE "\")\n", - info.type); - show_boot_progress (-47); + show_boot_progress(46); + if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) + && (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) { + printf("\n** Invalid partition type \"%.32s\"" " (expect \"" + BOOT_PART_TYPE "\")\n", info.type); + show_boot_progress(-47); return 1; } - show_boot_progress (47); + show_boot_progress(47); - printf ("\nLoading from IDE device %d, partition %d: " - "Name: %.32s Type: %.32s\n", - dev, part, info.name, info.type); + printf("\nLoading from IDE device %d, partition %d: " + "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type); - debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n", - info.start, info.size, info.blksz); + debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n", + info.start, info.size, info.blksz); - if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) { - printf ("** Read error on %d:%d\n", dev, part); - show_boot_progress (-48); + if (ide_dev_desc[dev].block_read(dev, info.start, 1, (ulong *) addr) != 1) { + printf("** Read error on %d:%d\n", dev, part); + show_boot_progress(-48); return 1; } - show_boot_progress (48); + show_boot_progress(48); - switch (genimg_get_format ((void *)addr)) { + switch (genimg_get_format((void *)addr)) { case IMAGE_FORMAT_LEGACY: - hdr = (image_header_t *)addr; + hdr = (image_header_t *) addr; - show_boot_progress (49); + show_boot_progress(49); - if (!image_check_hcrc (hdr)) { - puts ("\n** Bad Header Checksum **\n"); - show_boot_progress (-50); + if (!image_check_hcrc(hdr)) { + puts("\n** Bad Header Checksum **\n"); + show_boot_progress(-50); return 1; } - show_boot_progress (50); + show_boot_progress(50); - image_print_contents (hdr); + image_print_contents(hdr); - cnt = image_get_image_size (hdr); + cnt = image_get_image_size(hdr); break; #if defined(CONFIG_FIT) case IMAGE_FORMAT_FIT: fit_hdr = (const void *)addr; - puts ("Fit image detected...\n"); + puts("Fit image detected...\n"); - cnt = fit_get_size (fit_hdr); + cnt = fit_get_size(fit_hdr); break; #endif default: - show_boot_progress (-49); - puts ("** Unknown image type\n"); + show_boot_progress(-49); + puts("** Unknown image type\n"); return 1; } @@ -482,24 +467,24 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) cnt /= info.blksz; cnt -= 1; - if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt, - (ulong *)(addr+info.blksz)) != cnt) { - printf ("** Read error on %d:%d\n", dev, part); - show_boot_progress (-51); + if (ide_dev_desc[dev].block_read(dev, info.start + 1, cnt, + (ulong *) (addr + info.blksz)) != cnt) { + printf("** Read error on %d:%d\n", dev, part); + show_boot_progress(-51); return 1; } - show_boot_progress (51); + show_boot_progress(51); #if defined(CONFIG_FIT) /* This cannot be done earlier, we need complete FIT image in RAM first */ - if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) { - if (!fit_check_format (fit_hdr)) { - show_boot_progress (-140); - puts ("** Bad FIT image format\n"); + if (genimg_get_format((void *)addr) == IMAGE_FORMAT_FIT) { + if (!fit_check_format(fit_hdr)) { + show_boot_progress(-140); + puts("** Bad FIT image format\n"); return 1; } - show_boot_progress (141); - fit_print_contents (fit_hdr); + show_boot_progress(141); + fit_print_contents(fit_hdr); } #endif @@ -508,16 +493,16 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) load_addr = addr; /* Check if we should attempt an auto-start */ - if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) { + if (((ep = getenv("autostart")) != NULL) && (strcmp(ep, "yes") == 0)) { char *local_args[2]; - extern int do_bootm (cmd_tbl_t *, int, int, char *[]); + extern int do_bootm(cmd_tbl_t *, int, int, char *[]); local_args[0] = argv[0]; local_args[1] = NULL; - printf ("Automatic boot of image at addr 0x%08lX ...\n", addr); + printf("Automatic boot of image at addr 0x%08lX ...\n", addr); - do_bootm (cmdtp, 0, 1, local_args); + do_bootm(cmdtp, 0, 1, local_args); rcode = 1; } return rcode; @@ -525,43 +510,45 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* ------------------------------------------------------------------------- */ -void inline -__ide_outb(int dev, int port, unsigned char val) +void inline __ide_outb(int dev, int port, unsigned char val) { - debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", - dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port))); - outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port))); + debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", + dev, port, val, + (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); } -void inline ide_outb (int dev, int port, unsigned char val) - __attribute__((weak, alias("__ide_outb"))); -unsigned char inline -__ide_inb(int dev, int port) +void inline ide_outb(int dev, int port, unsigned char val) + __attribute__ ((weak, alias("__ide_outb"))); + +unsigned char inline __ide_inb(int dev, int port) { uchar val; - val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port))); - debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", - dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val); + val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", + dev, port, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), + val); return val; } + unsigned char inline ide_inb(int dev, int port) - __attribute__((weak, alias("__ide_inb"))); + __attribute__ ((weak, alias("__ide_inb"))); #ifdef CONFIG_TUNE_PIO -int inline -__ide_set_piomode(int pio_mode) +int inline __ide_set_piomode(int pio_mode) { return 0; } + int inline ide_set_piomode(int pio_mode) - __attribute__((weak, alias("__ide_set_piomode"))); + __attribute__ ((weak, alias("__ide_set_piomode"))); #endif -void ide_init (void) +void ide_init(void) { #ifdef CONFIG_IDE_8xx_DIRECT - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); #endif unsigned char c; @@ -574,23 +561,23 @@ void ide_init (void) unsigned int max_bus_scan; #endif #ifdef CONFIG_IDE_8xx_PCCARD - extern int pcmcia_on (void); - extern int ide_devices_found; /* Initialized in check_ide_device() */ -#endif /* CONFIG_IDE_8xx_PCCARD */ + extern int pcmcia_on(void); + extern int ide_devices_found; /* Initialized in check_ide_device() */ +#endif /* CONFIG_IDE_8xx_PCCARD */ #ifdef CONFIG_IDE_PREINIT - extern int ide_preinit (void); + extern int ide_preinit(void); WATCHDOG_RESET(); - if (ide_preinit ()) { - puts ("ide_preinit failed\n"); + if (ide_preinit()) { + puts("ide_preinit failed\n"); return; } -#endif /* CONFIG_IDE_PREINIT */ +#endif /* CONFIG_IDE_PREINIT */ #ifdef CONFIG_IDE_8xx_PCCARD - extern int pcmcia_on (void); - extern int ide_devices_found; /* Initialized in check_ide_device() */ + extern int pcmcia_on(void); + extern int ide_devices_found; /* Initialized in check_ide_device() */ WATCHDOG_RESET(); @@ -599,35 +586,33 @@ void ide_init (void) pcmcia_on(); if (!ide_devices_found) return; - udelay (1000000); /* 1 s */ -#endif /* CONFIG_IDE_8xx_PCCARD */ + udelay(1000000); /* 1 s */ +#endif /* CONFIG_IDE_8xx_PCCARD */ WATCHDOG_RESET(); #ifdef CONFIG_IDE_8xx_DIRECT /* Initialize PIO timing tables */ - for (i=0; i <= IDE_MAX_PIO_MODE; ++i) { - pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, - gd->bus_clk); - pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length, - gd->bus_clk); - pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, - gd->bus_clk); - debug ( "PIO Mode %d: setup=%2d ns/%d clk" - " len=%3d ns/%d clk" - " hold=%2d ns/%d clk\n", - i, - pio_config_ns[i].t_setup, pio_config_clk[i].t_setup, - pio_config_ns[i].t_length, pio_config_clk[i].t_length, - pio_config_ns[i].t_hold, pio_config_clk[i].t_hold); + for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) { + pio_config_clk[i].t_setup = + PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk); + pio_config_clk[i].t_length = + PCMCIA_MK_CLKS(pio_config_ns[i].t_length, gd->bus_clk); + pio_config_clk[i].t_hold = + PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk); + debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk" + " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup, + pio_config_clk[i].t_setup, pio_config_ns[i].t_length, + pio_config_clk[i].t_length, pio_config_ns[i].t_hold, + pio_config_clk[i].t_hold); } #endif /* CONFIG_IDE_8xx_DIRECT */ /* Reset the IDE just to be sure. * Light LED's to show */ - ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */ - ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */ + ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */ + ide_reset(); /* ATAPI Drives seems to need a proper IDE Reset */ #ifdef CONFIG_IDE_8xx_DIRECT /* PCMCIA / IDE initialization for common mem space */ @@ -635,7 +620,7 @@ void ide_init (void) /* start in PIO mode 0 - most relaxed timings */ pio_mode = 0; - set_pcmcia_timing (pio_mode); + set_pcmcia_timing(pio_mode); #endif /* CONFIG_IDE_8xx_DIRECT */ /* @@ -643,7 +628,7 @@ void ide_init (void) * According to spec, this can take up to 31 seconds! */ #ifndef CONFIG_AMIGAONEG3SE - for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) { + for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) { int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS); #else s = getenv("ide_maxbus"); @@ -652,43 +637,43 @@ void ide_init (void) else max_bus_scan = CONFIG_SYS_IDE_MAXBUS; - for (bus=0; bus<max_bus_scan; ++bus) { + for (bus = 0; bus < max_bus_scan; ++bus) { int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / max_bus_scan); #endif #ifdef CONFIG_IDE_8xx_PCCARD /* Skip non-ide devices from probing */ if ((ide_devices_found & (1 << bus)) == 0) { - ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */ + ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */ continue; } #endif - printf ("Bus %d: ", bus); + printf("Bus %d: ", bus); ide_bus_ok[bus] = 0; /* Select device */ - udelay (100000); /* 100 ms */ - ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev)); - udelay (100000); /* 100 ms */ + udelay(100000); /* 100 ms */ + ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev)); + udelay(100000); /* 100 ms */ #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) if ((s = getenv("ide_reset_timeout")) != NULL) ata_reset_time = simple_strtol(s, NULL, 10); #endif i = 0; do { - udelay (10000); /* 10 ms */ + udelay(10000); /* 10 ms */ - c = ide_inb (dev, ATA_STATUS); + c = ide_inb(dev, ATA_STATUS); i++; #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3) if (i > (ata_reset_time * 100)) { #else if (i > (ATA_RESET_TIME * 100)) { #endif - puts ("** Timeout **\n"); - ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */ + puts("** Timeout **\n"); + ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */ #ifdef CONFIG_AMIGAONEG3SE /* If this is the second bus, the first one was OK */ if (bus != 0) { @@ -698,54 +683,52 @@ void ide_init (void) #endif return; } - if ((i >= 100) && ((i%100)==0)) { - putc ('.'); - } + if ((i >= 100) && ((i % 100) == 0)) + putc('.'); } while (c & ATA_STAT_BUSY); if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) { - puts ("not available "); - debug ("Status = 0x%02X ", c); -#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */ - } else if ((c & ATA_STAT_READY) == 0) { - puts ("not available "); - debug ("Status = 0x%02X ", c); + puts("not available "); + debug("Status = 0x%02X ", c); +#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */ + } else if ((c & ATA_STAT_READY) == 0) { + puts("not available "); + debug("Status = 0x%02X ", c); #endif } else { - puts ("OK "); + puts("OK "); ide_bus_ok[bus] = 1; } WATCHDOG_RESET(); } #ifdef CONFIG_AMIGAONEG3SE - skip_bus: +skip_bus: #endif - putc ('\n'); + putc('\n'); - ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */ + ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */ curr_device = -1; - for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) { + for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { #ifdef CONFIG_IDE_LED int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2; #endif - ide_dev_desc[i].type=DEV_TYPE_UNKNOWN; - ide_dev_desc[i].if_type=IF_TYPE_IDE; - ide_dev_desc[i].dev=i; - ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN; - ide_dev_desc[i].blksz=0; - ide_dev_desc[i].lba=0; - ide_dev_desc[i].block_read=ide_read; + ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; + ide_dev_desc[i].if_type = IF_TYPE_IDE; + ide_dev_desc[i].dev = i; + ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN; + ide_dev_desc[i].blksz = 0; + ide_dev_desc[i].lba = 0; + ide_dev_desc[i].block_read = ide_read; if (!ide_bus_ok[IDE_BUS(i)]) continue; - ide_led (led, 1); /* LED on */ + ide_led(led, 1); /* LED on */ ide_ident(&ide_dev_desc[i]); - ide_led (led, 0); /* LED off */ + ide_led(led, 0); /* LED off */ dev_print(&ide_dev_desc[i]); -/* ide_print (i); */ if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) { - init_part (&ide_dev_desc[i]); /* initialize partition type */ + init_part(&ide_dev_desc[i]); /* initialize partition type */ if (curr_device < 0) curr_device = i; } @@ -755,99 +738,96 @@ void ide_init (void) /* ------------------------------------------------------------------------- */ -block_dev_desc_t * ide_get_dev(int dev) +block_dev_desc_t *ide_get_dev(int dev) { return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL; } - #ifdef CONFIG_IDE_8xx_DIRECT -static void -set_pcmcia_timing (int pmode) +static void set_pcmcia_timing(int pmode) { - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); ulong timings; - debug ("Set timing for PIO Mode %d\n", pmode); + debug("Set timing for PIO Mode %d\n", pmode); timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold) - | PCMCIA_SST(pio_config_clk[pmode].t_setup) - | PCMCIA_SL (pio_config_clk[pmode].t_length) - ; + | PCMCIA_SST(pio_config_clk[pmode].t_setup) + | PCMCIA_SL(pio_config_clk[pmode].t_length); /* IDE 0 */ pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0; pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0 #if (CONFIG_SYS_PCMCIA_POR0 != 0) - | timings + | timings #endif - ; - debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0); + ; + debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0); pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1; pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1 #if (CONFIG_SYS_PCMCIA_POR1 != 0) - | timings + | timings #endif - ; - debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1); + ; + debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1); pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2; pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2 #if (CONFIG_SYS_PCMCIA_POR2 != 0) - | timings + | timings #endif - ; - debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2); + ; + debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2); pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3; pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3 #if (CONFIG_SYS_PCMCIA_POR3 != 0) - | timings + | timings #endif - ; - debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3); + ; + debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3); /* IDE 1 */ pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4; pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4 #if (CONFIG_SYS_PCMCIA_POR4 != 0) - | timings + | timings #endif - ; - debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4); + ; + debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4); pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5; pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5 #if (CONFIG_SYS_PCMCIA_POR5 != 0) - | timings + | timings #endif - ; - debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5); + ; + debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5); pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6; pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6 #if (CONFIG_SYS_PCMCIA_POR6 != 0) - | timings + | timings #endif - ; - debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6); + ; + debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6); pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7; pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7 #if (CONFIG_SYS_PCMCIA_POR7 != 0) - | timings + | timings #endif - ; - debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7); + ; + debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7); } -#endif /* CONFIG_IDE_8xx_DIRECT */ +#endif /* CONFIG_IDE_8xx_DIRECT */ /* ------------------------------------------------------------------------- */ @@ -856,32 +836,33 @@ set_pcmcia_timing (int pmode) #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) ) #define input_swap_data(x,y,z) input_data(x,y,z) #else -static void -input_swap_data(int dev, ulong *sect_buf, int words) +static void input_swap_data(int dev, ulong * sect_buf, int words) { #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) uchar i; - volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); - volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); - ushort *dbuf = (ushort *)sect_buf; + volatile uchar *pbuf_even = + (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + volatile uchar *pbuf_odd = + (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + ushort *dbuf = (ushort *) sect_buf; while (words--) { - for (i=0; i<2; i++) { - *(((uchar *)(dbuf)) + 1) = *pbuf_even; - *(uchar *)dbuf = *pbuf_odd; - dbuf+=1; + for (i = 0; i < 2; i++) { + *(((uchar *) (dbuf)) + 1) = *pbuf_even; + *(uchar *) dbuf = *pbuf_odd; + dbuf += 1; } } #else - volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); - ushort *dbuf = (ushort *)sect_buf; + volatile ushort *pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + ushort *dbuf = (ushort *) sect_buf; - debug("in input swap data base for read is %lx\n", (unsigned long) pbuf); + debug("in input swap data base for read is %lx\n", (unsigned long)pbuf); while (words--) { #ifdef __MIPS__ - *dbuf++ = swab16p((u16*)pbuf); - *dbuf++ = swab16p((u16*)pbuf); + *dbuf++ = swab16p((u16 *) pbuf); + *dbuf++ = swab16p((u16 *) pbuf); #elif defined(CONFIG_PCS440EP) *dbuf++ = *pbuf; *dbuf++ = *pbuf; @@ -892,21 +873,19 @@ input_swap_data(int dev, ulong *sect_buf, int words) } #endif } -#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ - +#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) -static void -output_data(int dev, ulong *sect_buf, int words) +static void output_data(int dev, ulong * sect_buf, int words) { #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; - pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); - pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); - dbuf = (uchar *)sect_buf; + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; while (words--) { EIEIO; *pbuf_even = *dbuf++; @@ -918,11 +897,11 @@ output_data(int dev, ulong *sect_buf, int words) *pbuf_odd = *dbuf++; } #else - ushort *dbuf; - volatile ushort *pbuf; + ushort *dbuf; + volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); - dbuf = (ushort *)sect_buf; + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; while (words--) { #if defined(CONFIG_PCS440EP) /* not tested, because CF was write protected */ @@ -939,26 +918,24 @@ output_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ -static void -output_data(int dev, ulong *sect_buf, int words) +#else /* ! __PPC__ */ +static void output_data(int dev, ulong * sect_buf, int words) { - outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1); + outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); } -#endif /* __PPC__ */ +#endif /* __PPC__ */ #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) -static void -input_data(int dev, ulong *sect_buf, int words) +static void input_data(int dev, ulong * sect_buf, int words) { #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; - pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); - pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); - dbuf = (uchar *)sect_buf; + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; while (words--) { *dbuf++ = *pbuf_even; EIEIO; @@ -974,13 +951,13 @@ input_data(int dev, ulong *sect_buf, int words) SYNC; } #else - ushort *dbuf; - volatile ushort *pbuf; + ushort *dbuf; + volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); - dbuf = (ushort *)sect_buf; + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; - debug("in input data base for read is %lx\n", (unsigned long) pbuf); + debug("in input data base for read is %lx\n", (unsigned long)pbuf); while (words--) { #if defined(CONFIG_PCS440EP) @@ -997,22 +974,21 @@ input_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ -static void -input_data(int dev, ulong *sect_buf, int words) +#else /* ! __PPC__ */ +static void input_data(int dev, ulong * sect_buf, int words) { - insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1); + insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); } -#endif /* __PPC__ */ +#endif /* __PPC__ */ /* ------------------------------------------------------------------------- */ -static void ide_ident (block_dev_desc_t *dev_desc) +static void ide_ident(block_dev_desc_t * dev_desc) { ulong iobuf[ATA_SECTORWORDS]; unsigned char c; - hd_driveid_t *iop = (hd_driveid_t *)iobuf; + hd_driveid_t *iop = (hd_driveid_t *) iobuf; #ifdef CONFIG_AMIGAONEG3SE int max_bus_scan; @@ -1027,103 +1003,104 @@ static void ide_ident (block_dev_desc_t *dev_desc) int pio_mode; #endif -#if 0 - int mode, cycle_time; -#endif int device; - device=dev_desc->dev; - printf (" Device %d: ", device); + device = dev_desc->dev; + printf(" Device %d: ", device); #ifdef CONFIG_AMIGAONEG3SE s = getenv("ide_maxbus"); - if (s) { + if (s) max_bus_scan = simple_strtol(s, NULL, 10); - } else { + else max_bus_scan = CONFIG_SYS_IDE_MAXBUS; - } - if (device >= max_bus_scan*2) { - dev_desc->type=DEV_TYPE_UNKNOWN; + if (device >= max_bus_scan * 2) { + dev_desc->type = DEV_TYPE_UNKNOWN; return; } #endif - ide_led (DEVICE_LED(device), 1); /* LED on */ + ide_led(DEVICE_LED(device), 1); /* LED on */ /* Select device */ - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - dev_desc->if_type=IF_TYPE_IDE; + ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); + dev_desc->if_type = IF_TYPE_IDE; #ifdef CONFIG_ATAPI - do_retry = 0; - retries = 0; - - /* Warning: This will be tricky to read */ - while (retries <= 1) { - /* check signature */ - if ((ide_inb(device,ATA_SECT_CNT) == 0x01) && - (ide_inb(device,ATA_SECT_NUM) == 0x01) && - (ide_inb(device,ATA_CYL_LOW) == 0x14) && - (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) { - /* ATAPI Signature found */ - dev_desc->if_type=IF_TYPE_ATAPI; - /* Start Ident Command - */ - ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT); - /* - * Wait for completion - ATAPI devices need more time - * to become ready - */ - c = ide_wait (device, ATAPI_TIME_OUT); - } else + do_retry = 0; + retries = 0; + + /* Warning: This will be tricky to read */ + while (retries <= 1) { + /* check signature */ + if ((ide_inb(device, ATA_SECT_CNT) == 0x01) && + (ide_inb(device, ATA_SECT_NUM) == 0x01) && + (ide_inb(device, ATA_CYL_LOW) == 0x14) && + (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) { + /* ATAPI Signature found */ + dev_desc->if_type = IF_TYPE_ATAPI; + /* Start Ident Command + */ + ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT); + /* + * Wait for completion - ATAPI devices need more time + * to become ready + */ + c = ide_wait(device, ATAPI_TIME_OUT); + } else #endif - { - /* Start Ident Command - */ - ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT); + { + /* Start Ident Command + */ + ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT); - /* Wait for completion - */ - c = ide_wait (device, IDE_TIME_OUT); - } - ide_led (DEVICE_LED(device), 0); /* LED off */ + /* Wait for completion + */ + c = ide_wait(device, IDE_TIME_OUT); + } + ide_led(DEVICE_LED(device), 0); /* LED off */ - if (((c & ATA_STAT_DRQ) == 0) || - ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) { + if (((c & ATA_STAT_DRQ) == 0) || + ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) { #ifdef CONFIG_ATAPI #ifdef CONFIG_AMIGAONEG3SE - s = getenv("ide_doreset"); - if (s && strcmp(s, "on") == 0) -#endif - { - /* Need to soft reset the device in case it's an ATAPI... */ - debug ("Retrying...\n"); - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - udelay(100000); - ide_outb (device, ATA_COMMAND, 0x08); - udelay (500000); /* 500 ms */ - } - /* Select device - */ - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - retries++; + s = getenv("ide_doreset"); + if (s && strcmp(s, "on") == 0) +#endif + { + /* Need to soft reset the device in case it's an ATAPI... */ + debug("Retrying...\n"); + ide_outb(device, ATA_DEV_HD, + ATA_LBA | ATA_DEVICE(device)); + udelay(100000); + ide_outb(device, ATA_COMMAND, 0x08); + udelay(500000); /* 500 ms */ + } + /* Select device + */ + ide_outb(device, ATA_DEV_HD, + ATA_LBA | ATA_DEVICE(device)); + retries++; #else - return; + return; #endif - } + } #ifdef CONFIG_ATAPI - else - break; - } /* see above - ugly to read */ + else + break; + } /* see above - ugly to read */ - if (retries == 2) /* Not found */ + if (retries == 2) /* Not found */ return; #endif - input_swap_data (device, iobuf, ATA_SECTORWORDS); + input_swap_data(device, iobuf, ATA_SECTORWORDS); - ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision)); - ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor)); - ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product)); + ident_cpy((unsigned char *)dev_desc->revision, iop->fw_rev, + sizeof(dev_desc->revision)); + ident_cpy((unsigned char *)dev_desc->vendor, iop->model, + sizeof(dev_desc->vendor)); + ident_cpy((unsigned char *)dev_desc->product, iop->serial_no, + sizeof(dev_desc->product)); #ifdef __LITTLE_ENDIAN /* * firmware revision, model, and serial number have Big Endian Byte @@ -1133,12 +1110,12 @@ static void ide_ident (block_dev_desc_t *dev_desc) * 6.2.1.6: Identify Drive, Table 39 for more details */ - strswab (dev_desc->revision); - strswab (dev_desc->vendor); - strswab (dev_desc->product); + strswab(dev_desc->revision); + strswab(dev_desc->vendor); + strswab(dev_desc->product); #endif /* __LITTLE_ENDIAN */ - if ((iop->config & 0x0080)==0x0080) + if ((iop->config & 0x0080) == 0x0080) dev_desc->removable = 1; else dev_desc->removable = 0; @@ -1148,7 +1125,7 @@ static void ide_ident (block_dev_desc_t *dev_desc) pio_mode = iop->tPIO; if (pio_mode > 2) { printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode); - pio_mode = 0; /* Force it to dead slow, and hope for the best... */ + pio_mode = 0; /* Force it to dead slow, and hope for the best... */ } /* Any CompactFlash Storage Card that supports PIO mode 3 or above @@ -1163,7 +1140,7 @@ static void ide_ident (block_dev_desc_t *dev_desc) pio_mode = 3; if (iop->eide_pio_modes & 0x02) pio_mode = 4; - if (ata_id_is_cfa((u16 *)iop)) { + if (ata_id_is_cfa((u16 *) iop)) { if ((iop->cf_advanced_caps & 0x07) == 0x01) pio_mode = 5; if ((iop->cf_advanced_caps & 0x07) == 0x02) @@ -1175,36 +1152,8 @@ static void ide_ident (block_dev_desc_t *dev_desc) ide_set_piomode(pio_mode); #endif /* CONFIG_TUNE_PIO */ -#if 0 - /* - * Drive PIO mode autoselection - */ - mode = iop->tPIO; - - printf ("tPIO = 0x%02x = %d\n",mode, mode); - if (mode > 2) { /* 2 is maximum allowed tPIO value */ - mode = 2; - debug ("Override tPIO -> 2\n"); - } - if (iop->field_valid & 2) { /* drive implements ATA2? */ - debug ("Drive implements ATA2\n"); - if (iop->capability & 8) { /* drive supports use_iordy? */ - cycle_time = iop->eide_pio_iordy; - } else { - cycle_time = iop->eide_pio; - } - debug ("cycle time = %d\n", cycle_time); - mode = 4; - if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */ - if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */ - if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */ - if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */ - } - printf ("PIO mode to use: PIO %d\n", mode); -#endif /* 0 */ - #ifdef CONFIG_ATAPI - if (dev_desc->if_type==IF_TYPE_ATAPI) { + if (dev_desc->if_type == IF_TYPE_ATAPI) { atapi_inquiry(dev_desc); return; } @@ -1213,7 +1162,7 @@ static void ide_ident (block_dev_desc_t *dev_desc) #ifdef __BIG_ENDIAN /* swap shorts */ dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16); -#else /* ! __BIG_ENDIAN */ +#else /* ! __BIG_ENDIAN */ /* * do not swap shorts on little endian * @@ -1221,48 +1170,32 @@ static void ide_ident (block_dev_desc_t *dev_desc) * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details. */ dev_desc->lba = iop->lba_capacity; -#endif /* __BIG_ENDIAN */ +#endif /* __BIG_ENDIAN */ #ifdef CONFIG_LBA48 - if (iop->command_set_2 & 0x0400) { /* LBA 48 support */ + if (iop->command_set_2 & 0x0400) { /* LBA 48 support */ dev_desc->lba48 = 1; dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] | - ((unsigned long long)iop->lba48_capacity[1] << 16) | - ((unsigned long long)iop->lba48_capacity[2] << 32) | - ((unsigned long long)iop->lba48_capacity[3] << 48); + ((unsigned long long)iop->lba48_capacity[1] << 16) | + ((unsigned long long)iop->lba48_capacity[2] << 32) | + ((unsigned long long)iop->lba48_capacity[3] << 48); } else { dev_desc->lba48 = 0; } #endif /* CONFIG_LBA48 */ /* assuming HD */ - dev_desc->type=DEV_TYPE_HARDDISK; - dev_desc->blksz=ATA_BLOCKSIZE; - dev_desc->lun=0; /* just to fill something in... */ - -#if 0 /* only used to test the powersaving mode, - * if enabled, the drive goes after 5 sec - * in standby mode */ - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - c = ide_wait (device, IDE_TIME_OUT); - ide_outb (device, ATA_SECT_CNT, 1); - ide_outb (device, ATA_LBA_LOW, 0); - ide_outb (device, ATA_LBA_MID, 0); - ide_outb (device, ATA_LBA_HIGH, 0); - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - ide_outb (device, ATA_COMMAND, 0xe3); - udelay (50); - c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */ -#endif + dev_desc->type = DEV_TYPE_HARDDISK; + dev_desc->blksz = ATA_BLOCKSIZE; + dev_desc->lun = 0; /* just to fill something in... */ } - /* ------------------------------------------------------------------------- */ -ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer) +ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer) { ulong n = 0; unsigned char c; - unsigned char pwrsave=0; /* power save */ + unsigned char pwrsave = 0; /* power save */ #ifdef CONFIG_LBA48 unsigned char lba48 = 0; @@ -1271,119 +1204,118 @@ ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer) lba48 = 1; } #endif - debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n", - device, blknr, blkcnt, (ulong)buffer); + debug("ide_read dev %d start %LX, blocks %lX buffer at %lX\n", + device, blknr, blkcnt, (ulong) buffer); - ide_led (DEVICE_LED(device), 1); /* LED on */ + ide_led(DEVICE_LED(device), 1); /* LED on */ /* Select device */ - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - c = ide_wait (device, IDE_TIME_OUT); + ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); + c = ide_wait(device, IDE_TIME_OUT); if (c & ATA_STAT_BUSY) { - printf ("IDE read: device %d not ready\n", device); + printf("IDE read: device %d not ready\n", device); goto IDE_READ_E; } /* first check if the drive is in Powersaving mode, if yes, * increase the timeout value */ - ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR); - udelay (50); + ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR); + udelay(50); - c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */ + c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */ if (c & ATA_STAT_BUSY) { - printf ("IDE read: device %d not ready\n", device); + printf("IDE read: device %d not ready\n", device); goto IDE_READ_E; } if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) { - printf ("No Powersaving mode %X\n", c); + printf("No Powersaving mode %X\n", c); } else { - c = ide_inb(device,ATA_SECT_CNT); - debug ("Powersaving %02X\n",c); - if(c==0) - pwrsave=1; + c = ide_inb(device, ATA_SECT_CNT); + debug("Powersaving %02X\n", c); + if (c == 0) + pwrsave = 1; } - while (blkcnt-- > 0) { - c = ide_wait (device, IDE_TIME_OUT); + c = ide_wait(device, IDE_TIME_OUT); if (c & ATA_STAT_BUSY) { - printf ("IDE read: device %d not ready\n", device); + printf("IDE read: device %d not ready\n", device); break; } #ifdef CONFIG_LBA48 if (lba48) { /* write high bits */ - ide_outb (device, ATA_SECT_CNT, 0); - ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); + ide_outb(device, ATA_SECT_CNT, 0); + ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); #ifdef CONFIG_SYS_64BIT_LBA - ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF); - ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); + ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF); + ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); #else - ide_outb (device, ATA_LBA_MID, 0); - ide_outb (device, ATA_LBA_HIGH, 0); + ide_outb(device, ATA_LBA_MID, 0); + ide_outb(device, ATA_LBA_HIGH, 0); #endif } #endif - ide_outb (device, ATA_SECT_CNT, 1); - ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); - ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF); - ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); + ide_outb(device, ATA_SECT_CNT, 1); + ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); + ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF); + ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); #ifdef CONFIG_LBA48 if (lba48) { - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT); + ide_outb(device, ATA_DEV_HD, + ATA_LBA | ATA_DEVICE(device)); + ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT); } else #endif { - ide_outb (device, ATA_DEV_HD, ATA_LBA | - ATA_DEVICE(device) | - ((blknr >> 24) & 0xF) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_READ); + ide_outb(device, ATA_DEV_HD, ATA_LBA | + ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); + ide_outb(device, ATA_COMMAND, ATA_CMD_READ); } - udelay (50); + udelay(50); - if(pwrsave) { - c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */ - pwrsave=0; + if (pwrsave) { + c = ide_wait(device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */ + pwrsave = 0; } else { - c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */ + c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */ } - if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) { + if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) != + ATA_STAT_DRQ) { #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF) - printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n", - device, blknr, c); + printf("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n", + device, blknr, c); #else - printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", - device, (ulong)blknr, c); + printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", + device, (ulong) blknr, c); #endif break; } - input_data (device, buffer, ATA_SECTORWORDS); - (void) ide_inb (device, ATA_STATUS); /* clear IRQ */ + input_data(device, buffer, ATA_SECTORWORDS); + (void)ide_inb(device, ATA_STATUS); /* clear IRQ */ ++n; ++blknr; buffer += ATA_BLOCKSIZE; } IDE_READ_E: - ide_led (DEVICE_LED(device), 0); /* LED off */ - return (n); + ide_led(DEVICE_LED(device), 0); /* LED off */ + return n; } /* ------------------------------------------------------------------------- */ - -ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer) +ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, void *buffer) { ulong n = 0; unsigned char c; @@ -1396,77 +1328,78 @@ ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer) } #endif - ide_led (DEVICE_LED(device), 1); /* LED on */ + ide_led(DEVICE_LED(device), 1); /* LED on */ /* Select device */ - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); + ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); while (blkcnt-- > 0) { - c = ide_wait (device, IDE_TIME_OUT); + c = ide_wait(device, IDE_TIME_OUT); if (c & ATA_STAT_BUSY) { - printf ("IDE read: device %d not ready\n", device); + printf("IDE read: device %d not ready\n", device); goto WR_OUT; } #ifdef CONFIG_LBA48 if (lba48) { /* write high bits */ - ide_outb (device, ATA_SECT_CNT, 0); - ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); + ide_outb(device, ATA_SECT_CNT, 0); + ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); #ifdef CONFIG_SYS_64BIT_LBA - ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF); - ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); + ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF); + ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); #else - ide_outb (device, ATA_LBA_MID, 0); - ide_outb (device, ATA_LBA_HIGH, 0); + ide_outb(device, ATA_LBA_MID, 0); + ide_outb(device, ATA_LBA_HIGH, 0); #endif } #endif - ide_outb (device, ATA_SECT_CNT, 1); - ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); - ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF); - ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); + ide_outb(device, ATA_SECT_CNT, 1); + ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); + ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF); + ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); #ifdef CONFIG_LBA48 if (lba48) { - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT); + ide_outb(device, ATA_DEV_HD, + ATA_LBA | ATA_DEVICE(device)); + ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT); } else #endif { - ide_outb (device, ATA_DEV_HD, ATA_LBA | - ATA_DEVICE(device) | - ((blknr >> 24) & 0xF) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE); + ide_outb(device, ATA_DEV_HD, ATA_LBA | + ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); + ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE); } - udelay (50); + udelay(50); - c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */ + c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */ - if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) { + if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) != + ATA_STAT_DRQ) { #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF) - printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n", - device, blknr, c); + printf("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n", + device, blknr, c); #else - printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", - device, (ulong)blknr, c); + printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", + device, (ulong) blknr, c); #endif goto WR_OUT; } - output_data (device, buffer, ATA_SECTORWORDS); - c = ide_inb (device, ATA_STATUS); /* clear IRQ */ + output_data(device, buffer, ATA_SECTORWORDS); + c = ide_inb(device, ATA_STATUS); /* clear IRQ */ ++n; ++blknr; buffer += ATA_BLOCKSIZE; } WR_OUT: - ide_led (DEVICE_LED(device), 0); /* LED off */ - return (n); + ide_led(DEVICE_LED(device), 0); /* LED off */ + return n; } /* ------------------------------------------------------------------------- */ @@ -1476,23 +1409,23 @@ WR_OUT: * terminate the string * "len" is the size of available memory including the terminating '\0' */ -static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len) +static void ident_cpy(unsigned char *dst, unsigned char *src, unsigned int len) { unsigned char *end, *last; last = dst; - end = src + len - 1; + end = src + len - 1; /* reserve space for '\0' */ if (len < 2) goto OUT; /* skip leading white space */ - while ((*src) && (src<end) && (*src==' ')) + while ((*src) && (src < end) && (*src == ' ')) ++src; /* copy string, omitting trailing white space */ - while ((*src) && (src<end)) { + while ((*src) && (src < end)) { *dst++ = *src; if (*src++ != ' ') last = dst; @@ -1507,18 +1440,17 @@ OUT: * Wait until Busy bit is off, or timeout (in ms) * Return last status */ -static uchar ide_wait (int dev, ulong t) +static uchar ide_wait(int dev, ulong t) { - ulong delay = 10 * t; /* poll every 100 us */ + ulong delay = 10 * t; /* poll every 100 us */ uchar c; while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) { - udelay (100); - if (delay-- == 0) { + udelay(100); + if (delay-- == 0) break; - } } - return (c); + return c; } /* ------------------------------------------------------------------------- */ @@ -1526,20 +1458,20 @@ static uchar ide_wait (int dev, ulong t) #ifdef CONFIG_IDE_RESET extern void ide_set_reset(int idereset); -static void ide_reset (void) +static void ide_reset(void) { #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR) - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; #endif int i; curr_device = -1; - for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i) + for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i) ide_bus_ok[i] = 0; - for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) + for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; - ide_set_reset (1); /* assert reset */ + ide_set_reset(1); /* assert reset */ /* the reset signal shall be asserted for et least 25 us */ udelay(25); @@ -1550,16 +1482,15 @@ static void ide_reset (void) immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */ immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE); immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE); - immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE; + immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE; /* wait 500 ms for the voltage to stabilize */ - for (i=0; i<500; ++i) { - udelay (1000); - } + for (i = 0; i < 500; ++i) + udelay(1000); - immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */ -#endif /* CONFIG_SYS_PB_12V_ENABLE */ + immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */ +#endif /* CONFIG_SYS_PB_12V_ENABLE */ #ifdef CONFIG_SYS_PB_IDE_MOTOR /* configure IDE Motor voltage monitor pin as input */ @@ -1569,25 +1500,24 @@ static void ide_reset (void) /* wait up to 1 s for the motor voltage to stabilize */ - for (i=0; i<1000; ++i) { - if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) { + for (i = 0; i < 1000; ++i) { + if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) break; - } - udelay (1000); + udelay(1000); } if (i == 1000) { /* Timeout */ - printf ("\nWarning: 5V for IDE Motor missing\n"); + printf("\nWarning: 5V for IDE Motor missing\n"); # ifdef CONFIG_STATUS_LED # ifdef STATUS_LED_YELLOW - status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON ); + status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON); # endif # ifdef STATUS_LED_GREEN - status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF); + status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF); # endif # endif /* CONFIG_STATUS_LED */ } -#endif /* CONFIG_SYS_PB_IDE_MOTOR */ +#endif /* CONFIG_SYS_PB_IDE_MOTOR */ WATCHDOG_RESET(); @@ -1595,12 +1525,11 @@ static void ide_reset (void) ide_set_reset(0); /* wait 250 ms */ - for (i=0; i<250; ++i) { - udelay (1000); - } + for (i = 0; i < 250; ++i) + udelay(1000); } -#endif /* CONFIG_IDE_RESET */ +#endif /* CONFIG_IDE_RESET */ /* ------------------------------------------------------------------------- */ @@ -1611,22 +1540,21 @@ static void ide_reset (void) !defined(CONFIG_KUP4K) && \ !defined(CONFIG_KUP4X) -static uchar led_buffer = 0; /* Buffer for current LED status */ +static uchar led_buffer = 0; /* Buffer for current LED status */ -static void ide_led (uchar led, uchar status) +static void ide_led(uchar led, uchar status) { uchar *led_port = LED_PORT; - if (status) { /* switch LED on */ - led_buffer |= led; - } else { /* switch LED off */ + if (status) /* switch LED on */ + led_buffer |= led; + else /* switch LED off */ led_buffer &= ~led; - } *led_port = led_buffer; } -#endif /* CONFIG_IDE_LED */ +#endif /* CONFIG_IDE_LED */ /* ------------------------------------------------------------------------- */ @@ -1638,16 +1566,15 @@ static void ide_led (uchar led, uchar status) #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) /* since ATAPI may use commands with not 4 bytes alligned length * we have our own transfer functions, 2 bytes alligned */ -static void -output_data_shorts(int dev, ushort *sect_buf, int shorts) +static void output_data_shorts(int dev, ushort * sect_buf, int shorts) { #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; - pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); - pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); while (shorts--) { EIEIO; *pbuf_even = *dbuf++; @@ -1655,13 +1582,14 @@ output_data_shorts(int dev, ushort *sect_buf, int shorts) *pbuf_odd = *dbuf++; } #else - ushort *dbuf; - volatile ushort *pbuf; + ushort *dbuf; + volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); - dbuf = (ushort *)sect_buf; + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; - debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf); + debug("in output data shorts base for read is %lx\n", + (unsigned long)pbuf); while (shorts--) { EIEIO; @@ -1670,16 +1598,15 @@ output_data_shorts(int dev, ushort *sect_buf, int shorts) #endif } -static void -input_data_shorts(int dev, ushort *sect_buf, int shorts) +static void input_data_shorts(int dev, ushort * sect_buf, int shorts) { #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; - pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); - pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); while (shorts--) { EIEIO; *dbuf++ = *pbuf_even; @@ -1687,13 +1614,14 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) *dbuf++ = *pbuf_odd; } #else - ushort *dbuf; - volatile ushort *pbuf; + ushort *dbuf; + volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); - dbuf = (ushort *)sect_buf; + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; - debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf); + debug("in input data shorts base for read is %lx\n", + (unsigned long)pbuf); while (shorts--) { EIEIO; @@ -1702,20 +1630,18 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) #endif } -#else /* ! __PPC__ */ -static void -output_data_shorts(int dev, ushort *sect_buf, int shorts) +#else /* ! __PPC__ */ +static void output_data_shorts(int dev, ushort * sect_buf, int shorts) { - outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts); + outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); } -static void -input_data_shorts(int dev, ushort *sect_buf, int shorts) +static void input_data_shorts(int dev, ushort * sect_buf, int shorts) { - insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts); + insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); } -#endif /* __PPC__ */ +#endif /* __PPC__ */ /* * Wait until (Status & mask) == res, or timeout (in ms) @@ -1723,134 +1649,142 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) * This is used since some ATAPI CD ROMs clears their Busy Bit first * and then they set their DRQ Bit */ -static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res) +static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res) { - ulong delay = 10 * t; /* poll every 100 us */ + ulong delay = 10 * t; /* poll every 100 us */ uchar c; - c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */ + c = ide_inb(dev, ATA_DEV_CTL); /* prevents to read the status before valid */ while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) { /* break if error occurs (doesn't make sense to wait more) */ - if((c & ATA_STAT_ERR)==ATA_STAT_ERR) + if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) break; - udelay (100); - if (delay-- == 0) { + udelay(100); + if (delay-- == 0) break; - } } - return (c); + return c; } /* * issue an atapi command */ -unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen) +unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, + unsigned char *buffer, int buflen) { - unsigned char c,err,mask,res; + unsigned char c, err, mask, res; int n; - ide_led (DEVICE_LED(device), 1); /* LED on */ + ide_led(DEVICE_LED(device), 1); /* LED on */ /* Select device */ - mask = ATA_STAT_BUSY|ATA_STAT_DRQ; + mask = ATA_STAT_BUSY | ATA_STAT_DRQ; res = 0; #ifdef CONFIG_AMIGAONEG3SE # warning THF: Removed LBA mode ??? #endif - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res); + ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); + c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); if ((c & mask) != res) { - printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c); - err=0xFF; + printf("ATAPI_ISSUE: device %d not ready status %X\n", device, + c); + err = 0xFF; goto AI_OUT; } /* write taskfile */ - ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */ - ide_outb (device, ATA_SECT_CNT, 0); - ide_outb (device, ATA_SECT_NUM, 0); - ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF)); - ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF)); + ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */ + ide_outb(device, ATA_SECT_CNT, 0); + ide_outb(device, ATA_SECT_NUM, 0); + ide_outb(device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF)); + ide_outb(device, ATA_CYL_HIGH, (unsigned char)((buflen >> 8) & 0xFF)); #ifdef CONFIG_AMIGAONEG3SE # warning THF: Removed LBA mode ??? #endif - ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); + ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET); - udelay (50); + ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET); + udelay(50); - mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR; + mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR; res = ATA_STAT_DRQ; - c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res); + c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); - if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */ - printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c); - err=0xFF; + if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */ + printf + ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n", + device, c); + err = 0xFF; goto AI_OUT; } - output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */ + output_data_shorts(device, (unsigned short *)ccb, ccblen / 2); /* write command block */ /* ATAPI Command written wait for completition */ - udelay (5000); /* device must set bsy */ + udelay(5000); /* device must set bsy */ - mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR; + mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR; /* if no data wait for DRQ = 0 BSY = 0 * if data wait for DRQ = 1 BSY = 0 */ - res=0; - if(buflen) + res = 0; + if (buflen) res = ATA_STAT_DRQ; - c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res); - if ((c & mask) != res ) { + c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); + if ((c & mask) != res) { if (c & ATA_STAT_ERR) { - err=(ide_inb(device,ATA_ERROR_REG))>>4; - debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c); + err = (ide_inb(device, ATA_ERROR_REG)) >> 4; + debug("atapi_issue 1 returned sense key %X status %02X\n", + err, c); } else { - printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c); - err=0xFF; + printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", + ccb[0], c); + err = 0xFF; } goto AI_OUT; } - n=ide_inb(device, ATA_CYL_HIGH); - n<<=8; - n+=ide_inb(device, ATA_CYL_LOW); - if(n>buflen) { - printf("ERROR, transfer bytes %d requested only %d\n",n,buflen); - err=0xff; + n = ide_inb(device, ATA_CYL_HIGH); + n <<= 8; + n += ide_inb(device, ATA_CYL_LOW); + if (n > buflen) { + printf("ERROR, transfer bytes %d requested only %d\n", n, + buflen); + err = 0xff; goto AI_OUT; } - if((n==0)&&(buflen<0)) { - printf("ERROR, transfer bytes %d requested %d\n",n,buflen); - err=0xff; + if ((n == 0) && (buflen < 0)) { + printf("ERROR, transfer bytes %d requested %d\n", n, buflen); + err = 0xff; goto AI_OUT; } - if(n!=buflen) { - debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen); + if (n != buflen) { + debug("WARNING, transfer bytes %d not equal with requested %d\n", + n, buflen); } - if(n!=0) { /* data transfer */ - debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n); - /* we transfer shorts */ - n>>=1; + if (n != 0) { /* data transfer */ + debug("ATAPI_ISSUE: %d Bytes to transfer\n", n); + /* we transfer shorts */ + n >>= 1; /* ok now decide if it is an in or output */ - if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) { - debug ("Write to device\n"); - output_data_shorts(device,(unsigned short *)buffer,n); + if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) { + debug("Write to device\n"); + output_data_shorts(device, (unsigned short *)buffer, n); } else { - debug ("Read from device @ %p shorts %d\n",buffer,n); - input_data_shorts(device,(unsigned short *)buffer,n); + debug("Read from device @ %p shorts %d\n", buffer, n); + input_data_shorts(device, (unsigned short *)buffer, n); } } - udelay(5000); /* seems that some CD ROMs need this... */ - mask = ATA_STAT_BUSY|ATA_STAT_ERR; - res=0; - c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res); + udelay(5000); /* seems that some CD ROMs need this... */ + mask = ATA_STAT_BUSY | ATA_STAT_ERR; + res = 0; + c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) { - err=(ide_inb(device,ATA_ERROR_REG) >> 4); - debug ("atapi_issue 2 returned sense key %X status %X\n",err,c); + err = (ide_inb(device, ATA_ERROR_REG) >> 4); + debug("atapi_issue 2 returned sense key %X status %X\n", + err, c); } else { err = 0; } AI_OUT: - ide_led (DEVICE_LED(device), 0); /* LED off */ - return (err); + ide_led(DEVICE_LED(device), 0); /* LED off */ + return err; } /* @@ -1861,189 +1795,180 @@ AI_OUT: #define ATAPI_DRIVE_NOT_READY 100 #define ATAPI_UNIT_ATTN 10 -unsigned char atapi_issue_autoreq (int device, - unsigned char* ccb, - int ccblen, - unsigned char *buffer, - int buflen) +unsigned char atapi_issue_autoreq(int device, + unsigned char *ccb, + int ccblen, unsigned char *buffer, int buflen) { - unsigned char sense_data[18],sense_ccb[12]; - unsigned char res,key,asc,ascq; - int notready,unitattn; + unsigned char sense_data[18], sense_ccb[12]; + unsigned char res, key, asc, ascq; + int notready, unitattn; #ifdef CONFIG_AMIGAONEG3SE char *s; unsigned int timeout, retrycnt; s = getenv("ide_cd_timeout"); - timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0; + timeout = s ? (simple_strtol(s, NULL, 10) * 1000000) / 5 : 0; retrycnt = 0; #endif - unitattn=ATAPI_UNIT_ATTN; - notready=ATAPI_DRIVE_NOT_READY; + unitattn = ATAPI_UNIT_ATTN; + notready = ATAPI_DRIVE_NOT_READY; retry: - res= atapi_issue(device,ccb,ccblen,buffer,buflen); - if (res==0) - return (0); /* Ok */ - - if (res==0xFF) - return (0xFF); /* error */ - - debug ("(auto_req)atapi_issue returned sense key %X\n",res); - - memset(sense_ccb,0,sizeof(sense_ccb)); - memset(sense_data,0,sizeof(sense_data)); - sense_ccb[0]=ATAPI_CMD_REQ_SENSE; - sense_ccb[4]=18; /* allocation Length */ - - res=atapi_issue(device,sense_ccb,12,sense_data,18); - key=(sense_data[2]&0xF); - asc=(sense_data[12]); - ascq=(sense_data[13]); - - debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res); - debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n", - sense_data[0], - key, - asc, - ascq); - - if((key==0)) - return 0; /* ok device ready */ - - if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */ - if(unitattn-->0) { - udelay(200*1000); + res = atapi_issue(device, ccb, ccblen, buffer, buflen); + if (res == 0) + return 0; /* Ok */ + + if (res == 0xFF) + return 0xFF; /* error */ + + debug("(auto_req)atapi_issue returned sense key %X\n", res); + + memset(sense_ccb, 0, sizeof(sense_ccb)); + memset(sense_data, 0, sizeof(sense_data)); + sense_ccb[0] = ATAPI_CMD_REQ_SENSE; + sense_ccb[4] = 18; /* allocation Length */ + + res = atapi_issue(device, sense_ccb, 12, sense_data, 18); + key = (sense_data[2] & 0xF); + asc = (sense_data[12]); + ascq = (sense_data[13]); + + debug("ATAPI_CMD_REQ_SENSE returned %x\n", res); + debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n", + sense_data[0], key, asc, ascq); + + if ((key == 0)) + return 0; /* ok device ready */ + + if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */ + if (unitattn-- > 0) { + udelay(200 * 1000); goto retry; } - printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN); + printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN); goto error; } - if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */ - if (notready-->0) { - udelay(200*1000); + if ((asc == 0x4) && (ascq == 0x1)) { /* not ready, but will be ready soon */ + if (notready-- > 0) { + udelay(200 * 1000); goto retry; } - printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY); + printf("Drive not ready, tried %d times\n", + ATAPI_DRIVE_NOT_READY); goto error; } - if(asc==0x3a) { - debug ("Media not present\n"); + if (asc == 0x3a) { + debug("Media not present\n"); goto error; } - #ifdef CONFIG_AMIGAONEG3SE - if ((sense_data[2]&0xF)==0x0B) { - debug ("ABORTED COMMAND...retry\n"); + if ((sense_data[2] & 0xF) == 0x0B) { + debug("ABORTED COMMAND...retry\n"); if (retrycnt++ < 4) goto retry; - return (0xFF); + return 0xFF; } - if ((sense_data[2]&0xf) == 0x02 && - sense_data[12] == 0x04 && - sense_data[13] == 0x01 ) { - debug ("Waiting for unit to become active\n"); + if ((sense_data[2] & 0xf) == 0x02 && + sense_data[12] == 0x04 && sense_data[13] == 0x01) { + debug("Waiting for unit to become active\n"); udelay(timeout); if (retrycnt++ < 4) goto retry; return 0xFF; } -#endif /* CONFIG_AMIGAONEG3SE */ +#endif /* CONFIG_AMIGAONEG3SE */ - printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq); + printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc, + ascq); error: - debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq); - return (0xFF); + debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq); + return 0xFF; } - -static void atapi_inquiry(block_dev_desc_t * dev_desc) +static void atapi_inquiry(block_dev_desc_t * dev_desc) { - unsigned char ccb[12]; /* Command descriptor block */ - unsigned char iobuf[64]; /* temp buf */ + unsigned char ccb[12]; /* Command descriptor block */ + unsigned char iobuf[64]; /* temp buf */ unsigned char c; int device; - device=dev_desc->dev; - dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */ - dev_desc->block_read=atapi_read; + device = dev_desc->dev; + dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */ + dev_desc->block_read = atapi_read; - memset(ccb,0,sizeof(ccb)); - memset(iobuf,0,sizeof(iobuf)); + memset(ccb, 0, sizeof(ccb)); + memset(iobuf, 0, sizeof(iobuf)); - ccb[0]=ATAPI_CMD_INQUIRY; - ccb[4]=40; /* allocation Legnth */ - c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40); + ccb[0] = ATAPI_CMD_INQUIRY; + ccb[4] = 40; /* allocation Legnth */ + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40); - debug ("ATAPI_CMD_INQUIRY returned %x\n",c); - if (c!=0) + debug("ATAPI_CMD_INQUIRY returned %x\n", c); + if (c != 0) return; /* copy device ident strings */ - ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8); - ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16); - ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5); + ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8); + ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16); + ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5); - dev_desc->lun=0; - dev_desc->lba=0; - dev_desc->blksz=0; - dev_desc->type=iobuf[0] & 0x1f; + dev_desc->lun = 0; + dev_desc->lba = 0; + dev_desc->blksz = 0; + dev_desc->type = iobuf[0] & 0x1f; - if ((iobuf[1]&0x80)==0x80) + if ((iobuf[1] & 0x80) == 0x80) dev_desc->removable = 1; else dev_desc->removable = 0; - memset(ccb,0,sizeof(ccb)); - memset(iobuf,0,sizeof(iobuf)); - ccb[0]=ATAPI_CMD_START_STOP; - ccb[4]=0x03; /* start */ + memset(ccb, 0, sizeof(ccb)); + memset(iobuf, 0, sizeof(iobuf)); + ccb[0] = ATAPI_CMD_START_STOP; + ccb[4] = 0x03; /* start */ - c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0); + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0); - debug ("ATAPI_CMD_START_STOP returned %x\n",c); - if (c!=0) + debug("ATAPI_CMD_START_STOP returned %x\n", c); + if (c != 0) return; - memset(ccb,0,sizeof(ccb)); - memset(iobuf,0,sizeof(iobuf)); - c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0); + memset(ccb, 0, sizeof(ccb)); + memset(iobuf, 0, sizeof(iobuf)); + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0); - debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c); - if (c!=0) + debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c); + if (c != 0) return; - memset(ccb,0,sizeof(ccb)); - memset(iobuf,0,sizeof(iobuf)); - ccb[0]=ATAPI_CMD_READ_CAP; - c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8); - debug ("ATAPI_CMD_READ_CAP returned %x\n",c); - if (c!=0) + memset(ccb, 0, sizeof(ccb)); + memset(iobuf, 0, sizeof(iobuf)); + ccb[0] = ATAPI_CMD_READ_CAP; + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8); + debug("ATAPI_CMD_READ_CAP returned %x\n", c); + if (c != 0) return; - debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n", - iobuf[0],iobuf[1],iobuf[2],iobuf[3], - iobuf[4],iobuf[5],iobuf[6],iobuf[7]); - - dev_desc->lba =((unsigned long)iobuf[0]<<24) + - ((unsigned long)iobuf[1]<<16) + - ((unsigned long)iobuf[2]<< 8) + - ((unsigned long)iobuf[3]); - dev_desc->blksz=((unsigned long)iobuf[4]<<24) + - ((unsigned long)iobuf[5]<<16) + - ((unsigned long)iobuf[6]<< 8) + - ((unsigned long)iobuf[7]); + debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n", + iobuf[0], iobuf[1], iobuf[2], iobuf[3], + iobuf[4], iobuf[5], iobuf[6], iobuf[7]); + + dev_desc->lba = ((unsigned long)iobuf[0] << 24) + + ((unsigned long)iobuf[1] << 16) + + ((unsigned long)iobuf[2] << 8) + ((unsigned long)iobuf[3]); + dev_desc->blksz = ((unsigned long)iobuf[4] << 24) + + ((unsigned long)iobuf[5] << 16) + + ((unsigned long)iobuf[6] << 8) + ((unsigned long)iobuf[7]); #ifdef CONFIG_LBA48 - dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */ + dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */ #endif return; } - /* * atapi_read: * we transfer only one block per command, since the multiple DRQ per @@ -2053,66 +1978,61 @@ static void atapi_inquiry(block_dev_desc_t * dev_desc) #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */ #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */ -ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer) +ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer) { ulong n = 0; - unsigned char ccb[12]; /* Command descriptor block */ + unsigned char ccb[12]; /* Command descriptor block */ ulong cnt; - debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n", - device, blknr, blkcnt, (ulong)buffer); + debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n", + device, blknr, blkcnt, (ulong) buffer); do { - if (blkcnt>ATAPI_READ_MAX_BLOCK) { - cnt=ATAPI_READ_MAX_BLOCK; + if (blkcnt > ATAPI_READ_MAX_BLOCK) { + cnt = ATAPI_READ_MAX_BLOCK; } else { - cnt=blkcnt; + cnt = blkcnt; } - ccb[0]=ATAPI_CMD_READ_12; - ccb[1]=0; /* reserved */ - ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */ - ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */ - ccb[4]=(unsigned char) (blknr>> 8) & 0xFF; - ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */ - ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */ - ccb[7]=(unsigned char) (cnt >>16) & 0xFF; - ccb[8]=(unsigned char) (cnt >> 8) & 0xFF; - ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */ - ccb[10]=0; /* reserved */ - ccb[11]=0; /* reserved */ - - if (atapi_issue_autoreq(device,ccb,12, + ccb[0] = ATAPI_CMD_READ_12; + ccb[1] = 0; /* reserved */ + ccb[2] = (unsigned char)(blknr >> 24) & 0xFF; /* MSB Block */ + ccb[3] = (unsigned char)(blknr >> 16) & 0xFF; /* */ + ccb[4] = (unsigned char)(blknr >> 8) & 0xFF; + ccb[5] = (unsigned char)blknr & 0xFF; /* LSB Block */ + ccb[6] = (unsigned char)(cnt >> 24) & 0xFF; /* MSB Block count */ + ccb[7] = (unsigned char)(cnt >> 16) & 0xFF; + ccb[8] = (unsigned char)(cnt >> 8) & 0xFF; + ccb[9] = (unsigned char)cnt & 0xFF; /* LSB Block */ + ccb[10] = 0; /* reserved */ + ccb[11] = 0; /* reserved */ + + if (atapi_issue_autoreq(device, ccb, 12, (unsigned char *)buffer, - cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) { - return (n); + cnt * ATAPI_READ_BLOCK_SIZE) == 0xFF) { + return n; } - n+=cnt; - blkcnt-=cnt; - blknr+=cnt; - buffer+=(cnt*ATAPI_READ_BLOCK_SIZE); + n += cnt; + blkcnt -= cnt; + blknr += cnt; + buffer += (cnt * ATAPI_READ_BLOCK_SIZE); } while (blkcnt > 0); - return (n); + return n; } /* ------------------------------------------------------------------------- */ #endif /* CONFIG_ATAPI */ -U_BOOT_CMD( - ide, 5, 1, do_ide, - "IDE sub-system", - "reset - reset IDE controller\n" - "ide info - show available IDE devices\n" - "ide device [dev] - show or set current device\n" - "ide part [dev] - print partition table of one or all IDE devices\n" - "ide read addr blk# cnt\n" - "ide write addr blk# cnt - read/write `cnt'" - " blocks starting at block `blk#'\n" - " to/from memory address `addr'\n" -); - -U_BOOT_CMD( - diskboot, 3, 1, do_diskboot, - "boot from IDE device", - "loadAddr dev:part\n" -); +U_BOOT_CMD(ide, 5, 1, do_ide, + "IDE sub-system", + "reset - reset IDE controller\n" + "ide info - show available IDE devices\n" + "ide device [dev] - show or set current device\n" + "ide part [dev] - print partition table of one or all IDE devices\n" + "ide read addr blk# cnt\n" + "ide write addr blk# cnt - read/write `cnt'" + " blocks starting at block `blk#'\n" + " to/from memory address `addr'\n"); + +U_BOOT_CMD(diskboot, 3, 1, do_diskboot, + "boot from IDE device", "loadAddr dev:part\n"); -- 1.6.2.5

2 3

[U-Boot] LCD issue
by yanfeng qin 13 May '09

13 May '09

Hi guys, I try to add LCD driver in U-boot. LCD displays many vertical lines in different colors. Is it anyone has experience in LCD? Yan Feng

1 0

[U-Boot] onenand bad block handling
by Geiger Ho 13 May '09

13 May '09

Hi all, I am working on an ARM platform with OneNAND as the permanent storage for u-boot, Linux kernel and rootfs. I am using u-boot-2009.03 and linux kernel 2.6.27. I have some questions about the bad block handling of OneNAND. 1. How does the u-boot handle bad block for onenand? 2. If u-boot is creating a bad block table, does it need to pass to the kernel? If not, how to ensure their bad block table are in sync? 3. How to deal with bad blocks after the writing of the u-boot, kernel and rootfs image? Is it the job of UBI? Thanks in advance. Best regards, Geiger

2 2

[U-Boot] Congratulations
by giseles＠ns.sympatico.ca 13 May '09

13 May '09

Confirm receipt by contacting the process unit officer Herald claim your £1,000,000GBP E-mail:phunit1@btinternet.com Fill the details:Name,Add,Tel.Yours Ms.Caroline

1 0

[U-Boot] [patch arm/next] dm355 evm support (v3)
by David Brownell 13 May '09

13 May '09

From: David Brownell <dbrownell(a)users.sourceforge.net> Initial U-Boot support for the DaVinci DM355 EVM. This is a board from Spectrum Digital. Board docs include schematic and firmware for its microcontroller: http://c6000.spectrumdigital.com/evmdm355/revd/ Most of the DM355 chip is fully documented by TI, the most notable exception being the MPEG/JPEG coprocessor (programmable using codecs available at no cost from TI), which is omitted from its DM335 sibling: http://focus.ti.com/docs/prod/folders/print/tms320dm355.html This version can boot from the on-board DM9000 Ethernet chip, after being loaded (from NAND, MMC/SD, or UART). In the near future, NAND and USB support could be added ... NAND support is being held back until the support for the 4-bit ECC hardware is ready. Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- NOTE: presumes the rework of chipselect handling in the NAND code, but that will only be visible if someone enables that driver. MAKEALL | 1 Makefile | 3 board/davinci/dm355evm/Makefile | 52 +++++++++ board/davinci/dm355evm/config.mk | 11 ++ board/davinci/dm355evm/dm355evm.c | 108 +++++++++++++++++++ include/configs/davinci_dm355evm.h | 190 +++++++++++++++++++++++++++++++++++ 6 files changed, 365 insertions(+) --- a/MAKEALL +++ b/MAKEALL @@ -527,6 +527,7 @@ LIST_ARM9=" \ davinci_schmoogie \ davinci_sffsdr \ davinci_sonata \ + davinci_dm355evm \ " ######################################################################### --- a/Makefile +++ b/Makefile @@ -2790,6 +2790,9 @@ davinci_sffsdr_config : unconfig davinci_sonata_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci +davinci_dm355evm_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci + lpd7a400_config \ lpd7a404_config: unconfig @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x --- /dev/null +++ b/board/davinci/dm355evm/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o +SOBJS := + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### --- /dev/null +++ b/board/davinci/dm355evm/config.mk @@ -0,0 +1,11 @@ +# +# Spectrum Digital DM355 EVM board +# dm355evm board has 1 bank of 128 MB DDR RAM +# Physical Address: 8000'0000 to 8800'0000 +# +# Linux Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0x81080000 --- /dev/null +++ b/board/davinci/dm355evm/dm355evm.c @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2009 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emif_defs.h> +#include <asm/arch/nand_defs.h> +#include "../common/misc.h" + + +DECLARE_GLOBAL_DATA_PTR; + +/* + * With the DM355 EVM, u-boot is *always* a third stage loader, + * unless a JTAG debugger handles the first two stages: + * + * - 1st stage is ROM Boot Loader (RBL), which searches for a + * second stage loader in one of three places based on SW7: + * NAND (with MMC/SD fallback), MMC/SD, or UART. + * + * - 2nd stage is User Boot Loader (UBL), using at most 30KB + * of on-chip SRAM, responsible for lowlevel init, and for + * loading the third stage loader into DRAM. + * + * - 3rd stage, that's us! + */ + +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM; + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + /* We expect the UBL to have handled "lowlevel init", which + * involves setting up at least: + * - clocks + * + PLL1 (for ARM and peripherals) and PLL2 (for DDR) + * + clock divisors for those PLLs + * + LPSC_DDR module enabled + * + LPSC_TIMER0 module (still) enabled + * - EMIF + * + DDR init and timings + * + AEMIF timings (for NAND and DM9000) + * - pinmux + * + * Some of that is repeated here, mostly as a precaution. + */ + + /* AEMIF: Some "address" lines are available as GPIOs. A3..A13 + * could be too if we used A12 as a GPIO during NAND chipselect + * (and Linux did too), letting us control the LED on A7/GPIO61. + */ + REG(PINMUX2) = 0x0c08; + + /* UART0 may still be in SyncReset if we didn't boot from UART */ + davinci_enable_uart0(); + + /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */ + lpsc_on(DAVINCI_LPSC_TPCC); + lpsc_on(DAVINCI_LPSC_TPTC0); + lpsc_on(DAVINCI_LPSC_TPTC1); + + return 0; +} + +#ifdef CONFIG_NAND_DAVINCI + +static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip) +{ + struct nand_chip *this = mtd->priv; + u32 wbase = (u32) this->IO_ADDR_W; + u32 rbase = (u32) this->IO_ADDR_R; + + if (chip == 1) { + __set_bit(14, &wbase); + __set_bit(14, &rbase); + } else { + __clear_bit(14, &wbase); + __clear_bit(14, &rbase); + } + this->IO_ADDR_W = (void *)wbase; + this->IO_ADDR_R = (void *)rbase; +} + +int board_nand_init(struct nand_chip *nand) +{ + davinci_nand_init(nand); + nand->select_chip = nand_dm355evm_select_chip; + return 0; +} + +#endif --- /dev/null +++ b/include/configs/davinci_dm355evm.h @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2009 David Brownell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* Spectrum Digital TMS320DM355 EVM board */ +#define DAVINCI_DM355EVM + +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ +#define CONFIG_SKIP_RELOCATE_UBOOT +#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_DISPLAY_CPUINFO + +/* SoC Configuration */ +#define CONFIG_ARM926EJS /* arm926ejs CPU */ +#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM355 + +/* Memory Info */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1_SIZE SZ_128M + +/* Serial Driver info: UART0 for console */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM1 0x01c20000 +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Ethernet: external DM9000 */ +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DM9000_BASE 0x04014000 +#define DM9000_IO CONFIG_DM9000_BASE +#define DM9000_DATA (CONFIG_DM9000_BASE + 2) + +/* I2C */ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */ + +/* NAND: socketed, two chipselects, normally 2 GBytes */ +/* NYET -- #define CONFIG_NAND_DAVINCI */ +#define CONFIG_SYS_NAND_HW_ECC +#define CONFIG_SYS_NAND_USE_FLASH_BBT + +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } +/* socket has two chipselects, nCE0 gated by address BIT(14) */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_MAX_CHIPS 2 + +/* USB: OTG connector */ +/* NYET -- #define CONFIG_USB_DAVINCI */ + +/* U-Boot command configuration */ +#include <config_cmd_default.h> + +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_I2C +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES + +#ifdef CONFIG_NAND_DAVINCI +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#endif + +/* TEMPORARY -- no safe place to save env, yet */ +#define CONFIG_ENV_IS_NOWHERE +#undef CONFIG_CMD_SAVEENV + +#ifdef CONFIG_USB_DAVINCI +#define CONFIG_MUSB_HCD +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#else +#undef CONFIG_MUSB_HCD +#undef CONFIG_CMD_USB +#undef CONFIG_USB_STORAGE +#endif + +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* U-Boot general configuration */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE /* Print buffer size */ \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_LONGHELP + +#define CONFIG_ENV_SIZE SZ_16K + +/* NYET -- #define CONFIG_BOOTDELAY 5 */ +#define CONFIG_BOOTCOMMAND \ + "dhcp;bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200n8 " \ + "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_VERSION_VARIABLE +#define CONFIG_TIMESTAMP + +#define CONFIG_NET_RETRY_COUNT 10 + +/* U-Boot memory configuration */ +#define CONFIG_STACKSIZE SZ_256K /* regular stack */ +#define CONFIG_SYS_MALLOC_LEN SZ_512K /* malloc() arena */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ +#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ +#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ + +/* Linux interfacing */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ +#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ + + +/* NAND configuration ... socketed with two chipselects. It normally comes + * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other + * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC + * pretty much demands the 4-bit ECC support.) You can of course swap in + * other parts, including small page ones. + * + * This presents a single read-only partition for all bootloader stuff. + * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and + * some extra space to help cope with bad blocks in that data. Linux + * shouldn't care about its detailed layout, and will probably want to use + * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to + * override this default partitioning using MTDPARTS and cmdlinepart. + */ +#define MTDIDS_DEFAULT "nand0=davinci_nand.0" + +#ifdef CONFIG_SYS_NAND_LARGEPAGE +/* Use same layout for 128K/256K blocks; allow some bad blocks */ +#define PART_BOOT "2m(bootloader)ro," +#else +/* Assume 16K erase blocks; allow a few bad ones. */ +#define PART_BOOT "512k(bootloader)ro," +#endif + +#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ +#define PART_REST "-(filesystem)" + +#define MTDPARTS_DEFAULT \ + "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST + +#endif /* __CONFIG_H */

2 1

[U-Boot] [PATCH] OMAP3: Introduce CONFIG option for power code
by Dirk Behme 13 May '09

13 May '09

Some OMAP3 boards need control for external power companion chips. Introduce a CONFIG option for this, to avoid Makefile changes for each board. Signed-off-by: Dirk Behme <dirk.behme(a)googlemail.com> --- Compile tested with ./MAKEALL ARM_CORTEX_A8, boot tested on OMAP3 based BeagleBoard. Note: This patch trys to fix the first comment of http://lists.denx.de/pipermail/u-boot/2009-April/051383.html board/omap3/common/Makefile | 5 +---- doc/README.omap3 | 11 +++++++++++ include/configs/omap3_beagle.h | 1 + include/configs/omap3_overo.h | 1 + include/configs/omap3_pandora.h | 1 + include/configs/omap3_zoom1.h | 1 + 6 files changed, 16 insertions(+), 4 deletions(-) Index: u-boot-main/doc/README.omap3 =================================================================== --- u-boot-main.orig/doc/README.omap3 +++ u-boot-main/doc/README.omap3 @@ -77,6 +77,17 @@ For all other commands see help +Custom configs +============== + +CONFIG_OMAP3_POWER + +Some OMAP3 boards use external power companion chips to be configured. Enable +this CONFIG option in your board specific configuration file if your board +uses such a companion chip. + +This enables compilation of board/omap3/common/power.c. + Acknowledgements ================ Index: u-boot-main/board/omap3/common/Makefile =================================================================== --- u-boot-main.orig/board/omap3/common/Makefile +++ u-boot-main/board/omap3/common/Makefile @@ -29,10 +29,7 @@ endif LIB = $(obj)lib$(VENDOR).a -COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o -COBJS-$(CONFIG_OMAP3_OVERO) += power.o -COBJS-$(CONFIG_OMAP3_PANDORA) += power.o -COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o +COBJS-$(CONFIG_OMAP3_POWER) += power.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) Index: u-boot-main/include/configs/omap3_beagle.h =================================================================== --- u-boot-main.orig/include/configs/omap3_beagle.h +++ u-boot-main/include/configs/omap3_beagle.h @@ -37,6 +37,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ +#define CONFIG_OMAP3_POWER 1 /* use power code */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> Index: u-boot-main/include/configs/omap3_overo.h =================================================================== --- u-boot-main.orig/include/configs/omap3_overo.h +++ u-boot-main/include/configs/omap3_overo.h @@ -29,6 +29,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ #define CONFIG_OMAP3_OVERO 1 /* working with overo */ +#define CONFIG_OMAP3_POWER 1 /* use power code */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> Index: u-boot-main/include/configs/omap3_pandora.h =================================================================== --- u-boot-main.orig/include/configs/omap3_pandora.h +++ u-boot-main/include/configs/omap3_pandora.h @@ -32,6 +32,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ +#define CONFIG_OMAP3_POWER 1 /* use power code */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> Index: u-boot-main/include/configs/omap3_zoom1.h =================================================================== --- u-boot-main.orig/include/configs/omap3_zoom1.h +++ u-boot-main/include/configs/omap3_zoom1.h @@ -38,6 +38,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */ +#define CONFIG_OMAP3_POWER 1 /* use power code */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h>

2 7

[U-Boot] Help with driver for a ethernet switch
by Raphael Amorim 12 May '09

12 May '09

Hello all, Could anyone help me with this? Which change should I do on http://git.denx.de/u-boot/drivers/net/ks8695eth.c to make it work with the ks8995m ? Have anyone done this before? thanks, Raphael

2 1

Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
by Kazuaki Ichinohe 12 May '09

12 May '09

Hello Stefan, I re-send the patch source. The following three points were corrected. 1."---" was adjusted to add git history. 2.The following lines of /drivers/block/Makefile were matched to sorting. COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o 3.The point of canyonlands.h was corrected. > You enable SATA commands on Canyonlands here which is ok. But... <snip> > ... you enable the DWC SATA driver for all 460 board variants here, including > Glacier and Arches. And, I made the patch from the source obtained with git in May 12. Please review the patch again. --- This patch adds a SATA harddisk driver for the canyonlands. This patch is kernel driver's porting. This pach corresponded to not cmd_scsi but cmd_sata. [environment variable, boot script] setenv bootargs root=/dev/sda7 rw setenv bootargs ${bootargs} console=ttyS0,115200 ext2load sata 0:2 0x400000 /canyonlands/uImage ext2load sata 0:2 0x800000 /canyonlands/canyonlands.dtb fdt addr 0x800000 0x4000 bootm 0x400000 - 0x800000 If you drive SATA-2 disk on Canyonlands, you must change parts from PI2PCIE212 to PI2PCIE2212 on U25. We confirmed to boot by using following disk. 1.Vender: Fujitsu Type: MHW2040BS 2.Vender: Fujitsu Type: MHW2060BK 3.Vendor: HAGIWARA SYS-COM:HFD25S-032GT 4.Vender: WesternDigital Type: WD3200BJKT (CONFIG_LBA48 required) 5.Vender: WesternDigital Type: WD3200BEVT (CONFIG_LBA48 required) 6.Vender: hitachi Type: HTS543232L9A300 (CONFIG_LBA48 required) 7.Vender: Seagate Type: ST31000333AS (CONFIG_LBA48 required) 8.Vender: Transcend Type: TS32GSSD25S-M 9.Vender: MTRON Type: MSD-SATA1525-016 Signed-off-by: Kazuaki Ichinohe <kazuichi at fsi.co.jp> [patch] diff -uprN u-boot-0512/drivers/block/Makefile u-boot-sata/drivers/block/Makefile --- u-boot-0512/drivers/block/Makefile 2009-05-12 12:48:38.000000000 +0900 +++ u-boot-sata/drivers/block/Makefile 2009-05-12 14:54:43.000000000 +0900 @@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_LIBATA) += libata.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o +COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o diff -uprN u-boot-0512/drivers/block/sata_dwc.c u-boot-sata/drivers/block/sata_dwc.c --- u-boot-0512/drivers/block/sata_dwc.c 1970-01-01 09:00:00.000000000 +0900 +++ u-boot-sata/drivers/block/sata_dwc.c 2009-05-07 09:37:53.000000000 +0900 @@ -0,0 +1,2110 @@ +/* + * sata_dwc.c + * + * Synopsys DesignWare Cores (DWC) SATA host driver + * + * Author: Mark Miesfeld <mmiesfeld(a)amcc.com> + * + * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr(a)denx.de> + * Copyright 2008 DENX Software Engineering + * + * Based on versions provided by AMCC and Synopsys which are: + * Copyright 2006 Applied Micro Circuits Corporation + * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED + * + * This program is free software; you can redistribute + * it and/or modify it under the terms of the GNU + * General Public License as published by the + * Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + */ +/* + * SATA support based on the chip canyonlands. + * + * 04-17-2009 + * The local version of this driver for the canyonlands board + * does not use interrupts but polls the chip instead. + */ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/errno.h> +#include <asm/io.h> +#include <malloc.h> +#include <ata.h> +#include <linux/ctype.h> + +#include "sata_dwc.h" + +#define DMA_NUM_CHANS 1 +#define DMA_NUM_CHAN_REGS 8 + +#define AHB_DMA_BRST_DFLT 16 + +struct dmareg { + u32 low; + u32 high; +}; + +struct dma_chan_regs { + struct dmareg sar; + struct dmareg dar; + struct dmareg llp; + struct dmareg ctl; + struct dmareg sstat; + struct dmareg dstat; + struct dmareg sstatar; + struct dmareg dstatar; + struct dmareg cfg; + struct dmareg sgr; + struct dmareg dsr; +}; + +struct dma_interrupt_regs { + struct dmareg tfr; + struct dmareg block; + struct dmareg srctran; + struct dmareg dsttran; + struct dmareg error; +}; + +struct ahb_dma_regs { + struct dma_chan_regs chan_regs[DMA_NUM_CHAN_REGS]; + struct dma_interrupt_regs interrupt_raw; + struct dma_interrupt_regs interrupt_status; + struct dma_interrupt_regs interrupt_mask; + struct dma_interrupt_regs interrupt_clear; + struct dmareg statusInt; + struct dmareg rq_srcreg; + struct dmareg rq_dstreg; + struct dmareg rq_sgl_srcreg; + struct dmareg rq_sgl_dstreg; + struct dmareg rq_lst_srcreg; + struct dmareg rq_lst_dstreg; + struct dmareg dma_cfg; + struct dmareg dma_chan_en; + struct dmareg dma_id; + struct dmareg dma_test; + struct dmareg res1; + struct dmareg res2; + /* DMA Comp Params + * Param 6 = dma_param[0], Param 5 = dma_param[1], + * Param 4 = dma_param[2] ... + */ + struct dmareg dma_params[6]; +}; + +#define DMA_EN 0x00000001 +#define DMA_DI 0x00000000 +#define DMA_CHANNEL(ch) (0x00000001 << (ch)) +#define DMA_ENABLE_CHAN(ch) ((0x00000001 << (ch)) | \ + ((0x000000001 << (ch)) << 8)) +#define DMA_DISABLE_CHAN(ch) (0x00000000 | \ + ((0x000000001 << (ch)) << 8)) + +#define SATA_DWC_MAX_PORTS 1 +#define SATA_DWC_SCR_OFFSET 0x24 +#define SATA_DWC_REG_OFFSET 0x64 + +struct sata_dwc_regs { + u32 fptagr; + u32 fpbor; + u32 fptcr; + u32 dmacr; + u32 dbtsr; + u32 intpr; + u32 intmr; + u32 errmr; + u32 llcr; + u32 phycr; + u32 physr; + u32 rxbistpd; + u32 rxbistpd1; + u32 rxbistpd2; + u32 txbistpd; + u32 txbistpd1; + u32 txbistpd2; + u32 bistcr; + u32 bistfctr; + u32 bistsr; + u32 bistdecr; + u32 res[15]; + u32 testr; + u32 versionr; + u32 idr; + u32 unimpl[192]; + u32 dmadr[256]; +}; + +#define SATA_DWC_TXFIFO_DEPTH 0x01FF +#define SATA_DWC_RXFIFO_DEPTH 0x01FF + +#define SATA_DWC_DBTSR_MWR(size) ((size / 4) & SATA_DWC_TXFIFO_DEPTH) +#define SATA_DWC_DBTSR_MRD(size) (((size / 4) & \ + SATA_DWC_RXFIFO_DEPTH) << 16) +#define SATA_DWC_INTPR_DMAT 0x00000001 +#define SATA_DWC_INTPR_NEWFP 0x00000002 +#define SATA_DWC_INTPR_PMABRT 0x00000004 +#define SATA_DWC_INTPR_ERR 0x00000008 +#define SATA_DWC_INTPR_NEWBIST 0x00000010 +#define SATA_DWC_INTPR_IPF 0x10000000 +#define SATA_DWC_INTMR_DMATM 0x00000001 +#define SATA_DWC_INTMR_NEWFPM 0x00000002 +#define SATA_DWC_INTMR_PMABRTM 0x00000004 +#define SATA_DWC_INTMR_ERRM 0x00000008 +#define SATA_DWC_INTMR_NEWBISTM 0x00000010 + +#define SATA_DWC_DMACR_TMOD_TXCHEN 0x00000004 +#define SATA_DWC_DMACR_TXRXCH_CLEAR SATA_DWC_DMACR_TMOD_TXCHEN + +#define SATA_DWC_QCMD_MAX 32 + +#define SATA_DWC_SERROR_ERR_BITS 0x0FFF0F03 + +#define HSDEVP_FROM_AP(ap) (struct sata_dwc_device_port*) \ + (ap)->private_data + +struct sata_dwc_device { + struct device *dev; + struct ata_probe_ent *pe; + struct ata_host *host; + u8 *reg_base; + struct sata_dwc_regs *sata_dwc_regs; + int irq_dma; +}; + +struct sata_dwc_device_port { + struct sata_dwc_device *hsdev; + int cmd_issued[SATA_DWC_QCMD_MAX]; + u32 dma_chan[SATA_DWC_QCMD_MAX]; + int dma_pending[SATA_DWC_QCMD_MAX]; +}; + +enum { + SATA_DWC_CMD_ISSUED_NOT = 0, + SATA_DWC_CMD_ISSUED_PEND = 1, + SATA_DWC_CMD_ISSUED_EXEC = 2, + SATA_DWC_CMD_ISSUED_NODATA = 3, + + SATA_DWC_DMA_PENDING_NONE = 0, + SATA_DWC_DMA_PENDING_TX = 1, + SATA_DWC_DMA_PENDING_RX = 2, +}; + +#define msleep(a) udelay(a * 1000) +#define ssleep(a) msleep(a * 1000) + +static int ata_probe_timeout = (ATA_TMOUT_INTERNAL / 100); + +enum sata_dev_state { + SATA_INIT = 0, + SATA_READY = 1, + SATA_NODEVICE = 2, + SATA_ERROR = 3, +}; +enum sata_dev_state dev_state = SATA_INIT; + +static struct ahb_dma_regs *sata_dma_regs = 0; +static struct ata_host *phost; +static struct ata_port ap; +static struct ata_port *pap = ≈ +static struct ata_device ata_device; +static struct sata_dwc_device_port dwc_devp; + +static void *scr_addr_sstatus; +static u32 temp_n_block = 0; + +static unsigned ata_exec_internal(struct ata_device *dev, + struct ata_taskfile *tf, const u8 *cdb, + int dma_dir, unsigned int buflen, + unsigned long timeout); +static unsigned int ata_dev_set_feature(struct ata_device *dev, + u8 enable,u8 feature); +static unsigned int ata_dev_init_params(struct ata_device *dev, + u16 heads, u16 sectors); +static u8 ata_irq_on(struct ata_port *ap); +static struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap, + unsigned int tag); +static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, + u8 status, int in_wq); +static void ata_tf_to_host(struct ata_port *ap, + const struct ata_taskfile *tf); +static void ata_exec_command(struct ata_port *ap, + const struct ata_taskfile *tf); +static unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); +static u8 ata_check_altstatus(struct ata_port *ap); +static u8 ata_check_status(struct ata_port *ap); +static void ata_dev_select(struct ata_port *ap, unsigned int device, + unsigned int wait, unsigned int can_sleep); +static void ata_qc_issue(struct ata_queued_cmd *qc); +static void ata_tf_load(struct ata_port *ap, + const struct ata_taskfile *tf); +static int ata_dev_read_sectors(unsigned char* pdata, + unsigned long datalen, u32 block, u32 n_block); +static int ata_dev_write_sectors(unsigned char* pdata, + unsigned long datalen , u32 block, u32 n_block); +static void ata_std_dev_select(struct ata_port *ap, unsigned int device); +static void ata_qc_complete(struct ata_queued_cmd *qc); +static void __ata_qc_complete(struct ata_queued_cmd *qc); +static void fill_result_tf(struct ata_queued_cmd *qc); +static void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); +static void ata_mmio_data_xfer(struct ata_device *dev, + unsigned char *buf, + unsigned int buflen,int do_write); +static void ata_pio_task(struct ata_port *arg_ap); +static void __ata_port_freeze(struct ata_port *ap); +static int ata_port_freeze(struct ata_port *ap); +static void ata_qc_free(struct ata_queued_cmd *qc); +static void ata_pio_sectors(struct ata_queued_cmd *qc); +static void ata_pio_sector(struct ata_queued_cmd *qc); +static void ata_pio_queue_task(struct ata_port *ap, + void *data,unsigned long delay); +static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq); +static int sata_dwc_softreset(struct ata_port *ap); +static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, + unsigned int flags, u16 *id); +static int check_sata_dev_state(void); + +extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; + +static const struct ata_port_info sata_dwc_port_info[] = { + { + .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | + ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING | + ATA_FLAG_SRST | ATA_FLAG_NCQ, + .pio_mask = 0x1f, + .mwdma_mask = 0x07, + .udma_mask = 0x7f, + }, +}; + +int init_sata (int dev) +{ + struct sata_dwc_device hsdev; + struct ata_host host; + struct ata_port_info pi = sata_dwc_port_info[0]; + struct ata_link *link; + struct sata_dwc_device_port hsdevp = dwc_devp; + u8 *base = 0; + u8 *sata_dma_regs_addr = 0; + u8 status; + unsigned long base_addr = 0; + int chan = 0; + int rc; + int i; + + phost = &host; + + base = (u8*)SATA_BASE_ADDR; + + hsdev.sata_dwc_regs = (void *__iomem)(base + SATA_DWC_REG_OFFSET); + + host.n_ports = SATA_DWC_MAX_PORTS; + + for (i = 0; i < SATA_DWC_MAX_PORTS; i++) { + ap.pflags |= ATA_PFLAG_INITIALIZING; + ap.flags = ATA_FLAG_DISABLED; + ap.print_id = -1; + ap.ctl = ATA_DEVCTL_OBS; + ap.host = &host; + ap.last_ctl = 0xFF; + + link = &ap.link; + link->ap = ≈ + link->pmp = 0; + link->active_tag = ATA_TAG_POISON; + link->hw_sata_spd_limit = 0; + + ap.port_no = i; + host.ports[i] = ≈ + } + + ap.pio_mask = pi.pio_mask; + ap.mwdma_mask = pi.mwdma_mask; + ap.udma_mask = pi.udma_mask; + ap.flags |= pi.flags; + ap.link.flags |= pi.link_flags; + + host.ports[0]->ioaddr.cmd_addr = base; + host.ports[0]->ioaddr.scr_addr = base + SATA_DWC_SCR_OFFSET; + scr_addr_sstatus = base + SATA_DWC_SCR_OFFSET; + + base_addr = (unsigned long)base; + + host.ports[0]->ioaddr.cmd_addr = (void *)base_addr + 0x00; + host.ports[0]->ioaddr.data_addr = (void *)base_addr + 0x00; + + host.ports[0]->ioaddr.error_addr = (void *)base_addr + 0x04; + host.ports[0]->ioaddr.feature_addr = (void *)base_addr + 0x04; + + host.ports[0]->ioaddr.nsect_addr = (void *)base_addr + 0x08; + + host.ports[0]->ioaddr.lbal_addr = (void *)base_addr + 0x0c; + host.ports[0]->ioaddr.lbam_addr = (void *)base_addr + 0x10; + host.ports[0]->ioaddr.lbah_addr = (void *)base_addr + 0x14; + + host.ports[0]->ioaddr.device_addr = (void *)base_addr + 0x18; + host.ports[0]->ioaddr.command_addr = (void *)base_addr + 0x1c; + host.ports[0]->ioaddr.status_addr = (void *)base_addr + 0x1c; + + host.ports[0]->ioaddr.altstatus_addr = (void *)base_addr + 0x20; + host.ports[0]->ioaddr.ctl_addr = (void *)base_addr + 0x20; + + sata_dma_regs_addr = (u8*)SATA_DMA_REG_ADDR; + sata_dma_regs = (void *__iomem)sata_dma_regs_addr; + + status = ata_check_altstatus(&ap); + + if (status == 0x7f) { + printf("Hard Disk not found.\n"); + dev_state = SATA_NODEVICE; + rc = FALSE; + return rc; + } + + printf("waitng for device ready."); + i = 0; + while (1) { + udelay (10000); + + status = ata_check_altstatus(&ap); + + if ((status & ATA_BUSY) == 0) { + printf("\n"); + break; + } + + i++; + if (i > (ATA_RESET_TIME * 100)) { + printf("** TimeOUT **\n"); + + dev_state = SATA_NODEVICE; + rc = FALSE; + return rc; + } + if ((i >= 100) && ((i % 100) == 0)) + printf("."); + } + + rc = sata_dwc_softreset(&ap); + + if (rc) { + printf("sata_dwc : error. soft reset failed\n"); + return rc; + } + + for (chan = 0; chan < DMA_NUM_CHANS; chan++) { + out_le32(&(sata_dma_regs->interrupt_mask.error.low), + DMA_DISABLE_CHAN(chan)); + + out_le32(&(sata_dma_regs->interrupt_mask.tfr.low), + DMA_DISABLE_CHAN(chan)); + } + + out_le32(&(sata_dma_regs->dma_cfg.low), DMA_DI); + + out_le32(&hsdev.sata_dwc_regs->intmr, + SATA_DWC_INTMR_ERRM | + SATA_DWC_INTMR_PMABRTM); + + /* Unmask the error bits that should trigger + * an error interrupt by setting the error mask register. + */ + out_le32(&hsdev.sata_dwc_regs->errmr,SATA_DWC_SERROR_ERR_BITS); + + hsdev.host = ap.host; + memset(&hsdevp, 0, sizeof(hsdevp)); + hsdevp.hsdev = &hsdev; + + for (i = 0; i < SATA_DWC_QCMD_MAX; i++) + hsdevp.cmd_issued[i] = SATA_DWC_CMD_ISSUED_NOT; + + out_le32((void __iomem *)scr_addr_sstatus + 4, + in_le32((void __iomem *)scr_addr_sstatus + 4)); + + rc = 0; + return rc; +} + +static u8 ata_check_altstatus(struct ata_port *ap) +{ + u8 val = 0; + val = readb(ap->ioaddr.altstatus_addr); + return val; +} + +static int sata_dwc_softreset(struct ata_port *ap) +{ + u8 nsect,lbal = 0; + u8 tmp = 0; + u32 serror = 0; + u8 status = 0; + struct ata_ioports *ioaddr = &ap->ioaddr; + + serror = in_le32((void *)ap->ioaddr.scr_addr + (SCR_ERROR * 4)); + + writeb(0x55, ioaddr->nsect_addr); + writeb(0xaa, ioaddr->lbal_addr); + writeb(0xaa, ioaddr->nsect_addr); + writeb(0x55, ioaddr->lbal_addr); + writeb(0x55, ioaddr->nsect_addr); + writeb(0xaa, ioaddr->lbal_addr); + + nsect = readb(ioaddr->nsect_addr); + lbal = readb(ioaddr->lbal_addr); + + if ((nsect == 0x55) && (lbal == 0xaa)) { + printf("we found a device\n"); + } else { + printf("Not found a device.\n"); + dev_state = SATA_NODEVICE; + return FALSE; + } + + tmp = ATA_DEVICE_OBS; + writeb(tmp,ioaddr->device_addr); + writeb(ap->ctl,ioaddr->ctl_addr); + + udelay(200); + + writeb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); + + udelay(200); + writeb(ap->ctl,ioaddr->ctl_addr); + + msleep(150); + status = ata_check_status(ap); + + msleep(50); + ata_check_status(ap); + + while (1) { + u8 status = ata_check_status(ap); + + if (!(status & ATA_BUSY)) + break; + + printf("Hard Disk status is BUSY.\n"); + msleep(50); + } + + tmp = ATA_DEVICE_OBS; + writeb(tmp,ioaddr->device_addr); + + nsect = readb(ioaddr->nsect_addr); + lbal = readb(ioaddr->lbal_addr); + + return 0; +} + +static u8 ata_check_status(struct ata_port *ap) +{ + u8 val = 0; + val = readb(ap->ioaddr.status_addr); + return val; +} + +static int ata_id_has_hipm(const u16 *id) +{ + u16 val = id[76]; + + if (val == 0 || val == 0xffff) + return -1; + + return val & (1 << 9); +} + +static int ata_id_has_dipm(const u16 *id) +{ + u16 val = id[78]; + + if (val == 0 || val == 0xffff) + return -1; + + return val & (1 << 3); +} + +int scan_sata (int dev) +{ + int i; + int rc; + u8 status; + const u16 *id; + struct ata_device *ata_dev = &ata_device; + unsigned long pio_mask, mwdma_mask, udma_mask; + unsigned long xfer_mask; + char revbuf[7]; + u16 iobuf[ATA_SECTOR_WORDS]; + + memset ( iobuf, 0, sizeof(iobuf)); + + if (dev_state == SATA_NODEVICE) + return 1; + + printf("waitng for device ready."); + i = 0; + while (1) { + udelay (10000); + + status = ata_check_altstatus(&ap); + + if ((status & ATA_BUSY) == 0) { + printf("\n"); + break; + } + + i++; + if (i > (ATA_RESET_TIME * 100)) { + printf("** TimeOUT **\n"); + + dev_state = SATA_NODEVICE; + return 1; + } + if ((i >= 100) && ((i % 100) == 0)) + printf("."); + } + + udelay (1000); + + rc = ata_dev_read_id(ata_dev, &ata_dev->class, + ATA_READID_POSTRESET,ata_dev->id); + if (rc) { + printf("sata_dwc : error. failed sata scan\n"); + return 1; + } + + /* SATA drives indicate we have a bridge. We don't know which + * end of the link the bridge is which is a problem + */ + if (ata_id_is_sata(ata_dev->id)) + ap.cbl = ATA_CBL_SATA; + + id = ata_dev->id; + + ata_dev->flags &= ~ATA_DFLAG_CFG_MASK; + ata_dev->max_sectors = 0; + ata_dev->cdb_len = 0; + ata_dev->n_sectors = 0; + ata_dev->cylinders = 0; + ata_dev->heads = 0; + ata_dev->sectors = 0; + + if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { + pio_mask = id[ATA_ID_PIO_MODES] & 0x03; + pio_mask <<= 3; + pio_mask |= 0x7; + } else { + /* If word 64 isn't valid then Word 51 high byte holds + * the PIO timing number for the maximum. Turn it into + * a mask. + */ + u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; + if (mode < 5) { + pio_mask = (2 << mode) - 1; + } else { + pio_mask = 1; + } + } + + mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; + + if (ata_id_is_cfa(id)) { + int pio = id[163] & 0x7; + int dma = (id[163] >> 3) & 7; + + if (pio) + pio_mask |= (1 << 5); + if (pio > 1) + pio_mask |= (1 << 6); + if (dma) + mwdma_mask |= (1 << 3); + if (dma > 1) + mwdma_mask |= (1 << 4); + } + + udma_mask = 0; + if (id[ATA_ID_FIELD_VALID] & (1 << 2)) + udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; + + xfer_mask = ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | + ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | + ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); + + if (ata_dev->class == ATA_DEV_ATA) { + if (ata_id_is_cfa(id)) { + if (id[162] & 1) + printf("supports DRM functions and may " + "not be fully accessable.\n"); + sprintf(revbuf, "%s", "CFA"); + } else { + if (ata_id_has_tpm(id)) + printf("supports DRM functions and may " + "not be fully accessable.\n"); + } + + ata_dev->n_sectors = ata_id_n_sectors((u16*)id); + + if (ata_dev->id[59] & 0x100) + ata_dev->multi_count = ata_dev->id[59] & 0xff; + + if (ata_id_has_lba(id)) { + const char *lba_desc; + char ncq_desc[20]; + + lba_desc = "LBA"; + ata_dev->flags |= ATA_DFLAG_LBA; + if (ata_id_has_lba48(id)) { + ata_dev->flags |= ATA_DFLAG_LBA48; + lba_desc = "LBA48"; + + if (ata_dev->n_sectors >= (1UL << 28) && + ata_id_has_flush_ext(id)) + ata_dev->flags |= ATA_DFLAG_FLUSH_EXT; + } + if (!ata_id_has_ncq(ata_dev->id)) + ncq_desc[0] = '\0'; + + if (ata_dev->horkage & ATA_HORKAGE_NONCQ) + sprintf(ncq_desc, "%s", "NCQ (not used)"); + + if (ap.flags & ATA_FLAG_NCQ) + ata_dev->flags |= ATA_DFLAG_NCQ; + } + ata_dev->cdb_len = 16; + } + ata_dev->max_sectors = ATA_MAX_SECTORS; + if (ata_dev->flags & ATA_DFLAG_LBA48) + ata_dev->max_sectors = ATA_MAX_SECTORS_LBA48; + + if (!(ata_dev->horkage & ATA_HORKAGE_IPM)) { + if (ata_id_has_hipm(ata_dev->id)) + ata_dev->flags |= ATA_DFLAG_HIPM; + if (ata_id_has_dipm(ata_dev->id)) + ata_dev->flags |= ATA_DFLAG_DIPM; + } + + if ((ap.cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ata_dev->id))) { + ata_dev->udma_mask &= ATA_UDMA5; + ata_dev->max_sectors = ATA_MAX_SECTORS; + } + + if (ata_dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { + printf("Drive reports diagnostics failure." + "This may indicate a drive\n"); + printf("fault or invalid emulation." + "Contact drive vendor for information.\n"); + } + + rc = check_sata_dev_state(); + + ata_id_c_string (ata_dev->id, + (unsigned char *)sata_dev_desc[dev].revision, + ATA_ID_FW_REV, sizeof(sata_dev_desc[dev].revision)); + ata_id_c_string (ata_dev->id, + (unsigned char *)sata_dev_desc[dev].vendor, + ATA_ID_PROD, sizeof(sata_dev_desc[dev].vendor)); + ata_id_c_string (ata_dev->id, + (unsigned char *)sata_dev_desc[dev].product, + ATA_ID_SERNO, sizeof(sata_dev_desc[dev].product)); + + sata_dev_desc[dev].lba = (u32) ata_dev->n_sectors; + +#ifdef CONFIG_LBA48 + if (ata_dev->id[83] & (1 << 10)) { + sata_dev_desc[dev].lba48 = 1; + } else { + sata_dev_desc[dev].lba48 = 0; + } +#endif + + return 0; +} + +static u8 ata_busy_wait(struct ata_port *ap, + unsigned int bits,unsigned int max) +{ + u8 status; + + do { + udelay(10); + status = ata_check_status(ap); + max--; + } while (status != 0xff && (status & bits) && (max > 0)); + + return status; +} + +static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, + unsigned int flags, u16 *id) +{ + struct ata_port *ap = pap; + unsigned int class = *p_class; + struct ata_taskfile tf; + unsigned int err_mask = 0; + const char *reason; + int may_fallback = 1, tried_spinup = 0; + u8 status; + int rc; + + status = ata_busy_wait(ap, ATA_BUSY, 30000); + if (status & ATA_BUSY) { + printf("BSY = 0 check. timeout.\n"); + rc = FALSE; + return rc; + } + + ata_dev_select(ap, dev->devno, 1, 1); + +retry: + memset(&tf, 0, sizeof(tf)); + ap->print_id = 1; + ap->flags &= ~ATA_FLAG_DISABLED; + tf.ctl = ap->ctl; + tf.device = ATA_DEVICE_OBS; + tf.command = ATA_CMD_ID_ATA; + tf.protocol = ATA_PROT_PIO; + + /* Some devices choke if TF registers contain garbage. Make + * sure those are properly initialized. + */ + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + + /* Device presence detection is unreliable on some + * controllers. Always poll IDENTIFY if available. + */ + tf.flags |= ATA_TFLAG_POLLING; + + temp_n_block = 1; + + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, + sizeof(id[0]) * ATA_ID_WORDS, 0); + + if (err_mask) { + if (err_mask & AC_ERR_NODEV_HINT) { + printf("NODEV after polling detection\n"); + return -ENOENT; + } + + if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { + /* Device or controller might have reported + * the wrong device class. Give a shot at the + * other IDENTIFY if the current one is + * aborted by the device. + */ + if (may_fallback) { + may_fallback = 0; + + if (class == ATA_DEV_ATA) { + class = ATA_DEV_ATAPI; + } else { + class = ATA_DEV_ATA; + } + goto retry; + } + /* Control reaches here iff the device aborted + * both flavors of IDENTIFYs which happens + * sometimes with phantom devices. + */ + printf("both IDENTIFYs aborted, assuming NODEV\n"); + return -ENOENT; + } + rc = -EIO; + reason = "I/O error"; + goto err_out; + } + + /* Falling back doesn't make sense if ID data was read + * successfully at least once. + */ + may_fallback = 0; + + unsigned int id_cnt; + + for (id_cnt = 0; id_cnt < ATA_ID_WORDS; id_cnt++) + id[id_cnt] = le16_to_cpu(id[id_cnt]); + + + rc = -EINVAL; + reason = "device reports invalid type"; + + if (class == ATA_DEV_ATA) { + if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) + goto err_out; + } else { + if (ata_id_is_ata(id)) + goto err_out; + } + if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { + tried_spinup = 1; + /* + * Drive powered-up in standby mode, and requires a specific + * SET_FEATURES spin-up subcommand before it will accept + * anything other than the original IDENTIFY command. + */ + err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); + if (err_mask && id[2] != 0x738c) { + rc = -EIO; + reason = "SPINUP failed"; + goto err_out; + } + /* + * If the drive initially returned incomplete IDENTIFY info, + * we now must reissue the IDENTIFY command. + */ + if (id[2] == 0x37c8) + goto retry; + } + + if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { + /* + * The exact sequence expected by certain pre-ATA4 drives is: + * SRST RESET + * IDENTIFY (optional in early ATA) + * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) + * anything else.. + * Some drives were very specific about that exact sequence. + * + * Note that ATA4 says lba is mandatory so the second check + * shoud never trigger. + */ + if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { + err_mask = ata_dev_init_params(dev, id[3], id[6]); + if (err_mask) { + rc = -EIO; + reason = "INIT_DEV_PARAMS failed"; + goto err_out; + } + + /* current CHS translation info (id[53-58]) might be + * changed. reread the identify device info. + */ + flags &= ~ATA_READID_POSTRESET; + goto retry; + } + } + + *p_class = class; + return 0; + +err_out: + return rc; +} + +static u8 ata_wait_idle(struct ata_port *ap) +{ + u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); + return status; +} + +static void ata_dev_select(struct ata_port *ap, unsigned int device, + unsigned int wait, unsigned int can_sleep) +{ + if (wait) + ata_wait_idle(ap); + + ata_std_dev_select(ap, device); + + if (wait) + ata_wait_idle(ap); +} + +static void ata_std_dev_select(struct ata_port *ap, unsigned int device) +{ + u8 tmp; + + if (device == 0) { + tmp = ATA_DEVICE_OBS; + } else { + tmp = ATA_DEVICE_OBS | ATA_DEV1; + } + + writeb(tmp, ap->ioaddr.device_addr); + + readb(ap->ioaddr.altstatus_addr); + + udelay(1); +} + +static int waiting_for_reg_state(volatile u8 *offset, + int timeout_msec, + u32 sign) +{ + int i; + u32 status; + + for (i = 0; i < timeout_msec; i++) { + status = readl(offset); + if ((status & sign) != 0) + break; + msleep(1); + } + + return (i < timeout_msec) ? 0 : -1; +} + +static void ata_qc_reinit(struct ata_queued_cmd *qc) +{ + qc->dma_dir = DMA_NONE; + qc->flags = 0; + qc->nbytes = qc->extrabytes = qc->curbytes = 0; + qc->n_elem = 0; + qc->err_mask = 0; + qc->sect_size = ATA_SECT_SIZE; + qc->nbytes = ATA_SECT_SIZE * temp_n_block; + + memset(&qc->tf, 0, sizeof(qc->tf)); + qc->tf.ctl = 0; + qc->tf.device = ATA_DEVICE_OBS; + + qc->result_tf.command = ATA_DRDY; + qc->result_tf.feature = 0; +} + +struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap, + unsigned int tag) +{ + if (tag < ATA_MAX_QUEUE) + return &ap->qcmd[tag]; + return NULL; +} + +static void __ata_port_freeze(struct ata_port *ap) +{ + printf("set port freeze.\n"); + ap->pflags |= ATA_PFLAG_FROZEN; +} + +static int ata_port_freeze(struct ata_port *ap) +{ + __ata_port_freeze(ap); + return 0; +} + +unsigned ata_exec_internal(struct ata_device *dev, + struct ata_taskfile *tf, const u8 *cdb, + int dma_dir, unsigned int buflen, + unsigned long timeout) +{ + struct ata_link *link = dev->link; + struct ata_port *ap = pap; + struct ata_queued_cmd *qc; + unsigned int tag, preempted_tag; + u32 preempted_sactive, preempted_qc_active; + int preempted_nr_active_links; + unsigned int err_mask; + int rc = 0; + u8 status; + + status = ata_busy_wait(ap, ATA_BUSY, 300000); + if (status & ATA_BUSY) { + printf("BSY = 0 check. timeout.\n"); + rc = FALSE; + return rc; + } + + if (ap->pflags & ATA_PFLAG_FROZEN) + return AC_ERR_SYSTEM; + + tag = ATA_TAG_INTERNAL; + + if (test_and_set_bit(tag, &ap->qc_allocated)) { + rc = FALSE; + return rc; + } + + qc = __ata_qc_from_tag(ap, tag); + qc->tag = tag; + qc->ap = ap; + qc->dev = dev; + + ata_qc_reinit(qc); + + preempted_tag = link->active_tag; + preempted_sactive = link->sactive; + preempted_qc_active = ap->qc_active; + preempted_nr_active_links = ap->nr_active_links; + link->active_tag = ATA_TAG_POISON; + link->sactive = 0; + ap->qc_active = 0; + ap->nr_active_links = 0; + + qc->tf = *tf; + if (cdb) + memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); + qc->flags |= ATA_QCFLAG_RESULT_TF; + qc->dma_dir = dma_dir; + qc->private_data = 0; + + ata_qc_issue(qc); + + if (!timeout) + timeout = ata_probe_timeout * 1000 / HZ; + + status = ata_busy_wait(ap, ATA_BUSY, 30000); + if (status & ATA_BUSY) { + printf("BSY = 0 check. timeout.\n"); + printf("altstatus = 0x%x.\n",status); + qc->err_mask |= AC_ERR_OTHER; + return qc->err_mask; + } + + if (waiting_for_reg_state(ap->ioaddr.altstatus_addr,1000,0x8)) { + u8 status = 0; + u8 errorStatus = 0; + + status = readb( ap->ioaddr.altstatus_addr); + if ((status & 0x01) != 0) { + errorStatus = readb( ap->ioaddr.feature_addr); + if (errorStatus == 0x04 && + qc->tf.command == ATA_CMD_PIO_READ_EXT){ + printf("Hard Disk doesn't support LBA48\n"); + dev_state = SATA_ERROR; + qc->err_mask |= AC_ERR_OTHER; + return qc->err_mask; + } + } + qc->err_mask |= AC_ERR_OTHER; + return qc->err_mask; + } + + status = ata_busy_wait(ap, ATA_BUSY, 10); + if (status & ATA_BUSY) { + printf("BSY = 0 check. timeout.\n"); + qc->err_mask |= AC_ERR_OTHER; + return qc->err_mask; + } + + ata_pio_task(ap); + + if (!rc) { + if (qc->flags & ATA_QCFLAG_ACTIVE) { + qc->err_mask |= AC_ERR_TIMEOUT; + ata_port_freeze(ap); + } + } + + if (qc->flags & ATA_QCFLAG_FAILED) { + if (qc->result_tf.command & (ATA_ERR | ATA_DF)) + qc->err_mask |= AC_ERR_DEV; + + if (!qc->err_mask) + qc->err_mask |= AC_ERR_OTHER; + + if (qc->err_mask & ~AC_ERR_OTHER) + qc->err_mask &= ~AC_ERR_OTHER; + } + + *tf = qc->result_tf; + err_mask = qc->err_mask; + ata_qc_free(qc); + link->active_tag = preempted_tag; + link->sactive = preempted_sactive; + ap->qc_active = preempted_qc_active; + ap->nr_active_links = preempted_nr_active_links; + + if (ap->flags & ATA_FLAG_DISABLED) { + err_mask |= AC_ERR_SYSTEM; + ap->flags &= ~ATA_FLAG_DISABLED; + } + + return err_mask; +} + +static void ata_qc_issue(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct ata_link *link = qc->dev->link; + u8 prot = qc->tf.protocol; + + if (ata_is_ncq(prot)) { + if (!link->sactive) + ap->nr_active_links++; + link->sactive |= 1 << qc->tag; + } else { + ap->nr_active_links++; + link->active_tag = qc->tag; + } + + qc->flags |= ATA_QCFLAG_ACTIVE; + ap->qc_active |= 1 << qc->tag; + + if (qc->dev->flags & ATA_DFLAG_SLEEPING) { + msleep(1); + return; + } + + qc->err_mask |= ata_qc_issue_prot(qc); + if (qc->err_mask) + goto err; + + return; +err: + ata_qc_complete(qc); +} + +static unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + + if (ap->flags & ATA_FLAG_PIO_POLLING) { + switch (qc->tf.protocol) { + case ATA_PROT_PIO: + case ATA_PROT_NODATA: + case ATAPI_PROT_PIO: + case ATAPI_PROT_NODATA: + qc->tf.flags |= ATA_TFLAG_POLLING; + break; + default: + break; + } + } + + ata_dev_select(ap, qc->dev->devno, 1, 0); + + switch (qc->tf.protocol) { + case ATA_PROT_PIO: + if (qc->tf.flags & ATA_TFLAG_POLLING) + qc->tf.ctl |= ATA_NIEN; + + ata_tf_to_host(ap, &qc->tf); + + ap->hsm_task_state = HSM_ST; + + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_pio_queue_task(ap, qc, 0); + + break; + + default: + return AC_ERR_SYSTEM; + } + + return 0; +} + +static void ata_tf_to_host(struct ata_port *ap, + const struct ata_taskfile *tf) +{ + ata_tf_load(ap, tf); + ata_exec_command(ap, tf); +} + +static void ata_tf_load(struct ata_port *ap, + const struct ata_taskfile *tf) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; + + if (tf->ctl != ap->last_ctl) { + if (ioaddr->ctl_addr) + writeb(tf->ctl, ioaddr->ctl_addr); + ap->last_ctl = tf->ctl; + ata_wait_idle(ap); + } + + if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { + writeb(tf->hob_feature, ioaddr->feature_addr); + writeb(tf->hob_nsect, ioaddr->nsect_addr); + writeb(tf->hob_lbal, ioaddr->lbal_addr); + writeb(tf->hob_lbam, ioaddr->lbam_addr); + writeb(tf->hob_lbah, ioaddr->lbah_addr); + } + + if (is_addr) { + writeb(tf->feature, ioaddr->feature_addr); + writeb(tf->nsect, ioaddr->nsect_addr); + writeb(tf->lbal, ioaddr->lbal_addr); + writeb(tf->lbam, ioaddr->lbam_addr); + writeb(tf->lbah, ioaddr->lbah_addr); + } + + if (tf->flags & ATA_TFLAG_DEVICE) + writeb(tf->device, ioaddr->device_addr); + + ata_wait_idle(ap); +} + +static void ata_exec_command(struct ata_port *ap, + const struct ata_taskfile *tf) +{ + writeb(tf->command, ap->ioaddr.command_addr); + + readb(ap->ioaddr.altstatus_addr); + + udelay(1); +} + +static void ata_pio_queue_task(struct ata_port *ap, + void *data,unsigned long delay) +{ + ap->port_task_data = data; +} + +static unsigned int ac_err_mask(u8 status) +{ + if (status & (ATA_BUSY | ATA_DRQ)) + return AC_ERR_HSM; + if (status & (ATA_ERR | ATA_DF)) + return AC_ERR_DEV; + return 0; +} + +static unsigned int __ac_err_mask(u8 status) +{ + unsigned int mask = ac_err_mask(status); + if (mask == 0) + return AC_ERR_OTHER; + return mask; +} + +static void ata_pio_task(struct ata_port *arg_ap) +{ + struct ata_port *ap = arg_ap; + struct ata_queued_cmd *qc = ap->port_task_data; + u8 status; + int poll_next; + +fsm_start: + /* + * This is purely heuristic. This is a fast path. + * Sometimes when we enter, BSY will be cleared in + * a chk-status or two. If not, the drive is probably seeking + * or something. Snooze for a couple msecs, then + * chk-status again. If still busy, queue delayed work. + */ + status = ata_busy_wait(ap, ATA_BUSY, 5); + if (status & ATA_BUSY) { + msleep(2); + status = ata_busy_wait(ap, ATA_BUSY, 10); + if (status & ATA_BUSY) { + ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE); + return; + } + } + + poll_next = ata_hsm_move(ap, qc, status, 1); + + /* another command or interrupt handler + * may be running at this point. + */ + if (poll_next) + goto fsm_start; +} + +static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, + u8 status, int in_wq) +{ + int poll_next; + +fsm_start: + switch (ap->hsm_task_state) { + case HSM_ST_FIRST: + poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); + + if ((status & ATA_DRQ) == 0) { + if (status & (ATA_ERR | ATA_DF)) { + qc->err_mask |= AC_ERR_DEV; + } else { + qc->err_mask |= AC_ERR_HSM; + } + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + /* Device should not ask for data transfer (DRQ=1) + * when it finds something wrong. + * We ignore DRQ here and stop the HSM by + * changing hsm_task_state to HSM_ST_ERR and + * let the EH abort the command or reset the device. + */ + if (status & (ATA_ERR | ATA_DF)) { + if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { + printf("DRQ=1 with device error, " + "dev_stat 0x%X\n", status); + qc->err_mask |= AC_ERR_HSM; + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + } + + if (qc->tf.protocol == ATA_PROT_PIO) { + /* PIO data out protocol. + * send first data block. + */ + /* ata_pio_sectors() might change the state + * to HSM_ST_LAST. so, the state is changed here + * before ata_pio_sectors(). + */ + ap->hsm_task_state = HSM_ST; + ata_pio_sectors(qc); + } else { + printf("protocol is not ATA_PROT_PIO \n"); + } + break; + + case HSM_ST: + if ((status & ATA_DRQ) == 0) { + if (status & (ATA_ERR | ATA_DF)) { + qc->err_mask |= AC_ERR_DEV; + } else { + /* HSM violation. Let EH handle this. + * Phantom devices also trigger this + * condition. Mark hint. + */ + qc->err_mask |= AC_ERR_HSM | AC_ERR_NODEV_HINT; + } + + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + /* For PIO reads, some devices may ask for + * data transfer (DRQ=1) alone with ERR=1. + * We respect DRQ here and transfer one + * block of junk data before changing the + * hsm_task_state to HSM_ST_ERR. + * + * For PIO writes, ERR=1 DRQ=1 doesn't make + * sense since the data block has been + * transferred to the device. + */ + if (status & (ATA_ERR | ATA_DF)) { + qc->err_mask |= AC_ERR_DEV; + + if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { + ata_pio_sectors(qc); + status = ata_wait_idle(ap); + } + + if (status & (ATA_BUSY | ATA_DRQ)) + qc->err_mask |= AC_ERR_HSM; + + /* ata_pio_sectors() might change the + * state to HSM_ST_LAST. so, the state + * is changed after ata_pio_sectors(). + */ + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + ata_pio_sectors(qc); + if (ap->hsm_task_state == HSM_ST_LAST && + (!(qc->tf.flags & ATA_TFLAG_WRITE))) { + status = ata_wait_idle(ap); + goto fsm_start; + } + + poll_next = 1; + break; + + case HSM_ST_LAST: + if (!ata_ok(status)) { + qc->err_mask |= __ac_err_mask(status); + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + ap->hsm_task_state = HSM_ST_IDLE; + + ata_hsm_qc_complete(qc, in_wq); + + poll_next = 0; + break; + + case HSM_ST_ERR: + /* make sure qc->err_mask is available to + * know what's wrong and recover + */ + ap->hsm_task_state = HSM_ST_IDLE; + + ata_hsm_qc_complete(qc, in_wq); + + poll_next = 0; + break; + default: + poll_next = 0; + } + + return poll_next; +} + +static void ata_pio_sectors(struct ata_queued_cmd *qc) +{ + struct ata_port *ap; + ap = pap; + qc->pdata = ap->pdata; + + ata_pio_sector(qc); + + readb(qc->ap->ioaddr.altstatus_addr); + udelay(1); +} + +static void ata_pio_sector(struct ata_queued_cmd *qc) +{ + int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); + struct ata_port *ap = qc->ap; + unsigned int offset; + unsigned char *buf; + char temp_data_buf[512]; + + if (qc->curbytes == qc->nbytes - qc->sect_size) + ap->hsm_task_state = HSM_ST_LAST; + + offset = qc->curbytes; + + switch (qc->tf.command) { + case ATA_CMD_ID_ATA: + buf = (unsigned char *)&ata_device.id[0]; + break; + case ATA_CMD_PIO_READ_EXT: + case ATA_CMD_PIO_READ: + case ATA_CMD_PIO_WRITE_EXT: + case ATA_CMD_PIO_WRITE: + buf = qc->pdata + offset; + break; + default: + buf = (unsigned char *)&temp_data_buf[0]; + } + + ata_mmio_data_xfer(qc->dev, buf, qc->sect_size, do_write); + + qc->curbytes += qc->sect_size; + +} + +static void ata_mmio_data_xfer(struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int do_write) +{ + struct ata_port *ap = pap; + void __iomem *data_addr = ap->ioaddr.data_addr; + unsigned int words = buflen >> 1; + u16 *buf16 = (u16 *)buf; + unsigned int i = 0; + + udelay(100); + if (do_write) { + for (i = 0; i < words; i++) + writew(le16_to_cpu(buf16[i]), data_addr); + } else { + for (i = 0; i < words; i++) + buf16[i] = cpu_to_le16(readw(data_addr)); + } + + if (buflen & 0x01) { + __le16 align_buf[1] = { 0 }; + unsigned char *trailing_buf = buf + buflen - 1; + + if (do_write) { + memcpy(align_buf, trailing_buf, 1); + writew(le16_to_cpu(align_buf[0]), data_addr); + } else { + align_buf[0] = cpu_to_le16(readw(data_addr)); + memcpy(trailing_buf, align_buf, 1); + } + } +} + +static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) +{ + struct ata_port *ap = qc->ap; + + if (in_wq) { + /* EH might have kicked in while host lock is + * released. + */ + qc = &ap->qcmd[qc->tag]; + if (qc) { + if (!(qc->err_mask & AC_ERR_HSM)) { + ata_irq_on(ap); + ata_qc_complete(qc); + } else { + ata_port_freeze(ap); + } + } + } else { + if (!(qc->err_mask & AC_ERR_HSM)) { + ata_qc_complete(qc); + } else { + ata_port_freeze(ap); + } + } +} + +static u8 ata_irq_on(struct ata_port *ap) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + u8 tmp; + + ap->ctl &= ~ATA_NIEN; + ap->last_ctl = ap->ctl; + + if (ioaddr->ctl_addr) + writeb(ap->ctl, ioaddr->ctl_addr); + + tmp = ata_wait_idle(ap); + + return tmp; +} + +static unsigned int ata_tag_internal(unsigned int tag) +{ + return tag == ATA_MAX_QUEUE - 1; +} + +static void ata_qc_complete(struct ata_queued_cmd *qc) +{ + struct ata_device *dev = qc->dev; + if (qc->err_mask) + qc->flags |= ATA_QCFLAG_FAILED; + + if (qc->flags & ATA_QCFLAG_FAILED) { + if (!ata_tag_internal(qc->tag)) { + fill_result_tf(qc); + return; + } + } + if (qc->flags & ATA_QCFLAG_RESULT_TF) + fill_result_tf(qc); + + /* Some commands need post-processing after successful + * completion. + */ + switch (qc->tf.command) { + case ATA_CMD_SET_FEATURES: + if (qc->tf.feature != SETFEATURES_WC_ON && + qc->tf.feature != SETFEATURES_WC_OFF) + break; + case ATA_CMD_INIT_DEV_PARAMS: + case ATA_CMD_SET_MULTI: + break; + + case ATA_CMD_SLEEP: + dev->flags |= ATA_DFLAG_SLEEPING; + break; + } + + __ata_qc_complete(qc); +} + +static void fill_result_tf(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + + qc->result_tf.flags = qc->tf.flags; + ata_tf_read(ap, &qc->result_tf); +} + +static void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + + tf->command = ata_check_status(ap); + tf->feature = readb(ioaddr->error_addr); + tf->nsect = readb(ioaddr->nsect_addr); + tf->lbal = readb(ioaddr->lbal_addr); + tf->lbam = readb(ioaddr->lbam_addr); + tf->lbah = readb(ioaddr->lbah_addr); + tf->device = readb(ioaddr->device_addr); + + if (tf->flags & ATA_TFLAG_LBA48) { + if (ioaddr->ctl_addr) { + writeb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); + + tf->hob_feature = readb(ioaddr->error_addr); + tf->hob_nsect = readb(ioaddr->nsect_addr); + tf->hob_lbal = readb(ioaddr->lbal_addr); + tf->hob_lbam = readb(ioaddr->lbam_addr); + tf->hob_lbah = readb(ioaddr->lbah_addr); + + writeb(tf->ctl, ioaddr->ctl_addr); + ap->last_ctl = tf->ctl; + } else { + printf("sata_dwc warnning register read.\n"); + } + } +} + +static void __ata_qc_complete(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct ata_link *link = qc->dev->link; + + link->active_tag = ATA_TAG_POISON; + ap->nr_active_links--; + + if (qc->flags & ATA_QCFLAG_CLEAR_EXCL && ap->excl_link == link) + ap->excl_link = NULL; + + qc->flags &= ~ATA_QCFLAG_ACTIVE; + ap->qc_active &= ~(1 << qc->tag); +} + +static void ata_qc_free(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + unsigned int tag; + qc->flags = 0; + tag = qc->tag; + if (tag < ATA_MAX_QUEUE) { + qc->tag = ATA_TAG_POISON; + clear_bit(tag, &ap->qc_allocated); + } +} + +static int check_sata_dev_state(void) +{ + unsigned long datalen; + unsigned char *pdata; + int ret = 0; + int i = 0; + char temp_data_buf[512]; + + while (1) { + udelay (10000); + + pdata = (unsigned char*)&temp_data_buf[0]; + datalen = 512; + + ret = ata_dev_read_sectors(pdata, datalen, 0, 1); + + if (ret == TRUE) + break; + + i++; + if (i > (ATA_RESET_TIME * 100)) { + printf("** TimeOUT **\n"); + dev_state = SATA_NODEVICE; + return FALSE; + } + + if ((i >= 100) && ((i % 100) == 0)) + printf("."); + } + + dev_state = SATA_READY; + + return TRUE; +} + +static unsigned int ata_dev_set_feature(struct ata_device *dev, + u8 enable, u8 feature) +{ + struct ata_taskfile tf; + struct ata_port *ap; + ap = pap; + unsigned int err_mask; + + memset(&tf, 0, sizeof(tf)); + tf.ctl = ap->ctl; + + tf.device = ATA_DEVICE_OBS; + tf.command = ATA_CMD_SET_FEATURES; + tf.feature = enable; + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.protocol = ATA_PROT_NODATA; + tf.nsect = feature; + + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, 0, 0); + + return err_mask; +} + +static unsigned int ata_dev_init_params(struct ata_device *dev, + u16 heads, u16 sectors) +{ + struct ata_taskfile tf; + struct ata_port *ap; + ap = pap; + unsigned int err_mask; + + if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) + return AC_ERR_INVALID; + + memset(&tf, 0, sizeof(tf)); + tf.ctl = ap->ctl; + tf.device = ATA_DEVICE_OBS; + tf.command = ATA_CMD_INIT_DEV_PARAMS; + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.protocol = ATA_PROT_NODATA; + tf.nsect = sectors; + tf.device |= (heads - 1) & 0x0f; + + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, 0, 0); + + if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) + err_mask = 0; + + return err_mask; +} + +#if defined(CONFIG_SATA_DWC) && !defined(CONFIG_LBA48) +#define SATA_MAX_READ_BLK 0xFF +#else +#define SATA_MAX_READ_BLK 0xFFFF +#endif + +ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer) +{ + ulong start,blks, buf_addr; + unsigned short smallblks; + unsigned long datalen; + unsigned char *pdata; + device &= 0xff; + + u32 block = 0; + u32 n_block = 0; + + if (dev_state != SATA_READY) + return 0; + + buf_addr = (unsigned long)buffer; + start = blknr; + blks = blkcnt; + do { + pdata = (unsigned char *)buf_addr; + if (blks > SATA_MAX_READ_BLK) { + datalen = sata_dev_desc[device].blksz * SATA_MAX_READ_BLK; + smallblks = SATA_MAX_READ_BLK; + + block = (u32)start; + n_block = (u32)smallblks; + + start += SATA_MAX_READ_BLK; + blks -= SATA_MAX_READ_BLK; + } else { + datalen = sata_dev_desc[device].blksz * SATA_MAX_READ_BLK; + datalen = sata_dev_desc[device].blksz * blks; + smallblks = (unsigned short)blks; + + block = (u32)start; + n_block = (u32)smallblks; + + start += blks; + blks = 0; + } + + if (ata_dev_read_sectors(pdata, datalen, block, n_block) != TRUE) { + printf("sata_dwc : Hard disk read error.\n"); + blkcnt -= blks; + break; + } + buf_addr += datalen; + } while (blks != 0); + + return (blkcnt); +} + +static int ata_dev_read_sectors(unsigned char *pdata, unsigned long datalen, + u32 block, u32 n_block) +{ + struct ata_port *ap = pap; + struct ata_device *dev = &ata_device; + struct ata_taskfile tf; + unsigned int class = ATA_DEV_ATA; + unsigned int err_mask = 0; + const char *reason; + int may_fallback = 1; + int rc; + + if (dev_state == SATA_ERROR) + return FALSE; + + ata_dev_select(ap, dev->devno, 1, 1); + +retry: + memset(&tf, 0, sizeof(tf)); + tf.ctl = ap->ctl; + ap->print_id = 1; + ap->flags &= ~ATA_FLAG_DISABLED; + + ap->pdata = pdata; + + tf.device = ATA_DEVICE_OBS; + + temp_n_block = n_block; + +#ifdef CONFIG_LBA48 + tf.command = ATA_CMD_PIO_READ_EXT; + tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; + + tf.hob_feature = 31; + tf.feature = 31; + tf.hob_nsect = (n_block >> 8) & 0xff; + tf.nsect = n_block & 0xff; + + tf.hob_lbah = 0x0; + tf.hob_lbam = 0x0; + tf.hob_lbal = (block >> 24) & 0xff; + tf.lbah = (block >> 16) & 0xff; + tf.lbam = (block >> 8) & 0xff; + tf.lbal = block & 0xff; + + tf.device = 1 << 6; + if (tf.flags & ATA_TFLAG_FUA) + tf.device |= 1 << 7; +#else + tf.command = ATA_CMD_PIO_READ; + tf.flags |= ATA_TFLAG_LBA ; + + tf.feature = 31; + tf.nsect = n_block & 0xff; + + tf.lbah = (block >> 16) & 0xff; + tf.lbam = (block >> 8) & 0xff; + tf.lbal = block & 0xff; + + tf.device = (block >> 24) & 0xf; + + tf.device |= 1 << 6; + if (tf.flags & ATA_TFLAG_FUA) + tf.device |= 1 << 7; + +#endif + + tf.protocol = ATA_PROT_PIO; + + /* Some devices choke if TF registers contain garbage. Make + * sure those are properly initialized. + */ + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.flags |= ATA_TFLAG_POLLING; + + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,0, 0); + + if (err_mask) { + if (err_mask & AC_ERR_NODEV_HINT) { + printf("READ_SECTORS NODEV after polling detection\n"); + return -ENOENT; + } + + if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { + /* Device or controller might have reported + * the wrong device class. Give a shot at the + * other IDENTIFY if the current one is + * aborted by the device. + */ + if (may_fallback) { + may_fallback = 0; + + if (class == ATA_DEV_ATA) { + class = ATA_DEV_ATAPI; + } else { + class = ATA_DEV_ATA; + } + goto retry; + } + /* Control reaches here iff the device aborted + * both flavors of IDENTIFYs which happens + * sometimes with phantom devices. + */ + printf("both IDENTIFYs aborted, assuming NODEV\n"); + return -ENOENT; + } + + rc = -EIO; + reason = "I/O error"; + goto err_out; + } + + /* Falling back doesn't make sense if ID data was read + * successfully at least once. + */ + may_fallback = 0; + + rc = -EINVAL; + reason = "device reports invalid type"; + + return TRUE; + +err_out: + printf("failed to READ SECTORS (%s, err_mask=0x%x)\n", reason, err_mask); + return FALSE; +} + +#if defined(CONFIG_SATA_DWC) && !defined(CONFIG_LBA48) +#define SATA_MAX_WRITE_BLK 0xFF +#else +#define SATA_MAX_WRITE_BLK 0xFFFF +#endif + +ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, void *buffer) +{ + ulong start,blks, buf_addr; + unsigned short smallblks; + unsigned long datalen; + unsigned char *pdata; + device &= 0xff; + + + u32 block = 0; + u32 n_block = 0; + + if (dev_state != SATA_READY) + return 0; + + buf_addr = (unsigned long)buffer; + start = blknr; + blks = blkcnt; + do { + pdata = (unsigned char *)buf_addr; + if (blks > SATA_MAX_WRITE_BLK) { + datalen = sata_dev_desc[device].blksz * SATA_MAX_WRITE_BLK; + smallblks = SATA_MAX_WRITE_BLK; + + block = (u32)start; + n_block = (u32)smallblks; + + start += SATA_MAX_WRITE_BLK; + blks -= SATA_MAX_WRITE_BLK; + } else { + datalen = sata_dev_desc[device].blksz * blks; + smallblks = (unsigned short)blks; + + block = (u32)start; + n_block = (u32)smallblks; + + start += blks; + blks = 0; + } + + if (ata_dev_write_sectors(pdata, datalen, block, n_block) != TRUE) { + printf("sata_dwc : Hard disk read error.\n"); + blkcnt -= blks; + break; + } + buf_addr += datalen; + } while (blks != 0); + + return (blkcnt); +} + +static int ata_dev_write_sectors(unsigned char* pdata, unsigned long datalen, + u32 block, u32 n_block) +{ + struct ata_port *ap = pap; + struct ata_device *dev = &ata_device; + struct ata_taskfile tf; + unsigned int class = ATA_DEV_ATA; + unsigned int err_mask = 0; + const char *reason; + int may_fallback = 1; + int rc; + + if (dev_state == SATA_ERROR) + return FALSE; + + ata_dev_select(ap, dev->devno, 1, 1); + +retry: + memset(&tf, 0, sizeof(tf)); + tf.ctl = ap->ctl; + ap->print_id = 1; + ap->flags &= ~ATA_FLAG_DISABLED; + + ap->pdata = pdata; + + tf.device = ATA_DEVICE_OBS; + + temp_n_block = n_block; + + +#ifdef CONFIG_LBA48 + tf.command = ATA_CMD_PIO_WRITE_EXT; + tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48 | ATA_TFLAG_WRITE; + + tf.hob_feature = 31; + tf.feature = 31; + tf.hob_nsect = (n_block >> 8) & 0xff; + tf.nsect = n_block & 0xff; + + tf.hob_lbah = 0x0; + tf.hob_lbam = 0x0; + tf.hob_lbal = (block >> 24) & 0xff; + tf.lbah = (block >> 16) & 0xff; + tf.lbam = (block >> 8) & 0xff; + tf.lbal = block & 0xff; + + tf.device = 1 << 6; + if (tf.flags & ATA_TFLAG_FUA) + tf.device |= 1 << 7; +#else + tf.command = ATA_CMD_PIO_WRITE; + tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_WRITE; + + tf.feature = 31; + tf.nsect = n_block & 0xff; + + tf.lbah = (block >> 16) & 0xff; + tf.lbam = (block >> 8) & 0xff; + tf.lbal = block & 0xff; + + tf.device = (block >> 24) & 0xf; + + tf.device |= 1 << 6; + if (tf.flags & ATA_TFLAG_FUA) + tf.device |= 1 << 7; + +#endif + + tf.protocol = ATA_PROT_PIO; + + /* Some devices choke if TF registers contain garbage. Make + * sure those are properly initialized. + */ + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.flags |= ATA_TFLAG_POLLING; + + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,0, 0); + + if (err_mask) { + if (err_mask & AC_ERR_NODEV_HINT) { + printf("READ_SECTORS NODEV after polling detection\n"); + return -ENOENT; + } + + if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { + /* Device or controller might have reported + * the wrong device class. Give a shot at the + * other IDENTIFY if the current one is + * aborted by the device. + */ + if (may_fallback) { + may_fallback = 0; + + if (class == ATA_DEV_ATA) { + class = ATA_DEV_ATAPI; + } else { + class = ATA_DEV_ATA; + } + goto retry; + } + /* Control reaches here iff the device aborted + * both flavors of IDENTIFYs which happens + * sometimes with phantom devices. + */ + printf("both IDENTIFYs aborted, assuming NODEV\n"); + return -ENOENT; + } + + rc = -EIO; + reason = "I/O error"; + goto err_out; + } + + /* Falling back doesn't make sense if ID data was read + * successfully at least once. + */ + may_fallback = 0; + + rc = -EINVAL; + reason = "device reports invalid type"; + + return TRUE; + +err_out: + printf("failed to WRITE SECTORS (%s, err_mask=0x%x)\n", reason, err_mask); + return FALSE; +} diff -uprN u-boot-0512/drivers/block/sata_dwc.h u-boot-sata/drivers/block/sata_dwc.h --- u-boot-0512/drivers/block/sata_dwc.h 1970-01-01 09:00:00.000000000 +0900 +++ u-boot-sata/drivers/block/sata_dwc.h 2009-05-07 09:37:57.000000000 +0900 @@ -0,0 +1,463 @@ +/* + * sata_dwc.h + * + * Synopsys DesignWare Cores (DWC) SATA host driver + * + * Author: Mark Miesfeld <mmiesfeld(a)amcc.com> + * + * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr(a)denx.de> + * Copyright 2008 DENX Software Engineering + * + * Based on versions provided by AMCC and Synopsys which are: + * Copyright 2006 Applied Micro Circuits Corporation + * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED + * + * This program is free software; you can redistribute + * it and/or modify it under the terms of the GNU + * General Public License as published by the + * Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + */ +/* + * SATA support based on the chip canyonlands. + * + * 04-17-2009 + * The local version of this driver for the canyonlands board + * does not use interrupts but polls the chip instead. + */ + + +#ifndef _SATA_DWC_H_ +#define _SATA_DWC_H_ + +#define HZ 100 + +#define READ 0 +#define WRITE 1 + +enum { + ATA_READID_POSTRESET = (1 << 0), + + ATA_DNXFER_PIO = 0, + ATA_DNXFER_DMA = 1, + ATA_DNXFER_40C = 2, + ATA_DNXFER_FORCE_PIO = 3, + ATA_DNXFER_FORCE_PIO0 = 4, + + ATA_DNXFER_QUIET = (1 << 31), +}; + +enum hsm_task_states { + HSM_ST_IDLE, + HSM_ST_FIRST, + HSM_ST, + HSM_ST_LAST, + HSM_ST_ERR, +}; + +#define ATA_SHORT_PAUSE ((HZ >> 6) + 1) + +struct ata_queued_cmd { + struct ata_port *ap; + struct ata_device *dev; + + struct ata_taskfile tf; + u8 cdb[ATAPI_CDB_LEN]; + + unsigned long flags; + unsigned int tag; + unsigned int n_elem; + + int dma_dir; + + unsigned int sect_size; + + unsigned int nbytes; + unsigned int extrabytes; + unsigned int curbytes; + + unsigned int err_mask; + struct ata_taskfile result_tf; + + void *private_data; + void *lldd_task; + unsigned char *pdata; +}; + +typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); + +#define ATA_TAG_POISON 0xfafbfcfdU + +enum { + LIBATA_MAX_PRD = ATA_MAX_PRD / 2, + LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4, + ATA_MAX_PORTS = 8, + ATA_DEF_QUEUE = 1, + ATA_MAX_QUEUE = 32, + ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1, + ATA_MAX_BUS = 2, + ATA_DEF_BUSY_WAIT = 10000, + + ATAPI_MAX_DRAIN = 16 << 10, + + ATA_SHT_EMULATED = 1, + ATA_SHT_CMD_PER_LUN = 1, + ATA_SHT_THIS_ID = -1, + ATA_SHT_USE_CLUSTERING = 1, + + ATA_DFLAG_LBA = (1 << 0), + ATA_DFLAG_LBA48 = (1 << 1), + ATA_DFLAG_CDB_INTR = (1 << 2), + ATA_DFLAG_NCQ = (1 << 3), + ATA_DFLAG_FLUSH_EXT = (1 << 4), + ATA_DFLAG_ACPI_PENDING = (1 << 5), + ATA_DFLAG_ACPI_FAILED = (1 << 6), + ATA_DFLAG_AN = (1 << 7), + ATA_DFLAG_HIPM = (1 << 8), + ATA_DFLAG_DIPM = (1 << 9), + ATA_DFLAG_DMADIR = (1 << 10), + ATA_DFLAG_CFG_MASK = (1 << 12) - 1, + + ATA_DFLAG_PIO = (1 << 12), + ATA_DFLAG_NCQ_OFF = (1 << 13), + ATA_DFLAG_SPUNDOWN = (1 << 14), + ATA_DFLAG_SLEEPING = (1 << 15), + ATA_DFLAG_DUBIOUS_XFER = (1 << 16), + ATA_DFLAG_INIT_MASK = (1 << 24) - 1, + + ATA_DFLAG_DETACH = (1 << 24), + ATA_DFLAG_DETACHED = (1 << 25), + + ATA_LFLAG_HRST_TO_RESUME = (1 << 0), + ATA_LFLAG_SKIP_D2H_BSY = (1 << 1), + ATA_LFLAG_NO_SRST = (1 << 2), + ATA_LFLAG_ASSUME_ATA = (1 << 3), + ATA_LFLAG_ASSUME_SEMB = (1 << 4), + ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB, + ATA_LFLAG_NO_RETRY = (1 << 5), + ATA_LFLAG_DISABLED = (1 << 6), + + ATA_FLAG_SLAVE_POSS = (1 << 0), + ATA_FLAG_SATA = (1 << 1), + ATA_FLAG_NO_LEGACY = (1 << 2), + ATA_FLAG_MMIO = (1 << 3), + ATA_FLAG_SRST = (1 << 4), + ATA_FLAG_SATA_RESET = (1 << 5), + ATA_FLAG_NO_ATAPI = (1 << 6), + ATA_FLAG_PIO_DMA = (1 << 7), + ATA_FLAG_PIO_LBA48 = (1 << 8), + ATA_FLAG_PIO_POLLING = (1 << 9), + ATA_FLAG_NCQ = (1 << 10), + ATA_FLAG_DEBUGMSG = (1 << 13), + ATA_FLAG_IGN_SIMPLEX = (1 << 15), + ATA_FLAG_NO_IORDY = (1 << 16), + ATA_FLAG_ACPI_SATA = (1 << 17), + ATA_FLAG_AN = (1 << 18), + ATA_FLAG_PMP = (1 << 19), + ATA_FLAG_IPM = (1 << 20), + + ATA_FLAG_DISABLED = (1 << 23), + + ATA_PFLAG_EH_PENDING = (1 << 0), + ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), + ATA_PFLAG_FROZEN = (1 << 2), + ATA_PFLAG_RECOVERED = (1 << 3), + ATA_PFLAG_LOADING = (1 << 4), + ATA_PFLAG_UNLOADING = (1 << 5), + ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), + ATA_PFLAG_INITIALIZING = (1 << 7), + ATA_PFLAG_RESETTING = (1 << 8), + ATA_PFLAG_SUSPENDED = (1 << 17), + ATA_PFLAG_PM_PENDING = (1 << 18), + + ATA_QCFLAG_ACTIVE = (1 << 0), + ATA_QCFLAG_DMAMAP = (1 << 1), + ATA_QCFLAG_IO = (1 << 3), + ATA_QCFLAG_RESULT_TF = (1 << 4), + ATA_QCFLAG_CLEAR_EXCL = (1 << 5), + ATA_QCFLAG_QUIET = (1 << 6), + + ATA_QCFLAG_FAILED = (1 << 16), + ATA_QCFLAG_SENSE_VALID = (1 << 17), + ATA_QCFLAG_EH_SCHEDULED = (1 << 18), + + ATA_HOST_SIMPLEX = (1 << 0), + ATA_HOST_STARTED = (1 << 1), + + ATA_TMOUT_BOOT = 30 * 100, + ATA_TMOUT_BOOT_QUICK = 7 * 100, + ATA_TMOUT_INTERNAL = 30 * 100, + ATA_TMOUT_INTERNAL_QUICK = 5 * 100, + + /* FIXME: GoVault needs 2s but we can't afford that without + * parallel probing. 800ms is enough for iVDR disk + * HHD424020F7SV00. Increase to 2secs when parallel probing + * is in place. + */ + ATA_TMOUT_FF_WAIT = 4 * 100 / 5, + + BUS_UNKNOWN = 0, + BUS_DMA = 1, + BUS_IDLE = 2, + BUS_NOINTR = 3, + BUS_NODATA = 4, + BUS_TIMER = 5, + BUS_PIO = 6, + BUS_EDD = 7, + BUS_IDENTIFY = 8, + BUS_PACKET = 9, + + PORT_UNKNOWN = 0, + PORT_ENABLED = 1, + PORT_DISABLED = 2, + + /* encoding various smaller bitmaps into a single + * unsigned long bitmap + */ + ATA_NR_PIO_MODES = 7, + ATA_NR_MWDMA_MODES = 5, + ATA_NR_UDMA_MODES = 8, + + ATA_SHIFT_PIO = 0, + ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES, + ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES, + + ATA_DMA_PAD_SZ = 4, + + ATA_ERING_SIZE = 32, + + ATA_DEFER_LINK = 1, + ATA_DEFER_PORT = 2, + + ATA_EH_DESC_LEN = 80, + + ATA_EH_REVALIDATE = (1 << 0), + ATA_EH_SOFTRESET = (1 << 1), + ATA_EH_HARDRESET = (1 << 2), + ATA_EH_ENABLE_LINK = (1 << 3), + ATA_EH_LPM = (1 << 4), + + ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET, + ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE, + + ATA_EHI_HOTPLUGGED = (1 << 0), + ATA_EHI_RESUME_LINK = (1 << 1), + ATA_EHI_NO_AUTOPSY = (1 << 2), + ATA_EHI_QUIET = (1 << 3), + + ATA_EHI_DID_SOFTRESET = (1 << 16), + ATA_EHI_DID_HARDRESET = (1 << 17), + ATA_EHI_PRINTINFO = (1 << 18), + ATA_EHI_SETMODE = (1 << 19), + ATA_EHI_POST_SETMODE = (1 << 20), + + ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, + ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK, + + ATA_EH_MAX_TRIES = 5, + + ATA_PROBE_MAX_TRIES = 3, + ATA_EH_DEV_TRIES = 3, + ATA_EH_PMP_TRIES = 5, + ATA_EH_PMP_LINK_TRIES = 3, + + SATA_PMP_SCR_TIMEOUT = 250, + + /* Horkage types. May be set by libata or controller on drives + (some horkage may be drive/controller pair dependant */ + + ATA_HORKAGE_DIAGNOSTIC = (1 << 0), + ATA_HORKAGE_NODMA = (1 << 1), + ATA_HORKAGE_NONCQ = (1 << 2), + ATA_HORKAGE_MAX_SEC_128 = (1 << 3), + ATA_HORKAGE_BROKEN_HPA = (1 << 4), + ATA_HORKAGE_SKIP_PM = (1 << 5), + ATA_HORKAGE_HPA_SIZE = (1 << 6), + ATA_HORKAGE_IPM = (1 << 7), + ATA_HORKAGE_IVB = (1 << 8), + ATA_HORKAGE_STUCK_ERR = (1 << 9), + + ATA_DMA_MASK_ATA = (1 << 0), + ATA_DMA_MASK_ATAPI = (1 << 1), + ATA_DMA_MASK_CFA = (1 << 2), + + ATAPI_READ = 0, + ATAPI_WRITE = 1, + ATAPI_READ_CD = 2, + ATAPI_PASS_THRU = 3, + ATAPI_MISC = 4, +}; + +enum ata_completion_errors { + AC_ERR_DEV = (1 << 0), + AC_ERR_HSM = (1 << 1), + AC_ERR_TIMEOUT = (1 << 2), + AC_ERR_MEDIA = (1 << 3), + AC_ERR_ATA_BUS = (1 << 4), + AC_ERR_HOST_BUS = (1 << 5), + AC_ERR_SYSTEM = (1 << 6), + AC_ERR_INVALID = (1 << 7), + AC_ERR_OTHER = (1 << 8), + AC_ERR_NODEV_HINT = (1 << 9), + AC_ERR_NCQ = (1 << 10), +}; + +enum ata_xfer_mask { + ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO, + ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA, + ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA, +}; + +struct ata_port_info { + struct scsi_host_template *sht; + unsigned long flags; + unsigned long link_flags; + unsigned long pio_mask; + unsigned long mwdma_mask; + unsigned long udma_mask; + const struct ata_port_operations *port_ops; + void *private_data; +}; + +struct ata_ioports { + void __iomem *cmd_addr; + void __iomem *data_addr; + void __iomem *error_addr; + void __iomem *feature_addr; + void __iomem *nsect_addr; + void __iomem *lbal_addr; + void __iomem *lbam_addr; + void __iomem *lbah_addr; + void __iomem *device_addr; + void __iomem *status_addr; + void __iomem *command_addr; + void __iomem *altstatus_addr; + void __iomem *ctl_addr; + void __iomem *bmdma_addr; + void __iomem *scr_addr; +}; + +struct ata_host { + void __iomem * const *iomap; + unsigned int n_ports; + void *private_data; + const struct ata_port_operations *ops; + unsigned long flags; + struct ata_port *simplex_claimed; + struct ata_port *ports[0]; +}; + +struct ata_port_stats { + unsigned long unhandled_irq; + unsigned long idle_irq; + unsigned long rw_reqbuf; +}; + +struct ata_device { + struct ata_link *link; + unsigned int devno; + unsigned long flags; + unsigned int horkage; + struct scsi_device *sdev; +#ifdef CONFIG_ATA_ACPI + acpi_handle acpi_handle; + union acpi_object *gtf_cache; +#endif + u64 n_sectors; + unsigned int class; + + union { + u16 id[ATA_ID_WORDS]; + u32 gscr[SATA_PMP_GSCR_DWORDS]; + }; + + u8 pio_mode; + u8 dma_mode; + u8 xfer_mode; + unsigned int xfer_shift; + + unsigned int multi_count; + unsigned int max_sectors; + unsigned int cdb_len; + + unsigned long pio_mask; + unsigned long mwdma_mask; + unsigned long udma_mask; + + u16 cylinders; + u16 heads; + u16 sectors; + + int spdn_cnt; +}; + +enum dma_data_direction { + DMA_BIDIRECTIONAL = 0, + DMA_TO_DEVICE = 1, + DMA_FROM_DEVICE = 2, + DMA_NONE = 3, +}; + +struct ata_link { + struct ata_port *ap; + int pmp; + unsigned int active_tag; + u32 sactive; + + unsigned int flags; + + unsigned int hw_sata_spd_limit; + unsigned int sata_spd_limit; + unsigned int sata_spd; + + struct ata_device device[2]; +}; + +struct ata_port { + unsigned long flags; + unsigned int pflags; + unsigned int print_id; + unsigned int port_no; + + struct ata_ioports ioaddr; + + u8 ctl; + u8 last_ctl; + unsigned int pio_mask; + unsigned int mwdma_mask; + unsigned int udma_mask; + unsigned int cbl; + + struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; + unsigned long qc_allocated; + unsigned int qc_active; + int nr_active_links; + + struct ata_link link; + + int nr_pmp_links; + struct ata_link *pmp_link; + struct ata_link *excl_link; + + struct ata_port_stats stats; + struct ata_host *host; + + struct device *dev; + void *port_task_data; + + unsigned int hsm_task_state; + + u32 msg_enable; + void *private_data; + unsigned char *pdata; +}; + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +#endif diff -uprN u-boot-0512/include/configs/canyonlands.h u-boot-sata/include/configs/canyonlands.h --- u-boot-0512/include/configs/canyonlands.h 2009-05-12 12:48:40.000000000 +0900 +++ u-boot-sata/include/configs/canyonlands.h 2009-05-12 14:54:13.000000000 +0900 @@ -454,6 +454,7 @@ #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB +#define CONFIG_CMD_SATA #elif defined(CONFIG_GLACIER) #define CONFIG_CMD_DATE #define CONFIG_CMD_DTT @@ -516,6 +517,19 @@ #endif /* CONFIG_ARCHES */ #endif /* CONFIG_460GT */ +/* + * S-ATA driver setup + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_SATA_DWC +#define CONFIG_LIBATA +#define SATA_BASE_ADDR 0xe20d1000 /* PPC460EX SATA Base Address */ +#define SATA_DMA_REG_ADDR 0xe20d0800 /* PPC460EX SATA Base Address */ +#define CONFIG_SYS_SATA_MAX_DEVICE 1 /* SATA MAX DEVICE */ +/* Convert sectorsize to wordsize */ +#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2) +#endif + /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup *----------------------------------------------------------------------*/ Regards, Kazuaki Ichinohe.

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