April 2009 - U-Boot

[U-Boot] [patch 0/2] Some more USB-OHCI bugfixes [V2]
by Remy Bohmer 01 Feb '10

01 Feb '10

This is version 2 of these series! Only patch 1 of 2 has changed, some pedantic Coding Style issues updated that were not detected by Linux/scripts/checkpatch.pl. The USB OHCI init procedure sets the maximum message length the wrong way. A max of 64 bits should not be done by writing '64' in maxpacketsize, but '3'. While fixing this problem it turned out that there is more wrong here in this code it turned out that the wrong bits were checked to determine if the pipe was of type PIPE_INTERRUPT. This series fixes those errors also. I made it 2 seperate patches. The 1st of this series is fully tested and correct on at least the AT91SAM9261 cores. The 2nd patch, however, is created by search-for-the-same-errors-and-replace. I am not able to test that patch, I do not have the boards, so that needs to be done by others or by review. It is clear that code there is buggy in the first place. These patches require my previous series called 'Improve stability USB memory sticks for the common OHCI USB layer.' to be applied before this series. So they should apply on the u-boot-usb git tree. --> git://git.denx.de/u-boot-usb.git I want to mention also, that everytime I look deeper into this code, I find new bugs. It appears that several parts of this code is written with interrupt handling in mind, while we have no interrupt handling at all. Assumptions are done that a interrupt handler does things asynchronous, causing long loops that have no real use at all... So, no guarantees that _all_ problems are solved by now... --

4 8

[U-Boot] [PATCH][RFC] bootm: Added CONFIG_BOOTM_{LINUX, NETBSD, RTEMS}
by Kumar Gala 26 Jan '10

26 Jan '10

Added the ability to config out bootm support for Linux, NetBSD, RTEMS Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Looking for suggestions on how to deal with enabling LINUX, NETBSD, and RTEMS. common/cmd_bootm.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 1b2dfc4..47f9b45 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -103,13 +103,23 @@ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); typedef int boot_os_fn (int flag, int argc, char *argv[], bootm_headers_t *images); /* pointers to os/initrd/fdt */ +#define CONFIG_BOOTM_LINUX 1 +#define CONFIG_BOOTM_NETBSD 1 +#define CONFIG_BOOTM_RTEMS 1 + +#ifdef CONFIG_BOOTM_LINUX extern boot_os_fn do_bootm_linux; +#endif +#ifdef CONFIG_BOOTM_NETBSD static boot_os_fn do_bootm_netbsd; +#endif #if defined(CONFIG_LYNXKDI) static boot_os_fn do_bootm_lynxkdi; extern void lynxkdi_boot (image_header_t *); #endif +#ifdef CONFIG_BOOTM_RTEMS static boot_os_fn do_bootm_rtems; +#endif #if defined(CONFIG_CMD_ELF) static boot_os_fn do_bootm_vxworks; static boot_os_fn do_bootm_qnxelf; @@ -121,12 +131,18 @@ static boot_os_fn do_bootm_integrity; #endif boot_os_fn * boot_os[] = { +#ifdef CONFIG_BOOTM_LINUX [IH_OS_LINUX] = do_bootm_linux, +#endif +#ifdef CONFIG_BOOTM_NETBSD [IH_OS_NETBSD] = do_bootm_netbsd, +#endif #ifdef CONFIG_LYNXKDI [IH_OS_LYNXOS] = do_bootm_lynxkdi, #endif +#ifdef CONFIG_BOOTM_RTEMS [IH_OS_RTEMS] = do_bootm_rtems, +#endif #if defined(CONFIG_CMD_ELF) [IH_OS_VXWORKS] = do_bootm_vxworks, [IH_OS_QNX] = do_bootm_qnxelf, @@ -1161,6 +1177,7 @@ static void fixup_silent_linux () /* OS booting routines */ /*******************************************************************/ +#ifdef CONFIG_BOOTM_NETBSD static int do_bootm_netbsd (int flag, int argc, char *argv[], bootm_headers_t *images) { @@ -1246,6 +1263,7 @@ static int do_bootm_netbsd (int flag, int argc, char *argv[], return 1; } +#endif /* CONFIG_BOOTM_NETBSD*/ #ifdef CONFIG_LYNXKDI static int do_bootm_lynxkdi (int flag, int argc, char *argv[], @@ -1269,6 +1287,7 @@ static int do_bootm_lynxkdi (int flag, int argc, char *argv[], } #endif /* CONFIG_LYNXKDI */ +#ifdef CONFIG_BOOTM_RTEMS static int do_bootm_rtems (int flag, int argc, char *argv[], bootm_headers_t *images) { @@ -1299,6 +1318,7 @@ static int do_bootm_rtems (int flag, int argc, char *argv[], return 1; } +#endif /* CONFIG_BOOTM_RTEMS */ #if defined(CONFIG_CMD_ELF) static int do_bootm_vxworks (int flag, int argc, char *argv[], -- 1.5.5.1

5 28

[U-Boot] PATCH Nios2 kernel bootstrap error due to missing processor data cache flush: fix
by Renato Andreola 23 Nov '09

23 Nov '09

From b75bd27f89ac6c105cebb6507cf082b6f5fffc7d Mon Sep 17 00:00:00 2001 From: Renato Andreola <renato.andreola(a)imagos.it> Date: Fri, 10 Apr 2009 12:32:29 +0200 Subject: Nios2: do_boom_linux(): kernel gunzip input data integrity problem due to mi ssing cache flush Added instruction and data caches flush Signed-off-by: Renato Andreola <renato.andreola(a)imagos.it> --- lib_nios2/bootm.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/lib_nios2/bootm.c b/lib_nios2/bootm.c index 53fd569..1e8034b 100644 --- a/lib_nios2/bootm.c +++ b/lib_nios2/bootm.c @@ -2,6 +2,9 @@ * (C) Copyright 2003, Psyent Corporation <www.psyent.com> * Scott McNutt <smcnutt(a)psyent.com> * + * (C) Copyright 2009, Imagos sas <www.imagos.it> + * Renato Andreola <renato.andreola(a)imagos.it> + * * See file CREDITS for list of people who contributed to this * project. * @@ -24,6 +27,7 @@ #include <common.h> #include <command.h> #include <asm/byteorder.h> +#include <asm/cache.h> int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) { @@ -31,7 +35,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) return 1; - + /* flushes data and instruction caches before calling the kernel */ + flush_dcache (0,CONFIG_SYS_DCACHE_SIZE ); + flush_icache (0,CONFIG_SYS_ICACHE_SIZE); /* For now we assume the Microtronix linux ... which only * needs to be called ;-) */ -- 1.5.5

4 11

[U-Boot-Users] [PATCH] mtd: SPI Flash: Winbond W25X16/WX2532/WX2564 support
by Jason McMullan 22 Nov '09

22 Nov '09

Add support for the Winbond W25X16/32/64 series of SPI Flash devices. --- drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/spi_flash.c | 5 + drivers/mtd/spi/spi_flash_internal.h | 1 + drivers/mtd/spi/winbond.c | 331 ++++++++++++++++++++++++++++++++++ 4 files changed, 338 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/winbond.c diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 01b288a..5941235 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libspi_flash.a COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o +COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 35ce822..e81b1be 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -134,6 +134,11 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, flash = spi_flash_probe_atmel(spi, idcode); break; #endif +#ifdef CONFIG_SPI_FLASH_WINBOND + case 0xef: + flash = spi_flash_probe_winbond(spi, idcode); + break; +#endif #ifdef CONFIG_SPI_FLASH_STMICRO case 0x00: case 0xff: diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index e5f758e..1eacb5c 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -44,3 +44,4 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c new file mode 100644 index 0000000..85e5b80 --- /dev/null +++ b/drivers/mtd/spi/winbond.c @@ -0,0 +1,331 @@ +/* + * Copyright 2008, Network Appliance Inc. + * Author: Jason McMullan <mcmullan(a)netapp.com> + * + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +/* M25Pxx-specific commands */ +#define CMD_W25_WREN 0x06 /* Write Enable */ +#define CMD_W25_WRDI 0x04 /* Write Disable */ +#define CMD_W25_RDSR 0x05 /* Read Status Register */ +#define CMD_W25_WRSR 0x01 /* Write Status Register */ +#define CMD_W25_READ 0x03 /* Read Data Bytes */ +#define CMD_W25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ +#define CMD_W25_PP 0x02 /* Page Program */ +#define CMD_W25_SE 0x20 /* Sector (4K) Erase */ +#define CMD_W25_BE 0xd8 /* Block (64K) Erase */ +#define CMD_W25_CE 0xc7 /* Chip Erase */ +#define CMD_W25_DP 0xb9 /* Deep Power-down */ +#define CMD_W25_RES 0xab /* Release from DP, and Read Signature */ + +#define WINBOND_ID_W25X16 0x3015 +#define WINBOND_ID_W25X32 0x3016 +#define WINBOND_ID_W25X64 0x3017 + +#define WINBOND_SR_WIP (1 << 0) /* Write-in-Progress */ + +struct winbond_spi_flash_params { + uint16_t id; + /* Log2 of page size in power-of-two mode */ + uint8_t l2_page_size; + uint16_t pages_per_sector; + uint16_t sectors_per_block; + uint8_t nr_blocks; + const char *name; +}; + +struct winbond_spi_flash { + const struct winbond_spi_flash_params *params; + struct spi_flash flash; +}; + +static inline struct winbond_spi_flash * +to_winbond_spi_flash(struct spi_flash *flash) +{ + return container_of(flash, struct winbond_spi_flash, flash); +} + +static const struct winbond_spi_flash_params winbond_spi_flash_table[] = { + { + .id = WINBOND_ID_W25X16, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "W25X16", + }, + { + .id = WINBOND_ID_W25X32, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 64, + .name = "W25X32", + }, + { + .id = WINBOND_ID_W25X64, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 128, + .name = "W25X64", + }, +}; + +static int winbond_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 status; + u8 cmd[4] = { CMD_W25_RDSR, 0xff, 0xff, 0xff }; + + ret = spi_xfer(spi, 32, &cmd[0], NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", cmd, ret); + return ret; + } + + timebase = get_timer(0); + do { + ret = spi_xfer(spi, 8, NULL, &status, 0); + if (ret) { + debug("SF: Failed to get status for cmd %02x: %d\n", cmd, ret); + return -1; + } + + if ((status & WINBOND_SR_WIP) == 0) + break; + + } while (get_timer(timebase) < timeout); + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if ((status & WINBOND_SR_WIP) == 0) + return 0; + + debug("SF: Timed out on command %02x: %d\n", cmd, ret); + /* Timed out */ + return -1; +} + +/* + * Assemble the address part of a command for Winbond devices in + * non-power-of-two page size mode. + */ +static void winbond_build_address(struct winbond_spi_flash *stm, u8 *cmd, u32 offset) +{ + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + + /* + * The "extra" space per page is the power-of-two page size + * divided by 32. + */ + page_shift = stm->params->l2_page_size; + page_size = (1 << page_shift); + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = page_addr >> (16 - page_shift); + cmd[1] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[2] = byte_addr; +} + +static int winbond_read_fast(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + struct winbond_spi_flash *stm = to_winbond_spi_flash(flash); + u8 cmd[5]; + + cmd[0] = CMD_READ_ARRAY_FAST; + winbond_build_address(stm, cmd + 1, offset); + cmd[4] = 0x00; + + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int winbond_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + struct winbond_spi_flash *stm = to_winbond_spi_flash(flash); + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + size_t chunk_len; + size_t actual; + int ret; + u8 cmd[4]; + + page_shift = stm->params->l2_page_size; + page_size = (1 << page_shift); + page_addr = offset / page_size; + byte_addr = offset % page_size; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[0] = CMD_W25_PP; + cmd[1] = page_addr >> (16 - page_shift); + cmd[2] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[3] = byte_addr; + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n", + buf + actual, + cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); + + ret = spi_flash_cmd(flash->spi, CMD_W25_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto out; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, + buf + actual, chunk_len); + if (ret < 0) { + debug("SF: Winbond Page Program failed\n"); + goto out; + } + + ret = winbond_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret < 0) { + debug("SF: Winbond page programming timed out\n"); + goto out; + } + + page_addr++; + byte_addr = 0; + } + + debug("SF: Winbond: Successfully programmed %u bytes @ 0x%x\n", + len, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +int winbond_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + struct winbond_spi_flash *stm = to_winbond_spi_flash(flash); + unsigned long sector_size; + unsigned int page_shift; + size_t actual; + int ret; + u8 cmd[4]; + + /* + * This function currently uses sector erase only. + * probably speed things up by using bulk erase + * when possible. + */ + + page_shift = stm->params->l2_page_size; + sector_size = (1 << page_shift) * stm->params->pages_per_sector; + + if (offset % sector_size || len % sector_size) { + debug("SF: Erase offset/length not multiple of sector size\n"); + return -1; + } + + len /= sector_size; + cmd[0] = CMD_W25_SE; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual++) { + winbond_build_address(stm, &cmd[1], offset + actual * sector_size); + printf("Erase: %02x %02x %02x %02x\n", + cmd[0], cmd[1], cmd[2], cmd[3]); + + ret = spi_flash_cmd(flash->spi, CMD_W25_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto out; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); + if (ret < 0) { + debug("SF: Winbond sector erase failed\n"); + goto out; + } + + ret = winbond_wait_ready(flash, 2 * CFG_HZ); /* Up to 2 seconds */ + if (ret < 0) { + debug("SF: Winbond sector erase timed out\n"); + goto out; + } + } + + debug("SF: Winbond: Successfully erased %u bytes @ 0x%x\n", + len * sector_size, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode) +{ + const struct winbond_spi_flash_params *params; + unsigned long page_size; + struct winbond_spi_flash *stm; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(winbond_spi_flash_table); i++) { + params = &winbond_spi_flash_table[i]; + if (params->id == ((idcode[1] << 8) | idcode[2])) + break; + } + + if (i == ARRAY_SIZE(winbond_spi_flash_table)) { + debug("SF: Unsupported Winbond ID %02x%02x\n", + idcode[1], idcode[2]); + return NULL; + } + + stm = malloc(sizeof(struct winbond_spi_flash)); + if (!stm) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + stm->params = params; + stm->flash.spi = spi; + stm->flash.name = params->name; + + /* Assuming power-of-two page size initially. */ + page_size = 1 << params->l2_page_size; + + stm->flash.write = winbond_write; + stm->flash.erase = winbond_erase; + stm->flash.read = winbond_read_fast; + stm->flash.size = page_size * params->pages_per_sector + * params->sectors_per_block + * params->nr_blocks; + + debug("SF: Detected %s with page size %u, total %u bytes\n", + params->name, page_size, stm->flash.size); + + return &stm->flash; +} -- 1.5.4.3

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[U-Boot] [PATCH 2/2] 85xx: add the nfsboot/ramboot to default environment
by Dave Liu 22 Nov '09

22 Nov '09

Give the MPC8569MDS board one default environment var. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- include/configs/MPC8569MDS.h | 72 ++++++++++++++++++++++++------------------ 1 files changed, 41 insertions(+), 31 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index b0af5dc..7fd2b56 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -409,46 +409,56 @@ extern unsigned long get_clock_freq(void); * Environment Configuration */ #define CONFIG_HOSTNAME mpc8569mds -#define CONFIG_ROOTPATH /nfsroot -#define CONFIG_BOOTFILE your.uImage +#define CONFIG_ROOTPATH /tftpboot +#define CONFIG_BOOTFILE uImage.8569 +#define CONFIG_HAS_ETH0 +#define CONFIG_ETHADDR 00:E0:0C:85:69:01 +#define CONFIG_HAS_ETH1 +#define CONFIG_ETH1ADDR 00:E0:0C:85:69:02 + +#define CONFIG_IPADDR 192.168.1.100 #define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 +#define CONFIG_GATEWAYIP 192.168.1.254 #define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/ +#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/ #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ #define CONFIG_BAUDRATE 115200 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=600000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=your.fdt.dtb\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs\0" \ - "ramargs=setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs\0" \ - -#define CONFIG_NFSBOOTCOMMAND \ - "run nfsargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_RAMBOOTCOMMAND \ - "run ramargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr $ramdiskaddr" - -#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "uboot=u-boot.8569\0" \ + "tftpflash=tftpboot $loadaddr $uboot; " \ + "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=ramdisk.8569\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=dtb.8569\0" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" #endif /* __CONFIG_H */ -- 1.5.4

2 2

[U-Boot] Question about M29W128G CFI QRY bug
by Richard Retanubun 27 Oct '09

27 Oct '09

Hi Stefan, I'm trying to get u-boot 2009.03 on coldfire to boot on flash part M29W128G. I think I am getting hit by this bug in the flash chip http://lists.infradead.org/pipermail/linux-mtd/2008-July/022252.html The debug output is as follows: U-Boot 2009.03dvl-00087-gd53876a-dirty (Apr 09 2009 - 19:00:37) CPU: Freescale ColdFire MCF5270 rev. 1, at 150 MHz Board: Ruggedcom MCF5270 I2C: ready DRAM: 8 MB Top of RAM usable for U-Boot at: 00800000 Reserving 172k for U-Boot at: 007d4000 Reserving 256k for malloc() at: 00794000 Reserving 58 Bytes for Board Info at: 00793fc6 Reserving 56 Bytes for Global Data at: 00793f8e Reserving 64k for boot parameters at: 00783f8e Stack Pointer at: 00783f68 Start relocate of code from ff000400 to 007d4000 Now running in RAM - U-Boot at: 007d4000 FLASH: flash detect cfi fwc addr ff000000 cmd f0 f0f0 16bit x 8 bit fwc addr ff000000 cmd ff ffff 16bit x 8 bit fwc addr ff0000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 [snip] Note that we suffer from the same bug, where QRY is not being setup properly. The notes there offers a remedy by sending ff before f0. (or skipping ff altogether). Am I on the right track here and if so, how can I make the same fix in u-boot? Thanks for your time - Richard <Raw debug output> U-Boot 2009.03dvl-00087-gd53876a-dirty (Apr 09 2009 - 19:00:37) CPU: Freescale ColdFire MCF5270 rev. 1, at 150 MHz Board: Ruggedcom MCF5270 I2C: ready DRAM: 8 MB Top of RAM usable for U-Boot at: 00800000 Reserving 172k for U-Boot at: 007d4000 Reserving 256k for malloc() at: 00794000 Reserving 58 Bytes for Board Info at: 00793fc6 Reserving 56 Bytes for Global Data at: 00793f8e Reserving 64k for boot parameters at: 00783f8e Stack Pointer at: 00783f68 Start relocate of code from ff000400 to 007d4000 Now running in RAM - U-Boot at: 007d4000 FLASH: flash detect cfi fwc addr ff000000 cmd f0 f0f0 16bit x 8 bit fwc addr ff000000 cmd ff ffff 16bit x 8 bit fwc addr ff0000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 fwc addr ff000aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff000020 is= ff00 5151 fwc addr ff000000 cmd f0 00f0 16bit x 16 bit fwc addr ff000000 cmd ff 00ff 16bit x 16 bit fwc addr ff0000aa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff000020 is= ff00 0051 fwc addr ff000aaa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff000020 is= ff00 0051 fwc addr ff000000 cmd f0 f0f0f0f0 32bit x 8 bit fwc addr ff000000 cmd ff ffffffff 32bit x 8 bit fwc addr ff000154 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 51515151 fwc addr ff001554 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 51515151 fwc addr ff000000 cmd f0 00f000f0 32bit x 16 bit fwc addr ff000000 cmd ff 00ff00ff 32bit x 16 bit fwc addr ff000154 cmd 98 00980098 32bit x 16 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00510051 fwc addr ff001554 cmd 98 00980098 32bit x 16 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00510051 fwc addr ff000000 cmd f0 000000f0 32bit x 32 bit fwc addr ff000000 cmd ff 000000ff 32bit x 32 bit fwc addr ff000154 cmd 98 00000098 32bit x 32 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00000051 fwc addr ff001554 cmd 98 00000098 32bit x 32 bit is= cmd 51(Q) addr ff000040 is= ff0004b4 00000051 fwrite addr ff000000 cmd f0 fffffffffffffffffffff0 64 bit x 8 bit fwrite addr ff000000 cmd ff ffffffffffffffffffffff 64 bit x 8 bit fwrite addr ff0002a8 cmd 98 ffffffffffffffffffff98 64 bit x 8 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005151515151 fwrite addr ff002aa8 cmd 98 ffffffffffffffffffff98 64 bit x 8 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005151515151 fwrite addr ff000000 cmd f0 00ff00ff00ff00fffffff0 64 bit x 16 bit fwrite addr ff000000 cmd ff 00ff00ff00ff00ffffffff 64 bit x 16 bit fwrite addr ff0002a8 cmd 98 00ff00ff00ff00ffffff98 64 bit x 16 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100510051 fwrite addr ff002aa8 cmd 98 00ff00ff00ff00ffffff98 64 bit x 16 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100510051 fwrite addr ff000000 cmd f0 000000ff000000fffffff0 64 bit x 32 bit fwrite addr ff000000 cmd ff 000000ff000000ffffffff 64 bit x 32 bit fwrite addr ff0002a8 cmd 98 000000ff000000ffffff98 64 bit x 32 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100000051 fwrite addr ff002aa8 cmd 98 000000ff000000ffffff98 64 bit x 32 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234005100000051 fwrite addr ff000000 cmd f0 00000000000000fffffff0 64 bit x 64 bit fwrite addr ff000000 cmd ff 00000000000000ffffffff 64 bit x 64 bit fwrite addr ff0002a8 cmd 98 00000000000000ffffff98 64 bit x 64 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234000000000051 fwrite addr ff002aa8 cmd 98 00000000000000ffffff98 64 bit x 64 bit is= cmd 51(Q) addr ff000080 is= ff0004ffff0004ffffffb4 6234000000000051 not found ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB flash_protect ON: from 0xFF000400 to 0xFF0231FF flash_protect ON: from 0xFF004000 to 0xFF005FFF *** failed *** Ignoring flash failure, see if we boot In: serial Out: serial Err: serial MAC: ethaddr 00:00:00:00:01:00 U-Boot relocated to 007d4000 Net: FEC0 [PRIME] ### main_loop entered: bootdelay=0

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[U-Boot] u-boot fails to uncompress a "gzip'ed -9" kernel
by N. van Bolhuis 30 Sep '09

30 Sep '09

A certain powerpc 2.6.28 kernel (which is by default compressed with gzip -9) fails to load with u-boot v2008.10. It results in a machine check stop. I'm testing on a MPC8313-RDB. Btw. the linux-2.6.28/arch/powerpc/boot/wrapper script takes care of compressing with "gzip -9". On my host linux pc I'm using gzip 1.3.5 (2002-09-30). If I manually compress that same kernel with "gzip -8" and generate a uImage, it *does* work. As far as I know my start/load memory addresses are ok. If anybody has any clues, please let me know. more details follow. Here's the full output of when the problem occurs: U-Boot 2008.10 (Jan 19 2009 - 12:21:43) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c3, MPC8313E, Rev: 1.0 at 333.333 MHz, CSB: 166.667 MHz Board: Freescale MPC8313ERDB I2C: ready DRAM: 128 MB Top of RAM usable for U-Boot at: 08000000 Reserving 307k for U-Boot at: 07fb3000 Reserving 520k for malloc() at: 07f31000 Reserving 68 Bytes for Board Info at: 07f30fbc Reserving 104 Bytes for Global Data at: 07f30f54 Stack Pointer at: 07f30f38 New Stack Pointer is: 07f30f38 Now running in RAM - U-Boot at: 07fb3000 FLASH: 8 MB NAND: 32 MiB In: serial Out: serial Err: serial U-Boot relocated to 07fb3000 Net: TSEC0, TSEC1 [PRIME] => run tird Speed: 100, full duplex Using TSEC1 device TFTP from server 10.10.4.142; our IP address is 10.10.77.77 Filename 'uImage'. Load address: 0x2000000 Loading: ################################################################# ##################################################### done Bytes transferred = 1717604 (1a3564 hex) Speed: 100, full duplex Using TSEC1 device TFTP from server 10.10.4.142; our IP address is 10.10.77.77 Filename 'initramfs.igz.uboot'. Load address: 0x1000000 Loading: ################################################################# ################################################################# ########## done Bytes transferred = 2051722 (1f4e8a hex) Speed: 100, full duplex Using TSEC1 device TFTP from server 10.10.4.142; our IP address is 10.10.77.77 Filename 'mpc8313erdb.dtb'. Load address: 0x400000 Loading: # done Bytes transferred = 11130 (2b7a hex) ## Current stack ends at 0x07f30c00 * kernel: cmdline image address = 0x02000000 ## Booting kernel from Legacy Image at 02000000 ... Image Name: Linux-2.6.28wa2 Created: 2009-01-19 11:36:09 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1717540 Bytes = 1.6 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK kernel data at 0x02000040, len = 0x001a3524 (1717540) * ramdisk: cmdline image address = 0x01000000 ## Loading init Ramdisk from Legacy Image at 01000000 ... Image Name: uboot initramfs Created: 2009-01-12 14:56:02 UTC Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size: 2051658 Bytes = 2 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ramdisk start = 0x01000040, ramdisk end = 0x011f4e8a * fdt: cmdline image address = 0x00400000 ## Checking for 'FDT'/'FDT Image' at 00400000 * fdt: raw FDT blob ## Flattened Device Tree blob at 00400000 Booting using the fdt blob at 0x400000 of_flat_tree at 0x00400000 size 0x00002b7a Uncompressing Kernel Image ... U-Boot 2008.10 (Jan 19 2009 - 12:21:43) MPC83XX Reset Status: Check Stop, External/Internal Soft, External/Internal Hard I already applied this patch: http://www.mail-archive.com/u-boot@lists.denx.de/msg06709.html it makes no difference. I also applied this patch: http://www.mail-archive.com/u-boot@lists.denx.de/msg04544.html it makes no difference either. Using "bzip2 --best" gives: Uncompressing Kernel Image ... BUNZIP2: uncompress or overwrite error -3 - must RESET board to recover Using "bzip2 --fast" works, but it takes a long time for u-boot to uncompress the kernel. What's also strange is that some other 2.6.28 kernels (compressed with gzip -9) do work. I probably have some kind of memory error, I don't see it though. Unfortunately the problem doesn't occur when I start debugging it with a jtag debugger (lauterbach). if anybody has any clues, please let me know.

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[U-Boot] [PATCH] tools/netconsole: make a bit more robust and use ncb when possible
by Mike Frysinger 15 Sep '09

15 Sep '09

The netcat utility likes to exit when it receives an empty packet (as it thinks this means EOF). This can easily occur when working with command line editing as this behavior will be triggered when using backspace. Or with tabs and command line completion. Since the local ncb util does not have this "feature" and it supports broadcast udp, default to using that rather than netcat. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- tools/netconsole | 18 +++++++++++++++--- 1 files changed, 15 insertions(+), 3 deletions(-) diff --git a/tools/netconsole b/tools/netconsole index 09c8981..aa30d9b 100755 --- a/tools/netconsole +++ b/tools/netconsole @@ -31,12 +31,24 @@ if [ -z "${ip}" ] || [ -n "$3" ] ; then fi for nc in netcat nc ; do - type ${nc} >/dev/null && break + type ${nc} >/dev/null 2>&1 && break done trap "stty icanon echo intr ^C" 0 2 3 5 10 13 15 echo "NOTE: the interrupt signal (normally ^C) has been remapped to ^T" stty -icanon -echo intr ^T -${nc} -u -l -p ${port} < /dev/null & -exec ${nc} -u ${ip} ${port} +( +if [ -x ./ncb ] ; then + exec ./ncb ${port} +elif [ -x ${0%/*}/ncb ] ; then + exec ${0%/*}/ncb ${port} +else + while ${nc} -u -l -p ${port} < /dev/null ; do + : + done +fi +) & +pid=$! +${nc} -u ${ip} ${port} +kill $pid 2>/dev/null -- 1.6.1

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[U-Boot] [PATCH] AT91RM9200 BGA port D defines
by Jens Scharsig 11 Sep '09

11 Sep '09

This patch add's the defines for port d I/Os on AT91RM9200 (BGA package) Signed-off-by: Jens Scharsig <esw(a)bus-elektronik.de> --- diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 95db017..308dea1 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -634,10 +634,12 @@ typedef struct _AT91S_PDC #define AT91C_PIO_PB21 ((unsigned int) 1 << 21) /* Pin Controlled by PB21 */ #define AT91C_PB21_TXD1 AT91C_PIO_PB21 /* USART1 Transmit Data */ + #define AT91C_ID_SYS ((unsigned int) 1) /* System Peripheral */ #define AT91C_ID_PIOA ((unsigned int) 2) /* PIO port A */ #define AT91C_ID_PIOB ((unsigned int) 3) /* PIO port B */ #define AT91C_ID_PIOC ((unsigned int) 4) /* PIO port C */ +#define AT91C_ID_PIOD ((unsigned int) 5) /* PIO port D BGA only */ #define AT91C_ID_USART0 ((unsigned int) 6) /* USART 0 */ #define AT91C_ID_USART1 ((unsigned int) 7) /* USART 1 */ #define AT91C_ID_TWI ((unsigned int) 12) /* Two Wire Interface */ @@ -730,6 +732,35 @@ typedef struct _AT91S_PDC #define AT91C_PB12_TF2 ((unsigned int) AT91C_PIO_PB12) /* SSC Transmit Frame Sync 2 */ #define AT91C_PB12_ETX2 ((unsigned int) AT91C_PIO_PB12) /* Ethernet MAC Transmit Data 2 */ +#define AT91C_PIO_PD0 ((unsigned int) 1 << 0) /* Pin Controlled by PD0 */ +#define AT91C_PIO_PD1 ((unsigned int) 1 << 1) /* Pin Controlled by PD1 */ +#define AT91C_PIO_PD2 ((unsigned int) 1 << 2) /* Pin Controlled by PD2 */ +#define AT91C_PIO_PD3 ((unsigned int) 1 << 3) /* Pin Controlled by PD3 */ +#define AT91C_PIO_PD4 ((unsigned int) 1 << 4) /* Pin Controlled by PD4 */ +#define AT91C_PIO_PD5 ((unsigned int) 1 << 5) /* Pin Controlled by PD5 */ +#define AT91C_PIO_PD6 ((unsigned int) 1 << 6) /* Pin Controlled by PD6 */ +#define AT91C_PIO_PD7 ((unsigned int) 1 << 7) /* Pin Controlled by PD7 */ +#define AT91C_PIO_PD8 ((unsigned int) 1 << 8) /* Pin Controlled by PD8 */ +#define AT91C_PIO_PD9 ((unsigned int) 1 << 9) /* Pin Controlled by PD9 */ +#define AT91C_PIO_PD10 ((unsigned int) 1 << 10) /* Pin Controlled by PD10 */ +#define AT91C_PIO_PD11 ((unsigned int) 1 << 11) /* Pin Controlled by PD11 */ +#define AT91C_PIO_PD12 ((unsigned int) 1 << 12) /* Pin Controlled by PD12 */ +#define AT91C_PIO_PD13 ((unsigned int) 1 << 13) /* Pin Controlled by PD13 */ +#define AT91C_PIO_PD14 ((unsigned int) 1 << 14) /* Pin Controlled by PD14 */ +#define AT91C_PIO_PD15 ((unsigned int) 1 << 15) /* Pin Controlled by PD15 */ +#define AT91C_PIO_PD16 ((unsigned int) 1 << 16) /* Pin Controlled by PD16 */ +#define AT91C_PIO_PD17 ((unsigned int) 1 << 17) /* Pin Controlled by PD17 */ +#define AT91C_PIO_PD18 ((unsigned int) 1 << 18) /* Pin Controlled by PD18 */ +#define AT91C_PIO_PD19 ((unsigned int) 1 << 19) /* Pin Controlled by PD19 */ +#define AT91C_PIO_PD20 ((unsigned int) 1 << 20) /* Pin Controlled by PD20 */ +#define AT91C_PIO_PD21 ((unsigned int) 1 << 21) /* Pin Controlled by PD21 */ +#define AT91C_PIO_PD22 ((unsigned int) 1 << 22) /* Pin Controlled by PD22 */ +#define AT91C_PIO_PD23 ((unsigned int) 1 << 23) /* Pin Controlled by PD23 */ +#define AT91C_PIO_PD24 ((unsigned int) 1 << 24) /* Pin Controlled by PD24 */ +#define AT91C_PIO_PD25 ((unsigned int) 1 << 25) /* Pin Controlled by PD25 */ +#define AT91C_PIO_PD26 ((unsigned int) 1 << 26) /* Pin Controlled by PD26 */ +#define AT91C_PIO_PD27 ((unsigned int) 1 << 27) /* Pin Controlled by PD27 */ + #define AT91C_PIOB_BSR ((AT91_REG *) 0xFFFFF674) /* (PIOB) Select B Register */ #define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) /* (PIOB) PIO Disable Register */

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[U-Boot] [PATCH 1/7] eSPI: add the eSPI register support
by Mingkai Hu 27 Aug '09

27 Aug '09

Signed-off-by: Mingkai Hu <Mingkai.hu(a)freescale.com> --- include/asm-ppc/immap_85xx.h | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 094fb9c..f3ab750 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -258,6 +258,21 @@ typedef struct ccsr_lbc { } ccsr_lbc_t; /* + * eSPI Registers(0x7000-0x8000) + */ +typedef struct ccsr_espi { + uint mode; /* 0x00 - eSPI mode register */ + uint event; /* 0x04 - eSPI event register */ + uint mask; /* 0x08 - eSPI mask register */ + uint com; /* 0x0c - eSPI command register */ + uint tx; /* 0x10 - eSPI transmit FIFO access register */ + uint rx; /* 0x14 - eSPI receive FIFO access register */ + char res1[8]; /* reserved */ + uint csmode[4]; /* 0x20 - 0x2c: sSPI CS0/1/2/3 mode register */ + char res2[4048]; /* fill up to 0x1000 */ +} ccsr_espi_t; + +/* * PCI Registers(0x8000-0x9000) */ typedef struct ccsr_pcix { @@ -1682,6 +1697,8 @@ typedef struct ccsr_gur { #define CONFIG_SYS_MPC85xx_DDR2_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_DDR2_OFFSET) #define CONFIG_SYS_MPC85xx_LBC_OFFSET (0x5000) #define CONFIG_SYS_MPC85xx_LBC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_LBC_OFFSET) +#define CONFIG_SYS_MPC85xx_ESPI_OFFSET (0x7000) +#define CONFIG_SYS_MPC85xx_ESPI_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ESPI_OFFSET) #define CONFIG_SYS_MPC85xx_PCIX_OFFSET (0x8000) #define CONFIG_SYS_MPC85xx_PCIX_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX_OFFSET) #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET (0x9000) -- 1.5.4

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