March 2009 - U-Boot

[U-Boot] ethernet issue in MPC8313ER board
by rudresh 16 Mar '09

16 Mar '09

Hi All, I'm using MPC8313ERD customize board. its having 4 Ethernet port. out of which 2 are using as TSEC0 & TSEC1. the Ethernet PHY is LAN870 & its PHY id's are 0x11(TSEC0) & 0x19(TSEC1) . i'm facing problem in tftp . when i do the TFTP 1st time it will hung or restart the board. the restart status is Reset Status: Check Stop, External/Internal Soft, External/Internal Hard . i have similar configuration of MPC8313ERD custom board with some different peripherals(ADC, USB, & QUART) with same PHY(LAN870 ) but id's are 0x16(TSEC0) & 0x17(TSEC1), in this board is working without any issue. i have did 100 times tftp 14MB large file without any problem. i don't know why this issue is happening in 1st board(0x11 & 0x19 id's) then other details are u-boot version 1.3.0 & i change the u-boot version 1.1.6 with both board, in this version the restart or hung will happen after 6th to 10th iteration of on 1st board & in 2nd board working fine. how can i resolve this issue? help me Thanks Rudresh -- View this message in context: http://www.nabble.com/-U-Boot--ethernet-issue-in-MPC8313ER-board-tp22532070… Sent from the Uboot - Users mailing list archive at Nabble.com.

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Re: [U-Boot] [PATCH] PowerPC MPC85xx: don't hang on read exception
by Andrew Klossner 16 Mar '09

16 Mar '09

> In fact. u-boot has some support for these error events, check the > cpu/mpc85xx/interrupts, 8548cds, 8544ds board file and drivers/pci > /fsl-pci...c. beside they has not good framework. Yes, that's a start. The interrupts should be configured as critical so that the processor doesn't hang when core_fault_in* is asserted while MSR[EE] == 0. iivpr0, iidr0, and l2errinten need to be set up to take interrupts on L2 cache errors. We've seen perhaps a dozen such errors since we started using these chips. err_int_en is only set up for MPC8536DS, MPC8572DS, and MPC8610HPCD. You can get memory-select errors on boards that don't have ECC. Granted, it's the result of a software flaw, but you'd rather take an exception than hang when that flaw occurs. A dozen or so boards with E500 cores don't seem to enable the necessary interrupts at all. If all these points were addressed, then it would be safe not to set HID1[RFXE]. > Linux kernel has the EDAC driver for 85xx platform in main tree, > include most of error case. CONFIG_EDAC_MPC85XX is turned off in the defconfig file for all real boards, so they will hang if core_fault_in* is asserted while running Linux. mpc85xx_edac.c doesn't seem to use critical interrupts, so an error while local_irq_disable() will hang. It handles PCI, L2, and memory errors, but not localbus or ECM. It has the potential to be developed into a complete solution, but it's not there today. -=- Andrew Klossner

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[U-Boot] [PATCH 1/1] example: introduce EXAMPLE_LOAD_ADDR
by Jean-Christophe PLAGNIOL-VILLARD 15 Mar '09

15 Mar '09

that could be overwrite in followaing order ARCH CPU SOC BOARD via the corresponding config.mk the value could be exported to the environment to reduce the user mistake when they try to use example's standalone application Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- arm_config.mk | 2 + avr32_config.mk | 2 + blackfin_config.mk | 2 + board/omap2420h4/config.mk | 2 + cpu/arm_cortexa8/omap3/config.mk | 2 + examples/Makefile | 47 +++++--------------------------------- i386_config.mk | 2 + m68k_config.mk | 2 + microblaze_config.mk | 2 + mips_config.mk | 2 + nios2_config.mk | 2 + nios_config.mk | 2 + ppc_config.mk | 2 + sh_config.mk | 2 + sparc_config.mk | 2 + 15 files changed, 34 insertions(+), 41 deletions(-) diff --git a/arm_config.mk b/arm_config.mk index 73d9625..41d810c 100644 --- a/arm_config.mk +++ b/arm_config.mk @@ -22,3 +22,5 @@ # PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ + +EXAMPLE_LOAD_ADDR = 0xc100000 diff --git a/avr32_config.mk b/avr32_config.mk index 441caa4..63c4789 100644 --- a/avr32_config.mk +++ b/avr32_config.mk @@ -23,3 +23,5 @@ PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax PLATFORM_LDFLAGS += --relax + +EXAMPLE_LOAD_ADDR = 0x00000000 diff --git a/blackfin_config.mk b/blackfin_config.mk index f3fcd7a..2e71e86 100644 --- a/blackfin_config.mk +++ b/blackfin_config.mk @@ -44,3 +44,5 @@ endif ifneq (,$(findstring s,$(MAKEFLAGS))) LDR_FLAGS += --quiet endif + +EXAMPLE_LOAD_ADDR = 0x1000 diff --git a/board/omap2420h4/config.mk b/board/omap2420h4/config.mk index 3edcde0..bbe6d5c 100644 --- a/board/omap2420h4/config.mk +++ b/board/omap2420h4/config.mk @@ -26,3 +26,5 @@ TEXT_BASE = 0x80e80000 #TEXT_BASE = 0x0 #TEXT_BASE = 0x08000000 #TEXT_BASE = 0x04000000 + +EXAMPLE_LOAD_ADDR = 0x80300000 diff --git a/cpu/arm_cortexa8/omap3/config.mk b/cpu/arm_cortexa8/omap3/config.mk index fbb753e..f96ff26 100644 --- a/cpu/arm_cortexa8/omap3/config.mk +++ b/cpu/arm_cortexa8/omap3/config.mk @@ -34,3 +34,5 @@ PLATFORM_CPPFLAGS +=$(call cc-option) PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,\ $(call cc-option,-malignment-traps,)) + +EXAMPLE_LOAD_ADDR = 0x80300000 diff --git a/examples/Makefile b/examples/Makefile index dbcfa92..348a25c 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -21,63 +21,28 @@ # MA 02111-1307 USA # -ifeq ($(ARCH),ppc) -LOAD_ADDR = 0x40000 -endif - -ifeq ($(ARCH),i386) -LOAD_ADDR = 0x40000 -endif - -ifeq ($(ARCH),arm) -ifeq ($(BOARD),omap2420h4) -LOAD_ADDR = 0x80300000 -else -ifeq ($(CPU),omap3) -LOAD_ADDR = 0x80300000 -else -LOAD_ADDR = 0xc100000 -endif -endif -endif - ifeq ($(ARCH),mips) -LOAD_ADDR = 0x80200000 -T mips.lds +EX_LDFLAGS += -T mips.lds endif ifeq ($(ARCH),nios) -LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds +EX_LDFLAGS += -L $(gcclibdir)/m32 -T nios.lds endif ifeq ($(ARCH),nios2) -LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds +EX_LDFLAGS += -L $(gcclibdir) -T nios2.lds endif ifeq ($(ARCH),m68k) -LOAD_ADDR = 0x20000 -L $(clibdir) -endif - -ifeq ($(ARCH),microblaze) -LOAD_ADDR = 0x80F00000 +EX_LDFLAGS += -L $(clibdir) endif -ifeq ($(ARCH),blackfin) -LOAD_ADDR = 0x1000 -endif - -ifeq ($(ARCH),avr32) -LOAD_ADDR = 0x00000000 -endif - -ifeq ($(ARCH),sh) -LOAD_ADDR = 0x8C000000 ifeq ($(CPU),sh2) BIG_ENDIAN=y endif -endif ifeq ($(ARCH),sparc) -LOAD_ADDR = 0x00000000 -L $(gcclibdir) -T sparc.lds +EX_LDFLAGS += -L $(gcclibdir) -T sparc.lds endif include $(TOPDIR)/config.mk @@ -176,7 +141,7 @@ $(LIB): $(obj).depend $(LIBOBJS) $(ELF): $(obj)%: $(obj)%.o $(LIB) - $(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \ + $(LD) -g $(EX_LDFLAGS) -Ttext $(EXAMPLE_LOAD_ADDR) \ -o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \ -L$(gcclibdir) -lgcc diff --git a/i386_config.mk b/i386_config.mk index 9e6d37d..07c5a9a 100644 --- a/i386_config.mk +++ b/i386_config.mk @@ -22,3 +22,5 @@ # PLATFORM_CPPFLAGS += -DCONFIG_I386 -D__I386__ + +EXAMPLE_LOAD_ADDR = 0x40000 diff --git a/m68k_config.mk b/m68k_config.mk index 12bd27c..5a38044 100644 --- a/m68k_config.mk +++ b/m68k_config.mk @@ -23,3 +23,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_M68K -D__M68K__ PLATFORM_LDFLAGS += -n + +EXAMPLE_LOAD_ADDR = 0x20000 diff --git a/microblaze_config.mk b/microblaze_config.mk index e44c79e..6cc45d5 100644 --- a/microblaze_config.mk +++ b/microblaze_config.mk @@ -25,3 +25,5 @@ # PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ + +EXAMPLE_LOAD_ADDR = 0x80F00000 diff --git a/mips_config.mk b/mips_config.mk index 05eb05d..8a51939 100644 --- a/mips_config.mk +++ b/mips_config.mk @@ -46,3 +46,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__ PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic PLATFORM_CPPFLAGS += -msoft-float PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib + +EXAMPLE_LOAD_ADDR = 0x80200000 diff --git a/nios2_config.mk b/nios2_config.mk index 3f23b56..7d444e3 100644 --- a/nios2_config.mk +++ b/nios2_config.mk @@ -24,3 +24,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ PLATFORM_CPPFLAGS += -ffixed-r15 -G0 + +EXAMPLE_LOAD_ADDR = 0x02000000 diff --git a/nios_config.mk b/nios_config.mk index 1cf0f32..1a4323b 100644 --- a/nios_config.mk +++ b/nios_config.mk @@ -23,3 +23,5 @@ # PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7 -gstabs + +EXAMPLE_LOAD_ADDR = 0x00800000 diff --git a/ppc_config.mk b/ppc_config.mk index c95b3b1..f25ceb4 100644 --- a/ppc_config.mk +++ b/ppc_config.mk @@ -37,3 +37,5 @@ endif ifeq ($(CROSS_COMPILE),powerpc-openbsd-) PLATFORM_CPPFLAGS+= -D__PPC__ endif + +EXAMPLE_LOAD_ADDR = 0x40000 diff --git a/sh_config.mk b/sh_config.mk index 49d50f7..8838e24 100644 --- a/sh_config.mk +++ b/sh_config.mk @@ -22,3 +22,5 @@ # PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__ + +EXAMPLE_LOAD_ADDR = 0x8C000000 diff --git a/sparc_config.mk b/sparc_config.mk index 87f745f..0526b79 100644 --- a/sparc_config.mk +++ b/sparc_config.mk @@ -22,3 +22,5 @@ # PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__ + +EXAMPLE_LOAD_ADDR = 0x00000000 -- 1.5.6.5

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[U-Boot] Pull request: u-boot-sh
by Nobuhiro Iwamatsu 15 Mar '09

15 Mar '09

Dear Wolfgang, Please pull u-boot-sh master branch. Best regards, Nobuhiro The following changes since commit 3c92217732edfc0016c3cbdc828471d013d23a36: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-sh.git/ master Nobuhiro Iwamatsu (2): sh: use write{8,16,32} in ms7720se lowlevel_init sh: Add netdev header fixing of warning/build Yoshihiro Shimoda (6): sh: Add macros for SH-4A 32-Bit Address Extended Mode sh: Add value for PCI system memory registration of sh7785lcr sh: Add system memory registration to PCI for SH4 sh: Add some register value configurable to PCI of SH7780 sh: Add support 32-Bit Extended Address Mode to sh7785lcr sh: Fix cannot work rtl8139 on r2dplus Yusuke.Goda (1): sh: ap325rxa: Change the wait cycle in the area 5 Makefile | 15 +++- board/ms7720se/lowlevel_init.S | 156 ++++++++---------------------- board/renesas/ap325rxa/lowlevel_init.S | 2 +- board/renesas/sh7785lcr/config.mk | 4 + board/renesas/sh7785lcr/lowlevel_init.S | 94 +++++++++++++++++++ board/renesas/sh7785lcr/sh7785lcr.c | 32 +++++++ board/renesas/sh7785lcr/u-boot.lds | 4 +- board/renesas/sh7785lcr/u-boot_29bit | 96 +++++++++++++++++++ board/renesas/sh7785lcr/u-boot_32bit | 96 +++++++++++++++++++ cpu/sh4/cpu.c | 1 + doc/README.sh7785lcr | 41 ++++++++ drivers/pci/pci_sh4.c | 10 ++ drivers/pci/pci_sh7780.c | 6 +- include/asm-sh/cpu_sh4.h | 25 +++++ include/configs/r2dplus.h | 3 + include/configs/r7780mp.h | 3 + include/configs/sh7785lcr.h | 26 +++++ 17 files changed, 493 insertions(+), 121 deletions(-) create mode 100644 board/renesas/sh7785lcr/u-boot_29bit create mode 100644 board/renesas/sh7785lcr/u-boot_32bit -- Nobuhiro Iwamatsu

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[U-Boot] Please pull u-boot-mpc83xx.git
by Kim Phillips 15 Mar '09

15 Mar '09

Hello WD, Please pull a couple of fixes for mpc83xx: The following changes since commit 3c92217732edfc0016c3cbdc828471d013d23a36: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Jerry Van Baren (1): mpc83xx: Add bank configuration to FSL spd_sdram.c Norbert van Bolhuis (1): mpc83xx: correctly set encryption and I2C bus 0 clock cpu/mpc83xx/cpu_init.c | 2 +- cpu/mpc83xx/spd_sdram.c | 16 ++++++++++------ 2 files changed, 11 insertions(+), 7 deletions(-) Thanks, Kim

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[U-Boot] ARM Pull Request
by Jean-Christophe PLAGNIOL-VILLARD 15 Mar '09

15 Mar '09

Hi Wolfgang, Please pull The following changes since commit 3c92217732edfc0016c3cbdc828471d013d23a36: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-arm.git master Dirk Behme (1): OMAP3: Add support for OMAP3 die ID board/omap3/beagle/beagle.c | 2 ++ board/omap3/evm/evm.c | 2 ++ board/omap3/overo/overo.c | 2 ++ board/omap3/pandora/pandora.c | 2 ++ board/omap3/zoom1/zoom1.c | 1 + cpu/arm_cortexa8/omap3/sys_info.c | 26 ++++++++++++++++++++++++++ include/asm-arm/arch-omap3/cpu.h | 13 +++++++++++++ include/asm-arm/arch-omap3/omap3.h | 1 + include/asm-arm/arch-omap3/sys_proto.h | 1 + 9 files changed, 50 insertions(+), 0 deletions(-) Best Regards, J.

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[U-Boot] PXA Pull request
by Jean-Christophe PLAGNIOL-VILLARD 15 Mar '09

15 Mar '09

Hi Wolfgang, please pull The following changes since commit 014c595f12d4f7e14cb10188f856465b2d41718f: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx are available in the git repository at: git://git.denx.de/u-boot-pxa.git master Jean-Christophe PLAGNIOL-VILLARD (1): PXA: timer use do_div and simplify it cpu/pxa/interrupts.c | 46 ++++++++++++++++++++++++---------------------- 1 files changed, 24 insertions(+), 22 deletions(-) Best Regards, J.

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[U-Boot] [GIT PULL] Please pull mpc5xxx tree
by John Rigby 15 Mar '09

15 Mar '09

The following changes since commit 3c92217732edfc0016c3cbdc828471d013d23a36: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx are available in the git repository at: git://git.denx.de/u-boot-mpc5xxx.git master Jon Smirl (1): MPC5200 FEC MII speed register drivers/net/mpc5xxx_fec.c | 23 ++++++++++++++++------- 1 files changed, 16 insertions(+), 7 deletions(-)

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[U-Boot] [PATCH] Add bank configuration to FSL spd_sdram.c
by Jerry Van Baren 15 Mar '09

15 Mar '09

The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8 bank SDRAMs. Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- I haven't made much headway on adapting the cpu/mpc8xxxx/ddr routines to the 83xx (8360). It has some 85xx (86xx) assumptions in that needs to be pulled out. Meanwhile, the cpu/mpc83xx/spd_sdram.c routine /almost/ worked for me. It turns out my DIMM stick has 8 banks which was being ignored (hard-coded for 4 banks). The enhancement below fixed that for me. It would be Really Good to get this verified and in the pending release. Best regards, gvb cpu/mpc83xx/spd_sdram.c | 8 +++++--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index df116aa..df1ccae 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -220,7 +220,8 @@ long int spd_sdram() ddr->cs_config[0] = ( 1 << 31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr - 12) << 8 + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) | (spd.ncol_addr - 8) ); debug("\n"); debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds); @@ -232,8 +233,9 @@ long int spd_sdram() ddr->cs_config[1] = ( 1<<31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr-12) << 8 - | (spd.ncol_addr-8) ); + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds); debug("cs1_config = 0x%08x\n",ddr->cs_config[1]); } -- 1.5.6.5

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[U-Boot] [PATCH] 83xx: correctly set encryption and I2C bus 0 clock
by Norbert van Bolhuis 15 Mar '09

15 Mar '09

This patch makes sure the correct mask is applied when setting the encryption and I2C bus 0 clock in SCCR. Failing to do so may lead to ENCCM being 0 in which case I2C bus 0 won't function. --- cpu/mpc83xx/cpu_init.c.org 2009-03-11 07:56:57.000000000 +0100 +++ cpu/mpc83xx/cpu_init.c 2009-03-11 07:57:37.000000000 +0100 @@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im) #ifdef CONFIG_SYS_SCCR_ENCCM /* Encryption clock mode */ im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) | - (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT); + (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT); #endif #ifdef CONFIG_SYS_SCCR_PCICM Signed-off-by: Norbert van Bolhuis <nvbolhuis(a)aimvalley.nl>

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