Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net>
---
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index da6cec1..f0c1771 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -1,4 +1,8 @@
/*
+ * Copyright (c) 2009 Sergey Kubushyn <ksi(a)koi8.net>
+ *
+ * Changes for multibus/multiadapter I2C support.
+ *
* (C) Copyright 2001, 2002
* Wolfgang Denk, DENX Software Engineering, wd(a)denx.de.
*
@@ -72,375 +76,493 @@ DECLARE_GLOBAL_DATA_PTR;
#define PRINTD(fmt,args...)
#endif
-#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
-#endif /* CONFIG_I2C_MULTI_BUS */
-
/*-----------------------------------------------------------------------
* Local functions
*/
-#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
-static void send_reset (void);
+#ifndef I2C_INIT
+#define I2C_INIT do {} while(0)
#endif
-static void send_start (void);
-static void send_stop (void);
-static void send_ack (int);
-static int write_byte (uchar byte);
-static uchar read_byte (int);
-
-#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
-/*-----------------------------------------------------------------------
- * Send a reset sequence consisting of 9 clocks with the data signal high
- * to clock any confused device back into an idle state. Also send a
- * <stop> at the end of the sequence for belts & suspenders.
- */
-static void send_reset(void)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
- int j;
-
- I2C_SCL(1);
- I2C_SDA(1);
-#ifdef I2C_INIT
- I2C_INIT;
+#ifndef I2C_INIT0
+#define I2C_INIT0 do {} while(0)
#endif
- I2C_TRISTATE;
- for(j = 0; j < 9; j++) {
- I2C_SCL(0);
- I2C_DELAY;
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_DELAY;
- }
- send_stop();
- I2C_TRISTATE;
-}
+#ifndef I2C_INIT1
+#define I2C_INIT1 do {} while(0)
+#endif
+#ifndef I2C_INIT2
+#define I2C_INIT2 do {} while(0)
#endif
+#ifndef I2C_INIT3
+#define I2C_INIT3 do {} while(0)
+#endif
+
/*-----------------------------------------------------------------------
* START: High -> Low on SDA while SCL is High
*/
-static void send_start(void)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
-
- I2C_DELAY;
- I2C_SDA(1);
- I2C_ACTIVE;
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_SDA(0);
- I2C_DELAY;
+#define I2C_SOFT_SEND_START(n) \
+static void send_start##n(void) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ I2C_DELAY##n; \
+ I2C_SDA##n(1); \
+ I2C_ACTIVE##n; \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_SDA##n(0); \
+ I2C_DELAY##n; \
}
+
/*-----------------------------------------------------------------------
* STOP: Low -> High on SDA while SCL is High
*/
-static void send_stop(void)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
-
- I2C_SCL(0);
- I2C_DELAY;
- I2C_SDA(0);
- I2C_ACTIVE;
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_SDA(1);
- I2C_DELAY;
- I2C_TRISTATE;
+#define I2C_SOFT_SEND_STOP(n) \
+static void send_stop##n(void) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_SDA##n(0); \
+ I2C_ACTIVE##n; \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_SDA##n(1); \
+ I2C_DELAY##n; \
+ I2C_TRISTATE##n; \
}
/*-----------------------------------------------------------------------
* ack should be I2C_ACK or I2C_NOACK
*/
-static void send_ack(int ack)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
-
- I2C_SCL(0);
- I2C_DELAY;
- I2C_ACTIVE;
- I2C_SDA(ack);
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_DELAY;
- I2C_SCL(0);
- I2C_DELAY;
+#define I2C_SOFT_SEND_ACK(n) \
+static void send_ack##n(int ack) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_ACTIVE##n; \
+ I2C_SDA##n(ack); \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_DELAY##n; \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
}
/*-----------------------------------------------------------------------
- * Send 8 bits and look for an acknowledgement.
- */
-static int write_byte(uchar data)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
- int j;
- int nack;
-
- I2C_ACTIVE;
- for(j = 0; j < 8; j++) {
- I2C_SCL(0);
- I2C_DELAY;
- I2C_SDA(data & 0x80);
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_DELAY;
-
- data <<= 1;
- }
-
- /*
- * Look for an <ACK>(negative logic) and return it.
- */
- I2C_SCL(0);
- I2C_DELAY;
- I2C_SDA(1);
- I2C_TRISTATE;
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- I2C_DELAY;
- nack = I2C_READ;
- I2C_SCL(0);
- I2C_DELAY;
- I2C_ACTIVE;
-
- return(nack); /* not a nack is an ack */
-}
-
-#if defined(CONFIG_I2C_MULTI_BUS)
-/*
- * Functions for multiple I2C bus handling
+ * Send a reset sequence consisting of 9 clocks with the data signal high
+ * to clock any confused device back into an idle state. Also send a
+ * <stop> at the end of the sequence for belts & suspenders.
*/
-unsigned int i2c_get_bus_num(void)
-{
- return i2c_bus_num;
+#define I2C_SOFT_SEND_RESET(n) \
+static void send_reset##n(void) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ int j; \
+ I2C_SCL##n(1); \
+ I2C_SDA##n(1); \
+ I2C_INIT##n; \
+ I2C_TRISTATE##n; \
+ for(j = 0; j < 9; j++) { \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_DELAY##n; \
+ } \
+ send_stop##n(); \
+ I2C_TRISTATE##n; \
}
-int i2c_set_bus_num(unsigned int bus)
-{
-#if defined(CONFIG_I2C_MUX)
- if (bus < CONFIG_SYS_MAX_I2C_BUS) {
- i2c_bus_num = bus;
- } else {
- int ret;
-
- ret = i2x_mux_select_mux(bus);
- if (ret == 0)
- i2c_bus_num = bus;
- else
- return ret;
- }
-#else
- if (bus >= CONFIG_SYS_MAX_I2C_BUS)
- return -1;
- i2c_bus_num = bus;
-#endif
- return 0;
-}
-/* TODO: add 100/400k switching */
-unsigned int i2c_get_bus_speed(void)
-{
- return CONFIG_SYS_I2C_SPEED;
+/*-----------------------------------------------------------------------
+ * Send 8 bits and look for an acknowledgement.
+ */
+#define I2C_SOFT_WRITE_BYTE(n) \
+static int write_byte##n(uchar data) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ int j; \
+ int nack; \
+ I2C_ACTIVE##n; \
+ for(j = 0; j < 8; j++) { \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_SDA##n(data & 0x80); \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_DELAY##n; \
+ data <<= 1; \
+ } \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_SDA##n(1); \
+ I2C_TRISTATE##n; \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ I2C_DELAY##n; \
+ nack = I2C_READ##n; \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_ACTIVE##n; \
+ return(nack); \
}
-int i2c_set_bus_speed(unsigned int speed)
-{
- if (speed != CONFIG_SYS_I2C_SPEED)
- return -1;
-
- return 0;
-}
-#endif
/*-----------------------------------------------------------------------
* if ack == I2C_ACK, ACK the byte so can continue reading, else
* send I2C_NOACK to end the read.
*/
-static uchar read_byte(int ack)
-{
- I2C_SOFT_DECLARATIONS /* intentional without ';' */
- int data;
- int j;
-
- /*
- * Read 8 bits, MSB first.
- */
- I2C_TRISTATE;
- I2C_SDA(1);
- data = 0;
- for(j = 0; j < 8; j++) {
- I2C_SCL(0);
- I2C_DELAY;
- I2C_SCL(1);
- I2C_DELAY;
- data <<= 1;
- data |= I2C_READ;
- I2C_DELAY;
- }
- send_ack(ack);
-
- return(data);
+#define I2C_SOFT_READ_BYTE(n) \
+static uchar read_byte##n(int ack) \
+{ \
+ I2C_SOFT_DECLARATIONS##n \
+ int data; \
+ int j; \
+ I2C_TRISTATE##n; \
+ I2C_SDA##n(1); \
+ data = 0; \
+ for(j = 0; j < 8; j++) { \
+ I2C_SCL##n(0); \
+ I2C_DELAY##n; \
+ I2C_SCL##n(1); \
+ I2C_DELAY##n; \
+ data <<= 1; \
+ data |= I2C_READ##n; \
+ I2C_DELAY##n; \
+ } \
+ send_ack##n(ack); \
+ return(data); \
}
-/*=====================================================================*/
-/* Public Functions */
-/*=====================================================================*/
-/*-----------------------------------------------------------------------
+/*============================================================*/
+/* I2C Ops */
+/*============================================================*/
+
+/*--------------------------------------------------------------
* Initialization
*/
-void i2c_init (int speed, int slaveaddr)
-{
-#if defined(CONFIG_SYS_I2C_INIT_BOARD)
- /* call board specific i2c bus reset routine before accessing the */
- /* environment, which might be in a chip on that bus. For details */
- /* about this problem see doc/I2C_Edge_Conditions. */
- i2c_init_board();
+
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+#define I2C_SOFT_INIT_ADAPTER(n) \
+static void soft_i2c_init##n(int speed, int slaveaddr) \
+{ \
+ /* call board specific i2c bus reset routine before accessing the */ \
+ /* environment, which might be in a chip on that bus. For details */ \
+ /* about this problem see doc/I2C_Edge_Conditions. */ \
+ SOFT_I2C_INIT_BOARD; \
+}
#else
- /*
- * WARNING: Do NOT save speed in a static variable: if the
- * I2C routines are called before RAM is initialized (to read
- * the DIMM SPD, for instance), RAM won't be usable and your
- * system will crash.
- */
- send_reset ();
-#endif
+#define I2C_SOFT_INIT_ADAPTER(n) \
+static void soft_i2c_init##n(int speed, int slaveaddr) \
+{ \
+ /* WARNING: Do NOT save speed in a static variable: if the */ \
+ /* I2C routines are called before RAM is initialized (to read */ \
+ /* the DIMM SPD, for instance), RAM won't be usable and your */ \
+ /* system will crash. */ \
+ send_reset##n(); \
}
+#endif
+
/*-----------------------------------------------------------------------
* Probe to see if a chip is present. Also good for checking for the
* completion of EEPROM writes since the chip stops responding until
* the write completes (typically 10mSec).
*/
-int i2c_probe(uchar addr)
-{
- int rc;
-
- /*
- * perform 1 byte write transaction with just address byte
- * (fake write)
- */
- send_start();
- rc = write_byte ((addr << 1) | 0);
- send_stop();
-
- return (rc ? 1 : 0);
+#define I2C_SOFT_PROBE(n) \
+static int soft_i2c_probe##n(uchar addr) \
+{ \
+ int rc; \
+ /* perform 1 byte write transaction with just address byte */ \
+ /* (fake write) */ \
+ send_start##n(); \
+ rc = write_byte##n((addr << 1) | 0); \
+ send_stop##n(); \
+ return (rc ? 1 : 0); \
}
+
/*-----------------------------------------------------------------------
* Read bytes
*/
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
- int shift;
- PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
- chip, addr, alen, buffer, len);
+#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
+#define RRSS_STOP 0
+#else
+#define RRSS_STOP 1
+#endif
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
- /*
- * EEPROM chips that implement "address overflow" are ones
- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
- * address and the extra bits end up in the "chip address"
- * bit slots. This makes a 24WC08 (1Kbyte) chip look like
- * four 256 byte chips.
- *
- * Note that we consider the length of the address field to
- * still be one byte because the extra address bits are
- * hidden in the chip address.
- */
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-
- PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
- chip, addr);
-#endif
+#define DO_EEAD_OVF chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); \
+ PRINTD("%s: fix addr_overflow: chip %02X addr %02X\n", \
+ __FUNCTION__, chip, addr);
- /*
- * Do the addressing portion of a write cycle to set the
- * chip's address pointer. If the address length is zero,
- * don't do the normal write cycle to set the address pointer,
- * there is no address pointer in this chip.
- */
- send_start();
- if(alen > 0) {
- if(write_byte(chip << 1)) { /* write cycle */
- send_stop();
- PRINTD("i2c_read, no chip responded %02X\n", chip);
- return(1);
- }
- shift = (alen-1) * 8;
- while(alen-- > 0) {
- if(write_byte(addr >> shift)) {
- PRINTD("i2c_read, address not <ACK>ed\n");
- return(1);
- }
- shift -= 8;
- }
-
- /* Some I2C chips need a stop/start sequence here,
- * other chips don't work with a full stop and need
- * only a start. Default behaviour is to send the
- * stop/start sequence.
- */
-#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
- send_start();
#else
- send_stop();
- send_start();
+#define DO_EEAD_OVF
#endif
- }
- /*
- * Send the chip address again, this time for a read cycle.
- * Then read the data. On the last byte, we do a NACK instead
- * of an ACK(len == 0) to terminate the read.
- */
- write_byte((chip << 1) | 1); /* read cycle */
- while(len-- > 0) {
- *buffer++ = read_byte(len == 0);
- }
- send_stop();
- return(0);
+
+#define I2C_SOFT_READ(n) \
+static int soft_i2c_read##n(uchar chip, uint addr, int alen, uchar *buffer, int len) \
+{ \
+ int shift; \
+ PRINTD("%s: chip %02X addr %02X alen %d buffer %p len %d\n", \
+ __FUNCTION__, chip, addr, alen, buffer, len); \
+ /* EEPROM chips that implement "address overflow" are ones */ \
+ /* like Catalyst 24WC04/08/16 which has 9/10/11 bits of */ \
+ /* address and the extra bits end up in the "chip address" */ \
+ /* bit slots. This makes a 24WC08 (1Kbyte) chip look like */ \
+ /* four 256 byte chips. */ \
+ /* */ \
+ /* Note that we consider the length of the address field to */ \
+ /* still be one byte because the extra address bits are */ \
+ /* hidden in the chip address. */ \
+ DO_EEAD_OVF \
+ /* Do the addressing portion of a write cycle to set the */ \
+ /* chip's address pointer. If the address length is zero, */ \
+ /* don't do the normal write cycle to set the address pointer, */ \
+ /* there is no address pointer in this chip. */ \
+ send_start##n(); \
+ if(alen > 0) { \
+ if(write_byte##n(chip << 1)) { /* write cycle */ \
+ send_stop##n(); \
+ PRINTD("%s, no chip responded %02X\n", __FUNCTION__, chip); \
+ return(1); \
+ } \
+ shift = (alen-1) * 8; \
+ while(alen-- > 0) { \
+ if(write_byte##n(addr >> shift)) { \
+ PRINTD("%s, address not <ACK>ed\n", __FUNCTION__); \
+ return(1); \
+ } \
+ shift -= 8; \
+ } \
+ if(RRSS_STOP) { \
+ send_stop##n(); /* reportedly some chips need a full stop */ \
+ } \
+ send_start##n(); \
+ } \
+ /* Send the chip address again, this time for a read cycle. */ \
+ /* Then read the data. On the last byte, we do a NACK instead */ \
+ /* of an ACK(len == 0) to terminate the read. */ \
+ write_byte##n((chip << 1) | 1); /* read cycle */ \
+ while(len-- > 0) { \
+ *buffer++ = read_byte##n(len == 0); \
+ } \
+ send_stop##n(); \
+ return(0); \
}
+
/*-----------------------------------------------------------------------
* Write bytes
*/
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
- int shift, failures = 0;
-
- PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
- chip, addr, alen, buffer, len);
-
- send_start();
- if(write_byte(chip << 1)) { /* write cycle */
- send_stop();
- PRINTD("i2c_write, no chip responded %02X\n", chip);
- return(1);
- }
- shift = (alen-1) * 8;
- while(alen-- > 0) {
- if(write_byte(addr >> shift)) {
- PRINTD("i2c_write, address not <ACK>ed\n");
- return(1);
- }
- shift -= 8;
- }
-
- while(len-- > 0) {
- if(write_byte(*buffer++)) {
- failures++;
- }
- }
- send_stop();
- return(failures);
+#define I2C_SOFT_WRITE(n) \
+static int soft_i2c_write##n(uchar chip, uint addr, int alen, uchar *buffer, int len) \
+{ \
+ int shift, failures = 0; \
+ PRINTD("%s: chip %02X addr %02X alen %d buffer %p len %d\n", \
+ __FUNCTION__, chip, addr, alen, buffer, len); \
+ send_start##n(); \
+ if(write_byte##n(chip << 1)) { /* write cycle */ \
+ send_stop##n(); \
+ PRINTD("%s, no chip responded %02X\n", __FUNCTION__, chip); \
+ return(1); \
+ } \
+ shift = (alen-1) * 8; \
+ while(alen-- > 0) { \
+ if(write_byte##n(addr >> shift)) { \
+ PRINTD("%s, address not <ACK>ed\n", __FUNCTION__); \
+ return(1); \
+ } \
+ shift -= 8; \
+ } \
+ while(len-- > 0) { \
+ if(write_byte##n(*buffer++)) { \
+ failures++; \
+ } \
+ } \
+ send_stop##n(); \
+ return(failures); \
+}
+
+
+#define I2C_SOFT_GET_BUS_SPEED(n) \
+static unsigned int soft_i2c_get_bus_speed##n(void) \
+{ \
+ return CONFIG_SYS_SOFT_I2C##n##_SPEED; \
+}
+
+
+#define I2C_SOFT_SET_BUS_SPEED(n) \
+static unsigned int soft_i2c_set_bus_speed##n(unsigned int speed) \
+{ \
+ if (speed != CONFIG_SYS_SOFT_I2C##n##_SPEED) \
+ return -1; \
+ return 0; \
}
+
+
+/*============================================================*/
+/* Here comes the real stuff */
+/*============================================================*/
+#if defined(I2C_SOFT_DECLARATIONS)
+I2C_SOFT_SEND_START()
+I2C_SOFT_SEND_STOP()
+I2C_SOFT_SEND_ACK()
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
+I2C_SOFT_SEND_RESET()
+#endif
+I2C_SOFT_WRITE_BYTE()
+I2C_SOFT_READ_BYTE()
+I2C_SOFT_INIT_ADAPTER()
+I2C_SOFT_PROBE()
+I2C_SOFT_READ()
+I2C_SOFT_WRITE()
+I2C_SOFT_GET_BUS_SPEED()
+I2C_SOFT_SET_BUS_SPEED()
+#elif defined(I2C_SOFT_DECLARATIONS0)
+I2C_SOFT_SEND_START(0)
+I2C_SOFT_SEND_STOP(0)
+I2C_SOFT_SEND_ACK(0)
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
+I2C_SOFT_SEND_RESET(0)
+#endif
+I2C_SOFT_WRITE_BYTE(0)
+I2C_SOFT_READ_BYTE(0)
+I2C_SOFT_INIT_ADAPTER(0)
+I2C_SOFT_PROBE(0)
+I2C_SOFT_READ(0)
+I2C_SOFT_WRITE(0)
+I2C_SOFT_GET_BUS_SPEED(0)
+I2C_SOFT_SET_BUS_SPEED(0)
+#endif
+
+#if defined(I2C_SOFT_DECLARATIONS1)
+I2C_SOFT_SEND_START(1)
+I2C_SOFT_SEND_STOP(1)
+I2C_SOFT_SEND_ACK(1)
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
+I2C_SOFT_SEND_RESET(1)
+#endif
+I2C_SOFT_WRITE_BYTE(1)
+I2C_SOFT_READ_BYTE(1)
+I2C_SOFT_INIT_ADAPTER(1)
+I2C_SOFT_PROBE(1)
+I2C_SOFT_READ(1)
+I2C_SOFT_WRITE(1)
+I2C_SOFT_GET_BUS_SPEED(1)
+I2C_SOFT_SET_BUS_SPEED(1)
+#endif
+
+#if defined(I2C_SOFT_DECLARATIONS2)
+I2C_SOFT_SEND_START(2)
+I2C_SOFT_SEND_STOP(2)
+I2C_SOFT_SEND_ACK(2)
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
+I2C_SOFT_SEND_RESET(2)
+#endif
+I2C_SOFT_WRITE_BYTE(2)
+I2C_SOFT_READ_BYTE(2)
+I2C_SOFT_INIT_ADAPTER(2)
+I2C_SOFT_PROBE(2)
+I2C_SOFT_READ(2)
+I2C_SOFT_WRITE(2)
+I2C_SOFT_GET_BUS_SPEED(2)
+I2C_SOFT_SET_BUS_SPEED(2)
+#endif
+
+#if defined(I2C_SOFT_DECLARATIONS3)
+I2C_SOFT_SEND_START(3)
+I2C_SOFT_SEND_STOP(3)
+I2C_SOFT_SEND_ACK(3)
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
+I2C_SOFT_SEND_RESET(3)
+#endif
+I2C_SOFT_WRITE_BYTE(3)
+I2C_SOFT_READ_BYTE(3)
+I2C_SOFT_INIT_ADAPTER(3)
+I2C_SOFT_PROBE(3)
+I2C_SOFT_READ(3)
+I2C_SOFT_WRITE(3)
+I2C_SOFT_GET_BUS_SPEED(3)
+I2C_SOFT_SET_BUS_SPEED(3)
+#endif
+
+i2c_adap_t soft_i2c_adap[] = {
+ {
+#if defined(I2C_SOFT_DECLARATIONS)
+ .init = soft_i2c_init,
+ .probe = soft_i2c_probe,
+ .read = soft_i2c_read,
+ .write = soft_i2c_write,
+ .set_bus_speed = soft_i2c_set_bus_speed,
+ .get_bus_speed = soft_i2c_get_bus_speed,
+ .speed = CONFIG_SYS_SOFT_I2C_SPEED,
+ .slaveaddr = CONFIG_SYS_SOFT_I2C_SLAVE,
+ .init_done = 0,
+ .name = "soft-i2c"
+#elif defined(I2C_SOFT_DECLARATIONS0)
+ .init = soft_i2c_init0,
+ .probe = soft_i2c_probe0,
+ .read = soft_i2c_read0,
+ .write = soft_i2c_write0,
+ .set_bus_speed = soft_i2c_set_bus_speed0,
+ .get_bus_speed = soft_i2c_get_bus_speed0,
+ .speed = CONFIG_SYS_SOFT_I2C0_SPEED,
+ .slaveaddr = CONFIG_SYS_SOFT_I2C0_SLAVE,
+ .init_done = 0,
+ .name = "soft-i2c#0"
+#endif
+ },
+#if defined(I2C_SOFT_DECLARATIONS1)
+ {
+ .init = soft_i2c_init1,
+ .probe = soft_i2c_probe1,
+ .read = soft_i2c_read1,
+ .write = soft_i2c_write1,
+ .set_bus_speed = soft_i2c_set_bus_speed1,
+ .get_bus_speed = soft_i2c_get_bus_speed1,
+ .speed = CONFIG_SYS_SOFT_I2C1_SPEED,
+ .slaveaddr = CONFIG_SYS_SOFT_I2C1_SLAVE,
+ .init_done = 0,
+ .name = "soft-i2c#1"
+ },
+#endif
+#if defined(I2C_SOFT_DECLARATIONS2)
+ {
+ .init = soft_i2c_init2,
+ .probe = soft_i2c_probe2,
+ .read = soft_i2c_read2,
+ .write = soft_i2c_write2,
+ .set_bus_speed = soft_i2c_set_bus_speed2,
+ .get_bus_speed = soft_i2c_get_bus_speed2,
+ .speed = CONFIG_SYS_SOFT_I2C2_SPEED,
+ .slaveaddr = CONFIG_SYS_SOFT_I2C2_SLAVE,
+ .init_done = 0,
+ .name = "soft-i2c#2"
+ },
+#endif
+#if defined(I2C_SOFT_DECLARATIONS3)
+ {
+ .init = soft_i2c_init3,
+ .probe = soft_i2c_probe3,
+ .read = soft_i2c_read3,
+ .write = soft_i2c_write3,
+ .set_bus_speed = soft_i2c_set_bus_speed3,
+ .get_bus_speed = soft_i2c_get_bus_speed3,
+ .speed = CONFIG_SYS_SOFT_I2C3_SPEED,
+ .slaveaddr = CONFIG_SYS_SOFT_I2C3_SLAVE,
+ .init_done = 0,
+ .name = "soft-i2c#3"
+ },
+#endif
+};
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index 7ee05e5..e6a5c03 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -229,14 +229,14 @@
/*
* I2C
*/
-#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_OFFSET 0x3000
+#define CONFIG_NEW_I2C /* New I2C code */
+#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
+#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_FSL_I2C_EEPROM_ADDR 0x57
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
+#define CONFIG_SYS_I2C_ADAPTERS {&fsl_i2c_adap[0]}
/*
* General PCI
diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h
index cf21fd9..ab7ada5 100644
--- a/include/configs/CPU86.h
+++ b/include/configs/CPU86.h
@@ -123,10 +123,12 @@
/*-----------------------------------------------------------------------
* I2C/EEPROM/RTC configuration
*/
-#define CONFIG_SOFT_I2C /* Software I2C support enabled */
-
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
+#define CONFIG_NEW_I2C
+#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/*
* Software (bit-bang) I2C driver configuration
*/
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index 489378a..5ce6ffc 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -127,10 +127,12 @@
/*-----------------------------------------------------------------------
* I2C/EEPROM/RTC configuration
*/
-#define CONFIG_SOFT_I2C /* Software I2C support enabled */
-
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
+#define CONFIG_NEW_I2C
+#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/*
* Software (bit-bang) I2C driver configuration
*/
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index a399d22..5404321 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -180,6 +180,11 @@
#endif
#ifdef CONFIG_SOFT_I2C
+#define CONFIG_NEW_I2C
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
#define PB_SCL 0x00000020 /* PB 26 */
#define PB_SDA 0x00000010 /* PB 27 */
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
index f6777b9..7459211 100644
--- a/include/configs/HIDDEN_DRAGON.h
+++ b/include/configs/HIDDEN_DRAGON.h
@@ -177,6 +177,11 @@
#ifdef CONFIG_SOFT_I2C
#error "Soft I2C is not configured properly. Please review!"
+#define CONFIG_NEW_I2C
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
diff --git a/include/configs/HMI10.h b/include/configs/HMI10.h
index 6c8e81f..fcba264 100644
--- a/include/configs/HMI10.h
+++ b/include/configs/HMI10.h
@@ -91,12 +91,12 @@
#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
+#define CONFIG_NEW_I2C
+#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 40000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/* Software (bit-bang) I2C driver configuration */
#define PB_SCL 0x00000020 /* PB 26 */
#define PB_SDA 0x00000010 /* PB 27 */
diff --git a/include/configs/IAD210.h b/include/configs/IAD210.h
index ca488c6..ac55062 100644
--- a/include/configs/IAD210.h
+++ b/include/configs/IAD210.h
@@ -109,10 +109,12 @@
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xDD
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_NEW_I2C
+#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xDD
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/*
* Software (bit-bang) I2C driver configuration
*/
@@ -131,6 +133,8 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+
/*
* Command line configuration.
diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h
index 917135e..71023b3 100644
--- a/include/configs/ICU862.h
+++ b/include/configs/ICU862.h
@@ -105,11 +105,12 @@
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+#define CONFIG_NEW_I2C
+#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/*
* Software (bit-bang) I2C driver configuration
*/
@@ -131,6 +132,9 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+
/*
* Command line configuration.
