June 2008 - U-Boot

[U-Boot-Users] Make sure your meds needs are covered
by Merante 15 Jun '08

15 Jun '08

We will price match any store that sells the same items for less http://www.lomianem.com/ -- Using Opera's revolutionary e-mail client: http://www.opera.com/mail/

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[U-Boot-Users] [PATCH][resubmit] MPC85xx, MPC83xx: Add/Fix UPM configuration support
by David Saada 15 Jun '08

15 Jun '08

Add support for UPM configuration on the 85xx platform. In addition, on the MPC83xx, remove MPC834x precompiler condition, in order to support all MPC83xx processors. Signed-off-by: David Saada <david.saada(a)ecitele.com> cpu/mpc83xx/cpu.c | 5 ---- cpu/mpc85xx/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/mpc85xx.h | 7 ++++- 3 files changed, 72 insertions(+), 6 deletions(-) --- a/cpu/mpc83xx/cpu.c 2008-05-15 01:42:46.000000000 +0300 +++ b/cpu/mpc83xx/cpu.c 2008-05-18 11:22:34.503036000 +0300 @@ -147,7 +147,6 @@ int checkcpu(void) */ void upmconfig (uint upm, uint *table, uint size) { -#if defined(CONFIG_MPC834X) volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile lbus83xx_t *lbus = &immap->lbus; volatile uchar *dummy = NULL; @@ -180,10 +179,6 @@ void upmconfig (uint upm, uint *table, u /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */ *mxmr &= 0xCFFFFFC0; -#else - printf("Error: %s() not defined for this configuration.\n", __FUNCTION__); - hang(); -#endif } --- a/cpu/mpc85xx/cpu.c 2008-05-15 01:42:46.000000000 +0300 +++ b/cpu/mpc85xx/cpu.c 2008-05-18 11:22:34.528046000 +0300 @@ -29,6 +29,7 @@ #include <watchdog.h> #include <command.h> #include <asm/cache.h> +#include "asm/immap_85xx.h" DECLARE_GLOBAL_DATA_PTR; @@ -274,3 +275,68 @@ int dma_xfer(void *dest, uint count, voi return dma_check(); } #endif + +/* + * Program a UPM with the code supplied in the table. + * + * The 'dummy' variable is used to increment the MAD. 'dummy' is + * supposed to be a pointer to the memory of the device being + * programmed by the UPM. The data in the MDR is written into + * memory and the MAD is incremented every time there's a read + * from 'dummy'. Unfortunately, the current prototype for this + * function doesn't allow for passing the address of this + * device, and changing the prototype will break a number lots + * of other code, so we need to use a round-about way of finding + * the value for 'dummy'. + * + * The value can be extracted from the base address bits of the + * Base Register (BR) associated with the specific UPM. To find + * that BR, we need to scan all BRs until we find the one that + * has its MSEL bits matching the UPM we want. Once we know the + * right BR, we can extract the base address bits from it. + * + * The MxMR and the BR and OR of the chosen bank should all be + * configured before calling this function. + * + * Parameters: + * upm: 0=UPMA, 1=UPMB, 2=UPMC + * table: Pointer to an array of values to program + * size: Number of elements in the array. Must be 64 or less. + */ +void upmconfig (uint upm, uint *table, uint size) +{ + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + volatile uchar *dummy = NULL; + const u32 msel = (upm + 4) << BRx_MS_SHIFT; /* What the MSEL field in BRn should be */ + volatile uint *mxmr = &lbc->mamr + upm; /* Pointer to mamr, mbmr, or mcmr */ + volatile uint *brx = &lbc->br0; /* Pointer to BRx */ + uint i; + + /* Scan all the banks to determine the base address of the device */ + for (i = 0; i < 8; i++) { + if ((*brx & BRx_MS_MSK) == msel) { + dummy = (uchar *) (*brx & BRx_BA_MSK); + break; + } + brx += 2; /* Skip to next BRx */ + } + + if (!dummy) { + printf("Error: %s() could not find matching BR\n", __FUNCTION__); + hang(); + } + + /* Set the OP field in the MxMR to "write" and the MAD field to 000000 */ + *mxmr = (*mxmr & 0xCFFFFFC0) | MxMR_OP_WARR; + + for (i = 0; i < size; i++) { + lbc->mdr = table[i]; + __asm__ __volatile__ ("sync"); + *dummy; /* Write the value to memory and increment MAD */ + __asm__ __volatile__ ("sync"); + } + + /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */ + *mxmr &= 0xCFFFFFC0; +} + --- a/include/mpc85xx.h 2008-05-15 01:42:46.000000000 +0300 +++ b/include/mpc85xx.h 2008-05-18 11:22:34.519035000 +0300 @@ -35,7 +35,10 @@ #define BRx_MS_UPMA 0x00000080 /* U.P.M.A Machine Select */ #define BRx_MS_UPMB 0x000000a0 /* U.P.M.B Machine Select */ #define BRx_MS_UPMC 0x000000c0 /* U.P.M.C Machine Select */ +#define BRx_MS_MSK 0x000000e0 /* Machine select mask */ +#define BRx_MS_SHIFT 5 /* Machine select shift */ #define BRx_PS_8 0x00000800 /* 8 bit port size */ +#define BRx_PS_16 0x00001000 /* 16 bit port size */ #define BRx_PS_32 0x00001800 /* 32 bit port size */ #define BRx_BA_MSK 0xffff8000 /* Base Address Mask */ @@ -53,8 +56,10 @@ #define ORxU_AM_MSK 0xffff8000 /* Address Mask Mask */ #define MxMR_OP_NORM 0x00000000 /* Normal Operation */ -#define MxMR_DSx_2_CYCL 0x00400000 /* 2 cycle Disable Period */ #define MxMR_OP_WARR 0x10000000 /* Write to Array */ +#define MxMR_DSx_2_CYCL 0x00400000 /* 2 cycle Disable Period */ +#define MxMR_DSx_3_CYCL 0x00800000 /* 3 cycle Disable Period */ +#define MxMR_GPL4_LPWT 0x00040000 /* LGPL4 Line in LUPWAIT mode */ #define MxMR_BSEL 0x80000000 /* Bus Select */ /* helpers to convert values into an OR address mask (GPCM mode) */

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[U-Boot-Users] Kiran added you as a friend on WAYN
by WAYN.com 15 Jun '08

15 Jun '08

Hi u-boot-users Kiran Choudary(http://www.wayn.com/waynprofile.html?member_key=12241497) and added you as a friend on WAYN (Where Are You Now?). To confirm that you are friends and join the worlds' largest travel and lifestyle community, click on the following link: http://www.wayn.com/waynfx.html?wci=link&id=1445&mks=&mx=12241497&cx=389572… WAYN has changed for the better and is now free to chat, share, search and join. You also have 3 unread messages Regards, WAYN This invitation was sent to u-boot-users(a)lists.sourceforge.net on behalf of Kiran Choudary(http://www.wayn.com/waynprofile.html?member_key=12241497) and If you do not wish to receive invitations from Kiran Choudary(http://www.wayn.com/waynprofile.html?member_key=12241497) and , click here (http://www.wayn.com/waynfx.html?wci=link&id=1446&mkeys=&hash=9449F85E328F49…) If you do not wish to receive invitations from any members, click here (http://www.wayn.com/waynfx.html?wci=link&id=1447&code=78BCC67431A41993555F9…)

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[U-Boot-Users] U-Boot and Linux on Walnut based board
by Brian S. Park 15 Jun '08

15 Jun '08

Hi, I'm trying to get the latest U-Boot 1.3.3 and Linux (any version) working on our custom board based on Walnut demo board. I have used U-Boot 1.0.0 and Linux 2.4.20 on our other similar board and that worked out well. However, a lot seems to have changed since then. Since I'm using ELDK 4.1 now (used ELDK 2.1 for the old project), the old code does not compile properly. So, I'm trying to get the latest code to work with our new board and are having some issues. 1. U-Boot 1.3.3 works. But it does not boot the old Linux image or Linux 2.4.25 (latest 2.4?) compiled using ELDK 4.1 2. U-Boot 1.0.0 boots Linux 2.4.25 (latest 2.4?) compiled using ELDK 4.1. Then I found out that the kernel parameter passing has changed and I should use powerpc architecture instead of ppc. But Linux 2.4.25 does not have powerpc architecture. So, I'm now trying 2.6 kernel. Using linux-2.6-latest.tar.bz2 from ftp://ftp.denx.de/pub/linux/. However, the powerpc architecture does not have walnut.c for configuring the board. I need to customize it since our custom board does not have FPGA. What's the best way to build linux kernel that works on U-Boot 1.3.3? Thanks. Brian =============================================================== Brian S. Park brian.park(a)corelis.com (562) 926-6727 x132 --------------------------------------------------------------- Everything we do helps our customers get to market FASTER with HIGHER quality and LOWER cost ===============================================================

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[U-Boot-Users] Can't get strong symbol to override weak one
by Ben Warren 14 Jun '08

14 Jun '08

Hi, Not specifically U-boot related, but hopefully a smart person here can help. I have a weak symbol defined as: int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); (1) I've created a new file in cpu/mpc83xx that includes a real implementation of the function: int cpu_eth_init(bd_t *bis) (2) Using objdump, I've verified that this function is making it into libmpc8xxx.a, however it doesn't get linked into the final U-boot executable. System.map shows cpu_eth_init at the same address as __def_eth_init. If I change (1) to: extern int cpu_eth_init(bd_t *bis), (2) gets linked in OK. Of course, that's not what I want to do. I've tried changing the order of the archives that get linked together by ld, but nothing seems to work. Since I don't really know what I'm doing, I guess that shouldn't be surprising. Any help would be appreciated. thanks, Ben

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[U-Boot-Users] Run Linux kernel from within a JFFS2 filesystem
by Giuseppe Modugno 14 Jun '08

14 Jun '08

Hi all, this is my first post in this mailing list. I hope I don't start with a FAQ. On my board I have installed U-Boot and I'm able to run Linux kernel and rootfs via Flash/Flash (ramdisk/image file) or TFTP/NFS. Of course, either ramdisk and nfs aren't suitable for my end application (ramdisk losts many RAM space and NFS won't be available). So I'd like to use a local root filesystem stored in the NOR Flash (a J30 Intel), starting from the small ramdisk I have and adding all software I need. I could divide my Flash memory in three partitions: - U-Boot bootloader (with the two sectors for its configuration) - Linux kernel image - JFFS2 root filesystem But I want to go futher and I want to save the linux kernel image file into the root JFFS2 filesystem. So I'll have only two main partitions: - U-Boot bootloader (...) - JFFS2 root filesystem (with linuk kernel image file saved inside) Is U-Boot able to run a kernel image file that is saved into a JFFS2 filesystem stored in the Flash? I think this is what happens on a desktop computer (where the bootloader is Grub and the root filesystem is on a hard-disk and the kernel is a file saved into it). I think it isn't so simple for U-Boot that is capable of running the application (linux kernel in my case) only at a specified memory address (it doesn't have any knowledge about JFFS2 filesystem, do it?). Many thanks for your comments and my compliments for the good work! Giuseppe

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[U-Boot-Users] I have a problem ! Thanks
by wdx12065 14 Jun '08

14 Jun '08

Hello, I am porting u-boot to LPC2210 . My cross tool is arm-linux-gcc . its version is 3.3.2 .the problem is ,when i calls a malloc function it always returns 0 . How can i handle it ? Thanks . 2008-06-14 Best Regards, Wu DongXing(吴东兴) wdx12065(a)sina.com School of Computer Science&Engineering Southeast University Tel:15950512065

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[U-Boot-Users] (no subject)
by 钟文辉 14 Jun '08

14 Jun '08

各位老总：您们好！诚祝：您们在2008年里；有鼠不尽的快乐！鼠不尽的收获！鼠不尽的钞票！　鼠不尽的幸福！鼠不尽的美满生活！愿：您们阖家欢乐！幸福安康！我公司可以长期提供：出口报关单，核销单，等等一系列手续；代理：出口报关，商检，境内外运输......等等；还可以代办：出口欧盟许可证，欧盟产地证；并且还有（广州国际贸易交易会）的摊位可以转让；价格特别优惠；有意者请来邮件或来电联系。谢谢合作！　电话：0755-81153047。　传真：0755-81172940。　手机：15817477278。　联系人：钟文辉。　电子邮箱:shanhu.dao@163.com 此致：敬礼！

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[U-Boot-Users] [PATCH V2] ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)
by Hugo Villeneuve 13 Jun '08

13 Jun '08

ARM: This patch adds support for the Lyrtech SFF-SDR board, based on the TI DaVinci architecture (ARM926EJS). Signed-off-by: Hugo Villeneuve <hugo.villeneuve(a)lyrtech.com> Signed-off-by: Philip Balister <philip(a)balister.org> --- MAKEALL | 1 + Makefile | 3 + board/davinci/sffsdr/Makefile | 52 +++++++++ board/davinci/sffsdr/board_init.S | 29 +++++ board/davinci/sffsdr/config.mk | 24 ++++ board/davinci/sffsdr/sffsdr.c | 214 +++++++++++++++++++++++++++++++++++++ board/davinci/sffsdr/u-boot.lds | 52 +++++++++ include/asm-arm/mach-types.h | 13 +++ include/configs/davinci_sffsdr.h | 173 ++++++++++++++++++++++++++++++ 9 files changed, 561 insertions(+), 0 deletions(-) diff --git a/MAKEALL b/MAKEALL index 37b4334..f53ceec 100755 --- a/MAKEALL +++ b/MAKEALL @@ -496,6 +496,7 @@ LIST_ARM9=" \ voiceblue \ davinci_dvevm \ davinci_schmoogie \ + davinci_sffsdr \ davinci_sonata \ " diff --git a/Makefile b/Makefile index 6548f8e..05d90aa 100644 --- a/Makefile +++ b/Makefile @@ -2408,6 +2408,9 @@ davinci_dvevm_config : unconfig davinci_schmoogie_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci +davinci_sffsdr_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci + davinci_sonata_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile new file mode 100644 index 0000000..8abee11 --- /dev/null +++ b/board/davinci/sffsdr/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S new file mode 100644 index 0000000..22d8adc --- /dev/null +++ b/board/davinci/sffsdr/board_init.S @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk new file mode 100644 index 0000000..e8a329c --- /dev/null +++ b/board/davinci/sffsdr/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# Lyrtech SFF SDR board (ARM926EJS) cpu +# see http://www.lyrtech.com/ for more information on Lyrtech +# +# SFF SDR board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 87FF'FFFF +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, +# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). +# +# we load ourself to 8400'0000 +# +# + +# Provide at least 32MB spacing between us and the Integrity kernel image +TEXT_BASE = 0x84000000 diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c new file mode 100644 index 0000000..1d77649 --- /dev/null +++ b/board/davinci/sffsdr/sffsdr.c @@ -0,0 +1,214 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +DECLARE_GLOBAL_DATA_PTR; + +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + switch (id) { + case DAVINCI_LPSC_VPSSSLV: + case DAVINCI_LPSC_EMAC: + case DAVINCI_LPSC_EMAC_WRAPPER: + case DAVINCI_LPSC_MDIO: + case DAVINCI_LPSC_USB: + case DAVINCI_LPSC_ATA: + case DAVINCI_LPSC_VLYNQ: + case DAVINCI_LPSC_UHPI: + case DAVINCI_LPSC_DDR_EMIF: + case DAVINCI_LPSC_AEMIF: + case DAVINCI_LPSC_MMC_SD: + case DAVINCI_LPSC_MEMSTICK: + case DAVINCI_LPSC_McBSP: + case DAVINCI_LPSC_GPIO: + *mdctl |= 0x200; + break; + } + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03); + while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Powerup the DSP */ + dsp_on(); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r(void) +{ + u_int8_t tmp[20], buf[10]; + int i = 0; + int clk = 0; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); + printf("DDR Clock: %dMHz\n", (clk / 2)); + + /* Configure I2C switch (PCA9543) to enable channel 0. */ + tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0; + if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, + CFG_I2C_PCA9543_ADDR_LEN, tmp, 1)) + printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); + + /* Set Ethernet MAC address from EEPROM. + * We must read 8 bytes because data is stored in little-endian. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x05A8, + CFG_I2C_EEPROM_ADDR_LEN, buf, 8)) { + printf("Read from EEPROM @ 0x%02x failed\n", + CFG_I2C_EEPROM_ADDR); + } else { + tmp[0] = 0xff; + for (i = 0; i < 6; i++) + tmp[0] &= buf[i]; + + if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { + sprintf((char *)&tmp[0], + "%02x:%02x:%02x:%02x:%02x:%02x", + buf[3], buf[2], buf[1], buf[0], + buf[7], buf[6]); + setenv("ethaddr", (char *)&tmp[0]); + } + } + + if (!eth_hw_init()) { + printf("Ethernet init failed\n"); + } else { + printf("ETH PHY: %s\n", phy.name); + } + + return(0); +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff --git a/board/davinci/sffsdr/u-boot.lds b/board/davinci/sffsdr/u-boot.lds new file mode 100644 index 0000000..a4fcd1a --- /dev/null +++ b/board/davinci/sffsdr/u-boot.lds @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss (NOLOAD) : { *(.bss) } + _end = .; +} diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h index aaf2ea2..b347857 100644 --- a/include/asm-arm/mach-types.h +++ b/include/asm-arm/mach-types.h @@ -1595,6 +1595,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_P300 1602 #define MACH_TYPE_XDACOMET 1603 #define MACH_TYPE_DEXFLEX2 1604 +#define MACH_TYPE_SFFSDR 1657 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -16500,6 +16501,18 @@ extern unsigned int __machine_arch_type; # define machine_is_schmoogie() (0) #endif +#ifdef CONFIG_MACH_SFFSDR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SFFSDR +# endif +# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR) +#else +# define machine_is_sffsdr() (0) +#endif + #ifdef CONFIG_MACH_AZTOOL # ifdef machine_arch_type # undef machine_arch_type diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h new file mode 100644 index 0000000..b62ea74 --- /dev/null +++ b/include/configs/davinci_sffsdr.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/*=======*/ +/* Board */ +/*=======*/ +#define SFFSDR +#define CFG_NAND_LARGEPAGE +#define CFG_USE_NAND +/*===================*/ +/* SoC Configuration */ +/*===================*/ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 +/*==================================================*/ +/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ +/*==================================================*/ +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 5 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 +/*=============*/ +/* Memory Info */ +/*=============*/ +#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ +#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ +/*====================*/ +/* Serial Driver info */ +/*====================*/ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */ +#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/*===================*/ +/* I2C Configuration */ +/*===================*/ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +/*==================================*/ +/* Network & Ethernet Configuration */ +/*==================================*/ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_OVERWRITE_ETHADDR_ONCE +/*=====================*/ +/* Flash & Environment */ +/*=====================*/ +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_128K +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CFG_NAND_BASE 0x02000000 +#define CFG_NAND_HW_ECC +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +/*=====================*/ +/* Board related stuff */ +/*=====================*/ +/*==========================================*/ +/* I2C switch definitions for PCA9543 chip */ +/* on Lyrtech SFF SDR board. */ +/* This chip has a single register. */ +/*==========================================*/ +#define CFG_I2C_PCA9543_ADDR 0x70 +#define CFG_I2C_PCA9543_ADDR_LEN 0 +#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ +/*==============================*/ +/* U-Boot general configuration */ +/*==============================*/ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +/* Print buffer size */ +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel + * load address. */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, + * may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/*===================*/ +/* Linux Information */ +/*===================*/ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND \ + "setenv setboot setenv bootargs \\$(bootargs);run setboot" + +/*=================*/ +/* U-Boot commands */ +/*=================*/ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_NAND +#define CONFIG_CMD_EEPROM +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +/*=======================*/ +/* KGDB support (if any) */ +/*=======================*/ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH V3] Add mechanisms for CPU and board-specific Ethernet initialization
by Ben Warren 13 Jun '08

13 Jun '08

This patch is the first step in cleaning up net/eth.c, by moving Ethernet initialization to CPU or board-specific code. Initial implementation is only on the Freescale TSEC controller, but others will be added soon. Signed-off-by: Ben Warren <biggerbadderben(a)gmail.com> --- This time around, instead of adding code to each board that implements TSEC, I implemented cpu_eth_init() in all architectures that have TSEC. Preferably, this would have gone in new files in the CPU directories, but 'ld' made it impossible to guarantee that the code would be linked into the final executable. Also, don't need include/netdev.h for now. cpu/mpc83xx/cpu.c | 20 ++++++++++++++++++++ cpu/mpc85xx/cpu.c | 30 ++++++++++++++++++++++++++++++ cpu/mpc86xx/cpu.c | 27 +++++++++++++++++++++++++++ net/eth.c | 26 ++++++++++---------------- 4 files changed, 87 insertions(+), 16 deletions(-) diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 36de78d..94d1a13 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -358,3 +358,23 @@ int dma_xfer(void *dest, u32 count, void *src) return ((int)dma_check()); } #endif /*CONFIG_DDR_ECC*/ + +#ifdef CONFIG_TSEC_ENET +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif + return 0; +} +#endif diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 9873383..7d82909 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -279,3 +279,33 @@ int dma_xfer(void *dest, uint count, void *src) { return dma_check(); } #endif + +#if defined(CONFIG_TSEC_ENET) || defined(CONFIGMPC85XX_FEC) +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif +#if defined(CONFIG_MPC85XX_FEC) + tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); +#else +#if defined(CONFIG_TSEC3) + tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); +#endif +#if defined(CONFIG_TSEC4) + tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#endif +#endif + return 0; +} +#endif diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 3c74764..79f227b 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -288,3 +288,30 @@ void mpc86xx_reginfo(void) printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7)); } + +#ifdef CONFIG_TSEC_ENET +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif +#if defined(CONFIG_TSEC3) + tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); +#endif +#if defined(CONFIG_TSEC4) + tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#endif + return 0; +} +#endif + diff --git a/net/eth.c b/net/eth.c index c4f24c6..f12b9ed 100644 --- a/net/eth.c +++ b/net/eth.c @@ -28,6 +28,12 @@ #if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) +/* CPU and board-specific Ethernet initializations. Aliased function + * signals caller to move on */ +static int __def_eth_init(bd_t *bis) {return -1;} +int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); +int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); + #ifdef CFG_GT_6426x extern int gt6426x_eth_initialize(bd_t *bis); #endif @@ -165,6 +171,10 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) miiphy_init(); #endif + /* Try board-specific initialization first. If it fails or isn't + * present, try the cpu-specific initialization */ + if (board_eth_init(bis) < 0) + cpu_eth_init(bis); #if defined(CONFIG_DB64360) || defined(CONFIG_CPCI750) mv6436x_eth_initialize(bis); @@ -196,22 +206,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_SK98) skge_initialize(bis); #endif -#if defined(CONFIG_TSEC1) - tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); -#endif -#if defined(CONFIG_TSEC2) - tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); -#endif -#if defined(CONFIG_MPC85XX_FEC) - tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); -#else -# if defined(CONFIG_TSEC3) - tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); -# endif -# if defined(CONFIG_TSEC4) - tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); -# endif -#endif #if defined(CONFIG_UEC_ETH1) uec_initialize(0); #endif -- 1.5.4.3

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