May 2008 - U-Boot

[U-Boot-Users] How to use tftp to book kernel image and mount remote root fs
by Steven Woody 14 May '08

14 May '08

Hi, The manual is not so clear. I want to boot from a remote image and mount remote root filesystem. It seems i've done the server side setup respecting to the manual, but for u-boot usage ( target side ) to do this, i am not so clear. Would anyone please show me simple steps? Thanks in advance. -- woody then sun rose thinly from the sea and the old man could see the other boats, low on the water and well in toward the shore, spread out across the current.

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[U-Boot-Users] U-Boot on MSP8110 Processor
by muthuselvan.sivam＠wipro.com 14 May '08

14 May '08

Hi, Is there any support available on u-boot for this processor (MSP8110). This processor incorporates a MIPS34K core. Rgds, Muthu Selvan.S

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[U-Boot-Users] MIPS: about vector install
by wangjiankun820624 14 May '08

14 May '08

The following maro define is from cup\mips\start.S.There are two arguments f and n in the code, but the second argument is not used. Why? I want to know in what condition the second argument n is usefull. Thank you! #define RVECENT(f,n) \ b f; nop

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[U-Boot-Users] Reg in SPI problem
by Karthikeyan Kadirvel, Chennai 13 May '08

13 May '08

Hi, I am developing dspi code(boot loader) for mcf54452 board. I am communicating processor with EEPROM (AT25080A) slave device. Write function is working fine. But the read function is not working. Write seq: ---------- 1. Send WREN command 2. Send write Instruction 3. Send address where to be data written 4. Send data Note: i checked the write seq by seeing the signals in scope. Every byte had been sent out (Sout) perfectly. Read seq: -------- 1. Send read Instruction 2. Send address where from the data to be read. Note: i checked the read seq by seeing the signals in scope. 1. No SCK signals 2. No DATA (Sin) 3. Chip select in inactive state (high) I checked with pdfs. i am not getting any solution for this problem. So can you guide me to solve this problem? Reply me as soon as possible Regards, Karthikeyan. DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. -----------------------------------------------------------------------------------------------------------------------

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[U-Boot-Users] usb write command available in u-boot??
by mahendra varman 13 May '08

13 May '08

Hi all In u-boot under common/cmd_usb.c there are commands for usb info , usb tree, usb reset, I can find usb read command also There is no command for usb write Is there is possibility to do a usb write command (eg .. writing some data into the flash memory stick) in u-boot level?? Thanks

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Re: [U-Boot-Users] bugs in flush_cache
by Eyal Bari 13 May '08

13 May '08

in your version of the function the iterated cache ops second argument was start_addr which stay constant. the second bug is that it doesn't iterate over the entire range: for example: if size is 42 and the cache line size is 32 - it takes two cache lines to cache this buffer your version will iterate only over one cache line my version will iterate over two cache line covering the entire range eyalb On Tue, May 13, 2008 at 4:19 PM, Shinya Kuribayashi <skuribay(a)ruby.dti.ne.jp> wrote: > Eyal Bari wrote: > > > hi, > > > > i found two bugs in your flush_cache routine: > > * it was only flushing the first cacheline in the range > > * the loop was running one cacheline short > > > > the fixed version: > > void flush_cache(ulong start_addr, ulong size) > > { > > unsigned long lsize = CFG_CACHELINE_SIZE; > > unsigned long addr = start_addr & ~(lsize - 1); > > unsigned long aend = (start_addr + size - 1 + lsize) & ~(lsize - 1); > > > > while (1) { > > cache_op(Hit_Writeback_Inv_D, addr); > > cache_op(Hit_Invalidate_I, addr); > > if (addr == aend) > > break; > > addr += lsize; > > } > > } > > > > eyalb > > > > Really? I don't think so. > > See Linux's include/asm-mips/r4kcache.h#413. This is the original. > > > http://git.kernel.org/?p=linux/kernel/git/ralf/linux.git;a=blob;f=include/a… > > Shinya > > P.S. If you don't mind, please add Cc: u-boot-users when replying. > >

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[U-Boot-Users] [RFC/PATCH] SPI API improvements
by Haavard Skinnemoen 13 May '08

13 May '08

From: Haavard Skinnemoen <hskinnemoen(a)atmel.com> This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates a given chipselect line * spi_cs_deactivate(): Deactivates a given chipselect line * spi_cs_is_valid(): Determines if the given chipselect line can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch hasn't been tested on all the boards involved, so there are probably a few issues. For now, I'd like some comments on the new interface -- if it looks good, we should spend some additional effort to validate that it doesn't introduce any breakage. I could use some help with this. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen(a)atmel.com> SPI API update New SPI API: Update soft_spi More SPI API updates --- board/amcc/taihu/taihu.c | 16 ++-- board/freescale/mpc8349emds/mpc8349emds.c | 25 +++--- board/sacsng/sacsng.c | 35 +++----- board/ssv/adnpesc1/adnpesc1.c | 27 +++--- common/cmd_spi.c | 28 +++--- common/soft_spi.c | 110 ++++++++++++++++------- cpu/nios/spi.c | 71 +++++++++++---- drivers/rtc/ds1306.c | 67 ++++++++++---- drivers/rtc/mc13783-rtc.c | 28 ++++++- drivers/spi/mpc8xxx_spi.c | 54 ++++++++++-- drivers/spi/mxc_spi.c | 71 +++++++++------ include/spi.h | 139 ++++++++++++++++++++++++----- 12 files changed, 478 insertions(+), 193 deletions(-) diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index eedde59..e8be434 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -165,16 +165,20 @@ unsigned char spi_read(void) return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15); } -void taihu_spi_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - gpio_write_bit(SPI_CS_GPIO0, cs); + return bus == 0 && cs == 0; } -spi_chipsel_type spi_chipsel[]= { - taihu_spi_chipsel -}; +void spi_cs_activate(unsigned int cs) +{ + gpio_write_bit(SPI_CS_GPIO0, 1); +} -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(unsigned int cs) +{ + gpio_write_bit(SPI_CS_GPIO0, 0); +} #ifdef CONFIG_PCI static unsigned char int_lines[32] = { diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 6c82596..5effd35 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -257,25 +257,24 @@ void sdram_init(void) #define SPI_CS_MASK 0x80000000 -void spi_eeprom_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(unsigned int cs) { volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; - if (cs) - iopd->dat &= ~SPI_CS_MASK; - else - iopd->dat |= SPI_CS_MASK; + iopd->dat &= ~SPI_CS_MASK; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_eeprom_chipsel, -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(unsigned int cs) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; + iopd->dat |= SPI_CS_MASK; +} #endif /* CONFIG_HARD_SPI */ #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 25209e0..c201008 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -842,37 +842,30 @@ void show_boot_progress (int status) #define SPI_ADC_CS_MASK 0x00000800 #define SPI_DAC_CS_MASK 0x00001000 -void spi_adc_chipsel(int cs) +static const u32 cs_mask[] = { + SPI_ADC_CS_MASK, + SPI_DAC_CS_MASK, +}; + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]); +} + +void spi_cs_activate(unsigned int cs) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */ + iopd->pdat &= ~cs_mask[cs]; } -void spi_dac_chipsel(int cs) +void spi_cs_deactivate(unsigned int cs) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */ + iopd->pdat |= cs_mask[cs]; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_adc_chipsel, - spi_dac_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); - #endif #endif /* CONFIG_MISC_INIT_R */ diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c index 2ec3a72..692f615 100644 --- a/board/ssv/adnpesc1/adnpesc1.c +++ b/board/ssv/adnpesc1/adnpesc1.c @@ -69,25 +69,24 @@ long int initdram (int board_type) #define SPI_RTC_CS_MASK 0x00000001 -void spi_rtc_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(unsigned int cs) { nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; - if (cs) - spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ - else - spi->slaveselect = 0; /* deactivate (0) */ + spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_rtc_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(unsigned int cs) +{ + nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; + + spi->slaveselect = 0; /* deactivate (0) */ +} #endif diff --git a/common/cmd_spi.c b/common/cmd_spi.c index 7604422..b0e7db1 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -38,19 +38,13 @@ #endif /* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; - -/* * Values from last command. */ static int device; static int bitlen; static uchar dout[MAX_SPI_BYTES]; static uchar din[MAX_SPI_BYTES]; +static struct spi_slave *slave; /* * SPI read/write @@ -65,6 +59,7 @@ static uchar din[MAX_SPI_BYTES]; int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + struct spi_slave *slave; char *cp = 0; uchar tmp; int j; @@ -101,19 +96,22 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } } - if ((device < 0) || (device >= spi_chipsel_cnt)) { - printf("Invalid device %d, giving up.\n", device); - return 1; - } if ((bitlen < 0) || (bitlen > (MAX_SPI_BYTES * 8))) { printf("Invalid bitlen %d, giving up.\n", bitlen); return 1; } - debug ("spi_chipsel[%d] = %08X\n", - device, (uint)spi_chipsel[device]); + /* FIXME: Make these parameters configurable */ + slave = spi_setup_slave(0, device, 1000000, SPI_MODE_0); + if (!slave) { + printf("Invalid device %d, giving up.\n", device); + return 1; + } + + debug ("spi chipsel = %08X\n", device); - if(spi_xfer(spi_chipsel[device], bitlen, dout, din) != 0) { + spi_claim_bus(slave); + if(spi_xfer(device, bitlen, dout, din) != 0) { printf("Error with the SPI transaction.\n"); rcode = 1; } else { @@ -123,6 +121,8 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } printf("\n"); } + spi_release_bus(slave); + spi_free_slave(slave); return rcode; } diff --git a/common/soft_spi.c b/common/soft_spi.c index e425061..76ffcd3 100644 --- a/common/soft_spi.c +++ b/common/soft_spi.c @@ -29,6 +29,8 @@ #if defined(CONFIG_SOFT_SPI) +#include <malloc.h> + /*----------------------------------------------------------------------- * Definitions */ @@ -39,6 +41,10 @@ #define PRINTD(fmt,args...) #endif +struct spi_slave { + unsigned int cs; + unsigned int mode; +}; /*=====================================================================*/ /* Public Functions */ @@ -56,6 +62,49 @@ void spi_init (void) #endif } +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->cs = cs; + slave->mode = mode; + + /* TODO: Use max_hz to limit the SCK rate */ + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + /* + * Make sure the SPI clock is in idle state as defined for + * this slave. + */ + if (slave->mode & SPI_CPOL) + SPI_SCL(1); + else + SPI_SCL(0); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + /* Nothing to do */ +} /*----------------------------------------------------------------------- * SPI transfer @@ -68,50 +117,53 @@ void spi_init (void) * and "din" can point to the same memory location, in which case the * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). - * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { #ifdef CFG_IMMR volatile immap_t *immr = (immap_t *)CFG_IMMR; #endif - uchar tmpdin = 0; - uchar tmpdout = 0; - int j; + uchar tmpdin = 0; + uchar tmpdout = 0; + const u8 *txd = dout; + u8 *rxd = din; + int cpol = slave->mode & SPI_CPOL; + int cpha = slave->mode & SPI_CPHA; + unsigned int j; - PRINTD("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *)dout, *(uint *)din, bitlen); + PRINTD("spi_xfer: chipsel %d dout %08X din %08X bitlen %u\n", + cs, *(uint *)txd, *(uint *)rxd, bitlen); - if(chipsel != NULL) { - (*chipsel)(1); /* select the target chip */ - } + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave->cs); for(j = 0; j < bitlen; j++) { /* * Check if it is time to work on a new byte. */ if((j % 8) == 0) { - tmpdout = *dout++; + tmpdout = *txd++; if(j != 0) { - *din++ = tmpdin; + *rxd++ = tmpdin; } tmpdin = 0; } - SPI_SCL(0); + + if (!cpha) + SPI_SCL(!cpol); SPI_SDA(tmpdout & 0x80); SPI_DELAY; - SPI_SCL(1); + if (cpha) + SPI_SCL(!cpol); + else + SPI_SCL(cpol); + tmpdin <<= 1; + tmpdin |= SPI_READ; + tmpdout <<= 1; SPI_DELAY; - tmpdin <<= 1; - tmpdin |= SPI_READ; - tmpdout <<= 1; + if (cpha) + SPI_SCL(cpol); } /* * If the number of bits isn't a multiple of 8, shift the last @@ -120,14 +172,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) */ if((bitlen % 8) != 0) tmpdin <<= 8 - (bitlen % 8); - *din++ = tmpdin; + *rxd++ = tmpdin; - SPI_SCL(0); /* SPI wants the clock left low for idle */ - - if(chipsel != NULL) { - (*chipsel)(0); /* deselect the target chip */ - - } + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave->cs); return(0); } diff --git a/cpu/nios/spi.c b/cpu/nios/spi.c index f37146b..7305875 100644 --- a/cpu/nios/spi.c +++ b/cpu/nios/spi.c @@ -40,6 +40,10 @@ #error "*** CFG_NIOS_SPIBITS should be either 8 or 16 ***" #endif +struct spi_slave { + unsigned int cs; +}; + static nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; /* Warning: @@ -63,10 +67,10 @@ static char quickhex (int i) return hex_digit[i]; } -static void memdump (void *pv, int num) +static void memdump (const void *pv, int num) { int i; - unsigned char *pc = (unsigned char *) pv; + const unsigned char *pc = (const unsigned char *) pv; for (i = 0; i < num; i++) printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f)); @@ -83,26 +87,58 @@ static void memdump (void *pv, int num) #endif /* DEBUG */ +struct spi_slave *spi_setup(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->cs = cs; + + /* TODO: Add support for different modes and speeds */ + + return slave; +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + +} + /* * SPI transfer: * * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf * for more informations. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout, + void *din, unsigned long flags) { + const u8 *txd = dout; + u8 *rxd = din; int j; DPRINT(("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", (int)chipsel, *(uint *)dout, *(uint *)din, bitlen)); - memdump((void*)dout, (bitlen + 7) / 8); + memdump(dout, (bitlen + 7) / 8); - if(chipsel != NULL) { - chipsel(1); /* select the target chip */ - } + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(cs); - if (bitlen > CFG_NIOS_SPIBITS) { /* leave chip select active */ + if (!(flags & SPI_XFER_END) || bitlen > CFG_NIOS_SPIBITS) { + /* leave chip select active */ spi->control |= NIOS_SPI_SSO; } @@ -114,11 +150,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) while ((spi->status & NIOS_SPI_TRDY) == 0) ; - spi->txdata = (unsigned)(dout[j]); + spi->txdata = (unsigned)(txd[j]); while ((spi->status & NIOS_SPI_RRDY) == 0) ; - din[j] = (unsigned char)(spi->rxdata & 0xff); + rxd[j] = (unsigned char)(spi->rxdata & 0xff); #elif (CFG_NIOS_SPIBITS == 16) j++, j++) { @@ -126,15 +162,15 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) while ((spi->status & NIOS_SPI_TRDY) == 0) ; if ((j+1) < ((bitlen + 7) / 8)) - spi->txdata = (unsigned)((dout[j] << 8) | dout[j+1]); + spi->txdata = (unsigned)((txd[j] << 8) | txd[j+1]); else - spi->txdata = (unsigned)(dout[j] << 8); + spi->txdata = (unsigned)(txd[j] << 8); while ((spi->status & NIOS_SPI_RRDY) == 0) ; - din[j] = (unsigned char)((spi->rxdata >> 8) & 0xff); + rxd[j] = (unsigned char)((spi->rxdata >> 8) & 0xff); if ((j+1) < ((bitlen + 7) / 8)) - din[j+1] = (unsigned char)(spi->rxdata & 0xff); + rxd[j+1] = (unsigned char)(spi->rxdata & 0xff); #else #error "*** unsupported value of CFG_NIOS_SPIBITS ***" @@ -146,11 +182,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) spi->control &= ~NIOS_SPI_SSO; } - if(chipsel != NULL) { - chipsel(0); /* deselect the target chip */ - } + if (flags & SPI_XFER_END) + spi_cs_deactivate(cs); - memdump((void*)din, (bitlen + 7) / 8); + memdump(din, (bitlen + 7) / 8); return 0; } diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c index 1c8ac7f..29854fc 100644 --- a/drivers/rtc/ds1306.c +++ b/drivers/rtc/ds1306.c @@ -62,13 +62,6 @@ #define RTC_USER_RAM_BASE 0x20 -/* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; - static unsigned int bin2bcd (unsigned int n); static unsigned char bcd2bin (unsigned char c); @@ -305,11 +298,29 @@ void rtc_reset (void) static unsigned char rtc_read (unsigned char reg); static void rtc_write (unsigned char reg, unsigned char val); +static struct spi_slave *slave; + /* read clock time from DS1306 and return it in *tmp */ int rtc_get (struct rtc_time *tmp) { unsigned char sec, min, hour, mday, wday, mon, year; + /* + * Assuming Vcc = 2.0V (lowest speed) + * + * REVISIT: If we add an rtc_init() function we can do this + * step just once. + */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + sec = rtc_read (RTC_SECONDS); min = rtc_read (RTC_MINUTES); hour = rtc_read (RTC_HOURS); @@ -318,6 +329,8 @@ int rtc_get (struct rtc_time *tmp) mon = rtc_read (RTC_MONTH); year = rtc_read (RTC_YEAR); + spi_release_bus(slave); + debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x\n", year, mon, mday, wday, hour, min, sec); @@ -360,6 +373,17 @@ int rtc_get (struct rtc_time *tmp) /* set clock time from *tmp in DS1306 RTC */ void rtc_set (struct rtc_time *tmp) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); @@ -371,6 +395,8 @@ void rtc_set (struct rtc_time *tmp) rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); + + spi_release_bus(slave); } /* ------------------------------------------------------------------------- */ @@ -378,6 +404,17 @@ void rtc_set (struct rtc_time *tmp) /* reset the DS1306 */ void rtc_reset (void) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + /* clear the control register */ rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ @@ -391,22 +428,18 @@ void rtc_reset (void) rtc_write (RTC_HOURS_ALARM1, 0x00); rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); + + spi_release_bus(slave); } /* ------------------------------------------------------------------------- */ static unsigned char rtc_read (unsigned char reg) { - unsigned char dout[2]; /* SPI Output Data Bytes */ - unsigned char din[2]; /* SPI Input Data Bytes */ - - dout[0] = reg; + int ret; - if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) { - return 0; - } else { - return din[1]; - } + ret = spi_w8r8(slave, reg); + return ret < 0 ? 0 : ret; } /* ------------------------------------------------------------------------- */ @@ -419,7 +452,7 @@ static void rtc_write (unsigned char reg, unsigned char val) dout[0] = 0x80 | reg; dout[1] = val; - spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din); + spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); } #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c index 35b1b8b..5a1ef4f 100644 --- a/drivers/rtc/mc13783-rtc.c +++ b/drivers/rtc/mc13783-rtc.c @@ -24,13 +24,24 @@ #include <rtc.h> #include <spi.h> +static struct spi_slave *slave; + int rtc_get(struct rtc_time *rtc) { u32 day1, day2, time; u32 reg; int err, tim, i = 0; - spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) { + /* FIXME: Verify the max SCK rate */ + slave = spi_setup_slave(1, 0, 1000000, + SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) + return -1; + } + + if (spi_claim_bus(slave)) + return -1; do { reg = 0x2c000000; @@ -52,6 +63,8 @@ int rtc_get(struct rtc_time *rtc) return err; } while (day1 != day2 && i++ < 3); + spi_release_bus(slave); + tim = day1 * 86400 + time; to_tm(tim, rtc); @@ -65,16 +78,29 @@ void rtc_set(struct rtc_time *rtc) { u32 time, day, reg; + if (!slave) { + /* FIXME: Verify the max SCK rate */ + slave = spi_setup_slave(1, 0, 1000000, + SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) + return; + } + time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday, rtc->tm_hour, rtc->tm_min, rtc->tm_sec); day = time / 86400; time %= 86400; + if (spi_claim_bus(slave)) + return; + reg = 0x2c000000 | day | 0x80000000; spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day); reg = 0x28000000 | time | 0x80000000; spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time); + + spi_release_bus(slave); } void rtc_reset(void) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 2fe838c..8efc51c 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -37,6 +37,35 @@ #define SPI_TIMEOUT 1000 +struct spi_slave { + unsigned int cs; +}; + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->cs = cs; + + /* + * TODO: Some of the code in spi_init() should probably move + * here. + */ + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + void spi_init(void) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; @@ -53,7 +82,18 @@ void spi_init(void) spi->com = 0; /* LST bit doesn't do anything, so disregard */ } -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + +} + +int spi_xfer(struct spi_slave *slave, int bitlen, uchar *dout, uchar *din, + unsigned long flags) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; unsigned int tmpdout, tmpdin, event; @@ -61,11 +101,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) int tm, isRead = 0; unsigned char charSize = 32; - debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); + debug("spi_xfer: chipsel %u dout %08X din %08X bitlen %u\n", + slave->cs, *(uint *) dout, *(uint *) din, bitlen); - if (chipsel != NULL) - (*chipsel) (1); /* select the target chip */ + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave->cs); spi->event = 0xffffffff; /* Clear all SPI events */ @@ -135,8 +175,8 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); } - if (chipsel != NULL) - (*chipsel) (0); /* deselect the target chip */ + if (flags & SPI_XFER_END) + spi_cs_deactivate(cs); return 0; } diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index b2e3ab9..8279e3e 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -61,17 +61,12 @@ static unsigned long spi_bases[] = { 0x53f84000, }; -static unsigned long spi_base; - #endif -spi_chipsel_type spi_chipsel[] = { - (spi_chipsel_type)0, - (spi_chipsel_type)1, - (spi_chipsel_type)2, - (spi_chipsel_type)3, +struct spi_slave { + unsigned long base; + u32 ctrl_reg; }; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); static inline u32 reg_read(unsigned long addr) { @@ -83,30 +78,31 @@ static inline void reg_write(unsigned long addr, u32 val) *(volatile unsigned long*)addr = val; } -static u32 spi_xchg_single(u32 data, int bitlen) +static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen) { - unsigned int cfg_reg = reg_read(spi_base + MXC_CSPICTRL); + unsigned int cfg_reg = reg_read(slave->base + MXC_CSPICTRL); if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg & MXC_CSPICTRL_BITCOUNT(31))) { cfg_reg = (cfg_reg & ~MXC_CSPICTRL_BITCOUNT(31)) | MXC_CSPICTRL_BITCOUNT(bitlen - 1); - reg_write(spi_base + MXC_CSPICTRL, cfg_reg); + reg_write(slave->base + MXC_CSPICTRL, cfg_reg); } - reg_write(spi_base + MXC_CSPITXDATA, data); + reg_write(slave->base + MXC_CSPITXDATA, data); cfg_reg |= MXC_CSPICTRL_XCH; - reg_write(spi_base + MXC_CSPICTRL, cfg_reg); + reg_write(slave->base + MXC_CSPICTRL, cfg_reg); - while (reg_read(spi_base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH) + while (reg_read(slave->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH) ; - return reg_read(spi_base + MXC_CSPIRXDATA); + return reg_read(slave->base + MXC_CSPIRXDATA); } -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) { int n_blks = (bitlen + 31) / 32; u32 *out_l, *in_l; @@ -117,13 +113,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) return 1; } - if (!spi_base) - spi_select(CONFIG_MXC_SPI_IFACE, (int)chipsel, SPI_MODE_2 | SPI_CS_HIGH); - for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout; i < n_blks; i++, in_l++, out_l++, bitlen -= 32) - *in_l = spi_xchg_single(*out_l, bitlen); + *in_l = spi_xchg_single(slave, *out_l, bitlen); return 0; } @@ -132,15 +125,15 @@ void spi_init(void) { } -int spi_select(unsigned int bus, unsigned int dev, unsigned long mode) +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) { unsigned int ctrl_reg; + struct spi_slave *slave; if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) || dev > 3) - return 1; - - spi_base = spi_bases[bus]; + return NULL; ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) | MXC_CSPICTRL_BITCOUNT(31) | @@ -155,12 +148,34 @@ int spi_select(unsigned int bus, unsigned int dev, unsigned long mode) if (mode & SPI_CS_HIGH) ctrl_reg |= MXC_CSPICTRL_SSPOL; - reg_write(spi_base + MXC_CSPIRESET, 1); + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->base = spi_bases[bus]; + slave->ctrl_reg = ctrl_reg; + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + reg_write(slave->base + MXC_CSPIRESET, 1); udelay(1); - reg_write(spi_base + MXC_CSPICTRL, ctrl_reg); - reg_write(spi_base + MXC_CSPIPERIOD, + reg_write(slave->base + MXC_CSPICTRL, slave->ctrl_reg); + reg_write(slave->base + MXC_CSPIPERIOD, MXC_CSPIPERIOD_32KHZ); - reg_write(spi_base + MXC_CSPIINT, 0); + reg_write(slave->base + MXC_CSPIINT, 0); return 0; } + +void spi_release_bus(struct spi_slave *slave) +{ + /* TODO: Shut the controller down */ +} diff --git a/include/spi.h b/include/spi.h index 3a55a68..b434402 100644 --- a/include/spi.h +++ b/include/spi.h @@ -31,22 +31,77 @@ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* chipselect active high? */ +#define SPI_CS_HIGH 0x04 /* CS active high */ #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define SPI_3WIRE 0x10 /* SI/SO signals shared */ #define SPI_LOOP 0x20 /* loopback mode */ -/* - * The function call pointer type used to drive the chip select. - */ -typedef void (*spi_chipsel_type)(int cs); +/* SPI transfer flags */ +#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ +#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ +/* Driver-specific SPI slave data */ +struct spi_slave; /*----------------------------------------------------------------------- * Initialization, must be called once on start up. + * + * TODO: I don't think we really need this. */ void spi_init(void); +/*----------------------------------------------------------------------- + * Set up communications parameters for a SPI slave. + * + * This must be called once for each slave. Note that this function + * usually doesn't touch any actual hardware, it only initializes the + * contents of spi_slave so that the hardware can be easily + * initialized later. + * + * bus: Bus ID of the slave chip. + * cs: Chip select ID of the slave chip on the specified bus. + * max_hz: Maximum SCK rate in Hz. + * mode: Clock polarity, clock phase and other parameters. + * + * Returns: A spi_slave reference that can be used in subsequent SPI + * calls, or NULL if one or more of the parameters are not supported. + */ +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode); + +/*----------------------------------------------------------------------- + * Free any memory associated with a SPI slave. + * + * slave: The SPI slave + */ +void spi_free_slave(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Claim the bus and prepare it for communication with a given slave. + * + * This must be called before doing any transfers with a SPI slave. It + * will enable and initialize any SPI hardware as necessary, and make + * sure that the SCK line is in the correct idle state. It is not + * allowed to claim the same bus for several slaves without releasing + * the bus in between. + * + * slave: The SPI slave + * + * Returns: 0 if the bus was claimed successfully, or a negative value + * if it wasn't. + */ +int spi_claim_bus(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Release the SPI bus + * + * This must be called once for every call to spi_claim_bus() after + * all transfers have finished. It may disable any SPI hardware as + * appropriate. + * + * slave: The SPI slave + */ +void spi_release_bus(struct spi_slave *slave); /*----------------------------------------------------------------------- * SPI transfer @@ -60,28 +115,66 @@ void spi_init(void); * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. - * * spi_xfer() interface: - * chipsel: Routine to call to set/clear the chip select: - * if chipsel is NULL, it is not used. - * if(cs), make the chip select active (typically '0'). - * if(!cs), make the chip select inactive (typically '1'). - * dout: Pointer to a string of bits to send out. The bits are - * held in a byte array and are sent MSB first. - * din: Pointer to a string of bits that will be filled in. - * bitlen: How many bits to write and read. + * slave: The SPI slave which will be sending/receiving the data. + * bitlen: How many bits to write and read. + * dout: Pointer to a string of bits to send out. The bits are + * held in a byte array and are sent MSB first. + * din: Pointer to a string of bits that will be filled in. + * flags: A bitwise combination of SPI_XFER_* flags. * * Returns: 0 on success, not 0 on failure */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din); +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags); + +/*----------------------------------------------------------------------- + * Determine if a SPI chipselect is valid. + * This function is provided by the board if the low-level SPI driver + * needs it to determine if a given chipselect is actually valid. + * + * Returns: 1 if cs identifies a valid chip, 0 otherwise. + */ +int spi_cs_is_valid(unsigned int bus, unsigned int cs); + +/*----------------------------------------------------------------------- + * Activate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should activate the chip select + * to the device identified by "cs". + */ +void spi_cs_activate(unsigned int cs); + +/*----------------------------------------------------------------------- + * Deactivate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should deactivate the chip + * select to the device identified by "cs". + */ +void spi_cs_deactivate(unsigned int cs); + +/*----------------------------------------------------------------------- + * Write 8 bits, then read 8 bits. + * slave: The SPI slave we're communicating with + * byte: Byte to be written + * + * Returns: The value that was read, or a negative value on error. + * + * TODO: This function probably shouldn't be inlined. + */ +static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) +{ + unsigned char dout[2]; + unsigned char din[2]; + int ret; + + dout[0] = byte; + dout[1] = 0; -int spi_select(unsigned int bus, unsigned int dev, unsigned long mode); + ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); + return ret < 0 ? ret : din[1]; +} #endif /* _SPI_H_ */ -- 1.5.5.1

4 8

[U-Boot-Users] [PATCH] Add proper copyright notices in Atmel boards Makefiles
by Stelian Pop 13 May '08

13 May '08

The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete copyright notice. This patch adds the missing pieces. Signed-off-by: Stelian Pop <stelian(a)popies.net> --- board/atmel/at91cap9adk/Makefile | 4 ++++ board/atmel/at91sam9260ek/Makefile | 4 ++++ 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/board/atmel/at91cap9adk/Makefile b/board/atmel/at91cap9adk/Makefile index e33af76..f2b9c12 100644 --- a/board/atmel/at91cap9adk/Makefile +++ b/board/atmel/at91cap9adk/Makefile @@ -2,6 +2,10 @@ # (C) Copyright 2003-2008 # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. # +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# # See file CREDITS for list of people who contributed to this # project. # diff --git a/board/atmel/at91sam9260ek/Makefile b/board/atmel/at91sam9260ek/Makefile index e6e4082..f93540a 100644 --- a/board/atmel/at91sam9260ek/Makefile +++ b/board/atmel/at91sam9260ek/Makefile @@ -2,6 +2,10 @@ # (C) Copyright 2003-2008 # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. # +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# # See file CREDITS for list of people who contributed to this # project. # -- 1.5.3.3

1 0

[U-Boot-Users] Flash CFI detection code.
by Kári Davíðsson 13 May '08

13 May '08

Hi, We have an flash (CFI) connected through an 8 bit bus. What happens is that the call to cmdset_amd_init() is called with portwidth set to 2 resulting in flash_info_t::manufacturer_id equal to 0 and also flash_info_t::device_id is set to 0. This is because the commandpatterns are wrong for 8 bit devices. Later on in the flash_get_size() function the portwidth is set to 1 as it should be (around line 1807). After that the cmdset_amd_init() can be called and the manufacturer_id and device_id are set correctly.... Maybe this does not make sense but the patch below allows me to read the manufacturer_id and device_id correctly. If this is applicable in general for all boards I have no idea. The patch is against u-boot-1.3.2. rg kd Index: drivers/mtd/cfi_flash.c =================================================================== --- drivers/mtd/cfi_flash.c (revision 283) +++ drivers/mtd/cfi_flash.c (working copy) @@ -102,9 +102,9 @@ #define AMD_STATUS_ERROR 0x20 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 -#define FLASH_OFFSET_DEVICE_ID 0x01 -#define FLASH_OFFSET_DEVICE_ID2 0x0E -#define FLASH_OFFSET_DEVICE_ID3 0x0F +#define FLASH_OFFSET_DEVICE_ID ((info->portwidth == FLASH_CFI_8BIT) ? 0x02 : 0x01) +#define FLASH_OFFSET_DEVICE_ID2 ((info->portwidth == FLASH_CFI_8BIT) ? 0x1C : 0x0E) +#define FLASH_OFFSET_DEVICE_ID3 ((info->portwidth == FLASH_CFI_8BIT) ? 0x1E : 0x0F) #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_ALT 0x555 #define FLASH_OFFSET_CFI_RESP 0x10 @@ -1695,11 +1695,8 @@ switch (info->vendor) { case CFI_CMDSET_INTEL_STANDARD: case CFI_CMDSET_INTEL_EXTENDED: - cmdset_intel_init(info, &qry); - break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: - cmdset_amd_init(info, &qry); break; default: printf("CFI: Unknown command set 0x%x\n", @@ -1811,6 +1808,17 @@ } } + switch (info->vendor) { + case CFI_CMDSET_INTEL_STANDARD: + case CFI_CMDSET_INTEL_EXTENDED: + cmdset_intel_init(info, &qry); + break; + case CFI_CMDSET_AMD_STANDARD: + case CFI_CMDSET_AMD_EXTENDED: + cmdset_amd_init(info, &qry); + break; + } + flash_write_cmd (info, 0, 0, info->cmd_reset); return (info->size); }

1 0

[U-Boot-Users] MIPS:Start.S
by wangjiankun820624 13 May '08

13 May '08

I want to know the function of the section following below in cpu\mips\start.S. Thank you! #endif RVECENT(romReserved,3) RVECENT(romReserved,4) RVECENT(romReserved,5) RVECENT(romReserved,6) RVECENT(romReserved,7) RVECENT(romReserved,8) RVECENT(romReserved,9) RVECENT(romReserved,10) RVECENT(romReserved,11) RVECENT(romReserved,12) RVECENT(romReserved,13) RVECENT(romReserved,14) RVECENT(romReserved,15) RVECENT(romReserved,16) RVECENT(romReserved,17) RVECENT(romReserved,18) RVECENT(romReserved,19) RVECENT(romReserved,20) RVECENT(romReserved,21) RVECENT(romReserved,22) RVECENT(romReserved,23) RVECENT(romReserved,24) RVECENT(romReserved,25) RVECENT(romReserved,26) RVECENT(romReserved,27) RVECENT(romReserved,28) RVECENT(romReserved,29) RVECENT(romReserved,30) RVECENT(romReserved,31) RVECENT(romReserved,32) RVECENT(romReserved,33) RVECENT(romReserved,34) RVECENT(romReserved,35) RVECENT(romReserved,36) RVECENT(romReserved,37) RVECENT(romReserved,38) RVECENT(romReserved,39) RVECENT(romReserved,40) RVECENT(romReserved,41) RVECENT(romReserved,42) RVECENT(romReserved,43) RVECENT(romReserved,44) RVECENT(romReserved,45) RVECENT(romReserved,46) RVECENT(romReserved,47) RVECENT(romReserved,48) RVECENT(romReserved,49) RVECENT(romReserved,50) RVECENT(romReserved,51) RVECENT(romReserved,52) RVECENT(romReserved,53) RVECENT(romReserved,54) RVECENT(romReserved,55) RVECENT(romReserved,56) RVECENT(romReserved,57) RVECENT(romReserved,58) RVECENT(romReserved,59) RVECENT(romReserved,60) RVECENT(romReserved,61) RVECENT(romReserved,62) RVECENT(romReserved,63) XVECENT(romExcHandle,0x200) /* bfc00200: R4000 tlbmiss vector */ RVECENT(romReserved,65) RVECENT(romReserved,66) RVECENT(romReserved,67) RVECENT(romReserved,68) RVECENT(romReserved,69) RVECENT(romReserved,70) RVECENT(romReserved,71) RVECENT(romReserved,72) RVECENT(romReserved,73) RVECENT(romReserved,74) RVECENT(romReserved,75) RVECENT(romReserved,76) RVECENT(romReserved,77) RVECENT(romReserved,78) RVECENT(romReserved,79) XVECENT(romExcHandle,0x280) /* bfc00280: R4000 xtlbmiss vector */ RVECENT(romReserved,81) RVECENT(romReserved,82) RVECENT(romReserved,83) RVECENT(romReserved,84) RVECENT(romReserved,85) RVECENT(romReserved,86) RVECENT(romReserved,87) RVECENT(romReserved,88) RVECENT(romReserved,89) RVECENT(romReserved,90) RVECENT(romReserved,91) RVECENT(romReserved,92) RVECENT(romReserved,93) RVECENT(romReserved,94) RVECENT(romReserved,95) XVECENT(romExcHandle,0x300) /* bfc00300: R4000 cache vector */ RVECENT(romReserved,97) RVECENT(romReserved,98) RVECENT(romReserved,99) RVECENT(romReserved,100) RVECENT(romReserved,101) RVECENT(romReserved,102) RVECENT(romReserved,103) RVECENT(romReserved,104) RVECENT(romReserved,105) RVECENT(romReserved,106) RVECENT(romReserved,107) RVECENT(romReserved,108) RVECENT(romReserved,109) RVECENT(romReserved,110) RVECENT(romReserved,111) XVECENT(romExcHandle,0x380) /* bfc00380: R4000 general vector */ RVECENT(romReserved,113) RVECENT(romReserved,114) RVECENT(romReserved,115) RVECENT(romReserved,116) RVECENT(romReserved,116) RVECENT(romReserved,118) RVECENT(romReserved,119) RVECENT(romReserved,120) RVECENT(romReserved,121) RVECENT(romReserved,122) RVECENT(romReserved,123) RVECENT(romReserved,124) RVECENT(romReserved,125) RVECENT(romReserved,126) RVECENT(romReserved,127) XVECENT(romExcHandle,0x400) /* bfc00400: */ RVECENT(romReserved,129) RVECENT(romReserved,130) RVECENT(romReserved,131) RVECENT(romReserved,132) RVECENT(romReserved,133) RVECENT(romReserved,134) RVECENT(romReserved,135) RVECENT(romReserved,136) RVECENT(romReserved,137) RVECENT(romReserved,138) RVECENT(romReserved,139) RVECENT(romReserved,140) RVECENT(romReserved,141) RVECENT(romReserved,142) RVECENT(romReserved,143) RVECENT(debugHandler,0x480) /* bfc00480: Debug vector*/ RVECENT(romReserved,145) RVECENT(romReserved,146) RVECENT(romReserved,147) RVECENT(romReserved,148) RVECENT(romReserved,149) RVECENT(romReserved,150) RVECENT(romReserved,151) RVECENT(romReserved,152) RVECENT(romReserved,153) RVECENT(romReserved,154) RVECENT(romReserved,155) RVECENT(romReserved,156) RVECENT(romReserved,157) RVECENT(romReserved,158) RVECENT(romReserved,159) /* Reserve extra space so that when we use the boot bus local memory ** segment to remap the debug exception vector we don't overwrite ** anything useful */

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