April 2008 - U-Boot

[U-Boot-Users] [PATCH 1/3] doc: english polishing for README.sata
by Dave Liu 14 Apr '08

14 Apr '08

according to gvb's suggestion, polishing for the doc. Signed-off-by: Jerry Van Baren <gerald.vanbaren(a)ge.com> Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- doc/README.sata | 24 ++++++++++++------------ 1 files changed, 12 insertions(+), 12 deletions(-) diff --git a/doc/README.sata b/doc/README.sata index 168dc7f..d0ce667 100644 --- a/doc/README.sata +++ b/doc/README.sata @@ -1,11 +1,11 @@ 1. SATA usage in U-boot - Two ways to operate the hard disk + There are two ways to operate the hard disk - * Raw read/write block from/to SATA hard disk; - * ext2load read file from ext2 filesytem in hard disk + * Read/write raw blocks from/to SATA hard disk + * ext2load to read a file from ext2 file system -1.0 How to know the information of SATA hard disk? +1.0 How to read the SATA hard disk's information? => sata info @@ -14,11 +14,12 @@ SATA device 0: Model: ST3320620AS Firm: 3.AAD Ser#: 4QF01ZTN Supports 48-bit addressing Capacity: 305245.3 MB = 298.0 GB (625142448 x 512) -1.1 How to save the kernel, filesystem, dtb to SATA hard disk with raw? +1.1 How to raw write the kernel, file system, dtb to a SATA hard disk? - Notes: 0x1000 sectors = 2 MBytes + Notes: Hard disk sectors are normally 512 bytes, so + 0x1000 sectors = 2 MBytes - wirte kernel + write kernel => tftp 40000 /tftpboot/uImage.837x => sata write 40000 0 2000 @@ -30,7 +31,7 @@ SATA device 0: Model: ST3320620AS Firm: 3.AAD Ser#: 4QF01ZTN => tftp 40000 /tftpboot/mpc837xemds.dtb => sata write 40000 a000 1000 -1.2 How to read the kernel, filesystem, dtb from SATA hard disk with raw? +1.2 How to raw read the kernel, file system, dtb from a SATA hard disk? load kernel => sata read 200000 0 2000 @@ -44,11 +45,10 @@ SATA device 0: Model: ST3320620AS Firm: 3.AAD Ser#: 4QF01ZTN boot => bootm 200000 1000000 2000000 -1.3 How to load image from ext2 filesystem in U-boot? +1.3 How to load an image from an ext2 file system in U-boot? - U-boot doesn't support ext2 write to hard disk, so - you have to write the image to hard disk under Linux env, - before you load image from ext2 filesystem. + U-boot doesn't support writing to an ext2 file system, so the + files must be written by other means (e.g. linux). => ext2ls sata 0:1 / <DIR> 4096 . -- 1.5.4.rc4

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[U-Boot-Users] [PATCH] Fix warnings introduced by I2C bus speed setting patch
by Kumar Gala 14 Apr '08

14 Apr '08

Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/i2c/fsl_i2c.c | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index dde0571..9f2c1ec 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -117,7 +117,6 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, { unsigned short divider = min(i2c_clk / speed, (unsigned short) -1); unsigned int i; - u8 fdr, dfsr; /* * We want to choose an FDR/DFSR that generates an I2C bus speed that @@ -128,15 +127,15 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev, for (i = 0; i < ARRAY_SIZE(fsl_i2c_speed_map); i++) if (fsl_i2c_speed_map[i].divider >= divider) { + u8 fdr, dfsr; dfsr = fsl_i2c_speed_map[i].dfsr; fdr = fsl_i2c_speed_map[i].fdr; speed = i2c_clk / fsl_i2c_speed_map[i].divider; + writeb(fdr, &dev->fdr); /* set bus speed */ + writeb(dfsr, &dev->dfsrr); /* set default filter */ break; } - writeb(fdr, &dev->fdr); /* set bus speed */ - writeb(dfsr, &dev->dfsrr); /* set default filter */ - return speed; } -- 1.5.4.1

2 1

[U-Boot-Users] [PATCH v2 6/7] Phytec Phycore-i.MX31 support
by Guennadi Liakhovetski 14 Apr '08

14 Apr '08

From: Sascha Hauer <s.hauer(a)pengutronix.de> This patch adds support for the Phytec Phycore-i.MX31 board Signed-off-by: Sascha Hauer <s.hauer(a)pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg(a)denx.de> --- Changes since v1: removed C++ style comments, disabled CONFIG_FIT, fixed CONFIG_CMD_* macros MAKEALL | 1 + Makefile | 3 + board/imx31_phycore/Makefile | 51 ++++++ board/{imx31_litekit => imx31_phycore}/config.mk | 0 board/imx31_phycore/imx31_phycore.c | 74 +++++++++ board/imx31_phycore/lowlevel_init.S | 104 ++++++++++++ board/{imx31_litekit => imx31_phycore}/u-boot.lds | 0 include/configs/imx31_phycore.h | 178 +++++++++++++++++++++ 8 files changed, 411 insertions(+), 0 deletions(-) create mode 100644 board/imx31_phycore/Makefile copy board/{imx31_litekit => imx31_phycore}/config.mk (100%) create mode 100644 board/imx31_phycore/imx31_phycore.c create mode 100644 board/imx31_phycore/lowlevel_init.S copy board/{imx31_litekit => imx31_phycore}/u-boot.lds (100%) create mode 100644 include/configs/imx31_phycore.h diff --git a/MAKEALL b/MAKEALL index 5bc2a12..0ca866f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -503,6 +503,7 @@ LIST_ARM11=" \ omap2420h4 \ apollon \ imx31_litekit \ + imx31_phycore \ " ######################################################################### diff --git a/Makefile b/Makefile index 62306a4..b3cbb20 100644 --- a/Makefile +++ b/Makefile @@ -2598,6 +2598,9 @@ apollon_config : unconfig imx31_litekit_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 imx31_litekit NULL mx31 +imx31_phycore_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31 + #======================================================================== # i386 #======================================================================== diff --git a/board/imx31_phycore/Makefile b/board/imx31_phycore/Makefile new file mode 100644 index 0000000..cb0e8e8 --- /dev/null +++ b/board/imx31_phycore/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := imx31_phycore.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/imx31_litekit/config.mk b/board/imx31_phycore/config.mk similarity index 100% copy from board/imx31_litekit/config.mk copy to board/imx31_phycore/config.mk diff --git a/board/imx31_phycore/imx31_phycore.c b/board/imx31_phycore/imx31_phycore.c new file mode 100644 index 0000000..0d95b63 --- /dev/null +++ b/board/imx31_phycore/imx31_phycore.c @@ -0,0 +1,74 @@ +/* + * + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer(a)pengutronix.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <common.h> +#include <asm/arch/mx31.h> +#include <asm/arch/mx31-regs.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int board_init (void) +{ + __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */ + __REG(CSCR_L(0)) = 0x10000d03; + __REG(CSCR_A(0)) = 0x00720900; + + __REG(CSCR_U(1)) = 0x0000df06; /* CS1: Network Controller */ + __REG(CSCR_L(1)) = 0x444a4541; + __REG(CSCR_A(1)) = 0x44443302; + + __REG(CSCR_U(4)) = 0x0000d843; /* CS4: SRAM */ + __REG(CSCR_L(4)) = 0x22252521; + __REG(CSCR_A(4)) = 0x22220a00; + + /* setup pins for UART1 */ + mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); + mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); + mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); + mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + + /* setup pins for I2C2 (for EEPROM, RTC) */ + mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL); + mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SCL); + + gd->bd->bi_arch_number = 447; /* board id for linux */ + gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */ + + return 0; +} + +int checkboard (void) +{ + printf("Board: Phytec phyCore i.MX31\n"); + return 0; +} + diff --git a/board/imx31_phycore/lowlevel_init.S b/board/imx31_phycore/lowlevel_init.S new file mode 100644 index 0000000..4895b6a --- /dev/null +++ b/board/imx31_phycore/lowlevel_init.S @@ -0,0 +1,104 @@ +/* + * + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer(a)pengutronix.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/mx31-regs.h> + +.macro REG reg, val + ldr r2, =\reg + ldr r3, =\val + str r3, [r2] +.endm + +.macro REG8 reg, val + ldr r2, =\reg + ldr r3, =\val + strb r3, [r2] +.endm + +.macro DELAY loops + ldr r2, =\loops +1: + subs r2, r2, #1 + nop + bcs 1b +.endm + +.globl lowlevel_init +lowlevel_init: + + REG IPU_CONF, IPU_CONF_DI_EN + REG CCM_CCMR, 0x074B0BF5 + + DELAY 0x40000 + + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS + + REG CCM_PDR0, PDR0_CSI_PODF(0xff1) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) | PDR0_MCU_PODF(0) + + REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0xe) | PLL_MFI(9) | PLL_MFN(0xd) + + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1) + + REG 0x43FAC26C, 0 /* SDCLK */ + REG 0x43FAC270, 0 /* CAS */ + REG 0x43FAC274, 0 /* RAS */ + REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC284, 0 /* DQM3 */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC28C, 0 + REG 0x43FAC290, 0 + REG 0x43FAC294, 0 + REG 0x43FAC298, 0 + REG 0x43FAC29C, 0 + REG 0x43FAC2A0, 0 + REG 0x43FAC2A4, 0 + REG 0x43FAC2A8, 0 + REG 0x43FAC2AC, 0 + REG 0x43FAC2B0, 0 + REG 0x43FAC2B4, 0 + REG 0x43FAC2B8, 0 + REG 0x43FAC2BC, 0 + REG 0x43FAC2C0, 0 + REG 0x43FAC2C4, 0 + REG 0x43FAC2C8, 0 + REG 0x43FAC2CC, 0 + REG 0x43FAC2D0, 0 + REG 0x43FAC2D4, 0 + REG 0x43FAC2D8, 0 + REG 0x43FAC2DC, 0 + REG 0xB8001010, 0x00000004 + REG 0xB8001004, 0x006ac73a + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + REG 0xB8001000, 0x82226080 + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + + mov pc, lr diff --git a/board/imx31_litekit/u-boot.lds b/board/imx31_phycore/u-boot.lds similarity index 100% copy from board/imx31_litekit/u-boot.lds copy to board/imx31_phycore/u-boot.lds diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h new file mode 100644 index 0000000..f4c78f0 --- /dev/null +++ b/include/configs/imx31_phycore.h @@ -0,0 +1,180 @@ +/* + * (C) Copyright 2004 + * Texas Instruments. + * Richard Woodruff <r-woodruff2(a)ti.com> + * Kshitij Gupta <kshitij(a)ti.com> + * + * Configuration settings for the 242x TI H4 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + + /* High Level Configuration Options */ +#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ +#define CONFIG_MX31 1 /* in a mx31 */ +#define CONFIG_MX31_HCLK_FREQ 26000000 +#define CONFIG_MX31_CLK32 32000 + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Temporarily disabled */ +#if 0 +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#endif + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ + +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MXC 1 +#define CFG_I2C_MX31_PORT2 1 +#define CFG_I2C_SPEED 100000 +#define CFG_I2C_SLAVE 0xfe + +#define CONFIG_MX31_UART 1 +#define CFG_MX31_UART1 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/*********************************************************** + * Command definition + ***********************************************************/ + +#include <config_cmd_default.h> + +#define CONFIG_CMD_PING +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C + +#define CONFIG_BOOTDELAY 3 + +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)" + +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.23.168 +#define CONFIG_SERVERIP 192.168.23.2 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ + "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ + "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2" \ + "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)" \ + "bootcmd=run bootcmd_net\0" \ + "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0" \ + "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0" \ + "unlock=yes\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \ + "prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0" \ + "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" + + +#define CONFIG_DRIVER_SMC911X 1 +#define CONFIG_DRIVER_SMC911X_BASE 0xa8000000 + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "uboot> " +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0 /* memtest works on */ +#define CFG_MEMTEST_END 0x10000 + +#define CFG_LOAD_ADDR 0 /* default load address */ + +#define CFG_HZ 32000 + +#define CONFIG_CMDLINE_EDITING 1 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_FLASH_BASE 0xa0000000 +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 259 /* max number of sectors on one chip */ +#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ + +#define CFG_ENV_IS_IN_EEPROM 1 +#define CFG_ENV_OFFSET 0x00 /* environment starts here */ +#define CFG_ENV_SIZE 4096 +#define CFG_I2C_EEPROM_ADDR 0x52 +#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */ + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ +#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ +#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */ + +/* + * JFFS2 partitions + */ +#undef CONFIG_JFFS2_CMDLINE +#define CONFIG_JFFS2_DEV "nor0" + +#endif /* __CONFIG_H */ -- 1.5.4

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[U-Boot-Users] [PATCH v2 1/7] Separate omap24xx specific code from arm1136
by Guennadi Liakhovetski 14 Apr '08

14 Apr '08

From: Sascha Hauer <s.hauer(a)pengutronix.de> Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer(a)pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg(a)denx.de> --- No changes wrt v1 Makefile | 4 +- cpu/arm1136/Makefile | 2 +- cpu/arm1136/cpu.c | 11 +- cpu/arm1136/interrupts.c | 167 -------------------- cpu/arm1136/omap24xx/Makefile | 46 ++++++ cpu/arm1136/omap24xx/interrupts.c | 159 +++++++++++++++++++ cpu/arm1136/omap24xx/start.S | 42 +++++ cpu/arm1136/start.S | 21 --- .../asm-arm/{arch-arm1136 => arch-omap24xx}/bits.h | 0 .../{arch-arm1136 => arch-omap24xx}/clocks.h | 0 .../asm-arm/{arch-arm1136 => arch-omap24xx}/i2c.h | 0 .../asm-arm/{arch-arm1136 => arch-omap24xx}/mem.h | 0 .../asm-arm/{arch-arm1136 => arch-omap24xx}/mux.h | 0 .../{arch-arm1136 => arch-omap24xx}/omap2420.h | 0 .../{arch-arm1136 => arch-omap24xx}/sizes.h | 0 .../{arch-arm1136 => arch-omap24xx}/sys_info.h | 0 .../{arch-arm1136 => arch-omap24xx}/sys_proto.h | 0 17 files changed, 254 insertions(+), 198 deletions(-) delete mode 100644 cpu/arm1136/interrupts.c create mode 100644 cpu/arm1136/omap24xx/Makefile create mode 100644 cpu/arm1136/omap24xx/interrupts.c create mode 100644 cpu/arm1136/omap24xx/start.S rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/bits.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/clocks.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/i2c.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/mem.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/mux.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/omap2420.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/sizes.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/sys_info.h (100%) rename include/asm-arm/{arch-arm1136 => arch-omap24xx}/sys_proto.h (100%) diff --git a/Makefile b/Makefile index 4255cf5..a9f4bd3 100644 --- a/Makefile +++ b/Makefile @@ -2587,12 +2587,12 @@ zylonite_config : ## ARM1136 Systems ######################################################################### omap2420h4_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 + @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx apollon_config : unconfig @mkdir -p $(obj)include @echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h - @$(MKCONFIG) $(@:_config=) arm arm1136 apollon + @$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx @echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk #======================================================================== diff --git a/cpu/arm1136/Makefile b/cpu/arm1136/Makefile index d5ac7d3..7701b03 100644 --- a/cpu/arm1136/Makefile +++ b/cpu/arm1136/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a START = start.o -COBJS = interrupts.o cpu.o +COBJS = cpu.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c index fa78eaa..c27f8cd 100644 --- a/cpu/arm1136/cpu.c +++ b/cpu/arm1136/cpu.c @@ -33,9 +33,6 @@ #include <common.h> #include <command.h> -#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) -#include <asm/arch/omap2420.h> -#endif #ifdef CONFIG_USE_IRQ DECLARE_GLOBAL_DATA_PTR; @@ -47,10 +44,10 @@ static unsigned long read_p15_c1 (void) unsigned long value; __asm__ __volatile__( - "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" - : "=r" (value) - : - : "memory"); + "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" + : "=r" (value) + : + : "memory"); return value; } diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c deleted file mode 100644 index 491c902..0000000 --- a/cpu/arm1136/interrupts.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * (C) Copyright 2004 - * Texas Instruments - * Richard Woodruff <r-woodruff2(a)ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger(a)sysgo.de> - * Alex Zuepke <azu(a)sysgo.de> - * - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/bits.h> - -#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) -# include <asm/arch/omap2420.h> -#endif - -#define TIMER_LOAD_VAL 0 - -/* macro to read the 32 bit timer */ -#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+TCRR)) - -#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR) -/* Use the IntegratorCP function from board/integratorcp.c */ -#else - -static ulong timestamp; -static ulong lastinc; - -/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) -{ - int32_t val; - - /* Start the counter ticking up */ - *((int32_t *) (CFG_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ - val = (CFG_PVT << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ - *((int32_t *) (CFG_TIMERBASE + TCLR)) = val; /* start timer */ - - reset_timer_masked(); /* init the timestamp and lastinc value */ - - return(0); -} -/* - * timer without interrupts - */ -void reset_timer (void) -{ - reset_timer_masked (); -} - -ulong get_timer (ulong base) -{ - return get_timer_masked () - base; -} - -void set_timer (ulong t) -{ - timestamp = t; -} - -/* delay x useconds AND perserve advance timstamp value */ -void udelay (unsigned long usec) -{ - ulong tmo, tmp; - - if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CFG_HZ; - tmo /= (1000*1000); - } - - tmp = get_timer (0); /* get current timestamp */ - if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */ - reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ - else - tmo += tmp; /* else, set advancing stamp wake up time */ - while (get_timer_masked () < tmo)/* loop till event */ - /*NOP*/; -} - -void reset_timer_masked (void) -{ - /* reset time */ - lastinc = READ_TIMER; /* capture current incrementer value time */ - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -ulong get_timer_masked (void) -{ - ulong now = READ_TIMER; /* current tick value */ - - if (now >= lastinc) /* normal mode (non roll) */ - timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */ - else /* we have rollover of incrementer */ - timestamp += (0xFFFFFFFF - lastinc) + now; - lastinc = now; - return timestamp; -} - -/* waits specified delay value and resets timestamp */ -void udelay_masked (unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CFG_HZ; - tmo /= (1000*1000); - } - endtime = get_timer_masked () + tmo; - - do { - ulong now = get_timer_masked (); - diff = endtime - now; - } while (diff >= 0); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk (void) -{ - ulong tbclk; - tbclk = CFG_HZ; - return tbclk; -} -#endif /* !Integrator/CP */ diff --git a/cpu/arm1136/omap24xx/Makefile b/cpu/arm1136/omap24xx/Makefile new file mode 100644 index 0000000..f9afed7 --- /dev/null +++ b/cpu/arm1136/omap24xx/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = interrupts.o +SOBJS = start.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm1136/omap24xx/interrupts.c b/cpu/arm1136/omap24xx/interrupts.c new file mode 100644 index 0000000..a50fa39 --- /dev/null +++ b/cpu/arm1136/omap24xx/interrupts.c @@ -0,0 +1,159 @@ +/* + * (C) Copyright 2004 + * Texas Instruments + * Richard Woodruff <r-woodruff2(a)ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * Alex Zuepke <azu(a)sysgo.de> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/bits.h> +#include <asm/arch/omap2420.h> + +#define TIMER_LOAD_VAL 0 + +/* macro to read the 32 bit timer */ +#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+TCRR)) + +static ulong timestamp; +static ulong lastinc; + +/* nothing really to do with interrupts, just starts up a counter. */ +int interrupt_init (void) +{ + int32_t val; + + /* Start the counter ticking up */ + *((int32_t *) (CFG_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ + val = (CFG_PVT << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ + *((int32_t *) (CFG_TIMERBASE + TCLR)) = val; /* start timer */ + + reset_timer_masked(); /* init the timestamp and lastinc value */ + + return(0); +} +/* + * timer without interrupts + */ +void reset_timer (void) +{ + reset_timer_masked (); +} + +ulong get_timer (ulong base) +{ + return get_timer_masked () - base; +} + +void set_timer (ulong t) +{ + timestamp = t; +} + +/* delay x useconds AND perserve advance timstamp value */ +void udelay (unsigned long usec) +{ + ulong tmo, tmp; + + if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + } else { /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); + } + + tmp = get_timer (0); /* get current timestamp */ + if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */ + reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ + else + tmo += tmp; /* else, set advancing stamp wake up time */ + while (get_timer_masked () < tmo)/* loop till event */ + /*NOP*/; +} + +void reset_timer_masked (void) +{ + /* reset time */ + lastinc = READ_TIMER; /* capture current incrementer value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ +} + +ulong get_timer_masked (void) +{ + ulong now = READ_TIMER; /* current tick value */ + + if (now >= lastinc) /* normal mode (non roll) */ + timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */ + else /* we have rollover of incrementer */ + timestamp += (0xFFFFFFFF - lastinc) + now; + lastinc = now; + return timestamp; +} + +/* waits specified delay value and resets timestamp */ +void udelay_masked (unsigned long usec) +{ + ulong tmo; + ulong endtime; + signed long diff; + + if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + } else { /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); + } + endtime = get_timer_masked () + tmo; + + do { + ulong now = get_timer_masked (); + diff = endtime - now; + } while (diff >= 0); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk (void) +{ + ulong tbclk; + tbclk = CFG_HZ; + return tbclk; +} diff --git a/cpu/arm1136/omap24xx/start.S b/cpu/arm1136/omap24xx/start.S new file mode 100644 index 0000000..d6cefbd --- /dev/null +++ b/cpu/arm1136/omap24xx/start.S @@ -0,0 +1,42 @@ +/* + * armboot - Startup Code for OMP2420/ARM1136 CPU-core + * + * Copyright (c) 2004 Texas Instruments <r-woodruff2(a)ti.com> + * + * Copyright (c) 2001 Marius Grц╤ger <mag(a)sysgo.de> + * Copyright (c) 2002 Alex Zц╪pke <azu(a)sysgo.de> + * Copyright (c) 2002 Gary Jennejohn <gj(a)denx.de> + * Copyright (c) 2003 Richard Woodruff <r-woodruff2(a)ti.com> + * Copyright (c) 2003 Kshitij <kshitij(a)ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/omap2420.h> + +.globl reset_cpu +reset_cpu: + ldr r1, rstctl /* get addr for global reset reg */ + mov r3, #0x2 /* full reset pll+mpu */ + str r3, [r1] /* force reset */ + mov r0, r0 +_loop_forever: + b _loop_forever +rstctl: + .word PM_RSTCTRL_WKUP diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index 8b765f1..56009d0 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -30,9 +30,6 @@ #include <config.h> #include <version.h> -#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) -#include <asm/arch/omap2420.h> -#endif .globl _start _start: b reset #ifdef CONFIG_ONENAND_IPL @@ -438,22 +435,4 @@ fiq: arm1136_cache_flush: mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache mov pc, lr @ back to caller - -#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR) -/* Use the IntegratorCP function from board/integratorcp/platform.S */ -#else - - .align 5 -.globl reset_cpu -reset_cpu: - ldr r1, rstctl /* get addr for global reset reg */ - mov r3, #0x2 /* full reset pll+mpu */ - str r3, [r1] /* force reset */ - mov r0, r0 -_loop_forever: - b _loop_forever -rstctl: - .word PM_RSTCTRL_WKUP - -#endif #endif /* CONFIG_ONENAND_IPL */ diff --git a/include/asm-arm/arch-arm1136/bits.h b/include/asm-arm/arch-omap24xx/bits.h similarity index 100% rename from include/asm-arm/arch-arm1136/bits.h rename to include/asm-arm/arch-omap24xx/bits.h diff --git a/include/asm-arm/arch-arm1136/clocks.h b/include/asm-arm/arch-omap24xx/clocks.h similarity index 100% rename from include/asm-arm/arch-arm1136/clocks.h rename to include/asm-arm/arch-omap24xx/clocks.h diff --git a/include/asm-arm/arch-arm1136/i2c.h b/include/asm-arm/arch-omap24xx/i2c.h similarity index 100% rename from include/asm-arm/arch-arm1136/i2c.h rename to include/asm-arm/arch-omap24xx/i2c.h diff --git a/include/asm-arm/arch-arm1136/mem.h b/include/asm-arm/arch-omap24xx/mem.h similarity index 100% rename from include/asm-arm/arch-arm1136/mem.h rename to include/asm-arm/arch-omap24xx/mem.h diff --git a/include/asm-arm/arch-arm1136/mux.h b/include/asm-arm/arch-omap24xx/mux.h similarity index 100% rename from include/asm-arm/arch-arm1136/mux.h rename to include/asm-arm/arch-omap24xx/mux.h diff --git a/include/asm-arm/arch-arm1136/omap2420.h b/include/asm-arm/arch-omap24xx/omap2420.h similarity index 100% rename from include/asm-arm/arch-arm1136/omap2420.h rename to include/asm-arm/arch-omap24xx/omap2420.h diff --git a/include/asm-arm/arch-arm1136/sizes.h b/include/asm-arm/arch-omap24xx/sizes.h similarity index 100% rename from include/asm-arm/arch-arm1136/sizes.h rename to include/asm-arm/arch-omap24xx/sizes.h diff --git a/include/asm-arm/arch-arm1136/sys_info.h b/include/asm-arm/arch-omap24xx/sys_info.h similarity index 100% rename from include/asm-arm/arch-arm1136/sys_info.h rename to include/asm-arm/arch-omap24xx/sys_info.h diff --git a/include/asm-arm/arch-arm1136/sys_proto.h b/include/asm-arm/arch-omap24xx/sys_proto.h similarity index 100% rename from include/asm-arm/arch-arm1136/sys_proto.h rename to include/asm-arm/arch-omap24xx/sys_proto.h -- 1.5.4

3 3

[U-Boot-Users] [patch] disable caches before booting an app for Blackfin apps
by Mike Frysinger 14 Apr '08

14 Apr '08

It isn't generally save to execute applications outside of U-Boot with caches enabled due to the way the Blackfin processor handles caches (requires software assistance). This patch disables caches before booting an ELF or just booting raw code. The previous discussion on the patch was that we wanted to use weaks instead, but that proved to not be feasible when multiple symbols are involved, which puts us back at the ifdef solution. I've minimized the ugliness by moving the setup step outside of the main function. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- diff --git a/common/cmd_boot.c b/common/cmd_boot.c index e68f16f..9d4f026 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -32,6 +32,23 @@ DECLARE_GLOBAL_DATA_PTR; #endif +static inline void go_setup(int argc, char *argv[]) +{ +#if defined(CONFIG_I386) + /* + * x86 does not use a dedicated register to pass the pointer + * to the global_data + */ + argv[0] = (char *)gd; + +#elif defined(CONFIG_BLACKFIN) + if (dcache_status ()) + dcache_disable (); + if (icache_status ()) + icache_disable (); +#endif +} + int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong addr, rc; @@ -46,25 +63,20 @@ int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("## Starting application at 0x%08lX ...\n", addr); + go_setup(argc, argv); + +#if defined(CONFIG_NIOS) /* - * pass address parameter as argv[0] (aka command name), - * and all remaining args - */ -#if defined(CONFIG_I386) - /* - * x86 does not use a dedicated register to pass the pointer - * to the global_data + * Nios function pointers are address >> 1 */ - argv[0] = (char *)gd; + addr >>= 1; #endif -#if !defined(CONFIG_NIOS) - rc = ((ulong (*)(int, char *[]))addr) (--argc, &argv[1]); -#else + /* - * Nios function pointers are address >> 1 + * pass address parameter as argv[0] (aka command name), + * and all remaining args */ - rc = ((ulong (*)(int, char *[]))(addr>>1)) (--argc, &argv[1]); -#endif + rc = ((ulong (*)(int, char *[]))addr) (--argc, &argv[1]); if (rc != 0) rcode = 1; printf ("## Application terminated, rc = 0x%lX\n", rc); diff --git a/common/cmd_elf.c b/common/cmd_elf.c index 2eb7453..4683554 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -27,6 +27,21 @@ DECLARE_GLOBAL_DATA_PTR; #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif +static inline void bootelf_setup(int argc, char *argv[]) +{ + /* + * QNX images require the data cache is disabled. + * Data cache is already flushed, so just turn it off. + */ + if (dcache_status ()) + dcache_disable (); + +#ifdef CONFIG_BLACKFIN + if (icache_status ()) + icache_disable (); +#endif +} + int valid_elf_image (unsigned long addr); unsigned long load_elf_image (unsigned long addr); @@ -53,12 +68,7 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("## Starting application at 0x%08lx ...\n", addr); - /* - * QNX images require the data cache is disabled. - * Data cache is already flushed, so just turn it off. - */ - if (dcache_status ()) - dcache_disable (); + bootelf_setup(argc, argv); /* * pass address parameter as argv[0] (aka command name),

3 3

[U-Boot-Users] [PATCH] add support for Toradex Colibri module
by Daniel Mack 14 Apr '08

14 Apr '08

Hi, this patch adds basic support for Toradex PXA27x based Colibri module. It cleanly applies on u-boot-1.1.6. However, I didn't manage to get the flash to work at all, at boot time, I always get the message "Flash: 0 kB". I'm new to the U-Boot environment, so maybe I missed same essentials here. Also, the DM9000 driver does not seem to be able to correctly read its MAC address on this platform. I've read some mails about similar behaviour. Is there any patch going upstream soon? For now, I helped myself by hacking a fake MAC to bd->bi_enetaddr right before initialization but that's of course not a solution. Thanks and best regards, Daniel

3 8

[U-Boot-Users] [Patch] Disable icache before call the first line of kernel in do_bootelf().
by Sonic Zhang 14 Apr '08

14 Apr '08

On some architecture, it is not save to call the first line of kernel without disable the instruction cache. For do_bootm() path, architecture specific library code do_bootm_linux() can adress this issue, but do_bootelf() is common code. This patch disables icache before call kernel. Signed-off-by: Sonic Zhang <sonic.zhang(a)gmail.com> Index: common/cmd_elf.c =================================================================== --- common/cmd_elf.c (revision 871) +++ common/cmd_elf.c (working copy) @@ -65,6 +65,8 @@ */ if (dcache_status ()) dcache_disable (); + if (icache_status ()) + icache_disable (); /* pass cmdline to the kernel. */ cmdline = make_command_line();

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[U-Boot-Users] Pull request u-boot-microblaze.git
by Michal Simek 13 Apr '08

13 Apr '08

Hi Wolfgang, please pull microblaze git repo. Thanks, Michal Simek The following changes since commit aeff6d503b6006573d5c6b04fc658a64bebee5fa: Wolfgang Denk (1): Merge branch 'master' of git://www.denx.de/git/u-boot-fdt are available in the git repository at: . master Michal Simek (13): microblaze: Clean Makefile from ancient emac driver microblaze: remove old setting for emac driver microblaze: ML401 and XUPV2P remove emac and emaclite reference microblaze: add Emaclite ethernet driver microblaze: add Emac ethernet driver microblaze: Add Emac driver to Makefile microblaze: Add Emaclite driver to Makefile microblaze: clean uart16550 and uartlite handling microblaze: ml401 - add ifdef for GPIO microblaze: ml401 fix config file for supporting FDT microblaze: xupv2p fix config file for supporting FDT microblaze: clean microblaze_config.mk microblaze: Sort microblaze boards in MAKEALL script MAKEALL | 2 +- board/xilinx/ml401/Makefile | 17 +-- board/xilinx/ml401/xparameters.h | 12 +- board/xilinx/xupv2p/Makefile | 17 +-- board/xilinx/xupv2p/xparameters.h | 12 +- drivers/net/Makefile | 2 + drivers/net/xilinx_emac.c | 462 +++++++++++++++++++++++++++++++++++++ drivers/net/xilinx_emaclite.c | 351 ++++++++++++++++++++++++++++ include/configs/ml401.h | 42 +++- include/configs/xupv2p.h | 37 +++- microblaze_config.mk | 16 +- 11 files changed, 890 insertions(+), 80 deletions(-) create mode 100644 drivers/net/xilinx_emac.c create mode 100644 drivers/net/xilinx_emaclite.c

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[U-Boot-Users] Please pull u-boot-mpc83xx.git - small fixes
by Kim Phillips 13 Apr '08

13 Apr '08

The following changes since commit 950a392464e616b4590bc4501be46e2d7d162dea: Wolfgang Denk (1): Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18: are available in the git repository at: git://www.denx.de/git/u-boot-mpc83xx.git Dave Liu (2): mpc83xx: Fix the SATA clock setting of 837x targets mpc83xx: Fix the bug of serdes initialization Jean-Christophe PLAGNIOL-VILLARD (1): mpc837xerdb: Fix warning: implicit declaration of function 'fdt_fixup_dr_usb' Lee Nipper (1): mpc83xx: Update DIMM data bus width test to support 40-bit width board/freescale/mpc837xemds/mpc837xemds.c | 2 +- board/freescale/mpc837xerdb/mpc837xerdb.c | 2 +- cpu/mpc83xx/spd_sdram.c | 4 ++-- include/configs/MPC837XEMDS.h | 2 +- include/configs/MPC837XERDB.h | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) Thanks, Kim

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[U-Boot-Users] Please pull u-boot-mpc85xx.git
by Andy Fleming 13 Apr '08

13 Apr '08

are available in the git repository at: git://www.denx.de/git/u-boot-mpc85xx.git master Kumar Gala (2): 85xx: Use SVR_SOC_VER instead of SVR_VER 85xx: Fix detection of MP cpu spin up cpu/mpc85xx/cpu_init.c | 2 +- cpu/mpc85xx/mp.c | 6 +++++- cpu/mpc85xx/spd_sdram.c | 2 +- 3 files changed, 7 insertions(+), 3 deletions(-)

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