March 2008 - U-Boot

[U-Boot-Users] Current U-Boot doesn't boot device tree enabled kernel anymore
by Stefan Roese 01 Apr '08

01 Apr '08

I just ran into a problem with current U-Boot on Kilauea and device tree enabled Linux kernel (arch/powerpc). After updating U-Boot the kernel doesn't boot anymore: => run net_nfs_fdt Waiting for PHY auto negotiation to complete... done ENET Speed is 1000 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.0.0.152; our IP address is 10.0.0.182 Filename 'kilauea/uImage'. Load address: 0x200000 Loading: ################################################################# ####################### done Bytes transferred = 1288707 (13aa03 hex) ENET Speed is 1000 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.0.0.152; our IP address is 10.0.0.182 Filename 'kilauea/kilauea.dtb'. Load address: 0x400000 Loading: # done Bytes transferred = 8000 (1f40 hex) ## Booting kernel from Legacy Image at 00200000 ... Image Name: Linux-2.6.25-rc7-next-20080327-d Created: 2008-03-27 13:51:18 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1288643 Bytes = 1.2 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ERROR: image overwritten - must RESET the board to recover. Before updating U-Boot I am able to boot exactly this kernel/dtb combination without problems: => run net_nfs_fdt Waiting for PHY auto negotiation to complete... done ENET Speed is 1000 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.0.0.152; our IP address is 10.0.0.182 Filename 'kilauea/uImage'. Load address: 0x200000 Loading: ################################################################# ####################### done Bytes transferred = 1288707 (13aa03 hex) ENET Speed is 1000 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.0.0.152; our IP address is 10.0.0.182 Filename 'kilauea/kilauea.dtb'. Load address: 0x400000 Loading: # done Bytes transferred = 8000 (1f40 hex) ## Booting image at 00200000 ... Image Name: Linux-2.6.25-rc7-next-20080327-d Created: 2008-03-27 13:51:18 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1288643 Bytes = 1.2 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Booting using the fdt at 0x400000 Using Kilauea machine description ... Any ideas? Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot-Users] [PATCH] Add defines to libata (Take three)
by Tor Krill 01 Apr '08

01 Apr '08

This patch adds some missing defines to libata. Add check power mode command. Add obsoleted bits in dev reg Add ata command register defines Signed-off-by: Tor Krill <tor(a)excito.com> --- include/libata.h | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/include/libata.h b/include/libata.h index aedba74..b50af9b 100644 --- a/include/libata.h +++ b/include/libata.h @@ -30,6 +30,7 @@ enum ata_cmd { /* non-NCQ command */ ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ + ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ ATA_CMD_FLUSH_CACHE = 0xE7, ATA_CMD_FLUSH_CACHE_EXT = 0xEA, ATA_CMD_ID_ATA = 0xEC, @@ -110,6 +111,7 @@ enum { ATA_HOB = (1 << 7), /* LBA48 selector */ ATA_NIEN = (1 << 1), /* disable-irq flag */ ATA_LBA = (1 << 6), /* LBA28 selector */ + ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ ATA_BUSY = (1 << 7), /* BSY status bit */ ATA_DRDY = (1 << 6), /* device ready */ @@ -156,6 +158,26 @@ enum { ATA_UDMA7 = ATA_UDMA6 | (1 << 7), }; +/* ATA command block registers */ +enum ata_regs { + ATA_REG_DATA = 0x00, + ATA_REG_ERR = 0x01, + ATA_REG_NSECT = 0x02, + ATA_REG_LBAL = 0x03, + ATA_REG_LBAM = 0x04, + ATA_REG_LBAH = 0x05, + ATA_REG_DEVICE = 0x06, + ATA_REG_STATUS = 0x07, + ATA_PCI_CTL_OFS = 0x02, + /* and their aliases */ + ATA_REG_FEATURE = ATA_REG_ERR, + ATA_REG_CMD = ATA_REG_STATUS, + ATA_REG_BYTEL = ATA_REG_LBAM, + ATA_REG_BYTEH = ATA_REG_LBAH, + ATA_REG_DEVSEL = ATA_REG_DEVICE, + ATA_REG_IRQ = ATA_REG_NSECT, +}; + #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) #define ata_id_has_fua(id) ((id)[84] & (1 << 6)) -- 1.5.4.4

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Re: [U-Boot-Users] [PATCH][resubmit] QE IO: Add initial data to pin configuration + read/write functions
by Andy Fleming 01 Apr '08

01 Apr '08

On Mon, Mar 31, 2008 at 2:36 AM, David Saada <David.Saada(a)ecitele.com> wrote: > > > > On the MPC83xx & MPC85xx architectures that have QE, add initial data to the > pin configuration table (qe_iop_conf_tab). > This is relevant for GPIO pins defined as output. One can setup a value of > -1 to leave the value unchanged. > QE initialization tables in all relevant boards were also replaced. > In addition, add IO pin read & write functions. > This patch also includes commands for reading and writing parallel I/O > ports (pario command). > Any chance you could split out the command code from this? That's really a separate piece of functionality. Andy

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[U-Boot-Users] [PATCH] DHCP request fix for Windows Server 2003
by Aras Vaichas 01 Apr '08

01 Apr '08

This patch fixes a problem I had with a client who was getting DHCP request retries with our network device and their DHCP server. It turns out that their Windows Server 2003 DHCP server couldn't handle fast DHCP transactions and it just "forgets" some of them. I verified this with my own Windows Server 2003 install and a network analyser (Ethereal/Wireshark). It seems that a small, lean 200MHz embedded system is too fast for a Windows Server 2003 system running on a 2GHz+ machine. Go figure. Adding a small (50ms) delay fixes this problem nicely and it only adds a small amount of overhead in comparison to the DHCP request timeouts and retries. NOTE: This patch is ported from my old 1.1.3 U-Boot system. I have not retested it with 1.3.2 U-Boot against Windows Server 2003. The patch is very small and simple, so I don't think should be necessary. I can retest this functionality if you wish, but it will require me to reinstall Windows Server and set everything up again. Aras ______________________________________________________________________ This email has been scanned by the MessageLabs Email Security System. For more information please visit http://www.messagelabs.com/email ______________________________________________________________________ * added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional delay before sending "DHCP Request" in net/bootp.c. Required to overcome interoperability problems with Windows Server 200x DHCP server when U-Boot client responds too fast for server to handle.

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[U-Boot-Users] [PATCH 1/3] QE IO: Add initial data to pin configuration
by David Saada 31 Mar '08

31 Mar '08

On the MPC83xx & MPC85xx architectures that have QE, add initial data to the pin configuration table (qe_iop_conf_tab). This is relevant for GPIO pins defined as output. One can setup a value of -1 to leave the value unchanged. In addition, add I/O pin read & write functions. Signed-off-by: David Saada <david.saada(a)ecitele.com> cpu/mpc83xx/cpu_init.c | 7 ++--- cpu/mpc83xx/qe_io.c | 59 ++++++++++++++++++++++++++++++++++++++++++++----- cpu/mpc85xx/cpu_init.c | 7 ++--- cpu/mpc85xx/qe_io.c | 58 ++++++++++++++++++++++++++++++++++++++++++------ include/ioports.h | 8 ++++++ 5 files changed, 118 insertions(+), 21 deletions(-) --- a/include/ioports.h 2008-03-28 01:49:12.000000000 +0200 +++ b/include/ioports.h 2008-03-30 16:11:09.514274000 +0300 @@ -60,6 +60,14 @@ typedef struct { int dir; int open_drain; int assign; + int data; } qe_iop_conf_t; #define QE_IOP_TAB_END (-1) + +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data); +void qe_read_iopin(u8 port, u8 pin, int *data); +void qe_write_iopin(u8 port, u8 pin, int data); + + --- a/cpu/mpc85xx/cpu_init.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc85xx/cpu_init.c 2008-03-30 15:42:32.913152000 +0300 @@ -39,15 +39,13 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; -extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -56,7 +54,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif --- a/cpu/mpc85xx/qe_io.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc85xx/qe_io.c 2008-03-30 15:44:56.961332000 +0300 @@ -27,16 +27,30 @@ #if defined(CONFIG_QE) #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; u32 pin_2bit_assign; u32 pin_1bit_mask; u32 tmp_val; - volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - volatile par_io_t *par_io = (volatile par_io_t *) - &(gur->qe_par_io); + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + if ((data != -1) && /* Don't leave unchanged */ + (assign == 0) && /* GPIO */ + (dir & 1)) { /* Has output */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); + } /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -55,9 +69,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io[port].cpodr); if (open_drain) @@ -82,4 +93,37 @@ void qe_config_iopin(u8 port, u8 pin, in } } +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io[port].cpdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Write the data */ + tmp_val = in_be32(&par_io[port].cpdat); + if (data) + out_be32(&par_io[port].cpdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpdat, ~pin_1bit_mask & tmp_val); +} + #endif /* CONFIG_QE */ --- a/cpu/mpc83xx/cpu_init.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc83xx/cpu_init.c 2008-03-30 15:45:53.227362000 +0300 @@ -28,15 +28,13 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; -extern void qe_config_iopin(u8 port, u8 pin, int dir, - int open_drain, int assign); extern void qe_init(uint qe_base); extern void qe_reset(void); static void config_qe_ioports(void) { u8 port, pin; - int dir, open_drain, assign; + int dir, open_drain, assign, data; int i; for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { @@ -45,7 +43,8 @@ static void config_qe_ioports(void) dir = qe_iop_conf_tab[i].dir; open_drain = qe_iop_conf_tab[i].open_drain; assign = qe_iop_conf_tab[i].assign; - qe_config_iopin(port, pin, dir, open_drain, assign); + data = qe_iop_conf_tab[i].data; + qe_config_iopin(port, pin, dir, open_drain, assign, data); } } #endif --- a/cpu/mpc83xx/qe_io.c 2008-03-28 01:49:12.000000000 +0200 +++ b/cpu/mpc83xx/qe_io.c 2008-03-30 15:53:43.620970000 +0300 @@ -26,15 +26,30 @@ #include "asm/immap_83xx.h" #define NUM_OF_PINS 32 -void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign, + int data) { u32 pin_2bit_mask; u32 pin_2bit_dir; u32 pin_2bit_assign; u32 pin_1bit_mask; u32 tmp_val; - volatile immap_t *im = (volatile immap_t *)CFG_IMMR; - volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + if ((data != -1) && /* Don't leave unchanged */ + (assign == 0) && /* GPIO */ + (dir & 1)) { /* Has output */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + else + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } /* Caculate pin location and 2bit mask and dir */ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); @@ -53,9 +68,6 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val); } - /* Calculate pin location for 1bit mask */ - pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); - /* Setup the open drain */ tmp_val = in_be32(&par_io->ioport[port].podr); if (open_drain) { @@ -80,3 +92,38 @@ void qe_config_iopin(u8 port, u8 pin, in out_be32(&par_io->ioport[port].ppar1, pin_2bit_assign | tmp_val); } } + +void qe_read_iopin(u8 port, u8 pin, int *data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Read the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + *data = (tmp_val >> (NUM_OF_PINS - (pin+1))) & 0x1; +} + +void qe_write_iopin(u8 port, u8 pin, int data) +{ + u32 pin_1bit_mask; + u32 tmp_val; + immap_t *im = (immap_t *)CFG_IMMR; + qepio83xx_t *par_io = (qepio83xx_t *)&im->qepio; + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the data */ + tmp_val = in_be32(&par_io->ioport[port].pdat); + if (data) { + out_be32(&par_io->ioport[port].pdat, pin_1bit_mask | tmp_val); + } else { + out_be32(&par_io->ioport[port].pdat, ~pin_1bit_mask & tmp_val); + } +} +

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[U-Boot-Users] [PATCH] Allow use to use ARCH=powerpc when building
by Kumar Gala 31 Mar '08

31 Mar '08

The linux kernel is now mostly ARCH=powerpc, so to make life easier allow use to use ARCH=powerpc and convert it to ARCH=ppc. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Makefile | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/Makefile b/Makefile index 4255cf5..46c4125 100644 --- a/Makefile +++ b/Makefile @@ -123,6 +123,10 @@ unexport CDPATH ######################################################################### +ifeq ($(ARCH),powerpc) +ARCH = ppc +endif + ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk)) # load ARCH, BOARD, and CPU configuration -- 1.5.4.1

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Re: [U-Boot-Users] [PATCH 08/13] SPARC: added SMC91111 driver in and out macros for LEON processors.
by Daniel Hellstrom 31 Mar '08

31 Mar '08

Ben Warren wrote: > I haven't looked at how all the funky macros in this patch are called, but it's generally considered good form to wrap multi-line macros with do {...} while(0) in order to avoid compiler issues. I'll NAK the patch for now based on this. The Macros are used to read/write 8-,16-,32-bit words from the I/O bus where the SMC MAC is. LEON2/3 is bigendian, so the macros swaps the read and written data as well. The I/O bus is non-cacheable so no force cache miss is needed here. I have made the do{}while(0) you asked for and updated patch 8 and my repository: Signed-off-by: Daniel Hellstrom <daniel(a)gaisler.com> --- drivers/net/smc91111.h | 73 ++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 71 insertions(+), 2 deletions(-) diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index 8dcbb3e..ef325d2 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -79,7 +79,7 @@ typedef unsigned long int dword; #ifdef CONFIG_XSENGINE #define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1)))) #define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1)))) -#define SMC_inb(p) ({ \ +#define SMC_inb(p) ({ \ unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \ unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \ if (__p & 2) __v >>= 8; \ @@ -176,7 +176,76 @@ typedef unsigned long int dword; }; \ }) -#else /* if not CONFIG_PXA250 */ +#elif defined(CONFIG_LEON) /* if not CONFIG_PXA250 */ + +#define SMC_LEON_SWAP16(_x_) ({ word _x = (_x_); ((_x << 8) | (_x >> 8)); }) + +#define SMC_LEON_SWAP32(_x_) \ + ({ dword _x = (_x_); \ + ((_x << 24) | \ + ((0x0000FF00UL & _x) << 8) | \ + ((0x00FF0000UL & _x) >> 8) | \ + (_x >> 24)); }) + +#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inb(p) ({ \ + word ___v = SMC_inw((p) & ~1); \ + if ((p) & 1) ___v >>= 8; \ + else ___v &= 0xff; \ + ___v; }) + +#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d)) +#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) +#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d)) +#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d)) +#define SMC_outb(d,r) do{ word __d = (byte)(d); \ + word __w = SMC_inw((r)&~1); \ + __w &= ((r)&1) ? 0x00FF : 0xFF00; \ + __w |= ((r)&1) ? __d<<8 : __d; \ + SMC_outw(__w,(r)&~1); \ + }while(0) +#define SMC_outsl(r,b,l) do{ int __i; \ + dword *__b2; \ + __b2 = (dword *) b; \ + for (__i = 0; __i < l; __i++) { \ + SMC_outl_nosw( *(__b2 + __i), r); \ + } \ + }while(0) +#define SMC_outsw(r,b,l) do{ int __i; \ + word *__b2; \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ + SMC_outw_nosw( *(__b2 + __i), r); \ + } \ + }while(0) +#define SMC_insl(r,b,l) do{ int __i ; \ + dword *__b2; \ + __b2 = (dword *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inl_nosw(r); \ + }; \ + }while(0) + +#define SMC_insw(r,b,l) do{ int __i ; \ + word *__b2; \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inw_nosw(r); \ + }; \ + }while(0) + +#define SMC_insb(r,b,l) do{ int __i ; \ + byte *__b2; \ + __b2 = (byte *) b; \ + for (__i = 0; __i < l; __i++) { \ + *(__b2 + __i) = SMC_inb(r); \ + }; \ + }while(0) + +#else /* if not CONFIG_PXA250 and not CONFIG_LEON */ #ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */ /* -- 1.5.4

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[U-Boot-Users] (no subject)
by Wolfgang Denk 31 Mar '08

31 Mar '08

Note: this commit breaks booting on trab.h commit 80767a6cead9990d9e77e62be947843c2c72f469 Author: Peter Pearse <peter.pearse(a)arm.com> Date: Wed Sep 5 16:04:41 2007 +0100 Changed API name to coloured_led.h Removed code using deprecated ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code Harald, did you run any later revision successfully on a SMDK2400 board? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "You can have my Unix system when you pry it from my cold, dead fingers." - Cal Keegan

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Re: [U-Boot-Users] [PATCH 08/13] SPARC: added SMC91111 driver in and out macros for LEON processors.
by Ben Warren 31 Mar '08

31 Mar '08

Alessandro Rubini wrote: >>> +#define SMC_insb(r,b,l) ({ int __i ; \ >>> + byte *__b2; \ >>> + __b2 = (byte *) b; \ >>> + for (__i = 0; __i < l; __i++) { \ >>> + *(__b2 + __i) = SMC_inb(r); \ >>> + SMC_inb(0); \ >>> + }; \ >>> + }) >>> > > >> [...] it's generally considered good form to wrap multi-line macros with >> do {...} while(0) in order to avoid compiler issues. >> > > But this is the "expression statement" gcc slang. the do/while0 thing > avoids if/else problems but isn't an expression, it is a statement. > This has no issue with if/else (no trailing semicolon or brace) and > moreover it is an expression. > > Oh, I see. Thanks for taking the time Alessandro. I'm putting this back on list so others can be educated too. regards, Ben

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[U-Boot-Users] [PATCH] mpc83xx: Fix the bug of serdes initialization
by Dave Liu 31 Mar '08

31 Mar '08

Currently the serdes will not be initializated due to the partid's error. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- board/freescale/mpc837xemds/mpc837xemds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index f7cd5fe..40a505b 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -36,7 +36,7 @@ int board_early_init_f(void) u32 spridr = in_be32(&immr->sysconf.spridr); /* we check only part num, and don't look for CPU revisions */ - switch (spridr) { + switch (PARTID_NO_E(spridr)) { case SPR_8377: fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA, FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); -- 1.5.4.rc4

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