December 2008 - U-Boot

[U-Boot] [PATCH 00/11] Allow PCI bus address, PA, and VA to differ
by Becky Bruce 06 Feb '09

06 Feb '09

This patch series cleans up much of for VA/PA/PCI bus address confusion that is is currently causing a couple of problems on the 8641 36-bit port, and was preventing us from having a PCI mem bus address that differed from the virtual address of the region. I have fixed a number of problems, from the ahci driver directly using the pci BAR setting as a virtual address, to the CFI flash driver inconsistently treating flash_info->start as a physical address or virtual address, to pci window mapping overlap. We also now require support for Kumar's new CONFIG_ADDR_MAP code, which I have added - his patches will need to be applied before these; some of these patches are actually fixes to that code. I ended up doing some cleanup to the BAT defines as I was implementing this capability. Here's the diffstat: board/alaska/alaska.c | 36 +++++++------- board/etin/debris/flash.c | 1 + board/etin/kvme080/kvme080.c | 1 + board/freescale/mpc8641hpcn/mpc8641hpcn.c | 22 ++++---- cpu/mpc85xx/tlb.c | 4 +- cpu/mpc86xx/cpu_init.c | 27 +++++++++++ drivers/block/ahci.c | 7 +-- drivers/mtd/cfi_flash.c | 53 +++++++++----------- drivers/pci/pci.c | 19 ++++++++ include/74xx_7xx.h | 37 --------------- include/addr_map.h | 2 +- include/asm-ppc/e300.h | 35 -------------- include/asm-ppc/io.h | 2 +- include/asm-ppc/mmu.h | 73 ++++++++++++++++++++++------ include/configs/MPC8641HPCN.h | 30 +++++++++--- include/flash.h | 2 +- include/mpc824x.h | 39 --------------- include/mpc86xx.h | 41 ---------------- include/pci.h | 28 +++++++++-- lib_generic/addr_map.c | 4 +- lib_ppc/bat_rw.c | 28 +++++++++++ lib_ppc/board.c | 2 +- 22 files changed, 243 insertions(+), 250 deletions(-) I am submitting this as a series, because these are required, in this order, for MPC8641HPCN to continue to build and boot. I am aware that I've changed files that belong to a number of maintainers; I'm not sure how we want to handle this. Cheers, Becky

5 23

[U-Boot] [PATCH RFC] at91sam9/at91cap: move common initialisation to cpu
by Jean-Christophe PLAGNIOL-VILLARD 05 Feb '09

05 Feb '09

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- The idea is to reduce common code initialisation which is actually in board. as done on afeb9260 and Ronetix eval board for 9260 & 9263 Best Regards, J. board/afeb9260/afeb9260.c | 32 ++---------- board/atmel/at91cap9adk/at91cap9adk.c | 33 ++----------- board/atmel/at91sam9260ek/at91sam9260ek.c | 34 ++----------- board/atmel/at91sam9261ek/at91sam9261ek.c | 33 ++----------- board/atmel/at91sam9263ek/at91sam9263ek.c | 33 ++----------- board/atmel/at91sam9rlek/at91sam9rlek.c | 33 ++----------- cpu/arm926ejs/at91/Makefile | 19 +++++++- cpu/arm926ejs/at91/at91cap9_serial.c | 73 +++++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91cap9_spi.c | 41 ++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_serial.c | 73 +++++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_spi.c | 42 ++++++++++++++++ cpu/arm926ejs/at91/at91sam9261_serial.c | 73 +++++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9261_spi.c | 41 ++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_serial.c | 73 +++++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9263_spi.c | 41 ++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_serial.c | 73 +++++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_spi.c | 41 ++++++++++++++++ include/asm-arm/arch-at91/at91_common.h | 31 ++++++++++++ 18 files changed, 656 insertions(+), 163 deletions(-) create mode 100644 cpu/arm926ejs/at91/at91cap9_serial.c create mode 100644 cpu/arm926ejs/at91/at91cap9_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9260_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9261_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9261_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9263_spi.c create mode 100644 cpu/arm926ejs/at91/at91sam9rl_serial.c create mode 100644 cpu/arm926ejs/at91/at91sam9rl_spi.c create mode 100644 include/asm-arm/arch-at91/at91_common.h diff --git a/board/afeb9260/afeb9260.c b/board/afeb9260/afeb9260.c index 32445ab..e1d52ad 100644 --- a/board/afeb9260/afeb9260.c +++ b/board/afeb9260/afeb9260.c @@ -27,6 +27,7 @@ #include <asm/arch/at91sam9260.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -47,27 +48,19 @@ DECLARE_GLOBAL_DATA_PTR; static void afeb9260_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -104,19 +97,6 @@ static void afeb9260_nand_hw_init(void) at91_set_gpio_output(AT91_PIN_PC14, 1); } -static void afeb9260_spi_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ - at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ - - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); -} - #ifdef CONFIG_MACB static void afeb9260_macb_hw_init(void) { @@ -205,7 +185,7 @@ int board_init(void) #ifdef CONFIG_CMD_NAND afeb9260_nand_hw_init(); #endif - afeb9260_spi_hw_init(); + at91_spi_hw_init(); #ifdef CONFIG_MACB afeb9260_macb_hw_init(); #endif diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index f7d68b7..2d2cfe5 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -26,6 +26,7 @@ #include <asm/arch/at91cap9.h> #include <asm/arch/at91cap9_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -50,27 +51,19 @@ DECLARE_GLOBAL_DATA_PTR; static void at91cap9_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -163,20 +156,6 @@ static void at91cap9_nand_hw_init(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static void at91cap9_spi_hw_init(void) -{ - at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ - - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); -} -#endif - #ifdef CONFIG_MACB static void at91cap9_macb_hw_init(void) { @@ -374,7 +353,7 @@ int board_init(void) at91cap9_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91cap9_spi_hw_init(); + at91_spi_hw_init(); #endif #ifdef CONFIG_MACB at91cap9_macb_hw_init(); diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index ef99b8b..b51e8dc 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -26,6 +26,7 @@ #include <asm/arch/at91sam9260.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -46,27 +47,19 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9260ek_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -109,21 +102,6 @@ static void at91sam9260ek_nand_hw_init(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static void at91sam9260ek_spi_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ - at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ - - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); -} -#endif - #ifdef CONFIG_MACB static void at91sam9260ek_macb_hw_init(void) { @@ -222,7 +200,7 @@ int board_init(void) at91sam9260ek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91sam9260ek_spi_hw_init(); + at91_spi_hw_init(); #endif #ifdef CONFIG_MACB at91sam9260ek_macb_hw_init(); diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 14f236d..82dffde 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -26,6 +26,7 @@ #include <asm/arch/at91sam9261.h> #include <asm/arch/at91sam9261_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -46,27 +47,19 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9261ek_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -112,20 +105,6 @@ static void at91sam9261ek_nand_hw_init(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static void at91sam9261ek_spi_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ - - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); -} -#endif - #ifdef CONFIG_DRIVER_DM9000 static void at91sam9261ek_dm9000_hw_init(void) { @@ -255,7 +234,7 @@ int board_init(void) at91sam9261ek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91sam9261ek_spi_hw_init(); + at91_spi_hw_init(); #endif #ifdef CONFIG_DRIVER_DM9000 at91sam9261ek_dm9000_hw_init(); diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index ebd4649..872a369 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -27,6 +27,7 @@ #include <asm/arch/at91sam9263.h> #include <asm/arch/at91sam9263_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -49,27 +50,19 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9263ek_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -113,20 +106,6 @@ static void at91sam9263ek_nand_hw_init(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static void at91sam9263ek_spi_hw_init(void) -{ - at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ - - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); -} -#endif - #ifdef CONFIG_MACB static void at91sam9263ek_macb_hw_init(void) { @@ -306,7 +285,7 @@ int board_init(void) at91sam9263ek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91sam9263ek_spi_hw_init(); + at91_spi_hw_init(); #endif #ifdef CONFIG_MACB at91sam9263ek_macb_hw_init(); diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index b6fef9d..b42565f 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -26,6 +26,7 @@ #include <asm/arch/at91sam9rl.h> #include <asm/arch/at91sam9rl_matrix.h> #include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> @@ -46,27 +47,19 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9rlek_serial_hw_init(void) { #ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); + at91_serial_hw_init(0); #endif #ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); + at91_serial_hw_init(1); #endif #ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); + at91_serial_hw_init(2); #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + at91_serial_hw_init(3); #endif } @@ -112,20 +105,6 @@ static void at91sam9rlek_nand_hw_init(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static void at91sam9rlek_spi_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA28, 0); /* SPI0_NPCS0 */ - - at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ - - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); -} -#endif - #ifdef CONFIG_LCD vidinfo_t panel_info = { vl_col: 240, @@ -228,7 +207,7 @@ int board_init(void) at91sam9rlek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91sam9rlek_spi_hw_init(); + at91_spi_hw_init(); #endif #ifdef CONFIG_LCD at91sam9rlek_lcd_hw_init(); diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile index 2d2a888..502271e 100644 --- a/cpu/arm926ejs/at91/Makefile +++ b/cpu/arm926ejs/at91/Makefile @@ -25,8 +25,25 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a +COBJS-$(CONFIG_AT91CAP9) += at91cap9_serial.o +ifdef CONFIG_AT91SAM9260 +COBJS-y += at91sam9260_serial.o +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o +endif +ifdef CONFIG_AT91SAM9261 +COBJS-y += at91sam9261_serial.o +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9261_spi.o +endif +ifdef CONFIG_AT91SAM9263 +COBJS-y += at91sam9263_serial.o +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9263_spi.o +endif +ifdef CONFIG_AT91SAM9RL +COBJS-y += at91sam9rl_serial.o +COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o +endif +COBJS-$(CONFIG_HAS_DATAFLASH) += spi.o COBJS-y += timer.o -COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o COBJS-y += usb.o SOBJS = lowlevel_init.o diff --git a/cpu/arm926ejs/at91/at91cap9_serial.c b/cpu/arm926ejs/at91/at91cap9_serial.c new file mode 100644 index 0000000..c7dbad9 --- /dev/null +++ b/cpu/arm926ejs/at91/at91cap9_serial.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +int at91_serial_hw_init(int uart) +{ + int err = -1; + + switch(uart) { + case 0: +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); + err = 0; +#endif + break; + case 1: +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); + err = 0; +#endif + break; + case 2: +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); + err = 0; +#endif + break; + case 3: +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + err = 0; +#endif + break; + default: + printf(" uart%d configuration failled\n", err); + } + + return err; +} diff --git a/cpu/arm926ejs/at91/at91cap9_spi.c b/cpu/arm926ejs/at91/at91cap9_spi.c new file mode 100644 index 0000000..2ceb6a1 --- /dev/null +++ b/cpu/arm926ejs/at91/at91cap9_spi.c @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_spi_hw_init(void) +{ + at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ + + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); +} diff --git a/cpu/arm926ejs/at91/at91sam9260_serial.c b/cpu/arm926ejs/at91/at91sam9260_serial.c new file mode 100644 index 0000000..4dd7c95 --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9260_serial.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +int at91_serial_hw_init(int uart) +{ + int err = -1; + + switch(uart) { + case 0: +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); + err = 0; +#endif + break; + case 1: +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); + err = 0; +#endif + break; + case 2: +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); + err = 0; +#endif + break; + case 3: +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + err = 0; +#endif + break; + default: + printf(" uart%d configuration failled\n", err); + } + + return err; +} diff --git a/cpu/arm926ejs/at91/at91sam9260_spi.c b/cpu/arm926ejs/at91/at91sam9260_spi.c new file mode 100644 index 0000000..fba9699 --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9260_spi.c @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ + at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ + + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); +} diff --git a/cpu/arm926ejs/at91/at91sam9261_serial.c b/cpu/arm926ejs/at91/at91sam9261_serial.c new file mode 100644 index 0000000..bf3c450 --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9261_serial.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +int at91_serial_hw_init(int uart) +{ + int err = -1; + + switch(uart) { + case 0: +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); + err = 0; +#endif + break; + case 1: +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); + err = 0; +#endif + break; + case 2: +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); + err = 0; +#endif + break; + case 3: +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + err = 0; +#endif + break; + default: + printf(" uart%d configuration failled\n", err); + } + + return err; +} diff --git a/cpu/arm926ejs/at91/at91sam9261_spi.c b/cpu/arm926ejs/at91/at91sam9261_spi.c new file mode 100644 index 0000000..8eda600 --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9261_spi.c @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ + + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); +} diff --git a/cpu/arm926ejs/at91/at91sam9263_serial.c b/cpu/arm926ejs/at91/at91sam9263_serial.c new file mode 100644 index 0000000..c20699a --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9263_serial.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +int at91_serial_hw_init(int uart) +{ + int err = -1; + + switch(uart) { + case 0: +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); + err = 0; +#endif + break; + case 1: +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); + err = 0; +#endif + break; + case 2: +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); + err = 0; +#endif + break; + case 3: +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + err = 0; +#endif + break; + default: + printf(" uart%d configuration failled\n", err); + } + + return err; +} diff --git a/cpu/arm926ejs/at91/at91sam9263_spi.c b/cpu/arm926ejs/at91/at91sam9263_spi.c new file mode 100644 index 0000000..b01541c --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9263_spi.c @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_spi_hw_init(void) +{ + at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ + + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); +} diff --git a/cpu/arm926ejs/at91/at91sam9rl_serial.c b/cpu/arm926ejs/at91/at91sam9rl_serial.c new file mode 100644 index 0000000..0effb8d --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9rl_serial.c @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +int at91_serial_hw_init(int uart) +{ + int err = -1; + + switch(uart) { + case 0: +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); + err = 0; +#endif + break; + case 1: +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); + err = 0; +#endif + break; + case 2: +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); + err = 0; +#endif + break; + case 3: +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + err = 0; +#endif + break; + default: + printf(" uart%d configuration failled\n", err); + } + + return err; +} diff --git a/cpu/arm926ejs/at91/at91sam9rl_spi.c b/cpu/arm926ejs/at91/at91sam9rl_spi.c new file mode 100644 index 0000000..8196092 --- /dev/null +++ b/cpu/arm926ejs/at91/at91sam9rl_spi.c @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void at91_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA28, 0); /* SPI0_NPCS0 */ + + at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); +} diff --git a/include/asm-arm/arch-at91/at91_common.h b/include/asm-arm/arch-at91/at91_common.h new file mode 100644 index 0000000..507e4d3 --- /dev/null +++ b/include/asm-arm/arch-at91/at91_common.h @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef AT91_COMMON_H +#define AT91_COMMON_H + +int at91_serial_hw_init(int uart); +void at91_spi_hw_init(void); + +#endif /* AT91_COMMON_H */ -- 1.5.6.5

3 5

[U-Boot] [PATCH] saveenv: standardize enablement
by Mike Frysinger 28 Jan '09

28 Jan '09

Rather than special casing each environment type for enabling the saveenv command, have them all behave the same. This avoids bitrot as new env sources are added/removed. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- common/cmd_nvedit.c | 26 ++++++++------------------ 1 files changed, 8 insertions(+), 18 deletions(-) diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 85025da..b93de13 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -546,11 +546,8 @@ int getenv_r (char *name, char *buf, unsigned len) return (-1); } -#if ((defined(CONFIG_ENV_IS_IN_NVRAM) || defined(CONFIG_ENV_IS_IN_EEPROM) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND))) \ - && !defined(CONFIG_ENV_IS_NOWHERE)) +#if defined(CONFIG_CMD_ENV) && !defined(CONFIG_ENV_IS_NOWHERE) + int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { extern char * env_name_spec; @@ -560,6 +557,12 @@ int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return (saveenv() ? 1 : 0); } +U_BOOT_CMD( + saveenv, 1, 0, do_saveenv, + "saveenv - save environment variables to persistent storage\n", + NULL +); + #endif @@ -602,19 +605,6 @@ U_BOOT_CMD( " - delete environment variable 'name'\n" ); -#if ((defined(CONFIG_ENV_IS_IN_NVRAM) || defined(CONFIG_ENV_IS_IN_EEPROM) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND))) \ - && !defined(CONFIG_ENV_IS_NOWHERE)) -U_BOOT_CMD( - saveenv, 1, 0, do_saveenv, - "saveenv - save environment variables to persistent storage\n", - NULL -); - -#endif - #if defined(CONFIG_CMD_ASKENV) U_BOOT_CMD( -- 1.6.0.6

2 9

[U-Boot] SATA/IDE/etc... init
by Mike Frysinger 27 Jan '09

27 Jan '09

the SATA/IDE/etc... layers seem to go against the u-boot policy when it comes to initialization. in other words, if support for them is enabled, then they are unconditionally initialized in board code (see ide_init / sata_initialize in lib_*/board.c:board_init_r). am i missing something or should these init functions be delayed until the sata/ide/whatever functions need them ? or should they be made explicit like some commands where you first have to do "sata init" before you can access the device ? this bugs me most because normally u-boot starts up nice & fast, but now that we've added SATA support, there's an annoying second or 3 pause while the disk is probed ... -mike

5 40

[U-Boot] [PATCH 0/5] Command usage cleanup
by Peter Tyser 27 Jan '09

27 Jan '09

2 6

[U-Boot] nand potential div0
by Ryan J M 27 Jan '09

27 Jan '09

I thought it would be better to check whether chip->ecc.size equal 0 here, I forgot to set ecc.size in board_nand_init() and it trigs a div0 hang. driver/mtd/nand/nand_base.c 2786 /* 2787 * Set the number of read / write steps for one page depending on ECC 2788 * mode 2789 */ 2790 chip->ecc.steps = mtd->writesize / chip->ecc.size; 2791 if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { 2792 printk(KERN_WARNING "Invalid ecc parameters\n"); 2793 BUG(); 2794 } 2795 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; 2796 -- FIXME if it is wrong.

2 1

[U-Boot] [PATCH 1/1] jffs2: Fix zero sector_size when not using CONFIG_JFFS2_CMDLINE
by Tomasz Figa 27 Jan '09

27 Jan '09

This patch fixes a bug (?) introduced after inclusion of the new JFFS2 code. When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't fill in part->sector_size (keeping it as 0), but a correct value is needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses to be in the same place of the memory, what obviously means impossibility to use the JFFS2 partition. This problem is fixed in this patch by including sector size calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant. Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com> --- diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 7866c80..fe0f8d7 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -1778,6 +1778,96 @@ int mtdparts_init(void) */ /** + * Calculate sector size. + * + * @return sector size + */ +static inline u32 get_part_sector_size_nand(struct mtdids *id) +{ +#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND) +#if defined(CONFIG_NAND_LEGACY) + extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; + + return nand_dev_desc[id->num].erasesize; +#else + nand_info_t *nand; + + nand = &nand_info[id->num]; + + return nand->erasesize; +#endif +#else + BUG(); + return 0; +#endif +} + +static inline u32 get_part_sector_size_nor(struct mtdids *id, struct part_info *part) +{ +#if defined(CONFIG_CMD_FLASH) + extern flash_info_t flash_info[]; + + u32 end_phys, start_phys, sector_size = 0, size = 0; + int i; + flash_info_t *flash; + + flash = &flash_info[id->num]; + + start_phys = flash->start[0] + part->offset; + end_phys = start_phys + part->size; + + for (i = 0; i < flash->sector_count; i++) { + if (flash->start[i] >= end_phys) + break; + + if (flash->start[i] >= start_phys) { + if (i == flash->sector_count - 1) { + size = flash->start[0] + flash->size - flash->start[i]; + } else { + size = flash->start[i+1] - flash->start[i]; + } + + if (sector_size < size) + sector_size = size; + } + } + + return sector_size; +#else + BUG(); + return 0; +#endif +} + +static inline u32 get_part_sector_size_onenand(void) +{ +#if defined(CONFIG_CMD_ONENAND) + struct mtd_info *mtd; + + mtd = &onenand_mtd; + + return mtd->erasesize; +#else + BUG(); + return 0; +#endif +} + +static inline u32 get_part_sector_size(struct mtdids *id, struct part_info *part) +{ + if (id->type == MTD_DEV_TYPE_NAND) + return get_part_sector_size_nand(id); + else if (id->type == MTD_DEV_TYPE_NOR) + return get_part_sector_size_nor(id, part); + else if (id->type == MTD_DEV_TYPE_ONENAND) + return get_part_sector_size_onenand(); + else + DEBUGF("Error: Unknown device type.\n"); + + return 0; +} + +/** * Parse and initialize global mtdids mapping and create global * device/partition list. * @@ -1846,6 +1936,8 @@ int mtdparts_init(void) part->offset = 0x00000000; #endif + part->sector_size = get_part_sector_size(id, part); + part->dev = current_dev; INIT_LIST_HEAD(&part->link);

2 1

[U-Boot] [PATCH] Add AMD 29LV160DB FLASH support to SBC2410 board.
by Daniel Schuler 27 Jan '09

27 Jan '09

The new SBC-2410A board from Embest now ships with 2MB NOR FLASH, for which CONFIG_AMD_LV160 has been defined in include/configs/sbc2410x.h This chip is already supported in other architectures, so AMD_ID_LV160B has been used as-is in board/sbc2410x/flash.c Signed-off-by: Daniel Schuler <dbschuler(a)gmail.com> --- board/sbc2410x/flash.c | 6 ++++++ include/configs/sbc2410x.h | 21 ++++++++++++++------- 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/board/sbc2410x/flash.c b/board/sbc2410x/flash.c index abb0935..81aa9e8 100644 --- a/board/sbc2410x/flash.c +++ b/board/sbc2410x/flash.c @@ -69,6 +69,9 @@ ulong flash_init (void) #elif defined(CONFIG_AMD_LV800) (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_LV800B & FLASH_TYPEMASK); +#elif defined(CONFIG_AMD_LV160) + (AMD_MANUFACT & FLASH_VENDMASK) | + (AMD_ID_LV160B & FLASH_TYPEMASK); #else #error "Unknown flash configured" #endif @@ -142,6 +145,9 @@ void flash_print_info (flash_info_t * info) case (AMD_ID_LV800B & FLASH_TYPEMASK): printf ("1x Amd29LV800BB (8Mbit)\n"); break; + case (AMD_ID_LV160B & FLASH_TYPEMASK): + printf ("1x Amd29LV160DB (16Mbit)\n"); + break; default: printf ("Unknown Chip Type\n"); goto Done; diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index d7a6ae4..944d85b 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -139,7 +139,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ +/* the PWM Timer 4 uses a counter of 15625 for 10 ms, so we need */ /* it to wrap 100 times (total 1562500) to get 1 sec. */ #define CONFIG_SYS_HZ 1562500 @@ -173,29 +173,36 @@ */ /* #define CONFIG_AMD_LV400 1 /\* uncomment this if you have a LV400 flash *\/ */ -#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ +/* #define CONFIG_AMD_LV800 1 /\* uncomment this if you have a LV800 flash *\/ */ + +#define CONFIG_AMD_LV160 1 /* uncomment this if you have a LV160 flash */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ + +#ifdef CONFIG_AMD_LV160 +#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */ +#define CONFIG_SYS_MAX_FLASH_SECT (35) /* max number of sectors on one chip */ +#endif + #ifdef CONFIG_AMD_LV800 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ #define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ #endif #ifdef CONFIG_AMD_LV400 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ #define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ #endif +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE - CONFIG_ENV_SIZE) /* starting addr of environment */ + /* timeout values are in ticks */ #define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ #define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ - /*----------------------------------------------------------------------- * NAND flash settings */ -- 1.5.6.3

2 1

[U-Boot] [PATCH] soft_i2c.c add option for repeated start in i2c_read()
by Andrew Dyer 27 Jan '09

27 Jan '09

This patch adds a #define to optionally change the behaviour of i2c_read() in soft_i2c.c to send an I2C repeated start instead of a stop-start between sending the device address pointer write and reading back the data. The current behaviour is retained as the default. While most devices will work either way, I have a smart battery(*) that requires repeated start, and someone at some point found a device that required a stop-start. (*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20D… Signed-off-by: Andrew Dyer <adyer(a)righthandtech.com> --- README | 9 +++++++++ drivers/i2c/soft_i2c.c | 12 +++++++++++- 2 files changed, 20 insertions(+), 1 deletions(-) diff --git a/README b/README index 2a553c2..763fb7a 100644 --- a/README +++ b/README @@ -1496,6 +1496,15 @@ The following options need to be configured: Bus on the MPC8260. But it should be not so difficult to add this option to other architectures. + CONFIG_SOFT_I2C_READ_REPEATED_START + + defining this will force the i2c_read() function in + the soft_i2c driver to perform an I2C repeated start + between writing the address pointer and reading the + data. If this define is omitted the default behaviour + of doing a stop-start sequence will be used. Most I2C + devices can use either method, but some require one or + the other. - SPI Support: CONFIG_SPI diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index a27de5a..da6cec1 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -385,8 +385,18 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) } shift -= 8; } - send_stop(); /* reportedly some chips need a full stop */ + + /* Some I2C chips need a stop/start sequence here, + * other chips don't work with a full stop and need + * only a start. Default behaviour is to send the + * stop/start sequence. + */ +#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START send_start(); +#else + send_stop(); + send_start(); +#endif } /* * Send the chip address again, this time for a read cycle. -- 1.5.6.3

2 1

[U-Boot] Minor bug found in board/zylonite/lowlevel_init.S. 0x300 changed to 300.
by Tom Evans 27 Jan '09

27 Jan '09

I was looking through some board files based on the zylonite ones, and spotted the following changes. | $ git-log board/zylonite/lowlevel_init.S | ... | commit 951a954b77ef30df1f5c1b7b9b4312e783b2cbb4 | Merge: ac7d97d... bfc8125... | Author: Wolfgang Denk <wd(a)atlas.denx.de> | Date: Mon Mar 6 23:18:48 2006 +0100 | | Merge with /home/wd/git/u-boot/master | Code cleanup. | | commit 9d803d8c0b7fd9aeb2e708e9e48dd76d7287856d | Author: Markus Klotzb^(n)cher <Markus Klotzb^(n)mk(a)pollux.(none)> | Date: Wed Feb 8 18:56:28 2006 +0100 | | Changes: | | * lots of bugfixes in the assembler code | * reverted hardware.h back to original | * enabled hardware DRAM calibration | * GCC-4 fix: modified GLOBAL_DATA_POINTER macro | $ git diff | af646e865f4bc67623ca957dfe3d3e4a95ff0468.. | 9d803d8c0b7fd9aeb2e708e9e48dd76d7287856d | board/zylonite/lowlevel_init.S | ... | + /* mk: replaced with wait macro */ | +/* ldr r3, =OSCR /\* reset the OS Timer Count to zero *\/ */ | +/* mov r2, #0 */ | +/* str r2, [r3] */ | +/* ldr r4, =0x300 /\* really 0x2E1 is about 200usec, *\/ */ | +/* /\* so 0x300 should be plenty *\/ */ | +/* 1: */ | +/* ldr r2, [r3] */ | +/* cmp r4, r2 */ | +/* bgt 1b */ | + wait #300 Note that the linear code has been replaced with a macro. The comments above the code above state: /* Step 1: Wait for at least 200 microsedonds to allow internal */ /* clocks to settle. Only necessary after hard reset... */ The bug is that "=0x300" has been changed to "#300", and the latter is interpreted by the assembler as a decimal number. So the code is only waiting for 92us instead of 200 (13MHz clock divided by 4, divided by 300). I don't know if this causes any problems. The code doesn't match the comments, and it probably isn't following the manufacturer's specification for this timing either. Anyone else based of the Zylonite port might like to check their code. -- === Tom Evans Tom.Evans(a)ceos.com.au CEOS Pty Ltd www.ceos.com.au 3/17 Burgundy St, Heidelberg, Victoria 3084, Australia Phone (+61 3) 9458 4955 Direct Unsupported FAX (+61 3) 9458 4966 Mobile 0405 776 431

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