December 2008 - U-Boot

[U-Boot] iPAQ 21x support (+PXA3xx NAND flash and MMC)
by Oliver Ford 02 Dec '08

02 Dec '08

Hi, I've recently started trying to use U-boot on an iPAQ 214 which runs on a PXA310 cpu. I've got the basic boot up, NAND flash and MMC systems working so far. I originally tried to use the zylonite's nand.c that's already in u-boot but it was very flaky and didn't support several things I needed like large-page command set and the hardware ecc. I've now copied the latest pxa3xx nand flash code from the kernel and just modified it to cope without DMA and without IRQs. I'm not sure it exactly fits in with the u-boot nand code (eg. it does an internal read ID scan to find the right command set) but it works a lot better than the board/zylonite/nand.c. Would this be useful to anyone else? Also, can I, and how do I go about submitting the stuff for the iPAQ 21x. The only change outside it's own config header and board/ dir is the a slight change to get the MMC code working on the pxa3xx (below). Thanks, Oliver diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index d735c8d..3b281d5 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -126,7 +126,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len) MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ; while (len) { if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { -#ifdef CONFIG_PXA27X +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) int i; for (i = min(len, 32); i; i--) { *dst++ = *((volatile uchar *)&MMC_RXFIFO); @@ -558,7 +558,11 @@ mmc_init(int verbose) set_GPIO_mode(GPIO6_MMCCLK_MD); set_GPIO_mode(GPIO8_MMCCS0_MD); #endif +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_12_MMC0; +#else CKEN |= CKEN12_MMC; /* enable MMC unit clock */ +#endif MMC_CLKRT = MMC_CLKRT_0_3125MHZ; MMC_RESTO = MMC_RES_TO_MAX;

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[U-Boot] Does u-boot support custom binaries?
by arun c 02 Dec '08

02 Dec '08

Hi all, Does u-boot support loading custom binary executables? I know u-boot supports standalone applications and operating systems. The scenario is like this. 1) u-boot completes the hardware booting. 2) It loads the custom binary image(elf file) from flash to SDRAM and pass over the control to that binary. The custom binary is built using code warrior tool(an IDE) and it deals with hardware components which are not touched by u-boot(It does not reinitialize things done by u-boot and doesn't need a console). ie. the custom binary application does not use any functions provided by u-boot, it just want an environment to execute itself. Is this possible? Regards, Arun C

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[U-Boot] [PATCH] UBI: Fix size parsing in "ubi create"
by Stefan Roese 02 Dec '08

02 Dec '08

Signed-off-by: Stefan Roese <sr(a)denx.de> --- common/cmd_ubi.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 495d71e..fd33a67 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -546,7 +546,7 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) } /* E.g., create volume size */ if (argc == 4) { - addr = simple_strtoul(argv[3], NULL, 16); + size = simple_strtoul(argv[3], NULL, 16); argc--; } /* Use maximum available size */ -- 1.6.0.4

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[U-Boot] [PATCH v2] UBI: Enable re-initializing of the "ubi part" command
by Stefan Roese 02 Dec '08

02 Dec '08

With this patch now, the user can call "ubi part" multiple times to re-connect the UBI device to another MTD partition. Signed-off-by: Stefan Roese <sr(a)denx.de> --- v2: - Call del_mtd_partitions() after calling ubi_exit() to really clean up the previously configured mtd subsystem. common/cmd_ubi.c | 11 +++++++++++ drivers/mtd/ubi/build.c | 1 + include/ubi_uboot.h | 1 + 3 files changed, 13 insertions(+), 0 deletions(-) diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 8446765..495d71e 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -31,6 +31,7 @@ /* Private own data */ static struct ubi_device *ubi; static char buffer[80]; +static int ubi_initialized; struct selected_dev { char dev_name[32]; /* NAND/OneNAND etc */ @@ -428,6 +429,8 @@ static int ubi_dev_scan(struct mtd_info *info, char *ubidev) return err; } + ubi_initialized = 1; + return 0; } @@ -464,6 +467,14 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) ubi_dev.nr = 0; /* + * Call ubi_exit() before re-initializing the UBI subsystem + */ + if (ubi_initialized) { + ubi_exit(); + del_mtd_partitions(ubi_dev.mtd_info); + } + + /* * Check for nand|onenand selection */ #if defined(CONFIG_CMD_NAND) diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 17cabb2..bdf75c9 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -1059,6 +1059,7 @@ void __exit ubi_exit(void) misc_deregister(&ubi_ctrl_cdev); class_remove_file(ubi_class, &ubi_version); class_destroy(ubi_class); + mtd_devs = 0; } module_exit(ubi_exit); diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 295f2c0..095dfc1 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -211,6 +211,7 @@ static inline long IS_ERR(const void *ptr) /* functions */ extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); extern int ubi_init(void); +extern void ubi_exit(void); extern struct ubi_device *ubi_devices[]; -- 1.6.0.4

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[U-Boot] General Dentists Listing for the United States
by Rucker ghost 02 Dec '08

02 Dec '08

Comes with unlimited use license and at a very resonable price: <> 164,297 D.entists <> 158,851 Postal Addresses <> 163,954 Tel #'s <> 77,215 Fax Numbers <> 45,672 business e-mails Until Dec 5 the special introductory price is $290 (reduced from $592) For details please send an email to Villegas(a)perfectdatamed.com to adjust your subscription status email to exclude(a)perfectdatamed.com

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[U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue
by Dave Liu 01 Dec '08

01 Dec '08

we load the secondary stage u-boot image from NAND to system memory by nand_load, we have not flush data cache to memory, not invalidate instruction cache before we jump to RAM. when the system is cache enable and the TLB/page attribute of system memory is cacheable, it will cause issue. - 83xx family is using the dcache lock, so all of dcache access is cache-inhibited. so you can't see the issue. - 85xx family is using dcache, icache enable, partial cache lock. you will see the issue. The patch fix the cache issue. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- nand_spl/nand_boot_fsl_elbc.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-) diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c index 4a961ea..b0ab734 100644 --- a/nand_spl/nand_boot_fsl_elbc.c +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -27,6 +27,7 @@ #include <asm/io.h> #include <asm/immap_83xx.h> #include <asm/fsl_lbc.h> +#include <asm/cache.h> #include <linux/mtd/nand.h> #define WINDOW_SIZE 8192 @@ -125,6 +126,33 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst) } /* + * clean the dcache, invalidate the icache + * for powerpc architecture + */ +static void __flush_cache(ulong start, ulong size) +{ + ulong addr, end; + ulong cache_line = CONFIG_SYS_CACHELINE_SIZE; + + end = start + size; + + /* clean the dcache, make sure all of data to memory */ + for (addr = start; addr < end; addr += cache_line) + asm ("dcbst 0,%0": :"r" (addr)); + + /* wait for all dcbst to complete on bus */ + asm ("sync"); + + /* invalidate icache */ + for (addr = start; addr < end; addr += cache_line) + asm ("icbi 0,%0": :"r" (addr)); + + asm ("sync"); + /* flush prefetch queue in any case */ + asm ("isync"); +} + +/* * The main entry for NAND booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image * from NAND into SDRAM and starts it from there. @@ -143,6 +171,13 @@ void nand_boot(void) * Jump to U-Boot image */ puts("transfering control\n"); + /* + * We need clean dcache and invalidate + * to sync between icache and dcache + * before jump to RAM. make sure all of + * NAND data write to memory. + */ + __flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot(); } -- 1.5.4

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[U-Boot] [PATCH] Remove unused CONFIG_ADDR_STREAMING defines
by Peter Tyser 01 Dec '08

01 Dec '08

--- include/configs/ATUM8548.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 20 files changed, 0 insertions(+), 20 deletions(-) diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 1b74526..7ee05e5 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -67,7 +67,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888a..2f391da 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9..d44cbaf 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -79,7 +79,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a..444be54 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -62,7 +62,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a2..df0b4da 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea6..f8267c5 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -66,7 +66,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba..ae9322c 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -69,7 +69,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419cc..39059c3 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f67d489..7ada96b 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -73,7 +73,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d6..a61ff9e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -61,7 +61,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c3693b8..a2d2712 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -71,7 +71,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/PM854.h b/include/configs/PM854.h index c3a7f81..ce09465 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -71,7 +71,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index b3bcf23..a3fdadd 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -72,7 +72,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 48c9339..58c7528 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -75,7 +75,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2d4048a..39cdd34 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -106,7 +106,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index aefd30a..d0ebe9a 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -59,7 +59,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 4301275..6082adb 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -69,7 +69,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c67db8f..7eb4844 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -82,7 +82,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2188e54..00123cf 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b0bd050..cf56f75 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ -- 1.6.0.2.GIT

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[U-Boot] [PATCH] net: Fix TftpStart() ip:filename bug
by Peter Tyser 01 Dec '08

01 Dec '08

The TftpStart() function modifies the 'BootFile' string when 'BootFile' contains both an IP address and filename (eg 1.2.3.4:/path/file). This causes subsequent calls to TftpStart to incorrectly parse the TFTP filename and server IP address to use. For example: => tftp 0x100000 10.52.0.62:/home/ptyser/non_existant Speed: 100, half duplex Using eTSEC1 device TFTP from server 10.52.0.62; our IP address is 10.52.253.79 ^^^^^^^^^^ CORRECT Filename '/home/ptyser/non_existant'. ^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT Load address: 0x100000 Loading: * TFTP error: 'File not found' (1) Starting again eTSEC2: No link. Speed: 100, half duplex Using eTSEC1 device TFTP from server 10.52.0.33; our IP address is 10.52.253.79 ^^^^^^^^^^ WRONG Filename '10.52.0.62'. ^^^^^^^^^^ WRONG Load address: 0x100000 Loading: * TFTP error: 'File not found' (1) Starting again TftpStart() was modified to not modify the 'BootFile' string. --- net/tftp.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/net/tftp.c b/net/tftp.c index ce6ea3d..3dac3d8 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -499,9 +499,8 @@ TftpStart (void) strncpy(tftp_filename, BootFile, MAX_LEN); tftp_filename[MAX_LEN-1] = 0; } else { - *p++ = '\0'; TftpServerIP = string_to_ip (BootFile); - strncpy(tftp_filename, p, MAX_LEN); + strncpy(tftp_filename, p + 1, MAX_LEN); tftp_filename[MAX_LEN-1] = 0; } } -- 1.6.0.2.GIT

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[U-Boot] [Fwd: Re: iPAQ 21x support (+PXA3xx NAND flash and MMC)]
by Oliver Ford 01 Dec '08

01 Dec '08

Whoops, I think I missed the list on this one. Daniel Mack wrote: > Yes, absolutely - to me. I'm sitting on this at this very moment :) > > I was also thinking about implementing this as a PXA3xx generic layer > for small pages, large pages, 8bit and 16bit so the same code does not > need to be copied to all the board implementations over and over again. > > But I'm not sure whether there are any plans to do this as I didn't > follow the development of this project for a long time. > > Anyways, I'd appreciate if you could send over what you got. > Ok, I've currently got it inside my board code directory but it wouldn't be much to generalise. There's a copy here: http://www.oliford.co.uk/hpipaq214/public/u-boot/board/ipaq214/nand.c http://www.oliford.co.uk/hpipaq214/public/u-boot/board/ipaq214/pxa3xx-nand.h Mostly it's the same as the linux one except that I've written a function called pxa3xx_nand_no_irq_wait_completion_timeout() which mimics the call to wait_for_completion_timeout() that would be made with IRQs avaliable. Oliver

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[U-Boot] [PATCH v2 0/2] 85xx: Support for XPedite5200
by Peter Tyser 01 Dec '08

01 Dec '08

These 2 patches add support for the XPedite5200 SBC - a MPC8548-based PMC card made by Extreme Engineering Solutions. The patches require the following 2 patches to be applied first: - pca953x: Add support for PCA953x I2C gpio devices - XPedite5370 board support changes since v1: - Change alignment by spaces to alignment by tabs - Fixed typos in host_agent_cfg/io_port_cfg - Fixed variable declaration in code - Fixed some lines longer than 80 chars - Cleaned up environment configuration defines - Fixed multiline comment style Best, Peter Peter Tyser (2): 85xx: Add PORDEVSR_PCI1 define XPedite5200 board support MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/xes/common/Makefile | 3 +- board/xes/common/actl_nand.c | 65 ++++ board/xes/common/fsl_85xx_pci.c | 103 +++++++- board/xes/xpedite5200/Makefile | 55 ++++ board/xes/xpedite5200/config.mk | 34 +++ board/xes/xpedite5200/ddr.c | 91 ++++++ board/xes/xpedite5200/law.c | 51 ++++ board/xes/xpedite5200/tlb.c | 85 ++++++ board/xes/xpedite5200/u-boot.lds | 145 +++++++++ board/xes/xpedite5200/xpedite5200.c | 125 ++++++++ include/asm-ppc/immap_85xx.h | 1 + include/configs/XPEDITE5200.h | 547 +++++++++++++++++++++++++++++++++++ 15 files changed, 1305 insertions(+), 5 deletions(-) create mode 100644 board/xes/common/actl_nand.c create mode 100644 board/xes/xpedite5200/Makefile create mode 100644 board/xes/xpedite5200/config.mk create mode 100644 board/xes/xpedite5200/ddr.c create mode 100644 board/xes/xpedite5200/law.c create mode 100644 board/xes/xpedite5200/tlb.c create mode 100644 board/xes/xpedite5200/u-boot.lds create mode 100644 board/xes/xpedite5200/xpedite5200.c create mode 100644 include/configs/XPEDITE5200.h

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