November 2008 - U-Boot

[U-Boot] [PATCH] cmd_bdinfo: move implementation to arch instead of common
by Jean-Christophe PLAGNIOL-VILLARD 04 Dec '08

04 Dec '08

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- apply after my precedent fix for cmd_bdinfo Best Regards, J. common/Makefile | 1 - common/cmd_bdinfo.c | 447 ----------------------------------------------- include/common.h | 15 ++ lib_arm/Makefile | 1 + lib_arm/bdinfo.c | 69 ++++++++ lib_avr32/Makefile | 1 + lib_avr32/bdinfo.c | 62 +++++++ lib_blackfin/Makefile | 1 + lib_blackfin/bdinfo.c | 68 +++++++ lib_i386/Makefile | 1 + lib_i386/bdinfo.c | 62 +++++++ lib_m68k/Makefile | 1 + lib_m68k/bdinfo.c | 101 +++++++++++ lib_microblaze/Makefile | 1 + lib_microblaze/bdinfo.c | 65 +++++++ lib_mips/Makefile | 1 + lib_mips/bdinfo.c | 62 +++++++ lib_nios/Makefile | 1 + lib_nios/bdinfo.c | 61 +++++++ lib_nios2/Makefile | 1 + lib_nios2/bdinfo.c | 71 ++++++++ lib_ppc/Makefile | 1 + lib_ppc/bdinfo.c | 141 +++++++++++++++ lib_sh/Makefile | 1 + lib_sh/bdinfo.c | 62 +++++++ lib_sparc/Makefile | 13 +- lib_sparc/bdinfo.c | 78 ++++++++ 27 files changed, 937 insertions(+), 452 deletions(-) delete mode 100644 common/cmd_bdinfo.c create mode 100644 lib_arm/bdinfo.c create mode 100644 lib_avr32/bdinfo.c create mode 100644 lib_blackfin/bdinfo.c create mode 100644 lib_i386/bdinfo.c create mode 100644 lib_m68k/bdinfo.c create mode 100644 lib_microblaze/bdinfo.c create mode 100644 lib_mips/bdinfo.c create mode 100644 lib_nios/bdinfo.c create mode 100644 lib_nios2/bdinfo.c create mode 100644 lib_ppc/bdinfo.c create mode 100644 lib_sh/bdinfo.c create mode 100644 lib_sparc/bdinfo.c diff --git a/common/Makefile b/common/Makefile index 6484b23..7412abb 100644 --- a/common/Makefile +++ b/common/Makefile @@ -63,7 +63,6 @@ COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o COBJS-$(CONFIG_AUTOSCRIPT) += cmd_autoscript.o COBJS-$(CONFIG_CMD_AUTOSCRIPT) += cmd_autoscript.o -COBJS-$(CONFIG_CMD_BDI) += cmd_bdinfo.o COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o cmd_bedbug.o COBJS-$(CONFIG_CMD_BMP) += cmd_bmp.o COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c deleted file mode 100644 index 087eda7..0000000 --- a/common/cmd_bdinfo.c +++ /dev/null @@ -1,447 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Boot support - */ -#include <common.h> -#include <command.h> -#include <net.h> /* for print_IPaddr */ - -DECLARE_GLOBAL_DATA_PTR; - -static void print_num(const char *, ulong); - -#ifndef CONFIG_ARM /* PowerPC and other */ -static void print_lnum(const char *, u64); - -#ifdef CONFIG_PPC -static void print_str(const char *, const char *); - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - char buf[32]; - -#ifdef DEBUG - print_num ("bd address", (ulong)bd ); -#endif - print_num ("memstart", bd->bi_memstart ); - print_lnum ("memsize", bd->bi_memsize ); - print_num ("flashstart", bd->bi_flashstart ); - print_num ("flashsize", bd->bi_flashsize ); - print_num ("flashoffset", bd->bi_flashoffset ); - print_num ("sramstart", bd->bi_sramstart ); - print_num ("sramsize", bd->bi_sramsize ); -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ - defined(CONFIG_8260) || defined(CONFIG_E500) - print_num ("immr_base", bd->bi_immr_base ); -#endif - print_num ("bootflags", bd->bi_bootflags ); -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) - print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); - print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) - print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); -#endif -#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ -#if defined(CONFIG_CPM2) - print_str ("vco", strmhz(buf, bd->bi_vco)); - print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); - print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); -#endif - print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); -#if defined(CONFIG_CPM2) - print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); -#endif - print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); -#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ -#if defined(CONFIG_MPC8220) - print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); - print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); - print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); - print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); - print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq)); -#endif - - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - -#if defined(CONFIG_HAS_ETH1) - puts ("\neth1addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH2) - puts ("\neth2addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH3) - puts ("\neth3addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH4) - puts ("\neth4addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet4addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH5) - puts ("\neth5addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet5addr[i]); - } -#endif - -#ifdef CONFIG_HERMES - print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); -#endif - puts ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr); - printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate ); - return 0; -} - -#elif defined(CONFIG_NIOS) /* NIOS*/ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); - printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} - -#elif defined(CONFIG_NIOS2) /* Nios-II */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ -#if defined(CONFIG_CMD_NET) - int i; -#endif - bd_t *bd = gd->bd; - - print_num ("mem start", (ulong)bd->bi_memstart); - print_lnum ("mem size", (u64)bd->bi_memsize); - print_num ("flash start", (ulong)bd->bi_flashstart); - print_num ("flash size", (ulong)bd->bi_flashsize); - print_num ("flash offset", (ulong)bd->bi_flashoffset); - -#if defined(CONFIG_SYS_SRAM_BASE) - print_num ("sram start", (ulong)bd->bi_sramstart); - print_num ("sram size", (ulong)bd->bi_sramsize); -#endif - -#if defined(CONFIG_CMD_NET) - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); -#endif - - printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} -#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - print_num ("mem start ", (ulong)bd->bi_memstart); - print_lnum ("mem size ", (u64)bd->bi_memsize); - print_num ("flash start ", (ulong)bd->bi_flashstart); - print_num ("flash size ", (ulong)bd->bi_flashsize); - print_num ("flash offset ", (ulong)bd->bi_flashoffset); -#if defined(CONFIG_SYS_SRAM_BASE) - print_num ("sram start ", (ulong)bd->bi_sramstart); - print_num ("sram size ", (ulong)bd->bi_sramsize); -#endif -#if defined(CONFIG_CMD_NET) - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); -#endif - printf ("\nbaudrate = %ld bps\n", (ulong)bd->bi_baudrate); - return 0; -} - -#elif defined(CONFIG_SPARC) /* SPARC */ -int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; -#if defined(CONFIG_CMD_NET) - int i; -#endif - -#ifdef DEBUG - print_num("bd address ", (ulong) bd); -#endif - print_num("memstart ", bd->bi_memstart); - print_lnum("memsize ", bd->bi_memsize); - print_num("flashstart ", bd->bi_flashstart); - print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); - print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); - printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, - CONFIG_SYS_MONITOR_LEN); - printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE, - CONFIG_SYS_MALLOC_LEN); - printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, - CONFIG_SYS_STACK_SIZE); - printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET, - CONFIG_SYS_PROM_SIZE); - printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, - CONFIG_SYS_GBL_DATA_SIZE); - -#if defined(CONFIG_CMD_NET) - puts("ethaddr ="); - for (i = 0; i < 6; ++i) { - printf("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts("\nIP addr = "); - print_IPaddr(bd->bi_ip_addr); -#endif - printf("\nbaudrate = %6ld bps\n", bd->bi_baudrate); - return 0; -} - -#elif defined(CONFIG_M68K) /* M68K */ -static void print_str(const char *, const char *); - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - char buf[32]; - - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); -#if defined(CONFIG_SYS_INIT_RAM_ADDR) - print_num ("sramstart", (ulong)bd->bi_sramstart); - print_num ("sramsize", (ulong)bd->bi_sramsize); -#endif -#if defined(CONFIG_SYS_MBAR) - print_num ("mbar", bd->bi_mbar_base); -#endif - print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); -#ifdef CONFIG_PCI - print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); -#endif -#ifdef CONFIG_EXTRA_CLOCK - print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); - print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); - print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); -#endif -#if defined(CONFIG_CMD_NET) - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - -#if defined(CONFIG_HAS_ETH1) - puts ("\neth1addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH2) - puts ("\neth2addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]); - } -#endif - -#if defined(CONFIG_HAS_ETH3) - puts ("\neth3addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]); - } -#endif - - puts ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); -#endif - printf ("\nbaudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#elif defined(CONFIG_BLACKFIN) - -int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - - printf("U-Boot = %s\n", bd->bi_r_version); - printf("CPU = %s\n", bd->bi_cpu); - printf("Board = %s\n", bd->bi_board_name); - printf("VCO = %lu MHz\n", bd->bi_vco / 1000000); - printf("CCLK = %lu MHz\n", bd->bi_cclk / 1000000); - printf("SCLK = %lu MHz\n", bd->bi_sclk / 1000000); - - print_num("boot_params", (ulong)bd->bi_boot_params); - print_num("memstart", (ulong)bd->bi_memstart); - print_lnum("memsize", (u64)bd->bi_memsize); - print_num("flashstart", (ulong)bd->bi_flashstart); - print_num("flashsize", (ulong)bd->bi_flashsize); - print_num("flashoffset", (ulong)bd->bi_flashoffset); - - puts("ethaddr ="); - for (i = 0; i < 6; ++i) - printf("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - puts("\nip_addr = "); - print_IPaddr(bd->bi_ip_addr); - printf("\nbaudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#else /* ! PPC, which leaves MIPS */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - - print_num ("boot_params", (ulong)bd->bi_boot_params); - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); - printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} -#endif /* MIPS */ - -#else /* ARM */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int i; - bd_t *bd = gd->bd; - - print_num ("arch_number", bd->bi_arch_number); - print_num ("env_t", (ulong)bd->bi_env); - print_num ("boot_params", (ulong)bd->bi_boot_params); - - for (i=0; i<CONFIG_NR_DRAM_BANKS; ++i) { - print_num("DRAM bank", i); - print_num("-> start", bd->bi_dram[i].start); - print_num("-> size", bd->bi_dram[i].size); - } - -#if defined(CONFIG_CMD_NET) - puts ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - puts ( "\n" - "ip_addr = "); - print_IPaddr (bd->bi_ip_addr); -#endif - printf ("\n" - "baudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ - -static void print_num(const char *name, ulong value) -{ - printf ("%-12s= 0x%08lX\n", name, value); -} - -#ifndef CONFIG_ARM -static void print_lnum(const char *name, u64 value) -{ - printf ("%-12s= 0x%.8llX\n", name, value); -} -#endif - -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) -static void print_str(const char *name, const char *str) -{ - printf ("%-12s= %6s MHz\n", name, str); -} -#endif /* CONFIG_PPC */ - - -/* -------------------------------------------------------------------- */ - -U_BOOT_CMD( - bdinfo, 1, 1, do_bdinfo, - "bdinfo - print Board Info structure\n", - NULL -); diff --git a/include/common.h b/include/common.h index df64bf0..655ecbb 100644 --- a/include/common.h +++ b/include/common.h @@ -713,4 +713,19 @@ int cpu_release(int nr, int argc, char *argv[]); #define CONFIG_HAS_POST #endif +static inline void print_num(const char *name, ulong value) +{ + printf ("%-12s= 0x%08lX\n", name, value); +} + +static inline void print_lnum(const char *name, u64 value) +{ + printf ("%-12s= 0x%.8llX\n", name, value); +} + +static inline void print_str(const char *name, const char *str) +{ + printf ("%-12s= %6s MHz\n", name, str); +} + #endif /* __COMMON_H_ */ diff --git a/lib_arm/Makefile b/lib_arm/Makefile index c8795b2..1f36f58 100644 --- a/lib_arm/Makefile +++ b/lib_arm/Makefile @@ -32,6 +32,7 @@ SOBJS-y += _modsi3.o SOBJS-y += _udivsi3.o SOBJS-y += _umodsi3.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_arm/bdinfo.c b/lib_arm/bdinfo.c new file mode 100644 index 0000000..b6ae6bd --- /dev/null +++ b/lib_arm/bdinfo.c @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("arch_number", bd->bi_arch_number); + print_num ("env_t", (ulong)bd->bi_env); + print_num ("boot_params", (ulong)bd->bi_boot_params); + + for (i=0; i<CONFIG_NR_DRAM_BANKS; ++i) { + print_num("DRAM bank", i); + print_num("-> start", bd->bi_dram[i].start); + print_num("-> size", bd->bi_dram[i].size); + } + +#if defined(CONFIG_CMD_NET) + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ( "\n" + "ip_addr = "); + print_IPaddr (bd->bi_ip_addr); +#endif + printf ("\n" + "baudrate = %d bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_avr32/Makefile b/lib_avr32/Makefile index 37b8051..856d450 100644 --- a/lib_avr32/Makefile +++ b/lib_avr32/Makefile @@ -29,6 +29,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += memset.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += interrupts.o diff --git a/lib_avr32/bdinfo.c b/lib_avr32/bdinfo.c new file mode 100644 index 0000000..d67a2b6 --- /dev/null +++ b/lib_avr32/bdinfo.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile index 3f69770..4afc651 100644 --- a/lib_blackfin/Makefile +++ b/lib_blackfin/Makefile @@ -36,6 +36,7 @@ SOBJS-y += memcpy.o SOBJS-y += memmove.o SOBJS-y += memset.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_blackfin/bdinfo.c b/lib_blackfin/bdinfo.c new file mode 100644 index 0000000..3012705 --- /dev/null +++ b/lib_blackfin/bdinfo.c @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + printf("U-Boot = %s\n", bd->bi_r_version); + printf("CPU = %s\n", bd->bi_cpu); + printf("Board = %s\n", bd->bi_board_name); + printf("VCO = %lu MHz\n", bd->bi_vco / 1000000); + printf("CCLK = %lu MHz\n", bd->bi_cclk / 1000000); + printf("SCLK = %lu MHz\n", bd->bi_sclk / 1000000); + + print_num("boot_params", (ulong)bd->bi_boot_params); + print_num("memstart", (ulong)bd->bi_memstart); + print_lnum("memsize", (u64)bd->bi_memsize); + print_num("flashstart", (ulong)bd->bi_flashstart); + print_num("flashsize", (ulong)bd->bi_flashsize); + print_num("flashoffset", (ulong)bd->bi_flashoffset); + + puts("ethaddr ="); + for (i = 0; i < 6; ++i) + printf("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + puts("\nip_addr = "); + print_IPaddr(bd->bi_ip_addr); + printf("\nbaudrate = %d bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_i386/Makefile b/lib_i386/Makefile index 4fbcd08..0a7a777 100644 --- a/lib_i386/Makefile +++ b/lib_i386/Makefile @@ -29,6 +29,7 @@ SOBJS-y += bios.o SOBJS-y += bios_pci.o SOBJS-y += realmode_switch.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += bios_setup.o COBJS-y += board.o COBJS-y += bootm.o diff --git a/lib_i386/bdinfo.c b/lib_i386/bdinfo.c new file mode 100644 index 0000000..d67a2b6 --- /dev/null +++ b/lib_i386/bdinfo.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_m68k/Makefile b/lib_m68k/Makefile index 6db35ed..f11b601 100644 --- a/lib_m68k/Makefile +++ b/lib_m68k/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_m68k/bdinfo.c b/lib_m68k/bdinfo.c new file mode 100644 index 0000000..ba49f10 --- /dev/null +++ b/lib_m68k/bdinfo.c @@ -0,0 +1,101 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + char buf[32]; + + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); +#if defined(CONFIG_SYS_INIT_RAM_ADDR) + print_num ("sramstart", (ulong)bd->bi_sramstart); + print_num ("sramsize", (ulong)bd->bi_sramsize); +#endif +#if defined(CONFIG_SYS_MBAR) + print_num ("mbar", bd->bi_mbar_base); +#endif + print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); +#ifdef CONFIG_PCI + print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); +#endif +#ifdef CONFIG_EXTRA_CLOCK + print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); + print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); + print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); +#endif +#if defined(CONFIG_CMD_NET) + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + +#if defined(CONFIG_HAS_ETH1) + puts ("\neth1addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH2) + puts ("\neth2addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH3) + puts ("\neth3addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]); + } +#endif + + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); +#endif + printf ("\nbaudrate = %d bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_microblaze/Makefile b/lib_microblaze/Makefile index 9b0f296..b9c5088 100644 --- a/lib_microblaze/Makefile +++ b/lib_microblaze/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_microblaze/bdinfo.c b/lib_microblaze/bdinfo.c new file mode 100644 index 0000000..e67f3b1 --- /dev/null +++ b/lib_microblaze/bdinfo.c @@ -0,0 +1,65 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + print_num ("mem start ", (ulong)bd->bi_memstart); + print_lnum ("mem size ", (u64)bd->bi_memsize); + print_num ("flash start ", (ulong)bd->bi_flashstart); + print_num ("flash size ", (ulong)bd->bi_flashsize); + print_num ("flash offset ", (ulong)bd->bi_flashoffset); +#if defined(CONFIG_SYS_SRAM_BASE) + print_num ("sram start ", (ulong)bd->bi_sramstart); + print_num ("sram size ", (ulong)bd->bi_sramsize); +#endif +#if defined(CONFIG_CMD_NET) + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); +#endif + printf ("\nbaudrate = %ld bps\n", (ulong)bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_mips/Makefile b/lib_mips/Makefile index 7967e58..5dc75c0 100644 --- a/lib_mips/Makefile +++ b/lib_mips/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o ifeq ($(CONFIG_QEMU_MIPS),y) COBJS-y += bootm_qemu_mips.o diff --git a/lib_mips/bdinfo.c b/lib_mips/bdinfo.c new file mode 100644 index 0000000..d67a2b6 --- /dev/null +++ b/lib_mips/bdinfo.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_nios/Makefile b/lib_nios/Makefile index f66e989..b665eb7 100644 --- a/lib_nios/Makefile +++ b/lib_nios/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_nios/bdinfo.c b/lib_nios/bdinfo.c new file mode 100644 index 0000000..67a1fa1 --- /dev/null +++ b/lib_nios/bdinfo.c @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_nios2/Makefile b/lib_nios2/Makefile index b69bc38..fd9a60e 100644 --- a/lib_nios2/Makefile +++ b/lib_nios2/Makefile @@ -27,6 +27,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += cache.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += divmod.o diff --git a/lib_nios2/bdinfo.c b/lib_nios2/bdinfo.c new file mode 100644 index 0000000..a5ac9d9 --- /dev/null +++ b/lib_nios2/bdinfo.c @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ +#if defined(CONFIG_CMD_NET) + int i; +#endif + bd_t *bd = gd->bd; + + print_num ("mem start", (ulong)bd->bi_memstart); + print_lnum ("mem size", (u64)bd->bi_memsize); + print_num ("flash start", (ulong)bd->bi_flashstart); + print_num ("flash size", (ulong)bd->bi_flashsize); + print_num ("flash offset", (ulong)bd->bi_flashoffset); + +#if defined(CONFIG_SYS_SRAM_BASE) + print_num ("sram start", (ulong)bd->bi_sramstart); + print_num ("sram size", (ulong)bd->bi_sramsize); +#endif + +#if defined(CONFIG_CMD_NET) + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); +#endif + + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_ppc/Makefile b/lib_ppc/Makefile index 60ea0c9..b53bf29 100644 --- a/lib_ppc/Makefile +++ b/lib_ppc/Makefile @@ -30,6 +30,7 @@ SOBJS-y += ppcstring.o SOBJS-y += ticks.o COBJS-y += bat_rw.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o diff --git a/lib_ppc/bdinfo.c b/lib_ppc/bdinfo.c new file mode 100644 index 0000000..4849d7c --- /dev/null +++ b/lib_ppc/bdinfo.c @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + char buf[32]; + +#ifdef DEBUG + print_num ("bd address", (ulong)bd ); +#endif + print_num ("memstart", bd->bi_memstart ); + print_lnum ("memsize", bd->bi_memsize ); + print_num ("flashstart", bd->bi_flashstart ); + print_num ("flashsize", bd->bi_flashsize ); + print_num ("flashoffset", bd->bi_flashoffset ); + print_num ("sramstart", bd->bi_sramstart ); + print_num ("sramsize", bd->bi_sramsize ); +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ + defined(CONFIG_8260) || defined(CONFIG_E500) + print_num ("immr_base", bd->bi_immr_base ); +#endif + print_num ("bootflags", bd->bi_bootflags ); +#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \ + defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ + defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) + print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); + print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); +#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \ + defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); +#endif +#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#if defined(CONFIG_CPM2) + print_str ("vco", strmhz(buf, bd->bi_vco)); + print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); + print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); +#endif + print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); +#if defined(CONFIG_CPM2) + print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); +#endif + print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); +#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#if defined(CONFIG_MPC8220) + print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); + print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); + print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); + print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); + print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq)); +#endif + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + +#if defined(CONFIG_HAS_ETH1) + puts ("\neth1addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH2) + puts ("\neth2addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH3) + puts ("\neth3addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH4) + puts ("\neth4addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet4addr[i]); + } +#endif + +#if defined(CONFIG_HAS_ETH5) + puts ("\neth5addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet5addr[i]); + } +#endif + +#ifdef CONFIG_HERMES + print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); +#endif + puts ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate ); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_sh/Makefile b/lib_sh/Makefile index 4034381..a405c8d 100644 --- a/lib_sh/Makefile +++ b/lib_sh/Makefile @@ -24,6 +24,7 @@ LIB = $(obj)lib$(ARCH).a SOBJS-y += +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o COBJS-y += board.o COBJS-y += bootm.o # COBJS-y += time.o diff --git a/lib_sh/bdinfo.c b/lib_sh/bdinfo.c new file mode 100644 index 0000000..d67a2b6 --- /dev/null +++ b/lib_sh/bdinfo.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_lnum ("memsize", (u64)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); diff --git a/lib_sparc/Makefile b/lib_sparc/Makefile index 040ca10..67a68da 100644 --- a/lib_sparc/Makefile +++ b/lib_sparc/Makefile @@ -25,12 +25,17 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).a -SOBJS = +SOBJS-y = -COBJS = board.o cache.o interrupts.o time.o bootm.o +COBJS-$(CONFIG_CMD_BDI) += bdinfo.o +COBJS-y = board.o +COBJS-y = bootm.o +COBJS-y = cache.o +COBJS-y = interrupts.o +COBJS-y = time.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) $(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) diff --git a/lib_sparc/bdinfo.c b/lib_sparc/bdinfo.c new file mode 100644 index 0000000..48f0ce6 --- /dev/null +++ b/lib_sparc/bdinfo.c @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include <common.h> +#include <command.h> +#include <net.h> /* for print_IPaddr */ + +DECLARE_GLOBAL_DATA_PTR; + +int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + bd_t *bd = gd->bd; +#if defined(CONFIG_CMD_NET) + int i; +#endif + +#ifdef DEBUG + print_num("bd address ", (ulong) bd); +#endif + print_num("memstart ", bd->bi_memstart); + print_lnum("memsize ", bd->bi_memsize); + print_num("flashstart ", bd->bi_flashstart); + print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); + print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); + printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, + CONFIG_SYS_MONITOR_LEN); + printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE, + CONFIG_SYS_MALLOC_LEN); + printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, + CONFIG_SYS_STACK_SIZE); + printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET, + CONFIG_SYS_PROM_SIZE); + printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, + CONFIG_SYS_GBL_DATA_SIZE); + +#if defined(CONFIG_CMD_NET) + puts("ethaddr ="); + for (i = 0; i < 6; ++i) { + printf("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts("\nIP addr = "); + print_IPaddr(bd->bi_ip_addr); +#endif + printf("\nbaudrate = %6ld bps\n", bd->bi_baudrate); + + return 0; +} + +/* -------------------------------------------------------------------- */ + +U_BOOT_CMD( + bdinfo, 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); -- 1.5.6.5

5 16

[U-Boot] [PATCH] sh: sh7763rdp: Update sh7763rdp config
by Nobuhiro Iwamatsu 04 Dec '08

04 Dec '08

Add CONFIG_NET_MULTI in config file, because sh_eth changed new newwork API. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- include/configs/sh7763rdp.h | 1 + 2 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 8a76dad..4ea79cf 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -118,6 +118,7 @@ #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) /* Ether */ +#define CONFIG_NET_MULTI 1 #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) -- 1.5.6.5

2 2

[U-Boot] [PATCH] PXA3xx: fix CKEN[AB]
by Daniel Mack 03 Dec '08

03 Dec '08

Hi, there are some bits in PXA3xx' CKENA/CKENB registers which need to be set always, according to the documentation. They are actually different for the three families, but as there is no way to keep track of them yet in U-Boot, I'd rather apply this patch and enable some clocks on some processors which are not neccessarily needed. Best regards, Daniel diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 63ab0c5..9d74d6c 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -235,10 +235,10 @@ cpu_init_crit: /* turn off all clocks but the ones we will definitly require */ ldr r1, =CKENA - ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | CKENA_8_DMC) + ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | CKENA_8_DMC | CKENA_SETALWAYS) str r2, [r1] ldr r1, =CKENB - ldr r2, =(CKENB_6_IRQ) + ldr r2, =(CKENB_6_IRQ | CKENB_SETALWAYS) str r2, [r1] #endif /* !CONFIG_CPU_MONAHANS */ diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e014568..25d640b 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1757,6 +1757,7 @@ typedef void (*ExcpHndlr) (void) ; #define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */ #define CKENA_2_USBHOST (1 << 2) /* USB Host Unit Clock Enable */ #define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */ +#define CKENA_SETALWAYS (0x800000a1) /* bits marked 'SETALWAYS' */ #define CKENB_8_1WIRE ((1 << 8) + 32) /* One Wire Interface Unit Clock Enable */ #define CKENB_7_GPIO ((1 << 7) + 32) /* GPIO Clock Enable */ @@ -1764,6 +1765,7 @@ typedef void (*ExcpHndlr) (void) ; #define CKENB_4_I2C ((1 << 4) + 32) /* I2C Unit Clock Enable */ #define CKENB_1_PWM1 ((1 << 1) + 32) /* PWM2 & PWM3 Clock Enable */ #define CKENB_0_PWM0 ((1 << 0) + 32) /* PWM0 & PWM1 Clock Enable */ +#define CKENB_SETALWAYS (0xfffcfc4c) /* bits marked 'SETALWAYS' */ #else /* if defined CONFIG_CPU_MONAHANS */

1 1

[U-Boot] u-boot for ixp425
by Ing.G.Morandi (Portatile) 02 Dec '08

02 Dec '08

Hi to all, I'd like to use u-boot lo load small applications program on a board based on IXP425. My customer has used redboot to load linux over this board and now He asked to me to write some applications to test the hardware. I tought to use u-boot because I have no knowledge on redboot and because I have already used u-boot over ixp425 few years ago. Moreover I knew that quite recently, some improvements have been made on u-boot to avoid the use of Intel APIs. Now I don't know if this activity has been completely carried out and allows the use of both eth interfaces which are provided by the uP. Can anybody suggest me where can I find some further info on the status of u-boot on ixp425? Many thanks in advance Gianfranco

6 6

[U-Boot] PHY lib
by Michal Simek 02 Dec '08

02 Dec '08

Hi Ben, how does look like your propose work about PHY lib? Thanks, Michal -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854

5 5

[U-Boot] [PATCH] dataflash: fix a problem with the last partition
by Ilko Iliev 02 Dec '08

02 Dec '08

This patch fix the problem that only the [NB_DATAFLASH_AREA -1] dataflash partition can be defined to use the area to the end of dataflash size. Now it is possible to have only one dataflash partition from 0 to the end of of dataflash size. Signed-off-by: Ilko Iliev <iliev(a)ronetix.at> --- drivers/mtd/dataflash.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 201e518..43746e7 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -131,7 +131,7 @@ int AT91F_DataflashInit (void) break; } /* set the last area end to the dataflash size*/ - area_list[NB_DATAFLASH_AREA -1].end = + dataflash_info[i].end_address = (dataflash_info[i].Device.pages_number * dataflash_info[i].Device.pages_size)-1; @@ -146,7 +146,7 @@ int AT91F_DataflashInit (void) if(area_list[part].end == 0xffffffff) { dataflash_info[i].Device.area_list[j].end = dataflash_info[i].end_address + - dataflash_info [i].logical_address; + dataflash_info[i].logical_address; last_part = 1; } else { dataflash_info[i].Device.area_list[j].end = -- 1.5.2.2

5 14

[U-Boot] [PATCH] OneNAND: Add missing mtd info struct before calling onenand_erase()
by Stefan Roese 02 Dec '08

02 Dec '08

Without this patch "saveenv" crashes when MTD partitions are enabled (e.g. for use in UBI) via CONFIG_MTD_PARTITIONS. Signed-off-by: Stefan Roese <sr(a)denx.de> --- common/env_onenand.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/common/env_onenand.c b/common/env_onenand.c index 3c65b3e..dbccc79 100644 --- a/common/env_onenand.c +++ b/common/env_onenand.c @@ -97,6 +97,7 @@ int saveenv(void) instr.len = CONFIG_ENV_SIZE; instr.addr = env_addr; + instr.mtd = &onenand_mtd; if (onenand_erase(&onenand_mtd, &instr)) { printf("OneNAND: erase failed at 0x%08lx\n", env_addr); return 1; -- 1.6.0.4

2 1

[U-Boot] [PATCH] Added support for the Guntermann & Drunck PowerPC 440 EP/GR ETX module.
by Dirk Eibach 02 Dec '08

02 Dec '08

Signed-off-by: Dirk Eibach <eibach(a)gdsys.de> --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/gdsys/gdppc440etx/Makefile | 51 ++++ board/gdsys/gdppc440etx/config.mk | 44 +++ board/gdsys/gdppc440etx/gdppc440etx.c | 494 +++++++++++++++++++++++++++++++++ board/gdsys/gdppc440etx/init.S | 112 ++++++++ board/gdsys/gdppc440etx/u-boot.lds | 144 ++++++++++ common/Makefile | 2 +- include/configs/gdppc440etx.h | 194 +++++++++++++ 10 files changed, 1045 insertions(+), 1 deletions(-) create mode 100644 board/gdsys/gdppc440etx/Makefile create mode 100644 board/gdsys/gdppc440etx/config.mk create mode 100644 board/gdsys/gdppc440etx/gdppc440etx.c create mode 100644 board/gdsys/gdppc440etx/init.S create mode 100644 board/gdsys/gdppc440etx/u-boot.lds create mode 100644 include/configs/gdppc440etx.h diff --git a/MAINTAINERS b/MAINTAINERS index 127604b..64c1424 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -133,6 +133,7 @@ Jon Diekema <jon.diekema(a)smiths-aerospace.com> Dirk Eibach <eibach(a)gdsys.de> neo PPC405EP + gdppc440etx PPC440EP/GR Dave Ellis <DGE(a)sixnetio.com> diff --git a/MAKEALL b/MAKEALL index dbed268..3789bb9 100755 --- a/MAKEALL +++ b/MAKEALL @@ -188,6 +188,7 @@ LIST_4xx=" \ EXBITGEN \ fx12mm \ G2000 \ + gdppc440etx \ glacier \ haleakala \ haleakala_nand \ diff --git a/Makefile b/Makefile index fd521b6..1f7372c 100644 --- a/Makefile +++ b/Makefile @@ -1314,6 +1314,9 @@ fx12mm_config: unconfig G2000_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000 +gdppc440etx_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx gdppc440etx gdsys + hcu4_config: unconfig @mkdir -p $(obj)board/netstal/common @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal diff --git a/board/gdsys/gdppc440etx/Makefile b/board/gdsys/gdppc440etx/Makefile new file mode 100644 index 0000000..b93f2c3 --- /dev/null +++ b/board/gdsys/gdppc440etx/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2002-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o +SOBJS = init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gdsys/gdppc440etx/config.mk b/board/gdsys/gdppc440etx/config.mk new file mode 100644 index 0000000..df5466e --- /dev/null +++ b/board/gdsys/gdppc440etx/config.mk @@ -0,0 +1,44 @@ +# +# (C) Copyright 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# esd ADCIOP boards +# + +#TEXT_BASE = 0x00001000 + +ifeq ($(ramsym),1) +TEXT_BASE = 0xFBD00000 +else +TEXT_BASE = 0xFFF80000 +endif + +PLATFORM_CPPFLAGS += -DCONFIG_440=1 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif + +ifeq ($(dbcr),1) +PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 +endif diff --git a/board/gdsys/gdppc440etx/gdppc440etx.c b/board/gdsys/gdppc440etx/gdppc440etx.c new file mode 100644 index 0000000..8903b61 --- /dev/null +++ b/board/gdsys/gdppc440etx/gdppc440etx.c @@ -0,0 +1,494 @@ +/* + * (C) Copyright 2008 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach(a)gdsys.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <spd_sdram.h> +#include <libfdt.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +int board_early_init_f(void) +{ + register uint reg; + + /*-------------------------------------------------------------------- + * Setup the external bus controller/chip selects + *-------------------------------------------------------------------*/ + mtdcr(ebccfga, xbcfg); + reg = mfdcr(ebccfgd); + mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */ + + /*-------------------------------------------------------------------- + * Setup the GPIO pins + *-------------------------------------------------------------------*/ + /*CPLD cs */ + /*setup Address lines for flash size 64Meg. */ + out32(GPIO0_OSRL, in32(GPIO0_OSRL) | 0x50010000); + out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x50010000); + out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x50000000); + + /*setup emac */ + out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xC080); + out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x40); + out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x55); + out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0x50004000); + out32(GPIO0_ISR1H, in32(GPIO0_ISR1H) | 0x00440000); + + /*UART1 */ + out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x02000000); + out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000); + out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000); + + /* external interrupts IRQ0...3 */ + out32(GPIO1_TCR, in32(GPIO1_TCR) & ~0x00f00000); + out32(GPIO1_TSRL, in32(GPIO1_TSRL) & ~0x0000ff00); + out32(GPIO1_ISR1L, in32(GPIO1_ISR1L) | 0x00005500); + + /*-------------------------------------------------------------------- + * Setup the interrupt controller polarities, triggers, etc. + *-------------------------------------------------------------------*/ + mtdcr(uic0sr, 0xffffffff); /* clear all */ + mtdcr(uic0er, 0x00000000); /* disable all */ + mtdcr(uic0cr, 0x00000009); /* ATI & UIC1 crit are critical */ + mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */ + mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */ + mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */ + mtdcr(uic0sr, 0xffffffff); /* clear all */ + + mtdcr(uic1sr, 0xffffffff); /* clear all */ + mtdcr(uic1er, 0x00000000); /* disable all */ + mtdcr(uic1cr, 0x00000000); /* all non-critical */ + mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */ + mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */ + mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */ + mtdcr(uic1sr, 0xffffffff); /* clear all */ + + /*-------------------------------------------------------------------- + * Setup other serial configuration + *-------------------------------------------------------------------*/ + mfsdr(sdr_pci0, reg); + mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */ + mtsdr(sdr_pfc0, 0x00003e00); /* Pin function */ + mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins */ + + /*clear tmrclk divisor */ + *(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x04) = 0x00; + + /*enable ethernet */ + *(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x08) = 0xf0; + + /*get rid of flash write protect */ + *(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x07) = 0x00; + + return 0; +} + +int misc_init_r (void) +{ + uint pbcr; + int size_val = 0; + + /* Re-do sizing to get full correct info */ + mtdcr(ebccfga, pb0cr); + pbcr = mfdcr(ebccfgd); + switch (gd->bd->bi_flashsize) { + case 1 << 20: + size_val = 0; + break; + case 2 << 20: + size_val = 1; + break; + case 4 << 20: + size_val = 2; + break; + case 8 << 20: + size_val = 3; + break; + case 16 << 20: + size_val = 4; + break; + case 32 << 20: + size_val = 5; + break; + case 64 << 20: + size_val = 6; + break; + case 128 << 20: + size_val = 7; + break; + } + pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17); + mtdcr(ebccfga, pb0cr); + mtdcr(ebccfgd, pbcr); + + /* adjust flash start and offset */ + gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; + gd->bd->bi_flashoffset = 0; + + /* Monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, + -CONFIG_SYS_MONITOR_LEN, + 0xffffffff, + &flash_info[0]); + + return 0; +} + +int checkboard(void) +{ + char *s = getenv("serial#"); + u8 rev; + u8 val; + + printf("Board: GDPPC440ETX - Guntermann & Drunck PPC440EP/GR ETX-module"); + + rev = in_8((void *)(CONFIG_SYS_BCSR_BASE + 0)); + val = in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & CONFIG_SYS_BCSR5_PCI66EN; + printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); + + if (s != NULL) { + puts(", serial# "); + puts(s); + } + putc('\n'); + + return (0); +} + +/************************************************************************* + * initdram -- doesn't use serial presence detect. + * + * Assumes: 256 MB, ECC, non-registered + * PLB @ 133 MHz + * + ************************************************************************/ +#define NUM_TRIES 64 +#define NUM_READS 10 + +void sdram_tr1_set(int ram_address, int* tr1_value) +{ + int i; + int j, k; + volatile unsigned int* ram_pointer = (unsigned int*)ram_address; + int first_good = -1, last_bad = 0x1ff; + + unsigned long test[NUM_TRIES] = { + 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, + 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, + 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, + 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555, + 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555, + 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA, + 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA, + 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A, + 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A, + 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5, + 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5, + 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA, + 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA, + 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55, + 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 }; + + /* go through all possible SDRAM0_TR1[RDCT] values */ + for (i=0; i<=0x1ff; i++) { + /* set the current value for TR1 */ + mtsdram(mem_tr1, (0x80800800 | i)); + + /* write values */ + for (j=0; j<NUM_TRIES; j++) { + ram_pointer[j] = test[j]; + + /* clear any cache at ram location */ + __asm__("dcbf 0,%0": :"r" (&ram_pointer[j])); + } + + /* read values back */ + for (j=0; j<NUM_TRIES; j++) { + for (k=0; k<NUM_READS; k++) { + /* clear any cache at ram location */ + __asm__("dcbf 0,%0": :"r" (&ram_pointer[j])); + + if (ram_pointer[j] != test[j]) + break; + } + + /* read error */ + if (k != NUM_READS) { + break; + } + } + + /* we have a SDRAM0_TR1[RDCT] that is part of the window */ + if (j == NUM_TRIES) { + if (first_good == -1) + first_good = i; /* found beginning of window */ + } else { /* bad read */ + /* if we have not had a good read then don't care */ + if(first_good != -1) { + /* first failure after a good read */ + last_bad = i-1; + break; + } + } + } + + /* return the current value for TR1 */ + *tr1_value = (first_good + last_bad) / 2; +} + +phys_size_t initdram(int board) +{ + register uint reg; + int tr1_bank1, tr1_bank2; + + /*-------------------------------------------------------------------- + * Setup some default + *------------------------------------------------------------------*/ + mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */ + mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */ + mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */ + mtsdram(mem_clktr, 0x40000000); /* ?? */ + mtsdram(mem_wddctr, 0x40000000); /* ?? */ + + /*clear this first, if the DDR is enabled by a debugger + then you can not make changes. */ + mtsdram(mem_cfg0, 0x00000000); /* Disable EEC */ + + /*-------------------------------------------------------------------- + * Setup for board-specific specific mem + *------------------------------------------------------------------*/ + /* + * Following for CAS Latency = 2.5 @ 133 MHz PLB + */ + mtsdram(mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */ + mtsdram(mem_b1cr, 0x080a4001); /* SDBA=0x080 128MB, Mode 3, enabled */ + + mtsdram(mem_tr0, 0x410a4012); /* ?? */ + mtsdram(mem_rtr, 0x04080000); /* ?? */ + mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */ + mtsdram(mem_cfg0, 0x30000000); /* Disable EEC */ + udelay(400); /* Delay 200 usecs (min) */ + + /*-------------------------------------------------------------------- + * Enable the controller, then wait for DCEN to complete + *------------------------------------------------------------------*/ + mtsdram(mem_cfg0, 0x80000000); /* Enable */ + + for (;;) { + mfsdram(mem_mcsts, reg); + if (reg & 0x80000000) + break; + } + + sdram_tr1_set(0x00000000, &tr1_bank1); + sdram_tr1_set(0x08000000, &tr1_bank2); + mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800)); + + return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */ +} + +/************************************************************************* + * pci_pre_init + * + * This routine is called just prior to registering the hose and gives + * the board the opportunity to check things. Returning a value of zero + * indicates that things are bad & PCI initialization should be aborted. + * + * Different boards may wish to customize the pci controller structure + * (add regions, override default access routines, etc) or perform + * certain pre-initialization actions. + * + ************************************************************************/ +#if defined(CONFIG_PCI) +int pci_pre_init(struct pci_controller *hose) +{ + unsigned long addr; + + /*-------------------------------------------------------------------------+ + | Set priority for all PLB3 devices to 0. + | Set PLB3 arbiter to fair mode. + +-------------------------------------------------------------------------*/ + mfsdr(sdr_amp1, addr); + mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00); + addr = mfdcr(plb3_acr); + mtdcr(plb3_acr, addr | 0x80000000); + + /*-------------------------------------------------------------------------+ + | Set priority for all PLB4 devices to 0. + +-------------------------------------------------------------------------*/ + mfsdr(sdr_amp0, addr); + mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00); + addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */ + mtdcr(plb4_acr, addr); + + /*-------------------------------------------------------------------------+ + | Set Nebula PLB4 arbiter to fair mode. + +-------------------------------------------------------------------------*/ + /* Segment0 */ + addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair; + addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled; + addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; + addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; + mtdcr(plb0_acr, addr); + + /* Segment1 */ + addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair; + addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled; + addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; + addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep; + mtdcr(plb1_acr, addr); + + return 1; +} +#endif /* defined(CONFIG_PCI) */ + +/************************************************************************* + * pci_target_init + * + * The bootstrap configuration provides default settings for the pci + * inbound map (PIM). But the bootstrap config choices are limited and + * may not be sufficient for a given board. + * + ************************************************************************/ +#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) +void pci_target_init(struct pci_controller *hose) +{ + /*--------------------------------------------------------------------------+ + * Set up Direct MMIO registers + *--------------------------------------------------------------------------*/ + /*--------------------------------------------------------------------------+ + | PowerPC440 EP PCI Master configuration. + | Map one 1Gig range of PLB/processor addresses to PCI memory space. + | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF + | Use byte reversed out routines to handle endianess. + | Make this region non-prefetchable. + +--------------------------------------------------------------------------*/ + out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */ + out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */ + out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */ + out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */ + out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */ + + out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */ + out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */ + out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */ + out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */ + out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */ + + out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */ + out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */ + out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */ + out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */ + + /*--------------------------------------------------------------------------+ + * Set up Configuration registers + *--------------------------------------------------------------------------*/ + + /* Program the board's subsystem id/vendor id */ + pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID, + CONFIG_SYS_PCI_SUBSYS_VENDORID); + pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID); + + /* Configure command register as bus master */ + pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER); + + /* 240nS PCI clock */ + pci_write_config_word(0, PCI_LATENCY_TIMER, 1); + + /* No error reporting */ + pci_write_config_word(0, PCI_ERREN, 0); + + pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101); + +} +#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ + +/************************************************************************* + * pci_master_init + * + ************************************************************************/ +#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) +void pci_master_init(struct pci_controller *hose) +{ + unsigned short temp_short; + + /*--------------------------------------------------------------------------+ + | Write the PowerPC440 EP PCI Configuration regs. + | Enable PowerPC440 EP to be a master on the PCI bus (PMM). + | Enable PowerPC440 EP to act as a PCI memory target (PTM). + +--------------------------------------------------------------------------*/ + pci_read_config_word(0, PCI_COMMAND, &temp_short); + pci_write_config_word(0, PCI_COMMAND, + temp_short | PCI_COMMAND_MASTER | + PCI_COMMAND_MEMORY); +} +#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */ + +/************************************************************************* + * is_pci_host + * + * This routine is called to determine if a pci scan should be + * performed. With various hardware environments (especially cPCI and + * PPMC) it's insufficient to depend on the state of the arbiter enable + * bit in the strap register, or generic host/adapter assumptions. + * + * Rather than hard-code a bad assumption in the general 440 code, the + * 440 pci code requires the board to decide at runtime. + * + * Return 0 for adapter mode, non-zero for host (monarch) mode. + * + * + ************************************************************************/ +#if defined(CONFIG_PCI) +int is_pci_host(struct pci_controller *hose) +{ + /* Bamboo is always configured as host. */ + return (1); +} +#endif /* defined(CONFIG_PCI) */ + +/************************************************************************* + * hw_watchdog_reset + * + * This routine is called to reset (keep alive) the watchdog timer + * + ************************************************************************/ +#if defined(CONFIG_HW_WATCHDOG) +void hw_watchdog_reset(void) +{ + +} +#endif + +void board_reset(void) +{ + /* give reset to BCSR */ + *(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x06) = 0x09; +} diff --git a/board/gdsys/gdppc440etx/init.S b/board/gdsys/gdppc440etx/init.S new file mode 100644 index 0000000..f938236 --- /dev/null +++ b/board/gdsys/gdppc440etx/init.S @@ -0,0 +1,112 @@ +/* +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <ppc_asm.tmpl> +#include <config.h> + +/* General */ +#define TLB_VALID 0x00000200 + +/* Supported page sizes */ + +#define SZ_1K 0x00000000 +#define SZ_4K 0x00000010 +#define SZ_16K 0x00000020 +#define SZ_64K 0x00000030 +#define SZ_256K 0x00000040 +#define SZ_1M 0x00000050 +#define SZ_8M 0x00000060 +#define SZ_16M 0x00000070 +#define SZ_256M 0x00000090 + +/* Storage attributes */ +#define SA_W 0x00000800 /* Write-through */ +#define SA_I 0x00000400 /* Caching inhibited */ +#define SA_M 0x00000200 /* Memory coherence */ +#define SA_G 0x00000100 /* Guarded */ +#define SA_E 0x00000080 /* Endian */ + +/* Access control */ +#define AC_X 0x00000024 /* Execute */ +#define AC_W 0x00000012 /* Write */ +#define AC_R 0x00000009 /* Read */ + +/* Some handy macros */ + +#define EPN(e) ((e) & 0xfffffc00) +#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) +#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) +#define TLB2(a) ( (a)&0x00000fbf ) + +#define tlbtab_start\ + mflr r1 ;\ + bl 0f ; + +#define tlbtab_end\ + .long 0, 0, 0 ; \ +0: mflr r0 ; \ + mtlr r1 ; \ + blr ; + +#define tlbentry(epn,sz,rpn,erpn,attr)\ + .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) + + +/************************************************************************** + * TLB TABLE + * + * This table is used by the cpu boot code to setup the initial tlb + * entries. Rather than make broad assumptions in the cpu source tree, + * this table lets each board set things up however they like. + * + * Pointer to the table is returned in r1 + * + *************************************************************************/ + + .section .bootpg,"ax" + .globl tlbtab + +tlbtab: + tlbtab_start + + /* + * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the + * speed up boot process. It is patched after relocation to enable SA_I + */ + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) + + /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I ) + + /* PCI */ + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I ) + + /* USB 2.0 Device */ + tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I ) + + tlbtab_end diff --git a/board/gdsys/gdppc440etx/u-boot.lds b/board/gdsys/gdppc440etx/u-boot.lds new file mode 100644 index 0000000..1df817b --- /dev/null +++ b/board/gdsys/gdppc440etx/u-boot.lds @@ -0,0 +1,144 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + .bootpg 0xFFFFF000 : + { + cpu/ppc4xx/start.o (.bootpg) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/ppc4xx/start.o (.text) + board/gdsys/gdppc440etx/init.o (.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(4); + } + _end = . ; + PROVIDE (end = .); +} diff --git a/common/Makefile b/common/Makefile index 6484b23..a04c3d9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -70,7 +70,7 @@ COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o COBJS-$(CONFIG_CMD_CACHE) += cmd_cache.o COBJS-$(CONFIG_CMD_CONSOLE) += cmd_console.o COBJS-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o -COBJS-$(CONFIG_CMD_DATE) += cmd_date.o +#COBJS-$(CONFIG_CMD_DATE) += cmd_date.o ifdef CONFIG_4xx COBJS-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o endif diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h new file mode 100644 index 0000000..d41a98a --- /dev/null +++ b/include/configs/gdppc440etx.h @@ -0,0 +1,194 @@ +/* + * (C) Copyright 2008 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach(a)gdsys.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************************************ + * gdppc440etx.h - configuration for G&D 440EP/GR ETX-Module + ***********************************************************************/ +#ifndef __CONFIG_H +#define __CONFIG_H + +/*----------------------------------------------------------------------- + * High Level Configuration Options + *----------------------------------------------------------------------*/ +#define CONFIG_440GR 1 /* Specific PPC440GR support */ +#define CONFIG_HOSTNAME gdppc440etx +#define CONFIG_440 1 /* ... PPC440 family */ +#define CONFIG_4xx 1 /* ... PPC4xx family */ +#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ + +/* + * Include common defines/options for all AMCC eval boards + */ +#include "amcc-common.h" + +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ +#if 0 +#define CONFIG_BOARD_RESET 1 /* call board_reset() */ +#endif + +/*----------------------------------------------------------------------- + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ +#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/ +#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000 +#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000 +#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000 + +/*Don't change either of these*/ +#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/ +#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/ +/*Don't change either of these*/ + +#define CONFIG_SYS_USB_DEVICE 0x50000000 +#define CONFIG_SYS_NVRAM_BASE_ADDR 0x80000000 +#define CONFIG_SYS_BCSR_BASE (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000) +#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 + +/*----------------------------------------------------------------------- + * Initial RAM & stack pointer (placed in SDRAM) + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */ +#define CONFIG_SYS_INIT_RAM_END (4 << 10) +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data*/ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Serial Port + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */ +#define CONFIG_UART1_CONSOLE + +/*----------------------------------------------------------------------- + * Environment + *----------------------------------------------------------------------*/ +/* + * Define here the location of the environment variables (FLASH or EEPROM). + * Note: DENX encourages to use redundant environment in FLASH. + */ +#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ + +/*----------------------------------------------------------------------- + * FLASH related + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#endif /* CONFIG_ENV_IS_IN_FLASH */ + +/*----------------------------------------------------------------------- + * DDR SDRAM + *----------------------------------------------------------------------*/ +#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */ +#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */ +#define CONFIG_SYS_SDRAM_BANKS (2) + +/*----------------------------------------------------------------------- + * I2C + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ + +/* + * Default environment variables + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_AMCC_DEF_ENV \ + CONFIG_AMCC_DEF_ENV_POWERPC \ + CONFIG_AMCC_DEF_ENV_NOR_UPD \ + "kernel_addr=fc000000\0" \ + "ramdisk_addr=fc180000\0" \ + "" + +#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ +#define CONFIG_PHY_ADDR 1 +#define CONFIG_PHY1_ADDR 3 + +#ifdef DEBUG +#define CONFIG_PANIC_HANG +#else +#define CONFIG_HW_WATCHDOG /* watchdog */ +#endif + +/* + * Commands additional to the ones defined in amcc-common.h + */ +#define CONFIG_CMD_PCI +#undef CONFIG_CMD_EEPROM + +/*----------------------------------------------------------------------- + * PCI stuff + *----------------------------------------------------------------------- + */ +/* General PCI */ +#define CONFIG_PCI /* include pci support */ +#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/ + +/* Board-specific PCI */ +#define CONFIG_SYS_PCI_TARGET_INIT +#define CONFIG_SYS_PCI_MASTER_INIT + +#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ +#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */ + +/*----------------------------------------------------------------------- + * External Bus Controller (EBC) Setup + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CPLD 0x80000000 + +/* Memory Bank 0 (NOR-FLASH) initialization */ +#define CONFIG_SYS_EBC_PB0AP 0x03017300 +#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000) + +/* Memory Bank 2 (CPLD) initialization */ +#define CONFIG_SYS_EBC_PB2AP 0x04814500 +#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_CPLD | 0x18000) + +#define CONFIG_SYS_BCSR5_PCI66EN 0x80 + +#endif /* __CONFIG_H */ -- 1.5.6.5

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[U-Boot] iPAQ 21x support (+PXA3xx NAND flash and MMC)
by Oliver Ford 02 Dec '08

02 Dec '08

Hi, I've recently started trying to use U-boot on an iPAQ 214 which runs on a PXA310 cpu. I've got the basic boot up, NAND flash and MMC systems working so far. I originally tried to use the zylonite's nand.c that's already in u-boot but it was very flaky and didn't support several things I needed like large-page command set and the hardware ecc. I've now copied the latest pxa3xx nand flash code from the kernel and just modified it to cope without DMA and without IRQs. I'm not sure it exactly fits in with the u-boot nand code (eg. it does an internal read ID scan to find the right command set) but it works a lot better than the board/zylonite/nand.c. Would this be useful to anyone else? Also, can I, and how do I go about submitting the stuff for the iPAQ 21x. The only change outside it's own config header and board/ dir is the a slight change to get the MMC code working on the pxa3xx (below). Thanks, Oliver diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index d735c8d..3b281d5 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -126,7 +126,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len) MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ; while (len) { if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { -#ifdef CONFIG_PXA27X +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) int i; for (i = min(len, 32); i; i--) { *dst++ = *((volatile uchar *)&MMC_RXFIFO); @@ -558,7 +558,11 @@ mmc_init(int verbose) set_GPIO_mode(GPIO6_MMCCLK_MD); set_GPIO_mode(GPIO8_MMCCS0_MD); #endif +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_12_MMC0; +#else CKEN |= CKEN12_MMC; /* enable MMC unit clock */ +#endif MMC_CLKRT = MMC_CLKRT_0_3125MHZ; MMC_RESTO = MMC_RES_TO_MAX;

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[U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue
by Dave Liu 01 Dec '08

01 Dec '08

we load the secondary stage u-boot image from NAND to system memory by nand_load, we have not flush data cache to memory, not invalidate instruction cache before we jump to RAM. when the system is cache enable and the TLB/page attribute of system memory is cacheable, it will cause issue. - 83xx family is using the dcache lock, so all of dcache access is cache-inhibited. so you can't see the issue. - 85xx family is using dcache, icache enable, partial cache lock. you will see the issue. The patch fix the cache issue. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- nand_spl/nand_boot_fsl_elbc.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-) diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c index 4a961ea..b0ab734 100644 --- a/nand_spl/nand_boot_fsl_elbc.c +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -27,6 +27,7 @@ #include <asm/io.h> #include <asm/immap_83xx.h> #include <asm/fsl_lbc.h> +#include <asm/cache.h> #include <linux/mtd/nand.h> #define WINDOW_SIZE 8192 @@ -125,6 +126,33 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst) } /* + * clean the dcache, invalidate the icache + * for powerpc architecture + */ +static void __flush_cache(ulong start, ulong size) +{ + ulong addr, end; + ulong cache_line = CONFIG_SYS_CACHELINE_SIZE; + + end = start + size; + + /* clean the dcache, make sure all of data to memory */ + for (addr = start; addr < end; addr += cache_line) + asm ("dcbst 0,%0": :"r" (addr)); + + /* wait for all dcbst to complete on bus */ + asm ("sync"); + + /* invalidate icache */ + for (addr = start; addr < end; addr += cache_line) + asm ("icbi 0,%0": :"r" (addr)); + + asm ("sync"); + /* flush prefetch queue in any case */ + asm ("isync"); +} + +/* * The main entry for NAND booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image * from NAND into SDRAM and starts it from there. @@ -143,6 +171,13 @@ void nand_boot(void) * Jump to U-Boot image */ puts("transfering control\n"); + /* + * We need clean dcache and invalidate + * to sync between icache and dcache + * before jump to RAM. make sure all of + * NAND data write to memory. + */ + __flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot(); } -- 1.5.4

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