September 2007 - U-Boot

Re: [U-Boot-Users] Atmel AT49BV320C support in Uboot
by raj reddy 12 Sep '07

12 Sep '07

I tried to use the CFI driver by adding the CFI macros in the .h file. But the size of my flash is 2MB, but it shows 4MB. I have one doubt, in the board .h file we specify the sectore size. what size i must give the sector size in board .h file. where we specify different sizes of sector in the flash driver file.. (i.e 8 * 4K, 63 * 32 K.) Regards. --- Wolfgang Denk <wd(a)denx.de> wrote: > First: Please post U-Boot related questions to > the mailing list > *only* - unless you as ENX for commercial > support which we will > happily provide, but that's not for free. > > In message > <183967.9154.qm(a)web7711.mail.in.yahoo.com> you > wrote: > > CFI supports only the same size sector flash, but > > This is not correct. The CFI driver also supports > boot sector type > flash chips. > > > is't the right procedure what i am trying to add > the > > flash support for AT49BV320C > > If the flashis CFI conforming,then you should use > the CFI driver. > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang > Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 > Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 > Email: wd(a)denx.de > Computers are not intelligent. They only think they > are. > 5, 50, 500, 5000 - Store N number of mails in your inbox. Go to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/tools-08.html

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[U-Boot-Users] [RFC] Configuration rework for next merge window
by Grant Likely 12 Sep '07

12 Sep '07

Wolfgang, When the next u-boot merge window opens, I'd like to merge in the build changes needed to support conditional compile. However, this will be an invasive change on the Makefiles so it requires some planning ahead. The most invasive change is splitting the COBJS definitions into one line per file which is sure to cause merge conflicts with other boards which I'd like to avoid. I see three possible approaches: 1. Merge the COBJS split into -testing now, and ask custodians to base there changes onto that before the merge window opens 2. Merge the COBJS split at the start of the merge window before any other patches are merged 3. Merge the COBJS split at the end of the merge window and let me deal with the conflicts. My preference is definitely #1, followed by #2. I think getting it in first will result in higher confidence that the change has not broken anything as each of the custodian trees will be testing against it before they request a pull. Plus, it's less work for me. :-) My other changes are far less invasive, but more risky. I'd like to get them into -testing also for the test factor, but merge conflicts shouldn't be much of an issue. Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. grant.likely(a)secretlab.ca (403) 399-0195

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[U-Boot-Users] Errors while executing 'make' for u-boot-1.1.6 for incaip board
by Verma 12 Sep '07

12 Sep '07

Hi , Errors are generated ,when I am trying to create the u-boot.bin for u-boot-1.1.6 version using the following commands. -make incaip_config -make / make all The errors generated are as follows:make[1]: Entering directory `/opt/u-boot-1.1.6/post/cpu' make[1]: Nothing to be done for `all'. make[1]: Leaving directory `/opt/u-boot-1.1.6/post/cpu' make -C common/ make[1]: Entering directory `/opt/u-boot-1.1.6/common' mips_4KC-gcc -g -Os -D__KERNEL__ -DTEXT_BASE=0xB0000000 -I/opt/u-boot-1.1.6/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/lib/gcc-lib/mips-linux/2.95.4/include -pipe -DCONFIG_MIPS -D__MIPS__ -mcpu=4kc -EB -mabicalls -Wall -Wstrict-prototypes -c -o cmd_bootm.o cmd_bootm.c cmd_bootm.c:477: warning: preprocessing directive not recognized within macro arg cmd_bootm.c:477: warning: preprocessing directive not recognized within macro arg cmd_bootm.c:469: undefined or invalid # directive cmd_bootm.c:475: undefined or invalid # directive make[1]: *** [cmd_bootm.o] Error 1 make[1]: Leaving directory `/opt/u-boot-1.1.6/common' make: *** [common/libcommon.a] Error 2 How can I avoid these errors, should I make any particular modifications to any of the Makefiles.Please let me know. Verma. -- View this message in context: http://www.nabble.com/Errors-while-executing-%27make%27-for-u-boot-1.1.6-fo… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot-Users] [PATCH7] microblaze - ROMFS adapt files
by Michal Simek 11 Sep '07

11 Sep '07

DESC: ROMFS support files and sorted names in Makefiles Signed-off-by: Michal Simek <monstr(a)monstr.eu> Note; I think that we can start process with redesigning all FS support diff --git a/Makefile b/Makefile index 0477cd3..6d84dbb 100644 --- a/Makefile +++ b/Makefile @@ -201,8 +201,9 @@ ifeq ($(CPU),ixp) LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a -LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ - fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a +LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \ + fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \ + fs/romfs/libromfs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a @@ -325,14 +326,14 @@ depend dep: tags ctags: ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ + fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ net disk rtc dtt drivers drivers/sk98lin common \ $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` etags: etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ + fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ net disk rtc dtt drivers drivers/sk98lin common \ $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 513a226..3e6061a 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -85,7 +85,7 @@ */ /* - * JFFS2/CRAMFS support + * JFFS2/CRAMFS/ROMFS support */ #include <common.h> #include <command.h> @@ -175,6 +175,11 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename extern int cramfs_ls (struct part_info *info, char *filename); extern int cramfs_info (struct part_info *info); +extern int romfs_check (struct part_info *info); +extern int romfs_load (char *loadoffset, struct part_info *info, char *filename); +extern int romfs_ls (struct part_info *info, char *filename); +extern int romfs_info (struct part_info *info); + static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num); /* command line only routines */ @@ -1874,14 +1879,22 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ - /* check partition type for cramfs */ - fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); + /* check partition type for JFFS2, cramfs, romfs */ + if (cramfs_check(part)) { + fsname = "CRAMFS"; + } else if (romfs_check(part)) { + fsname = "ROMFS"; + } else { + fsname = "JFFS2"; + } printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset); if (cramfs_check(part)) { size = cramfs_load ((char *) offset, part, filename); + } else if (romfs_check(part)){ + size = romfs_load ((char *) offset, part, filename); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ size = jffs2_1pass_load((char *)offset, part, filename); } @@ -1928,8 +1941,10 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* check partition type for cramfs */ if (cramfs_check(part)) { ret = cramfs_ls (part, filename); + } else if (romfs_check(part)) { + ret = romfs_ls (part, filename); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ ret = jffs2_1pass_ls(part, filename); } @@ -1951,7 +1966,6 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { struct part_info *part; - char *fsname; int ret; /* make sure we are in sync with env variables */ @@ -1961,13 +1975,17 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ /* check partition type for cramfs */ - fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); - printf("### filesystem type is %s\n", fsname); + puts("### filesystem type is "); if (cramfs_check(part)) { + puts("CRAMFS\n"); ret = cramfs_info (part); + } else if (romfs_check(part)) { + puts("ROMFS\n"); + ret = romfs_info (part); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ + puts("JFFS2\n"); ret = jffs2_1pass_info(part); } diff --git a/fs/Makefile b/fs/Makefile index 273d90e..2e5cf90 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := cramfs ext2 fat fdos jffs2 reiserfs romfs $(obj).depend all: @for dir in $(SUBDIRS) ; do \

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[U-Boot-Users] Merge Window Closed.
by Wolfgang Denk 11 Sep '07

11 Sep '07

Hi everybody. our first merge window has just ended. I think I have processed all pull requests and added all (recent) open patches. Please have a look and check if anything that should go into the next release and has been submitted before the deadline is still missing. Please find attached below the build errors resulting when running the "MAKEALL" script for the "arm", "mips" and "ppc" architectures. I used the ELDk 4.1 tool chain to do this, just in case it matters. * Please help testing by running MAKEALL for the other architectures for which I don't have tools and boards to test... * Board maintainers: please help clean up build errors on warnings on your boards. Please help testing and fixing so we can have a high quality code release at the end of this cycle. BTW: what should the next release be named - 1.2.1 or 1.3.0 ? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Faith may be defined briefly as an illogical belief in the occurence of the improbable. - H. L. Mencken

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[U-Boot-Users] Atmel AT49BV320C support in Uboot
by raj reddy 11 Sep '07

11 Sep '07

Hi, Can any one help me, how to add support for the AT49BV320C (command Flash Interface) support for the uboot. Regards. Unlimited freedom, unlimited storage. Get it now, on http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/tools-08.html/

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[U-Boot-Users] U-Boot-1.3.0-rc1 released
by Wolfgang Denk 11 Sep '07

11 Sep '07

Hello, the first release candidate for U-Boot-1.3.0 is out. Please test it and help to clean up the remaining issues. PPC is in an acceptable state, but ARM and MIPS and others still need a lot of work... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Keep your head and your heart going in the right direction and you will not have to worry about your feet.

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[U-Boot-Users] Microblaze
by Michal Simek 11 Sep '07

11 Sep '07

HI, that's all. The biggest problem was in configuration file for boards. But I made changes and especially configs file contains some parts of it. Best regards Michal Simek

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[U-Boot-Users] Free NFL Game Tracker
by colunson＠fillmorefire.com 11 Sep '07

11 Sep '07

Are you ready for some football? Get all the information you need for every game. Get you data online everyday from our free game tracker: http://24.9.237.96/

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[U-Boot-Users] [PATCH13] microblaze - xupv2p
by Michal Simek 11 Sep '07

11 Sep '07

DESC: clean Makefile, change configuration setting why? because XupV2p use new emac drivers Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 9ab5633..99e7047 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,32 +22,17 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../xilinx_enet) -endif - -INCS := -I../common -I../xilinx_enet -CFLAGS += $(INCS) -HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o \ - ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ - ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ - ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ - ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ - ../common/xbasic_types.o ../common/xdma_channel.o \ - ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ - ../common/xversion.o \ +COBJS = $(BOARD).o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index c07b0b3..eedfb24 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x38000000 +TEXT_BASE = 0x30000000 +PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift +PLATFORM_CPPFLAGS += -mcpu=v5.00.c diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index a96c693..0bb7a80 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,17 +28,24 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 +/* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 +#define XILINX_PVR 0 +#define XILINX_FSL_NUMBER 0 + /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 11 +#define XILINX_INTC_NUM_INTR_INPUTS 7 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 1 +#define XILINX_TIMER_IRQ 0 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UART_BASEADDR 0x40600000 -#define XILINX_UART_BAUDRATE 115200 +#define XILINX_UARTLITE_BASEADDR 0x40600000 +#define XILINX_UARTLITE_BAUDRATE 115200 + +/* IIC doesn't exist */ /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -51,14 +58,10 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +#define XILINX_EMAC_BASEADDR 0x40c00000 +#define XILINX_EMAC_DMA_PRESENT 3 +#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 +#define XILINX_EMAC_MII_EXIST 1 diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 35001d7..006a132 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,13 +31,34 @@ #define CONFIG_XUPV2P 1 /* uart */ -#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR -#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE +#ifdef XILINX_UARTLITE_BASEADDR +#define XILINX_UARTLITE +#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#else +#ifdef XILINX_UART16550_BASEADDR +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 +#define CONFIG_CONS_INDEX 1 +#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ + +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 115200 } +#endif +#endif /* ethernet */ -#define CONFIG_EMAC 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES +#ifdef XILINX_EMAC_BASEADDR +#define XILINX_EMAC 1 +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define XILINX_EMACLITE 1 +#endif +#endif +#undef ET_DEBUG /* * setting reset address @@ -48,11 +69,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -119,7 +142,6 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) - /* * BOOTP options */ @@ -128,29 +150,24 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include <config_cmd_default.h> -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_MFSL #define CONFIG_CMD_PING +#ifdef XILINX_SYSACE_BASEADDR +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -162,7 +179,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -178,11 +195,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH11] microblaze - Ml401
by Michal Simek 11 Sep '07

11 Sep '07

Desc: repair ML401 config file Signed-off-by: Michal Simek <monstr(a)monstr.eu> Note: repair email, remove spaces, remove commands which are defined in config_cmd_default.h diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 7eeae70..bb72fac 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * - * Michal SIMEK <monstr(a)seznam.cz> + * Michal SIMEK <monstr(a)monstr.eu> * * See file CREDITS for list of people who contributed to this * project. @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -86,7 +87,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -99,7 +100,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -153,28 +154,18 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -210,10 +201,10 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */

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[U-Boot-Users] [PATCH10] microblaze - add EMAC and EMAClite to Makefile
by Michal Simek 11 Sep '07

11 Sep '07

DESC: add EMAC and EMAClite to Makefile Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 37d69b9..2a18acc 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libnet.a -COBJS := mcffec.o +COBJS := mcffec.o xilinx_emac.o xilinx_emaclite.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS))

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[U-Boot-Users] [PATCH12] microblaze - suzaku - fix compile error
by Michal Simek 11 Sep '07

11 Sep '07

DESC: remove suzaku unsupported commands Signed-off-by: Michal Simek <monstr(a)monstr.eu> Note: Suzaku board doesn't support ethernet. Remove unsupported command diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 08ac9cb..9a2eec1 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } @@ -55,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -108,4 +104,6 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 + #endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH8] microblaze - emaclite support
by Michal Simek 11 Sep '07

11 Sep '07

DESC: Add support for Xilinx emaclite Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index e69de29..5d8eaa5 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -0,0 +1,376 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr(a)monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <net.h> +#include <config.h> +#include <asm/io.h> + +#ifdef XILINX_EMACLITE_BASEADDR + +#undef DEBUG + +#define ENET_MAX_MTU PKTSIZE +#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN +#define ENET_ADDR_LENGTH 6 + +/* EmacLite constants */ +#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ +#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ +#define XEL_TSR_OFFSET 0x07FC /* Tx status */ +#define XEL_RSR_OFFSET 0x17FC /* Rx status */ +#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ + +/* Xmit complete */ +#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL +/* Xmit interrupt enable bit */ +#define XEL_TSR_XMIT_IE_MASK 0x00000008UL +/* Buffer is active, SW bit only */ +#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL +/* Program the MAC address */ +#define XEL_TSR_PROGRAM_MASK 0x00000002UL +/* define for programming the MAC address into the EMAC Lite */ +#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) + +/* Transmit packet length upper byte */ +#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL +/* Transmit packet length lower byte */ +#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL + +/* Recv complete */ +#define XEL_RSR_RECV_DONE_MASK 0x00000001UL +/* Recv interrupt enable bit */ +#define XEL_RSR_RECV_IE_MASK 0x00000008UL + +typedef struct { + unsigned int baseaddress; /* Base address for device (IPIF) */ + unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ + unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ + unsigned char deviceid; /* Unique ID of device - for future */ +} xemaclite; + +static xemaclite emaclite; + +static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ + +/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ +#ifdef CFG_ENV_IS_NOWHERE +static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; +#endif + +void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) +{ + unsigned int i; + u32 alignbuffer; + u32 *to32ptr; + u32 *from32ptr; + u8 *to8ptr; + u8 *from8ptr; + + from32ptr = (u32 *) srcptr; + + /* Word aligned buffer, no correction needed. */ + to32ptr = (u32 *) destptr; + while (bytecount > 3) { + *to32ptr++ = *from32ptr++; + bytecount -= 4; + } + to8ptr = (u8 *) to32ptr; + + alignbuffer = *from32ptr++; + from8ptr = (u8 *) & alignbuffer; + + for (i = 0; i < bytecount; i++) { + *to8ptr++ = *from8ptr++; + } +} + +void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) +{ + unsigned i; + u32 alignbuffer; + u32 *to32ptr = (u32 *) destptr; + u32 *from32ptr; + u8 *to8ptr; + u8 *from8ptr; + + from32ptr = (u32 *) srcptr; + while (bytecount > 3) { + + *to32ptr++ = *from32ptr++; + bytecount -= 4; + } + + alignbuffer = 0; + to8ptr = (u8 *) & alignbuffer; + from8ptr = (u8 *) from32ptr; + + for (i = 0; i < bytecount; i++) { + *to8ptr++ = *from8ptr++; + } + + *to32ptr++ = alignbuffer; +} + +void eth_halt (void) +{ +#ifdef DEBUG + puts ("eth_halt\n"); +#endif +} + +int eth_init (bd_t * bis) +{ +#ifdef DEBUG + puts ("EmacLite Initialization Started\n"); +#endif + memset (&emaclite, 0, sizeof (xemaclite)); + emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; + + if (!getenv("ethaddr")) { + memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); + } + +/* + * TX - TX_PING & TX_PONG initialization + */ + /* Restart PING TX */ + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); + /* Copy MAC address */ + xemaclite_alignedwrite (bis->bi_enetaddr, + emaclite.baseaddress, ENET_ADDR_LENGTH); + /* Set the length */ + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + /* Update the MAC address in the EMAC Lite */ + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);+ /* Wait for EMAC Lite to finish with the MAC address update */ + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & + XEL_TSR_PROG_MAC_ADDR) != 0) ; + +#ifdef XILINX_EMACLITE_TX_PING_PONG + /* The same operation with PONG TX */ + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);+ xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, + XEL_TSR_PROG_MAC_ADDR); + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + + XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; +#endif + +/* + * RX - RX_PING & RX_PONG initialization + */ + /* Write out the value to flush the RX buffer */ + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); +#ifdef XILINX_EMACLITE_RX_PING_PONG + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, + XEL_RSR_RECV_IE_MASK); +#endif + +#ifdef DEBUG + puts ("EmacLite Initialization complete\n"); +#endif + return 0; +} + +int xemaclite_txbufferavailable (xemaclite * instanceptr) +{ + u32 reg; + u32 txpingbusy; + u32 txpongbusy; + /* + * Read the other buffer register + * and determine if the other buffer is available + */ + reg = in_be32 (instanceptr->baseaddress + + instanceptr->nexttxbuffertouse + 0); + txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == + XEL_TSR_XMIT_BUSY_MASK); + + reg = in_be32 (instanceptr->baseaddress + + (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); + txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == + XEL_TSR_XMIT_BUSY_MASK); + + return (!(txpingbusy && txpongbusy)); +} + +int eth_send (volatile void *ptr, int len) { + + unsigned int reg; + unsigned int baseaddress; + + unsigned maxtry = 1000; + + if (len > ENET_MAX_MTU) + len = ENET_MAX_MTU; + + while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { + udelay (10); + maxtry--; + } + + if (!maxtry) { + printf ("Error: Timeout waiting for ethernet TX buffer\n"); + /* Restart PING TX */ + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); +#ifdef XILINX_EMACLITE_TX_PING_PONG + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + + XEL_BUFFER_OFFSET, 0); +#endif + return 0; + } + + /* Determine the expected TX buffer address */ + baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); + + /* Determine if the expected buffer address is empty */ + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { + +#ifdef XILINX_EMACLITE_TX_PING_PONG + emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; +#endif +#ifdef DEBUG + printf ("Send packet from 0x%x\n", baseaddress); +#endif + /* Write the frame to the buffer */ + xemaclite_alignedwrite ((void *) ptr, baseaddress, len); + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + reg |= XEL_TSR_XMIT_BUSY_MASK; + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { + reg |= XEL_TSR_XMIT_ACTIVE_MASK; + } + out_be32 (baseaddress + XEL_TSR_OFFSET, reg); + return 1; + } +#ifdef XILINX_EMACLITE_TX_PING_PONG + /* Switch to second buffer */ + baseaddress ^= XEL_BUFFER_OFFSET; + /* Determine if the expected buffer address is empty */ + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { +#ifdef DEBUG + printf ("Send packet from 0x%x\n", baseaddress); +#endif + /* Write the frame to the buffer */ + xemaclite_alignedwrite ((void *) ptr, baseaddress, len); + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + reg |= XEL_TSR_XMIT_BUSY_MASK; + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { + reg |= XEL_TSR_XMIT_ACTIVE_MASK; + } + out_be32 (baseaddress + XEL_TSR_OFFSET, reg); + return 1; + } +#endif + puts ("Error while sending frame\n"); + return 0; +} + +int eth_rx (void) +{ + unsigned int length; + unsigned int reg; + unsigned int baseaddress; + + baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); +#ifdef DEBUG + printf ("Testing data at address 0x%x\n", baseaddress); +#endif + if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { +#ifdef XILINX_EMACLITE_RX_PING_PONG + emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; +#endif + } else { +#ifndef XILINX_EMACLITE_RX_PING_PONG +#ifdef DEBUG + printf ("No data was available - address 0x%x\n", baseaddress); +#endif + return 0; +#else + baseaddress ^= XEL_BUFFER_OFFSET; + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); + if ((reg & XEL_RSR_RECV_DONE_MASK) != + XEL_RSR_RECV_DONE_MASK) { +#ifdef DEBUG + printf ("No data was available - address 0x%x\n", + baseaddress); +#endif + return 0; + } +#endif + } + /* Get the length of the frame that arrived */ + switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & + 0xFFFF0000 ) >> 16) { + case 0x806: + length = 42 + 20; /* FIXME size of ARP */ +#ifdef DEBUG + puts ("ARP Packet\n"); +#endif + break; + case 0x800: + length = 14 + 14 + + (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & + 0xFFFF0000) >> 16); /* FIXME size of IP packet */ +#ifdef DEBUG + puts("IP Packet\n"); +#endif + break; + default: +#ifdef DEBUG + puts("Other Packet\n"); +#endif + length = ENET_MAX_MTU; + break; + } + + xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), + etherrxbuff, length); + + /* Acknowledge the frame */ + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); + reg &= ~XEL_RSR_RECV_DONE_MASK; + out_be32 (baseaddress + XEL_RSR_OFFSET, reg); + +#ifdef DEBUG + printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); +#endif + NetReceive ((uchar *) etherrxbuff, length); + return 1; + +} +#endif

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[U-Boot-Users] [PATCH5] microblaze [FIX] Xilinx Uartlite driver
by Michal Simek 11 Sep '07

11 Sep '07

Desc: [FIX] Xilinx Uartlite driver why? because uartlite can be used by PowerPC405 Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index ed59abe..1f3aaae 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include <config.h> -#ifdef CONFIG_MICROBLAZE +#ifdef XILINX_UARTLITE #include <asm/serial_xuartlite.h>

2 2

[U-Boot-Users] best way to debug memory address problems?
by Alan Bennett 11 Sep '07

11 Sep '07

Help; I'm trying to figure out if these errors are hardware or software. And of course, this is our first ppc/uboot system, so I'm still stepping through a lot of learning as I go. I'm supposed to have a memory region from 0 to 7fff_ffff assigned to our 128MB memory. However, I run into several issues when trying to run mtest. I end up with an large sections mis-behaving. I don't see any conflicts in the BRx registers, and I believe my OR1 is set up properly, so I'm not sure how to proceed. good: #> md 0x00100000 1; mw 0x00100000 0xfff0000f ; md 0x00100000 1; 00100000: ffffffff .... 00100000: fff0000f .... bad: #> md 0x00b8ac98 1; mw 0x00b8ac98 0xffff0000 ; md 0x00b8ac98 1; 00b8ac98: 61633938 ac98 00b8ac98: 61633938 ac98 #> md 0x00b8ac98 1; mw 0x00b8ac98 0x0000ffff ; md 0x00b8ac98 1; 00b8ac98: 61633938 ac98 00b8ac98: 61633938 ac98 #> md 0x00b8ac98 1; mw 0x00b8ac98 0xff0000ff ; md 0x00b8ac98 1; 00b8ac98: 61633938 ac98 00b8ac98: 61633938 ac98 System: mpc8248 - custom board based on ep8248e 128 MB RAM; 128 MB Flash; 128 MB Flash #> memcinfo BR0 = f8001801 OR0 = f80018c2 BR1 = 00001841 OR1 = f8002b00 BR2 = f4000801 OR2 = fff018c4 BR3 = 00000000 OR3 = 00000000 BR4 = e8001801 OR4 = f80018c2 BR5 = f4100801 OR5 = fff00864 BR6 = f4200801 OR6 = fff00864 BR7 = 00000000 OR7 = 00000000 BR8 = 00000000 OR8 = 00000000 BR9 = 00000000 OR9 = 00000000 BR10 = 00000000 OR10 = 00000000 BR11 = 00000000 OR11 = 00000000 MAR = adf32865 MAMR = 00000000 MBMR = 00000000 MCMR = 00000000 MPTPR = 1300 MDR = 1d005815 PSDMR = c2672522 LSDMR = 00000000 PURT = 21 PSRT = 4b LURT = 12 LSRT = a9 IMMR = f0000c10

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[U-Boot-Users] [PATCH1] Microblaze - mfsl command reparation
by Michal Simek 11 Sep '07

11 Sep '07

Desc: mfsl command reparation Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 8d4c1a3..93cc873 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 1) { + if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -382,6 +382,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: + puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -408,10 +409,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rmsr - read/write special purpose register\n", + "rspr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 0 - MSR - Machine status register\n" - " 1 - EAR - Exception address register\n" - " 2 - ESR - Exception status register\n"); + " 1 - MSR - Machine status register\n" + " 3 - EAR - Exception address register\n" + " 5 - ESR - Exception status register\n"); #endif

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[U-Boot-Users] [PATCH6] - microblaze - ROMFS support - files
by Michal Simek 11 Sep '07

11 Sep '07

Desc: ROMFS source code fs support Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/fs/romfs/Makefile b/fs/romfs/Makefile index e69de29..937d755 100644 --- a/fs/romfs/Makefile +++ b/fs/romfs/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)libromfs.a + +AOBJS = +COBJS = romfs.o + +SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) + +#CPPFLAGS += + +all: $(LIB) $(AOBJS) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c index e69de29..15de3e1 100644 --- a/fs/romfs/romfs.c +++ b/fs/romfs/romfs.c @@ -0,0 +1,240 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr(a)monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <command.h> + +#if defined(CONFIG_CMD_JFFS2) + +#include <asm/byteorder.h> +#include <linux/stat.h> +#include <jffs2/jffs2.h> +#include <jffs2/load_kernel.h> + +#undef DEBUG_ROMFS + +/* ROMFS superblock */ +struct romfs_super { + u32 word0; + u32 word1; + u32 size; + u32 checksum; + char name[0]; +}; + +struct romfs_inode { + u32 next; + u32 spec; + u32 size; + u32 checksum; + char name[0]; +}; + +extern flash_info_t flash_info[]; +#define PART_OFFSET(x) (x->offset + flash_info[x->dev->id->num].start[0]) +#define ALIGN(x) (((x) & 0xfffffff0)) +#define HEADERSIZE(name) (0x20 + ALIGN(strlen(name))) + +static unsigned long romfs_resolve (unsigned long begin, unsigned long offset, + unsigned long size, int raw, char *filename) +{ + unsigned long inodeoffset = 0, nextoffset; + struct romfs_inode *inode; +#ifdef DEBUG_ROMFS + printf ("ROMFS_resolve: begin 0x%x, offset 0x%x, size 0x%x, raw 0x%x, \ + filename %s\n", begin, offset, size, raw, filename); +#endif + + while (inodeoffset < size) { + inode = (struct romfs_inode *)(begin + offset + inodeoffset); + offset = 0; + nextoffset = ALIGN (inode->next); +#ifdef DEBUG_ROMFS + printf("inode 0x%x, name %s - len 0x%x, next inode 0x%x, \ + compare names 0x%x\n", + inode, inode->name, strlen (inode->name), nextoffset, + strncmp (filename, inode->name, strlen (filename))); +#endif + if (!strncmp (filename, inode->name, strlen (inode->name))) { + char *p = strtok (NULL, "/"); + if (raw && (p == NULL || *p == '\0')) { + return offset + inodeoffset; + } + return romfs_resolve (begin, + inodeoffset + HEADERSIZE (inode->name), + size, raw, p); + } + inodeoffset = nextoffset; + } + + printf ("can't find corresponding entry\n"); + return 0; +} + +int romfs_load (char *loadoffset, struct part_info *info, char *filename) +{ + struct romfs_inode *inode; + struct romfs_super *sb; + char *data; + int pocet; + sb = (struct romfs_super *) PART_OFFSET (info); + + unsigned long offset; + + offset = romfs_resolve (PART_OFFSET (info), HEADERSIZE (sb->name), + sb->size, 1, strtok (filename, "/")); + if (offset <= 0) + return offset; + + inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); + data = (char *)((int)inode + HEADERSIZE (inode->name)); + pocet = inode->size; + while (pocet--) { + *loadoffset++ = *data++; + } + return inode->size; +} + +static int romfs_list_inode (struct part_info *info, unsigned long offset) +{ + struct romfs_inode *inode = + (struct romfs_inode *)(PART_OFFSET (info) + offset); + struct romfs_inode *hardlink = NULL; + char str[3], *data; + +/* + * mapping spec.info means + * 0 hard link link destination [file header] + * 1 directory first file's header + * 2 regular file unused, must be zero [MBZ] + * 3 symbolic link unused, MBZ (file data is the link content) + * 4 block device 16/16 bits major/minor number + * 5 char device - " - + * 6 socket unused, MBZ + * 7 fifo unused, MBZ + */ + char attributes[] = "hdflbcsp"; + str[0] = attributes[inode->next & 0x7]; + str[1] = (inode->next & 0x8) ? 'x' : '-'; + str[2] = '\0'; + + if ((str[0] == 'b') || (str[0] == 'c')) { +#ifdef DEBUG_ROMFS + printf (" %s %3d,%3d %12s 0x%08x 0x%08x", str, + (inode->spec & 0xffff0000) >> 16, + inode->spec & 0x0000ffff, inode->name, inode, + inode->spec); +#else + printf (" %s %3d,%3d %12s", str, + (inode->spec & 0xffff0000) >> 16, + inode->spec & 0x0000ffff); +#endif + } else { +#ifdef DEBUG_ROMFS + printf (" %s %7d %12s 0x%08x 0x%08x", str, inode->size, + inode->name, inode, inode->spec); +#else + printf (" %s %7d %12s", str, inode->size, inode->name); +#endif + if (str[0] == 'l') { + data = (char *)((int)inode + HEADERSIZE (inode->name)); + puts (" -> "); + puts (data); + } + if (str[0] == 'h') { + hardlink = (struct romfs_inode *)(PART_OFFSET (info) + + inode->spec); + puts (" -> "); + puts (hardlink->name); + } + } + puts ("\n"); + return ALIGN (inode->next); +} + +int romfs_ls (struct part_info *info, char *filename) +{ + struct romfs_inode *inode; + unsigned long inodeoffset = 0, nextoffset; + unsigned long offset, size; + struct romfs_super *sb; + sb = (struct romfs_super *)PART_OFFSET (info); + + if (strlen (filename) == 0 || !strcmp (filename, "/")) { + offset = HEADERSIZE (sb->name); + size = sb->size; + } else { + offset = romfs_resolve (PART_OFFSET (info), + HEADERSIZE (sb->name), sb->size, 1, + strtok (filename, "/")); + + if (offset == 0) { + return offset; + } + inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); + if ((inode->next & 0x7) != 1) { + return (romfs_list_inode (info, offset) > 0); + } + + size = sb->size; + offset = offset + HEADERSIZE (inode->name); + } + + inodeoffset = offset + inodeoffset; + while (inodeoffset < size) { + nextoffset = romfs_list_inode (info, inodeoffset); + if (nextoffset == 0) + break; + inodeoffset = nextoffset; + } + return 1; +} + +int romfs_info (struct part_info *info) +{ + struct romfs_super *sb; + sb = (struct romfs_super *)PART_OFFSET (info); + + printf ("name: \t\t%s, len %d B\n", sb->name, strlen (sb->name)); + printf ("size of SB:\t%d B\n", HEADERSIZE (sb->name)); + printf ("full size:\t%d B\n", sb->size); + printf ("checksum:\t0x%x\n", sb->checksum); + return 0; +} + +int romfs_check (struct part_info *info) +{ + struct romfs_super *sb; + if (info->dev->id->type != MTD_DEV_TYPE_NOR) + return 0; + + sb = (struct romfs_super *)PART_OFFSET (info); + if ((sb->word0 != 0x2D726F6D) || (sb->word1 != 0x3166732D)) { + return 0; + } + return 1; +} + +#endif

2 2

[U-Boot-Users] flash issues
by Robert 11 Sep '07

11 Sep '07

Hi all, I use "flinfo" to display the nand flash information under uboot prompt, and find that only two sectors are ready-only, but the other sectors could be read-write, why could happen this? I do nothing changes in uboot and on my development board Marvell5182. So I decide to re-load a new u-boot.bin to the boot flash, then reboot the system, and do the same thing as before, but I find that the boot flash has been changed to be read-only too, I don't know why? Could anybody tell? Here is my print information from superterminal: ----------------------------------------------------------------- Bank # 1: AMD AM29LV040B (4 Mbit, bottom boot sect) Size: 512 kB,Bus Width: 1, device Width: 1. Flash base: 0xff800000,Number of Sectors: 8 Type: REGULAR. Sector Start Addresses: 00000000 (RO) 00010000 (RO) 00020000 (RO) 00030000 (RO) 00040000 (RO) 00050000 (RO) 00060000 (RO) 00070000 (RO) Bank # 2: INTEL 28F128J3A (128 Mbit) Size: 16 MB,Bus Width: 2, device Width: 2. Flash base: 0xf8000000,Number of Sectors: 128 Type: REGULAR. Sector Start Addresses: 00000000 00020000 (RO) 00040000 (RO) 00060000 00080000 000a0000 000c0000 000e0000 00100000 00120000 00140000 00160000 00180000 001a0000 001c0000 001e0000 00200000 00220000 00240000 00260000 00280000 002a0000 002c0000 002e0000 00300000 00320000 00340000 00360000 00380000 003a0000 003c0000 003e0000 00400000 00420000 00440000 00460000 00480000 004a0000 004c0000 004e0000 00500000 00520000 00540000 00560000 00580000 005a0000 005c0000 005e0000 00600000 00620000 00640000 00660000 00680000 006a0000 006c0000 006e0000 00700000 00720000 00740000 00760000 00780000 007a0000 007c0000 007e0000 00800000 00820000 00840000 00860000 00880000 008a0000 008c0000 008e0000 00900000 00920000 00940000 00960000 00980000 009a0000 009c0000 009e0000 00a00000 00a20000 00a40000 00a60000 00a80000 00aa0000 00ac0000 00ae0000 00b00000 00b20000 00b40000 00b60000 00b80000 00ba0000 00bc0000 00be0000 00c00000 00c20000 00c40000 00c60000 00c80000 00ca0000 00cc0000 00ce0000 00d00000 00d20000 00d40000 00d60000 00d80000 00da0000 00dc0000 00de0000 00e00000 00e20000 00e40000 00e60000 00e80000 00ea0000 00ec0000 00ee0000 00f00000 00f20000 00f40000 00f60000 00f80000 -------------------------- With kind regards, Robert

1 0

[U-Boot-Users] [PATCH 3/5] OneNAND support
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH] OneNAND support Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/drivers/onenand/onenand_base.c b/drivers/onenand/onenand_base.c new file mode 100644 index 0000000..997bd00 --- /dev/null +++ b/drivers/onenand/onenand_base.c @@ -0,0 +1,1312 @@ +/* + * linux/drivers/mtd/onenand/onenand_base.c + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> + +#ifdef CONFIG_CMD_ONENAND + +#include <linux/mtd/onenand.h> + +#undef __mem_pci +#include <asm/io.h> + +#ifdef __ARM__ +extern void memcpy32(void *, void *, size_t); + +static void *memcpy(void *dest, const void *src, size_t count) +{ + if (count < 32) { + unsigned short *_s = (unsigned short *)(src); + unsigned short *_d = (unsigned short *)(dest); + count >>= 1; + while (count--) + *_d++ = *_s++; + return _d; + } + + memcpy32(dest, (void *)src, count); + + return (void *)count; +} +#endif + +static const unsigned char ffchars[] = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ +}; + +/** + * onenand_readw - [OneNAND Interface] Read OneNAND register + * @param addr address to read + * + * Read OneNAND register + */ +static unsigned short onenand_readw(void __iomem * addr) +{ + return readw(addr); +} + +/** + * onenand_writew - [OneNAND Interface] Write OneNAND register with value + * @param value value to write + * @param addr address to write + * + * Write OneNAND register with value + */ +static void onenand_writew(unsigned short value, void __iomem * addr) +{ + writew(value, addr); +} + +/** + * onenand_block_address - [DEFAULT] Get block address + * @param device the device id + * @param block the block + * @return translated block address if DDP, otherwise same + * + * Setup Start Address 1 Register (F100h) + */ +static int onenand_block_address(int device, int block) +{ + if (device & ONENAND_DEVICE_IS_DDP) { + /* Device Flash Core select, NAND Flash Block Address */ + int dfs = 0, density, mask; + + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + mask = (1 << (density + 6)); + + if (block & mask) + dfs = 1; + + return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1)); + } + + return block; +} + +/** + * onenand_bufferram_address - [DEFAULT] Get bufferram address + * @param device the device id + * @param block the block + * @return set DBS value if DDP, otherwise 0 + * + * Setup Start Address 2 Register (F101h) for DDP + */ +static int onenand_bufferram_address(int device, int block) +{ + if (device & ONENAND_DEVICE_IS_DDP) { + /* Device BufferRAM Select */ + int dbs = 0, density, mask; + + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + mask = (1 << (density + 6)); + + if (block & mask) + dbs = 1; + + return (dbs << ONENAND_DDP_SHIFT); + } + + return 0; +} + +/** + * onenand_page_address - [DEFAULT] Get page address + * @param page the page address + * @param sector the sector address + * @return combined page and sector address + * + * Setup Start Address 8 Register (F107h) + */ +static int onenand_page_address(int page, int sector) +{ + /* Flash Page Address, Flash Sector Address */ + int fpa, fsa; + + fpa = page & ONENAND_FPA_MASK; + fsa = sector & ONENAND_FSA_MASK; + + return ((fpa << ONENAND_FPA_SHIFT) | fsa); +} + +/** + * onenand_buffer_address - [DEFAULT] Get buffer address + * @param dataram1 DataRAM index + * @param sectors the sector address + * @param count the number of sectors + * @return the start buffer value + * + * Setup Start Buffer Register (F200h) + */ +static int onenand_buffer_address(int dataram1, int sectors, int count) +{ + int bsa, bsc; + + /* BufferRAM Sector Address */ + bsa = sectors & ONENAND_BSA_MASK; + + if (dataram1) + bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ + else + bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ + + /* BufferRAM Sector Count */ + bsc = count & ONENAND_BSC_MASK; + + return ((bsa << ONENAND_BSA_SHIFT) | bsc); +} + +/** + * onenand_command - [DEFAULT] Send command to OneNAND device + * @param mtd MTD device structure + * @param cmd the command to be sent + * @param addr offset to read from or write to + * @param len number of bytes to read or write + * + * Send command to OneNAND device. This function is used for middle/large page + * devices (1KB/2KB Bytes per page) + */ +static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, + size_t len) +{ + struct onenand_chip *this = mtd->priv; + int value, readcmd = 0; + int block, page; + /* Now we use page size operation */ + int sectors = 4, count = 4; + + /* Address translation */ + switch (cmd) { + case ONENAND_CMD_UNLOCK: + case ONENAND_CMD_LOCK: + case ONENAND_CMD_LOCK_TIGHT: + block = -1; + page = -1; + break; + + case ONENAND_CMD_ERASE: + case ONENAND_CMD_BUFFERRAM: + block = (int)(addr >> this->erase_shift); + page = -1; + break; + + default: + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + break; + } + + /* NOTE: The setting order of the registers is very important! */ + if (cmd == ONENAND_CMD_BUFFERRAM) { + /* Select DataRAM for DDP */ + value = onenand_bufferram_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS2); + + /* Switch to the next data buffer */ + ONENAND_SET_NEXT_BUFFERRAM(this); + + return 0; + } + + if (block != -1) { + /* Write 'DFS, FBA' of Flash */ + value = onenand_block_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS1); + } + + if (page != -1) { + int dataram; + + switch (cmd) { + case ONENAND_CMD_READ: + case ONENAND_CMD_READOOB: + dataram = ONENAND_SET_NEXT_BUFFERRAM(this); + readcmd = 1; + break; + + default: + dataram = ONENAND_CURRENT_BUFFERRAM(this); + break; + } + + /* Write 'FPA, FSA' of Flash */ + value = onenand_page_address(page, sectors); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS8); + + /* Write 'BSA, BSC' of DataRAM */ + value = onenand_buffer_address(dataram, sectors, count); + this->write_word(value, this->base + ONENAND_REG_START_BUFFER); + + if (readcmd) { + /* Select DataRAM for DDP */ + value = + onenand_bufferram_address(this->device_id, block); + this->write_word(value, + this->base + + ONENAND_REG_START_ADDRESS2); + } + } + + /* Interrupt clear */ + this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); + /* Write command */ + this->write_word(cmd, this->base + ONENAND_REG_COMMAND); + + return 0; +} + +/** + * onenand_wait - [DEFAULT] wait until the command is done + * @param mtd MTD device structure + * @param state state to select the max. timeout value + * + * Wait for command done. This applies to all OneNAND command + * Read can take up to 30us, erase up to 2ms and program up to 350us + * according to general OneNAND specs + */ +static int onenand_wait(struct mtd_info *mtd, int state) +{ + struct onenand_chip *this = mtd->priv; + unsigned int flags = ONENAND_INT_MASTER; + unsigned int interrupt = 0; + unsigned int ctrl, ecc; + + while (1) { + interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); + if (interrupt & flags) + break; + } + + ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); + + if (ctrl & ONENAND_CTRL_ERROR) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: controller error = 0x%04x\n", ctrl); + return -EAGAIN; + } + + if (ctrl & ONENAND_CTRL_LOCK) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: it's locked error = 0x%04x\n", ctrl); + return -EIO; + } + + if (interrupt & ONENAND_INT_READ) { + ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); + if (ecc & ONENAND_ECC_2BIT_ALL) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: ECC error = 0x%04x\n", ecc); + return -EBADMSG; + } + } + + return 0; +} + +/** + * onenand_bufferram_offset - [DEFAULT] BufferRAM offset + * @param mtd MTD data structure + * @param area BufferRAM area + * @return offset given area + * + * Return BufferRAM offset given area + */ +static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) +{ + struct onenand_chip *this = mtd->priv; + + if (ONENAND_CURRENT_BUFFERRAM(this)) { + if (area == ONENAND_DATARAM) + return mtd->oobblock; + if (area == ONENAND_SPARERAM) + return mtd->oobsize; + } + + return 0; +} + +/** + * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Read the BufferRAM area + */ +static int onenand_read_bufferram(struct mtd_info *mtd, int area, + unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy(buffer, bufferram + offset, count); + + return 0; +} + +/** + * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Read the BufferRAM area with Sync. Burst Mode + */ +static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, + unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); + + memcpy(buffer, bufferram + offset, count); + + this->mmcontrol(mtd, 0); + + return 0; +} + +/** + * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Write the BufferRAM area + */ +static int onenand_write_bufferram(struct mtd_info *mtd, int area, + const unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy(bufferram + offset, buffer, count); + + return 0; +} + +/** + * onenand_check_bufferram - [GENERIC] Check BufferRAM information + * @param mtd MTD data structure + * @param addr address to check + * @return 1 if there are valid data, otherwise 0 + * + * Check bufferram if there is data we required + */ +static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) +{ + struct onenand_chip *this = mtd->priv; + int block, page; + int i; + + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + + i = ONENAND_CURRENT_BUFFERRAM(this); + + /* Is there valid data? */ + if (this->bufferram[i].block == block && + this->bufferram[i].page == page && this->bufferram[i].valid) + return 1; + + return 0; +} + +/** + * onenand_update_bufferram - [GENERIC] Update BufferRAM information + * @param mtd MTD data structure + * @param addr address to update + * @param valid valid flag + * + * Update BufferRAM information + */ +static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, + int valid) +{ + struct onenand_chip *this = mtd->priv; + int block, page; + int i; + + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + + /* Invalidate BufferRAM */ + for (i = 0; i < MAX_BUFFERRAM; i++) { + if (this->bufferram[i].block == block && + this->bufferram[i].page == page) + this->bufferram[i].valid = 0; + } + + /* Update BufferRAM */ + i = ONENAND_CURRENT_BUFFERRAM(this); + this->bufferram[i].block = block; + this->bufferram[i].page = page; + this->bufferram[i].valid = valid; + + return 0; +} + +/** + * onenand_get_device - [GENERIC] Get chip for selected access + * @param mtd MTD device structure + * @param new_state the state which is requested + * + * Get the device and lock it for exclusive access + */ +static void onenand_get_device(struct mtd_info *mtd, int new_state) +{ + /* Do nothing */ +} + +/** + * onenand_release_device - [GENERIC] release chip + * @param mtd MTD device structure + * + * Deselect, release chip lock and wake up anyone waiting on the device + */ +static void onenand_release_device(struct mtd_info *mtd) +{ + /* Do nothing */ +} + +/** + * onenand_read_ecc - [MTD Interface] Read data with ECC + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * @param oob_buf filesystem supplied oob data buffer + * @param oobsel oob selection structure + * + * OneNAND read with ECC + */ +static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf, + u_char * oob_buf, struct nand_oobinfo *oobsel) +{ + struct onenand_chip *this = mtd->priv; + int read = 0, column; + int thislen; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", + (unsigned int)from, (int)len); + + /* Do not allow reads past end of device */ + if ((from + len) > mtd->size) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_ecc: Attempt read beyond end of device\n"); + *retlen = 0; + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_READING); + + while (read < len) { + thislen = min_t(int, mtd->oobblock, len - read); + + column = from & (mtd->oobblock - 1); + if (column + thislen > mtd->oobblock) + thislen = mtd->oobblock - column; + + if (!onenand_check_bufferram(mtd, from)) { + this->command(mtd, ONENAND_CMD_READ, from, + mtd->oobblock); + ret = this->wait(mtd, FL_READING); + /* First copy data and check return value for ECC handling */ + onenand_update_bufferram(mtd, from, 1); + } + + this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, + thislen); + + read += thislen; + if (read == len) + break; + + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_ecc: read failed = %d\n", ret); + break; + } + + from += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + /* + * Return success, if no ECC failures, else -EBADMSG + * fs driver will take care of that, because + * retlen == desired len and result == -EBADMSG + */ + *retlen = read; + return ret; +} + +/** + * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * + * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL +*/ +int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf) +{ + return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); +} + +/** + * onenand_read_oob - [MTD Interface] OneNAND read out-of-band + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * + * OneNAND read out-of-band data from the spare area + */ +int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf) +{ + struct onenand_chip *this = mtd->priv; + int read = 0, thislen, column; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", + (unsigned int)from, (int)len); + + /* Initialize return length value */ + *retlen = 0; + + /* Do not allow reads past end of device */ + if (unlikely((from + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_oob: Attempt read beyond end of device\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_READING); + + column = from & (mtd->oobsize - 1); + + while (read < len) { + thislen = mtd->oobsize - column; + thislen = min_t(int, thislen, len); + + this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); + + onenand_update_bufferram(mtd, from, 0); + + ret = this->wait(mtd, FL_READING); + /* First copy data and check return value for ECC handling */ + + this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, + thislen); + + read += thislen; + if (read == len) + break; + + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_oob: read failed = %d\n", ret); + break; + } + + buf += thislen; + /* Read more? */ + if (read < len) { + /* Page size */ + from += mtd->oobblock; + column = 0; + } + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = read; + return ret; +} + +#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE +/** + * onenand_verify_page - [GENERIC] verify the chip contents after a write + * @param mtd MTD device structure + * @param buf the databuffer to verify + * @param block block address + * @param page page address + * + * Check DataRAM area directly + */ +static int onenand_verify_page(struct mtd_info *mtd, u_char * buf, + loff_t addr, int block, int page) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *dataram0, *dataram1; + int ret = 0; + + this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); + + ret = this->wait(mtd, FL_READING); + if (ret) + return ret; + + onenand_update_bufferram(mtd, addr, 1); + + /* Check, if the two dataram areas are same */ + dataram0 = this->base + ONENAND_DATARAM; + dataram1 = dataram0 + mtd->oobblock; + + if (memcmp(dataram0, dataram1, mtd->oobblock)) + return -EBADMSG; + + return 0; +} +#else +#define onenand_verify_page(...) (0) +#endif + +#define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) + +/** + * onenand_write_ecc - [MTD Interface] OneNAND write with ECC + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * @param eccbuf filesystem supplied oob data buffer + * @param oobsel oob selection structure + * + * OneNAND write with ECC + */ +static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf, + u_char * eccbuf, struct nand_oobinfo *oobsel) +{ + struct onenand_chip *this = mtd->priv; + int written = 0; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", + (unsigned int)to, (int)len); + + /* Initialize retlen, in case of early exit */ + *retlen = 0; + + /* Do not allow writes past end of device */ + if (unlikely((to + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: Attempt write to past end of device\n"); + return -EINVAL; + } + + /* Reject writes, which are not page aligned */ + if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: Attempt to write not page aligned data\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_WRITING); + + /* Loop until all data write */ + while (written < len) { + int thislen = min_t(int, mtd->oobblock, len - written); + + this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); + + this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); + this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, + mtd->oobsize); + + this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); + + onenand_update_bufferram(mtd, to, 1); + + ret = this->wait(mtd, FL_WRITING); + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: write filaed %d\n", ret); + break; + } + + written += thislen; + + /* Only check verify write turn on */ + ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page); + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: verify failed %d\n", ret); + break; + } + + if (written == len) + break; + + to += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = written; + + return ret; +} + +/** + * onenand_write - [MTD Interface] compability function for onenand_write_ecc + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * + * This function simply calls onenand_write_ecc + * with oob buffer and oobsel = NULL + */ +int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf) +{ + return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); +} + +/** + * onenand_write_oob - [MTD Interface] OneNAND write out-of-band + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * + * OneNAND write out-of-band + */ +int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf) +{ + struct onenand_chip *this = mtd->priv; + int column, status; + int written = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", + (unsigned int)to, (int)len); + + /* Initialize retlen, in case of early exit */ + *retlen = 0; + + /* Do not allow writes past end of device */ + if (unlikely((to + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_oob: Attempt write to past end of device\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_WRITING); + + /* Loop until all data write */ + while (written < len) { + int thislen = min_t(int, mtd->oobsize, len - written); + + column = to & (mtd->oobsize - 1); + + this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); + + this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, + mtd->oobsize); + this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, + thislen); + + this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); + + onenand_update_bufferram(mtd, to, 0); + + status = this->wait(mtd, FL_WRITING); + if (status) + break; + + written += thislen; + if (written == len) + break; + + to += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = written; + + return 0; +} + +/** + * onenand_erase - [MTD Interface] erase block(s) + * @param mtd MTD device structure + * @param instr erase instruction + * + * Erase one ore more blocks + */ +int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + struct onenand_chip *this = mtd->priv; + unsigned int block_size; + loff_t addr; + int len; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", + (unsigned int)instr->addr, (unsigned int)instr->len); + + block_size = (1 << this->erase_shift); + + /* Start address must align on block boundary */ + if (unlikely(instr->addr & (block_size - 1))) { + DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n"); + return -EINVAL; + } + + /* Length must align on block boundary */ + if (unlikely(instr->len & (block_size - 1))) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Length not block aligned\n"); + return -EINVAL; + } + + /* Do not allow erase past end of device */ + if (unlikely((instr->len + instr->addr) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Erase past end of device\n"); + return -EINVAL; + } + + instr->fail_addr = 0xffffffff; + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_ERASING); + + /* Loop throught the pages */ + len = instr->len; + addr = instr->addr; + + instr->state = MTD_ERASING; + + while (len) { + + /* TODO Check badblock */ + + this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); + + ret = this->wait(mtd, FL_ERASING); + /* Check, if it is write protected */ + if (ret) { + if (ret == -EPERM) + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Device is write protected!!!\n"); + else + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Failed erase, block %d\n", + (unsigned)(addr >> this->erase_shift)); + instr->state = MTD_ERASE_FAILED; + instr->fail_addr = addr; + goto erase_exit; + } + + len -= block_size; + addr += block_size; + } + + instr->state = MTD_ERASE_DONE; + + erase_exit: + + ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; + /* Do call back function */ + if (!ret) + mtd_erase_callback(instr); + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + return ret; +} + +/** + * onenand_sync - [MTD Interface] sync + * @param mtd MTD device structure + * + * Sync is actually a wait for chip ready function + */ +void onenand_sync(struct mtd_info *mtd) +{ + DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_SYNCING); + + /* Release it and go back */ + onenand_release_device(mtd); +} + +/** + * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + */ +int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) +{ + /* + * TODO + * 1. Bad block table (BBT) + * -> using NAND BBT to support JFFS2 + * 2. Bad block management (BBM) + * -> bad block replace scheme + * + * Currently we do nothing + */ + return 0; +} + +/** + * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + */ +int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) +{ + /* see above */ + return 0; +} + +/** + * onenand_unlock - [MTD Interface] Unlock block(s) + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + * @param len number of bytes to unlock + * + * Unlock one or more blocks + */ +int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + struct onenand_chip *this = mtd->priv; + int start, end, block, value, status; + + start = ofs >> this->erase_shift; + end = len >> this->erase_shift; + + /* Continuous lock scheme */ + if (this->options & ONENAND_CONT_LOCK) { + /* Set start block address */ + this->write_word(start, + this->base + ONENAND_REG_START_BLOCK_ADDRESS); + /* Set end block address */ + this->write_word(end - 1, + this->base + ONENAND_REG_END_BLOCK_ADDRESS); + /* Write unlock command */ + this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); + + /* There's no return value */ + this->wait(mtd, FL_UNLOCKING); + + /* Sanity check */ + while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) + & ONENAND_CTRL_ONGO) + continue; + + /* Check lock status */ + status = this->read_word(this->base + ONENAND_REG_WP_STATUS); + if (!(status & ONENAND_WP_US)) + printk(KERN_ERR "wp status = 0x%x\n", status); + + return 0; + } + + /* Block lock scheme */ + for (block = start; block < end; block++) { + /* Set start block address */ + this->write_word(block, + this->base + ONENAND_REG_START_BLOCK_ADDRESS); + /* Write unlock command */ + this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); + + /* There's no return value */ + this->wait(mtd, FL_UNLOCKING); + + /* Sanity check */ + while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) + & ONENAND_CTRL_ONGO) + continue; + + /* Set block address for read block status */ + value = onenand_block_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS1); + + /* Check lock status */ + status = this->read_word(this->base + ONENAND_REG_WP_STATUS); + if (!(status & ONENAND_WP_US)) + printk(KERN_ERR "block = %d, wp status = 0x%x\n", + block, status); + } + + return 0; +} + +/** + * onenand_print_device_info - Print device ID + * @param device device ID + * + * Print device ID + */ +void onenand_print_device_info(int device, int verbose) +{ + int vcc, demuxed, ddp, density; + + if (!verbose) + return; + + vcc = device & ONENAND_DEVICE_VCC_MASK; + demuxed = device & ONENAND_DEVICE_IS_DEMUX; + ddp = device & ONENAND_DEVICE_IS_DDP; + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", + demuxed ? "" : "Muxed ", + ddp ? "(DDP)" : "", + (16 << density), vcc ? "2.65/3.3" : "1.8", device); +} + +static const struct onenand_manufacturers onenand_manuf_ids[] = { + {ONENAND_MFR_SAMSUNG, "Samsung"}, + {ONENAND_MFR_UNKNOWN, "Unknown"} +}; + +/** + * onenand_check_maf - Check manufacturer ID + * @param manuf manufacturer ID + * + * Check manufacturer ID + */ +static int onenand_check_maf(int manuf) +{ + int i; + + for (i = 0; onenand_manuf_ids[i].id; i++) { + if (manuf == onenand_manuf_ids[i].id) + break; + } + +#ifdef ONENAND_DEBUG + printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", + onenand_manuf_ids[i].name, manuf); +#endif + + return (i != ONENAND_MFR_UNKNOWN); +} + +/** + * onenand_probe - [OneNAND Interface] Probe the OneNAND device + * @param mtd MTD device structure + * + * OneNAND detection method: + * Compare the the values from command with ones from register + */ +static int onenand_probe(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + int bram_maf_id, bram_dev_id, maf_id, dev_id; + int version_id; + int density; + + /* Send the command for reading device ID from BootRAM */ + this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); + + /* Read manufacturer and device IDs from BootRAM */ + bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); + bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); + + /* Check manufacturer ID */ + if (onenand_check_maf(bram_maf_id)) + return -ENXIO; + + /* Reset OneNAND to read default register values */ + this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); + + { + int i; + for (i = 0; i < 10000; i++) ; + } + + /* Read manufacturer and device IDs from Register */ + maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); + dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); + + /* Check OneNAND device */ + if (maf_id != bram_maf_id || dev_id != bram_dev_id) + return -ENXIO; + + /* Flash device information */ + onenand_print_device_info(dev_id, 0); + this->device_id = dev_id; + + density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; + this->chipsize = (16 << density) << 20; + + /* OneNAND page size & block size */ + /* The data buffer size is equal to page size */ + mtd->oobblock = + this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); + mtd->oobsize = mtd->oobblock >> 5; + /* Pagers per block is always 64 in OneNAND */ + mtd->erasesize = mtd->oobblock << 6; + + this->erase_shift = ffs(mtd->erasesize) - 1; + this->page_shift = ffs(mtd->oobblock) - 1; + this->ppb_shift = (this->erase_shift - this->page_shift); + this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; + + /* REVIST: Multichip handling */ + + mtd->size = this->chipsize; + + /* Version ID */ + version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); +#ifdef ONENAND_DEBUG + printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); +#endif + + /* Lock scheme */ + if (density <= ONENAND_DEVICE_DENSITY_512Mb && + !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { + printk(KERN_INFO "Lock scheme is Continues Lock\n"); + this->options |= ONENAND_CONT_LOCK; + } + + return 0; +} + +/** + * onenand_scan - [OneNAND Interface] Scan for the OneNAND device + * @param mtd MTD device structure + * @param maxchips Number of chips to scan for + * + * This fills out all the not initialized function pointers + * with the defaults. + * The flash ID is read and the mtd/chip structures are + * filled with the appropriate values. + */ +int onenand_scan(struct mtd_info *mtd, int maxchips) +{ + struct onenand_chip *this = mtd->priv; + + if (!this->read_word) + this->read_word = onenand_readw; + if (!this->write_word) + this->write_word = onenand_writew; + + if (!this->command) + this->command = onenand_command; + if (!this->wait) + this->wait = onenand_wait; + + if (!this->read_bufferram) + this->read_bufferram = onenand_read_bufferram; + if (!this->write_bufferram) + this->write_bufferram = onenand_write_bufferram; + + if (onenand_probe(mtd)) + return -ENXIO; + + /* Set Sync. Burst Read after probing */ + if (this->mmcontrol) { + printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); + this->read_bufferram = onenand_sync_read_bufferram; + } + + onenand_unlock(mtd, 0, mtd->size); + + return onenand_default_bbt(mtd); +} + +/** + * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device + * @param mtd MTD device structure + */ +void onenand_release(struct mtd_info *mtd) +{ +} + +/* + * OneNAND initialization at U-Boot + */ +struct mtd_info onenand_mtd; +struct onenand_chip onenand_chip; + +void onenand_init(void) +{ + memset(&onenand_mtd, 0, sizeof(struct mtd_info)); + memset(&onenand_chip, 0, sizeof(struct onenand_chip)); + + onenand_chip.base = (void *)CFG_ONENAND_BASE; + onenand_mtd.priv = &onenand_chip; + + onenand_scan(&onenand_mtd, 1); + + puts("OneNAND: "); + print_size(onenand_mtd.size, "\n"); +} + +#endif /* CFG_CMD_ONENAND */

2 5

[U-Boot-Users] (no subject)
by gb sudeep 10 Sep '07

10 Sep '07

hi, email gbsudeep(a)gmail.com

1 0

[U-Boot-Users] [PATCH 5/5] OneNAND support
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH] OneNAND support Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3d91e99..f8eca87 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -59,6 +59,7 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ #define CONFIG_CMD_PING /* ping support */ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 0000000..f194cf1 --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,127 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * Copyright (c) 2000-2005 + * Thomas Gleixner <tglx(a)linuxtronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#ifndef NAND_MAX_CHIPS +#define NAND_MAX_CHIPS 8 +#endif + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt (struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 0000000..4b0c2df --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,143 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include <linux/mtd/onenand_regs.h> + +/* Note: The header order is impoertant */ +#include <onenand_uboot.h> + +#include <linux/mtd/bbm.h> + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan (struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release (struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + size_t len); + int (*wait) (struct mtd_info * mtd, int state); + int (*read_bufferram) (struct mtd_info * mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info * mtd, int area, + const unsigned char *buffer, int offset, + size_t count); + unsigned short (*read_word) (void __iomem * addr); + void (*write_word) (unsigned short value, void __iomem * addr); + void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 0000000..c8a9f3e --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,181 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h new file mode 100644 index 0000000..1d829a4 --- /dev/null +++ b/include/onenand_uboot.h @@ -0,0 +1,114 @@ +/* + * Header file for OneNAND support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_ONENAND_H +#define __UBOOT_ONENAND_H + +#ifndef __iomem +#define __iomem +#endif + +#define __mem_pci(x) (x) + +#define ONENAND_DEBUG +#undef ONENAND_DEBUG + +#define DEBUG_LEVEL 2 + +#define MTD_DEBUG_LEVEL0 0 +#define MTD_DEBUG_LEVEL1 1 +#define MTD_DEBUG_LEVEL2 2 +#define MTD_DEBUG_LEVEL3 3 + +#ifdef ONENAND_DEBUG +#define DEBUG(level, args...) \ +do { \ + if (level <= DEBUG_LEVEL) { \ + printf(args); \ + } \ +} while (0) +#else +#define DEBUG(level, args...) do { } while (0) +#endif + +enum { + EAGAIN, + EIO, + EBADMSG, + ENXIO, + EINVAL, + EPERM, + ENOMEM, +}; + +#define KERN_INFO +#define KERN_ERR +#define KERN_WARNING +#define KERN_DEBUG + +#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; }) + +#define unlikely(x) (x) + +struct mtd_info { + int size; + int oobblock; + int oobsize; + int erasesize; + + void *priv; +}; + +#define MTD_ERASE_PENDING 0x01 +#define MTD_ERASING 0x02 +#define MTD_ERASE_SUSPEND 0x04 +#define MTD_ERASE_DONE 0x08 +#define MTD_ERASE_FAILED 0x10 + +struct erase_info { + struct mtd_info *mtd; + u_int32_t addr; + u_int32_t len; + u_int32_t fail_addr; + u_char state; +}; + +struct nand_oobinfo { +}; + +struct kvec { + void *iov_base; + size_t iov_len; +}; + +typedef int spinlock_t; +typedef int wait_queue_head_t; + +#define printk(args...) printf(args) + +#define mtd_erase_callback(x) do { } while (0) + +/* Functions */ +extern int onenand_read (struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_write (struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, const u_char * buf); +extern int onenand_erase (struct mtd_info *mtd, struct erase_info *instr); + +extern int onenand_unlock (struct mtd_info *mtd, loff_t ofs, size_t len); + +extern void onenand_print_device_info (int device, int verbose); + +#endif /* __UBOOT_ONENAND_H */ diff --git a/lib_arm/board.c b/lib_arm/board.c index d37e5da..b1c89ea 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -58,6 +58,10 @@ DECLARE_GLOBAL_DATA_PTR; void nand_init (void); #endif +#if defined(CONFIG_CMD_ONENAND) +void onenand_init(void); +#endif + ulong monitor_flash_len; #ifdef CONFIG_HAS_DATAFLASH @@ -301,6 +305,10 @@ void start_armboot (void) nand_init(); /* go init the NAND */ #endif +#if defined(CONFIG_CMD_ONENAND) + onenand_init(); +#endif + #ifdef CONFIG_HAS_DATAFLASH AT91F_DataflashInit(); dataflash_print_info();

2 5

[U-Boot-Users] [PATCH 4/5] OneNAND support
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH] OneNAND support Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/drivers/onenand/onenand_bbt.c b/drivers/onenand/onenand_bbt.c new file mode 100644 index 0000000..6a0eb57 --- /dev/null +++ b/drivers/onenand/onenand_bbt.c @@ -0,0 +1,260 @@ +/* + * linux/drivers/mtd/onenand/onenand_bbt.c + * + * Bad Block Table support for the OneNAND driver + * + * Copyright(c) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * TODO: + * Split BBT core and chip specific BBT. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> + +#ifdef CONFIG_CMD_ONENAND + +#include <linux/mtd/onenand.h> +#include <malloc.h> + +/** + * check_short_pattern - [GENERIC] check if a pattern is in the buffer + * @param buf the buffer to search + * @param len the length of buffer to search + * @param paglen the pagelength + * @param td search pattern descriptor + * + * Check for a pattern at the given place. Used to search bad block + * tables and good / bad block identifiers. Same as check_pattern, but + * no optional empty check and the pattern is expected to start + * at offset 0. + */ +static int check_short_pattern(uint8_t * buf, int len, int paglen, + struct nand_bbt_descr *td) +{ + int i; + uint8_t *p = buf; + + /* Compare the pattern */ + for (i = 0; i < td->len; i++) { + if (p[i] != td->pattern[i]) + return -1; + } + return 0; +} + +/** + * create_bbt - [GENERIC] Create a bad block table by scanning the device + * @param mtd MTD device structure + * @param buf temporary buffer + * @param bd descriptor for the good/bad block search pattern + * @param chip create the table for a specific chip, -1 read all chips. + * Applies only if NAND_BBT_PERCHIP option is set + * + * Create a bad block table by scanning the device + * for the given good/bad block identify pattern + */ +static int create_bbt(struct mtd_info *mtd, uint8_t * buf, + struct nand_bbt_descr *bd, int chip) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int i, j, numblocks, len, scanlen; + int startblock; + loff_t from; + size_t readlen, ooblen; + + printk(KERN_INFO "Scanning device for bad blocks\n"); + + len = 1; + + /* We need only read few bytes from the OOB area */ + scanlen = ooblen = 0; + readlen = bd->len; + + /* chip == -1 case only */ + /* Note that numblocks is 2 * (real numblocks) here; + * see i += 2 below as it makses shifting and masking less painful + */ + numblocks = mtd->size >> (bbm->bbt_erase_shift - 1); + startblock = 0; + from = 0; + + for (i = startblock; i < numblocks;) { + int ret; + + for (j = 0; j < len; j++) { + size_t retlen; + + /* No need to read pages fully, + * just read required OOB bytes */ + ret = + onenand_read_oob(mtd, + from + j * mtd->oobblock + + bd->offs, readlen, &retlen, + &buf[0]); + + if (ret) + return ret; + + if (check_short_pattern + (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) { + bbm->bbt[i >> 3] |= 0x03 << (i & 0x6); + printk(KERN_WARNING + "Bad eraseblock %d at 0x%08x\n", i >> 1, + (unsigned int)from); + break; + } + } + i += 2; + from += (1 << bbm->bbt_erase_shift); + } + + return 0; +} + +/** + * onenand_memory_bbt - [GENERIC] create a memory based bad block table + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function creates a memory based bbt by scanning the device + * for manufacturer / software marked good / bad blocks + */ +static inline int onenand_memory_bbt(struct mtd_info *mtd, + struct nand_bbt_descr *bd) +{ + unsigned char data_buf[MAX_ONENAND_PAGESIZE]; + + bd->options &= ~NAND_BBT_SCANEMPTY; + return create_bbt(mtd, data_buf, bd, -1); +} + +/** + * onenand_isbad_bbt - [OneNAND Interface] Check if a block is bad + * @param mtd MTD device structure + * @param offs offset in the device + * @param allowbbt allow access to bad block table region + */ +static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int block; + uint8_t res; + + /* Get block number * 2 */ + block = (int)(offs >> (bbm->bbt_erase_shift - 1)); + res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03; + + DEBUG(MTD_DEBUG_LEVEL2, + "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n", + (unsigned int)offs, block >> 1, res); + + switch ((int)res) { + case 0x00: + return 0; + case 0x01: + return 1; + case 0x02: + return allowbbt ? 0 : 1; + } + + return 1; +} + +/** + * onenand_scan_bbt - [OneNAND Interface] scan, find, read and maybe create bad block table(s) + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function checks, if a bad block table(s) is/are already + * available. If not it scans the device for manufacturer + * marked good / bad blocks and writes the bad block table(s) to + * the selected place. + * + * The bad block table memory is allocated here. It must be freed + * by calling the onenand_free_bbt function. + * + */ +int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int len, ret = 0; + + len = mtd->size >> (this->erase_shift + 2); + /* Allocate memory (2bit per block) */ + bbm->bbt = malloc(len); + if (!bbm->bbt) { + printk(KERN_ERR "onenand_scan_bbt: Out of memory\n"); + return -ENOMEM; + } + /* Clear the memory bad block table */ + memset(bbm->bbt, 0x00, len); + + /* Set the bad block position */ + bbm->badblockpos = ONENAND_BADBLOCK_POS; + + /* Set erase shift */ + bbm->bbt_erase_shift = this->erase_shift; + + if (!bbm->isbad_bbt) + bbm->isbad_bbt = onenand_isbad_bbt; + + /* Scan the device to build a memory based bad block table */ + if ((ret = onenand_memory_bbt(mtd, bd))) { + printk(KERN_ERR + "onenand_scan_bbt: Can't scan flash and build the RAM-based BBT\n"); + free(bbm->bbt); + bbm->bbt = NULL; + } + + return ret; +} + +/* + * Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. + */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern, +}; + +/** + * onenand_default_bbt - [OneNAND Interface] Select a default bad block table for the device + * @param mtd MTD device structure + * + * This function selects the default bad block table + * support for the device and calls the onenand_scan_bbt function + */ +int onenand_default_bbt(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm; + + this->bbm = malloc(sizeof(struct bbm_info)); + if (!this->bbm) + return -ENOMEM; + + bbm = this->bbm; + + memset(bbm, 0, sizeof(struct bbm_info)); + + /* 1KB page has same configuration as 2KB page */ + if (!bbm->badblock_pattern) + bbm->badblock_pattern = &largepage_memorybased; + + return onenand_scan_bbt(mtd, bbm->badblock_pattern); +} + +#endif /* CFG_CMD_ONENAND */

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[U-Boot-Users] [PATCH] Allocate CPU Architecture Code for STMicroelectronics' ST200.
by Sean MCGOOGAN 10 Sep '07

10 Sep '07

Allocate CPU Architecture Code for STMicroelectronics' ST200. Signed-off-by: Sean McGoogan <Sean.McGoogan(a)st.com> --------------------------------------------------- --- u-boot-2007-09-10.git/include/image.h 2007-09-10 12:18:03.000000000 +0100 +++ work/include/image.h 2007-09-10 16:49:17.000000000 +0100 @@ -77,6 +77,7 @@ #define IH_CPU_NIOS2 15 /* Nios-II */ #define IH_CPU_BLACKFIN 16 /* Blackfin */ #define IH_CPU_AVR32 17 /* AVR32 */ +#define IH_CPU_ST200 18 /* STMicroelectronics ST200 */ /* * Image Types ------------------------------------------------------------------------ | Sean McGoogan, | E-mail: Sean.McGoogan(a)st.com | | STMicroelectronics Ltd., | | | 1000 Aztec West, | Direct: +44 (0) 1454 462601 | | Almondsbury, | Main: +44 (0) 1454 616616 | | Bristol, BS32 4SQ, U.K. | Fax: +44 (0) 1454 462305 | ------------------------------------------------------------------------

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[U-Boot-Users] Typo in tsec.c
by urwithsughosh＠gmail.com 10 Sep '07

10 Sep '07

Hello, I guess the mii_parse_lxt971_sr2 function in the tsec.c file has a typo in the switch-case. The break is put after the default case and not after the case before that. I'm not sure if this requires a patch. -- sughosh

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[U-Boot-Users] port u-boot to my custom MPC7410+GT64260 board
by lei zhang 10 Sep '07

10 Sep '07

I am so sorry for my former mess email submission. I am new to mail list . Now I am porting u-boot to my customized board with MPC7410 and GT64260.Andits memory map is as follows: SCS0 00000000-0x1fffffff PCI_0 I/O PCI_0 M0 PCI_0 M1 PCI_0 M2 PCI_0 M3 PCI_1 I/O PCI_

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Re: [U-Boot-Users] Intel Flash CFI initialisation failure
by Scott Mann 10 Sep '07

10 Sep '07

I just ran into this problem also and posted to the list (but got no responses). After a couple days of sorting through the cfi_flash.c, I noticed that the CFG_FLASH_BANKS_LIST seemed to be the pertinent #define. You need to set this to an address that is beyond the region of flash in which you have stored your u-boot and environment variables. Otherwise, the first thing that the CFI code does is erase it! Take the following example: #define CFG_FLASH_PROTECTION 1 /* Real (hardware) sectors protection */ #define CFG_FLASH_BASE 0xFE000000 #define CFG_FLASH_CFI #define CFG_FLASH_CFI_DRIVER #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CFG_MAX_FLASH_SECT 32 /* max num of sects on one chip */ #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CFG_ENV_IS_IN_FLASH #ifdef CFG_ENV_IS_IN_FLASH #define CFG_ENV_SECT_SIZE (64 * 1024) /* Reserve 64 kB for env */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_PROTECTED_SIZE (CFG_MONITOR_LEN + CFG_ENV_SECT_SIZE) #define CFG_FLASH_BANKS_LIST { (CFG_FLASH_BASE + CFG_PROTECTED_SIZE) } #endif /* CFG_ENV_IS_IN_FLASH */ What I've done is added CFG_PROTECTED_SIZE as just an intermediate parameter (it will probably go away). It represents the space reserved for U-Boot (256K) + the space reserved for ENV (64K). Just use this as an offset to the CFG_FLASH_BASE and assign that to CFG_FLASH_BANKS_LIST (and it is only that element since you only have one flash bank). I'm not sure whether you want CFG_FLASH_PROTECTION or not in your environment (I'm pretty sure it doesn't have an effect on the problem you've encountered). Hope this helps. If anyone sees a flaw in this approach, please let me know! Scott ----- Original Message ---- From: Miroslaw Dach <miroslaw.dach(a)psi.ch> To: u-boot-users(a)lists.sourceforge.net Sent: Friday, September 7, 2007 8:43:38 AM Subject: [U-Boot-Users] Intel Flash CFI initialisation failure Dear All, I am having the problem with Intel Flash TE28F640 J3C120 on my avnet evaluation board (xilinx based with Virtex-4). I have compiled successfully u-boot-1.2.0 and it run well without FLASH support. Eventually I want to store u-boot in Flash but when I compile u-boot with Flash support the u-boot fails during Flash initialization. My Flash memory is: type: TE28F640 J3C120 (http://www.datasheets.org.uk/datasheet.php?article=3266188) vendor: Intel spec: NOR FLASH 64 Blocks 64 Mbits x8/x16 To support Flash memory I have configured u-boot with the following settings: #define CFG_FLASH_BASE 0xFF800000 #define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 64 #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 The u-boot was compiled successfully but when I booted it I have got the error messages when it came to the Flash initialization: U-Boot 1.2.0 (Sep 6 2007 - 17:56:34) ### No HW ID - assuming ML403 DRAM: 32 MB Top of RAM usable for U-Boot at: 02000000 Reserving 138k for U-Boot at: 01fdd000 Reserving 129k for malloc() at: 01fbcc00 Reserving 120 Bytes for Board Info at: 01fbcb88 Reserving 48 Bytes for Global Data at: 01fbcb58 Stack Pointer at: 01fbcb38 New Stack Pointer is: 01fbcb38 Now running in RAM - U-Boot at: 01fdd000 FLASH: flash detect cfi fwc addr ff800000 cmd 0 0 8bit x 8 bit fwc addr ff800055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr ff800010 is= 0 51 fwc addr ff800555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr ff800010 is= 0 51 fwc addr ff800000 cmd 0 0000 16bit x 8 bit fwc addr ff8000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff800020 is= 0051 5151 fwc addr ff800aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff800020 is= 0051 5151 fwc addr ff800000 cmd 0 0000 16bit x 16 bit fwc addr ff8000aa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff800020 is= 0051 0051 is= cmd 52(R) addr ff800022 is= 0052 0052 is= cmd 59(Y) addr ff800024 is= 0059 0059 ushort addr is at ff800050 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x2 addr[2] = 0x0 addr[3] = 0x0 retval = 0x2 device interface is 2 found port 2 chip 2 port 16 bits chip 16 bits ushort addr is at ff800026 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x1 addr[2] = 0x0 addr[3] = 0x0 retval = 0x1 fwc addr ff800000 cmd ff 00ff 16bit x 16 bit fwc addr ff800000 cmd 90 0090 16bit x 16 bit fwc addr ff800000 cmd ff 00ff 16bit x 16 bit fwc addr ff8000aa cmd 98 0098 16bit x 16 bit ushort addr is at ff80002a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x31 addr[2] = 0x0 addr[3] = 0x0 retval = 0x31 ff800020 : 00 51 00 52 00 59 00 01 00 00 00 31 00 00 00 00 .Q.R.Y.....1.... ff800030 : 00 00 00 00 00 00 00 27 00 36 00 00 00 00 00 08 .......'.6...... ff800040 : 00 08 00 0b 00 00 00 02 00 02 00 03 00 00 00 17 ................ ff800050 : 00 02 00 00 00 05 00 00 00 01 00 3f 00 00 00 00 ...........?.... ff800060 : 00 02 00 50 00 52 00 49 00 31 00 31 00 ce 00 00 ...P.R.I.1.1.... ff800070 : 00 00 00 00 00 01 00 01 00 00 00 33 00 00 00 01 ...........3.... ff800080 : 00 80 00 00 00 03 00 03 00 03 00 00 00 00 00 00 ................ ff800090 : ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ manufacturer is 1 manufacturer id is 0x89 device id is 0x17 device id2 is 0x0 cfi version is 0x3131 size_ratio 1 port 16 bits chip 16 bits found 1 erase regions long addr is at ff80005a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x3f addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x0 addr[6] = 0x0 addr[7] = 0x2 erase_region_count = 64 erase_region_size = 131072 Bus Fault @ 0x01fe4424, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 01fbc978 Data parity signal NIP: 01FE4424 XER: 20000000 LR: 01FE43D8 REGS: 01fbc978 TRAP: 0200 DAR: 00000000MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 00000000 01FBCA68 C01FC950 01FFF8D0 00000001 01FBCA70 00000001 00000006 GPR08: 00000000 FFC00004 01FBCA73 00000003 01FBC860 30000000 02001600 00000000 GPR16: 00020000 00000001 0000002D 00000000 00000020 00000040 0000002D FFC20000 GPR24: 01FFF950 00000001 00000020 00000004 01FFF8D0 01FBCB58 02001A94 FFC00000 Call backtrace: machine check NIP: FFFFFFFC XER: 00000000 LR: 01FED864 REGS: 01fbc868 TRAP: 0700 DAR: 00000001MSR: 00000000 EE: 0 PR: 0 FP: 0 ME: 0 IR/DR: 00 Does anybody have an idea what could be wrong? Best Regards Mirek ============================================================================= Miroslaw Dach (Miroslaw.Dach(a)psi.ch) - SLS/Controls Group PSI - Paul Scherrer Institut CH-5232 Villigen ============================================================================= ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

2 1

[U-Boot-Users] [PATCH 3/3] OneNAND support (take #2)
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH 3/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/Makefile b/Makefile index 0371d46..8926904 100644 --- a/Makefile +++ b/Makefile @@ -211,6 +211,7 @@ LIBS += drivers/libdrivers.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/nand/libnand.a LIBS += drivers/nand_legacy/libnand_legacy.a +LIBS += drivers/onenand/libonenand.a LIBS += drivers/net/libnet.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a diff --git a/common/Makefile b/common/Makefile index ef7d097..fde5ad9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -37,13 +37,14 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_onenand.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \ cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \ environment.o env_common.o \ env_nand.o env_dataflash.o env_flash.o env_eeprom.o \ - env_nvram.o env_nowhere.o \ + env_onenand.o env_nvram.o env_nowhere.o \ exports.o \ fdt_support.o flash.o fpga.o ft_build.o \ hush.o kgdb.o lcd.o lists.o lynxkdi.o \ diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 1db0fc3..6770408 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -57,8 +57,9 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CFG_ENV_IS_IN_FLASH) && \ !defined(CFG_ENV_IS_IN_DATAFLASH) && \ !defined(CFG_ENV_IS_IN_NAND) && \ + !defined(CFG_ENV_IS_IN_ONENAND) && \ !defined(CFG_ENV_IS_NOWHERE) -# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|NOWHERE} +# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE} #endif #define XMK_STR(x) #x @@ -553,7 +554,8 @@ int getenv_r (char *name, char *buf, unsigned len) #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { extern char * env_name_spec; @@ -608,7 +610,8 @@ U_BOOT_CMD( #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) U_BOOT_CMD( saveenv, 1, 0, do_saveenv, "saveenv - save environment variables to persistent storage\n", diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c new file mode 100644 index 0000000..dcda099 --- /dev/null +++ b/common/cmd_onenand.c @@ -0,0 +1,155 @@ +/* + * U-Boot command for OneNAND support + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> +#include <command.h> + +#ifdef CONFIG_CMD_ONENAND + +#include <linux/mtd/compat.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/onenand.h> + +#include <asm/io.h> + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + int ret = 0; + + switch (argc) { + case 0: + case 1: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (strncmp(argv[1], "open", 4) == 0) { + onenand_init(); + return 0; + } + onenand_print_device_info(onenand_chip.device_id, 1); + return 0; + + default: + /* At least 4 args */ + if (strncmp(argv[1], "erase", 5) == 0) { + struct erase_info instr; + ulong start, end; + ulong block; + + start = simple_strtoul(argv[2], NULL, 10); + end = simple_strtoul(argv[3], NULL, 10); + start -= (unsigned long)onenand_chip.base; + end -= (unsigned long)onenand_chip.base; + + if (!end || end < 0) + end = start; + + printf("Erase block from %d to %d\n", start, end); + + for (block = start; block <= end; block++) { + instr.addr = block << onenand_chip.erase_shift; + instr.len = 1 << onenand_chip.erase_shift; + ret = onenand_erase(&onenand_mtd, &instr); + if (ret) { + printf("erase failed %d\n", block); + break; + } + } + + return 0; + } + + if (strncmp(argv[1], "read", 4) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + int oob = strncmp(argv[1], "read.oob", 8) ? 0 : 1; + + ofs -= (unsigned long)onenand_chip.base; + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "write", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + + ofs -= (unsigned long)onenand_chip.base; + + onenand_write(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "block", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong block = simple_strtoul(argv[3], NULL, 10); + ulong page = simple_strtoul(argv[4], NULL, 10); + size_t len = simple_strtol(argv[5], NULL, 10); + size_t retlen = 0; + ulong ofs; + int oob = strncmp(argv[1], "block.oob", 9) ? 0 : 1; + + ofs = block << onenand_chip.erase_shift; + if (page) + ofs += page << onenand_chip.page_shift; + + if (!len) { + if (oob) + len = 64; + else + len = 512; + } + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + return 0; + } + + break; + } + + return 0; +} + +U_BOOT_CMD( + onenand, 6, 1, do_onenand, + "onenand - OneNAND sub-system\n", + "info - show available OneNAND devices\n" + "onenand read[.oob] addr ofs len - read data at ofs with len to addr\n" + "onenand write addr ofs len - write data at ofs with len from addr\n" + "onenand erase saddr eaddr - erase block start addr to end addr\n" + "onenand block[.oob] addr block [page] [len] - " + "read data with (block [, page]) to addr" +); + +#endif /* CONFIG_CMD_ONENAND */ diff --git a/common/env_onenand.c b/common/env_onenand.c new file mode 100644 index 0000000..66107f9 --- /dev/null +++ b/common/env_onenand.c @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CFG_ENV_IS_IN_ONENAND) /* Environment is in OneNAND */ + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <malloc.h> + +#include <linux/mtd/compat.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/onenand.h> + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +/* References to names in env_common.c */ +extern uchar default_environment[]; + +#define ONENAND_ENV_SIZE(mtd) (mtd.oobblock - ENV_HEADER_SIZE) + +char *env_name_spec = "OneNAND"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *) (&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +static unsigned char onenand_env[MAX_ONENAND_PAGESIZE]; +env_t *env_ptr = (env_t *) onenand_env; +#endif /* ENV_IS_EMBEDDED */ + +uchar env_get_char_spec(int index) +{ + DECLARE_GLOBAL_DATA_PTR; + + return (*((uchar *) (gd->env_addr + index))); +} + +void env_relocate_spec(void) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned long env_addr; + int use_default = 0; + int retlen; + + env_addr = CFG_ENV_ADDR; + env_addr -= (unsigned long)onenand_chip.base; + + /* Check OneNAND exist */ + if (onenand_mtd.oobblock) + /* Ignore read fail */ + onenand_read(&onenand_mtd, env_addr, onenand_mtd.oobblock, + &retlen, (u_char *) env_ptr); + else + onenand_mtd.oobblock = MAX_ONENAND_PAGESIZE; + + if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) != + env_ptr->crc) + use_default = 1; + + if (use_default) { + memcpy(env_ptr->data, default_environment, + ONENAND_ENV_SIZE(onenand_mtd)); + env_ptr->crc = + crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)); + } + + gd->env_addr = (ulong) & env_ptr->data; + gd->env_valid = 1; +} + +int saveenv(void) +{ + unsigned long env_addr = CFG_ENV_ADDR; + struct erase_info instr; + int retlen; + + instr.len = CFG_ENV_SIZE; + instr.addr = env_addr; + instr.addr -= (unsigned long)onenand_chip.base; + if (onenand_erase(&onenand_mtd, &instr)) { + printf("OneNAND: erase failed at 0x%08x\n", env_addr); + return 1; + } + + /* update crc */ + env_ptr->crc = + crc32(0, env_ptr->data, onenand_mtd.oobblock - ENV_HEADER_SIZE); + + env_addr -= (unsigned long)onenand_chip.base; + if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.oobblock, &retlen, + (u_char *) env_ptr)) { + printf("OneNAND: write failed at 0x%08x\n", instr.addr); + return 2; + } + + return 0; +} + +int env_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* use default */ + gd->env_addr = (ulong) & default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#endif /* CFG_ENV_IS_IN_ONENAND */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3d91e99..f8eca87 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -59,6 +59,7 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ #define CONFIG_CMD_PING /* ping support */ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 0000000..f194cf1 --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,127 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * Copyright (c) 2000-2005 + * Thomas Gleixner <tglx(a)linuxtronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#ifndef NAND_MAX_CHIPS +#define NAND_MAX_CHIPS 8 +#endif + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt (struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 0000000..4b0c2df --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,143 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include <linux/mtd/onenand_regs.h> + +/* Note: The header order is impoertant */ +#include <onenand_uboot.h> + +#include <linux/mtd/bbm.h> + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan (struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release (struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + size_t len); + int (*wait) (struct mtd_info * mtd, int state); + int (*read_bufferram) (struct mtd_info * mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info * mtd, int area, + const unsigned char *buffer, int offset, + size_t count); + unsigned short (*read_word) (void __iomem * addr); + void (*write_word) (unsigned short value, void __iomem * addr); + void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 0000000..c8a9f3e --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,181 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h new file mode 100644 index 0000000..bd1831e --- /dev/null +++ b/include/onenand_uboot.h @@ -0,0 +1,39 @@ +/* + * Header file for OneNAND support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_ONENAND_H +#define __UBOOT_ONENAND_H + +struct kvec { + void *iov_base; + size_t iov_len; +}; + +typedef int spinlock_t; +typedef int wait_queue_head_t; + +/* Functions */ +extern void onenand_init(void); +extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, const u_char * buf); +extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); + +extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); + +extern void onenand_print_device_info(int device, int verbose); + +#endif /* __UBOOT_ONENAND_H */ diff --git a/lib_arm/board.c b/lib_arm/board.c index d28afc5..634e4d9 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -58,6 +58,10 @@ DECLARE_GLOBAL_DATA_PTR; void nand_init (void); #endif +#if defined(CONFIG_CMD_ONENAND) +void onenand_init(void); +#endif + ulong monitor_flash_len; #ifdef CONFIG_HAS_DATAFLASH @@ -301,6 +305,10 @@ void start_armboot (void) nand_init(); /* go init the NAND */ #endif +#if defined(CONFIG_CMD_ONENAND) + onenand_init(); +#endif + #ifdef CONFIG_HAS_DATAFLASH AT91F_DataflashInit(); dataflash_print_info();

1 0

[U-Boot-Users] [PATCH 2/3] OneNAND support (take #2)
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH 2/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/drivers/onenand/Makefile b/drivers/onenand/Makefile new file mode 100644 index 0000000..5d7a471 --- /dev/null +++ b/drivers/onenand/Makefile @@ -0,0 +1,44 @@ +# +# Copyright (C) 2005-2007 Samsung Electronics. +# Kyungmin Park <kyungmin.park(a)samsung.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libonenand.a + +COBJS := onenand_base.o onenand_bbt.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/drivers/onenand/onenand_bbt.c b/drivers/onenand/onenand_bbt.c new file mode 100644 index 0000000..5a610ee --- /dev/null +++ b/drivers/onenand/onenand_bbt.c @@ -0,0 +1,265 @@ +/* + * linux/drivers/mtd/onenand/onenand_bbt.c + * + * Bad Block Table support for the OneNAND driver + * + * Copyright(c) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * TODO: + * Split BBT core and chip specific BBT. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> + +#ifdef CONFIG_CMD_ONENAND + +#include <linux/mtd/compat.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/onenand.h> +#include <malloc.h> + +#include <asm/errno.h> + +/** + * check_short_pattern - [GENERIC] check if a pattern is in the buffer + * @param buf the buffer to search + * @param len the length of buffer to search + * @param paglen the pagelength + * @param td search pattern descriptor + * + * Check for a pattern at the given place. Used to search bad block + * tables and good / bad block identifiers. Same as check_pattern, but + * no optional empty check and the pattern is expected to start + * at offset 0. + */ +static int check_short_pattern(uint8_t * buf, int len, int paglen, + struct nand_bbt_descr *td) +{ + int i; + uint8_t *p = buf; + + /* Compare the pattern */ + for (i = 0; i < td->len; i++) { + if (p[i] != td->pattern[i]) + return -1; + } + return 0; +} + +/** + * create_bbt - [GENERIC] Create a bad block table by scanning the device + * @param mtd MTD device structure + * @param buf temporary buffer + * @param bd descriptor for the good/bad block search pattern + * @param chip create the table for a specific chip, -1 read all chips. + * Applies only if NAND_BBT_PERCHIP option is set + * + * Create a bad block table by scanning the device + * for the given good/bad block identify pattern + */ +static int create_bbt(struct mtd_info *mtd, uint8_t * buf, + struct nand_bbt_descr *bd, int chip) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int i, j, numblocks, len, scanlen; + int startblock; + loff_t from; + size_t readlen, ooblen; + + printk(KERN_INFO "Scanning device for bad blocks\n"); + + len = 1; + + /* We need only read few bytes from the OOB area */ + scanlen = ooblen = 0; + readlen = bd->len; + + /* chip == -1 case only */ + /* Note that numblocks is 2 * (real numblocks) here; + * see i += 2 below as it makses shifting and masking less painful + */ + numblocks = mtd->size >> (bbm->bbt_erase_shift - 1); + startblock = 0; + from = 0; + + for (i = startblock; i < numblocks;) { + int ret; + + for (j = 0; j < len; j++) { + size_t retlen; + + /* No need to read pages fully, + * just read required OOB bytes */ + ret = onenand_read_oob(mtd, + from + j * mtd->oobblock + + bd->offs, readlen, &retlen, + &buf[0]); + + if (ret && ret != -EAGAIN) { + printk("ret = %d\n", ret); + return ret; + } + + if (check_short_pattern + (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) { + bbm->bbt[i >> 3] |= 0x03 << (i & 0x6); + printk(KERN_WARNING + "Bad eraseblock %d at 0x%08x\n", i >> 1, + (unsigned int)from); + break; + } + } + i += 2; + from += (1 << bbm->bbt_erase_shift); + } + + return 0; +} + +/** + * onenand_memory_bbt - [GENERIC] create a memory based bad block table + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function creates a memory based bbt by scanning the device + * for manufacturer / software marked good / bad blocks + */ +static inline int onenand_memory_bbt(struct mtd_info *mtd, + struct nand_bbt_descr *bd) +{ + unsigned char data_buf[MAX_ONENAND_PAGESIZE]; + + bd->options &= ~NAND_BBT_SCANEMPTY; + return create_bbt(mtd, data_buf, bd, -1); +} + +/** + * onenand_isbad_bbt - [OneNAND Interface] Check if a block is bad + * @param mtd MTD device structure + * @param offs offset in the device + * @param allowbbt allow access to bad block table region + */ +static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int block; + uint8_t res; + + /* Get block number * 2 */ + block = (int)(offs >> (bbm->bbt_erase_shift - 1)); + res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03; + + DEBUG(MTD_DEBUG_LEVEL2, + "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n", + (unsigned int)offs, block >> 1, res); + + switch ((int)res) { + case 0x00: + return 0; + case 0x01: + return 1; + case 0x02: + return allowbbt ? 0 : 1; + } + + return 1; +} + +/** + * onenand_scan_bbt - [OneNAND Interface] scan, find, read and maybe create bad block table(s) + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function checks, if a bad block table(s) is/are already + * available. If not it scans the device for manufacturer + * marked good / bad blocks and writes the bad block table(s) to + * the selected place. + * + * The bad block table memory is allocated here. It must be freed + * by calling the onenand_free_bbt function. + * + */ +int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int len, ret = 0; + + len = mtd->size >> (this->erase_shift + 2); + /* Allocate memory (2bit per block) */ + bbm->bbt = malloc(len); + if (!bbm->bbt) { + printk(KERN_ERR "onenand_scan_bbt: Out of memory\n"); + return -ENOMEM; + } + /* Clear the memory bad block table */ + memset(bbm->bbt, 0x00, len); + + /* Set the bad block position */ + bbm->badblockpos = ONENAND_BADBLOCK_POS; + + /* Set erase shift */ + bbm->bbt_erase_shift = this->erase_shift; + + if (!bbm->isbad_bbt) + bbm->isbad_bbt = onenand_isbad_bbt; + + /* Scan the device to build a memory based bad block table */ + if ((ret = onenand_memory_bbt(mtd, bd))) { + printk(KERN_ERR + "onenand_scan_bbt: Can't scan flash and build the RAM-based BBT\n"); + free(bbm->bbt); + bbm->bbt = NULL; + } + + return ret; +} + +/* + * Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. + */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern, +}; + +/** + * onenand_default_bbt - [OneNAND Interface] Select a default bad block table for the device + * @param mtd MTD device structure + * + * This function selects the default bad block table + * support for the device and calls the onenand_scan_bbt function + */ +int onenand_default_bbt(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm; + + this->bbm = malloc(sizeof(struct bbm_info)); + if (!this->bbm) + return -ENOMEM; + + bbm = this->bbm; + + memset(bbm, 0, sizeof(struct bbm_info)); + + /* 1KB page has same configuration as 2KB page */ + if (!bbm->badblock_pattern) + bbm->badblock_pattern = &largepage_memorybased; + + return onenand_scan_bbt(mtd, bbm->badblock_pattern); +} + +#endif /* CFG_CMD_ONENAND */

1 0

[U-Boot-Users] [PATCH] Remove compiler warning: target CPU does not support interworking
by Kyungmin Park 10 Sep '07

10 Sep '07

Remove compiler warning: target CPU does not support interworking Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/cpu/arm1136/config.mk b/cpu/arm1136/config.mk index e39e774..6ab0dd3 100644 --- a/cpu/arm1136/config.mk +++ b/cpu/arm1136/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv5 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))

2 1

[U-Boot-Users] [PATCH 1/5] OneNAND support
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH] OneNAND support This patch enables the OneNAND at U-boot Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/Makefile b/Makefile index 0477cd3..d42f2ef 100644 --- a/Makefile +++ b/Makefile @@ -211,6 +211,7 @@ LIBS += drivers/libdrivers.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/nand/libnand.a LIBS += drivers/nand_legacy/libnand_legacy.a +LIBS += drivers/onenand/libonenand.a LIBS += drivers/net/libnet.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a diff --git a/common/Makefile b/common/Makefile index ef7d097..fde5ad9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -37,13 +37,14 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_onenand.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \ cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \ environment.o env_common.o \ env_nand.o env_dataflash.o env_flash.o env_eeprom.o \ - env_nvram.o env_nowhere.o \ + env_onenand.o env_nvram.o env_nowhere.o \ exports.o \ fdt_support.o flash.o fpga.o ft_build.o \ hush.o kgdb.o lcd.o lists.o lynxkdi.o \ diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 1db0fc3..6770408 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -57,8 +57,9 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CFG_ENV_IS_IN_FLASH) && \ !defined(CFG_ENV_IS_IN_DATAFLASH) && \ !defined(CFG_ENV_IS_IN_NAND) && \ + !defined(CFG_ENV_IS_IN_ONENAND) && \ !defined(CFG_ENV_IS_NOWHERE) -# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|NOWHERE} +# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE} #endif #define XMK_STR(x) #x @@ -553,7 +554,8 @@ int getenv_r (char *name, char *buf, unsigned len) #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { extern char * env_name_spec; @@ -608,7 +610,8 @@ U_BOOT_CMD( #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) U_BOOT_CMD( saveenv, 1, 0, do_saveenv, "saveenv - save environment variables to persistent storage\n", diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c new file mode 100644 index 0000000..257a614 --- /dev/null +++ b/common/cmd_onenand.c @@ -0,0 +1,201 @@ +/* + * U-Boot command for OneNAND support + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> +#include <command.h> + +#if (CONFIG_COMMANDS & CFG_CMD_ONENAND) + +#include <linux/mtd/onenand.h> + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +int do_onenand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + int ret = 0; + + switch (argc) { + case 0: + case 1: + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (strncmp (argv[1], "open", 4) == 0) { + onenand_init (); + return 0; + } + onenand_print_device_info (onenand_chip.device_id, 1); + return 0; + + default: + /* At least 4 args */ + if (strncmp (argv[1], "erase", 5) == 0) { + struct erase_info instr; + ulong start, end; + char *endtail; + ulong block; + + if (strncmp (argv[2], "block", 5) == 0) { + start = simple_strtoul (argv[3], NULL, 10); + endtail = strchr (argv[3], '-'); + end = simple_strtoul (endtail + 1, NULL, 10); + } else { + start = simple_strtoul (argv[2], NULL, 10); + end = simple_strtoul (argv[3], NULL, 10); + start -= (unsigned long)onenand_chip.base; + end -= (unsigned long)onenand_chip.base; + } + + if (!end || end < 0) + end = start; + + printf ("Erase block from %d to %d\n", start, end); + + for (block = start; block <= end; block++) { + instr.addr = block << onenand_chip.erase_shift; + instr.len = 1 << onenand_chip.erase_shift; + ret = onenand_erase (&onenand_mtd, &instr); + if (ret) { + printf ("erase failed %d\n", block); + break; + } + } + + return 0; + } + + if (strncmp (argv[1], "read", 4) == 0) { + ulong addr = simple_strtoul (argv[2], NULL, 16); + ulong ofs = simple_strtoul (argv[3], NULL, 16); + size_t len = simple_strtoul (argv[4], NULL, 16); + size_t retlen = 0; + int oob = strncmp (argv[1], "read.oob", 8) ? 0 : 1; + + ofs -= (unsigned long)onenand_chip.base; + + if (oob) + onenand_read_oob (&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read (&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf ("Done\n"); + + return 0; + } + + if (strncmp (argv[1], "write", 5) == 0) { + ulong addr = simple_strtoul (argv[2], NULL, 16); + ulong ofs = simple_strtoul (argv[3], NULL, 16); + size_t len = simple_strtoul (argv[4], NULL, 16); + size_t retlen = 0; + + ofs -= (unsigned long)onenand_chip.base; + + onenand_write (&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf ("Done\n"); + + return 0; + } + + if (strncmp (argv[1], "block", 5) == 0) { + ulong addr = simple_strtoul (argv[2], NULL, 16); + ulong block = simple_strtoul (argv[3], NULL, 10); + ulong page = simple_strtoul (argv[4], NULL, 10); + size_t len = simple_strtol (argv[5], NULL, 10); + size_t retlen = 0; + ulong ofs; + int oob = strncmp (argv[1], "block.oob", 9) ? 0 : 1; + + ofs = block << onenand_chip.erase_shift; + if (page) + ofs += page << onenand_chip.page_shift; + + if (!len) { + if (oob) + len = 64; + else + len = 512; + } + + if (oob) + onenand_read_oob (&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read (&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + return 0; + } + + if (strncmp (argv[1], "unlock", 6) == 0) { + ulong start = simple_strtoul (argv[2], NULL, 10); + ulong ofs = simple_strtoul (argv[3], NULL, 10); + + if (!ofs) + ofs = (1 << onenand_chip.erase_shift); + + start = start << onenand_chip.erase_shift; +#if 0 + printk ("start = 0x%08x, ofs = 0x%08x\n", start, ofs); +#endif + onenand_unlock (&onenand_mtd, start, start + ofs); + + return 0; + } + + if (strncmp (argv[1], "save", 4) == 0 && + strncmp (argv[2], "bootloader", 10) == 0) { + ulong addr = simple_strtoul (argv[3], NULL, 16); + struct erase_info instr; + int ofs = 0; + int len = 0x20000; + int retlen; + + printf ("save bootloader...\n"); + + if (!addr) + break; + + onenand_unlock (&onenand_mtd, ofs, len); + + instr.addr = 0 << onenand_chip.erase_shift; + instr.len = 1 << onenand_chip.erase_shift; + onenand_erase (&onenand_mtd, &instr); + + onenand_write (&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + onenand_unlock (&onenand_mtd, CFG_ENV_ADDR, + onenand_mtd.size - CFG_ENV_ADDR); + return 0; + } + + break; + } + + return 0; +} + +U_BOOT_CMD (onenand, 6, 1, do_onenand, + "onenand - OneNAND sub-system\n", + "info - show available OneNAND devices\n" + "onenand read[.oob] addr ofs len - read data at ofs with len to addr\n" + "onenand write addr ofs len - write data at ofs with len from addr\n" + "onenand erase block start-end - erase block from start to end\n" + "onenand erase saddr eaddr - erase block start addr to end addr\n" + "onenand block[.oob] addr block [page] [len] - " + "read data with (block [, page]) to addr\n" + "onenand unlock start-end - unlock block from start to end\n" + "onenand save bootloader addr - save bootloader at addr\n"); + +#endif /* (CONFIG_COMMANDS & CFG_CMD_ONENAND) */ diff --git a/common/env_onenand.c b/common/env_onenand.c new file mode 100644 index 0000000..2597d1e --- /dev/null +++ b/common/env_onenand.c @@ -0,0 +1,133 @@ +/* + * (C) Copyright 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CFG_ENV_IS_IN_ONENAND) /* Environment is in OneNAND */ + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <malloc.h> + +#include <linux/mtd/onenand.h> + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +/* References to names in env_common.c */ +extern uchar default_environment[]; + +#define ONENAND_ENV_SIZE(mtd) (mtd.oobblock - ENV_HEADER_SIZE) + +char *env_name_spec = "OneNAND"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *) (&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +static unsigned char onenand_env[MAX_ONENAND_PAGESIZE]; +env_t *env_ptr = (env_t *) onenand_env; +#endif /* ENV_IS_EMBEDDED */ + +uchar env_get_char_spec (int index) +{ + DECLARE_GLOBAL_DATA_PTR; + + return (*((uchar *) (gd->env_addr + index))); +} + +void env_relocate_spec (void) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned long env_addr; + int use_default = 0; + int retlen; + + env_addr = CFG_ENV_ADDR; + env_addr -= (unsigned long)onenand_chip.base; + + /* Check OneNAND exist */ + if (onenand_mtd.oobblock) + /* Ignore read fail */ + onenand_read (&onenand_mtd, env_addr, onenand_mtd.oobblock, + &retlen, (u_char *) env_ptr); + else + onenand_mtd.oobblock = MAX_ONENAND_PAGESIZE; + + if (crc32 (0, env_ptr->data, ONENAND_ENV_SIZE (onenand_mtd)) != + env_ptr->crc) + use_default = 1; + + if (use_default) { + memcpy (env_ptr->data, default_environment, + ONENAND_ENV_SIZE (onenand_mtd)); + env_ptr->crc = + crc32 (0, env_ptr->data, ONENAND_ENV_SIZE (onenand_mtd)); + } + + gd->env_addr = (ulong) & env_ptr->data; + gd->env_valid = 1; +} + +int saveenv (void) +{ + unsigned long env_addr = CFG_ENV_ADDR; + struct erase_info instr; + int retlen; + + instr.len = CFG_ENV_SIZE; + instr.addr = env_addr; + instr.addr -= (unsigned long)onenand_chip.base; + if (onenand_erase (&onenand_mtd, &instr)) { + printf ("OneNAND: erase failed at 0x%08x\n", env_addr); + return 1; + } + + /* update crc */ + env_ptr->crc = + crc32 (0, env_ptr->data, onenand_mtd.oobblock - ENV_HEADER_SIZE); + + env_addr -= (unsigned long)onenand_chip.base; + if (onenand_write + (&onenand_mtd, env_addr, onenand_mtd.oobblock, &retlen, + (u_char *) env_ptr)) { + printf ("OneNAND: write failed at 0x%08x\n", instr.addr); + return 2; + } + + return 0; +} + +int env_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* use default */ + gd->env_addr = (ulong) & default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#endif /* CFG_ENV_IS_IN_ONENAND */

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[U-Boot-Users] [PATCH] memcpy32 support at ARM
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH] memcpy32 support at ARM It is used at OneNAND driver Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/lib_arm/Makefile b/lib_arm/Makefile index 037c475..e1258f4 100644 --- a/lib_arm/Makefile +++ b/lib_arm/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).a -SOBJS = _ashldi3.o _ashrdi3.o _divsi3.o _modsi3.o _udivsi3.o _umodsi3.o +SOBJS = _ashldi3.o _ashrdi3.o _divsi3.o _modsi3.o _udivsi3.o _umodsi3.o _memcpy32.o COBJS = armlinux.o board.o \ cache.o div0.o diff --git a/lib_arm/_memcpy32.S b/lib_arm/_memcpy32.S new file mode 100644 index 0000000..d1ba36f --- /dev/null +++ b/lib_arm/_memcpy32.S @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This file is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + */ + .text + + .global memcpy32 + .align 0 +memcpy32: + mov ip, sp + stmfd sp!, {r0, r4 - r9, fp, ip, lr, pc} + sub fp, ip, #4 +1: + ldmia r1!, {r3 - r9, ip} + subges r2, r2, #32 + stmgeia r0!, {r3 - r9, ip} + bge 1b +2: + ldmea fp, {r0, r4 - r9, fp, sp, pc}

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[U-Boot-Users] [PATCH 2/5] OneNAND support
by Kyungmin Park 10 Sep '07

10 Sep '07

[PATCH 2/5] OneNAND support Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/drivers/onenand/Makefile b/drivers/onenand/Makefile new file mode 100644 index 0000000..246ebc7 --- /dev/null +++ b/drivers/onenand/Makefile @@ -0,0 +1,42 @@ +# +# Copyright (C) 2005-2007 Samsung Electronics. +# Kyungmin Park <kyungmin.park(a)samsung.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = libonenand.a + +OBJS = onenand_base.o onenand_bbt.o + +all: $(LIB) + +$(LIB): $(OBJS) + $(AR) crv $@ $(OBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ + +sinclude .depend + +#########################################################################

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[U-Boot-Users] SDRAM on ixp425
by Jonathan Pratt 10 Sep '07

10 Sep '07

Hi all. This isn't really a question about uboot, more about the ixp425 We have an ixp425 product with a footprint for 2 SDRAM components. When we use 2 x IS42S16800 (8M x 16 x 4 banks) for a total of 32MByte everything works fine. But replacing these components with 2 x IS42S16400 (4M x 16 x 4 banks) for a total of 16MByte the board won't boot. In both cases the PHYS_SDRAM_1_SIZE is set to 0x01000000 (16MByte) since the intent was always to use the smaller SDRAM configuration. The SDRAM settings for the 32MB version are: #define CFG_SDR_CONFIG 0x18 #define CFG_SDR_MODE_CONFIG 0x01 #define CFG_SDRAM_REFRESH_CNT 0x400 And for the 16MB version: #define CFG_SDR_CONFIG 0x3A #define CFG_SDR_MODE_CONFIG 0x01 #define CFG_SDRAM_REFRESH_CNT 0x400 [ie the only change between the two configurations is the SDR_CONFIG value] In particular the 64M enable (in SDR_CONFIG) is set for the 64MBit parts and the mem config field is set to %010 which is what the data sheet prescribes for two 4M x 16 parts. The first version works fine (using 8Mx16x4 parts). The second version fails to boot with the appropriate components (-7 {143MHz} speed grade). Has anyone used 64Mbit components with the ixp425 or similar? Can anyone comment on why the second configuration would fail? Thanks Jonathan Pratt ELPRO Technologies Pty Ltd

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[U-Boot-Users] [PATCH] Bugfix: make bootm+libfdt compile on boards with no flash
by Grant Likely 09 Sep '07

09 Sep '07

Signed-off-by: Grant Likely <grant.likely(a)secretlab.ca> --- Wolfgang, this is a bugfix that needs to go in for 1.3.0. I'll also push it to the mpc5xxx tree. Cheers, g. common/cmd_bootm.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 9f5e0b4..6ebedfb 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -834,9 +834,11 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, of_flat_tree += 4 - tail; } +#ifndef CFG_NO_FLASH /* move the blob if it is in flash (set of_data to !null) */ if (addr2info ((ulong)of_flat_tree) != NULL) of_data = (ulong)of_flat_tree; +#endif #if defined(CONFIG_OF_FLAT_TREE)

2 1

[U-Boot-Users] tehrans
by ferhan kowal 08 Sep '07

08 Sep '07

Hi bro ferhan damn, i was so small but now muccch bigger. Jiantao Holderness http://www.homcem.com/

1 0

[U-Boot-Users] helloworld app from flash?
by Ram 08 Sep '07

08 Sep '07

Hi, im trying to run the helloworld application 1st Option: download the hello_world.bin to some location on RAM and execute it OMAP5912OSK: tftpboot 0x10000000 hello_world.bin OMAP5912OSK: go 0x10000004 This works fine. no problem 2nd Option: I want to burn the hello_world.bin into flash. During startup i want u-boot to launch it after booting - just like the way it boots the kernel. It does not work for me, this is what i did. $ ../tools/mkimage -A arm -O linux -T kernel -C gzip -a 0x10000000 -e 0x10000004 -n 'Hello Image' -d hello_world.bin.gz hello.img I downloaded the hello.img and burnt it to 0x40000 I did: setenv bootcmd bootm 0x40000 Now when i restarted the boot i get the following:- Example expects ABI version 2 Actual U-Boot ABI version 2 Hello World argc = 0 data abort pc : [<10000058>] lr : [<10000048>] sp : 1103fc10 ip : ffffffff fp : 00000001 r10: 110996d8 r9 : 1103fca4 r8 : 1103ffdc r7 : 110996d8 r6 : 00000203 r5 : 00000000 r4 : 00000000 r3 : 00000020 r2 : 00000001 r1 : 0000000a r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... All i am doing in the hello world example is to read a line and print the line entered. I am using readline function for doing that. The programs works fine if i download it to RAM and say go. but if i flash it it does not work?. Am i missing something?. Regards, sriram

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Re: [U-Boot-Users] minimum bdi config to read flash on 85xx
by David Hawkins 08 Sep '07

08 Sep '07

Hi Luiz, > I've just noticed that I've forgotten to send you files > regarding flash circuitry. What is the file format; *.schdoc? Just send a PDF version of the schematic, that'll be easier to read. No need to send it to everyone on the u-boot list. Since the board currently doesn't work, its not like anyone will want to copy it ;) Just send a copy to the few people who indicated they'd take a look. > David, I'll follow your recommendations and report > you later. The data sheet you sent in the zip file has the command table on p66 for the x16 interface. Cheers, Dave

1 0

[U-Boot-Users] any suggestions to download kernel image through USB?
by Bin Xu 08 Sep '07

08 Sep '07

Hi, all, I am a new comer to this mailing list. Currently I am working on TI Davinci DVEVM board. Now I am very interested in Uboot stuff and curious if I can download the kernel image through usb. I spend some time going through the old mailing list and found many useful suggestions, however, I did not find very detail instructions or tutorials, so I am wondering if anyone can give me some detail suggestions how to work with it? Thanks and Regards, Bin _________________________________________________________________ Kick back and relax with hot games and cool activities at the Messenger Café. http://www.cafemessenger.com?ocid=TXT_TAGLM_SeptWLtagline

2 1

[U-Boot-Users] [PATCH 0/2] Move to LIBFDT for mpc5xxx platforms
by Grant Likely 07 Sep '07

07 Sep '07

Wolfgang, et al. Here is hopefully the final version of migrating all the 5xxx boards to use LIBFDT. It has been tested on lite5200 and an earlier version of the patch was tested on motionpro. I'll wait a day to collect sign off and final comments, then I'll push it to the 5xxx tree. Cheers, g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd.

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[U-Boot-Users] how to make u-boot 1.1.4 suport nand flash K9F1216U0A
by yang jiang 07 Sep '07

07 Sep '07

I have taken a u-boot code from u-boot 1.1.4,but I don't know how to make u-boot 1.1.4 suport nand flash K9F1216U0A(bus_width 16 bits,page_size 512 bytes),help me! _________________________________________________________________ 与联机的朋友进行交流，请使用 MSN Messenger: http://messenger.msn.com/cn

2 1

[U-Boot-Users] Intel Flash CFI initialisation failure
by Mirek23 07 Sep '07

07 Sep '07

Dear All, I am having the problem with Intel Flash TE28F640 J3C120 on my avnet evaluation board (xilinx based with Virtex-4). I have compiled successfully u-boot-1.2.0 and it run well without FLASH support. Eventually I want to store u-boot in Flash but when I compile u-boot with Flash support the u-boot fails during Flash initialization. My Flash memory is: type: TE28F640 J3C120 (http://www.datasheets.org.uk/datasheet.php?article=3266188) vendor: Intel spec: NOR FLASH 64 Blocks 64 Mbits x8/x16 To support Flash memory I have configured u-boot with the following settings: #define CFG_FLASH_BASE 0xFF800000 #define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 64 #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 The u-boot was compiled successfully but when I booted it I have got the error messages when it came to the Flash initialization: U-Boot 1.2.0 (Sep 6 2007 - 17:56:34) ### No HW ID - assuming ML403 DRAM: 32 MB Top of RAM usable for U-Boot at: 02000000 Reserving 138k for U-Boot at: 01fdd000 Reserving 129k for malloc() at: 01fbcc00 Reserving 120 Bytes for Board Info at: 01fbcb88 Reserving 48 Bytes for Global Data at: 01fbcb58 Stack Pointer at: 01fbcb38 New Stack Pointer is: 01fbcb38 Now running in RAM - U-Boot at: 01fdd000 FLASH: flash detect cfi fwc addr ff800000 cmd 0 0 8bit x 8 bit fwc addr ff800055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr ff800010 is= 0 51 fwc addr ff800555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr ff800010 is= 0 51 fwc addr ff800000 cmd 0 0000 16bit x 8 bit fwc addr ff8000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff800020 is= 0051 5151 fwc addr ff800aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr ff800020 is= 0051 5151 fwc addr ff800000 cmd 0 0000 16bit x 16 bit fwc addr ff8000aa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr ff800020 is= 0051 0051 is= cmd 52(R) addr ff800022 is= 0052 0052 is= cmd 59(Y) addr ff800024 is= 0059 0059 ushort addr is at ff800050 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x2 addr[2] = 0x0 addr[3] = 0x0 retval = 0x2 device interface is 2 found port 2 chip 2 port 16 bits chip 16 bits ushort addr is at ff800026 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x1 addr[2] = 0x0 addr[3] = 0x0 retval = 0x1 fwc addr ff800000 cmd ff 00ff 16bit x 16 bit fwc addr ff800000 cmd 90 0090 16bit x 16 bit fwc addr ff800000 cmd ff 00ff 16bit x 16 bit fwc addr ff8000aa cmd 98 0098 16bit x 16 bit ushort addr is at ff80002a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x31 addr[2] = 0x0 addr[3] = 0x0 retval = 0x31 ff800020 : 00 51 00 52 00 59 00 01 00 00 00 31 00 00 00 00 .Q.R.Y.....1.... ff800030 : 00 00 00 00 00 00 00 27 00 36 00 00 00 00 00 08 .......'.6...... ff800040 : 00 08 00 0b 00 00 00 02 00 02 00 03 00 00 00 17 ................ ff800050 : 00 02 00 00 00 05 00 00 00 01 00 3f 00 00 00 00 ...........?.... ff800060 : 00 02 00 50 00 52 00 49 00 31 00 31 00 ce 00 00 ...P.R.I.1.1.... ff800070 : 00 00 00 00 00 01 00 01 00 00 00 33 00 00 00 01 ...........3.... ff800080 : 00 80 00 00 00 03 00 03 00 03 00 00 00 00 00 00 ................ ff800090 : ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ manufacturer is 1 manufacturer id is 0x89 device id is 0x17 device id2 is 0x0 cfi version is 0x3131 size_ratio 1 port 16 bits chip 16 bits found 1 erase regions long addr is at ff80005a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x3f addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x0 addr[6] = 0x0 addr[7] = 0x2 erase_region_count = 64 erase_region_size = 131072 Bus Fault @ 0x01fe4424, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 01fbc978 Data parity signal NIP: 01FE4424 XER: 20000000 LR: 01FE43D8 REGS: 01fbc978 TRAP: 0200 DAR: 00000000MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 00000000 01FBCA68 C01FC950 01FFF8D0 00000001 01FBCA70 00000001 00000006 GPR08: 00000000 FFC00004 01FBCA73 00000003 01FBC860 30000000 02001600 00000000 GPR16: 00020000 00000001 0000002D 00000000 00000020 00000040 0000002D FFC20000 GPR24: 01FFF950 00000001 00000020 00000004 01FFF8D0 01FBCB58 02001A94 FFC00000 Call backtrace: machine check NIP: FFFFFFFC XER: 00000000 LR: 01FED864 REGS: 01fbc868 TRAP: 0700 DAR: 00000001MSR: 00000000 EE: 0 PR: 0 FP: 0 ME: 0 IR/DR: 00 Does anybody have an idea what could be wrong? Best Regards Mirek -- View this message in context: http://www.nabble.com/Intel-Flash-CFI-initialisation-failure-tf4400680.html… Sent from the Uboot - Users mailing list archive at Nabble.com.

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[U-Boot-Users] Testing the flash
by Yasothabalan Ramaswamy-TLS,Chennai 07 Sep '07

07 Sep '07

Hi all, I am working in Lite5200 board. I am using UBoot as the boot code. Currently I am testing the Flash memory by using "Write and Read the same pattern" method (Protecting the UBoot Flash Sectors). I want to know whether there is any alternative method to test the complete FLASH MEMORY. Please help me. Regards, Yasotha Balan R DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. -----------------------------------------------------------------------------------------------------------------------

1 0

[U-Boot-Users] [PATCH] add ft_cpu_setup(..)-function for mpc8260
by Sergej Stepanov 07 Sep '07

07 Sep '07

Hello everybody. On proposal from Heiko Schocher: This patch adds ft_cpu_setup(..) - function for mpc8260. Signed-off-by: Sergej Stepanov <Sergej.Stepanov(a)ids.de> -- diff -pruN --exclude='\.svn' u-boot-1.2.0-orig/cpu/mpc8260/cpu.c u-boot-1.2.0/cpu/mpc8260/cpu.c --- u-boot-1.2.0-orig/cpu/mpc8260/cpu.c 2007-01-07 00:13:11.000000000 +0100 +++ u-boot-1.2.0/cpu/mpc8260/cpu.c 2007-09-03 14:02:54.000000000 +0200 @@ -294,3 +294,18 @@ void watchdog_reset (void) #endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ + +#if defined(CONFIG_OF_FLAT_TREE) +void ft_cpu_setup (void *blob, bd_t *bd) +{ + u32 *p; + ulong clock; + int len; + + clock = bd->bi_busfreq; + p = ft_get_prop (blob, "/cpus/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32 (clock); +} +#endif /* CONFIG_OF_FLAT_TREE */ +/* ------------------------------------------------------------------------- */ -- Sergej I. Stepanov IDS GmbH Nobelstr. 18, Zim. 2.1.05 D-76275 Ettlingen T +49 (0) 72 43/2 18-615 F +49 (0) 72 43/2 18-400 http://www.ids.de Email: Sergej.Stepanov(a)ids.de

3 2

[U-Boot-Users] [PATCH] Add multiple serials to PXA 270
by stefano babic 07 Sep '07

07 Sep '07

This patch adds support for multiple serials to the PXA target. FFUART, BTUART and STUART are supported. Signed-off-by: Stefano Babic <sbabic(a)denx.de> -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de ===================================================================== >From 205e34f5f0410b5c99bc868ed0cf26b0a627514a Mon Sep 17 00:00:00 2001 From: Stefano Babic <sbabic(a)denx.de> Date: Thu, 30 Aug 2007 19:23:10 +0200 Subject: [PATCH] Add multiple serials to PXA target --- common/serial.c | 13 ++- cpu/pxa/serial.c | 351 +++++++++++++++++++++++++++++++++++++++++------------- include/serial.h | 4 + lib_arm/board.c | 4 + 4 files changed, 288 insertions(+), 84 deletions(-) diff --git a/common/serial.c b/common/serial.c index 13e9f30..dee1cc0 100644 --- a/common/serial.c +++ b/common/serial.c @@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; static struct serial_device *serial_devices = NULL; static struct serial_device *serial_current = NULL; -#ifndef CONFIG_LWMON +#if !defined(CONFIG_LWMON) && !defined(CONFIG_PXA27X) struct serial_device *default_serial_console (void) { #if defined(CONFIG_8xx_CONS_SMC1) || defined(CONFIG_8xx_CONS_SMC2) @@ -65,7 +65,7 @@ struct serial_device *default_serial_con } #endif -static int serial_register (struct serial_device *dev) +int serial_register (struct serial_device *dev) { dev->init += gd->reloc_off; dev->setbrg += gd->reloc_off; @@ -110,6 +110,15 @@ void serial_initialize (void) serial_register(&eserial4_device); #endif #endif /* CFG_NS16550_SERIAL */ +#if defined (CONFIG_FFUART) + serial_register(&serial_ffuart_device); +#endif +#if defined (CONFIG_BTUART) + serial_register(&serial_btuart_device); +#endif +#if defined (CONFIG_STUART) + serial_register(&serial_stuart_device); +#endif serial_assign (default_serial_console ()->name); } diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index cb3a478..65ce091 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -30,11 +30,28 @@ #include <common.h> #include <watchdog.h> +#include <serial.h> #include <asm/arch/pxa-regs.h> DECLARE_GLOBAL_DATA_PTR; -void serial_setbrg (void) +#define FFUART 0 +#define BTUART 1 +#define STUART 2 + +#ifndef CONFIG_SERIAL_MULTI +#if defined (CONFIG_FFUART) +#define UART_INDEX FFUART +#elif defined (CONFIG_BTUART) +#define UART_INDEX BTUART +#elif defined (CONFIG_STUART) +#define UART_INDEX STUART +#else +#error "Bad: you didn't configure serial ..." +#endif +#endif + +void pxa_setbrg_dev (unsigned int uart_index) { unsigned int quot = 0; @@ -53,63 +70,68 @@ void serial_setbrg (void) else hang (); -#ifdef CONFIG_FFUART + switch (uart_index) { + case FFUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_22_FFUART; + CKENA |= CKENA_22_FFUART; #else - CKEN |= CKEN6_FFUART; + CKEN |= CKEN6_FFUART; #endif /* CONFIG_CPU_MONAHANS */ - FFIER = 0; /* Disable for now */ - FFFCR = 0; /* No fifos enabled */ + FFIER = 0; /* Disable for now */ + FFFCR = 0; /* No fifos enabled */ - /* set baud rate */ - FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; - FFDLL = quot & 0xff; - FFDLH = quot >> 8; - FFLCR = LCR_WLS0 | LCR_WLS1; + /* set baud rate */ + FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; + FFDLL = quot & 0xff; + FFDLH = quot >> 8; + FFLCR = LCR_WLS0 | LCR_WLS1; - FFIER = IER_UUE; /* Enable FFUART */ + FFIER = IER_UUE; /* Enable FFUART */ + break; -#elif defined(CONFIG_BTUART) + case BTUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_21_BTUART; + CKENA |= CKENA_21_BTUART; #else - CKEN |= CKEN7_BTUART; + CKEN |= CKEN7_BTUART; #endif /* CONFIG_CPU_MONAHANS */ - BTIER = 0; - BTFCR = 0; + BTIER = 0; + BTFCR = 0; + + /* set baud rate */ + BTLCR = LCR_DLAB; + BTDLL = quot & 0xff; + BTDLH = quot >> 8; + BTLCR = LCR_WLS0 | LCR_WLS1; - /* set baud rate */ - BTLCR = LCR_DLAB; - BTDLL = quot & 0xff; - BTDLH = quot >> 8; - BTLCR = LCR_WLS0 | LCR_WLS1; + BTIER = IER_UUE; /* Enable BFUART */ - BTIER = IER_UUE; /* Enable BFUART */ + break; -#elif defined(CONFIG_STUART) + case STUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_23_STUART; + CKENA |= CKENA_23_STUART; #else - CKEN |= CKEN5_STUART; + CKEN |= CKEN5_STUART; #endif /* CONFIG_CPU_MONAHANS */ - STIER = 0; - STFCR = 0; + STIER = 0; + STFCR = 0; - /* set baud rate */ - STLCR = LCR_DLAB; - STDLL = quot & 0xff; - STDLH = quot >> 8; - STLCR = LCR_WLS0 | LCR_WLS1; + /* set baud rate */ + STLCR = LCR_DLAB; + STDLL = quot & 0xff; + STDLH = quot >> 8; + STLCR = LCR_WLS0 | LCR_WLS1; - STIER = IER_UUE; /* Enable STUART */ + STIER = IER_UUE; /* Enable STUART */ + break; -#else -#error "Bad: you didn't configure serial ..." -#endif + default: + hang(); + } } @@ -118,9 +140,9 @@ void serial_setbrg (void) * are always 8 data bits, no parity, 1 stop bit, no start bits. * */ -int serial_init (void) +int pxa_init_dev (unsigned int uart_index) { - serial_setbrg (); + pxa_setbrg_dev (uart_index); return (0); } @@ -129,26 +151,32 @@ int serial_init (void) /* * Output a single byte to the serial port. */ -void serial_putc (const char c) -{ -#ifdef CONFIG_FFUART - /* wait for room in the tx FIFO on FFUART */ - while ((FFLSR & LSR_TEMT) == 0) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - FFTHR = c; -#elif defined(CONFIG_BTUART) - while ((BTLSR & LSR_TEMT ) == 0 ) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - BTTHR = c; -#elif defined(CONFIG_STUART) - while ((STLSR & LSR_TEMT ) == 0 ) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - STTHR = c; -#endif +void pxa_putc_dev (unsigned int uart_index,const char c) +{ + switch (uart_index) { + case FFUART: + /* wait for room in the tx FIFO on FFUART */ + while ((FFLSR & LSR_TEMT) == 0) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + FFTHR = c; + break; + + case BTUART: + while ((BTLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + BTTHR = c; + break; + + case STUART: + while ((STLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + STTHR = c; + break; + } /* If \n, also do \r */ if (c == '\n') - serial_putc ('\r'); + pxa_putc_dev (uart_index,'\r'); } /* @@ -156,15 +184,17 @@ void serial_putc (const char c) * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_tstc (void) -{ -#ifdef CONFIG_FFUART - return FFLSR & LSR_DR; -#elif defined(CONFIG_BTUART) - return BTLSR & LSR_DR; -#elif defined(CONFIG_STUART) - return STLSR & LSR_DR; -#endif +int pxa_tstc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART: + return FFLSR & LSR_DR; + case BTUART: + return BTLSR & LSR_DR; + case STUART: + return STLSR & LSR_DR; + } + return -1; } /* @@ -172,27 +202,184 @@ int serial_tstc (void) * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_getc (void) -{ -#ifdef CONFIG_FFUART - while (!(FFLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) FFRBR & 0xff; -#elif defined(CONFIG_BTUART) - while (!(BTLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) BTRBR & 0xff; -#elif defined(CONFIG_STUART) - while (!(STLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) STRBR & 0xff; -#endif +int pxa_getc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART: + while (!(FFLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) FFRBR & 0xff; + + case BTUART: + while (!(BTLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) BTRBR & 0xff; + case STUART: + while (!(STLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) STRBR & 0xff; + } + return -1; } void -serial_puts (const char *s) +pxa_puts_dev (unsigned int uart_index,const char *s) { while (*s) { - serial_putc (*s++); + pxa_putc_dev (uart_index,*s++); } } + +#if defined (CONFIG_FFUART) +static int ffuart_init(void) +{ + return pxa_init_dev(FFUART); +} + +static void ffuart_setbrg(void) +{ + return pxa_setbrg_dev(FFUART); +} + +static void ffuart_putc(const char c) +{ + return pxa_putc_dev(FFUART,c); +} + +static void ffuart_puts(const char *s) +{ + return pxa_puts_dev(FFUART,s); +} + +static int ffuart_getc(void) +{ + return pxa_getc_dev(FFUART); +} + +static int ffuart_tstc(void) +{ + return pxa_tstc_dev(FFUART); +} + +struct serial_device serial_ffuart_device = +{ + "serial_ffuart", + "PXA", + ffuart_init, + ffuart_setbrg, + ffuart_getc, + ffuart_tstc, + ffuart_putc, + ffuart_puts, +}; +#endif + +#if defined (CONFIG_BTUART) +static int btuart_init(void) +{ + return pxa_init_dev(BTUART); +} + +static void btuart_setbrg(void) +{ + return pxa_setbrg_dev(BTUART); +} + +static void btuart_putc(const char c) +{ + return pxa_putc_dev(BTUART,c); +} + +static void btuart_puts(const char *s) +{ + return pxa_puts_dev(BTUART,s); +} + +static int btuart_getc(void) +{ + return pxa_getc_dev(BTUART); +} + +static int btuart_tstc(void) +{ + return pxa_tstc_dev(BTUART); +} + +struct serial_device serial_btuart_device = +{ + "serial_btuart", + "PXA", + btuart_init, + btuart_setbrg, + btuart_getc, + btuart_tstc, + btuart_putc, + btuart_puts, +}; +#endif + +#if defined (CONFIG_STUART) +static int stuart_init(void) +{ + return pxa_init_dev(STUART); +} + +static void stuart_setbrg(void) +{ + return pxa_setbrg_dev(STUART); +} + +static void stuart_putc(const char c) +{ + return pxa_putc_dev(STUART,c); +} + +static void stuart_puts(const char *s) +{ + return pxa_puts_dev(STUART,s); +} + +static int stuart_getc(void) +{ + return pxa_getc_dev(STUART); +} + +static int stuart_tstc(void) +{ + return pxa_tstc_dev(STUART); +} + +struct serial_device serial_stuart_device = +{ + "serial_stuart", + "PXA", + stuart_init, + stuart_setbrg, + stuart_getc, + stuart_tstc, + stuart_putc, + stuart_puts, +}; +#endif + + +#ifndef CONFIG_SERIAL_MULTI +inline int serial_init(void) { + return (pxa_init_dev(UART_INDEX)); +} +void serial_setbrg(void) { + pxa_setbrg_dev(UART_INDEX); +} +int serial_getc(void) { + return(pxa_getc_dev(UART_INDEX)); +} +int serial_tstc(void) { + return(pxa_tstc_dev(UART_INDEX)); +} +void serial_putc(const char c) { + pxa_putc_dev(UART_INDEX,c); +} +void serial_puts(const char *s) { + pxa_puts_dev(UART_INDEX,s); +} +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/include/serial.h b/include/serial.h index f7412fd..30bfde3 100644 --- a/include/serial.h +++ b/include/serial.h @@ -36,6 +36,10 @@ extern struct serial_device eserial4_dev #endif +extern struct serial_device serial_ffuart_device; +extern struct serial_device serial_btuart_device; +extern struct serial_device serial_stuart_device; + extern void serial_initialize(void); extern void serial_devices_init(void); extern int serial_assign(char * name); diff --git a/lib_arm/board.c b/lib_arm/board.c index d37e5da..d28afc5 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -314,6 +314,10 @@ void start_armboot (void) drv_vfd_init(); #endif /* CONFIG_VFD */ +#ifdef CONFIG_SERIAL_MULTI + serial_initialize(); +#endif + /* IP Address */ gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); -- 1.4.3.4

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[U-Boot-Users] [PATCH] Add BUILD_DIR support for bios emulator.
by Jason Jin 07 Sep '07

07 Sep '07

Signed-off-by: Jason Jin <Jason.jin(a)freescale.com> --- drivers/bios_emulator/Makefile | 25 ++++++++++++++++--------- 1 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/bios_emulator/Makefile b/drivers/bios_emulator/Makefile index 586e83b..998d470 100644 --- a/drivers/bios_emulator/Makefile +++ b/drivers/bios_emulator/Makefile @@ -2,9 +2,11 @@ include $(TOPDIR)/config.mk LIB := $(obj)libatibiosemu.a -X86DIR = ./x86emu +X86DIR = x86emu -OBJS = atibios.o biosemu.o besys.o bios.o \ +$(shell mkdir -p $(obj)$(X86DIR)) + +COBJS = atibios.o biosemu.o besys.o bios.o \ $(X86DIR)/decode.o \ $(X86DIR)/ops2.o \ $(X86DIR)/ops.o \ @@ -12,19 +14,24 @@ OBJS = atibios.o biosemu.o besys.o bios.o \ $(X86DIR)/sys.o \ $(X86DIR)/debug.o -CFLAGS += -I. -I./include -I$(X86DIR) -I$(TOPDIR)/include \ +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \ -D__PPC__ -D__BIG_ENDIAN__ -all: $(LIB) +CFLAGS += $(EXTRA_CFLAGS) +HOST_CFLAGS += $(EXTRA_CFLAGS) + +all: $(LIB) -$(LIB): $(OBJS) - $(AR) crv $@ $(OBJS) +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -.depend: Makefile $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +include $(SRCTREE)/rules.mk -sinclude .depend +sinclude $(obj).depend ######################################################################### -- 1.5.2

2 1

[U-Boot-Users] [PATCH 2/2][MIPS] Remove inline asm string functions
by Shinya Kuribayashi 07 Sep '07

07 Sep '07

Revised. Hope this applied. Thanks, --- We MIPS stop using inline string functions as other ARCHs do so, since the optimized inline asm versions are not small. This change is triggered by a following MIPS build error: common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init': common/exports.c:32: undefined reference to `strcmp' make: *** [u-boot] Error 1 Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi(a)necel.com> --- include/asm-mips/string.h | 124 ++++----------------------------------------- 1 files changed, 10 insertions(+), 114 deletions(-) diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index 3f7c55e..c42ad82 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -10,126 +10,22 @@ #ifndef _ASM_STRING_H #define _ASM_STRING_H - /* - * Most of the inline functions are rather naive implementations so I just - * didn't bother updating them for 64-bit ... + * We don't do inline string functions, since the + * optimised inline asm versions are not small. */ -#ifdef CONFIG_32BIT - -#ifndef IN_STRING_C - -#define __HAVE_ARCH_STRCPY -static __inline__ char *strcpy(char *__dest, __const__ char *__src) -{ - char *__xdest = __dest; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t$1,(%1)\n\t" - "addiu\t%1,1\n\t" - "sb\t$1,(%0)\n\t" - "bnez\t$1,1b\n\t" - "addiu\t%0,1\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__dest), "=r" (__src) - : "0" (__dest), "1" (__src) - : "memory"); - - return __xdest; -} - -#define __HAVE_ARCH_STRNCPY -static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) -{ - char *__xdest = __dest; - - if (__n == 0) - return __xdest; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t$1,(%1)\n\t" - "subu\t%2,1\n\t" - "sb\t$1,(%0)\n\t" - "beqz\t$1,2f\n\t" - "addiu\t%0,1\n\t" - "bnez\t%2,1b\n\t" - "addiu\t%1,1\n" - "2:\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__dest), "=r" (__src), "=r" (__n) - : "0" (__dest), "1" (__src), "2" (__n) - : "memory"); - - return __xdest; -} - -#define __HAVE_ARCH_STRCMP -static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) -{ - int __res; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - "lbu\t%2,(%0)\n" - "1:\tlbu\t$1,(%1)\n\t" - "addiu\t%0,1\n\t" - "bne\t$1,%2,2f\n\t" - "addiu\t%1,1\n\t" - "bnez\t%2,1b\n\t" - "lbu\t%2,(%0)\n\t" -#if defined(CONFIG_CPU_R3000) - "nop\n\t" -#endif - "move\t%2,$1\n" - "2:\tsubu\t%2,$1\n" - "3:\t.set\tat\n\t" - ".set\treorder" - : "=r" (__cs), "=r" (__ct), "=r" (__res) - : "0" (__cs), "1" (__ct)); - - return __res; -} -#endif /* !defined(IN_STRING_C) */ +#undef __HAVE_ARCH_STRCPY +extern char *strcpy(char *__dest, __const__ char *__src); -#define __HAVE_ARCH_STRNCMP -static __inline__ int -strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) -{ - int __res; +#undef __HAVE_ARCH_STRNCPY +extern char *strncpy(char *__dest, __const__ char *__src, size_t __n); - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t%3,(%0)\n\t" - "beqz\t%2,2f\n\t" - "lbu\t$1,(%1)\n\t" - "subu\t%2,1\n\t" - "bne\t$1,%3,3f\n\t" - "addiu\t%0,1\n\t" - "bnez\t%3,1b\n\t" - "addiu\t%1,1\n" - "2:\n\t" -#if defined(CONFIG_CPU_R3000) - "nop\n\t" -#endif - "move\t%3,$1\n" - "3:\tsubu\t%3,$1\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) - : "0" (__cs), "1" (__ct), "2" (__count)); +#undef __HAVE_ARCH_STRCMP +extern int strcmp(__const__ char *__cs, __const__ char *__ct); - return __res; -} -#endif /* CONFIG_32BIT */ +#undef __HAVE_ARCH_STRNCMP +extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count); #undef __HAVE_ARCH_MEMSET extern void *memset(void *__s, int __c, size_t __count);

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[U-Boot-Users] [PATCH 1/2][MIPS] Update asm string header (revised)
by Shinya Kuribayashi 07 Sep '07

07 Sep '07

Revised. Hope this applied. Thanks, --- This patches contains several bugfixes and cleanups in the latest upstream: - Don't include linux/config.h from anywhere else in include/ - Remove buggy inline version of memscan. - Merge with Linux 2.6.11-rc3. - Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4. - Goodbye mips64. 31704 lines of code bite the dust. - Replace extern inline with static inline. - Fix return value of strncpy. - Remove a bunch more "$1" clobbers. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi(a)necel.com> --- include/asm-mips/string.h | 68 ++++++++++++++++++--------------------------- 1 files changed, 27 insertions(+), 41 deletions(-) diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index 463a111..3f7c55e 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -1,18 +1,26 @@ -/* $Id: string.h,v 1.13 2000/02/19 14:12:14 harald Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle + * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle + * Copyright (c) 2000 by Silicon Graphics, Inc. + * Copyright (c) 2001 MIPS Technologies, Inc. */ -#ifndef __ASM_MIPS_STRING_H -#define __ASM_MIPS_STRING_H +#ifndef _ASM_STRING_H +#define _ASM_STRING_H + -#include <linux/config.h> +/* + * Most of the inline functions are rather naive implementations so I just + * didn't bother updating them for 64-bit ... + */ +#ifdef CONFIG_32BIT + +#ifndef IN_STRING_C #define __HAVE_ARCH_STRCPY -extern __inline__ char *strcpy(char *__dest, __const__ char *__src) +static __inline__ char *strcpy(char *__dest, __const__ char *__src) { char *__xdest = __dest; @@ -28,13 +36,13 @@ extern __inline__ char *strcpy(char *__dest, __const__ char *__src) ".set\treorder" : "=r" (__dest), "=r" (__src) : "0" (__dest), "1" (__src) - : "$1","memory"); + : "memory"); return __xdest; } #define __HAVE_ARCH_STRNCPY -extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) +static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) { char *__xdest = __dest; @@ -56,13 +64,13 @@ extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) ".set\treorder" : "=r" (__dest), "=r" (__src), "=r" (__n) : "0" (__dest), "1" (__src), "2" (__n) - : "$1","memory"); + : "memory"); - return __dest; + return __xdest; } #define __HAVE_ARCH_STRCMP -extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) +static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) { int __res; @@ -84,14 +92,15 @@ extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) "3:\t.set\tat\n\t" ".set\treorder" : "=r" (__cs), "=r" (__ct), "=r" (__res) - : "0" (__cs), "1" (__ct) - : "$1"); + : "0" (__cs), "1" (__ct)); return __res; } +#endif /* !defined(IN_STRING_C) */ + #define __HAVE_ARCH_STRNCMP -extern __inline__ int +static __inline__ int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) { int __res; @@ -116,11 +125,11 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) ".set\tat\n\t" ".set\treorder" : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) - : "0" (__cs), "1" (__ct), "2" (__count) - : "$1"); + : "0" (__cs), "1" (__ct), "2" (__count)); return __res; } +#endif /* CONFIG_32BIT */ #undef __HAVE_ARCH_MEMSET extern void *memset(void *__s, int __c, size_t __count); @@ -131,27 +140,4 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n); #undef __HAVE_ARCH_MEMMOVE extern void *memmove(void *__dest, __const__ void *__src, size_t __n); -/* Don't build bcopy at all ... */ -#define __HAVE_ARCH_BCOPY - -#define __HAVE_ARCH_MEMSCAN -extern __inline__ void *memscan(void *__addr, int __c, size_t __size) -{ - char *__end = (char *)__addr + __size; - - __asm__(".set\tpush\n\t" - ".set\tnoat\n\t" - ".set\treorder\n\t" - "1:\tbeq\t%0,%1,2f\n\t" - "addiu\t%0,1\n\t" - "lb\t$1,-1(%0)\n\t" - "bne\t$1,%4,1b\n" - "2:\t.set\tpop" - : "=r" (__addr), "=r" (__end) - : "0" (__addr), "1" (__end), "r" (__c) - : "$1"); - - return __addr; -} - -#endif /* __ASM_MIPS_STRING_H */ +#endif /* _ASM_STRING_H */

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[U-Boot-Users] [RFC 0/2] Make board config available to build system
by Grant Likely 07 Sep '07

07 Sep '07

This series extracts the u-boot configuration from the config header files and makes it usable by the build system. The obvious application for this is to allow conditional compiliation of files without wrapping every file with a large #if defined() block (which results in shorter build times). This is another step towards using a kconfig style build system. This step just enables make and gcc to have the same configuration data. Next step I think is to allow boards to supply a Kconfig style config file instead of a header file (and in this case, do the opposite of this patch; generate the header file based on the .config file). Until all boards are ported over, both methods can be supported based on what kind of config file (either .h or .config) is present. Word of warning: I've most certainly broken stuff in this version. If there is suppport for this direction, then I'll make sure I get it sorted out for real. Cheers, g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd.

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[U-Boot-Users] [GIT PULL] Please pull 85xx tree
by Andy Fleming 07 Sep '07

07 Sep '07

The following changes since commit 60174746c668b309378a91488dded898e9553eae: Wolfgang Denk (1): Fix TFTP OACK code for short packets. are found in the git repository at: git://www.denx.de/git/u-boot-mpc85xx.git Ed Swarthout (1): ft_board_setup update 85xx/86xx of pci/pcie bus-range property. Kumar Gala (1): Fix ULI RTC support on MPC8544 DS board/cds/mpc8548cds/mpc8548cds.c | 2 +- board/freescale/mpc8544ds/init.S | 2 +- board/freescale/mpc8544ds/mpc8544ds.c | 20 +++++++++++++++++--- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 16 ++++++++++++++++ include/configs/MPC8544DS.h | 3 +++ 5 files changed, 38 insertions(+), 5 deletions(-)

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