August 2007 - U-Boot

[U-Boot-Users] ColdFire: MCF52x2 update VII
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part VII. Regards, TsiChung

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[U-Boot-Users] ColdFire: MCF52x2 update Part VI - resend
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part VI. Regards, TsiChung

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[U-Boot-Users] ColdFire: MCF52x2 update part IV - b - resend
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part IV - b. Regards, TsiChung

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[U-Boot-Users] Using 'ver' env var
by Zach Sadecki 14 Aug '07

14 Aug '07

I would like to be able to identify the u-boot version from linux. At first this seemed straight-forward, simply enable CONFIG_VERSION_VARIABLE and use fw_printenv in linux. This, of course, doesn't work, as 'ver' is not saveenv'ed and fw_printenv just pulls the info from flash (or whereever). Writing a routine in the board init file (last_stage_init) doesn't help, as 'ver' is set after that is run and therefore the stored version string is the old one (if an update occurs). So this is a 2 part question... What good is the 'ver' env var? It's apparently only useful in u-boot itself and u-boot already has a 'version' command that gives you the same info. And second, I'm sure I'm not the first person to want to see u-boot version in linux, so how have other accomplished this? Thanks, Zach

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[U-Boot-Users] [ARM] TI DaVinci fix (stupid me...)
by ksi＠koi8.net 14 Aug '07

14 Aug '07

Please apply this until it's not too late... Stupid me, put %hhx format specifier in sprintfs and it sure doesn't work in U-Boot... Everything else is OK so far. BTW, I do hope that attached, not inline, patch should work. This is against the current GIT tree. Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot-Users] ColdFire: MCF52x2 update part V
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part V. Regards, TsiChung

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[U-Boot-Users] ColdFire: MCF52x2 update Part III - resend
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part III. Regards, TsiChung

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[U-Boot-Users] ColdFire: MCF52x2 update Part II b
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part II b. I manually split the file into two portions. Regards, TsiChung

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[U-Boot-Users] ColdFire: MCF52x2 update Part II a
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Update for MCF52x2 part II a. I manually split the file into two portions. Regards, TsiChung

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[U-Boot-Users] Update for 5329
by Liew Tsi Chung-r5aahp 14 Aug '07

14 Aug '07

Stefan, Here is the updates: 1. Update-CONFIG_MCFUART.patch 2. Added-common-define-CONFIG_CF_MII-for-do_mii.patch 3. Moved-sync-from-m5329evb.c-to-include-asm-m68k-io.patch 4. Added-uart_gpio_conf-for-port-configuration.patch 5. Update-timer.patch 6. Added-fsl_i2c-header-file.patch 7. Added-NAND-Flash-support-and-I2C-support.patch 8. Added-GPIO-enabled-for-I2C-signals.patch Note: NAND support still partially incomplete, unable to read/write. Erase, bad, markbad, lock, unlock and info seems working. Thanks, Regards, TsiChung

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Re: [U-Boot-Users] fdt in u-boot
by Jerry Van Baren 14 Aug '07

14 Aug '07

Kumar Gala wrote: > Jerry, > > I was wondering if you wouldn't mind summarizing the state of the > fdt/libfdt work. I haven't been following what's been going on here in > u-boot. > > thanks > > - k Hi Kumar, I try to keep the wiki page up to date, I've updated it in response to your query: <http://www.denx.de/wiki/UBoot/UBootFdtInfo> (it is linked off the Custodian page:) <http://www.denx.de/wiki/UBoot/Custodians> LIBFDT is in good shape in general, quite usable (send patches if I lie...). The #1 outstanding task as I see it is to convert the board-, CPU-, and PCI-specific ft_*() fdt initialization/update routines over to to use libfdt. Patches for these improvements would go to the appropriate 8Yxx maintainer's repositories {Kim|Andy|Jon}. Outstanding Patches: -------------------- * Andy Fleming's patch WRT making sure the blob is in the lower portion (16GB at the moment) of memory. Discussion has been resolved, it will be applied and a pull request will go out tonight (Wolfgang's tomorrow ;-). * Unpublished patch of JerryVanBaren, implementing a suggestion by Scott Wood to make the /chosen handling finer grained: if the /chosen node exists, currently u-boot-fdt bails out. A better methodology is to not overwrite pre-existing properties on a per-property basis, so if /chosen exists but a necessary /chosen/property doesn't, it gets created. Good idea, but not published and poorly tested at the moment. CPU sub-architectures: ---------------------- See the table(and update or send me updates): <http://www.denx.de/wiki/UBoot/UBootFdtInfo#AdoptionTable> 83xx: mpc8360emds is converted (my eval board). Kim has done work on 834x board(s) but I'm not sure which ones have been converted off-hand. 86xx: Jon has said he has a note on his whiteboard to convert the 86xx over to using LIBFDT. 85xx: Unknown. Andy is the maintainer and has submitted patch(es) so there obviously is some activity there. Best regards, gvb

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[U-Boot-Users] Pull Request: u-boot-net
by Ben Warren 14 Aug '07

14 Aug '07

Wolfgang, Please pull from u-boot-net. I merged with mainline tonight, so hopefully everything's up-to-date. I'm sure you'll let me know if anything's amiss. regards, Ben ------------------------------------ The following changes since commit 8a92b7c60b40ff79e2cc96e13aeac2a531dde473: Wolfgang Denk (1): Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xx are found in the git repository at: git://www.denx.de/git/u-boot-net.git Ben Warren (1): Sync'd u-boot-net with mainline David Updegraff (1): multicast tftp: RFC2090 Mike Rapoport (1): Add ability to take MAC address from the environment to DM9000 driver Vadim Bendebury (1): cosmetic changes to bcm570x driver Wilson Callan (1): New CONFIG_BOOTP_SERVERIP option README | 15 +- drivers/bcm570x.c | 2322 ++++++------- drivers/bcm570x_lm.h | 207 +- drivers/bcm570x_mm.h | 58 +- drivers/dm9000x.c | 15 + drivers/rtl8139.c | 7 + drivers/tigon3.c | 9697 ++++++++++++++++++++++++-------------------------- drivers/tigon3.h | 3759 ++++++++++---------- drivers/tsec.c | 48 + include/net.h | 34 +- net/bootp.c | 2 + net/eth.c | 45 + net/net.c | 8 + net/tftp.c | 238 ++- 14 files changed, 8076 insertions(+), 8379 deletions(-)

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[U-Boot-Users] Lite5200 + TFTP problem
by Sri nava kala devi Valteti, TLS-Chennai 14 Aug '07

14 Aug '07

Hi I am using Lite5200 board with u-Boot-1.2.0. While downloading the kernel image (2.6.16) through TFTP, I am getting timeout error. What can be the problem? Please help me. Thanks, kala. DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. -----------------------------------------------------------------------------------------------------------------------

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[U-Boot-Users] [PATCH v2] Fix initrd/dtb interaction
by Andy Fleming 14 Aug '07

14 Aug '07

The original code would wrongly relocate the blob to be right before the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ, if it is defined. So we make two changes: 1) flag the blob for relocation whenever its address is above BOOTMAPSZ 2) If the blob is being relocated, relocate it before kbd, not initrd Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- Fixes the lingering DEBUG. Sending this just in case further modification can be postponed until the next window. common/cmd_bootm.c | 23 ++++++++++++++--------- 1 files changed, 14 insertions(+), 9 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 2436581..7d36786 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -925,6 +925,15 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, unlock_ram_in_cache(); #endif +#ifdef CFG_BOOTMAPSZ + /* + * The blob must be within CFG_BOOTMAPSZ, + * so we flag it to be copied if it is + */ + if (of_flat_tree >= (char *)CFG_BOOTMAPSZ) + of_data = of_flat_tree; +#endif + #if defined(CONFIG_OF_LIBFDT) /* move of_flat_tree if needed */ if (of_data) { @@ -932,11 +941,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, ulong of_start, of_len; of_len = be32_to_cpu(fdt_totalsize(of_data)); - /* position on a 4K boundary before the initrd/kbd */ - if (initrd_start) - of_start = initrd_start - of_len; - else - of_start = (ulong)kbd - of_len; + + /* position on a 4K boundary before the kbd */ + of_start = (ulong)kbd - of_len; of_start &= ~(4096 - 1); /* align on page */ debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n", of_data, of_data + of_len - 1, of_len, of_len); @@ -975,11 +982,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, if (of_data) { ulong of_start, of_len; of_len = ((struct boot_param_header *)of_data)->totalsize; + /* provide extra 8k pad */ - if (initrd_start) - of_start = initrd_start - of_len - 8192; - else - of_start = (ulong)kbd - of_len - 8192; + of_start = (ulong)kbd - of_len - 8192; of_start &= ~(4096 - 1); /* align on page */ debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n", of_data, of_data + of_len - 1, of_len, of_len); -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [PATCH] Fix initrd/dtb interaction
by Andy Fleming 14 Aug '07

14 Aug '07

The original code would wrongly relocate the blob to be right before the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ, if it is defined. So we make two changes: 1) flag the blob for relocation whenever its address is above BOOTMAPSZ 2) If the blob is being relocated, relocate it before kbd, not initrd Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- common/cmd_bootm.c | 24 +++++++++++++++--------- 1 files changed, 15 insertions(+), 9 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 2436581..580a9f0 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -21,6 +21,7 @@ * MA 02111-1307 USA */ +#define DEBUG /* * Boot support */ @@ -925,6 +926,15 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, unlock_ram_in_cache(); #endif +#ifdef CFG_BOOTMAPSZ + /* + * The blob must be within CFG_BOOTMAPSZ, + * so we flag it to be copied if it is + */ + if (of_flat_tree >= (char *)CFG_BOOTMAPSZ) + of_data = of_flat_tree; +#endif + #if defined(CONFIG_OF_LIBFDT) /* move of_flat_tree if needed */ if (of_data) { @@ -932,11 +942,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, ulong of_start, of_len; of_len = be32_to_cpu(fdt_totalsize(of_data)); - /* position on a 4K boundary before the initrd/kbd */ - if (initrd_start) - of_start = initrd_start - of_len; - else - of_start = (ulong)kbd - of_len; + + /* position on a 4K boundary before the kbd */ + of_start = (ulong)kbd - of_len; of_start &= ~(4096 - 1); /* align on page */ debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n", of_data, of_data + of_len - 1, of_len, of_len); @@ -975,11 +983,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, if (of_data) { ulong of_start, of_len; of_len = ((struct boot_param_header *)of_data)->totalsize; + /* provide extra 8k pad */ - if (initrd_start) - of_start = initrd_start - of_len - 8192; - else - of_start = (ulong)kbd - of_len - 8192; + of_start = (ulong)kbd - of_len - 8192; of_start &= ~(4096 - 1); /* align on page */ debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n", of_data, of_data + of_len - 1, of_len, of_len); -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [GIT PULL] Please pull 85xx repo
by Andy Fleming 14 Aug '07

14 Aug '07

Realized I had sent this to sourceforge.org... The following changes since commit 8a92b7c60b40ff79e2cc96e13aeac2a531dde473: Wolfgang Denk (1): Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xx are found in the git repository at: git://www.denx.de/git/u-boot-mpc85xx.git Andy Fleming (6): Add MPC8544DS README 85xx start.S cleanup and exception support Fix minor 85xx warnings MPC85xx BA bits not set for 3-bit bank address DIMM Add support for UEC to 8568 85xxCDS: Enable the VIA PCI-to-ISA bridge. Ed Swarthout (5): e500 needs ppc_asm.tmp MCK_EXCEPTION mpc85xx L2 cache reporting and SRAM relocation option. 85xx allow debugger to configure ddr. 8544ds PCIE support 8548cds PCIE support. Haiying Wang (2): Empirically set cpo and clk_adjust for mpc85xx DDR2 support Add PCI support for MPC8568MDS board Kumar Gala (1): Use an absolute address when jumping out of 4k boot page Randy Vinson (1): 85xxCDS: Add make targets for legacy systems. Makefile | 30 ++- board/cds/common/via.c | 9 +- board/cds/mpc8541cds/mpc8541cds.c | 15 +- board/cds/mpc8548cds/config.mk | 4 +- board/cds/mpc8548cds/init.S | 162 ++++++------ board/cds/mpc8548cds/mpc8548cds.c | 252 +++++++++++++++--- board/cds/mpc8548cds/u-boot.lds | 3 +- board/cds/mpc8555cds/mpc8555cds.c | 15 +- board/freescale/mpc8544ds/init.S | 6 +- board/freescale/mpc8544ds/mpc8544ds.c | 350 ++++++++++++++++++++++++ board/mpc8560ads/mpc8560ads.c | 1 - board/mpc8568mds/bcsr.c | 7 + board/mpc8568mds/bcsr.h | 1 + board/mpc8568mds/init.S | 48 ++-- board/mpc8568mds/mpc8568mds.c | 121 ++++++++- cpu/mpc85xx/Makefile | 2 +- cpu/mpc85xx/cpu.c | 24 ++- cpu/mpc85xx/cpu_init.c | 100 ++++++-- cpu/mpc85xx/interrupts.c | 33 +++ cpu/mpc85xx/pci.c | 2 +- cpu/mpc85xx/qe_io.c | 85 ++++++ cpu/mpc85xx/spd_sdram.c | 67 ++++- cpu/mpc85xx/start.S | 486 ++++++++++++++------------------- cpu/mpc85xx/traps.c | 99 ++++++-- doc/README.mpc8544ds | 122 ++++++++ drivers/qe/uec.c | 27 ++- drivers/qe/uec.h | 1 + drivers/qe/uec_phy.c | 14 +- drivers/qe/uec_phy.h | 6 +- include/asm-ppc/global_data.h | 8 +- include/asm-ppc/immap_85xx.h | 54 ++++- include/asm-ppc/immap_qe.h | 20 ++- include/asm-ppc/processor.h | 3 + include/configs/MPC8541CDS.h | 7 + include/configs/MPC8544DS.h | 135 ++++++---- include/configs/MPC8548CDS.h | 347 ++++++++++++++++------- include/configs/MPC8555CDS.h | 7 + include/configs/MPC8568MDS.h | 65 ++++- include/mpc85xx.h | 8 +- include/ppc_asm.tmpl | 2 - 40 files changed, 2036 insertions(+), 712 deletions(-) create mode 100644 cpu/mpc85xx/qe_io.c create mode 100644 doc/README.mpc8544ds

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[U-Boot-Users] [RFC PATCH] TSEC internal TBI and SGMII support.
by Ed Swarthout 14 Aug '07

14 Aug '07

From: Ed Swarthout <Ed.Swarthout(a)freescale.com> Only register one miiphy device and attach all phy's to it. Option CONFIG_TSEC_TBI adds support to configure the internal TBI phy. The first TBI phy address is TBIPA_VALUE=0x11 and incremented for each tsec. CONFIG_MII_DEFAULT_TSEC will allow any phy connected to the default MII bus to be read or written without being tied to a specific tsec. Add vsc8234 phy support. The FSL boards use a sgmii riser card with a 4-port phy at address range 0x1c-0x1f. The CONFIG_SGMII_RISER option adds TSEC1_SGMII_PHY_ADDR_OFFSET to phyaddr when that tsec is configured to sgmii mode by the por config switches. Signed-off-by: Ed Swarthout <Ed.Swarthout(a)freescale.com> --- This version makes all the phys appear to be on a single miiphy bus so "mii info" will find and shows all the phys. drivers/tsec.c | 117 ++++++++++++++++++++++++++++++++++++++++++++++--------- drivers/tsec.h | 22 ++++++++++- 2 files changed, 119 insertions(+), 20 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index 55334d6..0074630 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -97,11 +97,13 @@ static struct tsec_info_struct tsec_info[] = { #endif }; -#define MAXCONTROLLERS (4) +#define MAXCONTROLLERS (8) /* 4 external phys and 4 internal tbi phys */ static int relocated = 0; +static int miiphy_registered = 0; /* Only register one miiphy device */ static struct tsec_private *privlist[MAXCONTROLLERS]; +static int privlist_next = 0; /* next entry to use */ #ifdef __GNUC__ static RTXBD rtx __attribute__ ((aligned(8))); @@ -128,6 +130,20 @@ static int tsec_miiphy_write(char *devname, unsigned char addr, static int tsec_miiphy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value); +#ifdef CONFIG_TSEC_TBI +static struct phy_cmd tbi_phy_config[] = (struct phy_cmd[]) { + {TBI_ANA, + TBIANA_ASYMMETRIC_PAUSE|TBIANA_SYMMETRIC_PAUSE|TBIANA_FULL_DUPLEX, + NULL}, + {TBI_TBICON, + TBICON_CLK_SELECT, NULL}, + {TBI_CR, + TBICR_PHY_RESET|TBICR_ANEG_ENABLE|TBICR_FULL_DUPLEX|TBICR_SPEED1_SET, + NULL}, + {miim_end,} +}; +#endif + /* Initialize device structure. Returns success if PHY * initialization succeeded (i.e. if it recognizes the PHY) */ @@ -149,13 +165,20 @@ int tsec_initialize(bd_t * bis, int index, char *devname) if (NULL == priv) return 0; - privlist[index] = priv; + privlist[privlist_next++] = priv; priv->regs = (volatile tsec_t *)(TSEC_BASE_ADDR + index * TSEC_SIZE); priv->phyregs = (volatile tsec_t *)(TSEC_BASE_ADDR + tsec_info[index].phyregidx * TSEC_SIZE); priv->phyaddr = tsec_info[index].phyaddr; +#ifdef CONFIG_SGMII_RISER + /* 8544DS board has two phys. rgmii at 0-1 and sgmii at 1c-1d. + * Pick based on POR configuration reflected in ecntrl + */ + if (priv->regs->ecntrl & ECNTRL_SGMII_MODE) + priv->phyaddr += TSEC1_SGMII_PHY_ADDR_OFFSET; +#endif priv->flags = tsec_info[index].flags; sprintf(dev->name, devname); @@ -172,15 +195,36 @@ int tsec_initialize(bd_t * bis, int index, char *devname) eth_register(dev); - /* Reset the MAC */ - priv->regs->maccfg1 |= MACCFG1_SOFT_RESET; - priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET); + /* Assign a Physical address to the internal TBI phy */ + priv->regs->tbipa = TBIPA_VALUE + index; #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \ && !defined(BITBANGMII) - miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write); + if (!miiphy_registered++) + miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write); +#endif + +#ifdef CONFIG_TSEC_TBI + /* Add a private structure for internal TBI devices to list */ + struct tsec_private *priv_tbi = \ + (struct tsec_private *)malloc(sizeof(struct tsec_private)); + privlist[privlist_next++] = priv_tbi; + priv_tbi->phyregs = priv->regs; + priv_tbi->phyaddr = TBIPA_VALUE + index; /* phyaddr must be unique */ + priv_tbi->flags = 0; + + /* for sgmii mode, this must be done before external mac reset */ + debug("Initialize TBI phy %x\n", priv_tbi->phyaddr); + phy_run_commands(priv_tbi, tbi_phy_config); #endif + /* Init MACCFG2. Defaults to GMII */ + priv->regs->maccfg2 = MACCFG2_INIT_SETTINGS; + + /* Reset the MAC */ + priv->regs->maccfg1 |= MACCFG1_SOFT_RESET; + priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET); + /* Try to initialize PHY here, and return */ return init_phy(dev); } @@ -293,13 +337,6 @@ static int init_phy(struct eth_device *dev) { struct tsec_private *priv = (struct tsec_private *)dev->priv; struct phy_info *curphy; - volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR); - - /* Assign a Physical address to the TBI */ - regs->tbipa = TBIPA_VALUE; - regs = (volatile tsec_t *)(TSEC_BASE_ADDR + TSEC_SIZE); - regs->tbipa = TBIPA_VALUE; - asm("sync"); /* Reset MII (due to new addresses) */ priv->phyregs->miimcfg = MIIMCFG_RESET; @@ -592,10 +629,10 @@ uint mii_parse_cis8201(uint mii_reg, struct tsec_private * priv) return 0; } -/* Parse the vsc8244's status register for speed and duplex +/* Parse the vsc8244/vsc8234's status register for speed and duplex * information */ -uint mii_parse_vsc8244(uint mii_reg, struct tsec_private * priv) +uint mii_parse_vsc82x4(uint mii_reg, struct tsec_private *priv) { uint speed; @@ -740,7 +777,8 @@ static void adjust_link(struct eth_device *dev) /* Set R100 bit in all modes although * it is only used in RGMII mode */ - if (priv->speed == 100) + if ((priv->speed == 100) + && (priv->flags & TSEC_REDUCED)) regs->ecntrl |= ECNTRL_R100; else regs->ecntrl &= ~(ECNTRL_R100); @@ -1149,7 +1187,29 @@ struct phy_info phy_info_VSC8244 = { {MIIM_STATUS, miim_read, &mii_parse_sr}, /* Read the status */ {MIIM_VSC8244_AUX_CONSTAT, miim_read, - &mii_parse_vsc8244}, + &mii_parse_vsc82x4}, + {miim_end,} + }, + (struct phy_cmd[]){ /* shutdown */ + {miim_end,} + }, +}; + +struct phy_info phy_info_VSC8234 = { + 0xfc623 >> 6, /* 0x3f18 */ + "Vitesse VSC8234", + 6, + (struct phy_cmd[]){ /* config */ + {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + {MIIM_CONTROL, MIIM_CONTROL_INIT, NULL}, + {miim_end,} + }, + (struct phy_cmd[]){ /* startup */ + /* Auto-negotiate */ + {MIIM_STATUS, miim_read, &mii_parse_sr}, + /* Read the status */ + {MIIM_VSC8244_AUX_CONSTAT, miim_read, + &mii_parse_vsc82x4}, {miim_end,} }, (struct phy_cmd[]){ /* shutdown */ @@ -1324,6 +1384,7 @@ struct phy_info *phy_info[] = { &phy_info_dm9161, &phy_info_lxt971, &phy_info_VSC8244, + &phy_info_VSC8234, &phy_info_dp83865, &phy_info_generic, NULL @@ -1471,8 +1532,17 @@ static int tsec_miiphy_read(char *devname, unsigned char addr, struct tsec_private *priv = get_priv_for_phy(addr); if (NULL == priv) { - printf("Can't read PHY at address %d\n", addr); +#ifdef CONFIG_MII_DEFAULT_TSEC + struct tsec_private temp_private; + priv = &temp_private; + priv->phyregs = (volatile tsec_t *)(TSEC_BASE_ADDR); + priv->phyaddr = addr; + priv->flags = 0; +#else + printf("No controller registered for PHY at address %d\n", + addr); return -1; +#endif } ret = (unsigned short)read_phy_reg(priv, reg); @@ -1493,8 +1563,17 @@ static int tsec_miiphy_write(char *devname, unsigned char addr, struct tsec_private *priv = get_priv_for_phy(addr); if (NULL == priv) { - printf("Can't write PHY at address %d\n", addr); +#ifdef CONFIG_MII_DEFAULT_TSEC + struct tsec_private temp_private; + priv = &temp_private; + priv->phyregs = (volatile tsec_t *)(TSEC_BASE_ADDR); + priv->phyaddr = addr; + priv->flags = 0; +#else + printf("No controller registered for PHY at address %d\n", + addr); return -1; +#endif } write_phy_reg(priv, reg, value); diff --git a/drivers/tsec.h b/drivers/tsec.h index 7bf3dee..c4b507b 100644 --- a/drivers/tsec.h +++ b/drivers/tsec.h @@ -42,6 +42,26 @@ #define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */ +/* TBI register addresses */ +#define TBI_CR 0x00 +#define TBI_SR 0x01 +#define TBI_ANA 0x04 +#define TBI_ANLPBPA 0x05 +#define TBI_ANEX 0x06 +#define TBI_TBICON 0x11 + +/* TBI MDIO register bit fields*/ +#define TBICON_CLK_SELECT 0x0020 +#define TBIANA_ASYMMETRIC_PAUSE 0x0100 +#define TBIANA_SYMMETRIC_PAUSE 0x0080 +#define TBIANA_HALF_DUPLEX 0x0040 +#define TBIANA_FULL_DUPLEX 0x0020 +#define TBICR_PHY_RESET 0x8000 +#define TBICR_ANEG_ENABLE 0x1000 +#define TBICR_RESTART_ANEG 0x0200 +#define TBICR_FULL_DUPLEX 0x0100 +#define TBICR_SPEED1_SET 0x0040 + /* MAC register bits */ #define MACCFG1_SOFT_RESET 0x80000000 #define MACCFG1_RESET_RX_MC 0x00080000 @@ -70,7 +90,7 @@ #define miim_end -2 #define miim_read -1 -#define TBIPA_VALUE 0x1f +#define TBIPA_VALUE 0x11 /* assigns 0x11-0x14 */ #define MIIMCFG_INIT_VALUE 0x00000003 #define MIIMCFG_RESET 0x80000000 -- 1.5.2.2.279.gf366

2 1

[U-Boot-Users] u-boot passes board id to linux issue
by Robert 14 Aug '07

14 Aug '07

Hi all, Could anybody tell me how does the Uboot pass the board id to linux kernel when booting system? Thanks in advance! With kind regards, Robert Xia

2 1

[U-Boot-Users] Cleanup output of MPC83xx boards
by Wolfgang Denk 14 Aug '07

14 Aug '07

Dear Kim, I would like to suggest to clean up the output printed by most MPC83xx boards a bit. What do you think about a patch like this one: @@ ... { u32 msize = 0; - puts ("Initializing\n"); msize = fixed_sdram (); - puts (" DDR RAM: "); return msize; } I think something like this should be applied toi the following files: board/sbc8349/sbc8349.c board/mpc832xemds/mpc832xemds.c board/mpc8360emds/mpc8360emds.c board/freescale/mpc8323erdb/mpc8323erdb.c board/mpc8349itx/mpc8349itx.c board/mpc8349emds/mpc8349emds.c board/mpc8313erdb/sdram.c Also, if I understand this correctly, these files use a hardwired memory size. I this correct? Do you have any plans to bring this in line with the normal U-Boot design philisophy which uses the memsize() function to automatically detect and adjust for the size of memory really present on a board, allowing to use the same image on differing configurations? Thanks, and best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Shakespeare's Law of Prototyping: (Hamlet III, iv, 156-160) O, throw away the worser part of it, And live the purer with the other half.

4 5

Re: [U-Boot-Users] [PATCH] Adds Marvell 88E1149S phy to tsec.c
by Andy Fleming 14 Aug '07

14 Aug '07

On Aug 3, 2007, at 02:40, Andy Fleming wrote: > Signed-off-by: Eran Liberty Applied Andy

1 0

[U-Boot-Users] 85xxCDS: Add make targets for legacy systems.
by Randy Vinson 14 Aug '07

14 Aug '07

>From 8bd3d40edb36a8b480aa6f2fbc0c8b3f2be5aae8 Mon Sep 17 00:00:00 2001 From: Randy Vinson <rvinson(a)linuxbox.(none)> Date: Tue, 27 Feb 2007 19:42:22 -0700 Subject: [PATCH] 85xxCDS: Add make targets for legacy systems. The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson(a)mvista.com> --- Makefile | 27 ++++++++++++++++++++++++--- board/cds/common/via.c | 2 +- board/cds/mpc8541cds/mpc8541cds.c | 15 +++++++++------ board/cds/mpc8548cds/mpc8548cds.c | 15 +++++++++------ board/cds/mpc8555cds/mpc8555cds.c | 15 +++++++++------ cpu/mpc85xx/pci.c | 2 +- include/configs/MPC8541CDS.h | 7 +++++++ include/configs/MPC8548CDS.h | 8 ++++++++ include/configs/MPC8555CDS.h | 7 +++++++ 9 files changed, 75 insertions(+), 23 deletions(-) diff --git a/Makefile b/Makefile index dd017d6..beb8a36 100644 --- a/Makefile +++ b/Makefile @@ -1751,17 +1751,38 @@ MPC8540EVAL_66_slave_config: unconfig MPC8560ADS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads +MPC8541CDS_legacy_config \ MPC8541CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8541cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds cds MPC8544DS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale +MPC8548CDS_legacy_config \ MPC8548CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8548cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds cds +MPC8555CDS_legacy_config \ MPC8555CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8555cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds cds MPC8568MDS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds diff --git a/board/cds/common/via.c b/board/cds/common/via.c index ba6cebe..d64701b 100644 --- a/board/cds/common/via.c +++ b/board/cds/common/via.c @@ -47,7 +47,7 @@ void mpc85xx_config_via(struct pci_controller *hose, * This allows legacy I/O (i8259, etc) on the VIA * southbridge to be accessed. */ - bridge = PCI_BDF(0,17,0); + bridge = PCI_BDF(0,BRIDGE_ID,0); pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0); pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0); pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10); diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c index 4192324..558ba99 100644 --- a/board/cds/mpc8541cds/mpc8541cds.c +++ b/board/cds/mpc8541cds/mpc8541cds.c @@ -476,14 +476,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 929ff2e..6b78a92 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -309,14 +309,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c index 704bf03..8f16421 100644 --- a/board/cds/mpc8555cds/mpc8555cds.c +++ b/board/cds/mpc8555cds/mpc8555cds.c @@ -473,14 +473,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c index 3c1a323..db09e45 100644 --- a/cpu/mpc85xx/pci.c +++ b/cpu/mpc85xx/pci.c @@ -142,7 +142,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose) u8 header_type; pci_hose_read_config_byte(hose, - PCI_BDF(0,17,0), + PCI_BDF(0,BRIDGE_ID,0), PCI_HEADER_TYPE, &header_type); } diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index fb360d2..515f1f4 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI2_IO_PHYS 0xe2100000 #define CFG_PCI2_IO_SIZE 0x100000 /* 1M */ +#ifdef CONFIG_LEGACY +#define BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define BRIDGE_ID 28 +#define VIA_ID 4 +#endif #if defined(CONFIG_PCI) diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 680009d..6519bf7 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -369,6 +369,14 @@ extern unsigned long get_clock_freq(void); #define CFG_RIO_MEM_BASE 0xC0000000 #define CFG_RIO_MEM_SIZE 0x20000000 /* 512M */ +#ifdef CONFIG_LEGACY +#define BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define BRIDGE_ID 28 +#define VIA_ID 4 +#endif + #if defined(CONFIG_PCI) #define CONFIG_NET_MULTI diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 4c8b4e7..bf256a0 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI2_IO_PHYS 0xe2100000 #define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */ +#ifdef CONFIG_LEGACY +#define ARCADIA_BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define ARCADIA_BRIDGE_ID 28 +#define VIA_ID 4 +#endif #if defined(CONFIG_PCI) -- 1.5.3.rc2.22.g69a9b

2 1

[U-Boot-Users] 85xxCDS: Enable the VIA PCI-to-ISA bridge.
by Randy Vinson 14 Aug '07

14 Aug '07

>From 97a4daa4c4947a9de36aaf22e8ab622b0cd9a0dc Mon Sep 17 00:00:00 2001 From: Randy Vinson <rvinson(a)linuxbox.(none)> Date: Wed, 28 Feb 2007 14:37:48 -0700 Subject: [PATCH] 85xxCDS: Enable the VIA PCI-to-ISA bridge. Enable the PCI-to-ISA bridge in the VIA Southbridge located on the Arcadia main board. The code for this patch was provided by Freescale. Signed-off-by Randy Vinson <rvinson(a)mvista.com> --- board/cds/common/via.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/board/cds/common/via.c b/board/cds/common/via.c index e79bd02..ba6cebe 100644 --- a/board/cds/common/via.c +++ b/board/cds/common/via.c @@ -28,12 +28,19 @@ void mpc85xx_config_via(struct pci_controller *hose, pci_dev_t dev, struct pci_config_table *tab) { pci_dev_t bridge; + unsigned int cmdstat; /* Enable USB and IDE functions */ pci_hose_write_config_byte(hose, dev, 0x48, 0x08); pciauto_config_device(hose, dev); + pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); + cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY| PCI_COMMAND_MASTER; + pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); + /* * Force the backplane P2P bridge to have a window * open from 0x00000000-0x00001fff in PCI I/O space. -- 1.5.3.rc2.22.g69a9b

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[U-Boot-Users] Problem
by Shi ZeQin 14 Aug '07

14 Aug '07

1 0

[U-Boot-Users] Animated card
by fruchtelinchen＠hdinsure.com 14 Aug '07

14 Aug '07

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Re: [U-Boot-Users] Question about CONFIG_MPC83XX
by Kim Phillips 13 Aug '07

13 Aug '07

On Wed, 8 Aug 2007 17:06:32 -0500 Kim Phillips <kim.phillips(a)freescale.com> wrote: > On Tue, 7 Aug 2007 15:06:38 -0700 > Bruce_Leonard(a)selinc.com wrote: > > > I'm working on porting u-boot to my custom HW (using MPC8347E) and I'm > > curious about the CONFIG_MPC83XX flag. I started with a copy of the > > MPC8349ITX.h file for my config and it defines CONFIG_MPC834X and > > CONFIG_MPC8349. But there's a field called bi_immrbar in the bd_info > > struct (.../include/asm-ppc/u-boot.h) surrounded by a check for > > CONFIG_MPC83XX. Now it seems to me that this field should be applicable > > to the 834x processors as well. So my questions is two fold: 1) why > > doesn't the MPC8349ITX board define CONFIG_MPC83XX to pick it up, and 2) it should, but Linux works without it because the ITX only went into ARCH=powerpc kernels which get the immr from device tree. > > should I be doing so for an MPC8347E processor? in general, yes. Kim

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