August 2007 - U-Boot

[U-Boot-Users] [PATCH] cpu/86xx fixes.
by Jon Loeliger 10 Aug '07

10 Aug '07

Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- cpu/mpc86xx/cpu_init.c | 4 +- cpu/mpc86xx/interrupts.c | 51 ++++++++++++++----------- cpu/mpc86xx/start.S | 85 +++++++----------------------------------- cpu/mpc86xx/traps.c | 8 +++- include/asm-ppc/immap_86xx.h | 16 ++++++-- include/asm-ppc/processor.h | 3 +- 6 files changed, 65 insertions(+), 102 deletions(-) diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index 4673d05..c8e4666 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -104,8 +104,8 @@ void cpu_init_f(void) /* enable the timebase bit in HID0 */ set_hid0(get_hid0() | 0x4000000); - /* enable SYNCBE | ABE bits in HID1 */ - set_hid1(get_hid1() | 0x00000C00); + /* enable EMCP, SYNCBE | ABE bits in HID1 */ + set_hid1(get_hid1() | 0x80000C00); } /* diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c index 08e0675..d9f634f 100644 --- a/cpu/mpc86xx/interrupts.c +++ b/cpu/mpc86xx/interrupts.c @@ -8,7 +8,7 @@ * (C) Copyright 2003 Motorola Inc. (MPC85xx port) * Xianghua Xiao (X.Xiao(a)motorola.com) * - * (C) Copyright 2004 Freescale Semiconductor. (MPC86xx Port) + * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port) * Jeff Brown * Srikanth Srinivasan (srikanth.srinivasan(a)freescale.com) * @@ -80,25 +80,10 @@ int interrupt_init(void) { int ret; - /* - * The IRQ0 on Rev 2 is pulled high (low in Rev 1.x) to - * implement PEX10 errata. As INT is active high, it - * will cause core to take 0x500 interrupt. - * - * Due to the PIC's default pass through mode, as soon - * as interrupts are enabled (MSR[EE] = 1), an interrupt - * will be taken and u-boot will hang. This is due to a - * hardware change (per an errata fix) on new revisions - * of the board with Rev 2.x parts. - * - * Setting the PIC to mixed mode prevents the hang. - */ - if ((get_svr() & 0xf0) == 0x20) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; - immr->im_pic.gcr = MPC86xx_PICGCR_RST; - while (immr->im_pic.gcr & MPC86xx_PICGCR_RST); - immr->im_pic.gcr = MPC86xx_PICGCR_MODE; - } + volatile immap_t *immr = (immap_t *)CFG_IMMR; + immr->im_pic.gcr = MPC86xx_PICGCR_RST; + while (immr->im_pic.gcr & MPC86xx_PICGCR_RST); + immr->im_pic.gcr = MPC86xx_PICGCR_MODE; /* call cpu specific function from $(CPU)/interrupts.c */ ret = interrupt_init_cpu(&decrementer_count); @@ -119,6 +104,30 @@ int interrupt_init(void) get_msr(), get_dec()); +#ifdef CONFIG_INTERRUPTS + volatile ccsr_pic_t *pic = &immr->im_pic; + + pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */ + debug("iivpr1@%x = %x\n", &pic->iivpr1, pic->iivpr1); + + pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ + debug("iivpr2@%x = %x\n", &pic->iivpr2, pic->iivpr2); + + pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ + debug("iivpr3@%x = %x\n", &pic->iivpr3, pic->iivpr3); + +#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1) + pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */ + debug("iivpr8@%x = %x\n", &pic->iivpr8, pic->iivpr8); +#endif +#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) + pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */ + debug("iivpr9@%x = %x\n", &pic->iivpr9, pic->iivpr9); +#endif + + pic->ctpr = 0; /* 40080 clear current task priority register */ +#endif + return 0; } @@ -158,8 +167,6 @@ void timer_interrupt(struct pt_regs *regs) timestamp++; - ppcDcbf((unsigned long)&timestamp); - /* Restore Decrementer Count */ set_dec(decrementer_count); diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 412745b..c83310a 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2007 Freescale Semiconductor. * Srikanth Srinivasan <srikanth.srinivaan(a)freescale.com> * * See file CREDITS for list of people who contributed to this @@ -44,11 +44,9 @@ #define CONFIG_IDENT_STRING "" #endif -/* We don't want the MMU yet. -*/ -#undef MSR_KERNEL -/* Machine Check and Recoverable Interr. */ -#define MSR_KERNEL ( MSR_ME | MSR_RI ) +/* + * Need MSR_DR | MSR_IR enabled to access I/O (printf) in exceptions + */ /* * Set up GOT: Global Offset Table @@ -195,17 +193,21 @@ boot_warm: bl secondary_cpu_setup #endif +1: +#ifdef CFG_RAMBOOT /* disable everything */ -1: li r0, 0 + li r0, 0 mtspr HID0, r0 sync mtmsr 0 +#endif + bl invalidate_bats sync #ifdef CFG_L2 /* init the L2 cache */ - addis r3, r0, L2_INIT@h + lis r3, L2_INIT@h ori r3, r3, L2_INIT@l mtspr l2cr, r3 /* invalidate the L2 cache */ @@ -241,69 +243,9 @@ in_flash: bl setup_ccsrbar #endif - - /* -- MPC8641 Rev 1.0 MCM Errata fixups -- */ - - /* skip fixups if not Rev 1.0 */ - mfspr r4, SVR - rlwinm r4,r4,0,24,31 - cmpwi r4,0x10 - bne 1f - - lis r3,MCM_ABCR@ha - lwz r4,MCM_ABCR@l(r3) /* ABCR -> r4 */ - - /* set ABCR[A_STRM_CNT] = 0 */ - rlwinm r4,r4,0,0,29 - - /* set ABCR[ARB_POLICY] to 0x1 (round-robin) */ - addi r0,r0,1 - rlwimi r4,r0,12,18,19 - - stw r4,MCM_ABCR@l(r3) /* r4 -> ABCR */ - sync - - /* Set DBCR[ERD_DIS] */ - lis r3,MCM_DBCR@ha - lwz r4,MCM_DBCR@l(r3) - oris r4, r4, 0x4000 - stw r4,MCM_DBCR@l(r3) - sync -1: /* setup the law entries */ bl law_entry sync - - -#if (EMULATOR_RUN == 1) - /* On the emulator we want to adjust these ASAP */ - /* otherwise things are sloooow */ - /* Setup OR0 (LALE FIX)*/ - lis r3, CFG_CCSRBAR@h - ori r3, r3, 0x5004 - li r4, 0x0FF3 - stw r4, 0(r3) - sync - - /* Setup LCRR */ - lis r3, CFG_CCSRBAR@h - ori r3, r3, 0x50D4 - lis r4, 0x8000 - ori r4, r4, 0x0002 - stw r4, 0(r3) - sync -#endif -#if 1 - /* make sure timer enabled in guts register too */ - lis r3, CFG_CCSRBAR@h - oris r3,r3, 0xE - ori r3,r3,0x0070 - lwz r4, 0(r3) - lis r5,0xFFFC - ori r5,r5,0x5FFF - and r4,r4,r5 - stw r4,0(r3) -#endif /* * Cache must be enabled here for stack-in-cache trick. * This means we need to enable the BATS. @@ -346,8 +288,6 @@ in_flash: #ifdef RUN_DIAG - /* Sri: Code to run the diagnostic automatically */ - /* Load PX_AUX register address in r4 */ lis r4, 0xf810 ori r4, r4, 0x6 @@ -392,6 +332,7 @@ diag_done: .globl invalidate_bats invalidate_bats: + li r0, 0 /* invalidate BATs */ mtspr IBAT0U, r0 mtspr IBAT1U, r0 @@ -1040,6 +981,7 @@ trap_init: mfmsr r7 li r8,MSR_IP andc r7,r7,r8 + ori r7,r7,MSR_ME /* Enable Machine Check */ mtmsr r7 mtlr r4 /* restore link register */ @@ -1224,8 +1166,9 @@ secondary_cpu_setup: sync isync - /*SYNCBE|ABE in HID1*/ + /* MCP|SYNCBE|ABE in HID1 */ mfspr r4, HID1 + oris r4, r4, 0x8000 ori r4, r4, 0x0C00 mtspr HID1, r4 sync diff --git a/cpu/mpc86xx/traps.c b/cpu/mpc86xx/traps.c index fab1975..c84bfbf 100644 --- a/cpu/mpc86xx/traps.c +++ b/cpu/mpc86xx/traps.c @@ -130,8 +130,11 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ", regs); - switch (regs->msr & 0x000F0000) { - case (0x80000000 >> 12): + switch ( regs->msr & 0x001F0000) { + case (0x80000000>>11): + printf("MSS error. MSSSR0: %08x\n", mfspr(SPRN_MSSSR0)); + break; + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; @@ -209,6 +212,7 @@ UnknownException(struct pt_regs *regs) if (debugger_exception_handler && (*debugger_exception_handler) (regs)) return; #endif + printf("UnknownException regs@%x\n", regs); printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", regs->nip, regs->msr, regs->trap); _exception(0, regs); diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index 0e3fc34..169725b 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -1257,9 +1257,12 @@ typedef struct ccsr_gur { uint porpllsr; /* 0xe0000 - POR PLL ratio status register */ uint porbmsr; /* 0xe0004 - POR boot mode status register */ #define MPC86xx_PORBMSR_HA 0x00060000 +#define MPC85xx_PORBMSR_HA 0x00070000 uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ uint pordevsr; /* 0xe000c - POR I/O device status regsiter */ -#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000 +#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000 +#define MPC85xx_PORDEVSR_IO_SEL 0x00380000 /* 85xx platform type */ +#define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */ uint pordbgmsr; /* 0xe0010 - POR debug mode status register */ char res1[12]; uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */ @@ -1273,8 +1276,11 @@ typedef struct ccsr_gur { uint pmuxcr; /* 0xe0060 - Alternate function signal multiplex control */ char res6[12]; uint devdisr; /* 0xe0070 - Device disable control */ -#define MPC86xx_DEVDISR_PCIEX1 0x80000000 -#define MPC86xx_DEVDISR_PCIEX2 0x40000000 +#define MPC86xx_DEVDISR_PCIEX1 0x80000000 +#define MPC86xx_DEVDISR_PCIEX2 0x40000000 +#define MPC86xx_DEVDISR_PCI1 0x80000000 +#define MPC86xx_DEVDISR_PCIE1 0x40000000 +#define MPC86xx_DEVDISR_PCIE2 0x20000000 char res7[12]; uint powmgtcsr; /* 0xe0080 - Power management status and control register */ char res8[12]; @@ -1282,7 +1288,9 @@ typedef struct ccsr_gur { char res9[12]; uint pvr; /* 0xe00a0 - Processor version register */ uint svr; /* 0xe00a4 - System version register */ - char res10[3416]; + char res10a[1880]; + uint clkdvdr; /* 0xe0800 - Clock Divide register */ + char res10b[1532]; uint clkocr; /* 0xe0e00 - Clock out select register */ char res11[12]; uint ddrdllcr; /* 0xe0e10 - DDR DLL control register */ diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 71e2e84..b806cc0 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -464,7 +464,8 @@ #define ESR_ST 0x00800000 /* Store Operation */ #if defined(CONFIG_MPC86xx) -#define SPRN_MSSCRO 0x3f6 +#define SPRN_MSSCR0 0x3f6 +#define SPRN_MSSSR0 0x3f7 #endif -- 1.5.0.3

1 0

[U-Boot-Users] [PATCH] make MAKEALL more immune to merge conflicts
by Kim Phillips 10 Aug '07

10 Aug '07

..by placing board entries one per line, as suggested by jdl. Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- MAKEALL | 583 +++++++++++++++++++++++++++++++++++++++++++++++---------------- 1 files changed, 436 insertions(+), 147 deletions(-) diff --git a/MAKEALL b/MAKEALL index 8c241f6..b69b6bf 100755 --- a/MAKEALL +++ b/MAKEALL @@ -26,124 +26,281 @@ LIST="" ## MPC5xx Systems ######################################################################### -LIST_5xx=" \ - cmi_mpc5xx \ +LIST_5xx=" \ + cmi_mpc5xx \ " ######################################################################### ## MPC5xxx Systems ######################################################################### -LIST_5xxx=" \ - BC3450 cm1_qp1 cpci5200 EVAL5200 \ - fo300 icecube_5100 icecube_5200 lite5200b \ - mcc200 mecp5200 motionpro o2dnt \ - pf5200 PM520 TB5200 Total5100 \ - Total5200 Total5200_Rev2 TQM5200 TQM5200_B \ - TQM5200S v38b \ +LIST_5xxx=" \ + BC3450 \ + cm1_qp1 \ + cpci5200 \ + EVAL5200 \ + fo300 \ + icecube_5100 \ + icecube_5200 \ + lite5200b \ + mcc200 \ + mecp5200 \ + motionpro \ + o2dnt \ + pf5200 \ + PM520 \ + TB5200 \ + Total5100 \ + Total5200 \ + Total5200_Rev2 \ + TQM5200 \ + TQM5200_B \ + TQM5200S \ + v38b \ " ######################################################################### ## MPC512x Systems ######################################################################### -LIST_512x=" \ - ads5121 \ +LIST_512x=" \ + ads5121 \ " ######################################################################### ## MPC8xx Systems ######################################################################### -LIST_8xx=" \ - Adder87x GENIETV MBX860T R360MPI \ - AdderII GTH MHPC RBC823 \ - ADS860 hermes MPC86xADS rmu \ - AMX860 IAD210 MPC885ADS RPXClassic \ - c2mon ICU862_100MHz MVS1 RPXlite \ - CCM IP860 NETPHONE RPXlite_DW \ - cogent_mpc8xx IVML24 NETTA RRvision \ - ELPT860 IVML24_128 NETTA2 SM850 \ - EP88x IVML24_256 NETTA_ISDN spc1920 \ - ESTEEM192E IVMS8 NETVIA SPD823TS \ - ETX094 IVMS8_128 NETVIA_V2 svm_sc8xx \ - FADS823 IVMS8_256 NX823 SXNI855T \ - FADS850SAR KUP4K pcu_e TOP860 \ - FADS860T KUP4X QS823 TQM823L \ - FLAGADM LANTEC QS850 TQM823L_LCD \ - FPS850L lwmon QS860T TQM850L \ - GEN860T MBX quantum TQM855L \ - GEN860T_SC TQM860L \ - TQM885D \ - uc100 \ - v37 \ +LIST_8xx=" \ + Adder87x \ + AdderII \ + ADS860 \ + AMX860 \ + c2mon \ + CCM \ + cogent_mpc8xx \ + ELPT860 \ + EP88x \ + ESTEEM192E \ + ETX094 \ + FADS823 \ + FADS850SAR \ + FADS860T \ + FLAGADM \ + FPS850L \ + GEN860T \ + GEN860T_SC \ + GENIETV \ + GTH \ + hermes \ + IAD210 \ + ICU862_100MHz \ + IP860 \ + IVML24 \ + IVML24_128 \ + IVML24_256 \ + IVMS8 \ + IVMS8_128 \ + IVMS8_256 \ + KUP4K \ + KUP4X \ + LANTEC \ + lwmon \ + MBX \ + MBX860T \ + MHPC \ + MPC86xADS \ + MPC885ADS \ + MVS1 \ + NETPHONE \ + NETTA \ + NETTA2 \ + NETTA_ISDN \ + NETVIA \ + NETVIA_V2 \ + NX823 \ + pcu_e \ + QS823 \ + QS850 \ + QS860T \ + quantum \ + R360MPI \ + RBC823 \ + rmu \ + RPXClassic \ + RPXlite \ + RPXlite_DW \ + RRvision \ + SM850 \ + spc1920 \ + SPD823TS \ + svm_sc8xx \ + SXNI855T \ + TOP860 \ + TQM823L \ + TQM823L_LCD \ + TQM850L \ + TQM855L \ + TQM860L \ + TQM885D \ + uc100 \ + v37 \ " ######################################################################### ## PPC4xx Systems ######################################################################### -LIST_4xx=" \ - acadia acadia_nand ADCIOP alpr \ - AP1000 AR405 ASH405 bamboo \ - bamboo_nand bubinga CANBT CMS700 \ - CPCI2DP CPCI405 CPCI4052 CPCI405AB \ - CPCI405DT CPCI440 CPCIISER4 CRAYL1 \ - csb272 csb472 DASA_SIM DP405 \ - DU405 ebony ERIC EXBITGEN \ - G2000 HH405 HUB405 JSE \ - KAREF katmai luan lwmon5 \ - METROBOX MIP405 MIP405T ML2 \ - ml300 ocotea OCRTC ORSG \ - p3p440 PCI405 pcs440ep PIP405 \ - PLU405 PMC405 PPChameleonEVB sbc405 \ - sc3 sequoia sequoia_nand taishan \ - VOH405 VOM405 W7OLMC W7OLMG \ - walnut WUH405 XPEDITE1K yellowstone \ - yosemite yucca \ +LIST_4xx=" \ + acadia \ + acadia_nand \ + ADCIOP \ + alpr \ + AP1000 \ + AR405 \ + ASH405 \ + bamboo \ + bamboo_nand \ + bubinga \ + CANBT \ + CMS700 \ + CPCI2DP \ + CPCI405 \ + CPCI4052 \ + CPCI405AB \ + CPCI405DT \ + CPCI440 \ + CPCIISER4 \ + CRAYL1 \ + csb272 \ + csb472 \ + DASA_SIM \ + DP405 \ + DU405 \ + ebony \ + ERIC \ + EXBITGEN \ + G2000 \ + HH405 \ + HUB405 \ + JSE \ + KAREF \ + katmai \ + luan \ + lwmon5 \ + METROBOX \ + MIP405 \ + MIP405T \ + ML2 \ + ml300 \ + ocotea \ + OCRTC \ + ORSG \ + p3p440 \ + PCI405 \ + pcs440ep \ + PIP405 \ + PLU405 \ + PMC405 \ + PPChameleonEVB \ + sbc405 \ + sc3 \ + sequoia \ + sequoia_nand \ + taishan \ + VOH405 \ + VOM405 \ + W7OLMC \ + W7OLMG \ + walnut \ + WUH405 \ + XPEDITE1K \ + yellowstone \ + yosemite \ + yucca \ " ######################################################################### ## MPC8220 Systems ######################################################################### -LIST_8220=" \ - Alaska8220 Yukon8220 \ +LIST_8220=" \ + Alaska8220 \ + Yukon8220 \ " ######################################################################### ## MPC824x Systems ######################################################################### -LIST_824x=" \ - A3000 barco BMW CPC45 \ - CU824 debris eXalion HIDDEN_DRAGON \ - MOUSSE MUSENKI MVBLUE \ - OXC PN62 Sandpoint8240 Sandpoint8245 \ - sbc8240 SL8245 utx8245 \ +LIST_824x=" \ + A3000 \ + barco \ + BMW \ + CPC45 \ + CU824 \ + debris \ + eXalion \ + HIDDEN_DRAGON \ + MOUSSE \ + MUSENKI \ + MVBLUE \ + OXC \ + PN62 \ + Sandpoint8240 \ + Sandpoint8245 \ + sbc8240 \ + SL8245 \ + utx8245 \ " ######################################################################### ## MPC8260 Systems (includes 8250, 8255 etc.) ######################################################################### -LIST_8260=" \ - atc cogent_mpc8260 CPU86 CPU87 \ - ep8248 ep8260 ep82xxm gw8260 \ - hymod IPHASE4539 ISPAN MPC8260ADS \ - MPC8266ADS MPC8272ADS PM826 PM828 \ - ppmc8260 Rattler8248 RPXsuper rsdproto \ - sacsng sbc8260 SCM TQM8260_AC \ - TQM8260_AD TQM8260_AE ZPC1900 \ +LIST_8260=" \ + atc \ + cogent_mpc8260 \ + CPU86 \ + CPU87 \ + ep8248 \ + ep8260 \ + ep82xxm \ + gw8260 \ + hymod \ + IPHASE4539 \ + ISPAN \ + MPC8260ADS \ + MPC8266ADS \ + MPC8272ADS \ + PM826 \ + PM828 \ + ppmc8260 \ + Rattler8248 \ + RPXsuper \ + rsdproto \ + sacsng \ + sbc8260 \ + SCM \ + TQM8260_AC \ + TQM8260_AD \ + TQM8260_AE \ + ZPC1900 \ " ######################################################################### ## MPC83xx Systems (includes 8349, etc.) ######################################################################### -LIST_83xx=" \ - MPC8313ERDB_33 MPC8313ERDB_66 MPC832XEMDS MPC8349EMDS \ - MPC8349ITX MPC8349ITXGP MPC8360EMDS sbc8349 \ - TQM834x \ +LIST_83xx=" \ + MPC8313ERDB_33 \ + MPC8313ERDB_66 \ + MPC832XEMDS \ + MPC8349EMDS \ + MPC8349ITX \ + MPC8349ITXGP \ + MPC8360EMDS \ + sbc8349 \ + TQM834x \ " @@ -151,123 +308,223 @@ LIST_83xx=" \ ## MPC85xx Systems (includes 8540, 8560 etc.) ######################################################################### -LIST_85xx=" \ - MPC8540ADS MPC8540EVAL MPC8541CDS MPC8544DS \ - MPC8548CDS MPC8555CDS MPC8560ADS MPC8568MDS \ - PM854 PM856 sbc8540 sbc8560 \ - stxgp3 stxssa TQM8540 TQM8541 \ - TQM8555 TQM8560 \ +LIST_85xx=" \ + MPC8540ADS \ + MPC8540EVAL \ + MPC8541CDS \ + MPC8544DS \ + MPC8548CDS \ + MPC8555CDS \ + MPC8560ADS \ + MPC8568MDS \ + PM854 \ + PM856 \ + sbc8540 \ + sbc8560 \ + stxgp3 \ + stxssa \ + TQM8540 \ + TQM8541 \ + TQM8555 \ + TQM8560 \ " ######################################################################### ## MPC86xx Systems ######################################################################### -LIST_86xx=" \ - MPC8641HPCN \ +LIST_86xx=" \ + MPC8641HPCN \ " ######################################################################### ## 74xx/7xx Systems ######################################################################### -LIST_74xx=" \ - DB64360 DB64460 EVB64260 P3G4 \ - p3m7448 PCIPPC2 PCIPPC6 ZUMA \ - mpc7448hpc2 +LIST_74xx=" \ + DB64360 \ + DB64460 \ + EVB64260 \ + mpc7448hpc2 \ + P3G4 \ + p3m7448 \ + PCIPPC2 \ + PCIPPC6 \ + ZUMA \ " -LIST_7xx=" \ - BAB7xx CPCI750 ELPPC p3m750 \ - ppmc7xx \ +LIST_7xx=" \ + BAB7xx \ + CPCI750 \ + ELPPC \ + p3m750 \ + ppmc7xx \ " -LIST_ppc="${LIST_5xx} ${LIST_5xxx} \ - ${LIST_8xx} \ - ${LIST_8220} ${LIST_824x} ${LIST_8260} \ - ${LIST_83xx} \ - ${LIST_85xx} \ - ${LIST_86xx} \ - ${LIST_4xx} \ - ${LIST_74xx} ${LIST_7xx}" +LIST_ppc=" \ + ${LIST_5xx} \ + ${LIST_5xxx} \ + ${LIST_8xx} \ + ${LIST_8220} \ + ${LIST_824x} \ + ${LIST_8260} \ + ${LIST_83xx} \ + ${LIST_85xx} \ + ${LIST_86xx} \ + ${LIST_4xx} \ + ${LIST_74xx} \ + ${LIST_7xx} \ +" ######################################################################### ## StrongARM Systems ######################################################################### -LIST_SA="assabet dnp1110 gcplus lart shannon" +LIST_SA=" \ + assabet \ + dnp1110 \ + gcplus \ + lart \ + shannon \ +" ######################################################################### ## ARM7 Systems ######################################################################### -LIST_ARM7=" \ - armadillo B2 ep7312 evb4510 \ - impa7 integratorap ap7 ap720t \ - lpc2292sodimm modnet50 SMN42 \ +LIST_ARM7=" \ + ap7 \ + ap720t \ + armadillo \ + B2 \ + ep7312 \ + evb4510 \ + impa7 \ + integratorap \ + lpc2292sodimm \ + modnet50 \ + SMN42 \ " ######################################################################### ## ARM9 Systems ######################################################################### -LIST_ARM9=" \ - at91rm9200dk cmc_pu2 \ - ap920t ap922_XA10 ap926ejs ap946es \ - ap966 cp920t cp922_XA10 cp926ejs \ - cp946es cp966 lpd7a400 mp2usb \ - mx1ads mx1fs2 netstar omap1510inn \ - omap1610h2 omap1610inn omap730p2 sbc2410x \ - scb9328 smdk2400 smdk2410 trab \ - VCMA9 versatile versatileab versatilepb \ - voiceblue \ +LIST_ARM9=" \ + at91rm9200dk \ + cmc_pu2 \ + ap920t \ + ap922_XA10 \ + ap926ejs \ + ap946es \ + ap966 \ + cp920t \ + cp922_XA10 \ + cp926ejs \ + cp946es \ + cp966 \ + lpd7a400 \ + mp2usb \ + mx1ads \ + mx1fs2 \ + netstar \ + omap1510inn \ + omap1610h2 \ + omap1610inn \ + omap730p2 \ + sbc2410x \ + scb9328 \ + smdk2400 \ + smdk2410 \ + trab \ + VCMA9 \ + versatile \ + versatileab \ + versatilepb \ + voiceblue \ " ######################################################################### ## ARM10 Systems ######################################################################### -LIST_ARM10=" \ - integratorcp cp1026 \ +LIST_ARM10=" \ + integratorcp \ + cp1026 \ " ######################################################################### ## ARM11 Systems ######################################################################### -LIST_ARM11=" \ - cp1136 omap2420h4 \ +LIST_ARM11=" \ + cp1136 \ + omap2420h4 \ " ######################################################################### ## Xscale Systems ######################################################################### -LIST_pxa=" \ - adsvix cerf250 cradle csb226 \ - delta innokom lubbock pleb2 \ - pxa255_idp wepep250 xaeniax xm250 \ - xsengine zylonite \ +LIST_pxa=" \ + adsvix \ + cerf250 \ + cradle \ + csb226 \ + delta \ + innokom \ + lubbock \ + pleb2 \ + pxa255_idp \ + wepep250 \ + xaeniax \ + xm250 \ + xsengine \ + zylonite \ " -LIST_ixp="ixdp425 ixdpg425 pdnb3 scpu" +LIST_ixp=" \ + ixdp425 \ + ixdpg425 \ + pdnb3 \ + scpu \ +" -LIST_arm=" \ - ${LIST_SA} \ - ${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM10} ${LIST_ARM11} \ - ${LIST_pxa} ${LIST_ixp} \ +LIST_arm=" \ + ${LIST_SA} \ + ${LIST_ARM7} \ + ${LIST_ARM9} \ + ${LIST_ARM10} \ + ${LIST_ARM11} \ + ${LIST_pxa} \ + ${LIST_ixp} \ " ######################################################################### ## MIPS Systems (default = big endian) ######################################################################### -LIST_mips4kc="incaip" +LIST_mips4kc=" \ + incaip \ +" -LIST_mips5kc="purple" +LIST_mips5kc=" \ + purple \ +" -LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el gth2" +LIST_au1xx0=" \ + dbau1000 \ + dbau1100 \ + dbau1500 \ + dbau1550 \ + dbau1550_el \ + gth2 \ +" -LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}" +LIST_mips=" \ + ${LIST_mips4kc} \ + ${LIST_mips5kc} \ + ${LIST_au1xx0} \ +" ######################################################################### ## MIPS Systems (little endian) @@ -277,36 +534,55 @@ LIST_mips4kc_el="" LIST_mips5kc_el="" -LIST_au1xx0_el="dbau1550_el" +LIST_au1xx0_el=" \ + dbau1550_el \ +" -LIST_mips_el="${LIST_mips4kc_el} ${LIST_mips5kc_el} ${LIST_au1xx0_el}" +LIST_mips_el=" \ + ${LIST_mips4kc_el} \ + ${LIST_mips5kc_el} \ + ${LIST_au1xx0_el} \ +" ######################################################################### ## i386 Systems ######################################################################### -LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel" +LIST_I486=" \ + sc520_cdp \ + sc520_spunk \ + sc520_spunk_rel \ +" -LIST_x86="${LIST_I486}" +LIST_x86=" \ + ${LIST_I486} \ +" ######################################################################### ## NIOS Systems ######################################################################### -LIST_nios=" \ - ADNPESC1 ADNPESC1_base_32 \ - ADNPESC1_DNPEVA2_base_32 \ - DK1C20 DK1C20_standard_32 \ - DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \ +LIST_nios=" \ + ADNPESC1 \ + ADNPESC1_base_32 \ + ADNPESC1_DNPEVA2_base_32\ + DK1C20 \ + DK1C20_standard_32 \ + DK1S10 \ + DK1S10_standard_32 \ + DK1S10_mtx_ldk_20 \ " ######################################################################### ## Nios-II Systems ######################################################################### -LIST_nios2=" \ - EP1C20 EP1S10 EP1S40 \ - PCI5441 PK1C20 \ +LIST_nios2=" \ + EP1C20 \ + EP1S10 \ + EP1S40 \ + PCI5441 \ + PK1C20 \ " ######################################################################### @@ -314,31 +590,44 @@ LIST_nios2=" \ ######################################################################### LIST_microblaze=" \ - suzaku ml401 xupv2p + suzaku \ + ml401 \ + xupv2p \ " ######################################################################### ## ColdFire Systems ######################################################################### -LIST_coldfire=" \ - cobra5272 EB+MCF-EV123 EB+MCF-EV123_internal \ - idmr M5271EVB M5272C3 M5282EVB \ - TASREG r5200 M5271EVB \ +LIST_coldfire=" \ + cobra5272 \ + EB+MCF-EV123 \ + EB+MCF-EV123_internal \ + idmr \ + M5271EVB \ + M5272C3 \ + M5282EVB \ + TASREG \ + r5200 \ " ######################################################################### ## AVR32 Systems ######################################################################### -LIST_avr32="atstk1002" +LIST_avr32=" \ + atstk1002 \ +" ######################################################################### ## Blackfin Systems ######################################################################### -LIST_blackfin=" \ - bf533-ezkit bf533-stamp bf537-stamp bf561-ezkit \ +LIST_blackfin=" \ + bf533-ezkit \ + bf533-stamp \ + bf537-stamp \ + bf561-ezkit \ " #----------------------------------------------------------------------- -- 1.5.2.2

9 16

[U-Boot-Users] [ARM] TI DaVinci support, hopefully final [1/5]
by ksi＠koi8.net 10 Aug '07

10 Aug '07

Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> diff -purN u-boot.git.orig/board/davinci/dv-evm/board_init.S u-boot.git/board/davinci/dv-evm/board_init.S --- u-boot.git.orig/board/davinci/dv-evm/board_init.S 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/dv-evm/board_init.S 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff -purN u-boot.git.orig/board/davinci/dv-evm/config.mk u-boot.git/board/davinci/dv-evm/config.mk --- u-boot.git.orig/board/davinci/dv-evm/config.mk 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/dv-evm/config.mk 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,39 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# (C) Copyright 2003 +# Texas Instruments, <www.ti.com> +# Swaminathan <swami.iyer(a)ti.com> +# +# Davinci EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# Davinci EVM has 1 bank of 256 MB DDR RAM +# Physical Address: +# 8000'0000 to 9000'0000 +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# Visioneering Corp. Sonata board (ARM926EJS) cpu +# +# Sonata board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu +# +# Schmoogie board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# we load ourself to 8108 '0000 +# +# + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0x81080000 diff -purN u-boot.git.orig/board/davinci/dv-evm/dv_board.c u-boot.git/board/davinci/dv-evm/dv_board.c --- u-boot.git.orig/board/davinci/dv-evm/dv_board.c 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/dv-evm/dv_board.c 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,211 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define MACH_TYPE_DAVINCI_EVM 901 + +extern void i2c_init(int speed, int slaveaddr); +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01) {;} + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + if ( (id == DAVINCI_LPSC_VPSSSLV) || + (id == DAVINCI_LPSC_EMAC) || + (id == DAVINCI_LPSC_EMAC_WRAPPER) || + (id == DAVINCI_LPSC_MDIO) || + (id == DAVINCI_LPSC_USB) || + (id == DAVINCI_LPSC_ATA) || + (id == DAVINCI_LPSC_VLYNQ) || + (id == DAVINCI_LPSC_UHPI) || + (id == DAVINCI_LPSC_DDR_EMIF) || + (id == DAVINCI_LPSC_AEMIF) || + (id == DAVINCI_LPSC_MMC_SD) || + (id == DAVINCI_LPSC_MEMSTICK) || + (id == DAVINCI_LPSC_McBSP) || + (id == DAVINCI_LPSC_GPIO) + ) + *mdctl |= 0x200; + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03) {;} + while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ +} + +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} + + +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Powerup the DSP */ + dsp_on(); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r (void) +{ + u_int8_t tmp[20], buf[10]; + int i = 0; + int clk = 0; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); + printf ("DDR Clock : %dMHz\n", (clk / 2)); + + /* Set Ethernet MAC address from EEPROM */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) { + printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR); + } else { + tmp[0] = 0xff; + for (i = 0; i < 6; i++) + tmp[0] &= buf[i]; + + if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { + sprintf((char *)&tmp[0], "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); + setenv("ethaddr", (char *)&tmp[0]); + } + } + + if (!eth_hw_init()) { + printf("ethernet init failed!\n"); + } else { + printf("ETH PHY : %s\n", phy.name); + } + + i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1); + + setenv ("videostd", ((i & 0x80) ? "pal" : "ntsc")); + + return(0); +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff -purN u-boot.git.orig/board/davinci/dv-evm/Makefile u-boot.git/board/davinci/dv-evm/Makefile --- u-boot.git.orig/board/davinci/dv-evm/Makefile 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/dv-evm/Makefile 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := dv_board.o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -purN u-boot.git.orig/board/davinci/dv-evm/u-boot.lds u-boot.git/board/davinci/dv-evm/u-boot.lds --- u-boot.git.orig/board/davinci/dv-evm/u-boot.lds 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/dv-evm/u-boot.lds 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -purN u-boot.git.orig/board/davinci/schmoogie/board_init.S u-boot.git/board/davinci/schmoogie/board_init.S --- u-boot.git.orig/board/davinci/schmoogie/board_init.S 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/schmoogie/board_init.S 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff -purN u-boot.git.orig/board/davinci/schmoogie/config.mk u-boot.git/board/davinci/schmoogie/config.mk --- u-boot.git.orig/board/davinci/schmoogie/config.mk 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/schmoogie/config.mk 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,39 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# (C) Copyright 2003 +# Texas Instruments, <www.ti.com> +# Swaminathan <swami.iyer(a)ti.com> +# +# Davinci EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# Davinci EVM has 1 bank of 256 MB DDR RAM +# Physical Address: +# 8000'0000 to 9000'0000 +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# Visioneering Corp. Sonata board (ARM926EJS) cpu +# +# Sonata board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu +# +# Schmoogie board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# we load ourself to 8108 '0000 +# +# + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0x81080000 diff -purN u-boot.git.orig/board/davinci/schmoogie/dv_board.c u-boot.git/board/davinci/schmoogie/dv_board.c --- u-boot.git.orig/board/davinci/schmoogie/dv_board.c 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/schmoogie/dv_board.c 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,253 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define MACH_TYPE_SCHMOOGIE 1255 + +extern void i2c_init(int speed, int slaveaddr); +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01) {;} + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + if ( (id == DAVINCI_LPSC_VPSSSLV) || + (id == DAVINCI_LPSC_EMAC) || + (id == DAVINCI_LPSC_EMAC_WRAPPER) || + (id == DAVINCI_LPSC_MDIO) || + (id == DAVINCI_LPSC_USB) || + (id == DAVINCI_LPSC_ATA) || + (id == DAVINCI_LPSC_VLYNQ) || + (id == DAVINCI_LPSC_UHPI) || + (id == DAVINCI_LPSC_DDR_EMIF) || + (id == DAVINCI_LPSC_AEMIF) || + (id == DAVINCI_LPSC_MMC_SD) || + (id == DAVINCI_LPSC_MEMSTICK) || + (id == DAVINCI_LPSC_McBSP) || + (id == DAVINCI_LPSC_GPIO) + ) + *mdctl |= 0x200; + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03) {;} + while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ +} + +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} + + +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SCHMOOGIE; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Powerup the DSP */ + dsp_on(); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r (void) +{ + u_int8_t tmp[20], buf[10]; + int i = 0; + int clk = 0; + + /* Set serial number from UID chip */ + u_int8_t crc_tbl[256] = { + 0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83, + 0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41, + 0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e, + 0x5f, 0x01, 0xe3, 0xbd, 0x3e, 0x60, 0x82, 0xdc, + 0x23, 0x7d, 0x9f, 0xc1, 0x42, 0x1c, 0xfe, 0xa0, + 0xe1, 0xbf, 0x5d, 0x03, 0x80, 0xde, 0x3c, 0x62, + 0xbe, 0xe0, 0x02, 0x5c, 0xdf, 0x81, 0x63, 0x3d, + 0x7c, 0x22, 0xc0, 0x9e, 0x1d, 0x43, 0xa1, 0xff, + 0x46, 0x18, 0xfa, 0xa4, 0x27, 0x79, 0x9b, 0xc5, + 0x84, 0xda, 0x38, 0x66, 0xe5, 0xbb, 0x59, 0x07, + 0xdb, 0x85, 0x67, 0x39, 0xba, 0xe4, 0x06, 0x58, + 0x19, 0x47, 0xa5, 0xfb, 0x78, 0x26, 0xc4, 0x9a, + 0x65, 0x3b, 0xd9, 0x87, 0x04, 0x5a, 0xb8, 0xe6, + 0xa7, 0xf9, 0x1b, 0x45, 0xc6, 0x98, 0x7a, 0x24, + 0xf8, 0xa6, 0x44, 0x1a, 0x99, 0xc7, 0x25, 0x7b, + 0x3a, 0x64, 0x86, 0xd8, 0x5b, 0x05, 0xe7, 0xb9, + 0x8c, 0xd2, 0x30, 0x6e, 0xed, 0xb3, 0x51, 0x0f, + 0x4e, 0x10, 0xf2, 0xac, 0x2f, 0x71, 0x93, 0xcd, + 0x11, 0x4f, 0xad, 0xf3, 0x70, 0x2e, 0xcc, 0x92, + 0xd3, 0x8d, 0x6f, 0x31, 0xb2, 0xec, 0x0e, 0x50, + 0xaf, 0xf1, 0x13, 0x4d, 0xce, 0x90, 0x72, 0x2c, + 0x6d, 0x33, 0xd1, 0x8f, 0x0c, 0x52, 0xb0, 0xee, + 0x32, 0x6c, 0x8e, 0xd0, 0x53, 0x0d, 0xef, 0xb1, + 0xf0, 0xae, 0x4c, 0x12, 0x91, 0xcf, 0x2d, 0x73, + 0xca, 0x94, 0x76, 0x28, 0xab, 0xf5, 0x17, 0x49, + 0x08, 0x56, 0xb4, 0xea, 0x69, 0x37, 0xd5, 0x8b, + 0x57, 0x09, 0xeb, 0xb5, 0x36, 0x68, 0x8a, 0xd4, + 0x95, 0xcb, 0x29, 0x77, 0xf4, 0xaa, 0x48, 0x16, + 0xe9, 0xb7, 0x55, 0x0b, 0x88, 0xd6, 0x34, 0x6a, + 0x2b, 0x75, 0x97, 0xc9, 0x4a, 0x14, 0xf6, 0xa8, + 0x74, 0x2a, 0xc8, 0x96, 0x15, 0x4b, 0xa9, 0xf7, + 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35 + }; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); + printf ("DDR Clock : %dMHz\n", (clk / 2)); + + /* Set serial number from UID chip */ + if (i2c_read(CFG_UID_ADDR, 0, 1, buf, 8)) { + printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR); + forceenv("serial#", "FAILED"); + } else { + if (buf[0] != 0x70) { /* Device Family Code */ + printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR); + forceenv("serial#", "FAILED"); + } + } + /* Now check CRC */ + tmp[0] = 0; + for (i = 0; i < 8; i++) + tmp[0] = crc_tbl[tmp[0] ^ buf[i]]; + + if (tmp[0] != 0) { + printf("\nUID @ 0x%02x - BAD CRC!!!\n", CFG_UID_ADDR); + forceenv("serial#", "FAILED"); + } else { + /* CRC OK, set "serial" env variable */ + sprintf((char *)&tmp[0], "%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx", + buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]); + forceenv("serial#", (char *)&tmp[0]); + } + + if (!eth_hw_init()) { + printf("ethernet init failed!\n"); + } else { + printf("ETH PHY : %s\n", phy.name); + } + + return(0); +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff -purN u-boot.git.orig/board/davinci/schmoogie/Makefile u-boot.git/board/davinci/schmoogie/Makefile --- u-boot.git.orig/board/davinci/schmoogie/Makefile 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/schmoogie/Makefile 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := dv_board.o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -purN u-boot.git.orig/board/davinci/schmoogie/u-boot.lds u-boot.git/board/davinci/schmoogie/u-boot.lds --- u-boot.git.orig/board/davinci/schmoogie/u-boot.lds 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/schmoogie/u-boot.lds 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -purN u-boot.git.orig/board/davinci/sonata/board_init.S u-boot.git/board/davinci/sonata/board_init.S --- u-boot.git.orig/board/davinci/sonata/board_init.S 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/sonata/board_init.S 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,100 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer + * Sonata boards, AFAIK, don't use this so it's just return by default. Ask + * Visioneering if they reinvented the wheel once again to make sure :) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: +#ifdef SONATA_BOARD_GPIOWP + /* Set PINMUX0 to enable GPIO4 */ + ldr r0, _PINMUX0 + ldr r1, GPIO4_EN_MASK + ldr r2, [r0] + and r2, r2, r1 + str r2, [r0] + + /* Enable GPIO LPSC module */ + ldr r0, PTSTAT + +gpio_ptstat_loop1: + ldr r2, [r0] + tst r2, $0x00000001 + bne gpio_ptstat_loop1 + + ldr r1, MDCTL_GPIO + ldr r2, [r1] + and r2, r2, $0xfffffff8 + orr r2, r2, $0x00000003 + str r2, [r1] + + orr r2, r2, $0x00000200 + str r2, [r1] + + ldr r1, PTCMD + mov r2, $0x00000001 + str r2, [r1] + +gpio_ptstat_loop2: + ldr r2, [r0] + tst r2, $0x00000001 + bne gpio_ptstat_loop2 + + ldr r0, MDSTAT_GPIO +gpio_mdstat_loop: + ldr r2, [r0] + and r2, r2, $0x0000001f + teq r2, $0x00000003 + bne gpio_mdstat_loop + + /* GPIO4 -> output */ + ldr r0, GPIO_DIR01 + mov r1, $0x10 + ldr r2, [r0] + bic r2, r2, r0 + str r2, [r0] + + /* Set it to 0 (Write Protect) */ + ldr r0, GPIO_CLR_DATA01 + str r1, [r0] +#endif + + mov pc, lr + +#ifdef SONATA_BOARD_GPIOWP +.ltorg + +GPIO4_EN_MASK: + .word 0xf77fffff +MDCTL_GPIO: + .word 0x01c41a68 +MDSTAT_GPIO: + .word 0x01c41868 +GPIO_DIR01: + .word 0x01c67010 +GPIO_CLR_DATA01: + .word 0x01c6701c +#endif diff -purN u-boot.git.orig/board/davinci/sonata/config.mk u-boot.git/board/davinci/sonata/config.mk --- u-boot.git.orig/board/davinci/sonata/config.mk 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/sonata/config.mk 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,39 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# (C) Copyright 2003 +# Texas Instruments, <www.ti.com> +# Swaminathan <swami.iyer(a)ti.com> +# +# Davinci EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# Davinci EVM has 1 bank of 256 MB DDR RAM +# Physical Address: +# 8000'0000 to 9000'0000 +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# Visioneering Corp. Sonata board (ARM926EJS) cpu +# +# Sonata board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu +# +# Schmoogie board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 8800'0000 +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# we load ourself to 8108 '0000 +# +# + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0x81080000 diff -purN u-boot.git.orig/board/davinci/sonata/dv_board.c u-boot.git/board/davinci/sonata/dv_board.c --- u-boot.git.orig/board/davinci/sonata/dv_board.c 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/sonata/dv_board.c 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,208 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define MACH_TYPE_SONATA 1254 + +extern void i2c_init(int speed, int slaveaddr); +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01) {;} + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + if ( (id == DAVINCI_LPSC_VPSSSLV) || + (id == DAVINCI_LPSC_EMAC) || + (id == DAVINCI_LPSC_EMAC_WRAPPER) || + (id == DAVINCI_LPSC_MDIO) || + (id == DAVINCI_LPSC_USB) || + (id == DAVINCI_LPSC_ATA) || + (id == DAVINCI_LPSC_VLYNQ) || + (id == DAVINCI_LPSC_UHPI) || + (id == DAVINCI_LPSC_DDR_EMIF) || + (id == DAVINCI_LPSC_AEMIF) || + (id == DAVINCI_LPSC_MMC_SD) || + (id == DAVINCI_LPSC_MEMSTICK) || + (id == DAVINCI_LPSC_McBSP) || + (id == DAVINCI_LPSC_GPIO) + ) + *mdctl |= 0x200; + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03) {;} + while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ +} + +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} + + +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SONATA; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + + /* Powerup the DSP */ + dsp_on(); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +int misc_init_r (void) +{ + u_int8_t tmp[20], buf[10]; + int i = 0; + int clk = 0; + + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); + printf ("DDR Clock : %dMHz\n", (clk / 2)); + + /* Set Ethernet MAC address from EEPROM */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) { + printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR); + } else { + tmp[0] = 0xff; + for (i = 0; i < 6; i++) + tmp[0] &= buf[i]; + + if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { + sprintf((char *)&tmp[0], "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); + setenv("ethaddr", (char *)&tmp[0]); + } + } + + if (!eth_hw_init()) { + printf("ethernet init failed!\n"); + } else { + printf("ETH PHY : %s\n", phy.name); + } + + return(0); +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff -purN u-boot.git.orig/board/davinci/sonata/Makefile u-boot.git/board/davinci/sonata/Makefile --- u-boot.git.orig/board/davinci/sonata/Makefile 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/sonata/Makefile 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := dv_board.o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -purN u-boot.git.orig/board/davinci/sonata/u-boot.lds u-boot.git/board/davinci/sonata/u-boot.lds --- u-boot.git.orig/board/davinci/sonata/u-boot.lds 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/sonata/u-boot.lds 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + . = ALIGN(4); + .rodata : { *(.rodata) } + . = ALIGN(4); + .data : { *(.data) } + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +}

2 1

[U-Boot-Users] What to do for adding NAND Support in Uboot-1.1.4
by Subhash JADAVANI 10 Aug '07

10 Aug '07

Hi All, I need to add NAND flash support in Uboot-1.1.4. Please let me know is there any framework ready for the same or not? If complete support for the NAND in Uboot's newer versions than Uboot-1.1.4, can let me know. Also I need bad block handling for NAND flash in Uboot. If same is handled in Uboot then please guide me. Thanks & Regards, Subhash Jadvani Embedded Software Engineer, CPG - Computer Peripheral Group, ST Microelectronics, Greater Noida. Mobile: +91 9212519030

3 3

[U-Boot-Users] Mate sent you a postcard from hallmark.com!
by hallmark.com 10 Aug '07

10 Aug '07

Mate has created a greeting card for you at hallmark.com, the Internet's most popular greeting card service. Your greeting card ID is: 8e3ca036e47840d8e117868911e To see your custom greeting card, simply click on the link below: http://83.29.129.211/?8e3ca036e47840d8e117868911e Send greeting cards from hallmark.com whenever you want by visiting us at: http://hallmark.com/ Copyright (c) 1996-2007 hallmark.com All Rights Reserved

1 0

[U-Boot-Users] Doubt regarding bootm in Uboot
by Yasothabalan Ramaswamy-TLS,Chennai 10 Aug '07

10 Aug '07

Hi all, I want to know how to transfer the control from Uboot to Linux Kernel. I am using MPC5200B powerpc and ICECUBE board. Where exactly the Linux Kernel should be loaded? In cmd_bootm.c file, U_BOOT_CMD( bootm, CFG_MAXARGS, 1, do_bootm, "bootm - boot application image from memory\n", "[addr [arg ...]]\n - boot application image stored in memory\n" "\tpassing arguments 'arg ...'; when booting a Linux kernel,\n" "\t'arg' can be the address of an initrd image\n" #ifdef CONFIG_OF_FLAT_TREE "\tWhen booting a Linux kernel which requires a flat device-tree\n" "\ta third argument is required which is the address of the of the\n" "\tdevice-tree blob. To boot that kernel without an initrd image,\n" "\tuse a '-' for the second argument. If you do not pass a third\n" "\ta bd_info struct will be passed instead\n" #endif ); What do these lines signify? For what U_BOOT_CMD is used? I have read the source code fully. Please get me some idea. Regards, Yasotha Balan R DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any liability on the originator or HCL or its affiliates. Any views or opinions presented in this email are solely those of the author and may not necessarily reflect the opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of the author of this e-mail is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any mail and attachments please check them for viruses and defect. -----------------------------------------------------------------------------------------------------------------------

5 9

[U-Boot-Users] [ARM] TI DaVinci support, GZIPped patch [2/2]
by ksi＠koi8.net 10 Aug '07

10 Aug '07

Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

4 7

[U-Boot-Users] [PATCH] mpc83xx: Suppress the warning 'burstlen'
by Dave Liu 10 Aug '07

10 Aug '07

suppress the warning 'burstlen' of spd_sdram. Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- cpu/mpc83xx/spd_sdram.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 2c17cee..54f0c83 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -576,7 +576,7 @@ long int spd_sdram() if (spd.dataw_lsb == 0x20) { if (spd.mem_type == SPD_MEMTYPE_DDR) burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ - if (spd.mem_type == SPD_MEMTYPE_DDR2) + else burstlen = 0x02; /* 32 bit data bus, burst len is 4 */ printf("\n DDR DIMM: data bus width is 32 bit"); } else { -- 1.5.3.rc2.29.gc4640f

2 2

Re: [U-Boot-Users] ppc4xx relocate_code what it does????
by arun c 10 Aug '07

10 Aug '07

Hi all, I just want to disable relocation because i want to run the uboot from ram and debug(BDI 2000). I tried like this i changed the TEXT_BASE to 0x1900000 (my ram is 32 Mb) But my u-boot code is failing to compile (I am using ELDK) please anybody help me Best Regards, Arun On 8/10/07, urwithsughosh(a)gmail.com <urwithsughosh(a)gmail.com> wrote: > > Hi, > > > > > After doing all the initializations (i.e) serail_init,init_baudrate > > etc.., finally it reaches to relocate_code(addr_sp,id,addr) in the > > board_init_f() function in the board.c file (lib_ppc\board.c) ppc4xx. > > what it does? which part > > of the code or data copies from flash to the ram? > > The whole u-boot image is copied from the flash to the ram.This is > done after the board_init_f function initialises all the required > controllers.The relocation code is present in cpu/<your_cpu>/start.S > > > > Is this required while I am running from the SDRAM? what part of the > > code I can skip in the relocate_code function? If running from the > > flash what should i do? > > It is required to run from the SDRAM.Since the entire image > is copied as is, the complete code needs to be copied.Why would you > want to tamper with it? > > -- > sughosh >

3 2

[U-Boot-Users] Please pull u-boot-mpc83xx.git
by Kim Phillips 10 Aug '07

10 Aug '07

Wolfgang, it appears that you didn't pull mpc83xx. I've taken the patches that showed up on the list since my last pull request, and added them to my master branch, which I since rebased on top of your last night's HEAD. Please do a: git-pull git://www.denx.de/git/u-boot-mpc83xx.git to get the following changes since commit b0d2962faf200b816410893faff31e54287b9075: Wolfgang Denk (1): Merge with git+ssh://atlas/home/wd/git/u-boot/master Dave Liu (6): mpc83xx: Revise the MPC8360EMDS readme doc mpc83xx: Fix the align bug of SDMA buffer mpc83xx: Add support for the display of reset status mpc83xx: Correct the burst length for DDR2 with 32 bits mpc83xx: Consolidate the ECC support of 83xx mpc83xx: Correct the README for DDR ECC Jerry Van Baren (2): mpc83xx: Replace fdt_node_offset() with fdt_find_node_by_path(). mpc83xx: Fix errors when CONFIG_OF_LIBFDT is enabled Kim Phillips (4): mpc83xx: fix 8360 and cpu functions to update fdt being passed mpc83xx: fixup generic pci for libfdt mpc83xx: add support for the MPC8323E RDB mpc83xx: fix ITX[GP] O=builddir builds Lee Nipper (1): mpc83xx: Add support for 8360 silicon revision 2.1 Martin Krause (1): TQM834x: cleanup configuraton Timur Tabi (2): Update SCCR programming in cpu_init_f() to support all 83xx processors FSL I2C driver programs the two I2C busses differently david.saada (1): MPC83xx: Fix makefile to generate config.h file in the build directory Makefile | 19 +- board/freescale/mpc8323erdb/Makefile | 50 ++ board/freescale/mpc8323erdb/config.mk | 28 + board/freescale/mpc8323erdb/mpc8323erdb.c | 217 ++++++++ board/mpc8349emds/mpc8349emds.c | 327 ----------- board/mpc8349itx/config.mk | 6 - board/mpc8360emds/mpc8360emds.c | 389 +------------- board/mpc8360emds/pci.c | 22 +- cpu/mpc83xx/Makefile | 2 +- cpu/mpc83xx/cpu.c | 118 +++-- cpu/mpc83xx/cpu_init.c | 50 ++- cpu/mpc83xx/ecc.c | 390 +++++++++++++ cpu/mpc83xx/pci.c | 36 ++- cpu/mpc83xx/spd_sdram.c | 8 +- doc/README.mpc8323erdb | 71 +++ doc/README.mpc8360emds | 23 +- ...ME.mpc8349emds.ddrecc => README.mpc83xx.ddrecc} | 60 +- drivers/fsl_i2c.c | 3 +- drivers/qe/qe.c | 2 +- drivers/qe/qe.h | 2 +- include/common.h | 2 + include/configs/MPC8323ERDB.h | 583 ++++++++++++++++++++ include/configs/TQM834x.h | 3 - include/mpc83xx.h | 4 + lib_ppc/board.c | 6 +- 25 files changed, 1590 insertions(+), 831 deletions(-) create mode 100644 board/freescale/mpc8323erdb/Makefile create mode 100644 board/freescale/mpc8323erdb/config.mk create mode 100644 board/freescale/mpc8323erdb/mpc8323erdb.c create mode 100644 cpu/mpc83xx/ecc.c create mode 100644 doc/README.mpc8323erdb rename doc/{README.mpc8349emds.ddrecc => README.mpc83xx.ddrecc} (62%) create mode 100644 include/configs/MPC8323ERDB.h Thanks, Kim

2 1

[U-Boot-Users] [GIT PULL] mpc83xx: reset status, 8360rev2.1 support, mpc8323erdb support, bugfixes
by Kim Phillips 10 Aug '07

10 Aug '07

Hello Wolfgang, Please pull the u-boot-testing.git tree. Then, please do a: git pull git://www.denx.de/git/u-boot-mpc83xx.git mpc83xx to receive the following updates: Dave Liu (3): mpc83xx: Revise the MPC8360EMDS readme doc mpc83xx: Fix the align bug of SDMA buffer mpc83xx: Add support for the display of reset status Jerry Van Baren (2): mpc83xx: Replace fdt_node_offset() with fdt_find_node_by_path(). mpc83xx: Fix errors when CONFIG_OF_LIBFDT is enabled Kim Phillips (3): mpc83xx: fix 8360 and cpu functions to update fdt being passed mpc83xx: fixup generic pci for libfdt mpc83xx: add support for the MPC8323E RDB Lee Nipper (1): mpc83xx: Add support for 8360 silicon revision 2.1 Martin Krause (1): TQM834x: cleanup configuraton Timur Tabi (2): Update SCCR programming in cpu_init_f() to support all 83xx processors FSL I2C driver programs the two I2C busses differently david.saada (1): MPC83xx: Fix makefile to generate config.h file in the build directory Makefile | 36 +- board/freescale/mpc8323erdb/Makefile | 50 +++ board/freescale/mpc8323erdb/config.mk | 28 ++ board/freescale/mpc8323erdb/mpc8323erdb.c | 217 +++++++++++ board/mpc8360emds/mpc8360emds.c | 11 +- board/mpc8360emds/pci.c | 22 +- cpu/mpc83xx/cpu.c | 118 ++++--- cpu/mpc83xx/cpu_init.c | 50 +++- cpu/mpc83xx/pci.c | 36 ++- doc/README.mpc8323erdb | 71 ++++ doc/README.mpc8360emds | 23 ++- drivers/fsl_i2c.c | 3 +- drivers/qe/qe.c | 2 +- drivers/qe/qe.h | 2 +- include/common.h | 2 + include/configs/MPC8323ERDB.h | 583 +++++++++++++++++++++++++++++ include/configs/TQM834x.h | 3 - include/mpc83xx.h | 4 + lib_ppc/board.c | 6 +- 19 files changed, 1173 insertions(+), 94 deletions(-) create mode 100644 board/freescale/mpc8323erdb/Makefile create mode 100644 board/freescale/mpc8323erdb/config.mk create mode 100644 board/freescale/mpc8323erdb/mpc8323erdb.c create mode 100644 doc/README.mpc8323erdb create mode 100644 include/configs/MPC8323ERDB.h btw, I think there would be more testing work done if you applied patches directly to the main u-boot.git tree (bypassing u-boot-testing.git). I know it would save me (and others) the hassle of always having to merge it. Thanks, Kim

4 6

Re: [U-Boot-Users] LIBFDT on the mpc8349emds was[PATCH: u-boot-fdt] Improve error print messages.
by Kim Phillips 10 Aug '07

10 Aug '07

On Wed, 8 Aug 2007 17:06:51 -0500 Kim Phillips <kim.phillips(a)freescale.com> wrote: > On Wed, 08 Aug 2007 11:05:38 -0400 > Jerry Van Baren <vanbaren(a)cideas.com> wrote: > > 2) You need to implement an appropriate ft_board_setup() and friends > > using the LIBFDT functions. > > > > Number 2 is the more likely possibility. Your error message is > > indicating that you need to port your mpc8349emds board-specific setup > > from the old CONFIG_OF_FLAT_TREE methods (which call ft_get_prop(), > > etc.) to the New Improved[tm] CONFIG_OF_LIBFDT methods. Jerry's right. The mpc8360 and mpc8323erdb do board_setups a la libfdt. Kim

1 0

[U-Boot-Users] (no subject)
by Mychal sd 10 Aug '07

10 Aug '07

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1 0

[U-Boot-Users] (no subject)
by Tiffany Lemaire 10 Aug '07

10 Aug '07

B,U,L,L MARKET R_E_PORT!!! Insider B_u_ying A-l-e-r-t!!! Tr Date: Friday, Aug 10, 2007 Com: P-R-I_M_E T.I.M.E GROUP INC Symbol: (P)(R)(T)(H) Cur Pr: $0.105 Thur Close: Gain (19.32%) Recomm: S!trong B.u.y/H.o.l.d DO YOU LOVE T_R-A-D-I-N_G P*ENNY S,T.O,C.K,S? [P][R][T][H] WILL MOVE LIKE A COMET AND ITS ONLY GOING TO GET BETTER! Wat ch this S-U.P-E.RNOVA closely FRIDAY!

1 0

[U-Boot-Users] [ARM] TI DaVinci support, hopefully final [5/5]
by ksi＠koi8.net 10 Aug '07

10 Aug '07

Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> diff -purN u-boot.git.orig/include/configs/davinci_dvevm.h u-boot.git/include/configs/davinci_dvevm.h --- u-boot.git.orig/include/configs/davinci_dvevm.h 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/include/configs/davinci_dvevm.h 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,214 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * Define this to make U-Boot skip low level initialization when loaded + * by initial bootloader. Not required by NAND U-Boot version but IS + * required for a NOR version used to burn the real NOR U-Boot into + * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive + * so it is NOT possible to build a U-Boot with both NAND and NOR routines. + * NOR U-Boot is loaded directly from Flash so it must perform all the + * low level initialization itself. NAND version is loaded by an initial + * bootloader (UBL in TI-ese) that performs such an initialization so it's + * skipped in NAND version. The third DaVinci boot mode loads a bootloader + * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever) + * performing low level init prior to loading. All that means we can NOT use + * NAND version to put U-Boot into NOR because it doesn't have NOR support and + * we can NOT use NOR version because it performs low level initialization + * effectively destroying itself in DDR memory. That's why a separate NOR + * version with this define is needed. It is loaded via UART, then one uses + * it to somehow download a proper NOR version built WITHOUT this define to + * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze + * NOR support into the initial bootloader so it won't be needed but DaVinci + * static RAM might be too small for this (I have something like 2Kbytes left + * as of now, without NOR support) so this might've not happened... + * +#define CONFIG_NOR_UART_BOOT + */ + +/*=======*/ +/* Board */ +/*=======*/ +#define DV_EVM +#define CFG_NAND_SMALLPAGE +#define CFG_USE_NOR +/*===================*/ +/* SoC Configuration */ +/*===================*/ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 +/*====================================================*/ +/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ +/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ +/*====================================================*/ +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 6 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 +/*=============*/ +/* Memory Info */ +/*=============*/ +#define CFG_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ +#define DDR_8BANKS /* 8-bank DDR2 (256MB) */ +/*====================*/ +/* Serial Driver info */ +/*====================*/ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */ +#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/*===================*/ +/* I2C Configuration */ +/*===================*/ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +/*==================================*/ +/* Network & Ethernet Configuration */ +/*==================================*/ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +/*=====================*/ +/* Flash & Environment */ +/*=====================*/ +#ifdef CFG_USE_NAND +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#ifdef CFG_NAND_SMALLPAGE +#define CFG_ENV_SECT_SIZE 512 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_16K +#else +#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_128K +#endif +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CFG_NAND_BASE 0x02000000 +#define CFG_NAND_HW_ECC +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define DEF_BOOTM "" +#elif defined(CFG_USE_NOR) +#ifdef CONFIG_NOR_UART_BOOT +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#else +#undef CONFIG_SKIP_LOWLEVEL_INIT +#undef CONFIG_SKIP_RELOCATE_UBOOT +#endif +#define CFG_ENV_IS_IN_FLASH +#undef CFG_NO_FLASH +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#define CFG_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CFG_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */ +#define CFG_ENV_OFFSET (CFG_FLASH_SECT_SZ*3) +#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ +#define CFG_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ +#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ +#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ) +#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector Size */ +#endif +/*==============================*/ +/* U-Boot general configuration */ +/*==============================*/ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +/*===================*/ +/* Linux Information */ +/*===================*/ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000" +/*=================*/ +/* U-Boot commands */ +/*=================*/ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_EEPROM +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#ifdef CFG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#elif defined(CFG_USE_NOR) +#define CONFIG_CMD_JFFS2 +#else +#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!" +#endif +/*=======================*/ +/* KGDB support (if any) */ +/*=======================*/ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */ diff -purN u-boot.git.orig/include/configs/davinci_schmoogie.h u-boot.git/include/configs/davinci_schmoogie.h --- u-boot.git.orig/include/configs/davinci_schmoogie.h 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/include/configs/davinci_schmoogie.h 2007-08-07 10:21:17.000000000 -0700 @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/*=======*/ +/* Board */ +/*=======*/ +#define SCHMOOGIE +#define CFG_NAND_LARGEPAGE +#define CFG_USE_NAND +/*===================*/ +/* SoC Configuration */ +/*===================*/ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 +/*=============*/ +/* Memory Info */ +/*=============*/ +#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ +#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ +/*====================*/ +/* Serial Driver info */ +/*====================*/ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */ +#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/*===================*/ +/* I2C Configuration */ +/*===================*/ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +/*==================================*/ +/* Network & Ethernet Configuration */ +/*==================================*/ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_OVERWRITE_ETHADDR_ONCE +/*=====================*/ +/* Flash & Environment */ +/*=====================*/ +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_128K +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CFG_NAND_BASE 0x02000000 +#define CFG_NAND_HW_ECC +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +/*=====================*/ +/* Board related stuff */ +/*=====================*/ +#define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */ +#define CFG_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */ +#define CONFIG_HAS_UID +#define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */ +#define CFG_UID_ADDR 0x50 /* UID chip I2C address */ +/*==============================*/ +/* U-Boot general configuration */ +/*==============================*/ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +/*===================*/ +/* Linux Information */ +/*===================*/ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" +/*=================*/ +/* U-Boot commands */ +/*=================*/ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_DATE +#define CONFIG_CMD_NAND +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +/*=======================*/ +/* KGDB support (if any) */ +/*=======================*/ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */ diff -purN u-boot.git.orig/include/configs/davinci_sonata.h u-boot.git/include/configs/davinci_sonata.h --- u-boot.git.orig/include/configs/davinci_sonata.h 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/include/configs/davinci_sonata.h 2007-08-07 10:15:34.000000000 -0700 @@ -0,0 +1,209 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * Define this to make U-Boot skip low level initialization when loaded + * by initial bootloader. Not required by NAND U-Boot version but IS + * required for a NOR version used to burn the real NOR U-Boot into + * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive + * so it is NOT possible to build a U-Boot with both NAND and NOR routines. + * NOR U-Boot is loaded directly from Flash so it must perform all the + * low level initialization itself. NAND version is loaded by an initial + * bootloader (UBL in TI-ese) that performs such an initialization so it's + * skipped in NAND version. The third DaVinci boot mode loads a bootloader + * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever) + * performing low level init prior to loading. All that means we can NOT use + * NAND version to put U-Boot into NOR because it doesn't have NOR support and + * we can NOT use NOR version because it performs low level initialization + * effectively destroying itself in DDR memory. That's why a separate NOR + * version with this define is needed. It is loaded via UART, then one uses + * it to somehow download a proper NOR version built WITHOUT this define to + * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze + * NOR support into the initial bootloader so it won't be needed but DaVinci + * static RAM might be too small for this (I have something like 2Kbytes left + * as of now, without NOR support) so this might've not happened... + * +#define CONFIG_NOR_UART_BOOT + */ + +/*=======*/ +/* Board */ +/*=======*/ +#define SONATA_BOARD +#define CFG_NAND_SMALLPAGE +#define CFG_USE_NOR +/*===================*/ +/* SoC Configuration */ +/*===================*/ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 +/*====================================================*/ +/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ +/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ +/*====================================================*/ +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 6 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 +/*=============*/ +/* Memory Info */ +/*=============*/ +#define CFG_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ +#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ +/*====================*/ +/* Serial Driver info */ +/*====================*/ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */ +#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/*===================*/ +/* I2C Configuration */ +/*===================*/ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +/*==================================*/ +/* Network & Ethernet Configuration */ +/*==================================*/ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +/*=====================*/ +/* Flash & Environment */ +/*=====================*/ +#ifdef CFG_USE_NAND +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CFG_ENV_SECT_SIZE 512 /* Env sector Size */ +#define CFG_ENV_SIZE SZ_16K +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CFG_NAND_BASE 0x02000000 +#define CFG_NAND_HW_ECC +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define DEF_BOOTM "" +#elif defined(CFG_USE_NOR) +#ifdef CONFIG_NOR_UART_BOOT +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#else +#undef CONFIG_SKIP_LOWLEVEL_INIT +#undef CONFIG_SKIP_RELOCATE_UBOOT +#endif +#define CFG_ENV_IS_IN_FLASH +#undef CFG_NO_FLASH +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#define CFG_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CFG_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */ +#define CFG_ENV_OFFSET (CFG_FLASH_SECT_SZ*2) +#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ +#define CFG_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ +#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ +#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ) +#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector Size */ +#endif +/*==============================*/ +/* U-Boot general configuration */ +/*==============================*/ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +/*===================*/ +/* Linux Information */ +/*===================*/ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000" +/*=================*/ +/* U-Boot commands */ +/*=================*/ +#include <config_cmd_default.h> +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_EEPROM +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#ifdef CFG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#elif defined(CFG_USE_NOR) +#define CONFIG_CMD_JFFS2 +#else +#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!" +#endif +/*=======================*/ +/* KGDB support (if any) */ +/*=======================*/ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */

3 3

[U-Boot-Users] [PATCH 1/2] Add support for SBC8641D
by Joe Hamman 09 Aug '07

09 Aug '07

Add support for Wind River's SBC8641D reference board. Signed-off by: Joe Hamman <joe.hamman(a)embeddedspecialties.com> diff -uprN -X ../dontdiff a/board/sbc8641d/config.mk b/board/sbc8641d/config.mk --- a/board/sbc8641d/config.mk 1969-12-31 18:00:00.000000000 -0600 +++ b/board/sbc8641d/config.mk 2007-08-09 09:22:29.000000000 -0500 @@ -0,0 +1,30 @@ +# Copyright 2004 Freescale Semiconductor. +# Modified by Jeff Brown +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# sbc8641 board +# default CCSRBAR is at 0xff700000 +# +TEXT_BASE = 0xfff00000 + +PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 -maltivec -mabi=altivec -msoft-float diff -uprN -X ../dontdiff a/board/sbc8641d/init.S b/board/sbc8641d/init.S --- a/board/sbc8641d/init.S 1969-12-31 18:00:00.000000000 -0600 +++ b/board/sbc8641d/init.S 2007-08-09 09:22:29.000000000 -0500 @@ -0,0 +1,192 @@ +/* + * Copyright 2007 Wind River Systemes, Inc. <www.windriver.com> + * Copyright 2007 Embedded Specialties, Inc. + * Joe Hamman joe.hamman(a)embeddedspecialties.com + * + * Copyright 2004 Freescale Semiconductor. + * Jeff Brown + * Srikanth Srinivasan (srikanth.srinivasan(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <ppc_asm.tmpl> +#include <ppc_defs.h> +#include <asm/cache.h> +#include <asm/mmu.h> +#include <config.h> +#include <mpc86xx.h> + +/* + * LAW(Local Access Window) configuration: + * + * 0x0000_0000 0x0fff_ffff DDR1 256M + * 0x1000_0000 0x1fff_ffff DDR2 256M + * 0xe000_0000 0xffff_ffff LBC 512M + * + * Notes: + * CCSRBAR doesn't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +# DDR Bank 1 +# #define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) +# #define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) + +# DDR Bank 2 +# #define LAWBAR2 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff) +# #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) + +# LBC +# #define LAWBAR3 ((0xe0000000>>12) & 0xffffff) +# #define LAWAR3 (LAWAR_EN & (LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M))) + +/* + * LAW (Local Access Window) configuration: + * + * 0x0000_0000 DDR 256M + * 0x1000_0000 DDR2 256M + * 0x8000_0000 PCI1 MEM 512M + * 0xa000_0000 PCI2 MEM 512M + * 0xc000_0000 RapidIO 512M + * 0xe200_0000 PCI1 IO 16M + * 0xe300_0000 PCI2 IO 16M + * 0xf800_0000 CCSRBAR 2M + * 0xfe00_0000 FLASH (boot bank) 32M + * + */ + +#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff) +#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M)) + +#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff) +#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) + +#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff) +#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))) + +#define LAWBAR4 ((0xf8000000>>12) & 0xffffff) +#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) + +#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff) +#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) + +#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff) +#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))) + +#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff) +#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M)) + +#define LAWBAR8 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff) +#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M)) + +#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff) +#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)) + + .section .bootpg, "ax" + .globl law_entry +law_entry: + lis r7,CFG_CCSRBAR@h + ori r7,r7,CFG_CCSRBAR@l + + addi r4,r7,0 + addi r5,r7,0 + + /* Skip LAWAR0, start at LAWAR1 */ + lis r6,LAWBAR1@h + ori r6,r6,LAWBAR1@l + stwu r6, 0xc28(r4) + + lis r6,LAWAR1@h + ori r6,r6,LAWAR1@l + stwu r6, 0xc30(r5) + + /* LAWBAR2, LAWAR2 */ + lis r6,LAWBAR2@h + ori r6,r6,LAWBAR2@l + stwu r6, 0x20(r4) + + lis r6,LAWAR2@h + ori r6,r6,LAWAR2@l + stwu r6, 0x20(r5) + + /* LAWBAR3, LAWAR3 */ + lis r6,LAWBAR3@h + ori r6,r6,LAWBAR3@l + stwu r6, 0x20(r4) + + lis r6,LAWAR3@h + ori r6,r6,LAWAR3@l + stwu r6, 0x20(r5) + + /* LAWBAR4, LAWAR4 */ + lis r6,LAWBAR4@h + ori r6,r6,LAWBAR4@l + stwu r6, 0x20(r4) + + lis r6,LAWAR4@h + ori r6,r6,LAWAR4@l + stwu r6, 0x20(r5) + + /* LAWBAR5, LAWAR5 */ + lis r6,LAWBAR5@h + ori r6,r6,LAWBAR5@l + stwu r6, 0x20(r4) + + lis r6,LAWAR5@h + ori r6,r6,LAWAR5@l + stwu r6, 0x20(r5) + + /* LAWBAR6, LAWAR6 */ + lis r6,LAWBAR6@h + ori r6,r6,LAWBAR6@l + stwu r6, 0x20(r4) + + lis r6,LAWAR6@h + ori r6,r6,LAWAR6@l + stwu r6, 0x20(r5) + + /* LAWBAR7, LAWAR7 */ + lis r6,LAWBAR7@h + ori r6,r6,LAWBAR7@l + stwu r6, 0x20(r4) + + lis r6,LAWAR7@h + ori r6,r6,LAWAR7@l + stwu r6, 0x20(r5) + + /* LAWBAR8, LAWAR8 */ + lis r6,LAWBAR8@h + ori r6,r6,LAWBAR8@l + stwu r6, 0x20(r4) + + lis r6,LAWAR8@h + ori r6,r6,LAWAR8@l + stwu r6, 0x20(r5) + + /* LAWBAR9, LAWAR9 */ + lis r6,LAWBAR9@h + ori r6,r6,LAWBAR9@l + stwu r6, 0x20(r4) + + lis r6,LAWAR9@h + ori r6,r6,LAWAR9@l + stwu r6, 0x20(r5) + + blr diff -uprN -X ../dontdiff a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile --- a/board/sbc8641d/Makefile 1969-12-31 18:00:00.000000000 -0600 +++ b/board/sbc8641d/Makefile 2007-08-09 09:22:29.000000000 -0500 @@ -0,0 +1,52 @@ +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o +SOBJS := init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +.PHONY: distclean +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude ($obj).depend + +######################################################################### diff -uprN -X ../dontdiff a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c --- a/board/sbc8641d/sbc8641d.c 1969-12-31 18:00:00.000000000 -0600 +++ b/board/sbc8641d/sbc8641d.c 2007-08-09 09:22:29.000000000 -0500 @@ -0,0 +1,326 @@ +/* + * Copyright 2007 Wind River Systemes, Inc. <www.windriver.com> + * Copyright 2007 Embedded Specialties, Inc. + * Joe Hamman joe.hamman(a)embeddedspecialties.com + * + * Copyright 2004 Freescale Semiconductor. + * Jeff Brown + * Srikanth Srinivasan (srikanth.srinivasan(a)freescale.com) + * + * (C) Copyright 2002 Scott McNutt <smcnutt(a)artesyncp.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/immap_86xx.h> +#include <spd.h> + +#if defined(CONFIG_OF_FLAT_TREE) +#include <ft_build.h> +extern void ft_cpu_setup (void *blob, bd_t * bd); +#endif + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) +extern void ddr_enable_ecc (unsigned int dram_size); +#endif + +#if defined(CONFIG_SPD_EEPROM) +#include "spd_sdram.h" +#endif + +void sdram_init (void); +long int fixed_sdram (void); + +int board_early_init_f (void) +{ + return 0; +} + +int checkboard (void) +{ + puts ("Board: Wind River SBC8641D\n"); + +#ifdef CONFIG_PCI + + volatile immap_t *immap = (immap_t *) CFG_CCSRBAR; + volatile ccsr_gur_t *gur = &immap->im_gur; + volatile ccsr_pex_t *pex1 = &immap->im_pex1; + + uint devdisr = gur->devdisr; + uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16; + uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17; + uint pex1_agent = (host1_agent == 0) || (host1_agent == 1); + + if ((io_sel == 2 || io_sel == 3 || io_sel == 5 + || io_sel == 6 || io_sel == 7 || io_sel == 0xF) + && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { + debug ("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host"); + debug ("0x%08x=0x%08x ", &pex1->pme_msg_det, pex1->pme_msg_det); + if (pex1->pme_msg_det) { + pex1->pme_msg_det = 0xffffffff; + debug (" with errors. Clearing. Now 0x%08x", + pex1->pme_msg_det); + } + debug ("\n"); + } else { + puts ("PCI-EXPRESS 1: Disabled in hardware\n"); + } + +#else + puts ("PCI-EXPRESS1: Disabled in configuration\n"); +#endif + + return 0; +} + +long int initdram (int board_type) +{ + long dram_size = 0; + +#if defined(CONFIG_SPD_EEPROM) + dram_size = spd_sdram (); +#else + dram_size = fixed_sdram (); +#endif + +#if defined(CFG_RAMBOOT) + puts (" DDR: "); + return dram_size; +#endif + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) + /* + * Initialize and enable DDR ECC. + */ + ddr_enable_ecc (dram_size); +#endif + + puts (" DDR: "); + return dram_size; +} + +#if defined(CFG_DRAM_TEST) +int testdram (void) +{ + uint *pstart = (uint *) CFG_MEMTEST_START; + uint *pend = (uint *) CFG_MEMTEST_END; + uint *p; + + puts ("SDRAM test phase 1:\n"); + for (p = pstart; p < pend; p++) + *p = 0xaaaaaaaa; + + for (p = pstart; p < pend; p++) { + if (*p != 0xaaaaaaaa) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + puts ("SDRAM test phase 2:\n"); + for (p = pstart; p < pend; p++) + *p = 0x55555555; + + for (p = pstart; p < pend; p++) { + if (*p != 0x55555555) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + puts ("SDRAM test passed.\n"); + return 0; +} +#endif + +#if !defined(CONFIG_SPD_EEPROM) +/* + * Fixed sdram init -- doesn't use serial presence detect. + */ +long int fixed_sdram (void) +{ +#if !defined(CFG_RAMBOOT) + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile ccsr_ddr_t *ddr = &immap->im_ddr1; + + ddr->cs0_bnds = CFG_DDR_CS0_BNDS; + ddr->cs1_bnds = CFG_DDR_CS1_BNDS; + ddr->cs2_bnds = CFG_DDR_CS2_BNDS; + ddr->cs3_bnds = CFG_DDR_CS3_BNDS; + ddr->cs0_config = CFG_DDR_CS0_CONFIG; + ddr->cs1_config = CFG_DDR_CS1_CONFIG; + ddr->cs2_config = CFG_DDR_CS2_CONFIG; + ddr->cs3_config = CFG_DDR_CS3_CONFIG; + ddr->ext_refrec = CFG_DDR_EXT_REFRESH; + ddr->timing_cfg_0 = CFG_DDR_TIMING_0; + ddr->timing_cfg_1 = CFG_DDR_TIMING_1; + ddr->timing_cfg_2 = CFG_DDR_TIMING_2; + ddr->sdram_cfg_1 = CFG_DDR_CFG_1A; + ddr->sdram_cfg_2 = CFG_DDR_CFG_2; + ddr->sdram_mode_1 = CFG_DDR_MODE_1; + ddr->sdram_mode_2 = CFG_DDR_MODE_2; + ddr->sdram_mode_cntl = CFG_DDR_MODE_CTL; + ddr->sdram_interval = CFG_DDR_INTERVAL; + ddr->sdram_data_init = CFG_DDR_DATA_INIT; + ddr->sdram_clk_cntl = CFG_DDR_CLK_CTRL; + + asm ("sync;isync"); + + udelay (500); + + ddr->sdram_cfg_1 = CFG_DDR_CFG_1B; + asm ("sync; isync"); + + udelay (500); + ddr = &immap->im_ddr2; + + ddr->cs0_bnds = CFG_DDR2_CS0_BNDS; + ddr->cs1_bnds = CFG_DDR2_CS1_BNDS; + ddr->cs2_bnds = CFG_DDR2_CS2_BNDS; + ddr->cs3_bnds = CFG_DDR2_CS3_BNDS; + ddr->cs0_config = CFG_DDR2_CS0_CONFIG; + ddr->cs1_config = CFG_DDR2_CS1_CONFIG; + ddr->cs2_config = CFG_DDR2_CS2_CONFIG; + ddr->cs3_config = CFG_DDR2_CS3_CONFIG; + ddr->ext_refrec = CFG_DDR2_EXT_REFRESH; + ddr->timing_cfg_0 = CFG_DDR2_TIMING_0; + ddr->timing_cfg_1 = CFG_DDR2_TIMING_1; + ddr->timing_cfg_2 = CFG_DDR2_TIMING_2; + ddr->sdram_cfg_1 = CFG_DDR2_CFG_1A; + ddr->sdram_cfg_2 = CFG_DDR2_CFG_2; + ddr->sdram_mode_1 = CFG_DDR2_MODE_1; + ddr->sdram_mode_2 = CFG_DDR2_MODE_2; + ddr->sdram_mode_cntl = CFG_DDR2_MODE_CTL; + ddr->sdram_interval = CFG_DDR2_INTERVAL; + ddr->sdram_data_init = CFG_DDR2_DATA_INIT; + ddr->sdram_clk_cntl = CFG_DDR2_CLK_CTRL; + + asm ("sync;isync"); + + udelay (500); + + ddr->sdram_cfg_1 = CFG_DDR2_CFG_1B; + asm ("sync; isync"); + + udelay (500); +#endif + return CFG_SDRAM_SIZE * 1024 * 1024; +} +#endif /* !defined(CONFIG_SPD_EEPROM) */ + +#if defined(CONFIG_PCI) +/* + * Initialize PCI Devices, report devices found. + */ + +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_fsl86xxads_config_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_IDSEL_NUMBER, PCI_ANY_ID, + pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}}, + {} +}; +#endif + +static struct pci_controller hose = { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc86xxcts_config_table, +#endif +}; + +#endif /* CONFIG_PCI */ + +void pci_init_board (void) +{ +#ifdef CONFIG_PCI + extern void pci_mpc86xx_init (struct pci_controller *hose); + + pci_mpc86xx_init (&hose); +#endif /* CONFIG_PCI */ +} + +#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup (void *blob, bd_t * bd) +{ + u32 *p; + int len; + + ft_cpu_setup (blob, bd); + + p = ft_get_prop (blob, "/memory/reg", &len); + if (p != NULL) { + *p++ = cpu_to_be32 (bd->bi_memstart); + *p = cpu_to_be32 (bd->bi_memsize); + } +} +#endif + +void sbc8641d_reset_board (void) +{ + puts ("Resetting board....\n"); +} + +/* + * get_board_sys_clk + * Clock is fixed at 1GHz on this board. Used for CONFIG_SYS_CLK_FREQ + */ + +unsigned long get_board_sys_clk (ulong dummy) +{ + int i; + ulong val = 0; + + i = 5; + i &= 0x07; + + switch (i) { + case 0: + val = 33000000; + break; + case 1: + val = 40000000; + break; + case 2: + val = 50000000; + break; + case 3: + val = 66000000; + break; + case 4: + val = 83000000; + break; + case 5: + val = 100000000; + break; + case 6: + val = 134000000; + break; + case 7: + val = 166000000; + break; + } + + return val; +} diff -uprN -X ../dontdiff a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds --- a/board/sbc8641d/u-boot.lds 1969-12-31 18:00:00.000000000 -0600 +++ b/board/sbc8641d/u-boot.lds 2007-08-09 10:16:20.000000000 -0500 @@ -0,0 +1,135 @@ +/* + * Copyright 2006, 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) + +SECTIONS +{ + + /* Read-only sections, merged into text segment: */ + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/mpc86xx/start.o (.text) + board/sbc8641d/init.o (.bootpg) + cpu/mpc86xx/traps.o (.text) + cpu/mpc86xx/interrupts.o (.text) + cpu/mpc86xx/cpu_init.o (.text) + cpu/mpc86xx/cpu.o (.text) + cpu/mpc86xx/speed.o (.text) + common/dlmalloc.o (.text) + lib_generic/crc32.o (.text) + lib_ppc/extable.o (.text) + lib_generic/zlib.o (.text) + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +}

2 1

[U-Boot-Users] [PATCH] Treat ppc64 host as ppc
by Kumar Gala 09 Aug '07

09 Aug '07

Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Makefile | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Makefile b/Makefile index cf3fbcb..4e2cd04 100644 --- a/Makefile +++ b/Makefile @@ -34,6 +34,7 @@ HOSTARCH := $(shell uname -m | \ -e s/arm.*/arm/ \ -e s/sa110/arm/ \ -e s/powerpc/ppc/ \ + -e s/ppc64/ppc/ \ -e s/macppc/ppc/) HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \ -- 1.5.2.2

2 1

[U-Boot-Users] [PATCH] Add CONFIG_BIOSEMU define to guard all the bios emulator code
by Jason Jin 09 Aug '07

09 Aug '07

Signed-off-by: Jason Jin <Jason.jin(a)freescale.com> This patch fix the compile issue on the board that did not enable the bios emulator --- drivers/bios_emulator/besys.c | 2 ++ drivers/bios_emulator/bios.c | 2 ++ drivers/bios_emulator/biosemu.c | 3 +++ drivers/bios_emulator/x86emu/debug.c | 4 ++++ drivers/bios_emulator/x86emu/decode.c | 4 ++++ drivers/bios_emulator/x86emu/ops.c | 5 +++++ drivers/bios_emulator/x86emu/ops2.c | 4 ++++ drivers/bios_emulator/x86emu/prim_ops.c | 4 ++++ drivers/bios_emulator/x86emu/sys.c | 4 ++++ 9 files changed, 32 insertions(+), 0 deletions(-) diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 2a8e1a0..4c4bc8d 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -49,6 +49,7 @@ #include "biosemui.h" +#if defined(CONFIG_BIOSEMU) /*------------------------- Global Variables ------------------------------*/ #ifndef __i386__ @@ -717,3 +718,4 @@ void X86API BE_outl(X86EMU_pioAddr port, u32 val) #endif LOG_outpd(port, val); } +#endif diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index ed5437e..7aa1bfb 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -43,6 +43,7 @@ #include "biosemui.h" +#if defined(CONFIG_BIOSEMU) /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** @@ -319,3 +320,4 @@ void _BE_bios_init(u32 * intrTab) bios_intr_tab[0x6D] = int10; X86EMU_setupIntrFuncs(bios_intr_tab); } +#endif diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c index 06d4ad3..4c3aedf 100644 --- a/drivers/bios_emulator/biosemu.c +++ b/drivers/bios_emulator/biosemu.c @@ -48,6 +48,8 @@ #include "biosemui.h" #include <malloc.h> +#if defined(CONFIG_BIOSEMU) + BE_sysEnv _BE_env = {{0}}; static X86EMU_memFuncs _BE_mem __attribute__((section(".got2"))) = { BE_rdb, @@ -368,3 +370,4 @@ int X86API BE_int86x(int intno, RMREGS * in, RMREGS * out, RMSREGS * sregs) sregs->gs = M.x86.R_GS; return out->x.ax; } +#endif diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c index 0f58a69..915739c 100644 --- a/drivers/bios_emulator/x86emu/debug.c +++ b/drivers/bios_emulator/x86emu/debug.c @@ -40,6 +40,8 @@ #include "x86emu/x86emui.h" #include <stdarg.h> +#if defined(CONFIG_BIOSEMU) + /*----------------------------- Implementation ----------------------------*/ #ifdef DEBUG @@ -459,3 +461,5 @@ void x86emu_dump_xregs(void) printk("NC "); printk("\n"); } + +#endif diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index 1e2dcfe..879f0a0 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -39,6 +39,8 @@ #include "x86emu/x86emui.h" +#if defined(CONFIG_BIOSEMU) + /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** @@ -1142,3 +1144,5 @@ unsigned decode_rmXX_address(int mod, int rm) return decode_rm01_address(rm); return decode_rm10_address(rm); } + +#endif diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c index d1380ce..d334fb5 100644 --- a/drivers/bios_emulator/x86emu/ops.c +++ b/drivers/bios_emulator/x86emu/ops.c @@ -76,6 +76,9 @@ ****************************************************************************/ #include "x86emu/x86emui.h" + +#if defined(CONFIG_BIOSEMU) + /*----------------------------- Implementation ----------------------------*/ /* constant arrays to do several instructions in just one function */ @@ -5429,3 +5432,5 @@ void (*x86emu_optab[256])(u8) __attribute__ ((section(".got2"))) = /* 0xfe */ x86emuOp_opcFE_byte_RM, /* 0xff */ x86emuOp_opcFF_word_RM, }; + +#endif diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c index 631a340..81c0d49 100644 --- a/drivers/bios_emulator/x86emu/ops2.c +++ b/drivers/bios_emulator/x86emu/ops2.c @@ -46,6 +46,8 @@ #include "x86emu/x86emui.h" +#if defined(CONFIG_BIOSEMU) + /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** @@ -1768,3 +1770,5 @@ void (*x86emu_optab2[256])(u8) __attribute__((section(".got2"))) = /* 0xfe */ x86emuOp2_illegal_op, /* 0xff */ x86emuOp2_illegal_op, }; + +#endif diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c index e0827d7..c1152ea 100644 --- a/drivers/bios_emulator/x86emu/prim_ops.c +++ b/drivers/bios_emulator/x86emu/prim_ops.c @@ -100,6 +100,8 @@ #define PRIM_OPS_NO_REDEFINE_ASM #include "x86emu/x86emui.h" +#if defined(CONFIG_BIOSEMU) + /*------------------------- Global Variables ------------------------------*/ static u32 x86emu_parity_tab[8] = @@ -2443,3 +2445,5 @@ DB( if (CHECK_SP_ACCESS()) M.x86.R_SP += 4; return res; } + +#endif diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c index bb7fcd9..566389f 100644 --- a/drivers/bios_emulator/x86emu/sys.c +++ b/drivers/bios_emulator/x86emu/sys.c @@ -41,6 +41,8 @@ #include "x86emu/x86emui.h" +#if defined(CONFIG_BIOSEMU) + /*------------------------- Global Variables ------------------------------*/ X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */ @@ -320,3 +322,5 @@ void X86EMU_prepareForInt(int num) M.x86.R_IP = mem_access_word(num * 4); M.x86.intr = 0; } + +#endif -- 1.5.1

2 3

[U-Boot-Users] [PATCH] Bios emulator from Jason Lin
by Michal Simek 09 Aug '07

09 Aug '07

Hi, Bios emulator code contains a lot of coding style issues. expecially Cute names. Makefile hasn't header, etc... Remove problems with warnings and errors for Microblaze cpu. Signed-off-by: Michal Simek <monstr(a)monstr.eu> diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 2a8e1a0..505e4ff 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -46,6 +46,7 @@ * 16 bit of the io port. * ****************************************************************************/ +#ifdef CONFIG_BIOSEMU #include "biosemui.h" @@ -717,3 +718,4 @@ void X86API BE_outl(X86EMU_pioAddr port, u32 val) #endif LOG_outpd(port, val); } +#endif diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index ed5437e..2522379 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -40,7 +40,7 @@ * video BIOS. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "biosemui.h" /*----------------------------- Implementation ----------------------------*/ @@ -319,3 +319,4 @@ void _BE_bios_init(u32 * intrTab) bios_intr_tab[0x6D] = int10; X86EMU_setupIntrFuncs(bios_intr_tab); } +#endif diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c index 06d4ad3..8c51ee3 100644 --- a/drivers/bios_emulator/biosemu.c +++ b/drivers/bios_emulator/biosemu.c @@ -44,7 +44,7 @@ * frambuffer function can work after run the BIOS. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "biosemui.h" #include <malloc.h> @@ -368,3 +368,4 @@ int X86API BE_int86x(int intno, RMREGS * in, RMREGS * out, RMSREGS * sregs) sregs->gs = M.x86.R_GS; return out->x.ax; } +#endif diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c index 0f58a69..2f776c2 100644 --- a/drivers/bios_emulator/x86emu/debug.c +++ b/drivers/bios_emulator/x86emu/debug.c @@ -36,7 +36,7 @@ * emulator. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "x86emu/x86emui.h" #include <stdarg.h> @@ -459,3 +459,4 @@ void x86emu_dump_xregs(void) printk("NC "); printk("\n"); } +#endif diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index 1e2dcfe..c1b754d 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -36,7 +36,7 @@ * instruction decoding and accessess of immediate data via IP. etc. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "x86emu/x86emui.h" /*----------------------------- Implementation ----------------------------*/ @@ -1142,3 +1142,4 @@ unsigned decode_rmXX_address(int mod, int rm) return decode_rm01_address(rm); return decode_rm10_address(rm); } +#endif diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c index d1380ce..40f6724 100644 --- a/drivers/bios_emulator/x86emu/ops.c +++ b/drivers/bios_emulator/x86emu/ops.c @@ -74,7 +74,7 @@ * the got2 sector. Removed some opcode. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "x86emu/x86emui.h" /*----------------------------- Implementation ----------------------------*/ @@ -5429,3 +5429,4 @@ void (*x86emu_optab[256])(u8) __attribute__ ((section(".got2"))) = /* 0xfe */ x86emuOp_opcFE_byte_RM, /* 0xff */ x86emuOp_opcFF_word_RM, }; +#endif diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c index 631a340..42b701b 100644 --- a/drivers/bios_emulator/x86emu/ops2.c +++ b/drivers/bios_emulator/x86emu/ops2.c @@ -43,7 +43,7 @@ * got2 sector. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "x86emu/x86emui.h" /*----------------------------- Implementation ----------------------------*/ @@ -1768,3 +1768,4 @@ void (*x86emu_optab2[256])(u8) __attribute__((section(".got2"))) = /* 0xfe */ x86emuOp2_illegal_op, /* 0xff */ x86emuOp2_illegal_op, }; +#endif diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c index e0827d7..9f51ede 100644 --- a/drivers/bios_emulator/x86emu/prim_ops.c +++ b/drivers/bios_emulator/x86emu/prim_ops.c @@ -96,7 +96,7 @@ * By inspection, one gets: bc = a'b + r(a' + b) * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #define PRIM_OPS_NO_REDEFINE_ASM #include "x86emu/x86emui.h" @@ -2443,3 +2443,4 @@ DB( if (CHECK_SP_ACCESS()) M.x86.R_SP += 4; return res; } +#endif diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c index bb7fcd9..00e286c 100644 --- a/drivers/bios_emulator/x86emu/sys.c +++ b/drivers/bios_emulator/x86emu/sys.c @@ -38,7 +38,7 @@ * functions will have to be overriden by the user library. * ****************************************************************************/ - +#ifdef CONFIG_BIOSEMU #include "x86emu/x86emui.h" /*------------------------- Global Variables ------------------------------*/ @@ -320,3 +320,4 @@ void X86EMU_prepareForInt(int num) M.x86.R_IP = mem_access_word(num * 4); M.x86.intr = 0; } +#endif

2 1

[U-Boot-Users] [PATCH] Use an absolute address when jumping out of 4k boot page
by Kumar Gala 09 Aug '07

09 Aug '07

On e500 when we leave the 4k boot page we should use an absolute address since we don't know where the board code may want us to be really running at. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- cpu/mpc85xx/start.S | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 9dfd38d..89bae58 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -261,12 +261,11 @@ _start_e500: #endif /* Jump out the last 4K page and continue to 'normal' start */ - bl 3f - b _start_cont + lis r1,_start_cont@h + ori r1,r1,_start_cont@l -3: li r0,0 + li r0,0 mtspr SRR1,r0 /* Keep things disabled for now */ - mflr r1 mtspr SRR0,r1 rfi isync -- 1.5.2.2

2 4

[U-Boot-Users] [PATCH: u-boot-fdt] Improve error print messages.
by Jerry Van Baren 09 Aug '07

09 Aug '07

Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- The American expression is "polishing the turd"... :-) common/fdt_support.c | 62 +++++++++++++++++++++++++------------------------- 1 files changed, 31 insertions(+), 31 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index 259bd42..b4dba2b 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -54,7 +54,7 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) err = fdt_check_header(fdt); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_chosen: %s\n", fdt_strerror(err)); return err; } @@ -66,11 +66,11 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) err = fdt_num_reservemap(fdt, &used, &total); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_chosen: %s\n", fdt_strerror(err)); return err; } if (used >= total) { - printf("WARNING fdt_chosen: " + printf("WARNING: " "no room in the reserved map (%d of %d)\n", used, total); return -1; @@ -88,7 +88,7 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) err = fdt_replace_reservemap_entry(fdt, j, initrd_start, initrd_end - initrd_start + 1); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_chosen: %s\n", fdt_strerror(err)); return err; } } @@ -114,8 +114,8 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) */ nodeoffset = fdt_add_subnode(fdt, 0, "chosen"); if (nodeoffset < 0) { - printf("WARNING fdt_chosen: " - "could not create the /chosen node (%s).\n", + printf("WARNING: " + "could not create the /chosen node %s.\n", fdt_strerror(nodeoffset)); return nodeoffset; } @@ -129,8 +129,8 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) err = fdt_setprop(fdt, nodeoffset, "bootargs", str, strlen(str)+1); if (err < 0) - printf("WARNING fdt_chosen: " - "could not set bootargs (%s).\n", + printf("WARNING: " + "could not set bootargs %s.\n", fdt_strerror(err)); } if (initrd_start && initrd_end) { @@ -138,23 +138,23 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force) err = fdt_setprop(fdt, nodeoffset, "linux,initrd-start", &tmp, sizeof(tmp)); if (err < 0) - printf("WARNING fdt_chosen: " - "could not set linux,initrd-start (%s).\n", + printf("WARNING: " + "could not set linux,initrd-start %s.\n", fdt_strerror(err)); tmp = __cpu_to_be32(initrd_end); err = fdt_setprop(fdt, nodeoffset, "linux,initrd-end", &tmp, sizeof(tmp)); if (err < 0) - printf("WARNING fdt_chosen: " - "could not set linux,initrd-end (%s).\n", + printf("WARNING: " + "could not set linux,initrd-end %s.\n", fdt_strerror(err)); } #ifdef OF_STDOUT_PATH err = fdt_setprop(fdt, nodeoffset, "linux,stdout-path", OF_STDOUT_PATH, strlen(OF_STDOUT_PATH)+1); if (err < 0) - printf("WARNING fdt_chosen: " - "could not set linux,stdout-path (%s).\n", + printf("WARNING: " + "could not set linux,stdout-path %s.\n", fdt_strerror(err)); #endif @@ -179,7 +179,7 @@ int fdt_env(void *fdt) err = fdt_check_header(fdt); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_env: %s\n", fdt_strerror(err)); return err; } @@ -191,7 +191,7 @@ int fdt_env(void *fdt) if (nodeoffset >= 0) { err = fdt_del_node(fdt, nodeoffset); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_env: %s\n", fdt_strerror(err)); return err; } } @@ -200,8 +200,8 @@ int fdt_env(void *fdt) */ nodeoffset = fdt_add_subnode(fdt, 0, "u-boot-env"); if (nodeoffset < 0) { - printf("WARNING fdt_env: " - "could not create the /u-boot-env node (%s).\n", + printf("WARNING: " + "could not create the /u-boot-env node %s.\n", fdt_strerror(nodeoffset)); return nodeoffset; } @@ -230,8 +230,8 @@ int fdt_env(void *fdt) continue; err = fdt_setprop(fdt, nodeoffset, lval, rval, strlen(rval)+1); if (err < 0) { - printf("WARNING fdt_env: " - "could not set %s (%s).\n", + printf("WARNING: " + "could not set %s %s.\n", lval, fdt_strerror(err)); return err; } @@ -303,7 +303,7 @@ int fdt_bd_t(void *fdt) err = fdt_check_header(fdt); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_bd_t: %s\n", fdt_strerror(err)); return err; } @@ -315,7 +315,7 @@ int fdt_bd_t(void *fdt) if (nodeoffset >= 0) { err = fdt_del_node(fdt, nodeoffset); if (err < 0) { - printf("libfdt: %s\n", fdt_strerror(err)); + printf("fdt_bd_t: %s\n", fdt_strerror(err)); return err; } } @@ -324,10 +324,10 @@ int fdt_bd_t(void *fdt) */ nodeoffset = fdt_add_subnode(fdt, 0, "bd_t"); if (nodeoffset < 0) { - printf("WARNING fdt_bd_t: " - "could not create the /bd_t node (%s).\n", + printf("WARNING: " + "could not create the /bd_t node %s.\n", fdt_strerror(nodeoffset)); - printf("libfdt: %s\n", fdt_strerror(nodeoffset)); + printf("fdt_bd_t: %s\n", fdt_strerror(nodeoffset)); return nodeoffset; } /* @@ -338,8 +338,8 @@ int fdt_bd_t(void *fdt) err = fdt_setprop(fdt, nodeoffset, bd_map[i].name, &tmp, sizeof(tmp)); if (err < 0) - printf("WARNING fdt_bd_t: " - "could not set %s (%s).\n", + printf("WARNING: " + "could not set %s %s.\n", bd_map[i].name, fdt_strerror(err)); } /* @@ -347,13 +347,13 @@ int fdt_bd_t(void *fdt) */ err = fdt_setprop(fdt, nodeoffset, "enetaddr", &bd->bi_enetaddr, 6); if (err < 0) - printf("WARNING fdt_bd_t: " - "could not set enetaddr (%s).\n", + printf("WARNING: " + "could not set enetaddr %s.\n", fdt_strerror(err)); err = fdt_setprop(fdt, nodeoffset, "ethspeed", &bd->bi_ethspeed, 4); if (err < 0) - printf("WARNING fdt_bd_t: " - "could not set ethspeed (%s).\n", + printf("WARNING: " + "could not set ethspeed %s.\n", fdt_strerror(err)); return 0; } -- 1.4.4.4

4 6

[U-Boot-Users] [PATCH] mpc83xx: fix ITX[GP] O=builddir builds
by Kim Phillips 09 Aug '07

09 Aug '07

make: *** No rule to make target `/work/wd/tmp/board/mpc8349itx/u-boot.lds', needed by `/work/wd/tmp/u-boot'. Stop. Both the ITX and ITX-GP fail when you use "make O=<some dir> ..." or "BUILD_DIR=<some dir> ./MAKEALL ..." Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- board/mpc8349itx/config.mk | 6 ------ 1 files changed, 0 insertions(+), 6 deletions(-) diff --git a/board/mpc8349itx/config.mk b/board/mpc8349itx/config.mk index 1901fdc..79f1765 100644 --- a/board/mpc8349itx/config.mk +++ b/board/mpc8349itx/config.mk @@ -29,9 +29,3 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp ifndef TEXT_BASE TEXT_BASE = 0xFEF00000 endif - -ifneq ($(OBJTREE),$(SRCTREE)) -# We are building u-boot in a separate directory, use generated -# .lds script from OBJTREE directory. -LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds -endif -- 1.5.0.3

2 1

[U-Boot-Users] Soft SPI support for all SPI modes
by Zach Sadecki 09 Aug '07

09 Aug '07

Here is a patch that will allow the soft SPI driver to support all different SPI modes (CPOL=0/1, CPHA=0/1). Signed-off-by: Zach Sadecki <zach.sadecki(a)ripcode.com> =================================================================== --- common/soft_spi.c +++ common/soft_spi.c @@ -39,7 +39,33 @@ #define PRINTD(fmt,args...) #endif +#ifndef CONFIG_SPI_CPOL +#define CONFIG_SPI_CPOL 0 +#endif +#ifndef CONFIG_SPI_CPHA +#define CONFIG_SPI_CPHA 0 +#endif + +#if (CONFIG_SPI_CPOL == 0) +#define SPI_CLOCK_IDLE 0 +#define SPI_CLOCK_ACTIVE 1 +#else +#define SPI_CLOCK_IDLE 1 +#define SPI_CLOCK_ACTIVE 0 +#endif + +#if (CONFIG_SPI_CPHA == 0) +/* Read on active (1st) edge */ +#define SPI_CLOCK_WRITE SPI_CLOCK_IDLE +#define SPI_CLOCK_READ SPI_CLOCK_ACTIVE +#else +/* Read on idle (2nd) edge */ +#define SPI_CLOCK_WRITE SPI_CLOCK_ACTIVE +#define SPI_CLOCK_READ SPI_CLOCK_IDLE +#endif + + /*=====================================================================* / /* Public Functions */ /*=====================================================================* / @@ -87,10 +113,12 @@ PRINTD("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", (int)chipsel, *(uint *)dout, *(uint *)din, bitlen); + SPI_SCL(SPI_CLOCK_IDLE); /* Ensure SPI clock starts in idle state */ if(chipsel != NULL) { (*chipsel)(1); /* select the target chip */ } - + SPI_DELAY; /* half clock delay after SS */ + for(j = 0; j < bitlen; j++) { /* * Check if it is time to work on a new byte. @@ -102,14 +130,14 @@ } tmpdin = 0; } - SPI_SCL(0); + SPI_SCL(SPI_CLOCK_WRITE); SPI_SDA(tmpdout & 0x80); SPI_DELAY; - SPI_SCL(1); - SPI_DELAY; + SPI_SCL(SPI_CLOCK_READ); tmpdin <<= 1; tmpdin |= SPI_READ; tmpdout <<= 1; + SPI_DELAY; } /* * If the number of bits isn't a multiple of 8, shift the last @@ -120,7 +148,7 @@ tmpdin <<= 8 - (bitlen % 8); *din++ = tmpdin; - SPI_SCL(0); /* SPI wants the clock left low for idle */ + SPI_SCL(SPI_CLOCK_IDLE); /* Leave SPI clock in idle state */ if(chipsel != NULL) { (*chipsel)(0); /* deselect the target chip */

2 1

[U-Boot-Users] [PATCH v2] mpc83xx: Correct the burst length for DDR2 with 32 bits
by Dave Liu 09 Aug '07

09 Aug '07

The burst length should be 4 for DDR2 with 32 bits bus Signed-off-by: Dave Liu <daveliu(a)freescale.com> --- cpu/mpc83xx/spd_sdram.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 647813f..2c17cee 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -574,7 +574,10 @@ long int spd_sdram() /* Check DIMM data bus width */ if (spd.dataw_lsb == 0x20) { - burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ + if (spd.mem_type == SPD_MEMTYPE_DDR) + burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ + if (spd.mem_type == SPD_MEMTYPE_DDR2) + burstlen = 0x02; /* 32 bit data bus, burst len is 4 */ printf("\n DDR DIMM: data bus width is 32 bit"); } else { burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */ @@ -730,8 +733,12 @@ long int spd_sdram() sdram_cfg |= 0x10000000; /* The DIMM is 32bit width */ - if (spd.dataw_lsb == 0x20) - sdram_cfg |= 0x000C0000; + if (spd.dataw_lsb == 0x20) { + if (spd.mem_type == SPD_MEMTYPE_DDR) + sdram_cfg |= 0x000C0000; + if (spd.mem_type == SPD_MEMTYPE_DDR2) + sdram_cfg |= 0x00080000; + } ddrc_ecc_enable = 0; -- 1.5.3.rc2.29.gc4640f

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[U-Boot-Users] [PATCH] tsec: fix multiple PHY support
by Kim Phillips 09 Aug '07

09 Aug '07

From: Zach Sadecki <Zach.Sadecki(a)ripcode.com> The change entitled "Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx" broke multiple PHY support in tsec.c. This fixes it. Signed-off-by: Zach Sadecki <Zach.Sadecki(a)ripcode.com> Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- drivers/tsec.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index 55334d6..0e8b375 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -71,6 +71,7 @@ static struct tsec_info_struct tsec_info[] = { #else {TSEC1_PHY_ADDR, TSEC_GIGABIT, TSEC1_PHYIDX}, #endif +#else {0, 0, 0}, #endif #if defined(CONFIG_TSEC2) @@ -79,6 +80,7 @@ static struct tsec_info_struct tsec_info[] = { #else {TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX}, #endif +#else {0, 0, 0}, #endif #ifdef CONFIG_MPC85XX_FEC -- 1.5.2.2

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