July 2007 - U-Boot

[U-Boot-Users] Linux kernel hang (infinite loop)
by Madhu Saravana Sibi Govindan 02 Jan '08

02 Jan '08

Hello all, I'm using U-boot to bring up a custom 440gp-based board. We are able to transfer the kernel image (uImage) to the target board's memory and jump to it. But, the kernel seems to hang after that. We have verified that the board info struct and the clock frequencies are ok. We also have a BDI2000 hardware debugger with us, but we are unable to set any breakpoints using this (both using telnet or using gdb). However, I can use the telnet interface and single-step the 440gp after it seems to hang. I found that 440gp is infinitely looping through the "DataTLBError" routine. It is unclear to me what might have caused this in the first place. Has anyone seen this behaviour before? We are currently working on getting breakpoints to work using the BDI2000. Any help is greatly appreciated. Regards, G.Sibi

4 11

Re: [U-Boot-Users] boot up u-boot from RAM
by Nghiem, Tien 26 Nov '07

26 Nov '07

Lei, You have to rebuild your code to put your code in the RAM area (other than the FLASH area). Don't use the address 0x00-0x2fff because its reserved for the exception vectors usually. I have a Lite5200 EVB. I use the address 0x20000 to put my u-boot in RAM and it works. I don't know if it could be done for the mpc8270. Tien -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net]On Behalf Of Lei Sun Sent: Thursday, October 26, 2006 4:15 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] boot up u-boot from RAM Hi all: I am debugging a costomized board based on mpc8270, due to the design flaw, we can't boot up the system using flash, so I was trying to debug u-boot by loading it into the RAM. I used JTAG debugger to initialize the SDRAM and load the u-boot to 0x0, after reset, the PC is at 0x100. the disassembled code looks correct on that location, however, i can't single step start from 0x100. Is that because 0x100 is the reset vector ? I tried to put some breakpoint at some places not far from start point, but it gave me "unknown halt at 0x00000000" error after "run" command. after that the memory seems corrupted. Too bad I was using a bad debugger(Guardian-SE), I have a evaluation copy of the codewarrior plus USB+TAP from freescale. I tried that on our PQ2FADS-VR SDK. After reset, and CPU halt, I can't see any disassembed code on 0x100 (the uboot is already in the flash, and I assume it should read data from CS0 upon reset). Although the code does execute after hitting "run" button. I wonder why can't I see the disassembed code after reset? Thanks lei ------------------------------------------------------------------------- Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&dat=121642 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

4 3

[U-Boot-Users] AMCC440SPe & PCI Express
by Patil, Pankaj P. 26 Nov '07

26 Nov '07

Hi, I have been using u-boot-1.1.5 on my custom 440SPe based board. I am able to establish a link on PCIE0. However, I am having trouble accessing outbound Memory on PCIE0. My memory map seetings for Outbound PCIE memory are the default U-boot Settings. I was curious if anybody's tried accessing PCIE Outbound memory with the default settings. I seem to get a bus error when I try to access that region. Thanks Pankaj

3 3

[U-Boot-Users] [PATCH 0/6] updates for the TQM8xx board family
by Martin Krause 05 Oct '07

05 Oct '07

The following series implements some patches and updates for the TQM8xx board family. The patches should be independent from each other, but it is propably a good idea to apply them in the given order, to avoid merge conflicts. -- Martin Krause

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[U-Boot-Users] [PATCH 0/4] Some patches for the TQM885D board
by Martin Krause 05 Oct '07

05 Oct '07

The following series implements some patches and updates for the TQM885D board. -- Martin Krause

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Re: [U-Boot-Users] adding support to new board
by Jeff Mann 26 Sep '07

26 Sep '07

See http://www.freescale.com/files/32bit/doc/app_note/AN3220.pdf -JM -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net] On Behalf Of Maximus Sent: Saturday, July 15, 2006 5:31 AM To: U-Boot-Users(a)lists.sourceforge.net Subject: [U-Boot-Users] adding support to new board Hi, Is there any document (step by step) approach on how to add u-boot support to a new board? any advices, Regards, jo ------------------------------------------------------------------------ - Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&dat=121642 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

4 3

[U-Boot-Users] helloworld app from flash?
by Ram 08 Sep '07

08 Sep '07

Hi, im trying to run the helloworld application 1st Option: download the hello_world.bin to some location on RAM and execute it OMAP5912OSK: tftpboot 0x10000000 hello_world.bin OMAP5912OSK: go 0x10000004 This works fine. no problem 2nd Option: I want to burn the hello_world.bin into flash. During startup i want u-boot to launch it after booting - just like the way it boots the kernel. It does not work for me, this is what i did. $ ../tools/mkimage -A arm -O linux -T kernel -C gzip -a 0x10000000 -e 0x10000004 -n 'Hello Image' -d hello_world.bin.gz hello.img I downloaded the hello.img and burnt it to 0x40000 I did: setenv bootcmd bootm 0x40000 Now when i restarted the boot i get the following:- Example expects ABI version 2 Actual U-Boot ABI version 2 Hello World argc = 0 data abort pc : [<10000058>] lr : [<10000048>] sp : 1103fc10 ip : ffffffff fp : 00000001 r10: 110996d8 r9 : 1103fca4 r8 : 1103ffdc r7 : 110996d8 r6 : 00000203 r5 : 00000000 r4 : 00000000 r3 : 00000020 r2 : 00000001 r1 : 0000000a r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... All i am doing in the hello world example is to read a line and print the line entered. I am using readline function for doing that. The programs works fine if i download it to RAM and say go. but if i flash it it does not work?. Am i missing something?. Regards, sriram

4 6

[U-Boot-Users] PATCH - Gateworks Avila (Xscale IXP42x) support
by Ranjit Deshpande 29 Aug '07

29 Aug '07

I've tried to search the mailing list but was unable to do so. I am assuming that this board has no support at the momemt. What is Avila ? =============== This is an affordable Xscale development platform as well as a usable, off-the-shelf Wireless AP/Router platform. This platform is based on the IXDP425 but has some minor differences most of which are contained in the config file. This board has its own mach-type defined by Linux so I've added that to board/ixdp425/ixdp425.c and also put in the board information string. More information on these boards can be found here: http://www.gateworks.com/avila_processors.htm Which tree does this apply to ? =============================== IXP custodian tree: u-boot-ixp.git What is supported/tested with this patch ? ========================================== * Boot from flash (JFFS2 or raw image) * NPE Ethernet (you will need NPE microcode from Intel). I am working on a patch for supporting the CF IDE interface on this board which I will submit separately. Signed-off-by: Ranjit Deshpande <ranjit(a)kenati.com> =========================================================================== diff -purN u-boot/u-boot-ixp.git/board/ixdp425/ixdp425.c u-boot.avila/u-boot-ixp.git/board/ixdp425/ixdp425.c --- u-boot/u-boot-ixp.git/board/ixdp425/ixdp425.c 2007-06-06 07:26:56.000000000 -0700 +++ u-boot.avila/u-boot-ixp.git/board/ixdp425/ixdp425.c 2007-07-23 15:31:55.438517399 -0700 @@ -45,9 +45,14 @@ int board_post_init (void) int board_init (void) { +#ifdef CONFIG_AVILA + /* arch number of Gateworks Avila */ + gd->bd->bi_arch_number = MACH_TYPE_AVILA; +#endif +#ifdef CONFIG_IXDP425 /* arch number of IXDP */ gd->bd->bi_arch_number = MACH_TYPE_IXDP425; - +#endif /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; @@ -91,9 +96,29 @@ int checkboard(void) #ifdef CONFIG_IXDPG425 puts("Board: IXDPG425 - Intel Network Gateway Reference Platform"); -#else +#endif +#ifdef CONFIG_IXDP425 puts("Board: IXDP425 - Intel Development Platform"); #endif +#ifdef CONFIG_AVILA + puts("Board: Gateworks Avila " +#ifdef CONFIG_AVILA_2342 + "2342" +#endif +#ifdef CONFIG_AVILA_2345 + "2345" +#endif +#ifdef CONFIG_AVILA_2347 + "2347" +#endif +#ifdef CONFIG_AVILA_2348_2 + "2348-2" +#endif +#ifdef CONFIG_AVILA_2348_4 + "2348-4" +#endif + ); +#endif if (s != NULL) { puts(", serial# "); diff -purN u-boot/u-boot-ixp.git/include/configs/avila.h u-boot.avila/u-boot-ixp.git/include/configs/avila.h --- u-boot/u-boot-ixp.git/include/configs/avila.h 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.avila/u-boot-ixp.git/include/configs/avila.h 2007-07-23 19:11:54.368379254 -0700 @@ -0,0 +1,223 @@ +/* + * (C) Copyright 2003 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2007 + * Ranjit Deshpande, Kenati Technologies, Inc. <ranjit(a)kenati.com> + * + * Configuation settings for the Gateworks Avila board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_IXP425 1 /* This is an IXP425 CPU */ +#define CONFIG_AVILA 1 /* on a Gateworks Avila board */ + +/* Define the sub-type for the Avila platform. */ +#undef CONFIG_AVILA_2342 1 +#undef CONFIG_AVILA_2345 +#undef CONFIG_AVILA_2347 +#undef CONFIG_AVILA_2348_2 +#define CONFIG_AVILA_2348_4 + +#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */ +#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */ + +/*************************************************************** + * U-boot generic defines start here. + ***************************************************************/ + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ + CFG_CMD_PCI | \ + CFG_CMD_JFFS2) & \ + ~(CFG_CMD_ITEST | \ + CFG_CMD_NFS | \ + CFG_CMD_AUTOSCRIPT) + +#define CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_EEPRO100 +/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +/* These are u-boot generic parameters */ +#include <cmd_confdefs.h> + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.0.21 +#define CONFIG_SERVERIP 192.168.0.148 +#define CONFIG_BOOTCOMMAND "bootm 50040000" +#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" +#define CONFIG_CMDLINE_TAG + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x00010000 /* default load address */ + +#define CFG_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */ + /* valid baudrates */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*************************************************************** + * Platform/Board specific defines start here. + ***************************************************************/ + +/* + * Hardware drivers + */ + + +/* + * select serial console configuration + */ +#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */ +#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ + +#if defined (CONFIG_AVILA_2347) || defined (CONFIG_AVILA_2348_2) +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ +#else +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ +#endif + +/* CFI flash driver used, therefore size is ignored */ +#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ +#define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */ +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ + +#define CFG_DRAM_BASE 0x00000000 +#define CFG_DRAM_SIZE 0x04000000 + +#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_MONITOR_BASE CFG_FLASH_BASE +#define CFG_MONITOR_LEN (384 << 10) /* Reserve 256 kB for Monitor */ + +/* + * Expansion bus settings + */ +#define CFG_EXP_CS0 0xbcd23c42 + +/* + * SDRAM settings + */ +#define CFG_SDR_CONFIG 0xa +#define CFG_SDR_MODE_CONFIG 0x1 +#define CFG_SDRAM_REFRESH_CNT 0x81a + +/* + * GPIO settings + */ + +/* + * FLASH and environment organization + */ +/* + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ + +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_ENV_IS_IN_FLASH 1 + +#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } + +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ + +/* NPE Settings. Enable if you have downloaded the microcode for Ethernet */ +/* +#define CONFIG_IXP4XX_NPE 1 +#define CFG_NPE_NUMS 2 +#define CONFIG_HAS_ETH1 1 +#ifdef CONFIG_AVILA_2345 +#define CONFIG_PHY_ADDR 4 +#define CONFIG_PHY1_ADDR 5 +#else +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY1_ADDR 1 +#endif +#define CONFIG_MII 1 +#define CFG_CACHELINE_SIZE 32 +*/ + +#endif /* __CONFIG_H */ diff -purN u-boot/u-boot-ixp.git/MAKEALL u-boot.avila/u-boot-ixp.git/MAKEALL --- u-boot/u-boot-ixp.git/MAKEALL 2007-06-06 07:26:56.000000000 -0700 +++ u-boot.avila/u-boot-ixp.git/MAKEALL 2007-07-23 19:13:11.297004839 -0700 @@ -230,7 +230,10 @@ LIST_pxa=" \ xsengine zylonite \ " -LIST_ixp="ixdp425 ixdpg425 pdnb3 scpu" +LIST_ixp=" \ + avila ixdp425 ixdpg425 pdnb3 \ + scpu +" LIST_arm=" \ diff -purN u-boot/u-boot-ixp.git/Makefile u-boot.avila/u-boot-ixp.git/Makefile --- u-boot/u-boot-ixp.git/Makefile 2007-06-06 07:26:56.000000000 -0700 +++ u-boot.avila/u-boot-ixp.git/Makefile 2007-07-23 15:16:43.276950219 -0700 @@ -2148,6 +2148,9 @@ SMN42_config : unconfig adsvix_config : unconfig @$(MKCONFIG) $(@:_config=) arm pxa adsvix +avila_config : unconfig + @$(MKCONFIG) $(@:_config=) arm ixp ixdp425 + cerf250_config : unconfig @$(MKCONFIG) $(@:_config=) arm pxa cerf250

2 1

[U-Boot-Users] CFG_MONITOR_BASE < CFG_FLASH_BASE
by Timur Tabi 16 Aug '07

16 Aug '07

In several board config files (namely 8xxx boards), I see code that looks like this: #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) #define CFG_RAMBOOT #else #undef CFG_RAMBOOT #endif ... #ifndef CFG_RAMBOOT #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ #define CFG_ENV_SIZE 0x2000 #else #define CFG_NO_FLASH 1 /* Flash is not usable now */ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) #define CFG_ENV_SIZE 0x2000 #endif So CFG_RAMBOOT is defined if U-Boot is located in RAM instead of in Flash. On a system that has flash, why would we ever support this configuration? It doesn't even make any sense, because a whole bunch of DDR and LAWBAR setup needs to happen before RAM can even be accessed, so you can't copy u-boot to RAM and reset the system. -- Timur Tabi Linux Kernel Developer @ Freescale

6 16

[U-Boot-Users] 85xxCDS: Add make targets for legacy systems.
by Randy Vinson 14 Aug '07

14 Aug '07

>From 8bd3d40edb36a8b480aa6f2fbc0c8b3f2be5aae8 Mon Sep 17 00:00:00 2001 From: Randy Vinson <rvinson(a)linuxbox.(none)> Date: Tue, 27 Feb 2007 19:42:22 -0700 Subject: [PATCH] 85xxCDS: Add make targets for legacy systems. The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson(a)mvista.com> --- Makefile | 27 ++++++++++++++++++++++++--- board/cds/common/via.c | 2 +- board/cds/mpc8541cds/mpc8541cds.c | 15 +++++++++------ board/cds/mpc8548cds/mpc8548cds.c | 15 +++++++++------ board/cds/mpc8555cds/mpc8555cds.c | 15 +++++++++------ cpu/mpc85xx/pci.c | 2 +- include/configs/MPC8541CDS.h | 7 +++++++ include/configs/MPC8548CDS.h | 8 ++++++++ include/configs/MPC8555CDS.h | 7 +++++++ 9 files changed, 75 insertions(+), 23 deletions(-) diff --git a/Makefile b/Makefile index dd017d6..beb8a36 100644 --- a/Makefile +++ b/Makefile @@ -1751,17 +1751,38 @@ MPC8540EVAL_66_slave_config: unconfig MPC8560ADS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads +MPC8541CDS_legacy_config \ MPC8541CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8541cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds cds MPC8544DS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale +MPC8548CDS_legacy_config \ MPC8548CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8548cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds cds +MPC8555CDS_legacy_config \ MPC8555CDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8555cds cds + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _legacy_,$@)" ] ; then \ + echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ + echo "... legacy" ; \ + fi + @$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds cds MPC8568MDS_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds diff --git a/board/cds/common/via.c b/board/cds/common/via.c index ba6cebe..d64701b 100644 --- a/board/cds/common/via.c +++ b/board/cds/common/via.c @@ -47,7 +47,7 @@ void mpc85xx_config_via(struct pci_controller *hose, * This allows legacy I/O (i8259, etc) on the VIA * southbridge to be accessed. */ - bridge = PCI_BDF(0,17,0); + bridge = PCI_BDF(0,BRIDGE_ID,0); pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0); pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0); pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10); diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c index 4192324..558ba99 100644 --- a/board/cds/mpc8541cds/mpc8541cds.c +++ b/board/cds/mpc8541cds/mpc8541cds.c @@ -476,14 +476,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 929ff2e..6b78a92 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -309,14 +309,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c index 704bf03..8f16421 100644 --- a/board/cds/mpc8555cds/mpc8555cds.c +++ b/board/cds/mpc8555cds/mpc8555cds.c @@ -473,14 +473,17 @@ void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_ta static struct pci_config_table pci_mpc85xxcds_config_table[] = { {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1, + {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, + {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5, + {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, + mpc85xx_config_via_usb, {0,0,0}}, + {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, + mpc85xx_config_via_usb2, {0,0,0}}, + {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}}, + {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, + mpc85xx_config_via_ac97, {0,0,0}}, {}, }; diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c index 3c1a323..db09e45 100644 --- a/cpu/mpc85xx/pci.c +++ b/cpu/mpc85xx/pci.c @@ -142,7 +142,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose) u8 header_type; pci_hose_read_config_byte(hose, - PCI_BDF(0,17,0), + PCI_BDF(0,BRIDGE_ID,0), PCI_HEADER_TYPE, &header_type); } diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index fb360d2..515f1f4 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI2_IO_PHYS 0xe2100000 #define CFG_PCI2_IO_SIZE 0x100000 /* 1M */ +#ifdef CONFIG_LEGACY +#define BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define BRIDGE_ID 28 +#define VIA_ID 4 +#endif #if defined(CONFIG_PCI) diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 680009d..6519bf7 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -369,6 +369,14 @@ extern unsigned long get_clock_freq(void); #define CFG_RIO_MEM_BASE 0xC0000000 #define CFG_RIO_MEM_SIZE 0x20000000 /* 512M */ +#ifdef CONFIG_LEGACY +#define BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define BRIDGE_ID 28 +#define VIA_ID 4 +#endif + #if defined(CONFIG_PCI) #define CONFIG_NET_MULTI diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 4c8b4e7..bf256a0 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI2_IO_PHYS 0xe2100000 #define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */ +#ifdef CONFIG_LEGACY +#define ARCADIA_BRIDGE_ID 17 +#define VIA_ID 2 +#else +#define ARCADIA_BRIDGE_ID 28 +#define VIA_ID 4 +#endif #if defined(CONFIG_PCI) -- 1.5.3.rc2.22.g69a9b

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