May 2007 - U-Boot

[U-Boot-Users] Patch: MPC8220 FEC and DMA update - part 1
by TsiChung Liew 15 May '07

15 May '07

- Better handling in ethernet MII, applied new DMA functions Regards, TsiChung Liew Signed-off by: TsiChung Liew Tsi-Chung.Liew(a)freescale.com diff -rupN u-boot-all.git/cpu/mpc8220/cpu_init.c u-boot-all-8220- fec/cpu/mpc8220/cpu_init.c --- u-boot-all.git/cpu/mpc8220/cpu_init.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-fec/cpu/mpc8220/cpu_init.c 2007-05-10 16:51:31.000000000 -0500 @@ -23,6 +23,7 @@ #include <common.h> #include <mpc8220.h> +#include "MCD_dma.h" DECLARE_GLOBAL_DATA_PTR; @@ -129,8 +130,8 @@ int cpu_init_r (void) *(vu_long *) 0xf0000710 |= 0x00000001; #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC8220_FEC) - /* load FEC microcode */ - loadtask (0, 2); + MCD_initDma((dmaRegs *) (MMAP_DMA), (void *)(MMAP_SRAM + 512), + MCD_RELOC_TASKS); #endif return (0); } diff -rupN u-boot-all.git/cpu/mpc8220/dma.h u-boot-all-8220- fec/cpu/mpc8220/dma.h --- u-boot-all.git/cpu/mpc8220/dma.h 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-fec/cpu/mpc8220/dma.h 2007-05-10 16:51:42.000000000 -0500 @@ -23,21 +23,8 @@ *--------------------------------------------------------------------- */ -/* Layout of Ethernet controller Parameter SRAM area: - * ---------------------------------------------------------------- - * 0x00: TBD_BASE, base address of TX BD ring - * 0x04: TBD_NEXT, address of next TX BD to be processed - * 0x08: RBD_BASE, base address of RX BD ring - * 0x0C: RBD_NEXT, address of next RX BD to be processed - * --------------------------------------------------------------- - * ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH). - */ - -/* base address of SRAM area to store parameters used by Ethernet tasks */ -#define FEC_PARAM_BASE (MMAP_SRAM + 0x5b00) - /* base address of SRAM area for buffer descriptors */ -#define FEC_BD_BASE (MMAP_SRAM + 0x5b20) +#define FEC1_BD_BASE (MMAP_SRAM + 0x2200) /*--------------------------------------------------------------------- * common shortcuts used by driver C code diff -rupN u-boot-all.git/cpu/mpc8220/fec.c u-boot-all-8220- fec/cpu/mpc8220/fec.c --- u-boot-all.git/cpu/mpc8220/fec.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-fec/cpu/mpc8220/fec.c 2007-05-10 16:52:47.000000000 -0500 @@ -12,41 +12,173 @@ #include <net.h> #include <miiphy.h> #include "dma.h" +#include "MCD_dma.h" #include "fec.h" -#undef DEBUG #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \ defined(CONFIG_MPC8220_FEC) +DECLARE_GLOBAL_DATA_PTR; + #if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) #error "CONFIG_MII has to be defined!" #endif -#ifdef DEBUG -static void tfifo_print (char *devname, mpc8220_fec_priv * fec); -static void rfifo_print (char *devname, mpc8220_fec_priv * fec); -#endif /* DEBUG */ - -#ifdef DEBUG -static u32 local_crc32 (char *string, unsigned int crc_value, int len); +/* dma related defines */ +#define FEC1_RX_TASK 0 +#define FEC1_TX_TASK 1 +#define FEC1_RX_PRIORITY 6 +#define FEC1_TX_PRIORITY 7 +#define FEC1_RX_INIT 16 +#define FEC1_TX_INIT 17 + +#define FEC2_RX_TASK 2 +#define FEC2_TX_TASK 3 +#define FEC2_RX_PRIORITY 6 +#define FEC2_TX_PRIORITY 7 +#define FEC2_RX_INIT 30 +#define FEC2_TX_INIT 31 + +#define FEC1_TBD_BASE FEC1_BD_BASE +#define FEC1_RBD_BASE FEC1_BD_BASE + (FEC_TBD_NUM * sizeof(FEC_BD)) +#define FEC2_TBD_BASE FEC1_RBD_BASE + (FEC_RBD_NUM * sizeof(FEC_BD)) +#define FEC2_RBD_BASE FEC2_TBD_BASE + (FEC_TBD_NUM * sizeof(FEC_BD)) + +#define PKT_MAXBUF_SIZE 1518 +#define TOUT_LOOP 8000 +#define FIFO_ERRSTAT (FIFO_STAT_RXW | FIFO_STAT_UF | FIFO_STAT_OF) + +#undef ET_DEBUG + +mpc8220_fec_priv fec_info[] = { + { + MMAP_FEC1, /* io base */ + 0, /* num */ + FEC1_RX_TASK, /* rxTask */ + FEC1_TX_TASK, /* txTask */ + FEC1_RX_PRIORITY, /* rxPri */ + FEC1_TX_PRIORITY, /* txPri */ + FEC1_RX_INIT, /* rxInit */ + FEC1_TX_INIT, /* txInit */ + MII10, /* xcv_type */ +#ifdef CFG_DISCOVER_PHY + -1, /* phy_addr */ +#else + CONFIG_PHY_ADDR, #endif - -typedef struct { - u8 data[1500]; /* actual data */ - int length; /* actual length */ - int used; /* buffer in use or not */ - u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */ -} NBUF; + 0, /* phy_dupspd */ + 0, /* phy_name */ + 0, /* phyname init */ + (FEC_BD *) FEC1_RBD_BASE, /* rbdBase */ + (FEC_BD *) FEC1_TBD_BASE, /* tbdBase */ + 0, /* rbdIndex */ + 0, /* tbdIndex */ + 0, /* usedTbdIndex */ + 0, /* cleanTbdNum */ + } + , +#ifdef CONFIG_HAS_ETH1 + { + MMAP_FEC2, /* io base */ + 1, /* num */ + FEC2_RX_TASK, /* rxTask */ + FEC2_TX_TASK, /* txTask */ + FEC2_RX_PRIORITY, /* rxPri */ + FEC2_TX_PRIORITY, /* txPri */ + FEC2_RX_INIT, /* rxInit */ + FEC2_TX_INIT, /* txInit */ + MII10, /* xcv_type */ +#ifdef CFG_DISCOVER_PHY + -1, /* phy_addr */ +#else + CONFIG_PHY1_ADDR, +#endif + 0, /* phy_dupspd */ + 0, /* phy_name */ + 0, /* phyname init */ + (FEC_BD *) FEC2_RBD_BASE, /* rbdBase */ + (FEC_BD *) FEC2_TBD_BASE, /* tbdBase */ + 0, /* rbdIndex */ + 0, /* tbdIndex */ + 0, /* usedTbdIndex */ + 0, /* cleanTbdNum */ + } +#endif +}; + +int mpc8220_fec_rbd_init(mpc8220_fec_priv * fec); +void mpc8220_fec_tbd_init(mpc8220_fec_priv * fec); +void mpc8220_fec_rbd_clean(mpc8220_fec_priv * fec, FEC_BD * pRbd); +void mpc8220_fec_rbd_clean(mpc8220_fec_priv * fec, FEC_BD * pRbd); +void mpc8220_fec_tbd_scrub(mpc8220_fec_priv * fec); +void mpc8220_fec_set_hwaddr(mpc8220_fec_priv * fec, char *mac); +void mpc8220_fec_set_hwaddr(mpc8220_fec_priv * fec, char *mac); +void mpc8220_fec_halt(struct eth_device *dev); +int mpc8220_fec_init(struct eth_device *dev, bd_t * bis); +int mpc8220_fec_send(struct eth_device *dev, volatile void *eth_data, + int data_length); +int mpc8220_fec_recv(struct eth_device *dev); +int mpc8220_fec_initialize(bd_t * bis); +void setFecDuplexSpeed(mpc8220_fec_priv * fec); +void mii_discover_phy(struct eth_device *dev); +int check_connection(struct eth_device *dev); int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal); int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data); /********************************************************************/ -#ifdef DEBUG -static void mpc8220_fec_phydump (char *devname) +#ifdef ET_DEBUG +static void tfifo_print(char *devname, mpc8220_fec_priv * fec) +{ + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; + u16 phyStatus; + + if ((eth->tfifo_lrf_ptr != eth->tfifo_lwf_ptr) + || (eth->tfifo_rdptr != eth->tfifo_wrptr)) { + + miiphy_read(devname, fec->phy_addr, PHY_BMSR, &phyStatus); + printf("\nphyStatus: 0x%04x\n", phyStatus); + printf("ecntrl: 0x%08x\n", eth->ecntrl); + printf("ievent: 0x%08x\n", eth->ievent); + printf("x_status: 0x%08x\n", eth->x_status); + printf("tfifo: status 0x%08x\n", eth->tfifo_status); + + printf(" control 0x%08x\n", eth->tfifo_cntrl); + printf(" lrfp 0x%08x\n", eth->tfifo_lrf_ptr); + printf(" lwfp 0x%08x\n", eth->tfifo_lwf_ptr); + printf(" alarm 0x%08x\n", eth->tfifo_alarm); + printf(" readptr 0x%08x\n", eth->tfifo_rdptr); + printf(" writptr 0x%08x\n", eth->tfifo_wrptr); + } +} + +static void rfifo_print(char *devname, mpc8220_fec_priv * fec) +{ + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; + u16 phyStatus; + + if ((eth->rfifo_lrf_ptr != eth->rfifo_lwf_ptr) + || (eth->rfifo_rdptr != eth->rfifo_wrptr)) { + + miiphy_read(devname, fec->phy_addr, PHY_BMSR, &phyStatus); + printf("\nphyStatus: 0x%04x\n", phyStatus); + printf("ecntrl: 0x%08x\n", eth->ecntrl); + printf("ievent: 0x%08x\n", eth->ievent); + printf("x_status: 0x%08x\n", eth->x_status); + printf("rfifo: status 0x%08x\n", eth->rfifo_status); + + printf(" control 0x%08x\n", eth->rfifo_cntrl); + printf(" lrfp 0x%08x\n", eth->rfifo_lrf_ptr); + printf(" lwfp 0x%08x\n", eth->rfifo_lwf_ptr); + printf(" alarm 0x%08x\n", eth->rfifo_alarm); + printf(" readptr 0x%08x\n", eth->rfifo_rdptr); + printf(" writptr 0x%08x\n", eth->rfifo_wrptr); + } +} + +static void mpc8220_fec_phydump(char *devname, mpc8220_fec_priv * fec) { u16 phyStatus, i; - u8 phyAddr = CONFIG_PHY_ADDR; u8 reg_mask[] = { #if CONFIG_PHY_TYPE == 0x79c874 /* AMD Am79C874 */ /* regs to print: 0...7, 16...19, 21, 23, 24 */ @@ -61,7 +193,7 @@ static void mpc8220_fec_phydump (char *d for (i = 0; i < 32; i++) { if (reg_mask[i]) { - miiphy_read (devname, phyAddr, i, &phyStatus); + miiphy_read(devname, fec->phy_addr, i, &phyStatus); printf ("Mii reg %d: 0x%04x\n", i, phyStatus); } } @@ -69,7 +201,7 @@ static void mpc8220_fec_phydump (char *d #endif /********************************************************************/ -static int mpc8220_fec_rbd_init (mpc8220_fec_priv * fec) +int mpc8220_fec_rbd_init(mpc8220_fec_priv * fec) { int ix; char *data; @@ -85,7 +217,7 @@ static int mpc8220_fec_rbd_init (mpc8220 fec->rbdBase[ix].dataPointer = (u32) data; } fec->rbdBase[ix].status = FEC_RBD_EMPTY; - fec->rbdBase[ix].dataLength = 0; + fec->rbdBase[ix].dataLength = FEC_MAX_PKT_SIZE; } once++; @@ -99,7 +231,7 @@ static int mpc8220_fec_rbd_init (mpc8220 } /********************************************************************/ -static void mpc8220_fec_tbd_init (mpc8220_fec_priv * fec) +void mpc8220_fec_tbd_init(mpc8220_fec_priv * fec) { int ix; @@ -121,7 +253,7 @@ static void mpc8220_fec_tbd_init (mpc822 } /********************************************************************/ -static void mpc8220_fec_rbd_clean (mpc8220_fec_priv * fec, FEC_RBD * pRbd) +void mpc8220_fec_rbd_clean(mpc8220_fec_priv * fec, FEC_BD * pRbd) { /* * Reset buffer descriptor as empty @@ -131,12 +263,12 @@ static void mpc8220_fec_rbd_clean (mpc82 else pRbd->status = FEC_RBD_EMPTY; - pRbd->dataLength = 0; + pRbd->dataLength = FEC_MAX_PKT_SIZE; /* - * Now, we have an empty RxBD, restart the SmartDMA receive task + * Now, we have an empty RxBD, restart the DMA receive task */ - DMA_TASK_ENABLE (FEC_RECV_TASK_NO); + MCD_continDma(fec->rxTask); /* * Increment BD count @@ -145,11 +277,11 @@ static void mpc8220_fec_rbd_clean (mpc82 } /********************************************************************/ -static void mpc8220_fec_tbd_scrub (mpc8220_fec_priv * fec) +void mpc8220_fec_tbd_scrub(mpc8220_fec_priv * fec) { - FEC_TBD *pUsedTbd; + FEC_BD *pUsedTbd; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("tbd_scrub: fec->cleanTbdNum = %d, fec->usedTbdIndex = %d\n", fec->cleanTbdNum, fec->usedTbdIndex); #endif @@ -160,7 +292,7 @@ static void mpc8220_fec_tbd_scrub (mpc82 while (fec->cleanTbdNum < FEC_TBD_NUM) { pUsedTbd = &fec->tbdBase[fec->usedTbdIndex]; if (pUsedTbd->status & FEC_TBD_READY) { -#ifdef DEBUG +#ifdef ET_DEBUG printf ("Cannot clean TBD %d, in use\n", fec->cleanTbdNum); #endif @@ -184,13 +316,13 @@ static void mpc8220_fec_tbd_scrub (mpc82 } /********************************************************************/ -static void mpc8220_fec_set_hwaddr (mpc8220_fec_priv * fec, char *mac) +void mpc8220_fec_set_hwaddr(mpc8220_fec_priv * fec, char *mac) { + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; u8 currByte; /* byte for which to compute the CRC */ int byte; /* loop - counter */ int bit; /* loop - counter */ u32 crc = 0xffffffff; /* initial value */ - /* * The algorithm used is the following: * we loop on each of the six bytes of the provided address, @@ -225,32 +357,32 @@ static void mpc8220_fec_set_hwaddr (mpc8 * Set individual hash table register */ if (crc >= 32) { - fec->eth->iaddr1 = (1 << (crc - 32)); - fec->eth->iaddr2 = 0; + eth->iaddr1 = (1 << (crc - 32)); + eth->iaddr2 = 0; } else { - fec->eth->iaddr1 = 0; - fec->eth->iaddr2 = (1 << crc); + eth->iaddr1 = 0; + eth->iaddr2 = (1 << crc); } /* * Set physical address */ - fec->eth->paddr1 = - (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3]; - fec->eth->paddr2 = (mac[4] << 24) + (mac[5] << 16) + 0x8808; + eth->paddr1 = (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac [3]; + eth->paddr2 = (mac[4] << 24) + (mac[5] << 16) + 0x8808; } /********************************************************************/ -static int mpc8220_fec_init (struct eth_device *dev, bd_t * bis) +int mpc8220_fec_init(struct eth_device *dev, bd_t * bis) { mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; - struct mpc8220_dma *dma = (struct mpc8220_dma *) MMAP_DMA; - const u8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */ + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("mpc8220_fec_init... Begin\n"); #endif + mpc8220_fec_halt(dev); + /* * Initialize RxBD/TxBD rings */ @@ -258,59 +390,88 @@ static int mpc8220_fec_init (struct eth_ mpc8220_fec_tbd_init (fec); /* - * Set up Pin Muxing for FEC 1 + * Set up Pin Muxing for FEC */ + if (fec->num == 0) { + /* pin mux for fec 1 */ *(vu_long *) MMAP_PCFG = 0; - *(vu_long *) (MMAP_PCFG + 4) = 0; + *(vu_long *) (MMAP_PCFG + 4) &= 0x7fffffff; + } else if (fec->num == 1) { + /* pin mux for fec 2 */ + *(vu_long *) (MMAP_PCFG + 8) &= 0x00000013; + *(vu_long *) (MMAP_PCFG + 0xc) &= 0xffffffdf; + } + /* * Clear FEC-Lite interrupt event register(IEVENT) */ - fec->eth->ievent = 0xffffffff; + eth->ievent = FEC_EIR_CLEAR_ALL; /* * Set interrupt mask register */ - fec->eth->imask = 0x00000000; + eth->imask = 0; /* - * Set FEC-Lite receive control register(R_CNTRL): + * Set individual address filter for unicast address + * and set physical address registers. */ - if (fec->xcv_type == SEVENWIRE) { - /* - * Frame length=1518; 7-wire mode - */ - fec->eth->r_cntrl = 0x05ee0020; /*0x05ee0000;FIXME */ - } else { + mpc8220_fec_set_hwaddr(fec, (char *)(dev->enetaddr)); + /* - * Frame length=1518; MII mode; + * Set multicast address filter */ - fec->eth->r_cntrl = 0x05ee0024; /*0x05ee0004;FIXME */ - } + eth->gaddr1 = 0; + eth->gaddr2 = 0; - fec->eth->x_cntrl = 0x00000000; /* half-duplex, heartbeat disabled */ if (fec->xcv_type != SEVENWIRE) { /* * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock * and do not drop the Preamble. */ - /* tbd - rtm */ - /*fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); */ /* No MII for 7-wire mode */ - fec->eth->mii_speed = 0x00000030; + eth->mii_speed = + FEC_MSCR_MII_SPEED((gd->bus_clk / 1000000) / 5); + } + + if (fec->xcv_type != SEVENWIRE) { +#ifdef CFG_DISCOVER_PHY + mii_discover_phy(dev); +#endif + if (check_connection(dev) == 0) { + printf("check cable connection!\n"); + return -1; + } + + /* adapt to the half/full speed settings */ + fec->phy_dupspd = miiphy_duplex(dev->name, fec->phy_addr) << 16; + fec->phy_dupspd |= miiphy_speed(dev->name, fec->phy_addr); + + switch (fec->phy_dupspd & 0xffff) { + case 10: + fec->xcv_type = MII10; + break; + case 100: + fec->xcv_type = MII100; + break; + } } + setFecDuplexSpeed(fec); + /* * Set Opcode/Pause Duration Register */ - fec->eth->op_pause = 0x00010020; /*FIXME0xffff0020; */ + eth->op_pause = 0x00010020; /*FIXME0xffff0020; */ /* * Set Rx FIFO alarm and granularity value */ - fec->eth->rfifo_cntrl = 0x0c000000; - fec->eth->rfifo_alarm = 0x0000030c; -#ifdef DEBUG - if (fec->eth->rfifo_status & 0x00700000) { + eth->rfifo_cntrl = 0x0c000000; + eth->rfifo_alarm = 0x0000030c; + +#ifdef ET_DEBUG + if (eth->rfifo_status & FIFO_ERRSTAT) { printf ("mpc8220_fec_init() RFIFO error\n"); } #endif @@ -318,197 +479,63 @@ static int mpc8220_fec_init (struct eth_ /* * Set Tx FIFO granularity value */ - /*fec->eth->tfifo_cntrl = 0x0c000000; */ /*tbd - rtm */ - fec->eth->tfifo_cntrl = 0x0e000000; -#ifdef DEBUG - printf ("tfifo_status: 0x%08x\n", fec->eth->tfifo_status); - printf ("tfifo_alarm: 0x%08x\n", fec->eth->tfifo_alarm); + eth->tfifo_cntrl = FIFO_CTRL_FRAME | FIFO_CTRL_GR(6) | 0x00040000; + +#ifdef ET_DEBUG + printf("tfifo_status: 0x%08x\n", eth->tfifo_status); + printf("tfifo_alarm: 0x%08x\n", eth->tfifo_alarm); #endif /* * Set transmit fifo watermark register(X_WMRK), default = 64 */ - fec->eth->tfifo_alarm = 0x00000080; - fec->eth->x_wmrk = 0x2; - - /* - * Set individual address filter for unicast address - * and set physical address registers. - */ - mpc8220_fec_set_hwaddr (fec, (char *)(dev->enetaddr)); - - /* - * Set multicast address filter - */ - fec->eth->gaddr1 = 0x00000000; - fec->eth->gaddr2 = 0x00000000; + eth->tfifo_alarm = 0x00000080; + eth->x_wmrk = 0x2; /* * Turn ON cheater FSM: ???? */ - fec->eth->xmit_fsm = 0x03000000; - -#if 1 -/*#if defined(CONFIG_MPC5200)*/ - /* - * Turn off COMM bus prefetch in the MGT5200 BestComm. It doesn't - * work w/ the current receive task. - */ - dma->PtdCntrl |= 0x00000001; -#endif + eth->xmit_fsm = 0x03000000; - /* - * Set priority of different initiators - */ - dma->IPR0 = 7; /* always */ - dma->IPR3 = 6; /* Eth RX */ - dma->IPR4 = 5; /* Eth Tx */ - - /* - * Clear SmartDMA task interrupt pending bits - */ - DMA_CLEAR_IEVENT (FEC_RECV_TASK_NO); - - /* - * Initialize SmartDMA parameters stored in SRAM - */ - *(int *) FEC_TBD_BASE = (int) fec->tbdBase; - *(int *) FEC_RBD_BASE = (int) fec->rbdBase; - *(int *) FEC_TBD_NEXT = (int) fec->tbdBase; - *(int *) FEC_RBD_NEXT = (int) fec->rbdBase; - - if (fec->xcv_type != SEVENWIRE) { - /* - * Initialize PHY(LXT971A): - * - * Generally, on power up, the LXT971A reads its configuration - * pins to check for forced operation, If not cofigured for - * forced operation, it uses auto-negotiation/parallel detection - * to automatically determine line operating conditions. - * If the PHY device on the other side of the link supports - * auto-negotiation, the LXT971A auto-negotiates with it - * using Fast Link Pulse(FLP) Bursts. If the PHY partner does not - * support auto-negotiation, the LXT971A automatically detects - * the presence of either link pulses(10Mbps PHY) or Idle - * symbols(100Mbps) and sets its operating conditions accordingly. - * - * When auto-negotiation is controlled by software, the following - * steps are recommended. - * - * Note: - * The physical address is dependent on hardware configuration. - * - */ - int timeout = 1; - u16 phyStatus; - - /* - * Reset PHY, then delay 300ns - */ - miiphy_write (dev->name, phyAddr, 0x0, 0x8000); - udelay (1000); - - if (fec->xcv_type == MII10) { - /* - * Force 10Base-T, FDX operation - */ -#ifdef DEBUG - printf ("Forcing 10 Mbps ethernet link... "); -#endif - miiphy_read (dev->name, phyAddr, 0x1, &phyStatus); - /* - miiphy_write(fec, phyAddr, 0x0, 0x0100); - */ - miiphy_write (dev->name, phyAddr, 0x0, 0x0180); - - timeout = 20; - do { /* wait for link status to go down */ - udelay (10000); - if ((timeout--) == 0) { -#ifdef DEBUG - printf ("hmmm, should not have waited..."); -#endif - break; - } - miiphy_read (dev->name, phyAddr, 0x1, &phyStatus); -#ifdef DEBUG - printf ("="); -#endif - } while ((phyStatus & 0x0004)); /* !link up */ - - timeout = 1000; - do { /* wait for link status to come back up */ - udelay (10000); - if ((timeout--) == 0) { - printf ("failed. Link is down.\n"); - break; - } - miiphy_read (dev->name, phyAddr, 0x1, &phyStatus); -#ifdef DEBUG - printf ("+"); -#endif - } while (!(phyStatus & 0x0004)); /* !link up */ - -#ifdef DEBUG - printf ("done.\n"); -#endif - } else { /* MII100 */ - /* - * Set the auto-negotiation advertisement register bits - */ - miiphy_write (dev->name, phyAddr, 0x4, 0x01e1); - - /* - * Set MDIO bit 0.12 = 1(&& bit 0.9=1?) to enable auto-negotiation - */ - miiphy_write (dev->name, phyAddr, 0x0, 0x1200); - - /* - * Wait for AN completion - */ - timeout = 5000; - do { - udelay (1000); - - if ((timeout--) == 0) { -#ifdef DEBUG - printf ("PHY auto neg 0 failed...\n"); -#endif - return -1; - } - - if (miiphy_read (dev->name, phyAddr, 0x1, &phyStatus) != - 0) { -#ifdef DEBUG - printf ("PHY auto neg 1 failed 0x%04x...\n", phyStatus); +#ifdef ET_DEBUG + if (fec->xcv_type != SEVENWIRE) + mpc8220_fec_phydump(dev->name, fec); #endif - return -1; - } - } while (!(phyStatus & 0x0004)); -#ifdef DEBUG - printf ("PHY auto neg complete! \n"); -#endif - } - - } + /* Enable DMA receive task */ + MCD_startDma(fec->rxTask, /* Dma channel */ + (u8 *) fec->rbdBase, /*Source Address */ + 0, /* Source increment */ + (u8 *) (&eth->rfifo_data), /* dest */ + 4, /* dest increment */ + 0, /* DMA size */ + 4, /* xfer size */ + fec->rxInit, /* initiator */ + fec->rxPri, /* priority */ + (MCD_FECRX_DMA | MCD_TT_FLAGS_DEF), /* Flags */ + (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) /* Function description */ + ); + + /* Enable DMA tx task with no ready buffer descriptors */ + MCD_startDma(fec->txTask, /* Dma channel */ + (u8 *) fec->tbdBase, /*Source Address */ + 0, /* Source increment */ + (u8 *) (&eth->tfifo_data), /* dest */ + 4, /* dest incr */ + 0, /* DMA size */ + 4, /* xfer size */ + fec->txInit, /* initiator */ + fec->txPri, /* priority */ + (MCD_FECTX_DMA | MCD_TT_FLAGS_DEF), /* Flags */ + (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) /* Function description */ + ); /* * Enable FEC-Lite controller */ - fec->eth->ecntrl |= 0x00000006; - -#ifdef DEBUG - if (fec->xcv_type != SEVENWIRE) - mpc8220_fec_phydump (dev->name); -#endif - - /* - * Enable SmartDMA receive task - */ - DMA_TASK_ENABLE (FEC_RECV_TASK_NO); + eth->ecntrl |= FEC_ECR_ETHER_EN; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("mpc8220_fec_init... Done \n"); #endif @@ -516,120 +543,71 @@ static int mpc8220_fec_init (struct eth_ } /********************************************************************/ -static void mpc8220_fec_halt (struct eth_device *dev) +void mpc8220_fec_halt(struct eth_device *dev) { mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; int counter = 0xffff; -#ifdef DEBUG +#ifdef ET_DEBUG + printf("mpc8220_fec_halt...\n"); + if (fec->xcv_type != SEVENWIRE) - mpc8220_fec_phydump (dev->name); + mpc8220_fec_phydump(dev->name, fec); #endif /* - * mask FEC chip interrupts - */ - fec->eth->imask = 0; - - /* * issue graceful stop command to the FEC transmitter if necessary */ - fec->eth->x_cntrl |= 0x00000001; + eth->x_cntrl |= FEC_TCR_GTS; /* * wait for graceful stop to register */ - while ((counter--) && (!(fec->eth->ievent & 0x10000000))); + while ((counter--) && (!(eth->ievent & FEC_EIR_GRA))) ; /* - * Disable SmartDMA tasks + * Disable DMA tasks */ - DMA_TASK_DISABLE (FEC_XMIT_TASK_NO); - DMA_TASK_DISABLE (FEC_RECV_TASK_NO); + MCD_killDma(fec->txTask); + MCD_killDma(fec->rxTask);; /* * Disable the Ethernet Controller */ - fec->eth->ecntrl &= 0xfffffffd; + eth->ecntrl &= ~FEC_ECR_ETHER_EN; /* * Clear FIFO status registers */ - fec->eth->rfifo_status &= 0x00700000; - fec->eth->tfifo_status &= 0x00700000; + eth->rfifo_status &= FIFO_ERRSTAT; + eth->tfifo_status &= FIFO_ERRSTAT; - fec->eth->reset_cntrl = 0x01000000; + eth->reset_cntrl = 0x01000000; + + /* reset phy */ + if (fec->xcv_type != SEVENWIRE) { + miiphy_read(dev->name, fec->phy_addr, PHY_BMCR, PHY_BMCR_RESET); + udelay(10000); + } /* * Issue a reset command to the FEC chip */ - fec->eth->ecntrl |= 0x1; + eth->ecntrl |= FEC_ECR_RESET; /* - * wait at least 16 clock cycles + * wait at least 20 clock cycles */ - udelay (10); + udelay(20); -#ifdef DEBUG +#ifdef ET_DEBUG printf ("Ethernet task stopped\n"); #endif } -#ifdef DEBUG /********************************************************************/ - -static void tfifo_print (char *devname, mpc8220_fec_priv * fec) -{ - u16 phyAddr = CONFIG_PHY_ADDR; - u16 phyStatus; - - if ((fec->eth->tfifo_lrf_ptr != fec->eth->tfifo_lwf_ptr) - || (fec->eth->tfifo_rdptr != fec->eth->tfifo_wrptr)) { - - miiphy_read (devname, phyAddr, 0x1, &phyStatus); - printf ("\nphyStatus: 0x%04x\n", phyStatus); - printf ("ecntrl: 0x%08x\n", fec->eth->ecntrl); - printf ("ievent: 0x%08x\n", fec->eth->ievent); - printf ("x_status: 0x%08x\n", fec->eth->x_status); - printf ("tfifo: status 0x%08x\n", fec->eth->tfifo_status); - - printf (" control 0x%08x\n", fec->eth->tfifo_cntrl); - printf (" lrfp 0x%08x\n", fec->eth->tfifo_lrf_ptr); - printf (" lwfp 0x%08x\n", fec->eth->tfifo_lwf_ptr); - printf (" alarm 0x%08x\n", fec->eth->tfifo_alarm); - printf (" readptr 0x%08x\n", fec->eth->tfifo_rdptr); - printf (" writptr 0x%08x\n", fec->eth->tfifo_wrptr); - } -} - -static void rfifo_print (char *devname, mpc8220_fec_priv * fec) -{ - u16 phyAddr = CONFIG_PHY_ADDR; - u16 phyStatus; - - if ((fec->eth->rfifo_lrf_ptr != fec->eth->rfifo_lwf_ptr) - || (fec->eth->rfifo_rdptr != fec->eth->rfifo_wrptr)) { - - miiphy_read (devname, phyAddr, 0x1, &phyStatus); - printf ("\nphyStatus: 0x%04x\n", phyStatus); - printf ("ecntrl: 0x%08x\n", fec->eth->ecntrl); - printf ("ievent: 0x%08x\n", fec->eth->ievent); - printf ("x_status: 0x%08x\n", fec->eth->x_status); - printf ("rfifo: status 0x%08x\n", fec->eth->rfifo_status); - - printf (" control 0x%08x\n", fec->eth->rfifo_cntrl); - printf (" lrfp 0x%08x\n", fec->eth->rfifo_lrf_ptr); - printf (" lwfp 0x%08x\n", fec->eth->rfifo_lwf_ptr); - printf (" alarm 0x%08x\n", fec->eth->rfifo_alarm); - printf (" readptr 0x%08x\n", fec->eth->rfifo_rdptr); - printf (" writptr 0x%08x\n", fec->eth->rfifo_wrptr); - } -} -#endif /* DEBUG */ - -/********************************************************************/ - -static int mpc8220_fec_send (struct eth_device *dev, volatile void *eth_data, +int mpc8220_fec_send(struct eth_device *dev, volatile void *eth_data, int data_length) { /* @@ -637,13 +615,20 @@ static int mpc8220_fec_send (struct eth_ * 6-byte Ethernet addresses. */ mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; - FEC_TBD *pTbd; + FEC_BD *pTbd; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("tbd status: 0x%04x\n", fec->tbdBase[0].status); tfifo_print (dev->name, fec); #endif + if (fec->xcv_type != SEVENWIRE) { + if (check_connection(dev) == 0) { + printf("check cable connection!\n"); + return -1; + } + } + /* * Clear Tx BD ring at first */ @@ -660,7 +645,7 @@ static int mpc8220_fec_send (struct eth_ * Check the number of vacant TxBDs. */ if (fec->cleanTbdNum < 1) { -#ifdef DEBUG +#ifdef ET_DEBUG printf ("No available TxBDs ...\n"); #endif return -1; @@ -675,48 +660,35 @@ static int mpc8220_fec_send (struct eth_ pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY; fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("DMA_TASK_ENABLE, fec->tbdIndex = %d \n", fec->tbdIndex); #endif /* - * Kick the MII i/f + * Enable DMA transmit task */ - if (fec->xcv_type != SEVENWIRE) { - u16 phyStatus; - - miiphy_read (dev->name, 0, 0x1, &phyStatus); - } - - /* - * Enable SmartDMA transmit task - */ - -#ifdef DEBUG +#ifdef ET_DEBUG tfifo_print (dev->name, fec); #endif - DMA_TASK_ENABLE (FEC_XMIT_TASK_NO); + MCD_continDma(fec->txTask); -#ifdef DEBUG +#ifdef ET_DEBUG tfifo_print (dev->name, fec); -#endif - -#ifdef DEBUG printf ("+"); #endif fec->cleanTbdNum -= 1; -#ifdef DEBUG - printf ("smartDMA ethernet Tx task enabled\n"); +#ifdef ET_DEBUG + printf("DMA ethernet Tx task enabled\n"); #endif /* * wait until frame is sent . */ while (pTbd->status & FEC_TBD_READY) { udelay (10); -#ifdef DEBUG +#ifdef ET_DEBUG printf ("TDB status = %04x\n", pTbd->status); #endif } @@ -724,47 +696,56 @@ static int mpc8220_fec_send (struct eth_ return 0; } - /********************************************************************/ -static int mpc8220_fec_recv (struct eth_device *dev) +int mpc8220_fec_recv(struct eth_device *dev) { /* * This command pulls one frame from the card */ mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; - FEC_RBD *pRbd = &fec->rbdBase[fec->rbdIndex]; + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; + FEC_BD *pRbd = &fec->rbdBase[fec->rbdIndex]; unsigned long ievent; int frame_length, len = 0; - NBUF *frame; -#ifdef DEBUG +#ifdef ET_DEBUG printf ("mpc8220_fec_recv %d Start...\n", fec->rbdIndex); printf ("-"); #endif + if (fec->xcv_type != SEVENWIRE) { + if (check_connection(dev) == 0) { + printf("check cable connection!\n"); + return -1; + } + } + /* * Check if any critical events have happened */ - ievent = fec->eth->ievent; - fec->eth->ievent = ievent; - if (ievent & 0x20060000) { + ievent = eth->ievent; + if (ievent != 0) { + eth->ievent = ievent; + + if (ievent & (FEC_EIR_BABT | FEC_EIR_TXERR | FEC_EIR_RXERR)) { /* BABT, Rx/Tx FIFO errors */ mpc8220_fec_halt (dev); mpc8220_fec_init (dev, NULL); return 0; } - if (ievent & 0x80000000) { + if (ievent & FEC_EIR_HBERR) { /* Heartbeat error */ - fec->eth->x_cntrl |= 0x00000001; + eth->x_cntrl |= FEC_TCR_GTS; } - if (ievent & 0x10000000) { + if (ievent & FEC_EIR_GRA) { /* Graceful stop complete */ - if (fec->eth->x_cntrl & 0x00000001) { + if (eth->x_cntrl & FEC_TCR_GTS) { mpc8220_fec_halt (dev); - fec->eth->x_cntrl &= ~0x00000001; + eth->x_cntrl &= ~FEC_TCR_GTS; mpc8220_fec_init (dev, NULL); } } + } if (!(pRbd->status & FEC_RBD_EMPTY)) { if ((pRbd->status & FEC_RBD_LAST) @@ -774,24 +755,11 @@ static int mpc8220_fec_recv (struct eth_ /* * Get buffer address and size */ - frame = (NBUF *) pRbd->dataPointer; frame_length = pRbd->dataLength - 4; -#if (0) - { - int i; - - printf ("recv data hdr:"); - for (i = 0; i < 14; i++) - printf ("%x ", *(frame->head + i)); - printf ("\n"); - } -#endif /* * Fill the buffer and pass it to upper layers */ -/* memcpy(buff, frame->head, 14); - memcpy(buff + 14, frame->data, frame_length);*/ NetReceive ((volatile uchar *) pRbd->dataPointer, frame_length); len = frame_length; @@ -801,55 +769,41 @@ static int mpc8220_fec_recv (struct eth_ */ mpc8220_fec_rbd_clean (fec, pRbd); } - DMA_CLEAR_IEVENT (FEC_RECV_TASK_NO); + return len; } - /********************************************************************/ int mpc8220_fec_initialize (bd_t * bis) { - mpc8220_fec_priv *fec; - -#ifdef CONFIG_HAS_ETH1 - mpc8220_fec_priv *fec2; -#endif - struct eth_device *dev; - char *tmp, *end; + char *tmp, *end, ethaddr[16]; char env_enetaddr[6]; - -#ifdef CONFIG_HAS_ETH1 - char env_enet1addr[6]; -#endif + struct eth_device *dev; int i; - fec = (mpc8220_fec_priv *) malloc (sizeof (*fec)); + for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { + + fec_info[i].phy_name = (char *)malloc(32); + dev = (struct eth_device *) malloc (sizeof (*dev)); - memset (dev, 0, sizeof *dev); + if (dev == NULL) + return 0; - fec->eth = (ethernet_regs *) MMAP_FEC1; -#ifdef CONFIG_HAS_ETH1 - fec2 = (mpc8220_fec_priv *) malloc (sizeof (*fec)); - fec2->eth = (ethernet_regs *) MMAP_FEC2; -#endif - fec->tbdBase = (FEC_TBD *) FEC_BD_BASE; - fec->rbdBase = - (FEC_RBD *) (FEC_BD_BASE + FEC_TBD_NUM * sizeof (FEC_TBD)); - fec->xcv_type = MII100; + memset (dev, 0, sizeof *dev); - dev->priv = (void *) fec; - dev->iobase = MMAP_FEC1; + sprintf(dev->name, "FEC%d", fec_info[i].num); + dev->priv = &fec_info[i]; + dev->iobase = fec_info[i].iobase; dev->init = mpc8220_fec_init; dev->halt = mpc8220_fec_halt; dev->send = mpc8220_fec_send; dev->recv = mpc8220_fec_recv; - sprintf (dev->name, "FEC ETHERNET"); eth_register (dev); #if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) - miiphy_register (dev->name, - fec8220_miiphy_read, fec8220_miiphy_write); + miiphy_register(dev->name, fec8220_miiphy_read, + fec8220_miiphy_write); #endif /* @@ -857,7 +811,11 @@ int mpc8220_fec_initialize (bd_t * bis) * a garbage after reset. When not using fec for booting * the Linux fec driver will try to work with this garbage. */ - tmp = getenv ("ethaddr"); + if (i > 0) + sprintf(ethaddr, "ethaddr"); + else + sprintf(ethaddr, "eth%daddr", i); + tmp = getenv(ethaddr); if (tmp) { for (i = 0; i < 6; i++) { env_enetaddr[i] = @@ -865,33 +823,165 @@ int mpc8220_fec_initialize (bd_t * bis) if (tmp) tmp = (*end) ? end + 1 : end; } - mpc8220_fec_set_hwaddr (fec, env_enetaddr); + mpc8220_fec_set_hwaddr(&fec_info[i], env_enetaddr); + } } -#ifdef CONFIG_HAS_ETH1 - tmp = getenv ("eth1addr"); - if (tmp) { - for (i = 0; i < 6; i++) { - env_enet1addr[i] = - tmp ? simple_strtoul (tmp, &end, 16) : 0; - if (tmp) - tmp = (*end) ? end + 1 : end; + + return 1; +} + +void setFecDuplexSpeed(mpc8220_fec_priv * fec) +{ + volatile ethernet_regs *eth = (volatile ethernet_regs *)fec->iobase; + + eth->r_cntrl = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_FCE; + if (fec->xcv_type != SEVENWIRE) + eth->r_cntrl |= FEC_RCR_MII_MODE; + + if ((fec->phy_dupspd >> 16) == FULL) { + /* Set maximum frame length */ + eth->r_cntrl |= FEC_RCR_DRT; + eth->x_cntrl = FEC_TCR_FDEN; + eth->x_cntrl &= ~FEC_TCR_FDEN; + } else { + /* Half duplex mode */ + eth->r_cntrl |= FEC_RCR_DRT; + eth->x_cntrl &= ~FEC_TCR_FDEN; + } + + if ((fec->phy_dupspd & 0xFFFF) == _100BASET) { +#ifdef ET_DEBUG + printf("100Mbps\n"); +#endif + printf("100Mbps\n"); + } else { +#ifdef ET_DEBUG + printf("10Mbps\n"); +#endif + printf("10Mbps\n"); + } +} + +/* PHY identification */ +#define PHY_ID_LXT970 0x78100000 /* LXT970 */ +#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */ +#define PHY_ID_82555 0x02a80150 /* Intel 82555 */ +#define PHY_ID_QS6612 0x01814400 /* QS6612 */ +#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */ +#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */ +#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */ +#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */ +#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */ + +#define STR_ID_LXT970 "LXT970" +#define STR_ID_LXT971 "LXT971" +#define STR_ID_82555 "Intel82555" +#define STR_ID_QS6612 "QS6612" +#define STR_ID_AMD79C784 "AMD79C784" +#define STR_ID_LSI80225 "LSI80225" +#define STR_ID_LSI80225B "LSI80225/B" +#define STR_ID_DP83848VV "N83848" +#define STR_ID_DP83849 "N83849" + +void mii_discover_phy(struct eth_device *dev) +{ +#define MAX_PHY_PASSES 11 + mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; + int pass, phyno; + u16 phytype; + u32 phyreg; + + if (fec->phyname_init) + return; + + for (pass = 1; pass <= MAX_PHY_PASSES && fec->phy_addr < 0; ++pass) { + if (pass > 1) { + /* PHY may need more time to recover from reset. + * The LXT970 needs 50ms typical, no maximum is + * specified, so wait 10ms before try again. + * With 11 passes this gives it 100ms to wake up. + */ + udelay(10000); /* wait 10ms */ } - mpc8220_fec_set_hwaddr (fec2, env_enet1addr); + + for (phyno = 0; phyno < 32 && fec->phy_addr < 0; ++phyno) { + + miiphy_read(dev->name, phyno, PHY_PHYIDR1, &phytype); + +#ifdef ET_DEBUG + printf("PHY type 0x%x pass %d type\n", phytype, pass); +#endif + + if (phytype != 0xffff) { + fec->phy_addr = phyno; + phyreg = phytype << 16; + miiphy_read(dev->name, phyno, PHY_PHYIDR2, + &phytype); + phyreg |= phytype; + + switch (phytype & 0xfffffff0) { + case PHY_ID_LXT971: + strcpy(fec->phy_name, STR_ID_LXT971); + printf(STR_ID_LXT971); + fec->phyname_init = 1; + break; + default: + strcpy(fec->phy_name, "unknown"); + fec->phyname_init = 1; + break; + } + } + } + } + if (fec->phy_addr < 0) + printf("No PHY device found.\n"); } + +int check_connection(struct eth_device *dev) +{ + mpc8220_fec_priv *fec = (mpc8220_fec_priv *) dev->priv; + u16 autoneg = 0; + int i = 0; + +#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS) + while (i < TOUT_LOOP) { + autoneg = 0; + miiphy_read(dev->name, fec->phy_addr, PHY_BMSR, &autoneg); + i++; + + if ((autoneg & AUTONEGLINK) == AUTONEGLINK) { +#ifdef ET_DEBUG + printf("autoneg mode %x\n", autoneg); #endif + break; + } - return 1; + udelay(500); + } + if (i >= TOUT_LOOP) { +#ifdef ET_DEBUG + printf("Auto Negotiation not complete\n"); +#endif + return (0); + } + return (1); } /* MII-interface related functions */ /********************************************************************/ int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal) { - ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1; + struct eth_device *dev; + volatile ethernet_regs *eth; u32 reg; /* convenient holder for the PHY register */ u32 phy; /* convenient holder for the PHY */ int timeout = 0xffff; + dev = eth_get_dev_by_name(devname); + eth = + (volatile ethernet_regs *)(((mpc8220_fec_priv *) dev->priv)-> + iobase); + /* * reading from any PHY's register is done by properly * programming the FEC's MII data register. @@ -906,10 +996,10 @@ int fec8220_miiphy_read (char *devname, /* * wait for the related interrupt */ - while ((timeout--) && (!(eth->ievent & 0x00800000))); + while ((timeout--) && (!(eth->ievent & FEC_EIR_MII))) ; if (timeout == 0) { -#ifdef DEBUG +#ifdef ET_DEBUG printf ("Read MDIO failed...\n"); #endif return -1; @@ -918,7 +1008,7 @@ int fec8220_miiphy_read (char *devname, /* * clear mii interrupt bit */ - eth->ievent = 0x00800000; + eth->ievent = FEC_EIR_MII; /* * it's now safe to read the PHY's register @@ -931,11 +1021,17 @@ int fec8220_miiphy_read (char *devname, /********************************************************************/ int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data) { - ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1; + struct eth_device *dev; + volatile ethernet_regs *eth; u32 reg; /* convenient holder for the PHY register */ u32 phy; /* convenient holder for the PHY */ int timeout = 0xffff; + dev = eth_get_dev_by_name(devname); + eth = + (volatile ethernet_regs *)(((mpc8220_fec_priv *) dev->priv)-> + iobase); + reg = regAddr << FEC_MII_DATA_RA_SHIFT; phy = phyAddr << FEC_MII_DATA_PA_SHIFT; @@ -945,10 +1041,10 @@ int fec8220_miiphy_write (char *devname, /* * wait for the MII interrupt */ - while ((timeout--) && (!(eth->ievent & 0x00800000))); + while ((timeout--) && (!(eth->ievent & FEC_EIR_MII))) ; if (timeout == 0) { -#ifdef DEBUG +#ifdef ET_DEBUG printf ("Write MDIO failed...\n"); #endif return -1; @@ -957,44 +1053,9 @@ int fec8220_miiphy_write (char *devname, /* * clear MII interrupt bit */ - eth->ievent = 0x00800000; + eth->ievent = FEC_EIR_MII; return 0; } -#ifdef DEBUG -static u32 local_crc32 (char *string, unsigned int crc_value, int len) -{ - int i; - char c; - unsigned int crc, count; - - /* - * crc32 algorithm - */ - /* - * crc = 0xffffffff; * The initialized value should be 0xffffffff - */ - crc = crc_value; - - for (i = len; --i >= 0;) { - c = *string++; - for (count = 0; count < 8; count++) { - if ((c & 0x01) ^ (crc & 0x01)) { - crc >>= 1; - crc = crc ^ 0xedb88320; - } else { - crc >>= 1; - } - c >>= 1; - } - } - - /* - * In big endian system, do byte swaping for crc value - */ - return crc; -} -#endif /* DEBUG */ - #endif /* CONFIG_MPC8220_FEC */ diff -rupN u-boot-all.git/cpu/mpc8220/fec_dma_tasks.S u-boot-all-8220- fec/cpu/mpc8220/fec_dma_tasks.S --- u-boot-all.git/cpu/mpc8220/fec_dma_tasks.S 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-fec/cpu/mpc8220/fec_dma_tasks.S 1969-12-31 18:00:00.000000000 -0600 @@ -1,363 +0,0 @@ -/* - * Copyright (C) 2004, Freescale Semiconductor, Inc. - * - * This file contains microcode for the FEC controller of the MPC8220. - */ - -#include <config.h> - -#if defined(CONFIG_MPC8220) - -/* sas/sccg, gas target */ -.section smartdmaInitData,"aw",@progbits /* Initialized data for task variables */ -.section smartdmaTaskTable,"aw",@progbits /* Task tables */ -.align 9 -.globl taskTable -taskTable: -.globl scEthernetRecv_Entry -scEthernetRecv_Entry: /* Task 0 */ -.long scEthernetRecv_TDT - taskTable /* Task 0 Descriptor Table */ -.long scEthernetRecv_TDT - taskTable + 0x00000094 -.long scEthernetRecv_VarTab - taskTable /* Task 0 Variable Table */ -.long scEthernetRecv_FDT - taskTable + 0x03 /* Task 0 Function Descriptor Table & Flags */ -.long 0x00000000 -.long 0x00000000 -.long scEthernetRecv_CSave - taskTable /* Task 0 context save space */ -.long 0xf0000000 -.globl scEthernetXmit_Entry -scEthernetXmit_Entry: /* Task 1 */ -.long scEthernetXmit_TDT - taskTable /* Task 1 Descriptor Table */ -.long scEthernetXmit_TDT - taskTable + 0x000000e0 -.long scEthernetXmit_VarTab - taskTable /* Task 1 Variable Table */ -.long scEthernetXmit_FDT - taskTable + 0x03 /* Task 1 Function Descriptor Table & Flags */ -.long 0x00000000 -.long 0x00000000 -.long scEthernetXmit_CSave - taskTable /* Task 1 context save space */ -.long 0xf0000000 - -

1 0

[U-Boot-Users] [PATCH] MACOSX support
by Aubrey Li 14 May '07

14 May '07

The following patch fixes compilation issue on macosx Singed-off-by: Marc Hoffman <Marc.Hoffman(a)analog.com> Signed-off-by: Aubrey Li <aubrey.adi(a)gmail.com> --- tools/mkimage.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/mkimage.c b/tools/mkimage.c index 416e658..2125130 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -446,7 +446,7 @@ NXTARG: ; } /* We're a bit of paranoid */ -#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) +#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) && !defined(__APPLE__) (void) fdatasync (ifd); #else (void) fsync (ifd); @@ -496,7 +496,7 @@ NXTARG: ; (void) munmap((void *)ptr, sbuf.st_size); /* We're a bit of paranoid */ -#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) +#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) && !defined(__APPLE__) (void) fdatasync (ifd); #else (void) fsync (ifd); -- 1.5.0.6 -Aubrey

5 7

[U-Boot-Users] platform.s vs startup.s
by harsh poshtiwala 14 May '07

14 May '07

Hi Friends, I would like to know detail information about uboot operation. (Please don't suggest me to revert to READ ME it is not in that detail for novice like me) I would like to know sequence of uboot operation in terms of code. specifically what is a difference between platform.s and startup.s ? Say for example if i do have one of the board with nmdk8810 which is /board/nmdk8810 this directory contains one of the file named with platfoem.s This board uses ARM926EJS core. In /spu/arm926ejs there is a startup.c file So whats the purpose of each.I think i need to understand what each and every board specific file does as well as all the files used by uboot to make my board working. So i am looking for sequence of operation uboot performs to bring my board up. Any pointers? -- Thanks & Regards Harsh

1 0

Re: [U-Boot-Users] PATCH add SMN42 board from Siemens
by Gary Jennejohn 14 May '07

14 May '07

Hi Peter, Gary Jennejohn writes: > > Please try the attached gzipped patch (against commit > > abca901869c3760b6c5fecb825db6c1d91a78a93 of the U-Boot git head) > > on your board. > > If you can confirm it works I shall push it to u-boot-arm and ask Wolfgang > > to merge it. > > > > Wilco as soon as I find the time. Thanks for looking at it. > OK, it seems to work just fine. I have a patch to board/siemens/SMN42/flash.c which speeds up writes to the external flash which I'll have to submit after this one finally gets committed. -- Gary Jennejohn / garyjATjennejohnDOTorg gjATfreebsdDOTorg garyjATdenxDOTde ===================================================================== DENX Software Engineering GmbH, HRB 165235 Munich, CEO: Wolfgang Denk Office: Kirchenstr. 5, D-82194 Groebenzell, Germany =====================================================================

1 0

[U-Boot-Users] USB custodian repostiory updates
by Markus Klotzbücher 14 May '07

14 May '07

Dear List, The following USB related updates have been pushed to the u-boot-usb custodian repository git://denx.de/git/u-boot-usb.git Merge of u-boot-testing-USB: ---------------------------- I merged the former testing-USB branch, which mainly contains the generic ohci driver updates. This is an approach to get rid of the various almost identical ohci drivers by adding cpu and/or board dependant hooks. These are described in doc/README.generic_usb_ohci . The following boards have been adapted and tested to use the generic driver so far: [mk@pollux u-boot-usb-master]$ grep "CONFIG_USB_OHCI_NEW" include/configs/delta.h:#define CONFIG_USB_OHCI_NEW 1 include/configs/IceCube.h:#define CONFIG_USB_OHCI_NEW include/configs/mp2usb.h:#define CONFIG_USB_OHCI_NEW 1 include/configs/TQM5200.h:#define CONFIG_USB_OHCI_NEW include/configs/trab.h:#define CONFIG_USB_OHCI_NEW 1 include/configs/yosemite.h:#define CONFIG_USB_OHCI_NEW This should not break any boards that still use board specific ohci drivers, although it would be nice if they could be adapted over time. Usually this is trivial. All new boards should definitely use the generic driver. I would like to kindly ask everybody affected by these changes to test this code. If no problems are reported, I'll request these changes to be merged to mainline in about 4 weeks. The testing-USB branch is now pretty much obsolete, USB patches should be sent against the custodian repository. Patches: -------- The following patches have been merged: The following changes since commit ae79f60677c208326535647dcbd5c3ec40dbcb0b: Markus Klotzbuecher (1): USB: remove the S3C24X0_merge #define, which was introduced while merging OHCI drivers. are found in the git repository at: git://denx.de/git/u-boot-usb.git Markus Klotzbuecher (1): USB: cleanup monahans usb support. Remove dead code. Rodolfo Giometti (2): PXA: pxa27x USB OHCI support Support for the Philips ISP116x HCD (Host Controller Driver) README | 1 + cpu/pxa/usb.c | 27 +- drivers/Makefile | 2 +- drivers/isp116x-hcd.c | 1412 +++++++++++++++++++++++++++++++++++++++++++++++++ drivers/isp116x.h | 489 +++++++++++++++++ include/usb.h | 5 +- 6 files changed, 1921 insertions(+), 15 deletions(-) create mode 100644 drivers/isp116x-hcd.c create mode 100644 drivers/isp116x.h Best regards Markus Klotzbuecher -- DENX Software Engineering GmbH, HRB 165235 Munich, CEO: Wolfgang Denk Office: Kirchenstr. 5, D-82194 Groebenzell, Germany

2 4

[U-Boot-Users] [PATCH 3/3] Add USB support for MPC8641HPCN board.
by Zhang Wei 14 May '07

14 May '07

The USB PCI-OHCI, USB keyboard and event poll support are added to MPC8641HPCN board config file. Signed-off-by: Zhang Wei <wei.zhang(a)freescale.com> --- include/configs/MPC8641HPCN.h | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 0bc8324..138a88e 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -331,6 +331,17 @@ #undef CONFIG_EEPRO100 #undef CONFIG_TULIP +/************************************************************ + * USB support + ************************************************************/ +#define CONFIG_PCI_OHCI 1 +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_USB_KEYBOARD 1 +#define CFG_DEVICE_DEREGISTER +#define CFG_USB_EVENT_POLL 1 +#define CFG_USB_OHCI_SLOT_NAME "ohci_pci" +#define CFG_USB_OHCI_MAX_ROOT_PORTS 15 + #if !defined(CONFIG_PCI_PNP) #define PCI_ENET0_IOADDR 0xe0000000 #define PCI_ENET0_MEMADDR 0xe0000000 @@ -485,6 +496,7 @@ | CFG_CMD_PCI \ | CFG_CMD_I2C \ | CFG_CMD_SCSI \ + | CFG_CMD_USB \ | CFG_CMD_EXT2) \ & \ ~(CFG_CMD_ENV)) @@ -502,6 +514,7 @@ | CFG_CMD_PING \ | CFG_CMD_I2C \ | CFG_CMD_SCSI \ + | CFG_CMD_USB \ | CFG_CMD_EXT2) #else #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ -- 1.5.1

4 7

[U-Boot-Users] Anybody ported u-boot onto LPC2294 olimex board
by Ganesh Chandra Patro 14 May '07

14 May '07

Hi, Could anybody ported U-Boot onto LPC-2294 based board? I am trying to port uClinux on the Olimex board. I am using Eclipse platform to debug, but the hex generated by Linux environment is not understood by the flash utility. Should I have to write the driver for 28F160 intel flash to enable flashing my u-boot image to the on board flash?? Thanks and Regards Ganesh Chandra Patro System Analyst SoftDEL Systems Limited

1 0

[U-Boot-Users] (no subject)
by Karl Chen 14 May '07

14 May '07

Hi Best regards, 2007-05-14

1 0

[U-Boot-Users] CFI driver does not verify writes in buffered mode - feature?
by Detlev Zundel 14 May '07

14 May '07

Hi, when using the CFI flash driver with CFG_FLASH_USE_BUFFER_WRITE the "usual" verification whether the write did indeed happen correctly is not done: => erase fc000000 +1 . done Erased 1 sectors => mw 200000 55555555 100 => cp.b 200000 fc000000 100 Copy to Flash... done => md fc000000 fc000000: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000010: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000020: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000030: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000040: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000050: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000060: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000070: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000080: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000090: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000a0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000b0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000c0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000d0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000e0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000f0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU => mw 200000 ffffffff 100 => cp.b 200000 fc000000 100 Copy to Flash... done => md fc000000 fc000000: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000010: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000020: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000030: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000040: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000050: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000060: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000070: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000080: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc000090: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000a0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000b0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000c0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000d0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000e0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU fc0000f0: 55555555 55555555 55555555 55555555 UUUUUUUUUUUUUUUU So the write did indeed *not proceed* correctly without the expected "flash not erased" error message appearing. The behaviour is not consistent, so either we should do verification of the write or we should have some kind of warning here. Does anyone see an easy way to become consistent here? Thanks Detlev -- Emacs seems a more likely candidate to contain a mail system than the mail system to contain an Emacs, so this is the way it was done. -- Bernard S. Greenberg -- DENX Software Engineering GmbH, HRB 165235 Munich, CEO: Wolfgang Denk Office: Kirchenstr. 5, D-82194 Groebenzell, Germany +49 8142 66989 40

3 5

[U-Boot-Users] [PATCH u-boot-fdt] FDT command improvements.
by Jerry Van Baren 13 May '07

13 May '07

Fix "fdt set" so that it will create a non-existing property. Add "fdt mknode" to create nodes. Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- common/cmd_fdt.c | 271 ++++++++++++++++++++++++++++------------------------- 1 files changed, 143 insertions(+), 128 deletions(-) diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c index a119985..8402ca7 100644 --- a/common/cmd_fdt.c +++ b/common/cmd_fdt.c @@ -56,27 +56,38 @@ static char data[SCRATCHPAD]; static int fdt_valid(void); static void print_data(const void *data, int len); +static int findnodeoffset(const char *pathp) +{ + int nodeoffset; + + if (strcmp(pathp, "/") == 0) { + nodeoffset = 0; + } else { + nodeoffset = fdt_path_offset (fdt, pathp); + if (nodeoffset < 0) { + /* + * Not found or something else bad happened. + */ + printf ("findnodeoffset() libfdt: %s\n", fdt_strerror(nodeoffset)); + } + } + return nodeoffset; +} /* * Flattened Device Tree command, see the help for parameter definitions. */ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - char op; - if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } - /* - * Figure out which subcommand was given - */ - op = argv[1][0]; /******************************************************************** * Set the address of the fdt ********************************************************************/ - if (op == 'a') { + if (argv[1][0] == 'a') { /* * Set the address [and length] of the fdt. */ @@ -102,7 +113,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) */ err = fdt_open_into(fdt, fdt, len); if (err != 0) { - printf ("libfdt: %s\n", fdt_strerror(err)); + printf ("libfdt fdt_open_into(): %s\n", fdt_strerror(err)); } } } @@ -110,7 +121,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /******************************************************************** * Move the fdt ********************************************************************/ - } else if (op == 'm') { + } else if ((argv[1][0] == 'm') && (argv[1][1] == 'o')) { struct fdt_header *newaddr; int len; int err; @@ -150,15 +161,48 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) */ err = fdt_open_into(fdt, newaddr, len); if (err != 0) { - printf ("libfdt: %s\n", fdt_strerror(err)); + printf ("libfdt fdt_open_into(): %s\n", fdt_strerror(err)); return 1; } fdt = newaddr; /******************************************************************** - * Set the value of a node in the fdt. + * Make a new node + ********************************************************************/ + } else if ((argv[1][0] == 'm') && (argv[1][1] == 'k')) { + char *pathp; /* path */ + char *nodep; /* new node to add */ + int nodeoffset; /* node offset from libfdt */ + int err; + + /* + * Parameters: Node path, new node to be appended to the path. + */ + if (argc < 4) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + pathp = argv[2]; + nodep = argv[3]; + + nodeoffset = findnodeoffset(pathp); + if (nodeoffset < 0) { + /* + * Not found or something else bad happened. + */ + return 1; + } + err = fdt_add_subnode(fdt, nodeoffset, nodep); + if (err < 0) { + printf ("libfdt fdt_add_subnode(): %s\n", fdt_strerror(err)); + return 1; + } + + /******************************************************************** + * Set the value of a property in the fdt. ********************************************************************/ - } else if (op == 's') { + } else if (argv[1][0] == 's') { char *pathp; /* path */ char *prop; /* property */ struct fdt_property *nodep; /* node struct pointer */ @@ -183,102 +227,85 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) prop = argv[3]; newval = argv[4]; - if (strcmp(pathp, "/") == 0) { - nodeoffset = 0; - } else { - nodeoffset = fdt_path_offset (fdt, pathp); - if (nodeoffset < 0) { - /* - * Not found or something else bad happened. - */ - printf ("libfdt: %s\n", fdt_strerror(nodeoffset)); - return 1; - } - } - nodep = fdt_getprop (fdt, nodeoffset, prop, &oldlen); - if (oldlen < 0) { - printf ("libfdt %s\n", fdt_strerror(oldlen)); - return 1; - } else if (oldlen == 0) { + nodeoffset = findnodeoffset(pathp); + if (nodeoffset < 0) { /* - * The specified property has no value + * Not found or something else bad happened. */ - printf("%s has no value, cannot set one (yet).\n", prop); return 1; - } else { + } + /* + * Convert the new property + */ + vp = data; + if (*newval == '<') { /* - * Convert the new property + * Bigger values than bytes. */ - vp = data; - if (*newval == '<') { - /* - * Bigger values than bytes. - */ - len = 0; - newval++; - while ((*newval != '>') && (*newval != '\0')) { - cp = newval; - tmp = simple_strtoul(cp, &newval, 16); - if ((newval - cp) <= 2) { - *vp = tmp & 0xFF; - vp += 1; - len += 1; - } else if ((newval - cp) <= 4) { - *(uint16_t *)vp = __cpu_to_be16(tmp); - vp += 2; - len += 2; - } else if ((newval - cp) <= 8) { - *(uint32_t *)vp = __cpu_to_be32(tmp); - vp += 4; - len += 4; - } else { - printf("Sorry, I could not convert \"%s\"\n", cp); - return 1; - } - while (*newval == ' ') - newval++; - } - if (*newval != '>') { - printf("Unexpected character '%c'\n", *newval); - return 1; - } - } else if (*newval == '[') { - /* - * Byte stream. Convert the values. - */ - len = 0; - newval++; - while ((*newval != ']') && (*newval != '\0')) { - tmp = simple_strtoul(newval, &newval, 16); - *vp++ = tmp & 0xFF; - len++; - while (*newval == ' ') - newval++; - } - if (*newval != ']') { - printf("Unexpected character '%c'\n", *newval); + len = 0; + newval++; + while ((*newval != '>') && (*newval != '\0')) { + cp = newval; + tmp = simple_strtoul(cp, &newval, 16); + if ((newval - cp) <= 2) { + *vp = tmp & 0xFF; + vp += 1; + len += 1; + } else if ((newval - cp) <= 4) { + *(uint16_t *)vp = __cpu_to_be16(tmp); + vp += 2; + len += 2; + } else if ((newval - cp) <= 8) { + *(uint32_t *)vp = __cpu_to_be32(tmp); + vp += 4; + len += 4; + } else { + printf("Sorry, I could not convert \"%s\"\n", cp); return 1; } - } else { - /* - * Assume it is a string. Copy it into our data area for - * convenience (including the terminating '\0'). - */ - len = strlen(newval) + 1; - strcpy(data, newval); + while (*newval == ' ') + newval++; } - - ret = fdt_setprop(fdt, nodeoffset, prop, data, len); - if (ret < 0) { - printf ("libfdt %s\n", fdt_strerror(ret)); + if (*newval != '>') { + printf("Unexpected character '%c'\n", *newval); + return 1; + } + } else if (*newval == '[') { + /* + * Byte stream. Convert the values. + */ + len = 0; + newval++; + while ((*newval != ']') && (*newval != '\0')) { + tmp = simple_strtoul(newval, &newval, 16); + *vp++ = tmp & 0xFF; + len++; + while (*newval == ' ') + newval++; + } + if (*newval != ']') { + printf("Unexpected character '%c'\n", *newval); return 1; } + } else { + /* + * Assume it is a string. Copy it into our data area for + * convenience (including the terminating '\0'). + */ + len = strlen(newval) + 1; + strcpy(data, newval); + } + + ret = fdt_setprop(fdt, nodeoffset, prop, data, len); + if (ret < 0) { + printf ("libfdt fdt_setprop(): %s\n", fdt_strerror(ret)); + return 1; } /******************************************************************** * Print (recursive) / List (single level) ********************************************************************/ - } else if ((op == 'p') || (op == 'l')) { + } else if ((argv[1][0] == 'p') || (argv[1][0] == 'l')) { /* * Recursively print (a portion of) the fdt. */ @@ -297,7 +324,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* * list is an alias for print, but limited to 1 level */ - if (op == 'l') { + if (argv[1][0] == 'l') { depth = 1; } @@ -311,18 +338,12 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) else prop = NULL; - if (strcmp(pathp, "/") == 0) { - nodeoffset = 0; - printf("/"); - } else { - nodeoffset = fdt_path_offset (fdt, pathp); - if (nodeoffset < 0) { - /* - * Not found or something else bad happened. - */ - printf ("libfdt %s\n", fdt_strerror(nodeoffset)); - return 1; - } + nodeoffset = findnodeoffset(pathp); + if (nodeoffset < 0) { + /* + * Not found or something else bad happened. + */ + return 1; } /* * The user passed in a property as well as node path. Print only @@ -339,7 +360,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) printf("\n"); return 0; } else { - printf ("libfdt %s\n", fdt_strerror(len)); + printf ("libfdt fdt_getprop(): %s\n", fdt_strerror(len)); return 1; } } @@ -359,7 +380,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) level++; offstack[level] = nodeoffset; if (level >= MAX_LEVEL) { - printf("Aaaiii <splat> nested too deep.\n"); + printf("Aaaiii <splat> nested too deep. Aborting.\n"); return 1; } break; @@ -374,7 +395,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) case FDT_PROP: nodep = fdt_getprop (fdt, offstack[level], pathp, &len); if (len < 0) { - printf ("libfdt %s\n", fdt_strerror(len)); + printf ("libfdt fdt_getprop(): %s\n", fdt_strerror(len)); return 1; } else if (len == 0) { /* the property has no value */ @@ -403,7 +424,7 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /******************************************************************** * Remove a property/node ********************************************************************/ - } else if (op == 'r') { + } else if (argv[1][0] == 'r') { int nodeoffset; /* node offset from libfdt */ int err; @@ -411,17 +432,12 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) * Get the path. The root node is an oddball, the offset * is zero and has no name. */ - if (strcmp(argv[2], "/") == 0) { - nodeoffset = 0; - } else { - nodeoffset = fdt_path_offset (fdt, argv[2]); - if (nodeoffset < 0) { - /* - * Not found or something else bad happened. - */ - printf ("libfdt %s\n", fdt_strerror(nodeoffset)); - return 1; - } + nodeoffset = findnodeoffset(argv[2]); + if (nodeoffset < 0) { + /* + * Not found or something else bad happened. + */ + return 1; } /* * Do the delete. A fourth parameter means delete a property, @@ -430,13 +446,13 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) if (argc > 3) { err = fdt_delprop(fdt, nodeoffset, argv[3]); if (err < 0) { - printf("fdt_delprop libfdt: %s\n", fdt_strerror(err)); + printf("libfdt fdt_delprop(): %s\n", fdt_strerror(err)); return err; } } else { err = fdt_del_node(fdt, nodeoffset); if (err < 0) { - printf("fdt_del_node libfdt: %s\n", fdt_strerror(err)); + printf("libfdt fdt_del_node(): %s\n", fdt_strerror(err)); return err; } } @@ -444,19 +460,19 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /******************************************************************** * Create a chosen node ********************************************************************/ - } else if (op == 'c') { + } else if (argv[1][0] == 'c') { fdt_chosen(fdt, 0, 0, 1); /******************************************************************** * Create a u-boot-env node ********************************************************************/ - } else if (op == 'e') { + } else if (argv[1][0] == 'e') { fdt_env(fdt); /******************************************************************** * Create a bd_t node ********************************************************************/ - } else if (op == 'b') { + } else if (argv[1][0] == 'b') { fdt_bd_t(fdt); /******************************************************************** @@ -486,7 +502,7 @@ static int fdt_valid(void) return 1; /* valid */ if (err < 0) { - printf("libfdt: %s", fdt_strerror(err)); + printf("libfdt fdt_check_header(): %s", fdt_strerror(err)); /* * Be more informative on bad version. */ @@ -630,7 +646,6 @@ U_BOOT_CMD( "fdt bd_t - Add/replace the \"/bd_t\" branch in the tree\n" #endif "Hints:\n" - " * Set a larger length with the fdt addr command to add to the blob.\n" " * If the property you are setting/printing has a '#' character,\n" " you MUST escape it with a \\ character or quote it with \" or\n" " it will be ignored as a comment.\n" -- 1.4.4.4

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[U-Boot-Users] How to configure for flexible static/dynamic IP operation.
by Edward Jubenville 12 May '07

12 May '07

Using u-boot 1.1.4 with Linux kernel 2.4.25. I'm trying to configure our device for flexibility in choosing static IP or dynamic IP operation, based on which is most appropriate for the network environment of the installation site. I can get both to work fine with u-boot, but I don't know how to pass the information on to the Linux kernel as to which configuration was selected. Presumably, the kernel shouldn't start its DHCP client (dhclient) when static IP operation is selected. Can someone recommend a strategy for u-boot to communicate the selection to the kernel? Is it done via the kernel command line, or by having the kernel startup peek into u-boot's environment storage? Thanks in advance, Ed Jubenville

3 3

[U-Boot-Users] PXA27x usbtty support is slow
by Rodolfo Giometti 12 May '07

12 May '07

Hello, I just get data transmission through usbtty for my PXA27x custom board but I noticed that loadb command is quite slow! It's similar to the serial line... Can someone explain to me why? Maybe some misconfiguration? =:-o Thanks, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] New buildroot-atmel
by Ulf Samuelsson 12 May '07

12 May '07

Have updated my buildroot at ftp://at91dist:distrib@81.80.104.162/ -> AT91_Third_party..-> Linux_Host -> Source to buildroot-atmel-2007-05-12.tar.bz2. Also updated my u-boot 1.2.0 and dataflashboot so this needs to be deleted and reloaded from the ftp site. Some fixes in u-boot: 1) NAND flash is now detected in my U-boot 2) SAM9263EK machine id set correctly. 3) Some cleanup of the "defenv" command The follwoing command sequence should boot the linux defenv - generate your customized u-boot environment run config - runs an autoscript wiuth further configuration run flash-kernel - downloads the kernel to dataflash run flash-ramdisk - downloads the ramdisk to dataflash run bootcmd - start linux 4) Kernel space increased from 1.25 MB to 1.5 MB Fixes in buildroot 1) Support for building 2.6.21.1 with Andrews patches. This is now the default. 2) A script "netcfg.sh" which sets the U-boot default ipaddr/serverip/gatewayip for first time u-boot programming (See make_boards.sh) 3) A problem with nm getting linux symbols from the wrong file is fixed. 4) DataflashBoot-1.05 has been modified to avoid recompiling every time. A new download is needed. Big Thanks to everyone pointing out problems. Following issues remains: u-boot seems to be recompiled every time make is done in buildroot. The following issues in the linux boot: ======================== "Ignoring unrecognised tag 0x54410008" ==> Anyone got a clue? ======================== atmel_lcdfb: probe of atmel_lcdfb.0 failed with error -2 ==> Driver seems only to support sam9261. ======================== No NAND device found!!! ==> I think this is because I enabled OneNAND support. ======================== usbmon: debugfs is not available ==> Is this an issue? ======================== ads7846 spi0.3: external vREF for ADS7843 not specified ==> ??? ======================== ALSA device list: No soundcards found. ======================== drivers/rtc/hctosys.c: unable to open rtc device (rtc0) ======================== mount: can't find udev in /etc/fstab ==> This is quite serious. I enclose my fstab. Anyone with ideas what to modify ======================== ip: RTNETLINK answers: File exists ==> Is this normal? Full boot below. ## Booting image at 21000000 ... Image Name: Linux-2.6.21.1 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 1418948 Bytes = 1.4 MB Load Address: 20008000 Entry Point: 20008000 Verifying Checksum ... OK OK Starting kernel ... Uncompressing Linux............................................................................................ done, booting the kernel. Linux version 2.6.21.1 (ulf@aeglos) (gcc version 4.1.2) #1 Sat May 12 13:38:26 CEST 2007 CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177 Machine: Atmel AT91SAM9263-EK Ignoring unrecognised tag 0x54410008 Memory policy: ECC disabled, Data cache writeback Clocks: CPU 199 MHz, master 99 MHz, main 16.367 MHz CPU0: D VIVT write-back cache CPU0: I cache: 16384 bytes, associativity 4, 32 byte lines, 128 sets CPU0: D cache: 16384 bytes, associativity 4, 32 byte lines, 128 sets Built 1 zonelists. Total pages: 16256 Kernel command line: root=/dev/ram rw initrd=0x2118C000,6000000 ramdisk_size=15360 ip=10.175.196.19:10.175.196.220:10.175.196.1:255.255.255.0 consoleMAT91: 160 gpio irqs in 5 banks PID hash table entries: 256 (order: 8, 1024 bytes) Console: colour dummy device 80x30 Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Memory: 64MB = 64MB total Memory: 56032KB available (2596K code, 251K data, 120K init) Security Framework v1.0.0 initialized Capability LSM initialized Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok NET: Registered protocol family 16 Generic PHY: Registered new driver SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 1, 8192 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered checking if image is initramfs...it isn't (bad gzip magic numbers); looks like an initrd Freeing initrd memory: 5859K NetWinder Floating Point Emulator V0.97 (double precision) JFFS2 version 2.2. (NAND) (C) 2001-2006 Red Hat, Inc. io scheduler noop registered io scheduler anticipatory registered (default) atmel_lcdfb: probe of atmel_lcdfb.0 failed with error -2 atmel_usart.0: ttyS0 at MMIO 0xfeffee00 (irq = 1) is a ATMEL_SERIAL atmel_usart.1: ttyS1 at MMIO 0xfff8c000 (irq = 7) is a ATMEL_SERIAL RAMDISK driver initialized: 16 RAM disks of 15360K size 1024 blocksize Davicom DM9161E: Registered new driver Davicom DM9131: Registered new driver PPP generic driver version 2.4.2 macb macb: detected PHY at address 0 (ID 0181:b8a0) eth0: Atmel MACB at 0xfffbc000 irq 21 (04:25:fe:ed:00:18) NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB 3,3V 8-bit) NAND bus width 16 instead 8 bit No NAND device found!!! atmel_spi atmel_spi.0: Atmel SPI Controller at 0xfffa4000 (irq 14) mtd_dataflash spi0.0: AT45DB642x (8448 KBytes) usbmon: debugfs is not available at91_ohci at91_ohci: AT91 OHCI at91_ohci at91_ohci: new USB bus registered, assigned bus number 1 at91_ohci at91_ohci: irq 29, io mem 0x00a00000 usb usb1: Product: AT91 OHCI usb usb1: Manufacturer: Linux 2.6.21.1 ohci_hcd usb usb1: SerialNumber: at91 usb usb1: configuration #1 chosen from 1 choice hub 1-0:1.0: USB hub found hub 1-0:1.0: 2 ports detected Initializing USB Mass Storage driver... usbcore: registered new interface driver usb-storage USB Mass Storage support registered. usbcore: registered new interface driver usbhid drivers/usb/input/hid-core.c: v2.6:USB HID core driver usbcore: registered new interface driver usbserial drivers/usb/serial/usb-serial.c: USB Serial support registered for generic usbcore: registered new interface driver usbserial_generic drivers/usb/serial/usb-serial.c: USB Serial Driver core udc: at91_udc version 3 May 2006 mice: PS/2 mouse device common for all mice ads7846 spi0.3: external vREF for ADS7843 not specified ads7846 spi0.3: touchscreen, irq 31 input: ADS784x Touchscreen as /class/input/input0 i2c /dev entries driver at91_i2c at91_i2c: AT91 i2c bus driver. AT91 MMC: 4 wire bus mode not supported by this driver - using 1 wire Advanced Linux Sound Architecture Driver Version 1.0.14rc3 (Wed Mar 14 07:25:50 2007 UTC). ASoC version 0.13.0 ALSA device list: No soundcards found. TCP cubic registered NET: Registered protocol family 1 NET: Registered protocol family 17 drivers/rtc/hctosys.c: unable to open rtc device (rtc0) eth0: link down IP-Config: Complete: device=eth0, addr=10.175.196.19, mask=255.255.255.0, gw=10.175.196.1, host=10.175.196.19, domain=, nis-domain=(none), bootserver=10.175.196.220, rootserver=10.175.196.220, rootpath= RAMDISK: ext2 filesystem found at block 0 RAMDISK: Loading 5704KiB [1 disk] into ram disk... done. VFS: Mounted root (ext2 filesystem). Freeing init memory: 120K mount: can't find udev in /etc/fstab Initializing random number generator... done. Starting network... ip: RTNETLINK answers: File exists Starting HPA's tftpd: done eth0: link up, 100Mbps, full-duplex, lpa 0xC5E1 Welcome to the Erik's uClibc development environment. at91sam9263ek login: -- Best Regards, Ulf Samuelsson # /etc/fstab: static file system information. # # <file system> <mount pt> <type> <options> <dump> <pass> /dev/root / ext2 rw,noauto 0 1 proc /proc proc defaults 0 0 devpts /dev/pts devpts defaults,gid=5,mode=620 0 0 tmpfs /tmp tmpfs defaults 0 0

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[U-Boot-Users] [PATCH u-boot-fdt] Reorganize and fix problems (returns) in the bootm command.
by Jerry Van Baren 12 May '07

12 May '07

Do *NOT* return after the "point of no return" has been passed. If something goes wrong, the board must be reset after that point. Move the "Transferring control to Linux" debug message back to where it belongs: just before transferring control to linux. Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- common/cmd_bootm.c | 130 +++++++++++++++++++++++++-------------------------- 1 files changed, 64 insertions(+), 66 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 25a55bd..25b9d74 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -45,8 +45,8 @@ DECLARE_GLOBAL_DATA_PTR; - /*cmd_boot.c*/ - extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); #if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP) #include <rtc.h> @@ -763,8 +763,8 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, if ((ntohl(hdr->ih_load) < ((unsigned long)hdr + ntohl(hdr->ih_size) + sizeof(hdr))) && ((ntohl(hdr->ih_load) + ntohl(hdr->ih_size)) > (unsigned long)hdr)) { - printf ("ERROR: Load address overwrites Flat Device Tree uImage\n"); - return; + puts ("ERROR: Load address overwrites Flat Device Tree uImage\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } printf(" Verifying Checksum ... "); @@ -773,34 +773,34 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, header.ih_hcrc = 0; if(checksum != crc32(0, (uchar *)&header, sizeof(image_header_t))) { - printf("ERROR: Flat Device Tree header checksum is invalid\n"); - return; + puts ("ERROR: Flat Device Tree header checksum is invalid\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } checksum = ntohl(hdr->ih_dcrc); addr = (ulong)((uchar *)(hdr) + sizeof(image_header_t)); if(checksum != crc32(0, (uchar *)addr, ntohl(hdr->ih_size))) { - printf("ERROR: Flat Device Tree checksum is invalid\n"); - return; + puts ("ERROR: Flat Device Tree checksum is invalid\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } printf("OK\n"); if (ntohl(hdr->ih_type) != IH_TYPE_FLATDT) { - printf ("ERROR: uImage not Flat Device Tree type\n"); - return; + puts ("ERROR: uImage not Flat Device Tree type\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } if (ntohl(hdr->ih_comp) != IH_COMP_NONE) { - printf("ERROR: uImage is not uncompressed\n"); - return; + puts ("ERROR: uImage is not uncompressed\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #if defined(CONFIG_OF_LIBFDT) if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) != 0) { #else if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) { #endif - printf ("ERROR: uImage data is not a flat device tree\n"); - return; + puts ("ERROR: uImage data is not a flat device tree\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } memmove((void *)ntohl(hdr->ih_load), @@ -808,8 +808,8 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, ntohl(hdr->ih_size)); of_flat_tree = (char *)ntohl(hdr->ih_load); } else { - printf ("Did not find a flat flat device tree at address %08lX\n", of_flat_tree); - return; + puts ("Did not find a flat flat device tree\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } printf (" Booting using flat device tree at 0x%x\n", of_flat_tree); @@ -840,8 +840,8 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, #else if (((struct boot_param_header *)of_data)->magic != OF_DT_HEADER) { #endif - printf ("ERROR: image is not a flat device tree\n"); - return; + puts ("ERROR: image is not a flat device tree\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #if defined(CONFIG_OF_LIBFDT) @@ -849,8 +849,8 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, #else if (((struct boot_param_header *)of_data)->totalsize != ntohl(len_ptr[2])) { #endif - printf ("ERROR: flat device tree size does not agree with image\n"); - return; + puts ("ERROR: flat device tree size does not agree with image\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } } #endif @@ -923,15 +923,6 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, initrd_end = 0; } - debug ("## Transferring control to Linux (at address %08lx) ...\n", - (ulong)kernel); - - SHOW_BOOT_PROGRESS (15); - -#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) - unlock_ram_in_cache(); -#endif - #if defined(CONFIG_OF_LIBFDT) /* move of_flat_tree if needed */ if (of_data) { @@ -960,19 +951,19 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, * if the user wants it (the logic is in the subroutines). */ if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) { - printf("Failed creating the /chosen node (0x%08X), aborting.\n", of_flat_tree); - return; + puts ("ERROR: Failed creating the /chosen node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #ifdef CONFIG_OF_HAS_UBOOT_ENV if (fdt_env(of_flat_tree) < 0) { - printf("Failed creating the /u-boot-env node, aborting.\n"); - return; + puts ("ERROR: Failed creating the /u-boot-env node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #endif #ifdef CONFIG_OF_HAS_BD_T if (fdt_bd_t(of_flat_tree) < 0) { - printf("Failed creating the /bd_t node, aborting.\n"); - return; + puts ("ERROR: Failed creating the /bd_t node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #endif } @@ -997,55 +988,62 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, memmove ((void *)of_start, (void *)of_data, of_len); } #endif - - /* - * Linux Kernel Parameters (passing board info data): - * r3: ptr to board info data - * r4: initrd_start or 0 if no initrd - * r5: initrd_end - unused if r4 is 0 - * r6: Start of command line string - * r7: End of command line string - */ -#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) - if (!of_flat_tree) /* no device tree; boot old style */ -#endif - (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); - /* does not return */ - -#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) - /* - * Linux Kernel Parameters (passing device tree): - * r3: ptr to OF flat tree, followed by the board info data - * r4: physical pointer to the kernel itself - * r5: NULL - * r6: NULL - * r7: NULL - */ #if defined(CONFIG_OF_FLAT_TREE) ft_setup(of_flat_tree, kbd, initrd_start, initrd_end); /* ft_dump_blob(of_flat_tree); */ #endif #if defined(CONFIG_OF_LIBFDT) if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) { - printf("Failed creating the /chosen node (0x%08X), aborting.\n", of_flat_tree); - return; + puts ("ERROR: Failed to create the /chosen node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #ifdef CONFIG_OF_HAS_UBOOT_ENV if (fdt_env(of_flat_tree) < 0) { - printf("Failed creating the /u-boot-env node, aborting.\n"); - return; + puts ("ERROR: Failed to create the /u-boot-env node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #endif #ifdef CONFIG_OF_HAS_BD_T if (fdt_bd_t(of_flat_tree) < 0) { - printf("Failed creating the /bd_t node, aborting.\n"); - return; + puts ("ERROR: Failed to create the /bd_t node, aborting.\nMust RESET board to recover\n"); + do_reset (cmdtp, flag, argc, argv); } #endif #endif /* if defined(CONFIG_OF_LIBFDT) */ - (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0); + debug ("## Transferring control to Linux (at address %08lx) ...\n", + (ulong)kernel); + + SHOW_BOOT_PROGRESS (15); + +#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) + unlock_ram_in_cache(); #endif + +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) + if (of_flat_tree) { /* device tree; boot new style */ + /* + * Linux Kernel Parameters (passing device tree): + * r3: ptr to flattened device tree, followed by the board info data + * r4: physical pointer to the kernel itself + * r5: NULL + * r6: NULL + * r7: NULL + */ + (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0); + /* does not return */ + } +#endif + /* + * Linux Kernel Parameters (passing board info data): + * r3: ptr to board info data + * r4: initrd_start or 0 if no initrd + * r5: initrd_end - unused if r4 is 0 + * r6: Start of command line string + * r7: End of command line string + */ + (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); + /* does not return */ } #endif /* CONFIG_PPC */ -- 1.4.4.4

2 1

[U-Boot-Users] [PATCH u-boot-fdt] Fix bugs in the CONFIG_OF_LIBFDT
by Jerry Van Baren 12 May '07

12 May '07

Stupid coding mistakes (identified by Timur Tabi, thanks). Signed-off-by: Gerald Van Baren <vanbaren(a)cideas.com> --- common/cmd_bootm.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 32c29e5..61ca1fa 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -796,7 +796,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, return; } #if defined(CONFIG_OF_LIBFDT) - if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) == 0) { + if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) != 0) { #else if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) { #endif @@ -952,7 +952,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, of_flat_tree = (char *)of_start; printf (" Loading Device Tree to %08lx, end %08lx ... ", of_start, of_start + of_len - 1); - err = fdt_open_into((void *)of_start, (void *)of_data, of_len); + err = fdt_open_into((void *)of_data, (void *)of_start, of_len); if (err != 0) { printf ("libfdt: %s " __FILE__ " %d\n", fdt_strerror(err), __LINE__); } -- 1.4.4.4

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[U-Boot-Users] usbtty and PXA27x problems
by Rodolfo Giometti 12 May '07

12 May '07

Hello, trying usbtty with my new pxa27x UDC driver I got: May 11 11:14:26 vvonth kernel: [244681.451000] usb 1-1: unable to read config index 0 descriptor/start May 11 11:14:26 vvonth kernel: [244681.451000] usb 1-1: chopping to 0 config(s) May 11 11:14:37 vvonth kernel: [244691.818000] usb 1-1: no configuration chosen from 0 choices giometti@vvonth:~$ lsusb Bus 001 Device 016: ID 0525:a4a6 Netchip Technology, Inc. Linux-USB Serial Gadget Bus 001 Device 001: ID 0000:0000 That looks strange since the device is reconigned but it seems that it has no configurations at all! I chacked that when USB host ask: debug: udc_dump_buffer(), 65: ep0 setup read - buf a1fc0710, len 8 80 06 00 01 00 00 12 00 usbttys answers: debug: udc_dump_buffer(), 65: ep0 setup write - buf a1fc0734, len 18 12 01 10 01 ff 00 00 10 25 05 a6 a4 00 00 01 02 03 01 saying it has 1 configuration... but the system ignores it! Suggestions? Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] Can't build U-Boot 1.2.0 for AT91
by Alex Parkinson 11 May '07

11 May '07

Hello all, I posted this question on at91.com, but have received no response, so I though I'd try here. I'm attempting to build a modified version of U-boot v1.2.0 and am coming across a problem during the link stage. I used Buildroot to create my toolchain with GCC v4.1.2, uClibc v0.98.2, and Linux v2.6.20. I'm using a version of the U-Boot source patched specifically for the Atmel AT91 chips (can be downloaded at http://www.at91.com/Project/Controleurs/cVisualisation.php). When I make all, I get the following error: arm-linux-ld: ERROR: /home/alex/dev/ARM/Linux/sw/bsp/rootfs/buildroot/build_arm/staging_dir/lib/gcc/arm-linux-uclibc/4.1.2/libgcc.a(_udivdi3.o) uses hardware FP, whereas u-boot uses software FP arm-linux-ld: failed to merge target specific data of file /home/alex/dev/ARM/Linux/sw/bsp/rootfs/buildroot/build_arm/staging_dir/lib/gcc/arm-linux-uclibc/4.1.2/libgcc.a(_udivdi3.o) arm-linux-ld: ERROR: /home/alex/dev/ARM/Linux/sw/bsp/rootfs/buildroot/build_arm/staging_dir/lib/gcc/arm-linux-uclibc/4.1.2/libgcc.a(_clz.o) uses hardware FP, whereas u-boot uses software FP arm-linux-ld: failed to merge target specific data of file /home/alex/dev/ARM/Linux/sw/bsp/rootfs/buildroot/build_arm/staging_dir/lib/gcc/arm-linux-uclibc/4.1.2/libgcc.a(_clz.o) make: *** [u-boot] Error 1 Does anyone have any idea what I can do to get everything to compile and link properly. I'd like to be able to use the same toolchain to build U-Boot as I use to build Linux, but if that's not possible, any solution at all would be greatly appreciated. Sincerely, Alex Parkinson

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[U-Boot-Users] Problems compiling u-boot for AMCC katmai board
by Peter Tannenbaum 11 May '07

11 May '07

Folks, I am having a "learning experience" in trying to compile u-boot for the AMCC Katmai board. It always gets through the entire build, right up to the final link stage. The linking is failing with the .bss section overlapping the .resetvec section, and several episodes of "relocation truncated to fit." My build platform is an AMD64 system: uname -a: Linux wfbamd64 2.4.21-15.0.2.ELsmp #1 SMP Wed Jun 16 22:35:40 EDT 2004 x86_64 x86_64 x86_64 GNU/Linux I've reproduced my errors with a CROSSTOOL cross-compiler GCC 4.0.0/GLIBC 2.3.5, and with a similar cross-compiler GCC 3.4.1/GLIBC 2.3.3. To those who have successfully built the Katmai u-boot binaries (and I know you're out there!) I ask: how did you do it? What compiler/toolchain/cross-compiler, etc did you use? Thanks! This is the tail of the compile attempt: UNDEF_SYM=`/opt/crosstool/gcc-4.0.0-glibc-2.3.5/powerpc-440-linux-gnu/bi n/powerpc-440-linux-gnu-objdump -x lib_generic/libgeneric.a board/amcc/katmai/libkatmai.a cpu/ppc4xx/libppc4xx.a lib_ppc/libppc.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a net/libnet.a disk/libdisk.a rtc/librtc.a dtt/libdtt.a drivers/libdrivers.a drivers/nand/libnand.a drivers/nand_legacy/libnand_legacy.a drivers/sk98lin/libsk98lin.a post/libpost.a post/drivers/libpostdrivers.a post/lib_ppc/libpostppc.a common/libcommon.a |sed -n -e 's/.*$__u_boot_cmd_.*$/-u\1/p'|sort|uniq`;\ cd /home/na2e/ncc3/uboot/u-boot.git && /opt/crosstool/gcc-4.0.0-glibc-2.3.5/powerpc-440-linux-gnu/bin/powerpc-4 40-linux-gnu-ld -Bstatic -T /home/na2e/ncc3/uboot/u-boot.git/board/amcc/katmai/u-boot.lds -Ttext 0xfffc0000 -n $UNDEF_SYM cpu/ppc4xx/start.o cpu/ppc4xx/resetvec.o \ --start-group lib_generic/libgeneric.a board/amcc/katmai/libkatmai.a cpu/ppc4xx/libppc4xx.a lib_ppc/libppc.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a net/libnet.a disk/libdisk.a rtc/librtc.a dtt/libdtt.a drivers/libdrivers.a drivers/nand/libnand.a drivers/nand_legacy/libnand_legacy.a drivers/sk98lin/libsk98lin.a post/libpost.a post/drivers/libpostdrivers.a post/lib_ppc/libpostppc.a common/libcommon.a --end-group -L /opt/crosstool/gcc-4.0.0-glibc-2.3.5/powerpc-440-linux-gnu/lib/gcc/power pc-440-linux-gnu/4.0.0/nof -lgcc \ -Map u-boot.map -o u-boot /opt/crosstool/gcc-4.0.0-glibc-2.3.5/powerpc-440-linux-gnu/bin/powerpc-4 40-linux-gnu-ld: section .bss [00000000ffff8e00 -> 000000010004750f] overlaps section .resetvec [00000000fffffffc -> 00000000ffffffff] cpu/ppc4xx/start.o:start.S:198: relocation truncated to fit: R_PPC_ADDR32 against symbol `_end' defined in *ABS* section in <none> board/amcc/katmai/libkatmai.a(cmd_katmai.o):(.got2+0x14): relocation truncated to fit: R_PPC_ADDR32 against symbol `console_buffer' defined in COMMON section in common/libcommon.a(main.o) lib_ppc/libppc.a(board.o):(.got2+0x34): relocation truncated to fit: R_PPC_ADDR32 against symbol `_end' defined in *ABS* section in <none> lib_ppc/libppc.a(board.o):(.got2+0x70): relocation truncated to fit: R_PPC_ADDR32 against symbol `BootFile' defined in COMMON section in net/libnet.a(net.o) net/libnet.a(net.o):(.got2+0xbc): relocation truncated to fit: R_PPC_ADDR32 against symbol `PktBuf' defined in COMMON section in net/libnet.a(net.o)+1f net/libnet.a(net.o):(.got2+0xc0): relocation truncated to fit: R_PPC_ADDR32 against symbol `NetRxPackets' defined in COMMON section in net/libnet.a(net.o) net/libnet.a(net.o):(.got2+0xc4): relocation truncated to fit: R_PPC_ADDR32 against symbol `NetArpWaitPacketBuf' defined in COMMON section in net/libnet.a(net.o)+1f net/libnet.a(tftp.o):(.got2+0x78): relocation truncated to fit: R_PPC_ADDR32 against symbol `BootFile' defined in COMMON section in net/libnet.a(net.o) net/libnet.a(bootp.o):(.got2+0x10): relocation truncated to fit: R_PPC_ADDR32 against symbol `BootFile' defined in COMMON section in net/libnet.a(net.o) net/libnet.a(nfs.o):(.got2+0x84): relocation truncated to fit: R_PPC_ADDR32 against symbol `BootFile' defined in COMMON section in net/libnet.a(net.o) drivers/libdrivers.a(cfi_flash.o):(.got2+0x0): additional relocation overflows omitted from the output make: *** [u-boot] Error 1 --Regards, --Peter Tannenbaum na2e(a)cadence.com (845) 383-3762 88-655-3762 --Send Chocolate

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[U-Boot-Users] Suppressing starting/terminated messages by go
by Edward Jubenville 11 May '07

11 May '07

For a standalone application, do_go() always prints starting/terminated messages: ## Starting application at 0x00040004 ... and ## Application terminated, rc = 0x0 Is there a philosophical reason why these messages shouldn't be suppressed with a configuration parameter? I have a standalone program that I run about a dozen times in a row, feeding it different command line parameters, and its printouts are littered with these starting/terminated messages. I would like to get rid of them like this: int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ... #if !defined(CFG_QUIET_GO) printf ("## Starting application at 0x%08lX ...\n", addr); #endif ... #if !defined(CFG_QUIET_GO) printf ("## Application terminated, rc = 0x%lX\n", rc); #endif I'm using u-boot 1.1.4 on a Lite5200 clone board. Ed Jubenville

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[U-Boot-Users] The CS89x0 driver doesn't work?
by HoHo_Zhao 11 May '07

11 May '07

Hello, Sir(ervery one): I modified linux-2.6.20.11/drivers/net/Kconfig, just let it build driver for cs89x0, but resulted in worse outcomes. HoHo_Zhao # # Ethernet # config CS89x0 tristate "CS89x0 support" #depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X) depends on NET_ETHERNET ---help--- Support for CS89x0 chipset based Ethernet cards. If you have a network (Ethernet) card of this type, say Y and read the Ethernet-HOWTO, available from <http://www.tldp.org/docs.html#howto> as well as <file:Documentation/networking/cs89x0.txt>. To compile this driver as a module, choose M here and read <file:Documentation/networking/net-modules.txt>. The module will be called cs89x0. +++++++++++++++++++++++ OUTCOMES +++++++++++++++++++++++++ Uncompressing Linux............................................................. ..... done, booting the kernel. Linux version 2.6.20.11 (HoHo(a)MIIX.honology.cn) (gcc version 3.4.6) #1 PREEMPT Fri May 11 19:14:39 CST 2007 CPU: ARM920T [41129200] revision 0 (ARMv4T), cr=c0007177 Machine: Motorola MX1ADS Memory policy: ECC disabled, Data cache writeback CPU0: D VIVT write-back cache CPU0: I cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets CPU0: D cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets Built 1 zonelists. Total pages: 12192 Kernel command line: root=/dev/msdk mem=48M PID hash table entries: 256 (order: 8, 1024 bytes) Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Memory: 48MB = 48MB total Memory: 46568KB available (1820K code, 191K data, 84K init) Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok NET: Registered protocol family 16 NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes) TCP: Hash tables configured (established 2048 bind 1024) TCP reno registered NetWinder Floating Point Emulator V0.97 (extended precision) JFFS2 version 2.2. (NAND) (C) 2001-2006 Red H io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) Serial: IMX driver imx-uart.0: ttySMX0 at MMIO 0xe0006000 (irq = 30) is a IMX imx-uart.1: ttySMX1 at MMIO 0xe0007000 (irq = 24) is a IMX loop: loaded (max 8 devices) cs89x0:cs89x0_probe(0x0) Unable to handle kernel NULL pointer dereference at virtual address 0000030a pgd = c0004000 [0000030a] *pgd=00000000 Internal error: Oops: 5 [#1] Modules linked in: CPU: 0 pc : [<c0136398>] lr : [<c0015bd0>] Not tai sp : c028deb4 ip : c028dec4 fp : c028dec0 r10: c001a2c0 r9 : 00000000 r8 : 00000300 r7 : c036ac00 r6 : 00000000 r5 : c036ae60 r4 : 00000300 r3 : 00000001 r2 : c028c000 r1 : 0000000a r0 : 00000300 Flags: nZCv IRQs on FIQs on Mode SVC_32 Segment kernel Control: C000717F Table: 08004000 DAC: 00000017 Process swapper (pid: 1, stack limit = 0xc028c250) Stack: (0xc028deb4 to 0xc028e000) dea0: c028df4c c028dec4 c0015bd0 dec0: c013639c c036ac03 0000000a c028df4c ffffffff 00000002 c036ac00 ffffffff dee0: c028df30 c028def0 c01109e4 c01101cc 0000000a ffffffff ffffffff 00000002 df00: 3fc953ff 00000000 c036ac00 00000000 00000000 00000001 00000000 c001a2c0 df20: c028df3c c028df30 c001bfdc c036ac00 00000000 00000000 00000001 c001a2c0 df40: c028df6c c028df50 c0016398 c0015af4 c001bfa4 00000001 00000000 c001a7e4 df60: c028df88 c028df70 c00156e8 c0016318 00000001 00000000 c001a25c c028dfa0 df80: c028df8c c00157a4 c00156b4 00000000 c0 dfa0: c001572c 00000001 c001dcc4 c0034168 00000000 00000000 c001d06c c003acd4 dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 dfe0: 00000000 00000000 00000000 c028dff8 c003acd4 c001d07c ebff8abd e2507000 Backtrace: Function entered at [<c013638c>] from [<c0015bd0>] Function entered at [<c0015ae4>] from [<c0016398>] Function entered at [<c0016308>] from [<c00156e8>] r7 = C001A7E4 r6 = 00000000 r5 = 00000001 r4 = C001BFA4 Function entered at [<c00156a4>] from [<c00157a4>] r6 = C001A25C r5 = 00000000 r4 = 00000001 Function entered at [<c001571c>] from [<c001d10c>] r5 = C028C000 r4 = 00000000 Function entered at [<c001d06c>] from [<c003acd4>] Code: e89daff0 e1a0c00d e92dd800 e24cb004 (e19000b1) <0>Kernel panic - not syncing: Attempted to kill init!

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[U-Boot-Users] u-boot(1.1.6) for adm5120 problem
by xfwolf 11 May '07

11 May '07

i want to compile bootloader for my board(adm5120). i use buildroot to build a cross-toolchain. (some tools is: binutils-2.16.91.0.2.tar.bz2 gcc-3.4.4.tar.bz2 uClibc-0.9.27.tar.bz2...), and i can use the cross-toolchain to compile my kernel, and is ok! so, i use it to compile the u-boot(the patch for adm5120 [http://www.nerdclub.nl/u-boot/adm5120-support.txt] is ok), but i got some error: . . . /root/adm5120/buildroot/build_mipsel/staging_dir/bin/mipsel-linux-ld: common/libcommon.a(memsize.o): compiled for a big endian system and target is little endian /root/adm5120/buildroot/build_mipsel/staging_dir/bin/mipsel-linux-ld: common/libcommon.a(memsize.o): endianness incompatible with that of the selected emulation /root/adm5120/buildroot/build_mipsel/staging_dir/bin/mipsel-linux-ld: failed to merge target specific data of file common/libcommon.a(memsize.o) cpu/mips/start.o: In function `reset': start.S:(.text+0x42c): undefined reference to `_GLOBAL_OFFSET_TABLE_' /bin/sh: line 1: 13348 segment error /root/adm5120/buildroot/build_mipsel/staging_dir/bin/mipsel-linux-ld -Bstatic -T /root/u-boot-1.1.6/board/adm5120/u-boot.lds -Ttext 0xA0010000 $UNDEF_SYM cpu/mips/start.o --start-group lib_generic/libgeneric.a board/adm5120/libadm5120.a cpu/mips/libmips.a lib_mips/libmips.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a net/libnet.a disk/libdisk.a rtc/librtc.a dtt/libdtt.a drivers/libdrivers.a drivers/nand/libnand.a drivers/nand_legacy/libnand_legacy.a drivers/sk98lin/libsk98lin.a post/libpost.a post/cpu/libcpu.a common/libcommon.a --end-group -L /root/adm5120/buildroot/build_mipsel/staging_dir/lib/gcc/mipsel-linux-uclibc/3.4.4 -lgcc -Map u-boot.map -o u-boot make: *** [u-boot] error 139 anybody can tell me , where is wrong? -- xfwolf

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[U-Boot-Users] [PATCH] One more patch for the sequoia --- This time to get a fater EBC on newer 666.66 MHz processors
by Jeff Mann 11 May '07

11 May '07

[PATCH] Because the Sequoia board does not boot with an EBC faster than 66MHz, the clock divider are changed after the initial boot process. This allows for maximum clocking speeds to be achieved on newer boards. Sequoia boards with 666.66 MHz processors require that the EBC divider be set to 3 in order to start the initial boot process at a slower EBC speed. After the initial boot process, the divider can be set back to 2, which will cause the boards to run at 83.333MHz. This is backward compatible with boards with 533.33 MHz processors, as these boards will already be set with an EBC divider of 2. Signed-off-by: Jeffrey Mann <mannj(a)embeddedplanet.com> --- Stefan: how's my formating this time? board/amcc/sequoia/sequoia.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index 930fa71..80f2498 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -132,6 +132,12 @@ int board_early_init_f(void) (0x80000000 >> (28 + CFG_NAND_CS)); mtsdr(SDR0_CUST0, sdr0_cust0); + /* Update EBC speed after booting from i2c bootstrap settings * + * on newer boards with 33.333 MHZ Clocks */ + if (in8(CFG_BCSR_BASE + 3) & 0x80) { + mtdcr(0xc, 0xe0); + mtdcr(0xd, 0x02000000); + } return 0; } -- 1.4.1

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Re: [U-Boot-Users] IXP425 ethernet & NPE microcode
by Martijn de Gouw 11 May '07

11 May '07

Here is the patch again > Your patch is corrupted because it was line-wrapped by your mailer. Crappy outlouk mailer stuff, now attached. Best regards, Martijn de Gouw

2 1

[U-Boot-Users] Help! kernel panic! && IP-Config: No network devices available.
by HoHo_Zhao 11 May '07

11 May '07

1 0

[U-Boot-Users] files in cpu/bf533 cpu/bf537 cpu/bf561 seems to be very similar
by Ivan Kuten 11 May '07

11 May '07

Hello, I noticed that files in cpu/bf533 cpu/bf537 cpu/bf561 seems to be very similar namely: cache.S , flush.S, serial.c, traps.c, interrupts.c Is there any intention to organize these dirs in more comfortable way, such as done for example with cpu/at32ap or cpu/arm920t. So the structure will look like this: cpu/blackfin cpu/blackfin/ *.[c,h] - bf common files cpu/blackfin/bf533/ - bf533 specific parts cpu/blackfin/bf537/ - bf537 specific parts cpu/blackfin/bf561/ - bf561 specific parts Best regards, Ivan

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[U-Boot-Users] Patch: Add USB OHCI support for MPC8220 - part 3
by TsiChung Liew 11 May '07

11 May '07

- USB Ohci support Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> diff -rupN u-boot-all.git/cpu/mpc8220/usb_ohci.h u-boot-all-8220- usbh/cpu/mpc8220/usb_ohci.h --- u-boot-all.git/cpu/mpc8220/usb_ohci.h 1969-12-31 18:00:00.000000000 -0600 +++ u-boot-all-8220-usbh/cpu/mpc8220/usb_ohci.h 2007-05-10 17:27:57.000000000 -0500 @@ -0,0 +1,410 @@ +/* + * URB OHCI HCD (Host Controller Driver) for USB. + * + * (C) Copyright 1999 Roman Weissgaerber <weissg(a)vienna.at> + * (C) Copyright 2000-2001 David Brownell <dbrownell(a)users.sourceforge.net> + * + * usb-ohci.h + */ + +static int cc_to_error[16] = { + +/* mapping of the OHCI CC status to error codes */ + /* No Error */ 0, + /* CRC Error */ USB_ST_CRC_ERR, + /* Bit Stuff */ USB_ST_BIT_ERR, + /* Data Togg */ USB_ST_CRC_ERR, + /* Stall */ USB_ST_STALLED, + /* DevNotResp */ -1, + /* PIDCheck */ USB_ST_BIT_ERR, + /* UnExpPID */ USB_ST_BIT_ERR, + /* DataOver */ USB_ST_BUF_ERR, + /* DataUnder */ USB_ST_BUF_ERR, + /* reservd */ -1, + /* reservd */ -1, + /* BufferOver */ USB_ST_BUF_ERR, + /* BuffUnder */ USB_ST_BUF_ERR, + /* Not Access */ -1, + /* Not Access */ -1 +}; + +/* ED States */ + +#define ED_NEW 0x00 +#define ED_UNLINK 0x01 +#define ED_OPER 0x02 +#define ED_DEL 0x04 +#define ED_URB_DEL 0x08 + +/* usb_ohci_ed */ +struct ed { + __u32 hwINFO; + __u32 hwTailP; + __u32 hwHeadP; + __u32 hwNextED; + + struct ed *ed_prev; + __u8 int_period; + __u8 int_branch; + __u8 int_load; + __u8 int_interval; + __u8 state; + __u8 type; + __u16 last_iso; + struct ed *ed_rm_list; + + struct usb_device *usb_dev; + __u32 unused[3]; +} __attribute((aligned(16))); +typedef struct ed ed_t; + +/* TD info field */ +#define TD_CC 0xf0000000 +#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f) +#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) +#define TD_EC 0x0C000000 +#define TD_T 0x03000000 +#define TD_T_DATA0 0x02000000 +#define TD_T_DATA1 0x03000000 +#define TD_T_TOGGLE 0x00000000 +#define TD_R 0x00040000 +#define TD_DI 0x00E00000 +#define TD_DI_SET(X) (((X) & 0x07)<< 21) +#define TD_DP 0x00180000 +#define TD_DP_SETUP 0x00000000 +#define TD_DP_IN 0x00100000 +#define TD_DP_OUT 0x00080000 + +#define TD_ISO 0x00010000 +#define TD_DEL 0x00020000 + +/* CC Codes */ +#define TD_CC_NOERROR 0x00 +#define TD_CC_CRC 0x01 +#define TD_CC_BITSTUFFING 0x02 +#define TD_CC_DATATOGGLEM 0x03 +#define TD_CC_STALL 0x04 +#define TD_DEVNOTRESP 0x05 +#define TD_PIDCHECKFAIL 0x06 +#define TD_UNEXPECTEDPID 0x07 +#define TD_DATAOVERRUN 0x08 +#define TD_DATAUNDERRUN 0x09 +#define TD_BUFFEROVERRUN 0x0C +#define TD_BUFFERUNDERRUN 0x0D +#define TD_NOTACCESSED 0x0F + +#define MAXPSW 1 + +struct td { + __u32 hwINFO; + __u32 hwCBP; /* Current Buffer Pointer */ + __u32 hwNextTD; /* Next TD Pointer */ + __u32 hwBE; /* Memory Buffer End Pointer */ + + __u16 hwPSW[MAXPSW]; + __u8 unused; + __u8 index; + struct ed *ed; + struct td *next_dl_td; + struct usb_device *usb_dev; + int transfer_len; + __u32 data; + + __u32 unused2[2]; +} __attribute((aligned(32))); +typedef struct td td_t; + +#define OHCI_ED_SKIP (1 << 14) + +/* + * The HCCA (Host Controller Communications Area) is a 256 byte + * structure defined in the OHCI spec. that the host controller is + * told the base address of. It must be 256-byte aligned. + */ + +#define NUM_INTS 32 /* part of the OHCI standard */ +struct ohci_hcca { + __u32 int_table[NUM_INTS]; /* Interrupt ED table */ +#if defined(CONFIG_MPC5200) + __u16 pad1; /* set to 0 on each frame_no change */ + __u16 frame_no; /* current frame number */ +#else + __u16 frame_no; /* current frame number */ + __u16 pad1; /* set to 0 on each frame_no change */ +#endif + __u32 done_head; /* info returned for an interrupt */ + u8 reserved_for_hc[116]; +} __attribute((aligned(256))); + +/* + * Maximum number of root hub ports. + */ +#define MAX_ROOT_PORTS 15 /* maximum OHCI root hub ports */ + +/* + * This is the structure of the OHCI controller's memory mapped I/O + * region. This is Memory Mapped I/O. You must use the readl() and + * writel() macros defined in asm/io.h to access these!! + */ +struct ohci_regs { + /* control and status registers */ + __u32 revision; + __u32 control; + __u32 cmdstatus; + __u32 intrstatus; + __u32 intrenable; + __u32 intrdisable; + /* memory pointers */ + __u32 hcca; + __u32 ed_periodcurrent; + __u32 ed_controlhead; + __u32 ed_controlcurrent; + __u32 ed_bulkhead; + __u32 ed_bulkcurrent; + __u32 donehead; + /* frame counters */ + __u32 fminterval; + __u32 fmremaining; + __u32 fmnumber; + __u32 periodicstart; + __u32 lsthresh; + /* Root hub ports */ + struct ohci_roothub_regs { + __u32 a; + __u32 b; + __u32 status; + __u32 portstatus[MAX_ROOT_PORTS]; + } roothub; +} __attribute((aligned(32))); + +/* OHCI CONTROL AND STATUS REGISTER MASKS */ + +/* + * HcControl (control) register masks + */ +#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ +#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ +#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */ +#define OHCI_CTRL_CLE (1 << 4) /* control list enable */ +#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ +#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ +#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ +#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ +#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ + +/* pre-shifted values for HCFS */ +# define OHCI_USB_RESET (0 << 6) +# define OHCI_USB_RESUME (1 << 6) +# define OHCI_USB_OPER (2 << 6) +# define OHCI_USB_SUSPEND (3 << 6) + +/* + * HcCommandStatus (cmdstatus) register masks + */ +#define OHCI_HCR (1 << 0) /* host controller reset */ +#define OHCI_CLF (1 << 1) /* control list filled */ +#define OHCI_BLF (1 << 2) /* bulk list filled */ +#define OHCI_OCR (1 << 3) /* ownership change request */ +#define OHCI_SOC (3 << 16) /* scheduling overrun count */ + +/* + * masks used with interrupt registers: + * HcInterruptStatus (intrstatus) + * HcInterruptEnable (intrenable) + * HcInterruptDisable (intrdisable) + */ +#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */ +#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */ +#define OHCI_INTR_SF (1 << 2) /* start frame */ +#define OHCI_INTR_RD (1 << 3) /* resume detect */ +#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */ +#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */ +#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */ +#define OHCI_INTR_OC (1 << 30) /* ownership change */ +#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */ + +/* Virtual Root HUB */ +struct virt_root_hub { + int devnum; /* Address of Root Hub endpoint */ + void *dev; /* was urb */ + void *int_addr; + int send; + int interval; +}; + +/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */ + +/* destination of request */ +#define RH_INTERFACE 0x01 +#define RH_ENDPOINT 0x02 +#define RH_OTHER 0x03 + +#define RH_CLASS 0x20 +#define RH_VENDOR 0x40 + +/* Requests: bRequest << 8 | bmRequestType */ +#define RH_GET_STATUS 0x0080 +#define RH_CLEAR_FEATURE 0x0100 +#define RH_SET_FEATURE 0x0300 +#define RH_SET_ADDRESS 0x0500 +#define RH_GET_DESCRIPTOR 0x0680 +#define RH_SET_DESCRIPTOR 0x0700 +#define RH_GET_CONFIGURATION 0x0880 +#define RH_SET_CONFIGURATION 0x0900 +#define RH_GET_STATE 0x0280 +#define RH_GET_INTERFACE 0x0A80 +#define RH_SET_INTERFACE 0x0B00 +#define RH_SYNC_FRAME 0x0C80 +/* Our Vendor Specific Request */ +#define RH_SET_EP 0x2000 + +/* Hub port features */ +#define RH_PORT_CONNECTION 0x00 +#define RH_PORT_ENABLE 0x01 +#define RH_PORT_SUSPEND 0x02 +#define RH_PORT_OVER_CURRENT 0x03 +#define RH_PORT_RESET 0x04 +#define RH_PORT_POWER 0x08 +#define RH_PORT_LOW_SPEED 0x09 + +#define RH_C_PORT_CONNECTION 0x10 +#define RH_C_PORT_ENABLE 0x11 +#define RH_C_PORT_SUSPEND 0x12 +#define RH_C_PORT_OVER_CURRENT 0x13 +#define RH_C_PORT_RESET 0x14 + +/* Hub features */ +#define RH_C_HUB_LOCAL_POWER 0x00 +#define RH_C_HUB_OVER_CURRENT 0x01 + +#define RH_DEVICE_REMOTE_WAKEUP 0x00 +#define RH_ENDPOINT_STALL 0x01 + +#define RH_ACK 0x01 +#define RH_REQ_ERR -1 +#define RH_NACK 0x00 + +/* OHCI ROOT HUB REGISTER MASKS */ + +/* roothub.portstatus [i] bits */ +#define RH_PS_CCS 0x00000001 /* current connect status */ +#define RH_PS_PES 0x00000002 /* port enable status */ +#define RH_PS_PSS 0x00000004 /* port suspend status */ +#define RH_PS_POCI 0x00000008 /* port over current indicator */ +#define RH_PS_PRS 0x00000010 /* port reset status */ +#define RH_PS_PPS 0x00000100 /* port power status */ +#define RH_PS_LSDA 0x00000200 /* low speed device attached */ +#define RH_PS_CSC 0x00010000 /* connect status change */ +#define RH_PS_PESC 0x00020000 /* port enable status change */ +#define RH_PS_PSSC 0x00040000 /* port suspend status change */ +#define RH_PS_OCIC 0x00080000 /* over current indicator change */ +#define RH_PS_PRSC 0x00100000 /* port reset status change */ + +/* roothub.status bits */ +#define RH_HS_LPS 0x00000001 /* local power status */ +#define RH_HS_OCI 0x00000002 /* over current indicator */ +#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ +#define RH_HS_LPSC 0x00010000 /* local power status change */ +#define RH_HS_OCIC 0x00020000 /* over current indicator change */ +#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ + +/* roothub.b masks */ +#define RH_B_DR 0x0000ffff /* device removable flags */ +#define RH_B_PPCM 0xffff0000 /* port power control mask */ + +/* roothub.a masks */ +#define RH_A_NDP (0xff << 0) /* number of downstream ports */ +#define RH_A_PSM (1 << 8) /* power switching mode */ +#define RH_A_NPS (1 << 9) /* no power switching */ +#define RH_A_DT (1 << 10) /* device type (mbz) */ +#define RH_A_OCPM (1 << 11) /* over current protection mode */ +#define RH_A_NOCP (1 << 12) /* no over current protection */ +#define RH_A_POTPGT (0xff << 24) /* power on to power good time */ + +/* urb */ +#define N_URB_TD 48 +typedef struct { + ed_t *ed; + __u16 length; /* number of tds associated with this request */ + __u16 td_cnt; /* number of tds already serviced */ + int state; + unsigned long pipe; + int actual_length; + td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */ +} urb_priv_t; +#define URB_DEL 1 + +/* + * This is the full ohci controller description + * + * Note how the "proper" USB information is just + * a subset of what the full implementation needs. (Linus) + */ + +typedef struct ohci { + struct ohci_hcca *hcca; /* hcca */ + /*dma_addr_t hcca_dma; */ + + int irq; + int disabled; /* e.g. got a UE, we're hung */ + int sleeping; + unsigned long flags; /* for HC bugs */ + + struct ohci_regs *regs; /* OHCI controller's memory */ + + ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */ + ed_t *ed_bulktail; /* last endpoint of bulk list */ + ed_t *ed_controltail; /* last endpoint of control list */ + int intrstatus; + __u32 hc_control; /* copy of the hc control reg */ + struct usb_device *dev[32]; + struct virt_root_hub rh; + + const char *slot_name; +} ohci_t; + +#define NUM_EDS 8 /* num of preallocated endpoint descriptors */ + +struct ohci_device { + ed_t ed[NUM_EDS]; + int ed_cnt; +}; + +/* hcd */ +/* endpoint */ +static int ep_link(ohci_t * ohci, ed_t * ed); +static int ep_unlink(ohci_t * ohci, ed_t * ed); +static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe); + +/*-------------------------------------------------------------------------*/ + +/* we need more TDs than EDs */ +#define NUM_TD 64 + +/* +1 so we can align the storage */ +td_t gtd[NUM_TD + 1]; +/* pointers to aligned storage */ +td_t *ptd; + +/* TDs ... */ +static inline struct td *td_alloc(struct usb_device *usb_dev) +{ + int i; + struct td *td; + + td = NULL; + for (i = 0; i < NUM_TD; i++) { + if (ptd[i].usb_dev == NULL) { + td = &ptd[i]; + td->usb_dev = usb_dev; + break; + } + } + + return td; +} + +static inline void ed_free(struct ed *ed) +{ + ed->usb_dev = NULL; +}

1 0

[U-Boot-Users] Patch: Add USB OHCI support for MPC8220 - part 2
by TsiChung Liew 11 May '07

11 May '07

- USB Ohci support Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> +/*-------------------------------------------------------------------------*/ + +/* td done list */ +static int dl_done_list(ohci_t * ohci, td_t * td_list) +{ + td_t *td_list_next = NULL; + ed_t *ed; + int cc = 0; + int stat = 0xff; + /* urb_t *urb; */ + urb_priv_t *lurb_priv; + __u32 tdINFO, edHeadP, edTailP; + + while (td_list) { + td_list_next = td_list->next_dl_td; + + lurb_priv = &urb_priv; + tdINFO = ohci_cpu_to_le32(td_list->hwINFO); + + ed = td_list->ed; + + dl_transfer_length(td_list); + + /* error code of transfer */ + cc = TD_CC_GET(tdINFO); + if (++(lurb_priv->td_cnt) == lurb_priv->length) { + if ((ed->state & (ED_OPER | ED_UNLINK)) + && (lurb_priv->state != URB_DEL)) { + dbg("ConditionCode %#x", cc); + stat = cc_to_error[cc]; + } + } + + if (ed->state != ED_NEW) { + edHeadP = ohci_cpu_to_le32(ed->hwHeadP) & 0xfffffff0; + edTailP = ohci_cpu_to_le32(ed->hwTailP); + + /* unlink eds if they are not busy */ + if ((edHeadP == edTailP) && (ed->state == ED_OPER)) + ep_unlink(ohci, ed); + } + + td_list = td_list_next; + } + return stat; +} + +/*-------------------------------------------------------------------------* + * Virtual Root Hub + *-------------------------------------------------------------------------*/ + +/* Device descriptor */ +static __u8 root_hub_dev_des[] = { + 0x12, /* __u8 bLength; */ + 0x01, /* __u8 bDescriptorType; Device */ + 0x10, /* __u16 bcdUSB; v1.1 */ + 0x01, + 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ + 0x00, /* __u8 bDeviceSubClass; */ + 0x00, /* __u8 bDeviceProtocol; */ + 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ + 0x00, /* __u16 idVendor; */ + 0x00, + 0x00, /* __u16 idProduct; */ + 0x00, + 0x00, /* __u16 bcdDevice; */ + 0x00, + 0x00, /* __u8 iManufacturer; */ + 0x01, /* __u8 iProduct; */ + 0x00, /* __u8 iSerialNumber; */ + 0x01 /* __u8 bNumConfigurations; */ +}; + +/* Configuration descriptor */ +static __u8 root_hub_config_des[] = { + 0x09, /* __u8 bLength; */ + 0x02, /* __u8 bDescriptorType; Configuration */ + 0x19, /* __u16 wTotalLength; */ + 0x00, + 0x01, /* __u8 bNumInterfaces; */ + 0x01, /* __u8 bConfigurationValue; */ + 0x00, /* __u8 iConfiguration; */ + 0x40, /* __u8 bmAttributes; + Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */ + 0x00, /* __u8 MaxPower; */ + + /* interface */ + 0x09, /* __u8 if_bLength; */ + 0x04, /* __u8 if_bDescriptorType; Interface */ + 0x00, /* __u8 if_bInterfaceNumber; */ + 0x00, /* __u8 if_bAlternateSetting; */ + 0x01, /* __u8 if_bNumEndpoints; */ + 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ + 0x00, /* __u8 if_bInterfaceSubClass; */ + 0x00, /* __u8 if_bInterfaceProtocol; */ + 0x00, /* __u8 if_iInterface; */ + + /* endpoint */ + 0x07, /* __u8 ep_bLength; */ + 0x05, /* __u8 ep_bDescriptorType; Endpoint */ + 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ + 0x03, /* __u8 ep_bmAttributes; Interrupt */ + 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */ + 0x00, + 0xff /* __u8 ep_bInterval; 255 ms */ +}; + +static unsigned char root_hub_str_index0[] = { + 0x04, /* __u8 bLength; */ + 0x03, /* __u8 bDescriptorType; String-descriptor */ + 0x09, /* __u8 lang ID */ + 0x04, /* __u8 lang ID */ +}; + +static unsigned char root_hub_str_index1[] = { + 28, /* __u8 bLength; */ + 0x03, /* __u8 bDescriptorType; String-descriptor */ + 'O', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'H', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'C', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'I', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + ' ', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'R', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'o', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'o', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 't', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + ' ', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'H', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'u', /* __u8 Unicode */ + 0, /* __u8 Unicode */ + 'b', /* __u8 Unicode */ + 0, /* __u8 Unicode */ +}; + +/* Hub class-specific descriptor is constructed dynamically */ + +/*-------------------------------------------------------------------------*/ + +#define OK(x) len = (x); break + +#ifdef DEBUG +#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), \ + &gohci.regs->roothub.status);} +#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \ + writel((x), &gohci.regs- >roothub.portstatus[wIndex-1]);} +#else +#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status) +#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus [wIndex-1]) +#endif +#define RD_RH_STAT roothub_status(&gohci) +#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1) + +/* request to virtual root hub */ + +int rh_check_port_status(ohci_t * controller) +{ + __u32 temp, ndp, i; + int res; + + res = -1; + temp = roothub_a(controller); + ndp = (temp & RH_A_NDP); + + for (i = 0; i < ndp; i++) { + temp = roothub_portstatus(controller, i); + /* check for a device disconnect */ + if (((temp & (RH_PS_PESC | RH_PS_CSC)) == + (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) { + res = i; + break; + } + } + return res; +} + +static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + void *buffer, int transfer_len, + struct devrequest *cmd) +{ + void *data = buffer; + int leni = transfer_len; + int len = 0; + int stat = 0; + __u32 datab[4]; + __u8 *data_buf = (__u8 *) datab; + __u16 bmRType_bReq; + __u16 wValue; + __u16 wIndex; + __u16 wLength; + +#ifdef DEBUG + urb_priv.actual_length = 0; + pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", + usb_pipein(pipe)); +#endif + if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) { + info("Root-Hub submit IRQ: NOT implemented"); + return 0; + } + + bmRType_bReq = cmd->requesttype | (cmd->request << 8); + wValue = m16_swap(cmd->value); + wIndex = m16_swap(cmd->index); + wLength = m16_swap(cmd->length); + + info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x", + dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength); + + switch (bmRType_bReq) { + /* Request Destination: + without flags: Device, + RH_INTERFACE: interface, + RH_ENDPOINT: endpoint, + RH_CLASS means HUB here, + RH_OTHER | RH_CLASS almost ever means HUB_PORT here + */ + + case RH_GET_STATUS: + *(__u16 *) data_buf = m16_swap(1); + OK(2); + case RH_GET_STATUS | RH_INTERFACE: + *(__u16 *) data_buf = m16_swap(0); + OK(2); + case RH_GET_STATUS | RH_ENDPOINT: + *(__u16 *) data_buf = m16_swap(0); + OK(2); + case RH_GET_STATUS | RH_CLASS: + *(__u32 *) data_buf = m32_swap(RD_RH_STAT & + ~(RH_HS_CRWE | RH_HS_DRWE)); + OK(4); + case RH_GET_STATUS | RH_OTHER | RH_CLASS: + *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT); + OK(4); + + case RH_CLEAR_FEATURE | RH_ENDPOINT: + switch (wValue) { + case (RH_ENDPOINT_STALL): + OK(0); + } + break; + + case RH_CLEAR_FEATURE | RH_CLASS: + switch (wValue) { + case RH_C_HUB_LOCAL_POWER: + OK(0); + case (RH_C_HUB_OVER_CURRENT): + WR_RH_STAT(RH_HS_OCIC); + OK(0); + } + break; + + case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: + switch (wValue) { + case (RH_PORT_ENABLE): + WR_RH_PORTSTAT(RH_PS_CCS); + OK(0); + case (RH_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_POCI); + OK(0); + case (RH_PORT_POWER): + WR_RH_PORTSTAT(RH_PS_LSDA); + OK(0); + case (RH_C_PORT_CONNECTION): + WR_RH_PORTSTAT(RH_PS_CSC); + OK(0); + case (RH_C_PORT_ENABLE): + WR_RH_PORTSTAT(RH_PS_PESC); + OK(0); + case (RH_C_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_PSSC); + OK(0); + case (RH_C_PORT_OVER_CURRENT): + WR_RH_PORTSTAT(RH_PS_OCIC); + OK(0); + case (RH_C_PORT_RESET): + WR_RH_PORTSTAT(RH_PS_PRSC); + OK(0); + } + break; + + case RH_SET_FEATURE | RH_OTHER | RH_CLASS: + switch (wValue) { + case (RH_PORT_SUSPEND): + WR_RH_PORTSTAT(RH_PS_PSS); + OK(0); + case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */ + if (RD_RH_PORTSTAT & RH_PS_CCS) + WR_RH_PORTSTAT(RH_PS_PRS); + OK(0); + case (RH_PORT_POWER): + WR_RH_PORTSTAT(RH_PS_PPS); + OK(0); + case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */ + if (RD_RH_PORTSTAT & RH_PS_CCS) + WR_RH_PORTSTAT(RH_PS_PES); + OK(0); + } + break; + + case RH_SET_ADDRESS: + gohci.rh.devnum = wValue; + OK(0); + + case RH_GET_DESCRIPTOR: + switch ((wValue & 0xff00) >> 8) { + case (0x01): /* device descriptor */ + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_dev_des), wLength)); + data_buf = root_hub_dev_des; + OK(len); + case (0x02): /* configuration descriptor */ + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_config_des), + wLength)); + data_buf = root_hub_config_des; + OK(len); + case (0x03): /* string descriptors */ + if (wValue == 0x0300) { + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_str_index0), + wLength)); + data_buf = root_hub_str_index0; + OK(len); + } + + if (wValue == 0x0301) { + len = min_t(unsigned int, + leni, + min_t(unsigned int, + sizeof(root_hub_str_index1), + wLength)); + data_buf = root_hub_str_index1; + OK(len); + } + default: + stat = USB_ST_STALLED; + } + break; + + case RH_GET_DESCRIPTOR | RH_CLASS: + { + __u32 temp = roothub_a(&gohci); + + data_buf[0] = 9; /* min length; */ + data_buf[1] = 0x29; + data_buf[2] = temp & RH_A_NDP; + data_buf[3] = 0; + + if (temp & RH_A_PSM) /* per-port power switching? */ + data_buf[3] |= 0x1; + + if (temp & RH_A_NOCP) /* no overcurrent reporting? */ + data_buf[3] |= 0x10; + else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */ + data_buf[3] |= 0x8; + + /* corresponds to data_buf[4-7] */ + datab[1] = 0; + data_buf[5] = (temp & RH_A_POTPGT) >> 24; + temp = roothub_b(&gohci); + data_buf[7] = temp & RH_B_DR; + + if (data_buf[2] < 7) + data_buf[8] = 0xff; + else { + data_buf[0] += 2; + data_buf[8] = (temp & RH_B_DR) >> 8; + data_buf[10] = data_buf[9] = 0xff; + } + + len = min_t(unsigned int, leni, + min_t(unsigned int, data_buf[0], wLength)); + OK(len); + } + + case RH_GET_CONFIGURATION: + *(__u8 *) data_buf = 0x01; + OK(1); + + case RH_SET_CONFIGURATION: + WR_RH_STAT(0x10000); + OK(0); + + default: + dbg("unsupported root hub command"); + stat = USB_ST_STALLED; + } + +#ifdef DEBUG + ohci_dump_roothub(&gohci, 1); +#endif + + len = min_t(int, len, leni); + + if (data != data_buf) + memcpy(data, data_buf, len); + + dev->act_len = len; + dev->status = stat; + +#ifdef DEBUG + if (transfer_len) + urb_priv.actual_length = transfer_len; + pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", + 0 /*usb_pipein(pipe) */ ); +#endif + + return stat; +} + +/*-------------------------------------------------------------------------*/ + +/* common code for handling submit messages - used for all but root hub */ +/* accesses. */ +int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int transfer_len, struct devrequest *setup, int interval) +{ + int stat = 0; + int maxsize = usb_maxpacket(dev, pipe); + int timeout; + + /* device pulled? Shortcut the action. */ + if (devgone == dev) { + dev->status = USB_ST_CRC_ERR; + return 0; + } +#ifdef DEBUG + urb_priv.actual_length = 0; + pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", + usb_pipein(pipe)); +#endif + if (!maxsize) { + err("submit_common_message: pipesize for pipe %lx is zero", + pipe); + return -1; + } + + if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < + 0) { + err("sohci_submit_job failed"); + return -1; + } + + /* allow more time for a BULK device to react - some are slow */ +#define BULK_TO 5000 /* timeout in milliseconds */ + if (usb_pipetype(pipe) == PIPE_BULK) + timeout = BULK_TO; + else + timeout = 100; + + /* wait for it to complete */ + for (;;) { + /* check whether the controller is done */ + stat = hc_interrupt(); + if (stat < 0) { + stat = USB_ST_CRC_ERR; + break; + } + + if (stat >= 0 && stat < 0xff) { + /* 0xff is returned for an SF-interrupt */ + break; + } + + if (--timeout) + wait_ms(1); + else { + err("CTL:TIMEOUT "); + stat = USB_ST_CRC_ERR; + break; + } + } + + /* we got an Root Hub Status Change interrupt */ + if (got_rhsc) { +#ifdef DEBUG + ohci_dump_roothub(&gohci, 1); +#endif + got_rhsc = 0; + /* abuse timeout */ + timeout = rh_check_port_status(&gohci); + if (timeout >= 0) { + /* + * XXX + * This is potentially dangerous because it assumes + * that only one device is ever plugged in! + */ + devgone = dev; + } + } + + dev->status = stat; + dev->act_len = transfer_len; + +#ifdef DEBUG + pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", + usb_pipein(pipe)); +#endif + + /* free TDs in urb_priv */ + urb_free_priv(&urb_priv); + return 0; +} + +/* submit routines called from usb.c */ +int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int transfer_len) +{ + info("submit_bulk_msg"); + return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0); +} + +int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int transfer_len, struct devrequest *setup) +{ + int maxsize = usb_maxpacket(dev, pipe); + + info("submit_control_msg"); +#ifdef DEBUG + urb_priv.actual_length = 0; + pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", + usb_pipein(pipe)); +#endif + if (!maxsize) { + err("submit_control_message: pipesize for pipe %lx is zero", + pipe); + return -1; + } + + if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) { + gohci.rh.dev = dev; + /* root hub - redirect */ + return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len, + setup); + } + + return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0); +} + +int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int transfer_len, int interval) +{ + info("submit_int_msg"); + return -1; +} + +/*-------------------------------------------------------------------------* + * HC functions + *-------------------------------------------------------------------------*/ + +/* reset the HC and BUS */ + +static int hc_reset(ohci_t * ohci) +{ + int timeout = 30; + int smm_timeout = 50; /* 0,5 sec */ + + if (readl(&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */ + writel(OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */ + info("USB HC TakeOver from SMM"); + + while (readl(&ohci->regs->control) & OHCI_CTRL_IR) { + wait_ms(10); + if (--smm_timeout == 0) { + err("USB HC TakeOver failed!"); + return -1; + } + } + } + + /* Disable HC interrupts */ + writel(OHCI_INTR_MIE, &ohci->regs->intrdisable); + + dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;", + ohci->slot_name, readl(&ohci->regs->control)); + + /* Reset USB (needed by some controllers) */ + ohci->hc_control = 0; + writel(ohci->hc_control, &ohci->regs->control); + + /* HC Reset requires max 10 us delay */ + writel(OHCI_HCR, &ohci->regs->cmdstatus); + + while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) { + if (--timeout == 0) { + err("USB HC reset timed out!"); + return -1; + } + udelay(1); + } + return 0; +} + +/*-------------------------------------------------------------------------*/ + +/* Start an OHCI controller, set the BUS operational + * enable interrupts + * connect the virtual root hub */ + +static int hc_start(ohci_t * ohci) +{ + __u32 mask; + unsigned int fminterval; + + ohci->disabled = 1; + + /* Tell the controller where the control and bulk lists are + * The lists are empty now. */ + + writel(0, &ohci->regs->ed_controlhead); + writel(0, &ohci->regs->ed_bulkhead); + + writel((__u32) ohci->hcca, &ohci->regs->hcca); /* a reset clears this */ + + fminterval = 0x2edf; + writel((fminterval * 9) / 10, &ohci->regs->periodicstart); + fminterval |= ((((fminterval - 210) * 6) / 7) << 16); + writel(fminterval, &ohci->regs->fminterval); + writel(0x628, &ohci->regs->lsthresh); + + /* start controller operations */ + ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER; + ohci->disabled = 0; + writel(ohci->hc_control, &ohci->regs->control); + + /* disable all interrupts */ + mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD | + OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC | + OHCI_INTR_OC | OHCI_INTR_MIE); + writel(mask, &ohci->regs->intrdisable); + /* clear all interrupts */ + mask &= ~OHCI_INTR_MIE; + writel(mask, &ohci->regs->intrstatus); + /* Choose the interrupts we care about now - but w/o MIE */ + mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO; + writel(mask, &ohci->regs->intrenable); + +#ifdef OHCI_USE_NPS + /* required for AMD-756 and some Mac platforms */ + writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM, + &ohci->regs->roothub.a); + writel(RH_HS_LPSC, &ohci->regs->roothub.status); +#endif /* OHCI_USE_NPS */ + +#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay (1000);}) + /* POTPGT delay is bits 24-31, in 2 ms units. */ + mdelay((roothub_a(ohci) >> 23) & 0x1fe); + + /* connect the virtual root hub */ + ohci->rh.devnum = 0; + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +/* an interrupt happens */ + +static int hc_interrupt(void) +{ + ohci_t *ohci = &gohci; + struct ohci_regs *regs = ohci->regs; + int ints; + int stat = -1; + + if ((ohci->hcca->done_head != 0) + && !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) + ints = OHCI_INTR_WDH; + else + ints = readl(&regs->intrstatus); + + /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca- >frame_no)); */ + + if (ints & OHCI_INTR_RHSC) + got_rhsc = 1; + + if (ints & OHCI_INTR_UE) { + ohci->disabled++; + err("OHCI Unrecoverable Error, controller usb-%s disabled", + ohci->slot_name); + /* e.g. due to PCI Master/Target Abort */ + +#ifdef DEBUG + ohci_dump(ohci, 1); +#endif + /* FIXME: be optimistic, hope that bug won't repeat often. */ + /* Make some non-interrupt context restart the controller. */ + /* Count and limit the retries though; either hardware or */ + /* software errors can go forever... */ + hc_reset(ohci); + return -1; + } + + if (ints & OHCI_INTR_WDH) { + writel(OHCI_INTR_WDH, &regs->intrdisable); + stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci)); + writel(OHCI_INTR_WDH, &regs->intrenable); + } + + if (ints & OHCI_INTR_SO) { + dbg("USB Schedule overrun\n"); + writel(OHCI_INTR_SO, &regs->intrenable); + stat = -1; + } + + /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */ + if (ints & OHCI_INTR_SF) { + unsigned int frame = ohci_cpu_to_le16(ohci->hcca->frame_no) & 1; + writel(OHCI_INTR_SF, &regs->intrdisable); + + if (ohci->ed_rm_list[frame] != NULL) + writel(OHCI_INTR_SF, &regs->intrenable); + + stat = 0xff; + } + + writel(ints, &regs->intrstatus); + return stat; +} + +/*-------------------------------------------------------------------------*/ + +/*-------------------------------------------------------------------------*/ + +/* De-allocate all resources.. */ + +static void hc_release_ohci(ohci_t * ohci) +{ + dbg("USB HC release ohci usb-%s", ohci->slot_name); + + if (!ohci->disabled) + hc_reset(ohci); +} + +/*-------------------------------------------------------------------------*/ + +/* + * low level initalisation routine, called from usb.c + */ +static char ohci_inited = 0; + +int usb_lowlevel_init(void) +{ + /* Set the USB VBus */ + *(vu_long *) (CFG_FPGA_BASE + 0x08) |= 0x00000060; + + memset(&gohci, 0, sizeof(ohci_t)); + memset(&urb_priv, 0, sizeof(urb_priv_t)); + + /* align the storage */ + if ((__u32) & ghcca[0] & 0xff) { + err("HCCA not aligned!!"); + return -1; + } + phcca = &ghcca[0]; + info("aligned ghcca %p", phcca); + memset(&ohci_dev, 0, sizeof(struct ohci_device)); + + if ((__u32) & ohci_dev.ed[0] & 0x7) { + err("EDs not aligned!!"); + return -1; + } + memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1)); + if ((__u32) gtd & 0x7) { + err("TDs not aligned!!"); + return -1; + } + ptd = gtd; + gohci.hcca = phcca; + memset(phcca, 0, sizeof(struct ohci_hcca)); + + gohci.disabled = 1; + gohci.sleeping = 0; + gohci.irq = -1; + gohci.regs = (struct ohci_regs *)MMAP_USBH; + + gohci.flags = 0; + gohci.slot_name = "mpc8220"; + + if (hc_reset(&gohci) < 0) { + hc_release_ohci(&gohci); + return -1; + } + + if (hc_start(&gohci) < 0) { + err("can't start usb-%s", gohci.slot_name); + hc_release_ohci(&gohci); + return -1; + } +#ifdef DEBUG + ohci_dump(&gohci, 1); +#endif + ohci_inited = 1; + return 0; +} + +int usb_lowlevel_stop(void) +{ + /* this gets called really early - before the controller has */ + /* even been initialized! */ + if (!ohci_inited) + return 0; + /* TODO release any interrupts, etc. */ + /* call hc_release_ohci() here ? */ + hc_reset(&gohci); + return 0; +} + +#endif /* CONFIG_USB_OHCI */

1 0

[U-Boot-Users] Patch: MPC8220 vco frequency update
by TsiChung Liew 11 May '07

11 May '07

- replaced vco to cvco and svco - added CFG_SPEED in speed.c Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> diff -rupN u-boot-all.git/common/cmd_bdinfo.c u-boot-all-8220- cfgspeed/common/cmd_bdinfo.c --- u-boot-all.git/common/cmd_bdinfo.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/common/cmd_bdinfo.c 2007-05-10 17:07:48.000000000 -0500 @@ -87,7 +87,8 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int fl print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq)); print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq)); print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq)); - print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq)); + print_str("cvcofreq", strmhz(buf, bd->bi_cvcofreq)); + print_str("svcofreq", strmhz(buf, bd->bi_svcofreq)); print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq)); #endif diff -rupN u-boot-all.git/common/cmd_bootm.c u-boot-all-8220- cfgspeed/common/cmd_bootm.c --- u-boot-all.git/common/cmd_bootm.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/common/cmd_bootm.c 2007-05-10 17:07:58.000000000 -0500 @@ -606,7 +606,8 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl kbd->bi_pcifreq /= 1000000L; kbd->bi_pevfreq /= 1000000L; kbd->bi_flbfreq /= 1000000L; - kbd->bi_vcofreq /= 1000000L; + kbd->bi_cvcofreq /= 1000000L; + kbd->bi_svcofreq /= 1000000L; #endif #if defined(CONFIG_CPM2) kbd->bi_cpmfreq /= 1000000L; diff -rupN u-boot-all.git/common/cmd_fdt.c u-boot-all-8220- cfgspeed/common/cmd_fdt.c --- u-boot-all.git/common/cmd_fdt.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/common/cmd_fdt.c 2007-05-10 17:08:04.000000000 -0500 @@ -702,7 +702,8 @@ static const struct { BDM(pcifreq), BDM(pevfreq), BDM(flbfreq), - BDM(vcofreq), + BDM(cvcofreq), + BDM(svcofreq), #endif BDM(bootflags), BDM(ip_addr), diff -rupN u-boot-all.git/common/ft_build.c u-boot-all-8220- cfgspeed/common/ft_build.c --- u-boot-all.git/common/ft_build.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/common/ft_build.c 2007-05-10 17:08:15.000000000 -0500 @@ -429,7 +429,8 @@ static const struct { BDM(pcifreq), BDM(pevfreq), BDM(flbfreq), - BDM(vcofreq), + BDM(cvcofreq), + BDM(svcofreq), #endif BDM(bootflags), BDM(ip_addr), diff -rupN u-boot-all.git/cpu/mpc8220/speed.c u-boot-all-8220- cfgspeed/cpu/mpc8220/speed.c --- u-boot-all.git/cpu/mpc8220/speed.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/cpu/mpc8220/speed.c 2007-05-10 17:06:24.000000000 -0500 @@ -27,6 +27,8 @@ DECLARE_GLOBAL_DATA_PTR; +#if !defined(CFG_SPEED) + typedef struct pllmultiplier { u8 hid1; int multi; @@ -35,10 +37,6 @@ typedef struct pllmultiplier { /* ------------------------------------------------------------------------- */ -/* - * - */ - int get_clocks (void) { pllcfg_t bus2core[] = { @@ -97,7 +95,10 @@ int get_clocks (void) for (i = 0; i < size; i++) if (hid1 == bus2core[i].hid1) { gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1; - gd->vco_clk = CFG_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * bus2core[i].vco_div)/2; + gd->cvco_clk = + CFG_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * + bus2core[i]. + vco_div) / 2; break; } @@ -106,13 +107,22 @@ int get_clocks (void) return (0); } +#endif /* !defined(CFG_SPEED) */ int prt_mpc8220_clks (void) { - printf (" Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n", - gd->bus_clk / 1000000, gd->cpu_clk / 1000000, - gd->pci_clk / 1000000, gd->vco_clk / 1000000); - +#ifdef CFG_SPEED + printf(" CPU %ld MHz, BUS %ld MHz, PCI %ld MHz, FBUS %ld Mhz\n", + gd->cpu_clk / 1000000, gd->bus_clk / 1000000, + gd->pci_clk / 1000000, gd->flb_clk / 1000000); + printf(" SVCO %ld MHz, CVCO %ld MHz\n", + gd->svco_clk / 1000000, gd->cvco_clk / 1000000); +#else + printf(" CPU %ld MHz, BUS %ld MHz, PCI %ld MHz, FBUS %ld Mhz\n", + gd->cpu_clk / 1000000, gd->bus_clk / 1000000, + gd->pci_clk / 1000000, gd->flb_clk / 1000000); + printf(" CVCO %ld MHz\n", gd->cvco_clk / 1000000); +#endif /* CFG_SPEED */ return (0); } diff -rupN u-boot-all.git/include/asm-ppc/global_data.h u-boot-all-8220- cfgspeed/include/asm-ppc/global_data.h --- u-boot-all.git/include/asm-ppc/global_data.h 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/include/asm-ppc/global_data.h 2007-05-10 17:10:53.000000000 -0500 @@ -84,7 +84,8 @@ typedef struct global_data { unsigned long bExtUart; unsigned long inp_clk; unsigned long pci_clk; - unsigned long vco_clk; + unsigned long cvco_clk; + unsigned long svco_clk; unsigned long pev_clk; unsigned long flb_clk; #endif diff -rupN u-boot-all.git/include/asm-ppc/u-boot.h u-boot-all-8220- cfgspeed/include/asm-ppc/u-boot.h --- u-boot-all.git/include/asm-ppc/u-boot.h 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/include/asm-ppc/u-boot.h 2007-05-10 17:10:59.000000000 -0500 @@ -60,7 +60,8 @@ typedef struct bd_info { unsigned long bi_pcifreq; /* PCI Freq, in MHz */ unsigned long bi_pevfreq; /* PEV Freq, in MHz */ unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */ - unsigned long bi_vcofreq; /* VCO Freq, in MHz */ + unsigned long bi_cvcofreq; /* Core VCO Freq, in MHz */ + unsigned long bi_svcofreq; /* System VCO Freq, in Mhz */ #endif unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ unsigned long bi_ip_addr; /* IP Address */ diff -rupN u-boot-all.git/lib_ppc/board.c u-boot-all-8220- cfgspeed/lib_ppc/board.c --- u-boot-all.git/lib_ppc/board.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-cfgspeed/lib_ppc/board.c 2007-05-10 17:14:06.000000000 -0500 @@ -528,7 +528,8 @@ void board_init_f (ulong bootflag) bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ bd->bi_inpfreq = gd->inp_clk; bd->bi_pcifreq = gd->pci_clk; - bd->bi_vcofreq = gd->vco_clk; + bd->bi_cvcofreq = gd->cvco_clk; + bd->bi_svcofreq = gd->svco_clk; bd->bi_pevfreq = gd->pev_clk; bd->bi_flbfreq = gd->flb_clk; @@ -539,7 +540,7 @@ void board_init_f (ulong bootflag) *sram++ = gd->bus_clk; *sram++ = gd->inp_clk; *sram++ = gd->cpu_clk; - *sram++ = gd->vco_clk; + *sram++ = gd->cvco_clk; *sram++ = gd->flb_clk; *sram++ = 0xb8c3ba11; /* boot signature */ }

1 0

[U-Boot-Users] Patch: MPC8220 - update PCI for Alaska
by TsiChung Liew 11 May '07

11 May '07

- Added PCI feature Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> diff -rupN u-boot-all.git/board/alaska/alaska.c u-boot-all-8220- pci/board/alaska/alaska.c --- u-boot-all.git/board/alaska/alaska.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-pci/board/alaska/alaska.c 2007-05-10 16:35:11.000000000 -0500 @@ -25,6 +25,9 @@ #include <mpc8220.h> #include <asm/processor.h> #include <asm/mmu.h> +#if defined(CONFIG_PCI) +#include <pci.h> +#endif void setupBat (ulong size) { @@ -151,3 +154,19 @@ int checkboard (void) return 0; } + +#if defined(CONFIG_PCI) +/* + * Initialize PCI devices, report devices found. + */ +static struct pci_controller hose; + +#endif /* CONFIG_PCI */ + +void pci_init_board (void) +{ +#ifdef CONFIG_PCI + extern void pci_mpc8220_init (struct pci_controller *hose); + pci_mpc8220_init (&hose); +#endif /* CONFIG_PCI */ +} diff -rupN u-boot-all.git/cpu/mpc8220/pci.c u-boot-all-8220- pci/cpu/mpc8220/pci.c --- u-boot-all.git/cpu/mpc8220/pci.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-pci/cpu/mpc8220/pci.c 2007-05-10 16:32:34.000000000 -0500 @@ -116,8 +116,10 @@ pci_mpc8220_init(struct pci_controller * out_be32 (&xcpci->init_win_cfg, PCI_INIT_WIN_CFG_WIN0_CTRL_EN | - PCI_INIT_WIN_CFG_WIN1_CTRL_EN | PCI_INIT_WIN_CFG_WIN1_CTRL_IO | - PCI_INIT_WIN_CFG_WIN2_CTRL_EN | PCI_INIT_WIN_CFG_WIN2_CTRL_IO); + PCI_INIT_WIN_CFG_WIN1_CTRL_EN | + PCI_INIT_WIN_CFG_WIN1_CTRL_IO | + PCI_INIT_WIN_CFG_WIN2_CTRL_EN | + PCI_INIT_WIN_CFG_WIN2_CTRL_IO); out_be32 (&xcpci->init_ctrl, 0x00000000);

1 0

[U-Boot-Users] PATCH: MPC8220 update in flash.c
by TsiChung Liew 11 May '07

11 May '07

- Print out KB or MB in flash Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> diff -rupN u-boot-all.git/board/alaska/flash.c u-boot-all-8220- flash/board/alaska/flash.c --- u-boot-all.git/board/alaska/flash.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-flash/board/alaska/flash.c 2007-05-10 15:40:56.000000000 -0500 @@ -27,7 +27,6 @@ #include <common.h> #include <linux/byteorder/swab.h> - flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* Board support for 1 or 2 flash devices */ @@ -213,8 +212,12 @@ void flash_print_info (flash_info_t * in break; } + if (info->size > 0x100000) printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); + else + printf(" Size: %ld KB in %d Sectors\n", + info->size >> 10, info->sector_count); printf (" Sector Start Addresses:"); for (i = 0; i < info->sector_count; ++i) { @@ -308,7 +311,6 @@ static ulong flash_get_size (FPW * addr, return (info->size); } - /* * This function gets the u-boot flash sector protection status * (flash_info_t.protect[]) in sync with the sector protection @@ -331,7 +333,6 @@ static void flash_sync_real_protect (fla } } - /* * checks if "sector" in bank "info" is protected. Should work on intel * strata flash chips 28FxxxJ3x in 8-bit mode. @@ -384,7 +385,6 @@ static unsigned char intel_sector_protec return ret; } - /* * Checks if "bank1" and "bank2" are on the same chip. Returns 1 if they * are and 0 otherwise. @@ -400,7 +400,6 @@ static unsigned char same_chip_banks (in return same_chip[bank1][bank2]; } - /*----------------------------------------------------------------------- */ int flash_erase (flash_info_t * info, int s_first, int s_last)

1 0

[U-Boot-Users] Patch: MPC8220i I2C update
by TsiChung Liew 11 May '07

11 May '07

- Applied I2C frequency divider calculation instead of fixed value in dramSetup.c. - Removed i2cCore.c and i2cCore.h - Update I2C definitions in mpc8220.h Regards, TsiChung Liew Signed-off by: TsiChung Liew<Tsi-Chung.Liew(a)freescale.com> diff -rupN u-boot-all.git/cpu/mpc8220/dramSetup.c u-boot-all-8220- dramsetup/cpu/mpc8220/dramSetup.c --- u-boot-all.git/cpu/mpc8220/dramSetup.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-dramsetup/cpu/mpc8220/dramSetup.c 2007-05-10 15:30:52.000000000 -0500 @@ -29,7 +29,6 @@ characteristics to initialize the dram o #include <common.h> #include <mpc8220.h> -#include "i2cCore.h" #include "dramSetup.h" DECLARE_GLOBAL_DATA_PTR; @@ -91,6 +90,97 @@ int spd_readbyte (volatile i2c8220_t * p return (OK); } +#define I2C_BITRATE_VALUE 100000 +#define ABS(x) ((x < 0)? -x : x) +u8 i2cCalculation(u32 devfreq) +{ +/* Constants */ + const u8 div_hold[8][3] = { {9, 3}, {10, 3}, + {12, 4}, {15, 4}, + {5, 1}, {6, 1}, + {7, 2}, {8, 2} + }; + + const u8 scl_tap[8][2] = { {4, 1}, {4, 2}, + {6, 4}, {6, 8}, + {14, 16}, {30, 32}, + {62, 64}, {126, 128} + }; + + u8 mfdr_bits; + + int i = 0; + int j = 0; + + int Diff, min; + int WhichFreq, iRec, jRec; + int SCL_Period; + int SCL_Hold; + int I2C_Freq; + + /* Initialize */ + mfdr_bits = 0; + min = 0x7fffffff; + WhichFreq = iRec = jRec = 0; + + for (i = 0; i < 8; i++) { + for (j = 0; j < 8; j++) { + /* SCL Period = 2 * (scl2tap + [(SCL_Tap - 1) * tap2tap] + 2) + * SCL Hold = scl2tap + ((SDA_Tap - 1) * tap2tap) + 3 + * Bit Rate (I2C Freq) = System Freq / SCL Period + */ + SCL_Period = + 2 * (scl_tap[i][0] + + ((div_hold[j][0] - 1) * scl_tap[i][1]) + 2); + + /* Now get the I2C Freq */ + I2C_Freq = devfreq / SCL_Period; + + /* Take equal or slower */ + if (I2C_Freq > I2C_BITRATE_VALUE) + continue; + + /* Take the differences */ + Diff = I2C_Freq - I2C_BITRATE_VALUE; + + Diff = ABS(Diff); + + /* Find the closer value */ + if (Diff < min) { + min = Diff; + WhichFreq = I2C_Freq; + iRec = i; + jRec = j; + } + } + } + + SCL_Period = + 2 * (scl_tap[iRec][0] + + ((div_hold[jRec][0] - 1) * scl_tap[iRec][1]) + 2); + + /* This may no require */ + SCL_Hold = + scl_tap[iRec][0] + ((div_hold[jRec][1] - 1) * scl_tap[iRec][1]) + 3; + + /* FDR 4,3,2 */ + if ((iRec & 1) == 1) + mfdr_bits |= 0x04; /* FDR 2 */ + if ((iRec & 2) == 2) + mfdr_bits |= 0x08; /* FDR 3 */ + if ((iRec & 4) == 4) + mfdr_bits |= 0x10; /* FDR 4 */ + /* FDR 5,1,0 */ + if ((jRec & 1) == 1) + mfdr_bits |= 0x01; /* FDR 0 */ + if ((jRec & 2) == 2) + mfdr_bits |= 0x02; /* FDR 1 */ + if ((jRec & 4) == 4) + mfdr_bits |= 0x20; /* FDR 5 */ + + return mfdr_bits; +} + int readSpdData (u8 * spdData) { volatile i2c8220_t *pi2cReg; @@ -109,40 +199,13 @@ int readSpdData (u8 * spdData) /* Points the structure to I2c mbar memory offset */ pi2cReg = (volatile i2c8220_t *) (MMAP_I2C); - /* Clear FDR, ADR, SR and CR reg */ pi2cReg->adr = 0; pi2cReg->fdr = 0; pi2cReg->cr = 0; pi2cReg->sr = 0; - /* Set for fix XLB Bus Frequency */ - switch (gd->bus_clk) { - case 60000000: - pi2cReg->fdr = 0x15; - break; - case 70000000: - pi2cReg->fdr = 0x16; - break; - case 80000000: - pi2cReg->fdr = 0x3a; - break; - case 90000000: - pi2cReg->fdr = 0x17; - break; - case 100000000: - pi2cReg->fdr = 0x3b; - break; - case 110000000: - pi2cReg->fdr = 0x18; - break; - case 120000000: - pi2cReg->fdr = 0x19; - break; - case 130000000: - pi2cReg->fdr = 0x1a; - break; - } + pi2cReg->fdr = i2cCalculation(gd->bus_clk); pi2cReg->adr = CFG_I2C_SLAVE<<1; @@ -167,7 +230,6 @@ int readSpdData (u8 * spdData) if (spd_status (pi2cReg, I2C_STA_BB, 1) != OK) return ERROR; - /* Write slave address */ pi2cReg->sr &= ~I2C_STA_IF; /* Clear Interrupt */ pi2cReg->dr = slvAdr; /* Write a byte */ @@ -182,7 +244,6 @@ int readSpdData (u8 * spdData) return ERROR; } - /* Issue the offset to start */ pi2cReg->sr &= ~I2C_STA_IF; /* Clear Interrupt */ pi2cReg->dr = 0; /* Write a byte */ @@ -197,7 +258,6 @@ int readSpdData (u8 * spdData) return ERROR; } - /* Set repeat start */ pi2cReg->cr |= I2C_CTL_RSTA; /* Repeat Start */ @@ -257,7 +317,6 @@ int getBankInfo (int bank, draminfo_t * int count; u8 spdData[SPD_SIZE]; - if (bank > 2 || pBank == 0) { /* illegal values */ return (-42); @@ -277,8 +336,7 @@ int getBankInfo (int bank, draminfo_t * return (-2); /* Get the memory type */ - if (! - ((spdData[LOC_TYPE] == TYPE_DDR) + if (!((spdData[LOC_TYPE] == TYPE_DDR) || (spdData[LOC_TYPE] == TYPE_SDR))) /* not one of the types we support */ return (-3); @@ -328,7 +386,6 @@ int getBankInfo (int bank, draminfo_t * return (0); } - /* checkMuxSetting -- given a row/column device geometry, return a mask * of the valid DRAM controller addr_mux settings for * that geometry. @@ -400,7 +457,6 @@ u8 checkMuxSetting (u8 rows, u8 columns) return (mask); } - u32 dramSetup (void) { draminfo_t DramInfo[TOTAL_BANK]; @@ -469,8 +525,7 @@ u32 dramSetup (void) if (columns > 13) columns = 13; - pDramInfo->size = - ((1 << (rows + columns)) * pDramInfo->width); + pDramInfo->size = ((1 << (rows + columns)) * pDramInfo->width); pDramInfo->size *= pDramInfo->banks; pDramInfo->size >>= 3; @@ -494,7 +549,6 @@ u32 dramSetup (void) } /* for loop */ - /* We only allow a burst length of 8! */ if (!(bursts & 8)) bursts = 8; @@ -522,7 +576,6 @@ u32 dramSetup (void) } } - /* Now figure out the base address for each bank. While * we're at it, figure out how much memory there is. * @@ -566,7 +619,6 @@ u32 dramSetup (void) */ cfg_value |= CFG1_RLATENCY ((type == TYPE_DDR) ? 7 : 2); - /* Set the Active to Read/Write delay. This depends * on Trcd which is reported as nanoseconds times 4. * We want to calculate Trcd (in nanoseconds) times XLB clock (in Hz) @@ -615,7 +667,6 @@ u32 dramSetup (void) memctl->cfg1 = cfg_value; /* cfg 1 */ asm volatile ("sync"); - /* ********************** Cfg 2 ************************* */ /* Set the burst read to read/precharge delay */ @@ -639,7 +690,6 @@ u32 dramSetup (void) memctl->cfg2 = cfg_value; /* cfg 2 */ asm volatile ("sync"); - /* ********************** mode ************************* */ /* Set enable bit, CKE high/low bits, and the DDR/SDR mode bit, @@ -677,7 +727,6 @@ u32 dramSetup (void) asm volatile ("sync"); } - /* Set up mode value for CAS latency */ #if (CFG_SDRAM_CAS_LATENCY==5) /* CL=2.5 */ mode_value = (MODE_MODE | MODE_BURSTLEN (MODE_BURSTLEN_8) | @@ -711,8 +760,7 @@ u32 dramSetup (void) if (DramInfo[banknum].size & mask) break; } - temp = (DramInfo[banknum].base & 0xfff00000) | (i - - 1); + temp = (DramInfo[banknum].base & 0xfff00000) | (i - 1); sysconf->cscfg[banknum] = temp; asm volatile ("sync"); diff -rupN u-boot-all.git/cpu/mpc8220/i2cCore.c u-boot-all-8220- dramsetup/cpu/mpc8220/i2cCore.c --- u-boot-all.git/cpu/mpc8220/i2cCore.c 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-dramsetup/cpu/mpc8220/i2cCore.c 1969-12-31 18:00:00.000000000 -0600 @@ -1,627 +0,0 @@ -/* I2cCore.c - MPC8220 PPC I2C Library */ - -/* Copyright 2004 Freescale Semiconductor, Inc. */ - -/* -modification history --------------------- -01c,29jun04,tcl 1.3 removed CR. Added two bytes offset support. -01b,19jan04,tcl 1.2 removed i2cMsDelay and sysDecGet. renamed i2cMsDelay - back to sysMsDelay -01a,19jan04,tcl 1.1 created and seperated from i2c.c -*/ - -/* -DESCRIPTION -This file contain I2C low level handling library functions -*/ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <vxWorks.h> -#include <sysLib.h> -#include <iosLib.h> -#include <logLib.h> -#include <tickLib.h> - -/* BSP Includes */ -#include "config.h" -#include "mpc8220.h" -#include "i2cCore.h" - -#ifdef DEBUG_I2CCORE -int I2CCDbg = 0; -#endif - -#define ABS(x) ((x < 0)? -x : x) - -char *I2CERR[16] = { - "Transfer in Progress\n", /* 0 */ - "Transfer complete\n", - "Not Addressed\n", /* 2 */ - "Addressed as a slave\n", - "Bus is Idle\n", /* 4 */ - "Bus is busy\n", - "Arbitration Lost\n", /* 6 */ - "Arbitration on Track\n", - "Slave receive, master writing to slave\n", /* 8 */ - "Slave transmit, master reading from slave\n", - "Interrupt is pending\n", /* 10 */ - "Interrupt complete\n", - "Acknowledge received\n", /* 12 */ - "No acknowledge received\n", - "Unknown status\n", /* 14 */ - "\n" -}; - -/****************************************************************************** - * - * chk_status - Check I2C status bit - * - * RETURNS: OK, or ERROR if the bit encounter - * - */ - -STATUS chk_status (PSI2C pi2c, UINT8 sta_bit, UINT8 truefalse) -{ - int i, status = 0; - - for (i = 0; i < I2C_POLL_COUNT; i++) { - if ((pi2c->sr & sta_bit) == (truefalse ? sta_bit : 0)) - return (OK); - } - - I2CCDBG (L2, ("--- sr %x stabit %x truefalse %d\n", - pi2c->sr, sta_bit, truefalse, 0, 0, 0)); - - if (i == I2C_POLL_COUNT) { - switch (sta_bit) { - case I2C_STA_CF: - status = 0; - break; - case I2C_STA_AAS: - status = 2; - break; - case I2C_STA_BB: - status = 4; - break; - case I2C_STA_AL: - status = 6; - break; - case I2C_STA_SRW: - status = 8; - break; - case I2C_STA_IF: - status = 10; - break; - case I2C_STA_RXAK: - status = 12; - break; - default: - status = 14; - break; - } - - if (!truefalse) - status++; - - I2CCDBG (NO, ("--- status %d\n", status, 0, 0, 0, 0, 0)); - I2CCDBG (NO, (I2CERR[status], 0, 0, 0, 0, 0, 0)); - } - - return (ERROR); -} - -/****************************************************************************** - * - * I2C Enable - Enable the I2C Controller - * - */ -STATUS i2c_enable (SI2C * pi2c, PI2CSET pi2cSet) -{ - int fdr = pi2cSet->bit_rate; - UINT8 adr = pi2cSet->i2c_adr; - - I2CCDBG (L2, ("i2c_enable fdr %d adr %x\n", fdr, adr, 0, 0, 0, 0)); - - i2c_clear (pi2c); /* Clear FDR, ADR, SR and CR reg */ - - SetI2cFDR (pi2c, fdr); /* Frequency */ - pi2c->adr = adr; - - pi2c->cr = I2C_CTL_EN; /* Set Enable */ - - /* - The I2C bus should be in Idle state. If the bus is busy, - clear the STA bit in control register - */ - if (chk_status (pi2c, I2C_STA_BB, 0) != OK) { - if ((pi2c->cr & I2C_CTL_STA) == I2C_CTL_STA) - pi2c->cr &= ~I2C_CTL_STA; - - /* Check again if it is still busy, return error if found */ - if (chk_status (pi2c, I2C_STA_BB, 1) == OK) - return ERROR; - } - - return (OK); -} - -/****************************************************************************** - * - * I2C Disable - Disable the I2C Controller - * - */ -STATUS i2c_disable (PSI2C pi2c) -{ - i2c_clear (pi2c); - - pi2c->cr &= I2C_CTL_EN; /* Disable I2c */ - - if ((pi2c->cr & I2C_CTL_STA) == I2C_CTL_STA) - pi2c->cr &= ~I2C_CTL_STA; - - if (chk_status (pi2c, I2C_STA_BB, 0) != OK) - return ERROR; - - return (OK); -} - -/****************************************************************************** - * - * I2C Clear - Clear the I2C Controller - * - */ -STATUS i2c_clear (PSI2C pi2c) -{ - pi2c->adr = 0; - pi2c->fdr = 0; - pi2c->cr = 0; - pi2c->sr = 0; - - return (OK); -} - - -STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet) -{ -#ifdef TWOBYTES - UINT16 ByteOffset = pi2cSet->str_adr; -#else - UINT8 ByteOffset = pi2cSet->str_adr; -#endif -#if 1 - UINT8 tmp = 0; -#endif - UINT8 Addr = pi2cSet->slv_adr; - - pi2c->cr |= I2C_CTL_STA; /* Generate start signal */ - - if (chk_status (pi2c, I2C_STA_BB, 1) != OK) - return ERROR; - - /* Write slave address */ - if (i2c_writebyte (pi2c, &Addr) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } -#ifdef TWOBYTES -# if 0 - /* Issue the offset to start */ - if (i2c_write2byte (pi2c, &ByteOffset) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } -#endif - tmp = (ByteOffset >> 8) & 0xff; - if (i2c_writebyte (pi2c, &tmp) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } - tmp = ByteOffset & 0xff; - if (i2c_writebyte (pi2c, &tmp) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } -#else - if (i2c_writebyte (pi2c, &ByteOffset) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } -#endif - - return (OK); -} - -STATUS i2c_stop (PSI2C pi2c) -{ - pi2c->cr &= ~I2C_CTL_STA; /* Generate stop signal */ - if (chk_status (pi2c, I2C_STA_BB, 0) != OK) - return ERROR; - - return (OK); -} - -/****************************************************************************** - * - * Read Len bytes to the location pointed to by *Data from the device - * with address Addr. - */ -int i2c_readblock (SI2C * pi2c, PI2CSET pi2cSet, UINT8 * Data) -{ - int i = 0; - UINT8 Tmp; - -/* UINT8 ByteOffset = pi2cSet->str_adr; not used? */ - UINT8 Addr = pi2cSet->slv_adr; - int Length = pi2cSet->xfer_size; - - I2CCDBG (L1, ("i2c_readblock addr %x data 0x%08x len %d offset %d\n", - Addr, (int) Data, Length, ByteOffset, 0, 0)); - - if (pi2c->sr & I2C_STA_AL) { /* Check if Arbitration lost */ - I2CCDBG (FN, ("Arbitration lost\n", 0, 0, 0, 0, 0, 0)); - pi2c->sr &= ~I2C_STA_AL; /* Clear Arbitration status bit */ - return ERROR; - } - - pi2c->cr |= I2C_CTL_TX; /* Enable the I2c for TX, Ack */ - - if (i2c_start (pi2c, pi2cSet) == ERROR) - return ERROR; - - pi2c->cr |= I2C_CTL_RSTA; /* Repeat Start */ - - Tmp = Addr | 1; - - if (i2c_writebyte (pi2c, &Tmp) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } - - if (((pi2c->sr & 0x07) == 0x07) || (pi2c->sr & 0x01)) - return ERROR; - - pi2c->cr &= ~I2C_CTL_TX; /* Set receive mode */ - - if (((pi2c->sr & 0x07) == 0x07) || (pi2c->sr & 0x01)) - return ERROR; - - /* Dummy Read */ - if (i2c_readbyte (pi2c, &Tmp, &i) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } - - i = 0; - while (Length) { - if (Length == 2) - pi2c->cr |= I2C_CTL_TXAK; - - if (Length == 1) - pi2c->cr &= ~I2C_CTL_STA; - - if (i2c_readbyte (pi2c, Data, &Length) != OK) { - return i2c_stop (pi2c); - } - i++; - Length--; - Data++; - } - - if (i2c_stop (pi2c) == ERROR) - return ERROR; - - return i; -} - -STATUS i2c_writeblock (SI2C * pi2c, PI2CSET pi2cSet, UINT8 * Data) -{ - int Length = pi2cSet->xfer_size; - -#ifdef TWOBYTES - UINT16 ByteOffset = pi2cSet->str_adr; -#else - UINT8 ByteOffset = pi2cSet->str_adr; -#endif - int j, k; - - I2CCDBG (L2, ("i2c_writeblock\n", 0, 0, 0, 0, 0, 0)); - - if (pi2c->sr & I2C_STA_AL) { - /* Check if arbitration lost */ - I2CCDBG (L2, ("Arbitration lost\n", 0, 0, 0, 0, 0, 0)); - pi2c->sr &= ~I2C_STA_AL; /* Clear the condition */ - return ERROR; - } - - pi2c->cr |= I2C_CTL_TX; /* Enable the I2c for TX, Ack */ - - /* Do the not even offset first */ - if ((ByteOffset % 8) != 0) { - int remain; - - if (Length > 8) { - remain = 8 - (ByteOffset % 8); - Length -= remain; - - pi2cSet->str_adr = ByteOffset; - - if (i2c_start (pi2c, pi2cSet) == ERROR) - return ERROR; - - for (j = ByteOffset; j < remain; j++) { - if (i2c_writebyte (pi2c, Data++) != OK) - return ERROR; - } - - if (i2c_stop (pi2c) == ERROR) - return ERROR; - - sysMsDelay (32); - - /* Update the new ByteOffset */ - ByteOffset += remain; - } - } - - for (j = ByteOffset, k = 0; j < (Length + ByteOffset); j++) { - if ((j % 8) == 0) { - pi2cSet->str_adr = j; - if (i2c_start (pi2c, pi2cSet) == ERROR) - return ERROR; - } - - k++; - - if (i2c_writebyte (pi2c, Data++) != OK) - return ERROR; - - if ((j == (Length - 1)) || ((k % 8) == 0)) { - if (i2c_stop (pi2c) == ERROR) - return ERROR; - - sysMsDelay (50); - } - - } - - return k; -} - -STATUS i2c_readbyte (SI2C * pi2c, UINT8 * readb, int *index) -{ - pi2c->sr &= ~I2C_STA_IF; /* Clear Interrupt Bit */ - *readb = pi2c->dr; /* Read a byte */ - - /* - Set I2C_CTRL_TXAK will cause Transfer pending and - set I2C_CTRL_STA will cause Interrupt pending - */ - if (*index != 2) { - if (chk_status (pi2c, I2C_STA_CF, 1) != OK) /* Transfer not complete? */ - return ERROR; - } - - if (*index != 1) { - if (chk_status (pi2c, I2C_STA_IF, 1) != OK) - return ERROR; - } - - return (OK); -} - - -STATUS i2c_writebyte (SI2C * pi2c, UINT8 * writeb) -{ - pi2c->sr &= ~I2C_STA_IF; /* Clear Interrupt */ - pi2c->dr = *writeb; /* Write a byte */ - - if (chk_status (pi2c, I2C_STA_CF, 1) != OK) /* Transfer not complete? */ - return ERROR; - - if (chk_status (pi2c, I2C_STA_IF, 1) != OK) - return ERROR; - - return OK; -} - -STATUS i2c_write2byte (SI2C * pi2c, UINT16 * writeb) -{ - UINT8 data; - - data = (UINT8) ((*writeb >> 8) & 0xff); - if (i2c_writebyte (pi2c, &data) != OK) - return ERROR; - data = (UINT8) (*writeb & 0xff); - if (i2c_writebyte (pi2c, &data) != OK) - return ERROR; - return OK; -} - -/* FDR table base on 33Mhz - more detail please refer to Odini2c_dividers.xls -FDR FDR scl sda scl2tap2 -510 432 tap tap tap tap scl_per sda_hold I2C Freq 0 1 2 3 4 5 -000 000 9 3 4 1 28 Clocks 9 Clocks 1190 KHz 0 0 0 0 0 0 -000 001 9 3 4 2 44 Clocks 11 Clocks 758 KHz 0 0 1 0 0 0 -000 010 9 3 6 4 80 Clocks 17 Clocks 417 KHz 0 0 0 1 0 0 -000 011 9 3 6 8 144 Clocks 25 Clocks 231 KHz 0 0 1 1 0 0 -000 100 9 3 14 16 288 Clocks 49 Clocks 116 KHz 0 0 0 0 1 0 -000 101 9 3 30 32 576 Clocks 97 Clocks 58 KHz 0 0 1 0 1 0 -000 110 9 3 62 64 1152 Clocks 193 Clocks 29 KHz 0 0 0 1 1 0 -000 111 9 3 126 128 2304 Clocks 385 Clocks 14 KHz 0 0 1 1 1 0 -001 000 10 3 4 1 30 Clocks 9 Clocks 1111 KHz1 0 0 0 0 0 -001 001 10 3 4 2 48 Clocks 11 Clocks 694 KHz 1 0 1 0 0 0 -001 010 10 3 6 4 88 Clocks 17 Clocks 379 KHz 1 0 0 1 0 0 -001 011 10 3 6 8 160 Clocks 25 Clocks 208 KHz 1 0 1 1 0 0 -001 100 10 3 14 16 320 Clocks 49 Clocks 104 KHz 1 0 0 0 1 0 -001 101 10 3 30 32 640 Clocks 97 Clocks 52 KHz 1 0 1 0 1 0 -001 110 10 3 62 64 1280 Clocks 193 Clocks 26 KHz 1 0 0 1 1 0 -001 111 10 3 126 128 2560 Clocks 385 Clocks 13 KHz 1 0 1 1 1 0 -010 000 12 4 4 1 34 Clocks 10 Clocks 980 KHz 0 1 0 0 0 0 -010 001 12 4 4 2 56 Clocks 13 Clocks 595 KHz 0 1 1 0 0 0 -010 010 12 4 6 4 104 Clocks 21 Clocks 321 KHz 0 1 0 1 0 0 -010 011 12 4 6 8 192 Clocks 33 Clocks 174 KHz 0 1 1 1 0 0 -010 100 12 4 14 16 384 Clocks 65 Clocks 87 KHz 0 1 0 0 1 0 -010 101 12 4 30 32 768 Clocks 129 Clocks 43 KHz 0 1 1 0 1 0 -010 110 12 4 62 64 1536 Clocks 257 Clocks 22 KHz 0 1 0 1 1 0 -010 111 12 4 126 128 3072 Clocks 513 Clocks 11 KHz 0 1 1 1 1 0 -011 000 15 4 4 1 40 Clocks 10 Clocks 833 KHz 1 1 0 0 0 0 -011 001 15 4 4 2 68 Clocks 13 Clocks 490 KHz 1 1 1 0 0 0 -011 010 15 4 6 4 128 Clocks 21 Clocks 260 KHz 1 1 0 1 0 0 -011 011 15 4 6 8 240 Clocks 33 Clocks 139 KHz 1 1 1 1 0 0 -011 100 15 4 14 16 480 Clocks 65 Clocks 69 KHz 1 1 0 0 1 0 -011 101 15 4 30 32 960 Clocks 129 Clocks 35 KHz 1 1 1 0 1 0 -011 110 15 4 62 64 1920 Clocks 257 Clocks 17 KHz 1 1 0 1 1 0 -011 111 15 4 126 128 3840 Clocks 513 Clocks 9 KHz 1 1 1 1 1 0 -100 000 5 1 4 1 20 Clocks 7 Clocks 1667 KHz 0 0 0 0 0 1 -100 001 5 1 4 2 28 Clocks 7 Clocks 1190 KHz 0 0 1 0 0 1 -100 010 5 1 6 4 48 Clocks 9 Clocks 694 KHz 0 0 0 1 0 1 -100 011 5 1 6 8 80 Clocks 9 Clocks 417 KHz 0 0 1 1 0 1 -100 100 5 1 14 16 160 Clocks 17 Clocks 208 KHz 0 0 0 0 1 1 -100 101 5 1 30 32 320 Clocks 33 Clocks 104 KHz 0 0 1 0 1 1 -100 110 5 1 62 64 640 Clocks 65 Clocks 52 KHz 0 0 0 1 1 1 -100 111 5 1 126 128 1280 Clocks 129 Clocks 26 KHz 0 0 1 1 1 1 -101 000 6 1 4 1 22 Clocks 7 Clocks 1515 KHz 1 0 0 0 0 1 -101 001 6 1 4 2 32 Clocks 7 Clocks 1042 KHz 1 0 1 0 0 1 -101 010 6 1 6 4 56 Clocks 9 Clocks 595 KHz 1 0 0 1 0 1 -101 011 6 1 6 8 96 Clocks 9 Clocks 347 KHz 1 0 1 1 0 1 -101 100 6 1 14 16 192 Clocks 17 Clocks 174 KHz 1 0 0 0 1 1 -101 101 6 1 30 32 384 Clocks 33 Clocks 87 KHz 1 0 1 0 1 1 -101 110 6 1 62 64 768 Clocks 65 Clocks 43 KHz 1 0 0 1 1 1 -101 111 6 1 126 128 1536 Clocks 129 Clocks 22 KHz 1 0 1 1 1 1 -110 000 7 2 4 1 24 Clocks 8 Clocks 1389 KHz 0 1 0 0 0 1 -110 001 7 2 4 2 36 Clocks 9 Clocks 926 KHz 0 1 1 0 0 1 -110 010 7 2 6 4 64 Clocks 13 Clocks 521 KHz 0 1 0 1 0 1 -110 011 7 2 6 8 112 Clocks 17 Clocks 298 KHz 0 1 1 1 0 1 -110 100 7 2 14 16 224 Clocks 33 Clocks 149 KHz 0 1 0 0 1 1 -110 101 7 2 30 32 448 Clocks 65 Clocks 74 KHz 0 1 1 0 1 1 -110 110 7 2 62 64 896 Clocks 129 Clocks 37 KHz 0 1 0 1 1 1 -110 111 7 2 126 128 1792 Clocks 257 Clocks 19 KHz 0 1 1 1 1 1 -111 000 8 2 4 1 26 Clocks 8 Clocks 1282 KHz 1 1 0 0 0 1 -111 001 8 2 4 2 40 Clocks 9 Clocks 833 KHz 1 1 1 0 0 1 -111 010 8 2 6 4 72 Clocks 13 Clocks 463 KHz 1 1 0 1 0 1 -111 011 8 2 6 8 128 Clocks 17 Clocks 260 KHz 1 1 1 1 0 1 -111 100 8 2 14 16 256 Clocks 33 Clocks 130 KHz 1 1 0 0 1 1 -111 101 8 2 30 32 512 Clocks 65 Clocks 65 KHz 1 1 1 0 1 1 -111 110 8 2 62 64 1024 Clocks 129 Clocks 33 KHz 1 1 0 1 1 1 -111 111 8 2 126 128 2048 Clocks 257 Clocks 16 KHz 1 1 1 1 1 1 -*/ -STATUS SetI2cFDR (PSI2C pi2cRegs, int bitrate) -{ -/* Constants */ - const UINT8 div_hold[8][3] = { {9, 3}, {10, 3}, - {12, 4}, {15, 4}, - {5, 1}, {6, 1}, - {7, 2}, {8, 2} - }; - - const UINT8 scl_tap[8][2] = { {4, 1}, {4, 2}, - {6, 4}, {6, 8}, - {14, 16}, {30, 32}, - {62, 64}, {126, 128} - }; - - UINT8 mfdr_bits; - - int i = 0; - int j = 0; - - int Diff, min; - int WhichFreq, iRec, jRec; - int SCL_Period; - int SCL_Hold; - int I2C_Freq; - - I2CCDBG (L2, ("Entering getBitRate: bitrate %d pi2cRegs 0x%08x\n", - bitrate, (int) pi2cRegs, 0, 0, 0, 0)); - - if (bitrate < 0) { - I2CCDBG (NO, ("Invalid bitrate\n", 0, 0, 0, 0, 0, 0)); - return ERROR; - } - - /* Initialize */ - mfdr_bits = 0; - min = 0x7fffffff; - WhichFreq = iRec = jRec = 0; - - for (i = 0; i < 8; i++) { - for (j = 0; j < 8; j++) { - /* SCL Period = 2 * (scl2tap + [(SCL_Tap - 1) * tap2tap] + 2) - * SCL Hold = scl2tap + ((SDA_Tap - 1) * tap2tap) + 3 - * Bit Rate (I2C Freq) = System Freq / SCL Period - */ - SCL_Period = - 2 * (scl_tap[i][0] + - ((div_hold[j][0] - 1) * scl_tap[i][1]) + - 2); - - /* Now get the I2C Freq */ - I2C_Freq = DEV_CLOCK_FREQ / SCL_Period; - - /* Take equal or slower */ - if (I2C_Freq > bitrate) - continue; - - /* Take the differences */ - Diff = I2C_Freq - bitrate; - - Diff = ABS (Diff); - - /* Find the closer value */ - if (Diff < min) { - min = Diff; - WhichFreq = I2C_Freq; - iRec = i; - jRec = j; - } - - I2CCDBG (L2, - ("--- (%d,%d) I2C_Freq %d minDiff %d min %d\n", - i, j, I2C_Freq, Diff, min, 0)); - } - } - - SCL_Period = - 2 * (scl_tap[iRec][0] + - ((div_hold[jRec][0] - 1) * scl_tap[iRec][1]) + 2); - - I2CCDBG (L2, ("\nmin %d WhichFreq %d iRec %d jRec %d\n", - min, WhichFreq, iRec, jRec, 0, 0)); - I2CCDBG (L2, ("--- scl2tap %d SCL_Tap %d tap2tap %d\n", - scl_tap[iRec][0], div_hold[jRec][0], scl_tap[iRec][1], - 0, 0, 0)); - - /* This may no require */ - SCL_Hold = - scl_tap[iRec][0] + - ((div_hold[jRec][1] - 1) * scl_tap[iRec][1]) + 3; - I2CCDBG (L2, - ("--- SCL_Period %d SCL_Hold %d\n", SCL_Period, SCL_Hold, 0, - 0, 0, 0)); - - I2CCDBG (L2, ("--- mfdr_bits %x\n", mfdr_bits, 0, 0, 0, 0, 0)); - - /* FDR 4,3,2 */ - if ((iRec & 1) == 1) - mfdr_bits |= 0x04; /* FDR 2 */ - if ((iRec & 2) == 2) - mfdr_bits |= 0x08; /* FDR 3 */ - if ((iRec & 4) == 4) - mfdr_bits |= 0x10; /* FDR 4 */ - /* FDR 5,1,0 */ - if ((jRec & 1) == 1) - mfdr_bits |= 0x01; /* FDR 0 */ - if ((jRec & 2) == 2) - mfdr_bits |= 0x02; /* FDR 1 */ - if ((jRec & 4) == 4) - mfdr_bits |= 0x20; /* FDR 5 */ - - I2CCDBG (L2, ("--- mfdr_bits %x\n", mfdr_bits, 0, 0, 0, 0, 0)); - - pi2cRegs->fdr = mfdr_bits; - - return OK; -} diff -rupN u-boot-all.git/cpu/mpc8220/i2cCore.h u-boot-all-8220- dramsetup/cpu/mpc8220/i2cCore.h --- u-boot-all.git/cpu/mpc8220/i2cCore.h 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-dramsetup/cpu/mpc8220/i2cCore.h 1969-12-31 18:00:00.000000000 -0600 @@ -1,103 +0,0 @@ -/* - * i2cCore.h - * - * Prototypes, etc. for the Motorola MPC8220 - * embedded cpu chips - * - * 2004 (c) Freescale, Inc. - * Author: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __INCi2ccoreh -#define __INCi2ccoreh -#ifndef __ASSEMBLY__ -/* device types */ -#define I2C_DEVICE_TYPE_EEPROM 0 -#define I2C_EEPROM_ADRS 0xa0 -#define I2C_CTRL_ADRS I2C_EEPROM_ADRS -#define EEPROM_ADDR0 0xA2 /* on Dimm SPD eeprom */ -#define EEPROM_ADDR1 0xA4 /* on Board SPD eeprom */ -#define EEPROM_ADDR2 0xD2 /* non-standard eeprom - clock generator */ -/* Control Register */ -#define I2C_CTL_EN 0x80 /* I2C Enable */ -#define I2C_CTL_IEN 0x40 /* I2C Interrupt Enable */ -#define I2C_CTL_STA 0x20 /* Master/Slave Mode select */ -#define I2C_CTL_TX 0x10 /* Transmit/Receive Mode Select */ -#define I2C_CTL_TXAK 0x08 /* Transmit Acknowledge Enable */ -#define I2C_CTL_RSTA 0x04 /* Repeat Start */ -/* Status Register */ -#define I2C_STA_CF 0x80 /* Data Transfer */ -#define I2C_STA_AAS 0x40 /* Adressed As Slave */ -#define I2C_STA_BB 0x20 /* Bus Busy */ -#define I2C_STA_AL 0x10 /* Arbitration Lost */ -#define I2C_STA_SRW 0x04 /* Slave Read/Write */ -#define I2C_STA_IF 0x02 /* I2C Interrupt */ -#define I2C_STA_RXAK 0x01 /* Receive Acknowledge */ -/* Interrupt Contol Register */ -#define I2C_INT_BNBE2 0x80 /* Bus Not Busy Enable 2 */ -#define I2C_INT_TE2 0x40 /* Transmit Enable 2 */ -#define I2C_INT_RE2 0x20 /* Receive Enable 2 */ -#define I2C_INT_IE2 0x10 /* Interrupt Enable 2 */ -#define I2C_INT_BNBE1 0x08 /* Bus Not Busy Enable 1 */ -#define I2C_INT_TE1 0x04 /* Transmit Enable 1 */ -#define I2C_INT_RE1 0x02 /* Receive Enable 1 */ -#define I2C_INT_IE1 0x01 /* Interrupt Enable 1 */ -#define I2C_POLL_COUNT 0x100000 -#define I2C_ENABLE 0x00000001 -#define I2C_DISABLE 0x00000002 -#define I2C_START 0x00000004 -#define I2C_REPSTART 0x00000008 -#define I2C_STOP 0x00000010 -#define I2C_BITRATE 0x00000020 -#define I2C_SLAVEADR 0x00000040 -#define I2C_STARTADR 0x00000080 -#undef TWOBYTES -typedef struct i2c_settings { - /* Device settings */ - int bit_rate; /* Device bit rate */ - u8 i2c_adr; /* I2C address */ - u8 slv_adr; /* Slave address */ -#ifdef TWOBYTES - u16 str_adr; /* Start address */ -#else - u8 str_adr; /* Start address */ -#endif - int xfer_size; /* Transfer Size */ - - int bI2c_en; /* Enable or Disable */ - int cmdFlag; /* I2c Command Flags */ -} i2cset_t; - -/* -int check_status(PSI2C pi2c, u8 sta_bit, u8 truefalse); -int i2c_enable(PSI2C pi2c, PI2CSET pi2cSet); -int i2c_disable(PSI2C pi2c); -int i2c_start(PSI2C pi2c, PI2CSET pi2cSet); -int i2c_stop(PSI2C pi2c); -int i2c_clear(PSI2C pi2c); -int i2c_readblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data); -int i2c_writeblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data); -int i2c_readbyte(PSI2C pi2c, u8 *readb, int *index); -int i2c_writebyte(PSI2C pi2c, u8 *writeb); -int SetI2cFDR( PSI2C pi2cRegs, int bitrate ); -*/ -#endif /* __ASSEMBLY__ */ - -#endif /* __INCi2ccoreh */ diff -rupN u-boot-all.git/include/mpc8220.h u-boot-all-8220- dramsetup/include/mpc8220.h --- u-boot-all.git/include/mpc8220.h 2007-04-03 19:18:56.000000000 -0500 +++ u-boot-all-8220-dramsetup/include/mpc8220.h 2007-05-10 15:34:50.000000000 -0500 @@ -689,6 +689,27 @@ typedef struct mpc8220_xcpci { #define PCI_CFG1_CLS_SHIFT 0 #define PCI_CFG1_CLS_MASK 0xf +/* + * I2C + */ +#define I2C_POLL_COUNT 0x100000 + +/* Control Register */ +#define I2C_CTL_EN 0x80 /* I2C Enable */ +#define I2C_CTL_IEN 0x40 /* I2C Interrupt Enable */ +#define I2C_CTL_STA 0x20 /* Master/Slave Mode select */ +#define I2C_CTL_TX 0x10 /* Transmit/Receive Mode Select */ +#define I2C_CTL_TXAK 0x08 /* Transmit Acknowledge Enable */ +#define I2C_CTL_RSTA 0x04 /* Repeat Start */ +/* Status Register */ +#define I2C_STA_CF 0x80 /* Data Transfer */ +#define I2C_STA_AAS 0x40 /* Adressed As Slave */ +#define I2C_STA_BB 0x20 /* Bus Busy */ +#define I2C_STA_AL 0x10 /* Arbitration Lost */ +#define I2C_STA_SRW 0x04 /* Slave Read/Write */ +#define I2C_STA_IF 0x02 /* I2C Interrupt */ +#define I2C_STA_RXAK 0x01 /* Receive Acknowledge */ + /* function prototypes */ void loadtask(int basetask, int tasks); u32 dramSetup(void);

1 0

Re: [U-Boot-Users] IXP425 ethernet & NPE microcode
by Martijn de Gouw 10 May '07

10 May '07

Hi > On Thursday 10 May 2007, Øyvind Repvik wrote: > > > And furthermore, it would be very desireable to drop the > current NPE > > > U-Boot ethernet driver implementation based on the > original Intel code > > > with the complex and ugly Intel access library completely, and > > > re-implement the driver based on the new Linux IXP4xx NPE ethernet > > > drivers. There are currently 2 completely new drivers > without the Intel > > > access library which will result in lower memory > footprint and much less > > > and cleaner code. > > > > That would be Christian Hohnstaedt > <chohnstaedt(a)innominate.com>'s driver > > which is (afaik) in mainstream by now, and > > Krzysztof Halasa <khc(a)pm.waw.pl>'s driver, which is newer. There's a > > discussion about these drivers on linux-arm-kernel. > > Yes, but IIRC the one from Christian never made it into > mainstream. And the > new one from Krzysztof seems to get quite good reactions. this driver is in the linux-2.6 tree of denx I do believe. It fetches the npe binaries out of flash. > > > Getting either of those drivers fixed up and pushed to > u-boot would be > > great. > > Yes, both would be way better than the current > implementation. Hopefully one > of those drivers will make in into mainline and this should > be the one to > pick then. > > > Of course, one will still need to put the microcode somewhere else > > due to licencing, but that's a minor matter. We have changed the intel code a little bit, that the npe microcode is read from flash. loading this binaries seperatly from u-boot is not a license violation. Right now, I'm creating a patch wich I will post later this day. Best regards, Martijn de Gouw

2 1

Re: [U-Boot-Users] IXP425 ethernet & NPE microcode
by Martijn de Gouw 10 May '07

10 May '07

Hi > We have changed the intel code a little bit, that the npe > microcode is read > from flash. loading this binaries seperatly from u-boot is not a > license violation. > > Right now, I'm creating a patch wich I will post later this day. pdnb3: trim u-boot size Signed-off-by: Micha Nelissen <micha.nelissen(a)prodrive.nl> --- commit aa380bf9caed231db860d3cbd040d049355c8dad tree 59ded6605683ef41cc6e53e9671826c53b5c908e parent 36b4fda0083606a54029d539ed838eebe26f71e2 author Micha Nelissen <micha.nelissen(a)prodrive.nl> Mon, 16 Apr 2007 11:48:31 +0200 committer Micha Nelissen <mn(a)linuxsrv1.prodrive.nl> Mon, 16 Apr 2007 11:48:31 +0200 cpu/ixp/npe/IxNpeDl.c | 312 ------------------- cpu/ixp/npe/IxNpeDlImageMgr.c | 503 ++----------------------------- cpu/ixp/npe/Makefile | 3 cpu/ixp/npe/include/IxNpeDlImageMgr_p.h | 3 cpu/ixp/npe/include/IxNpeMicrocode.h | 24 - cpu/ixp/npe/npe.c | 4 include/configs/pdnb3.h | 14 + 7 files changed, 48 insertions(+), 815 deletions(-) diff --git a/cpu/ixp/npe/IxNpeDl.c b/cpu/ixp/npe/IxNpeDl.c index ffe355c..4bddb78 100644 --- a/cpu/ixp/npe/IxNpeDl.c +++ b/cpu/ixp/npe/IxNpeDl.c @@ -106,212 +106,7 @@ static BOOL ixNpeDlNpeStarted[IX_NPEDL_N * static function prototypes. */ PRIVATE IX_STATUS -ixNpeDlNpeInitAndStartInternal (UINT32 *imageLibrary, UINT32 imageId); - -/* - * Function definition: ixNpeDlMicrocodeImageLibraryOverride - */ -PUBLIC IX_STATUS -ixNpeDlMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary) -{ - IX_STATUS status = IX_SUCCESS; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlMicrocodeImageLibraryOverride\n"); - - if (clientImageLibrary == NULL) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlMicrocodeImageLibraryOverride - " - "invalid parameter\n"); - } - else - { - status = ixNpeDlImageMgrMicrocodeImageLibraryOverride (clientImageLibrary); - if (status != IX_SUCCESS) - { - status = IX_FAIL; - } - } /* end of if-else(clientImageLibrary) */ - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlMicrocodeImageLibraryOverride : " - "status = %d\n", status); - return status; -} - -/* - * Function definition: ixNpeDlImageDownload - */ -PUBLIC IX_STATUS -ixNpeDlImageDownload (IxNpeDlImageId *imageIdPtr, - BOOL verify) -{ - UINT32 imageSize; - UINT32 *imageCodePtr = NULL; - IX_STATUS status; - IxNpeDlNpeId npeId = imageIdPtr->npeId; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageDownload\n"); - - ixNpeDlStats.attemptedDownloads++; - - /* Check input parameters */ - if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0)) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageDownload - invalid parameter\n"); - } - else - { - /* Ensure initialisation has been completed */ - ixNpeDlNpeMgrInit(); - - /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ - if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != - (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) - || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) - { - if (npeId == IX_NPEDL_NPEID_NPEA) - { - if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == - IX_FEATURE_CTRL_COMPONENT_DISABLED) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" - " not exist\n"); - return IX_SUCCESS; - } - } /* end of if(npeId) */ - else if (npeId == IX_NPEDL_NPEID_NPEB) - { - if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)== - IX_FEATURE_CTRL_COMPONENT_DISABLED) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified" - " does not exist\n"); - return IX_SUCCESS; - } - } /* end of elseif(npeId) */ - else if (npeId == IX_NPEDL_NPEID_NPEC) - { - if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)== - IX_FEATURE_CTRL_COMPONENT_DISABLED) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified" - " does not exist\n"); - return IX_SUCCESS; - } - } /* end of elseif(npeId) */ - } /* end of if(IX_FEATURE_CTRL_SILICON_TYPE_B0) */ /*End of Silicon Type Check*/ - - /* stop and reset the NPE */ - if (IX_SUCCESS != ixNpeDlNpeStopAndReset (npeId)) - { - IX_NPEDL_ERROR_REPORT ("Failed to stop and reset NPE\n"); - return IX_FAIL; - } - - /* Locate image */ - status = ixNpeDlImageMgrImageLocate (imageIdPtr, &imageCodePtr, - &imageSize); - if (IX_SUCCESS == status) - { - /* - * If download was successful, store image Id in list of - * currently loaded images. If a critical error occured - * during download, record that the NPE has an invalid image - */ - status = ixNpeDlNpeMgrImageLoad (npeId, imageCodePtr, - verify); - if (IX_SUCCESS == status) - { - ixNpeDlNpeState[npeId].imageId = *imageIdPtr; - ixNpeDlNpeState[npeId].validImage = TRUE; - ixNpeDlStats.successfulDownloads++; - - status = ixNpeDlNpeExecutionStart (npeId); - } - else if ((status == IX_NPEDL_CRITICAL_NPE_ERR) || - (status == IX_NPEDL_CRITICAL_MICROCODE_ERR)) - { - ixNpeDlNpeState[npeId].imageId = *imageIdPtr; - ixNpeDlNpeState[npeId].validImage = FALSE; - ixNpeDlStats.criticalFailDownloads++; - } - } /* end of if(IX_SUCCESS) */ /* condition: image located successfully in microcode image */ - } /* end of if-else(npeId) */ /* condition: parameter checks ok */ - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageDownload : status = %d\n", status); - return status; -} - -/* - * Function definition: ixNpeDlAvailableImagesCountGet - */ -PUBLIC IX_STATUS -ixNpeDlAvailableImagesCountGet (UINT32 *numImagesPtr) -{ - IX_STATUS status; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlAvailableImagesCountGet\n"); - - /* Check input parameters */ - if (numImagesPtr == NULL) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlAvailableImagesCountGet - " - "invalid parameter\n"); - } - else - { - /* - * Use ImageMgr module to get no. of images listed in Image Library Header. - * If NULL is passed as imageListPtr parameter to following function, - * it will only fill number of images into numImagesPtr - */ - status = ixNpeDlImageMgrImageListExtract (NULL, numImagesPtr); - } /* end of if-else(numImagesPtr) */ - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlAvailableImagesCountGet : " - "status = %d\n", status); - return status; -} - -/* - * Function definition: ixNpeDlAvailableImagesListGet - */ -PUBLIC IX_STATUS -ixNpeDlAvailableImagesListGet (IxNpeDlImageId *imageIdListPtr, - UINT32 *listSizePtr) -{ - IX_STATUS status; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlAvailableImagesListGet\n"); - - /* Check input parameters */ - if ((imageIdListPtr == NULL) || (listSizePtr == NULL)) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlAvailableImagesListGet - " - "invalid parameter\n"); - } - else - { - /* Call ImageMgr to get list of images listed in Image Library Header */ - status = ixNpeDlImageMgrImageListExtract (imageIdListPtr, - listSizePtr); - } /* end of if-else(imageIdListPtr) */ - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlAvailableImagesListGet : status = %d\n", - status); - return status; -} +ixNpeDlNpeInitAndStartInternal (UINT32 imageId); /* * Function definition: ixNpeDlLoadedImageGet @@ -386,80 +181,6 @@ ixNpeDlLoadedImageGet (IxNpeDlNpeId npeI } /* - * Function definition: ixNpeDlLatestImageGet - */ -PUBLIC IX_STATUS -ixNpeDlLatestImageGet ( - IxNpeDlNpeId npeId, - IxNpeDlFunctionalityId functionalityId, - IxNpeDlImageId *imageIdPtr) -{ - IX_STATUS status; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlLatestImageGet\n"); - - /* Check input parameters */ - if ((npeId >= IX_NPEDL_NPEID_MAX) || - (npeId < 0) || - (imageIdPtr == NULL)) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlLatestImageGet - " - "invalid parameter\n"); - } /* end of if(npeId) */ - else - { - - /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ - if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != - (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) - || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) - { - if (npeId == IX_NPEDL_NPEID_NPEA && - (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == - IX_FEATURE_CTRL_COMPONENT_DISABLED)) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" - " not exist\n"); - return IX_SUCCESS; - } /* end of if(npeId) */ - - if (npeId == IX_NPEDL_NPEID_NPEB && - (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) == - IX_FEATURE_CTRL_COMPONENT_DISABLED)) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified does" - " not exist\n"); - return IX_SUCCESS; - } /* end of if(npeId) */ - - if (npeId == IX_NPEDL_NPEID_NPEC && - (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) == - IX_FEATURE_CTRL_COMPONENT_DISABLED)) - { - IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified does" - " not exist\n"); - return IX_SUCCESS; - } /* end of if(npeId) */ - } /* end of if not IXP42x-A0 silicon */ - - imageIdPtr->npeId = npeId; - imageIdPtr->functionalityId = functionalityId; - imageIdPtr->major = IMAGEID_MAJOR_NUMBER_DEFAULT; - imageIdPtr->minor = IMAGEID_MINOR_NUMBER_DEFAULT; - /* Call ImageMgr to get list of images listed in Image Library Header */ - status = ixNpeDlImageMgrLatestImageExtract(imageIdPtr); - } /* end of if-else(npeId) */ - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlLatestImageGet : status = %d\n", - status); - - return status; -} - -/* * Function definition: ixNpeDlNpeStopAndReset */ PUBLIC IX_STATUS @@ -770,8 +491,7 @@ ixNpeDlStatsReset (void) * Function definition: ixNpeDlNpeInitAndStartInternal */ PRIVATE IX_STATUS -ixNpeDlNpeInitAndStartInternal (UINT32 *imageLibrary, - UINT32 imageId) +ixNpeDlNpeInitAndStartInternal (UINT32 imageId) { UINT32 imageSize; UINT32 *imageCodePtr = NULL; @@ -863,8 +583,7 @@ ixNpeDlNpeInitAndStartInternal (UINT32 * } /* Locate image */ - status = ixNpeDlImageMgrImageFind (imageLibrary, imageId, - &imageCodePtr, &imageSize); + status = ixNpeDlImageMgrImageFind (imageId, &imageCodePtr, &imageSize); if (IX_SUCCESS == status) { /* @@ -908,35 +627,12 @@ ixNpeDlNpeInitAndStartInternal (UINT32 * } /* - * Function definition: ixNpeDlCustomImageNpeInitAndStart - */ -PUBLIC IX_STATUS -ixNpeDlCustomImageNpeInitAndStart (UINT32 *imageLibrary, - UINT32 imageId) -{ - IX_STATUS status; - - if (imageLibrary == NULL) - { - status = IX_NPEDL_PARAM_ERR; - IX_NPEDL_ERROR_REPORT ("ixNpeDlCustomImageNpeInitAndStart " - "- invalid parameter\n"); - } - else - { - status = ixNpeDlNpeInitAndStartInternal (imageLibrary, imageId); - } /* end of if-else(imageLibrary) */ - - return status; -} - -/* * Function definition: ixNpeDlNpeInitAndStart */ PUBLIC IX_STATUS ixNpeDlNpeInitAndStart (UINT32 imageId) { - return ixNpeDlNpeInitAndStartInternal (NULL, imageId); + return ixNpeDlNpeInitAndStartInternal (imageId); } /* diff --git a/cpu/ixp/npe/IxNpeDlImageMgr.c b/cpu/ixp/npe/IxNpeDlImageMgr.c index e05c228..2ebc22b 100644 --- a/cpu/ixp/npe/IxNpeDlImageMgr.c +++ b/cpu/ixp/npe/IxNpeDlImageMgr.c @@ -133,369 +133,9 @@ typedef struct */ static IxNpeDlImageMgrStats ixNpeDlImageMgrStats; -/* default image */ -#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE -static UINT32 *IxNpeMicroCodeImageLibrary = NULL; /* Gets set to proper value at runtime */ -#else -static UINT32 *IxNpeMicroCodeImageLibrary = (UINT32 *)IxNpeMicrocode_array; -#endif - - -/* - * static function prototypes. - */ -PRIVATE BOOL -ixNpeDlImageMgrSignatureCheck (UINT32 *microCodeImageLibrary); - -PRIVATE void -ixNpeDlImageMgrImageIdFormat (UINT32 rawImageId, IxNpeDlImageId *imageId); - -PRIVATE BOOL -ixNpeDlImageMgrImageIdCompare (IxNpeDlImageId *imageIdA, - IxNpeDlImageId *imageIdB); - -PRIVATE BOOL -ixNpeDlImageMgrNpeFunctionIdCompare (IxNpeDlImageId *imageIdA, - IxNpeDlImageId *imageIdB); - -PRIVATE IX_STATUS -ixNpeDlImageMgrImageFind_legacy (UINT32 *imageLibrary, - UINT32 imageId, - UINT32 **imagePtr, - UINT32 *imageSize); - -/* - * Function definition: ixNpeDlImageMgrMicrocodeImageLibraryOverride - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -IX_STATUS -ixNpeDlImageMgrMicrocodeImageLibraryOverride ( - UINT32 *clientImageLibrary) -{ - IX_STATUS status = IX_SUCCESS; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageMgrMicrocodeImageLibraryOverride\n"); - - if (ixNpeDlImageMgrSignatureCheck (clientImageLibrary)) - { - IxNpeMicroCodeImageLibrary = clientImageLibrary; - } - else - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrMicrocodeImageLibraryOverride: " - "Client-supplied image has invalid signature\n"); - status = IX_FAIL; - } - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageMgrMicrocodeImageLibraryOverride: status = %d\n", - status); - return status; -} - - -/* - * Function definition: ixNpeDlImageMgrImageListExtract - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -IX_STATUS -ixNpeDlImageMgrImageListExtract ( - IxNpeDlImageId *imageListPtr, - UINT32 *numImages) -{ - UINT32 rawImageId; - IxNpeDlImageId formattedImageId; - IX_STATUS status = IX_SUCCESS; - UINT32 imageCount = 0; - IxNpeDlImageMgrImageLibraryHeader *header; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageMgrImageListExtract\n"); - - header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary; - - if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary)) - { - /* for each image entry in the image header ... */ - while (header->entry[imageCount].eohMarker != - IX_NPEDL_IMAGEMGR_END_OF_HEADER) - { - /* - * if the image list container from calling function has capacity, - * add the image id to the list - */ - if ((imageListPtr != NULL) && (imageCount < *numImages)) - { - rawImageId = header->entry[imageCount].image.id; - ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId); - imageListPtr[imageCount] = formattedImageId; - } - /* imageCount reflects no. of image entries in image library header */ - imageCount++; - } - - /* - * if image list container from calling function was too small to - * contain all image ids in the header, set return status to FAIL - */ - if ((imageListPtr != NULL) && (imageCount > *numImages)) - { - status = IX_FAIL; - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageListExtract: " - "number of Ids found exceeds list capacity\n"); - ixNpeDlImageMgrStats.imageIdListOverflow++; - } - /* return number of image ids found in image library header */ - *numImages = imageCount; - } - else - { - status = IX_FAIL; - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageListExtract: " - "invalid signature in image\n"); - } +static IX_STATUS ixNpeDlImageMgrImageFindAtAddr( + UINT32 *imageLibrary, UINT32 imageId, UINT32 **imagePtr, UINT32 *imageSize); - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageMgrImageListExtract: status = %d\n", - status); - return status; -} - - -/* - * Function definition: ixNpeDlImageMgrImageLocate - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -IX_STATUS -ixNpeDlImageMgrImageLocate ( - IxNpeDlImageId *imageId, - UINT32 **imagePtr, - UINT32 *imageSize) -{ - UINT32 imageOffset; - UINT32 rawImageId; - IxNpeDlImageId formattedImageId; - /* used to index image entries in image library header */ - UINT32 imageCount = 0; - IX_STATUS status = IX_FAIL; - IxNpeDlImageMgrImageLibraryHeader *header; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageMgrImageLocate\n"); - - header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary; - - if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary)) - { - /* for each image entry in the image library header ... */ - while (header->entry[imageCount].eohMarker != - IX_NPEDL_IMAGEMGR_END_OF_HEADER) - { - rawImageId = header->entry[imageCount].image.id; - ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId); - /* if a match for imageId is found in the image library header... */ - if (ixNpeDlImageMgrImageIdCompare (imageId, &formattedImageId)) - { - /* - * get pointer to the image in the image library using offset from - * 1st word in image library - */ - imageOffset = header->entry[imageCount].image.offset; - *imagePtr = &IxNpeMicroCodeImageLibrary[imageOffset]; - /* get the image size */ - *imageSize = header->entry[imageCount].image.size; - status = IX_SUCCESS; - break; - } - imageCount++; - } - if (status != IX_SUCCESS) - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageLocate: " - "imageId not found in image library header\n"); - ixNpeDlImageMgrStats.imageIdNotFound++; - } - } - else - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageLocate: " - "invalid signature in image library\n"); - } - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageMgrImageLocate: status = %d\n", status); - return status; -} - -/* - * Function definition: ixNpeDlImageMgrLatestImageExtract - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -IX_STATUS -ixNpeDlImageMgrLatestImageExtract (IxNpeDlImageId *imageId) -{ - UINT32 imageCount = 0; - UINT32 rawImageId; - IxNpeDlImageId formattedImageId; - IX_STATUS status = IX_FAIL; - IxNpeDlImageMgrImageLibraryHeader *header; - - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageMgrLatestImageExtract\n"); - - header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary; - - if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary)) - { - /* for each image entry in the image library header ... */ - while (header->entry[imageCount].eohMarker != - IX_NPEDL_IMAGEMGR_END_OF_HEADER) - { - rawImageId = header->entry[imageCount].image.id; - ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId); - /* - * if a match for the npe Id and functionality Id of the imageId is - * found in the image library header... - */ - if(ixNpeDlImageMgrNpeFunctionIdCompare(imageId, &formattedImageId)) - { - if(imageId->major <= formattedImageId.major) - { - if(imageId->minor < formattedImageId.minor) - { - imageId->minor = formattedImageId.minor; - } - imageId->major = formattedImageId.major; - } - status = IX_SUCCESS; - } - imageCount++; - } - if (status != IX_SUCCESS) - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrLatestImageExtract: " - "imageId not found in image library header\n"); - ixNpeDlImageMgrStats.imageIdNotFound++; - } - } - else - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrLatestImageGet: " - "invalid signature in image library\n"); - } - - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageMgrLatestImageGet: status = %d\n", status); - return status; -} - -/* - * Function definition: ixNpeDlImageMgrSignatureCheck - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -PRIVATE BOOL -ixNpeDlImageMgrSignatureCheck (UINT32 *microCodeImageLibrary) -{ - IxNpeDlImageMgrImageLibraryHeader *header = - (IxNpeDlImageMgrImageLibraryHeader *) microCodeImageLibrary; - BOOL result = TRUE; - - if (header->signature != IX_NPEDL_IMAGEMGR_SIGNATURE) - { - result = FALSE; - ixNpeDlImageMgrStats.invalidSignature++; - } - - return result; -} - - -/* - * Function definition: ixNpeDlImageMgrImageIdFormat - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -PRIVATE void -ixNpeDlImageMgrImageIdFormat ( - UINT32 rawImageId, - IxNpeDlImageId *imageId) -{ - imageId->npeId = (rawImageId >> - IX_NPEDL_IMAGEID_NPEID_OFFSET) & - IX_NPEDL_NPEIMAGE_FIELD_MASK; - imageId->functionalityId = (rawImageId >> - IX_NPEDL_IMAGEID_FUNCTIONID_OFFSET) & - IX_NPEDL_NPEIMAGE_FIELD_MASK; - imageId->major = (rawImageId >> - IX_NPEDL_IMAGEID_MAJOR_OFFSET) & - IX_NPEDL_NPEIMAGE_FIELD_MASK; - imageId->minor = (rawImageId >> - IX_NPEDL_IMAGEID_MINOR_OFFSET) & - IX_NPEDL_NPEIMAGE_FIELD_MASK; - -} - - -/* - * Function definition: ixNpeDlImageMgrImageIdCompare - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -PRIVATE BOOL -ixNpeDlImageMgrImageIdCompare ( - IxNpeDlImageId *imageIdA, - IxNpeDlImageId *imageIdB) -{ - if ((imageIdA->npeId == imageIdB->npeId) && - (imageIdA->functionalityId == imageIdB->functionalityId) && - (imageIdA->major == imageIdB->major) && - (imageIdA->minor == imageIdB->minor)) - { - return TRUE; - } - else - { - return FALSE; - } -} - -/* - * Function definition: ixNpeDlImageMgrNpeFunctionIdCompare - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE - */ -PRIVATE BOOL -ixNpeDlImageMgrNpeFunctionIdCompare ( - IxNpeDlImageId *imageIdA, - IxNpeDlImageId *imageIdB) -{ - if ((imageIdA->npeId == imageIdB->npeId) && - (imageIdA->functionalityId == imageIdB->functionalityId)) - { - return TRUE; - } - else - { - return FALSE; - } -} - - /* * Function definition: ixNpeDlImageMgrStatsShow */ @@ -528,143 +168,62 @@ ixNpeDlImageMgrStatsReset (void) /* - * Function definition: ixNpeDlImageMgrImageFind_legacy - * - * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT - * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE + * Function definition: ixNpeDlImageMgrImageFind */ -PRIVATE IX_STATUS -ixNpeDlImageMgrImageFind_legacy ( - UINT32 *imageLibrary, +IX_STATUS +ixNpeDlImageMgrImageFind ( UINT32 imageId, UINT32 **imagePtr, UINT32 *imageSize) { - UINT32 imageOffset; - /* used to index image entries in image library header */ - UINT32 imageCount = 0; - IX_STATUS status = IX_FAIL; - IxNpeDlImageMgrImageLibraryHeader *header; - BOOL imageFound = FALSE; - - IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, - "Entering ixNpeDlImageMgrImageFind\n"); - - - /* If user didn't specify a library to use, use the default - * one from IxNpeMicrocode.h - */ - if (imageLibrary == NULL) - { - imageLibrary = IxNpeMicroCodeImageLibrary; - } - - if (ixNpeDlImageMgrSignatureCheck (imageLibrary)) - { - header = (IxNpeDlImageMgrImageLibraryHeader *) imageLibrary; + UINT32 *imageLib1, *imageLib2; + IX_STATUS ret; - /* for each image entry in the image library header ... */ - while ((header->entry[imageCount].eohMarker != - IX_NPEDL_IMAGEMGR_END_OF_HEADER) && !(imageFound)) - { - /* if a match for imageId is found in the image library header... */ - if (imageId == header->entry[imageCount].image.id) - { - /* - * get pointer to the image in the image library using offset from - * 1st word in image library - */ - imageOffset = header->entry[imageCount].image.offset; - *imagePtr = &imageLibrary[imageOffset]; - /* get the image size */ - *imageSize = header->entry[imageCount].image.size; - status = IX_SUCCESS; - imageFound = TRUE; - } - imageCount++; - } - if (status != IX_SUCCESS) - { + switch (imageId) { + case IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL: + case IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS: + imageLib1 = (UINT32*)CONFIG_NPE_B_ADDR1; + imageLib2 = (UINT32*)CONFIG_NPE_B_ADDR2; + break; + case IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL: + case IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS: + imageLib1 = (UINT32*)CONFIG_NPE_C_ADDR1; + imageLib2 = (UINT32*)CONFIG_NPE_C_ADDR2; + break; + default: IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: " "imageId not found in image library header\n"); ixNpeDlImageMgrStats.imageIdNotFound++; - } - } - else - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: " - "invalid signature in image library\n"); + /* reached end of library, image not found */ + return IX_FAIL; } - IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, - "Exiting ixNpeDlImageMgrImageFind: status = %d\n", status); - return status; + ret = ixNpeDlImageMgrImageFindAtAddr(imageLib1, imageId, imagePtr, imageSize); + if (ret != IX_SUCCESS) + ret = ixNpeDlImageMgrImageFindAtAddr(imageLib2, imageId, imagePtr, imageSize); + return ret; } - -/* - * Function definition: ixNpeDlImageMgrImageFind - */ -IX_STATUS -ixNpeDlImageMgrImageFind ( +static IX_STATUS +ixNpeDlImageMgrImageFindAtAddr ( UINT32 *imageLibrary, UINT32 imageId, UINT32 **imagePtr, UINT32 *imageSize) { IxNpeDlImageMgrImageHeader *image; - UINT32 offset = 0; - /* If user didn't specify a library to use, use the default - * one from IxNpeMicrocode.h - */ - if (imageLibrary == NULL) + if (*imageLibrary == NPE_IMAGE_MARKER) { -#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE - if (ixNpeMicrocode_binaryArray == NULL) - { - printk (KERN_ERR "ixp400.o: ERROR, no Microcode found in memory\n"); - return IX_FAIL; - } - else - { - imageLibrary = ixNpeMicrocode_binaryArray; - } -#else - imageLibrary = IxNpeMicroCodeImageLibrary; -#endif /* IX_NPEDL_READ_MICROCODE_FROM_FILE */ - } - - /* For backward's compatibility with previous image format */ - if (ixNpeDlImageMgrSignatureCheck(imageLibrary)) - { - return ixNpeDlImageMgrImageFind_legacy(imageLibrary, - imageId, - imagePtr, - imageSize); - } - - while (*(imageLibrary+offset) == NPE_IMAGE_MARKER) - { - image = (IxNpeDlImageMgrImageHeader *)(imageLibrary+offset); - offset += sizeof(IxNpeDlImageMgrImageHeader)/sizeof(UINT32); + image = (IxNpeDlImageMgrImageHeader *)imageLibrary; + imageLibrary += sizeof(IxNpeDlImageMgrImageHeader)/sizeof(UINT32); if (image->id == imageId) { - *imagePtr = imageLibrary + offset; + *imagePtr = imageLibrary; *imageSize = image->size; return IX_SUCCESS; } - /* 2 consecutive NPE_IMAGE_MARKER's indicates end of library */ - else if (image->id == NPE_IMAGE_MARKER) - { - IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: " - "imageId not found in image library header\n"); - ixNpeDlImageMgrStats.imageIdNotFound++; - /* reached end of library, image not found */ - return IX_FAIL; - } - offset += image->size; } /* If we get here, our image library may be corrupted */ diff --git a/cpu/ixp/npe/Makefile b/cpu/ixp/npe/Makefile index 4de34fd..4ad1184 100644 --- a/cpu/ixp/npe/Makefile +++ b/cpu/ixp/npe/Makefile @@ -53,13 +53,13 @@ COBJS := npe.o \ IxEthDBHashtable.o \ IxEthDBLearning.o \ IxEthDBMem.o \ + IxEthDBVlan.o \ IxEthDBNPEAdaptor.o \ IxEthDBPortUpdate.o \ IxEthDBReports.o \ IxEthDBSearch.o \ IxEthDBSpanningTree.o \ IxEthDBUtil.o \ - IxEthDBVlan.o \ IxEthDBWiFi.o \ IxEthMii.o \ IxQMgrAqmIf.o \ @@ -72,7 +72,6 @@ COBJS := npe.o \ IxNpeDlImageMgr.o \ IxNpeDlNpeMgr.o \ IxNpeDlNpeMgrUtils.o \ - IxNpeMicrocode.o \ IxNpeMh.o \ IxNpeMhConfig.o \ IxNpeMhReceive.o \ diff --git a/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h b/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h index 622f879..a5592c1 100644 --- a/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h +++ b/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h @@ -350,8 +350,7 @@ ixNpeDlImageMgrStatsReset (void); * - IX_FAIL otherwise */ IX_STATUS -ixNpeDlImageMgrImageFind (UINT32 *imageLibrary, - UINT32 imageId, +ixNpeDlImageMgrImageFind (UINT32 imageId, UINT32 **imagePtr, UINT32 *imageSize); diff --git a/cpu/ixp/npe/include/IxNpeMicrocode.h b/cpu/ixp/npe/include/IxNpeMicrocode.h index 893d803..c17f2d2 100644 --- a/cpu/ixp/npe/include/IxNpeMicrocode.h +++ b/cpu/ixp/npe/include/IxNpeMicrocode.h @@ -267,30 +267,6 @@ extern unsigned IxNpeMicrocode_array[]; #endif #endif -/* - * sr: undef all but the bare minimum to reduce flash usage for U-Boot - */ -#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0 -#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT -#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT -#undef IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT -#undef IX_NPEDL_NPEIMAGE_NPEA_DMA -#undef IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT -#undef IX_NPEDL_NPEIMAGE_NPEA_ETH -#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL -#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS -#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV -#undef IX_NPEDL_NPEIMAGE_NPEB_ETH -#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL -/* #undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */ -#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV -#undef IX_NPEDL_NPEIMAGE_NPEB_DMA -#undef IX_NPEDL_NPEIMAGE_NPEC_ETH -#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL -/* #undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */ -#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV -#undef IX_NPEDL_NPEIMAGE_NPEC_DMA - /** * @} defgroup IxNpeMicrocode */ diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c index ab7ca8b..c37ac62 100644 --- a/cpu/ixp/npe/npe.c +++ b/cpu/ixp/npe/npe.c @@ -310,14 +310,14 @@ static int npe_csr_load(void) } if (npe_used[IX_ETH_PORT_1] && npe_exists[IX_ETH_PORT_1] && - ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIRE WALL_VLAN_QOS) + ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIRE WALL) != IX_SUCCESS) { printf("Error downloading firmware to NPE-B!\n"); return 0; } if (npe_used[IX_ETH_PORT_2] && npe_exists[IX_ETH_PORT_2] && - ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIRE WALL_VLAN_QOS) + ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIRE WALL) != IX_SUCCESS) { printf("Error downloading firmware to NPE-C!\n"); return 0; diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index e23f0cb..b99b65f 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -40,6 +40,10 @@ #define CONFIG_DISPLAY_BOARDINFO 1 /* di * Ethernet */ #define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */ +#define CONFIG_NPE_B_ADDR1 0x5003a000 +#define CONFIG_NPE_B_ADDR2 0x50078000 +#define CONFIG_NPE_C_ADDR1 0x5003d000 +#define CONFIG_NPE_C_ADDR2 0x5007c000 #define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 16 /* NPE0 PHY address */ #define CONFIG_HAS_ETH1 @@ -72,14 +76,14 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ +#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & \ + ~(CFG_CMD_LOADB | \ + CFG_CMD_LOADS)) | \ CFG_CMD_DHCP | \ - CFG_CMD_DATE | \ CFG_CMD_NET | \ CFG_CMD_MII | \ CFG_CMD_NAND | \ CFG_CMD_I2C | \ - CFG_CMD_ELF | \ CFG_CMD_PING) /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ @@ -178,7 +182,7 @@ #define PHYS_SDRAM_1_SIZE 0x020000 #define CFG_FLASH_BASE 0x50000000 #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MONITOR_LEN (472 << 10) /* Reserve 472 kB for Monitor */ +#define CFG_MONITOR_LEN (224 << 10) /* U-boot size */ /* * Expansion bus settings @@ -199,7 +203,7 @@ #define CFG_SDRAM_REFRESH_CNT 0x81a #define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ Best regards, Martijn de Gouw

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[U-Boot-Users] [PATCH] Update to stand alone program feature
by Jeff Mann 10 May '07

10 May '07

[PATCH] Update to stand alone program feature This patch contains updates to the stand alone program feature, including: 1. update and document new features in README.standalone 2. add SA= flag to allow for the stand alone program directory to be selected for compiling with u-boot 3. added xf_func_inc() function. See documentation for a description. 4. removal of undesired #ifdef...#endif statements 5. Note: XF_VERSION was not advanced. This will happen in the next patch in this series. This feature does not seem to fall into any category in the list of U-Boot Custodians, so I guess it goes to you, Wolfgang. The patch file is attached. -Jeffrey Mann

4 6

[U-Boot-Users] U-boot & MonteJade start up
by Jonathan Pratt 10 May '07

10 May '07

I'm trying to get u-boot up and running on an Intel MonteJade (IXDPG425) board without much luck. I downloaded version 2.0 of the Npe code and placed it in the appropriate directory and the build worked fine. Getting it up and running on the board has proved more difficulat. I'm using a Macraigor USB wiggler to download to the FLASH. If anyone has done this successfully then I would appreciate some pointers as I'm not sure what I've done thus far is correct. As far as I understand it, the xscale starts up in little endian mode. The application is, however, big-endian. When I program the FLASH it appears to be big-endian, and I don't as yet understand where the transition from little endian occurs. The u-boot code in the current state doesn't go anywhere with no response from the serial port. Is there some pre-bootloader code which does the transition to big-endian? If so, do I need to program this sepeartely? If not, where does the transition to big-endian occur and why does the code I see (in the srec file, for example) appear to start off big-endian? I can imagine ld getting pretty confused trying to link a little-endian snippet to a big-endian application. Thanks Jonathan Pratt ELPRO Technologies Pty Ltd "Wireless Solutions Since 1983" ISO 9001:2000 Accredited ABN 17 010 627 835 9/12 Billabong St, Stafford, QLD, Australia 4053 Telephone: +61 7 3352 4533 Facsimile: +61 7 3352 4577 Web Site: http://www.elprotech.com

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[U-Boot-Users] MPC832xEMDS: ttyS0 output stops mid boot
by Alex Zeffertt 10 May '07

10 May '07

Hi, Sorry about the cross posting, but I'm not sure which list I should send to.... I'm trying to boot an up-to-date kernel on my MPC8323E-MDS-PB board, but I the console output stops early on during the kernel boot. I'm running the latest u-boot (git://www.denx.de/git/u-boot-mpc83xx.git) with its default environment. The kernel is built from Paulus' powerpc.git, after checking out tag 2.6.21-rc5. The dtb is build from arch/powerpc/boot/dts/mpc832x_mds.dts with the latest compiler (git://www.jdl.com/software/dtc.git). Has anyone else been here before...? If so I'd appreciate any help you can offer. TIA, Alex -------------------my ttyS0 output------------------ => => printenv bootcmd=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr bootdelay=6 baudrate=115200 loads_echo=1 ethaddr=00:04:9f:ef:03:01 eth1addr=00:04:9f:ef:03:02 loadaddr=200000 netdev=eth0 consoledev=ttyS0 ramdiskaddr=1000000 ramdiskfile=ramfs.83xx fdtaddr=400000 fdtfile=mpc832xemds.dtb stdin=serial stdout=serial stderr=serial ethact=FSL UEC0 Environment size: 979/8188 bytes => setenv ramdiskfile uRamdisk => setenv fdtfile mpc832x_mds.dtb => setenv bootfile uImage => setenv serverip 10.0.0.107 => setenv ipaddr 10.0.6.65 => run ramboot Using FSL UEC0 device TFTP from server 10.0.0.107; our IP address is 10.0.6.65 Filename 'uRamdisk'. Load address: 0x1000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ########################################################### done Bytes transferred = 3296770 (324e02 hex) Using FSL UEC0 device TFTP from server 10.0.0.107; our IP address is 10.0.6.65 Filename 'uImage'. Load address: 0x200000 Loading: ################################################################# ################################################################# ################################################################# ########################################## done Bytes transferred = 1212615 (1280c7 hex) Using FSL UEC0 device TFTP from server 10.0.0.107; our IP address is 10.0.6.65 Filename 'mpc832x_mds.dtb'. Load address: 0x400000 Loading: ### done Bytes transferred = 12288 (3000 hex) ## Booting image at 00200000 ... Image Name: Linux-2.6.21-rc5 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1212551 Bytes = 1.2 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Loading RAMDisk Image at 01000000 ... Image Name: uboot ext2 ramdisk rootfs Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size: 3296706 Bytes = 3.1 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Booting using flat device tree at 0x400000 Loading Ramdisk to 07c87000, end 07fabdc2 ... OK Using MPC832x MDS machine description Linux version 2.6.21-rc5 (ajz@zambia) (gcc version 3.4.3) #2 Thu May 3 16:42:54 BST 2007 Found initrd at 0xc7c87000:0xc7fabdc2 setup_arch: bootmem mpc832x_sys_setup_arch() Found MPC83xx PCI host bridge at 0x00000000e0008500. Firmware bus number: 0->0 arch: exit Zone PFN ranges: DMA 0 -> 32768 Normal 32768 -> 32768 early_node_map[1] active PFN ranges 0: 0 -> 32768 Built 1 zonelists. Total pages: 32512 Kernel command line: root=/dev/ram rw console=ttyS0,115200 IPIC (128 IRQ sources) at fddf3700 QEIC (64 IRQ sources) at fddf2080 PID hash table entries: 512 (order: 9, 2048 bytes)

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[U-Boot-Users] Unable to boot linux on ARM based board: gunzip hangs
by Pharaoh . 10 May '07

10 May '07

Hi, I am trying to make Linux work on omap 850 based board which has an ARM926EJS. I have u-boot ported and installed on it and minimal linux support for the board is also there. The kernel image is in format expected by u-boot and I have followed all the needed steps like using mkimage etc. While uncompressing the linux image the system hangs, in gunzip function which is defined in inflate.c. No error is returned, it just hangs. I have checked whether the image overwrites itself after uncompression, but it does not since the addresses etc are given appropriately. I am thinking may be the DDR SDRAM might not be initialized properly (like refresh rate etc), but then how come u-boot is running properly? Any pointers? -pharaoh.

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[U-Boot-Users] USB device configuration
by Rodolfo Giometti 09 May '07

09 May '07

Hello, during my PXA27x USB device support developing adventure I notice that usbtty calls the functions: udc_init: PXA27x usbd start udc_setup_ep: setting up endpoint addr 0 udc_enable: enable device a2077f74, status 0 udc_connect: udc_setup_ep: setting up endpoint addr 1 udc_setup_ep: setting up endpoint addr 82 udc_setup_ep: setting up endpoint addr 83 Looking at PXA27x manual I read that I have to setup the endpoints and __then__ enable UDC for normal operations! But looking above I see that u-boot calls before the udc_enable() and then the function udc_setup_ep()... There are something wrong or I haven't understood well how UDC support works? =:-o Thanks, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] [PATCH] tsec: Fix PHY code to match first driver
by Andy Fleming 09 May '07

09 May '07

Jarrold Wen noticed that the generic PHY code always matches under the current implementation. Change it so the first match wins, and *only* unknown PHYs trigger the generic driver Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- A third apology for bad tabs. I'll keep better tabs on in the future, I swear. drivers/tsec.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index 693328d..31a0aba 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -1327,8 +1327,10 @@ struct phy_info *get_phy_info(struct eth_device *dev) /* loop through all the known PHY types, and find one that */ /* matches the ID we read from the PHY. */ for (i = 0; phy_info[i]; i++) { - if (phy_info[i]->id == (phy_ID >> phy_info[i]->shift)) + if (phy_info[i]->id == (phy_ID >> phy_info[i]->shift)) { theInfo = phy_info[i]; + break; + } } if (theInfo == NULL) { -- 1.5.0.2.230.gfbe3d-dirty

1 0

[U-Boot-Users] [PATCH] Fix Marvell 88e1145 PHY init code
by Andy Fleming 09 May '07

09 May '07

Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver where the reset was being done after the errata code instead of before. Signed-off-by: Haiying Wang <haiying.wang(a)freescale.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- This one was sent to me a bit ago, but I lost it. It's going in unless there are objections. And again, sorry for the space/tab thing drivers/tsec.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index b418773..693328d 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -1012,14 +1012,16 @@ static struct phy_info phy_info_M88E1145 = { "Marvell 88E1145", 4, (struct phy_cmd[]){ /* config */ + /* Reset the PHY */ + {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + /* Errata E0, E1 */ {29, 0x001b, NULL}, {30, 0x418f, NULL}, {29, 0x0016, NULL}, {30, 0xa2da, NULL}, - /* Reset and configure the PHY */ - {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + /* Configure the PHY */ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL}, {MIIM_ANAR, MIIM_ANAR_INIT, NULL}, {MIIM_88E1011_PHY_SCR, MIIM_88E1011_PHY_MDI_X_AUTO, -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [PATCH] Add support for CPM device tree configuration to 8560 ADS
by Andy Fleming 09 May '07

09 May '07

* Adds code to modify CPM frequencies * Cleans up the config file to #define TSEC and (for now) #undef FCC * Adds the MII command for all 8560 ADS configurations * Updates config file to provide convenience commands for booting with a device tree Signed-off-by: Vitaly Bordug <vbordug(a)ru.mvista.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- I apologize for the previous version with spaces for tabs. Gmail apparently substitutes things. board/mpc8560ads/mpc8560ads.c | 26 ++++++++++++++++++++++++++ include/configs/MPC8560ADS.h | 32 +++++++++++++++++++++----------- 2 files changed, 47 insertions(+), 11 deletions(-) diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c index d19bad6..41acb97 100644 --- a/board/mpc8560ads/mpc8560ads.c +++ b/board/mpc8560ads/mpc8560ads.c @@ -550,8 +550,34 @@ pci_init_board(void) #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) void +ft_soc_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + ulong data; + + p = ft_get_prop(blob, "/" OF_SOC "/cpm@e0000000/brg-frequency", &len); + + if (p != NULL) + *p = cpu_to_be32(bd->bi_brgfreq); + + p = ft_get_prop(blob, + "/" OF_SOC "/cpm@e0000000/scc@91a00/current-speed", + &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_baudrate); + + p = ft_get_prop(blob, + "/" OF_SOC "/cpm@e0000000/scc@91a20/current-speed", + &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_baudrate); +} + +void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); + ft_soc_setup(blob, bd); } #endif diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 21e6637..f16e39d 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -43,9 +43,7 @@ #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ -#define CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ +#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_DLL /* possible DLL fix needed */ @@ -349,13 +347,16 @@ #endif /* CONFIG_PCI */ -#if defined(CONFIG_TSEC_ENET) +#ifdef CONFIG_TSEC_ENET #ifndef CONFIG_NET_MULTI #define CONFIG_NET_MULTI 1 #endif +#ifndef CONFIG_MII #define CONFIG_MII 1 /* MII PHY management */ +#endif + #define CONFIG_MPC85XX_TSEC1 1 #define CONFIG_MPC85XX_TSEC1_NAME "TSEC0" #define CONFIG_MPC85XX_TSEC2 1 @@ -369,9 +370,10 @@ /* Options are: TSEC[0-1] */ #define CONFIG_ETHPRIME "TSEC0" -#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */ +#endif /* CONFIG_TSEC_ENET */ + +#ifdef CONFIG_ETHER_ON_FCC /* CPM FCC Ethernet */ -#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ #define CONFIG_ETHER_INDEX 2 /* which channel for ether */ @@ -392,7 +394,10 @@ #define FETH3_RST 0x80 #endif /* CONFIG_ETHER_INDEX */ -#define CONFIG_MII /* MII PHY management */ +#ifndef CONFIG_MII +#define CONFIG_MII 1 /* MII PHY management */ +#endif + #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ /* @@ -458,11 +463,13 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PCI \ | CFG_CMD_PING \ + | CFG_CMD_MII \ | CFG_CMD_I2C) #elif defined(CONFIG_TSEC_ENET) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PING \ - | CFG_CMD_I2C) + | CFG_CMD_I2C \ + | CFG_CMD_MII) #elif defined(CONFIG_ETHER_ON_FCC) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_MII \ @@ -554,8 +561,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=400000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" + "ramdiskaddr=600000\0" \ + "ramdiskfile=your.ramdisk.u-boot\0" \ + "fdtaddr=400000\0" \ + "fdtfile=mpc8560ads.dtb\0" #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ @@ -563,7 +572,8 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr" + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [PATCH] Fix Marvell 88e1145 PHY init code
by Andy Fleming 09 May '07

09 May '07

Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver where the reset was being done after the errata code instead of before. Signed-off-by: Haiying Wang <haiying.wang(a)freescale.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- This one was sent to me a bit ago, but I lost it. It's going in unless there are objections. drivers/tsec.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index b418773..693328d 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -1012,14 +1012,16 @@ static struct phy_info phy_info_M88E1145 = { "Marvell 88E1145", 4, (struct phy_cmd[]){ /* config */ + /* Reset the PHY */ + {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + /* Errata E0, E1 */ {29, 0x001b, NULL}, {30, 0x418f, NULL}, {29, 0x0016, NULL}, {30, 0xa2da, NULL}, - /* Reset and configure the PHY */ - {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + /* Configure the PHY */ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL}, {MIIM_ANAR, MIIM_ANAR_INIT, NULL}, {MIIM_88E1011_PHY_SCR, MIIM_88E1011_PHY_MDI_X_AUTO, -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [ERR] U-Boot-Users Digest, Vol 12, Issue 34
by postmaster＠paran.com 09 May '07

09 May '07

Transmit Report: To: kmkh12(a)paran.com, 452 Requested action not taken: insufficient system storage.[9,-1,50][err=File::write Bad file descriptor]

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[U-Boot-Users] [PATCH] Add support for CPM device tree configuration to 8560 ADS
by Andy Fleming 09 May '07

09 May '07

* Adds code to modify CPM frequencies * Cleans up the config file to #define TSEC and (for now) #undef FCC * Adds the MII command for all 8560 ADS configurations * Updates config file to provide convenience commands for booting with a device tree Signed-off-by: Vitaly Bordug <vbordug(a)ru.mvista.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- This makes the 8560 ADS boot for me. It doesn't do anything about large ramdisks, though. I'm still looking into that. board/mpc8560ads/mpc8560ads.c | 26 ++++++++++++++++++++++++++ include/configs/MPC8560ADS.h | 32 +++++++++++++++++++++----------- 2 files changed, 47 insertions(+), 11 deletions(-) diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c index d19bad6..41acb97 100644 --- a/board/mpc8560ads/mpc8560ads.c +++ b/board/mpc8560ads/mpc8560ads.c @@ -550,8 +550,34 @@ pci_init_board(void) #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) void +ft_soc_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + ulong data; + + p = ft_get_prop(blob, "/" OF_SOC "/cpm@e0000000/brg-frequency", &len); + + if (p != NULL) + *p = cpu_to_be32(bd->bi_brgfreq); + + p = ft_get_prop(blob, + "/" OF_SOC "/cpm@e0000000/scc@91a00/current-speed", + &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_baudrate); + + p = ft_get_prop(blob, + "/" OF_SOC "/cpm@e0000000/scc@91a20/current-speed", + &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_baudrate); +} + +void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); + ft_soc_setup(blob, bd); } #endif diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 21e6637..f16e39d 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -43,9 +43,7 @@ #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ -#define CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ +#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_DLL /* possible DLL fix needed */ @@ -349,13 +347,16 @@ #endif /* CONFIG_PCI */ -#if defined(CONFIG_TSEC_ENET) +#ifdef CONFIG_TSEC_ENET #ifndef CONFIG_NET_MULTI #define CONFIG_NET_MULTI 1 #endif +#ifndef CONFIG_MII #define CONFIG_MII 1 /* MII PHY management */ +#endif + #define CONFIG_MPC85XX_TSEC1 1 #define CONFIG_MPC85XX_TSEC1_NAME "TSEC0" #define CONFIG_MPC85XX_TSEC2 1 @@ -369,9 +370,10 @@ /* Options are: TSEC[0-1] */ #define CONFIG_ETHPRIME "TSEC0" -#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */ +#endif /* CONFIG_TSEC_ENET */ + +#ifdef CONFIG_ETHER_ON_FCC /* CPM FCC Ethernet */ -#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ #define CONFIG_ETHER_INDEX 2 /* which channel for ether */ @@ -392,7 +394,10 @@ #define FETH3_RST 0x80 #endif /* CONFIG_ETHER_INDEX */ -#define CONFIG_MII /* MII PHY management */ +#ifndef CONFIG_MII +#define CONFIG_MII 1 /* MII PHY management */ +#endif + #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ /* @@ -458,11 +463,13 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PCI \ | CFG_CMD_PING \ + | CFG_CMD_MII \ | CFG_CMD_I2C) #elif defined(CONFIG_TSEC_ENET) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PING \ - | CFG_CMD_I2C) + | CFG_CMD_I2C \ + | CFG_CMD_MII) #elif defined(CONFIG_ETHER_ON_FCC) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_MII \ @@ -554,8 +561,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=400000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" + "ramdiskaddr=600000\0" \ + "ramdiskfile=your.ramdisk.u-boot\0" \ + "fdtaddr=400000\0" \ + "fdtfile=mpc8560ads.dtb\0" #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ @@ -563,7 +572,8 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr" + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] [PATCH] 8641hpcn: Fix Makefile after moving pixis to board/freescale.
by Jon Loeliger 09 May '07

09 May '07

From: Ed Swarthout <Ed.Swarthout(a)freescale.com> The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- Hey jdl, Please pick this up for the 86xx custodian tree. jdl board/mpc8641hpcn/Makefile | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/board/mpc8641hpcn/Makefile b/board/mpc8641hpcn/Makefile index 9625211..df56b31 100644 --- a/board/mpc8641hpcn/Makefile +++ b/board/mpc8641hpcn/Makefile @@ -23,6 +23,10 @@ include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../freescale/common) +endif + LIB = $(obj)lib$(BOARD).a COBJS := $(BOARD).o sys_eeprom.o \ -- 1.5.0.3

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[U-Boot-Users] [PATCH] 8544ds: Fix Makefile after moving pixis to board/freescale.
by Jon Loeliger 09 May '07

09 May '07

From: Ed Swarthout <Ed.Swarthout(a)freescale.com> The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- Andy, Please pick this up for the 85xx custodian tree. jdl board/freescale/mpc8544ds/Makefile | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/freescale/mpc8544ds/Makefile b/board/freescale/mpc8544ds/Makefile index bec2168..308f707 100644 --- a/board/freescale/mpc8544ds/Makefile +++ b/board/freescale/mpc8544ds/Makefile @@ -24,9 +24,9 @@ include $(TOPDIR)/config.mk -# ifneq ($(OBJTREE),$(SRCTREE)) -# $(shell mkdir -p $(obj)./common) -# endif +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif LIB = $(obj)lib$(BOARD).a -- 1.5.0.3

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[U-Boot-Users] POST
by Maximus 09 May '07

09 May '07

Hi, My hardware has an sd/mmc card. I need to write a few tests to check if the card is connected and working before loading linux. any ideas how one should go abt it?. are there any basic tests for mmc card?. any pointers?. Regards, Jo

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Re: [U-Boot-Users] PATCH add SMN42 board from Siemens
by Peter Pearse 09 May '07

09 May '07

Dear list (This is a repeat mail with the patch tarred and bzipped to meet the list limit) Anyone (other than Gary) who can test this patch on a Siemens SMN42 or lpc2292sodimm board please let me know the results. Perhaps someone would like to volunteer as maintainer for either or both....... Regards Peter Pearse

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Re: [U-Boot-Users] Flash Erase/Write error in uboot
by Shiju Mathew 08 May '07

08 May '07

On Sat, 2007-05-05 at 08:48 -0500, Andrew Dyer wrote: > On 5/4/07, Shiju Mathew <mshiju(a)gmail.com> wrote: > > I was debugging the problem further. We have two other bootloaders running > > on this board - redboot and Eboot. Both does not have this problem. Only on > > Uboot I am experiencing this problem. On debugging what I could find is that > > when I erase a sector, the function flash_is_busy() returns immidiatly with > > success(not busy). Usually it should loop for a while in this function > > before returning that the flash is not busy. Before writing to the erased > > sector, the "md" command displayed 0xffffffff for the erased sector. But > > when I tried to write data to the erased location using cp.b, the function > > flash_write_cfiword() returns with error "flash is not erased" since it > > failed to find 0xffffffff in the erased locations(Check if Flash is > > (sufficiently) erased). So why does "md" displays 0xffffffff for erased > > locations and flash routine says it is not 0xffffffff ? Could someone > > I suspect the code is reading the status word instead of the array > data. You have to be careful with handling the array, as there is no > separate status port, so the status data will show up as read data if > you aren't careful. > > One thing you might check is to make sure the flash 'timeout' variable > isn't getting set to zero. I found a problem with this a long time > ago - it had to do with how the CFI timeout data (reported in usec) > was being converted to a value for timeout (in msec). If timeout was > zero, the status read stuff would time out before reding the data the > second time through. I think was fixed, but it's worth checking. > Thanks for all your comments. I could get a few sector erase/write success if I reduce the system clock to 398 MHz and bus speed to 66 MHz and also make the below changes for erase status check. Previouly it was running at 532 MHz/133 MHz (CPU/bus).Now I could update uboot without any problem. But if I try to erase/write large no: of sectors, says 100 sectors, it fails with the same error as before. So I think the problem is realated to timming. #define TIMEOUT 10000000 timeout = TIMEOUT; while (1) { if (flash_isset (info, sect, 0, 0x08)) { debug("Operation complete\n"); break; } if (!timeout--) { printf("Operation Timed Out!!n"); break; } } timeout = TIMEOUT; while (1) { if (flash_isset (info, sect, 0, FLASH_STATUS_DONE)) { debug("Flash erase done\n"); break; } if (!timeout--) { printf("Erase Timed Out!!\n"); break; } } > Check how CS configuration etc. is correctly configured. If it is > working with the extension board not installed but not obviously you > have something wrong. It could be that your CS1 configuration is > incorrect. Possibilities are endless. But I do not see this as a > flash > driver issue. If I disconnected the extension board, I don't have any issues. I could also run the system at 532/133 MHz without any flash write issues. The problem happens when the load increases on the bus. I made sure that the CS are configured right.I disabled CS1( where extension board is connected) without any success. > Wow, 3 bootloaders for one board! What luxury. :) > We got eboot and redboot along with the board. But we want to move to uboot to support all the OS runnning on the board because of its feature rich and has good support from the community. Thanks, Shiju

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Re: [U-Boot-Users] tftp alignment exception
by Dongying_Xu＠us.alphanetworks.com 08 May '07

08 May '07

Hi Does anyone experienced TFTP alignment problem? I am using MPC8347 with 64bits DDR2 memory, when I tftp files, it will throw alignment exception. It happens more frequently on big size file. Anyone have any suggestions? Thanks Best Regards dongy

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