May 2007 - U-Boot

Re: [U-Boot-Users] PATCH add SMN42 board from Siemens
by Gary Jennejohn 08 May '07

08 May '07

Hi Peter, > Please try the attached gzipped patch (against commit > abca901869c3760b6c5fecb825db6c1d91a78a93 of the U-Boot git head) > on your board. > If you can confirm it works I shall push it to u-boot-arm and ask Wolfgang > to merge it. > Wilco as soon as I find the time. Thanks for looking at it. > Do you have an lpc2292 sodimm board you can test as well? > No, I gave it back to Wolfgang. But I did test my patch while I still had the board here. -- Gary Jennejohn / garyjATjennejohnDOTorg gjATfreebsdDOTorg garyjATdenxDOTde ===================================================================== DENX Software Engineering GmbH, HRB 165235 Munich, CEO: Wolfgang Denk Office: Kirchenstr. 5, D-82194 Groebenzell, Germany =====================================================================

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[U-Boot-Users] PXA27x USB device
by Rodolfo Giometti 08 May '07

08 May '07

Hello, I'm just studing the possibility of implementing the USB device support for my custom PXA270 based board in order to get a serial console through the USB port. I'm looking at drivers/usbdcore_mpc8xx.c for an implementation example but I don't understand why such support has been put there instead of cpu/mpc8xx directory. Can someone explain to me why? Should I put my PXA27x support also there? Thanks, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] booting Linux using "console=ttyS0, 230400", but actual baud rate is 115200.
by Yong Wang 08 May '07

08 May '07

I have to set boot parameters "bootargs=root=/dev/ram console=ttyS0,230400", if i want to get output whose baud rate is 115200 when booting Linux. U-Boot 1.1.2; linux-2.4.21-crus-1-4-3; edb9315; Can anybody give me a bit advice?

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Re: [U-Boot-Users] AT45 spl
by Peter Pearse 08 May '07

08 May '07

> -----Original Message----- > From: Ulf Samuelsson [mailto:ulf@atmel.com] > Sent: 08 May 2007 12:42 > To: Peter Pearse > Subject: AT45 spl > > > Any news on my "AT45 SpIit" > patch? > Best Regards, > Ulf Samuelsson Fourth on my list -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

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Re: [U-Boot-Users] PATCH add SMN42 board from Siemens
by Peter Pearse 08 May '07

08 May '07

> -----Original Message----- > From: Gary Jennejohn [mailto:garyj@jennejohn.org] > Sent: 08 May 2007 11:32 > To: Peter Pearse > Subject: Re: [U-Boot-Users] PATCH add SMN42 board from Siemens > > Hi Peter, > > "Peter Pearse" writes: > > Got to your patch (at last ;-) ) > > > > Can you point me at a data sheet for the board? > > > > Which board? The one from EmbeddedArtists or from Siemens? Embedded Artists was the bit I needed to find any mention of the board.... I'm mainly trying to check whether the core concerned is a 720 or a 7TDMI. Peter

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[U-Boot-Users] LAST attempt - TI DaVinci TMS320DM644x support, part 1
by ksi＠koi8.net 08 May '07

08 May '07

Hello, Here is my last attempt to somehow get this included in the main tree. Previous attempt was ignored, nobody told if something was wrong with this, TI guys just said some BS of another silicon revision and they were going to do something... I'm not for a blood and don't want to start a rant but can somebody tell what is wrong with this? Or despite it being GPL I'm not good enough for such a contribution and U-Boot custodians have some kind of particular agreement with TI to protect their territory? Even despite all the BS about new silicon revisions and some workarounds no longer necessary, i.e. ALL the older boards, including $5K DV-EVM with older TM_X_320DM6446 are not supposed to work with TI's long promised shiny new version? Please let me know why this is not taken and silently ignored. --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot-Users] error with patches and u-boot build
by Magda Abdelbasit 08 May '07

08 May '07

Hello everyone, I am building u-boot for the KB9202B board. I got the patches available from: http://sourceforge.net/tracker/index.php?func=detail&aid=1570316&group_id=6… http://sourceforge.net/tracker/index.php?func=detail&aid=1576917&group_id=6… and applied them to u-boot. The kb9202_patch was fine, but the nand patch gave the following message: patching file board/kb9202/Makefile Hunk #1 FAILED at 28. 1 out of 1 hunk FAILED -- saving rejects to file board/kb9202/Makefile.rej patching file board/kb9202/nand.c patching file include/configs/kb9202.h The makefile.rej file contains: *************** *** 28,34 **** LIB = lib$(BOARD).a - OBJS := kb9202.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS) --- 28,34 ---- LIB = lib$(BOARD).a + OBJS := kb9202.o nand.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) $(SOBJS) If I continue and build the u-boot I get the following error : drivers/nand/libnand.a(nand.o): In function `nand_init_chip': /home/magda/u-boot-1.1.6/drivers/nand/nand.c:50: undefined reference to `board_nand_init' make: *** [u-boot] Error 1 I am new to Linux and I cannot figure out the meaning of the errors. I would greatly appreciate your help. Thanks in anticipation, Magda _________________________________________________________________ FREE pop-up blocking with the new MSN Toolbar - get it now! http://toolbar.msn.click-url.com/go/onm00200415ave/direct/01/

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[U-Boot-Users] LAST attempt - TI DaVinci TMS320DM644x support, signed-off
by ksi＠koi8.net 08 May '07

08 May '07

Here is the signen-off line, just in case somebody cares... Signed-off-by: Sergey Kubushyn <ksi(a)koi8.net> --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot-Users] LAST attempt - TI DaVinci TMS320DM644x support, part 1
by ksi＠koi8.net 08 May '07

08 May '07

This is part 3 of DaVinci support. Made against today's git tree. This is just mach-types.h patch with the latest mach-types source. Probably long overdue... --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot-Users] LAST attempt - TI DaVinci TMS320DM644x support, part 2
by ksi＠koi8.net 08 May '07

08 May '07

This is part 2 of DaVinci support... --- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************

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[U-Boot-Users] He said Artie looked like a bum when he saw him over the weekend though.
by Singleton Samson 08 May '07

08 May '07

Everything you're looking at right now and put your focus here. Major News will be Released. Digital Color Imaging Symbol: DSDI.PK Price: $0.055 Risk Factor: Low Press Release: DSI Direct Sales, Inc. (DSDI.PK) Announces Wholly Owned Subsidiary, Digital Color Imaging, Inc. Invests to Build Cutting Edge 1:1 Marketing Communication Campaign Capability Get on DSDI First Thing on Tuesday, it's going to expload! Sal said he was trying to get to her but they kept heckling him. 7:05am Howard asked if anyone had seen 60 Minutes last night. 10:25am Howard Finally Done With American Idol! Scott just wouldn't say that it was reduced. Howard gave that a ''wow! 8:40am Robin's News And More. He told Scott he could have come to the dinner and gone to dinner with his son at some other time. 6:15am Howard read an article about the Howard TV van that's going to be parked in Times Square this week. Gary asked Sal to say something about Beth without mentioning Howard. X came about and how they didn't break it all off immediately. Howard had a clip from yesterday's Wrap Up Show where Sal talked about something that went on at the engagement party last week. Fred found the song and started to play it while Howard was goofing on Sal. 6:20am Howard wasn't sure if he should play more of Artie's clips or not. He told Scott he could have come to the dinner and gone to dinner with his son at some other time. Howard told Sal he really needs to see someone because he's really ''off'' and he really needs help. 9:25am Howard 100 News And Wrap Up Show Previews. 7:00am Howard Talks To His Parents About Masturbation. They did a report about that on 60 Minutes last night so they went over that. He also said that she was very into meeting the guys from the show and she was genuinely happy to be there with him. Robin said that's like her with that movie ''Blood Diamond. Howard said he got off the line when she called in and then she stayed on the line for a long time herself. They go to Philly on Thursday and Boston on Friday and possibly Albany on Sunday. Howard told the two of them to go back to their office and do some work. He played a clip from the movie where Luca is reading his speech from a piece of paper and stumbling his way through the speech. Howard had to cut it off and talk about what the speech was about since the audio quality was so bad.

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[U-Boot-Users] GIT merge
by Michal Simek 08 May '07

08 May '07

Hi custodians, I look at http://www.denx.de/wiki/UBoot/CustodianGitTrees and I need made merge with u-boot mainline. I hit againts conflict. [microblaze@monstr tmp]$ git clone git://www.denx.de/git/u-boot-microblaze.git Initialized empty Git repository in /tmp/u-boot-microblaze/.git/ remote: Generating pack... remote: Done counting 33899 objects. remote: Deltifying 33899 objects. remote: 100% (33899/33899) done Indexing 33899 objects. remote: Total 33899 (delta 26150), reused 33319 (delta 25618) 100% (33899/33899) done Resolving 26150 deltas. 100% (26150/26150) done Checking files out... 100% (4605/4605) done [microblaze@monstr tmp]$ cd u-boot-microblaze/ [microblaze@monstr u-boot-microblaze]$ git checkout master Switched to branch "master" [microblaze@monstr u-boot-microblaze]$ git checkout -b merge Switched to a new branch "merge" [microblaze@monstr u-boot-microblaze]$ git pull git://www.denx.de/git/u-boot.git remote: Generating pack... remote: Done counting 2881 objects. remote: Result has 2435 objects. remote: Deltifying 2435 objects. remote: 100% (2435/2435) done Indexing 2435 objects. remote: Total 2435 (delta 1950), reused 1971 (delta 1512) 100% (2435/2435) done Resolving 1950 deltas. 100% (1950/1950) done 264 objects were added to complete this thin pack. 100% (5075/5075) done Auto-merged README Removed board/mpc8641hpcn/pixis.c Removed board/stamp/Makefile Auto-merged common/Makefile Removed cpu/at32ap/at32ap7000/devices.c Removed cpu/at32ap/device.c Removed cpu/bf533/cplbhdlr.S Removed cpu/bf533/cplbmgr.S Auto-merged cpu/microblaze/start.S Removed include/asm-avr32/arch-at32ap7000/platform.h Removed include/asm-blackfin/cplbtab.h Removed include/asm-blackfin/cpu/cdefBF53x.h Removed include/asm-blackfin/page.h Removed include/configs/ezkit533.h Auto-merged include/configs/ml401.h Removed include/configs/stamp.h Auto-merged include/configs/xupv2p.h Auto-merged include/linux/stat.h CONFLICT (content): Merge conflict in include/linux/stat.h Automatic merge failed; fix conflicts and then commit the result. I had problem with stat.h file. I resolve merge conflict (with vi) and then I tryied start pull second time but without success. On website is written "Before you request a pull, make sure there are no merge conflicts with the mainline". OK I change this file in microblaze repository and automatic merge work fine. But I have to add change stat.h to microblaze repository. Does command exist for finding merge conflict? And second thing after automatic merge is added all patches from u-boot mainline. Is it right way? Do you require add only one line with merge www.denx.de/git/u-boot.git or the all patches? (What is the best command?) Best regards Michal Simek

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[U-Boot-Users] [PATCH 1/8] [SH] SuperH support
by Nobuhiro Iwamatsu 07 May '07

07 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/Makefile b/Makefile index ceee2c7..1735e9c 100644 --- a/Makefile +++ b/Makefile @@ -151,6 +151,9 @@ endif ifeq ($(ARCH),avr32) CROSS_COMPILE = avr32-linux- endif +ifeq ($(ARCH),sh) +CROSS_COMPILE = sh4-linux- +endif endif endif diff --git a/CREDITS b/CREDITS index 7af1b80..e94372d 100644 --- a/CREDITS +++ b/CREDITS @@ -479,3 +479,8 @@ N: Michal Simek E: monstr(a)monstr.eu D: Support for Microblaze, ML401, XUPV2P board W: www.monstr.eu + +N: Nobuhiro Iwamatsu +E: iwamatsu(a)nigauri.org +D: Support for SuperH, MS7750SE01 board +W: www.nigauri.org diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index a6499e8..8af0589 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -267,6 +267,8 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (hdr->ih_arch != IH_CPU_NIOS2) #elif defined(__PPC__) if (hdr->ih_arch != IH_CPU_PPC) +#elif defined(__sh__) + if (hdr->ih_arch != IH_CPU_SH) #else # error Unknown CPU type #endif diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile new file mode 100644 index 0000000..b24a280 --- /dev/null +++ b/cpu/sh4/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(CPU).a + +START = start.o +OBJS = cpu.o interrupts.o watchdog.o time.o + +all: .depend $(START) $(LIB) + +$(LIB): $(OBJS) + $(AR) crv $@ $(OBJS) + +######################################################################### + +.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### diff --git a/cpu/sh4/config.mk b/cpu/sh4/config.mk new file mode 100644 index 0000000..2dc7b91 --- /dev/null +++ b/cpu/sh4/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +PLATFORM_CPPFLAGS += -m4-nofpu +PLATFORM_RELFLAGS += -ffixed-r13 diff --git a/cpu/sh4/cpu.c b/cpu/sh4/cpu.c new file mode 100644 index 0000000..70df45e --- /dev/null +++ b/cpu/sh4/cpu.c @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> + +int checkcpu(void) +{ + puts("CPU: SH4\n"); + return 0; +} + +int cpu_init (void) +{ + return 0; +} + +int cleanup_before_linux (void) +{ + disable_interrupts(); + return 0; +} + +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + disable_interrupts(); + reset_cpu (0); + return 0; +} + +void flush_cache (unsigned long addr, unsigned long size){} + +void icache_enable (void) +{ + +} + +void icache_disable (void) +{ + +} + + +int icache_status (void) +{ + return 0; +}

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[U-Boot-Users] [PATCH 1/2][SH] Hitachi MS7750SE Support
by Nobuhiro Iwamatsu 07 May '07

07 May '07

Hi , all. I had MS7750SE[0] that was one of the reference boards of SH correspond to u-boot. Now , 0 . Serial 1 . SDRAM 2 . Flash working. As for this board, NIC that is called STNIC is installed. However, This has not been ported for u-boot yet. I plan to support this NIC in the future. [0] : http://www.hitachi-ul.co.jp/e/SH-SE/index.html -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/Makefile b/Makefile index 1a9b3d2..6001d1d 100644 --- a/Makefile +++ b/Makefile @@ -2408,6 +2408,18 @@ atstk1002_config : unconfig ######################################################################### ######################################################################### +######################################################################### +## sh4 (Renesas SuperH) +######################################################################### +ms7750se_config: unconfig + @ >include/config.h + @echo "#define CONFIG_MS7750SE 1" >> include/config.h + @./mkconfig -a $(@:_config=) sh sh4 ms7750se + +######################################################################### +######################################################################### +######################################################################### + clean: find $(OBJTREE) -type f \ \( -name 'core' -o -name '*.bak' -o -name '*~' \ diff --git a/board/ms7750se/Makefile b/board/ms7750se/Makefile new file mode 100644 index 0000000..f81d56c --- /dev/null +++ b/board/ms7750se/Makefile @@ -0,0 +1,43 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := ms7750se.o +SOBJS := lowlevel_init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +################################################################# + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +################################################################# diff --git a/board/ms7750se/config.mk b/board/ms7750se/config.mk new file mode 100644 index 0000000..1eed580 --- /dev/null +++ b/board/ms7750se/config.mk @@ -0,0 +1,23 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# +TEXT_BASE = 0x8FFC0000 diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S new file mode 100644 index 0000000..056c691 --- /dev/null +++ b/board/ms7750se/lowlevel_init.S @@ -0,0 +1,169 @@ +/* + modified from SH-IPL+g + Renesaso SuperH Solution Enginge MS775x BSC setting + Coyright (c) 2007 Nobuhiro Iwamatsu +*/ + +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + +#ifdef CONFIG_CPU_SUBTYPE_SH7751 +#define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */ +#define WCR1_D_VALUE 0x02770771 /* DMA:0 A6:2 A3:0 A0:1 Others:15 */ +#ifdef CONFIG_MRSHPC +#define WCR2_D_VALUE 0xFFFE4FE7 /* A6:15 A6B:7 A5:15 A5B:7 A4:15 + A3:2 A2:15 A1:15 A0:6 A0B:7 */ +#else /* CONFIG_MRSHPC*/ +#define WCR2_D_VALUE 0x7FFE4FE7 /* A6:3 A6B:7 A5:15 A5B:7 A4:15 + A3:2 A2:15 A1:15 A0:6 A0B:7 */ +#endif /* CONFIG_MRSHPC */ +#define WCR3_D_VALUE 0x01777771 /* A6: 0-1 A5: 1-3 A4: 1-3 A3: 1-3 + A2: 1-3 A1: 1-3 A0: 0-1 */ +#define LED_ADDRESS 0xBA000000 /* Address of LED register */ +#define RTCOR_D_VALUE 0xA50D /* Write code A5, data 0D (~15us?) */ +#define SDMR3_ADDRESS 0xFF940088 /* SDMR3 address on 32-bit bus */ +#define MCR_D1_VALUE 0x100901B4 /* SDRAM 32-bit, CAS/RAS Refresh, ... */ +#define MCR_D2_VALUE 0x500901B4 /* Same w/MRSET now 1 (mode reg cmd) */ +#define SWITCH_ADDR 0xB9000000 /* Address of DIP switches */ +#else /* CONFIG_CPU_SUBTYPE_SH7751 */ +#define BCR2_D_VALUE 0x2E3C /* Area 1-6 width: 32/32/64/16/32/16 */ +#define WCR1_D_VALUE 0x02720777 /* DMA:0 A6:2 A4:2 A3:0 Others:15 */ +#define WCR2_D_VALUE 0xFFFE4FFF /* A6:15 A6B:7 A5:15 A5B:7 A4:15 + A3:2 A2:15 A1:15 A0:15 A0B:7 */ +#define WCR3_D_VALUE 0x01717771 /* A6: 0-1 A5: 1-3 A4: 0-1 A3: 1-3 + A2: 1-3 A1: 1-3 A0: 0-1 */ +#define LED_ADDRESS 0xB0C00000 /* Address of LED register */ +#define RTCOR_D_VALUE 0xA510 /* Write code A5, data 10 (~15us?) */ +#define SDMR3_ADDRESS 0xFF940110 /* SDMR3 address on 64-bit bus */ +#define MCR_D1_VALUE 0x8801001C /* SDRAM 64-bit, CAS/RAS Refresh, ... */ +#define MCR_D2_VALUE 0xC801001C /* Same w/MRSET now 1 (mode reg cmd) */ +#define SWITCH_ADDR 0xb0800000 /* Address of DIP switches */ +#endif /* CONFIG_CPU_SUBTYPE_SH7751 */ + + .global lowlevel_init + .text + .align 2 + +lowlevel_init: + + mov.l L_CCR, r1 ! CCR Address + mov.l L_CCR_DISABLE, r0 ! CCR Data + mov.l r0, @r1 + +init_bsc: + mov.l FRQCR_A,r1 /* FRQCR Address */ + mov.l FRQCR_D,r0 /* FRQCR Data */ + mov.w r0,@r1 + + mov.l BCR1_A,r1 /* BCR1 Address */ + mov.l BCR1_D,r0 /* BCR1 Data */ + mov.l r0,@r1 + + mov.l BCR2_A,r1 /* BCR2 Address */ + mov.l BCR2_D,r0 /* BCR2 Data */ + mov.w r0,@r1 + + mov.l WCR1_A,r1 /* WCR1 Address */ + mov.l WCR1_D,r0 /* WCR1 Data */ + mov.l r0,@r1 + + mov.l WCR2_A,r1 /* WCR2 Address */ + mov.l WCR2_D,r0 /* WCR2 Data */ + mov.l r0,@r1 + + mov.l WCR3_A,r1 /* WCR3 Address */ + mov.l WCR3_D,r0 /* WCR3 Data */ + mov.l r0,@r1 + + mov.l LED_A,r1 /* LED Address */ + mov #0xff,r0 /* LED ALL 'on' */ + shll8 r0 + mov.w r0,@r1 + + mov.l MCR_A,r1 /* MCR Address */ + mov.l MCR_D1,r0 /* MCR Data1 */ + mov.l r0,@r1 + + mov.l SDMR3_A,r1 /* Set SDRAM mode */ + mov #0,r0 + mov.b r0,@r1 + + ! Do you need PCMCIA setting? + ! If so, please add the lines here... + + mov.l RTCNT_A,r1 /* RTCNT Address */ + mov.l RTCNT_D,r0 /* RTCNT Data */ + mov.w r0,@r1 + + mov.l RTCOR_A,r1 /* RTCOR Address */ + mov.l RTCOR_D,r0 /* RTCOR Data */ + mov.w r0,@r1 + + mov.l RTCSR_A,r1 /* RTCSR Address */ + mov.l RTCSR_D,r0 /* RTCSR Data */ + mov.w r0,@r1 + + mov.l RFCR_A,r1 /* RFCR Address */ + mov.l RFCR_D,r0 /* RFCR Data */ + mov.w r0,@r1 /* Clear reflesh counter */ + /* Wait DRAM refresh 30 times */ + mov #30,r3 +1: + mov.w @r1,r0 + extu.w r0,r2 + cmp/hi r3,r2 + bf 1b + + mov.l MCR_A,r1 /* MCR Address */ + mov.l MCR_D2,r0 /* MCR Data2 */ + mov.l r0,@r1 + + mov.l SDMR3_A,r1 /* Set SDRAM mode */ + mov #0,r0 + mov.b r0,@r1 + + rts + nop + + .align 2 + +L_CCR: .long CCR +L_CCR_DISABLE: .long 0x0808 +FRQCR_A: .long FRQCR +FRQCR_D: +#ifdef CONFIG_CPU_SUBTYPE_SH_R + .long 0x00000e1a /* 12:3:3 */ +#else +#ifdef CONFIG_GOOD_SESH4 + .long 0x00000e13 /* 6:2:1 */ +#else + .long 0x00000e23 /* 6:1:1 */ +#endif +#endif /* CONFIG_CPU_SUBTYPE_SH_R */ + +BCR1_A: .long BCR1 +BCR1_D: .long 0x00000008 /* Area 3 SDRAM */ +BCR2_A: .long BCR2 +BCR2_D: .long BCR2_D_VALUE /* Bus width settings */ +WCR1_A: .long WCR1 +WCR1_D: .long WCR1_D_VALUE /* Inter-area or turnaround wait states */ +WCR2_A: .long WCR2 +WCR2_D: .long WCR2_D_VALUE /* Per-area access and burst wait states */ +WCR3_A: .long WCR3 +WCR3_D: .long WCR3_D_VALUE /* Address setup and data hold cycles */ +LED_A: .long LED_ADDRESS /* LED Address */ +RTCSR_A: .long RTCSR +RTCSR_D: .long 0xA518 /* RTCSR Write Code A5h Data 18h */ +RTCNT_A: .long RTCNT +RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */ +RTCOR_A: .long RTCOR +RTCOR_D: .long RTCOR_D_VALUE /* Set refresh time (about 15us) */ +SDMR3_A: .long SDMR3_ADDRESS +MCR_A: .long MCR +MCR_D1: .long MCR_D1_VALUE +MCR_D2: .long MCR_D2_VALUE +RFCR_A: .long RFCR +RFCR_D: .long 0xA400 /* RFCR Write Code A4h Data 00h */ +

2 2

[U-Boot-Users] Duplicate file names
by Jeff Mann 07 May '07

07 May '07

U-boot users: There are two files in the u-boot reposatory that exist in duplicate with the difference being the case of some letters in the filename. These two files README.SBC8560, and sbc8560.h. This causes problems with operating systems that are case insensative such as windows. I realize that many people on this list do not like windows, but for the maxiumum campatability for reading and editing the source code, this should be resolved by simply renaming one of the duplicate files or deleting the old file. Comments? -Jeffrey Mann

3 2

[U-Boot-Users] [PATCH] Change to sequoia clock speed
by Jeff Mann 07 May '07

07 May '07

U-Boot users and Stefan: The AMCC Secquoia board has been changed in a new revision from using a 33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD indicates the difference. This patch reads that bit and uses the correct clock speed for the board. This code is backward compatable will all prior boards. All prior boards will be read as 33.000. The patch is attached. -Jeffrey

2 3

[U-Boot-Users] Please pull u-boot-mpc86xx.git
by Jon Loeliger 07 May '07

07 May '07

Wolfgang, Here are a few more bug cleanups for the 8641 HPCN board! Thanks, jdl The following changes since commit 14da5f7675bbb427c469e3f45006e027b6e21db9: Wolfgang Denk (1): Cleanup compiler warnings, update CHANGELOG are found in the git repository at: git://www.denx.de/git/u-boot-mpc86xx.git Ed Swarthout (1): mpc8641hpcn: Fix LAW and TLB setup to use the IO_PHYS #defines. Jon Loeliger (2): mpc86xx: protect memcpy to bad address if a mac-address is missing from dt mpc86xx; Write MAC address to mac-address and local-mac-address Zhang Wei (1): Enable LAWs for MPC8641 PCI-Ex2. board/mpc8641hpcn/init.S | 10 +++++----- cpu/mpc86xx/cpu.c | 24 ++++++++++++++++++++---- 2 files changed, 25 insertions(+), 9 deletions(-) diff --git a/board/mpc8641hpcn/init.S b/board/mpc8641hpcn/init.S index 6b3e2d2..cb21ba6 100644 --- a/board/mpc8641hpcn/init.S +++ b/board/mpc8641hpcn/init.S @@ -59,7 +59,7 @@ #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) #define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff) -#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))) +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) /* * This is not so much the SDRAM map as it is the whole localbus map. @@ -67,11 +67,11 @@ #define LAWBAR4 ((0xf8100000>>12) & 0xffffff) #define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M)) -#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff) +#define LAWBAR5 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff) #define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) -#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff) -#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))) +#define LAWBAR6 ((CFG_PCI2_IO_PHYS>>12) & 0xffffff) +#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) #define LAWBAR7 ((0xfe000000 >>12) & 0xffffff) #define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M)) @@ -84,7 +84,7 @@ #define LAWAR8 ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN) #endif -#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff) +#define LAWBAR9 ((CFG_RIO_MEM_PHYS>>12) & 0xfffff) #define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)) .section .bootpg, "ax" diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 84f5bef..a33acfe 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -280,22 +280,38 @@ ft_cpu_setup(void *blob, bd_t *bd) #if defined(CONFIG_MPC86XX_TSEC1) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len); - memcpy(p, bd->bi_enetaddr, 6); + if (p != NULL) + memcpy(p, bd->bi_enetaddr, 6); + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/local-mac-address", &len); + if (p) + memcpy(p, bd->bi_enetaddr, 6); #endif #if defined(CONFIG_MPC86XX_TSEC2) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len); - memcpy(p, bd->bi_enet1addr, 6); + if (p != NULL) + memcpy(p, bd->bi_enet1addr, 6); + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/local-mac-address", &len); + if (p != NULL) + memcpy(p, bd->bi_enet1addr, 6); #endif #if defined(CONFIG_MPC86XX_TSEC3) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/mac-address", &len); - memcpy(p, bd->bi_enet2addr, 6); + if (p != NULL) + memcpy(p, bd->bi_enet2addr, 6); + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/local-mac-address", &len); + if (p != NULL) + memcpy(p, bd->bi_enet2addr, 6); #endif #if defined(CONFIG_MPC86XX_TSEC4) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/mac-address", &len); - memcpy(p, bd->bi_enet3addr, 6); + if (p != NULL) + memcpy(p, bd->bi_enet3addr, 6); + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/local-mac-address", &len); + if (p != NULL) + memcpy(p, bd->bi_enet3addr, 6); #endif }

3 2

Re: [U-Boot-Users] Wind River SBC8560 saga continues
by Mark Pilant 07 May '07

07 May '07

Hi Andy. >> >> Finally, I notice there is one area of memory, defined at 0x70000000, >> which has a TLB but does not appear to have any real memory to back >> it up. (This address is associated with the CFG_INIT_RAM_ADDR >> defined symbol.) > >This is just the initial area to store stuff before RAM is actually >set up. It has to be somewhere with nothing behind it so it will just >stay in the cache. Most 85xx systems use 0xe4010000. However, once >RAM is set up, this address loses its meaning OK. That sounds reasonable, although I haven't run across this before. >> >> I am hoping someone might be able to point out if I am missing >> something (subtle or obvious :-). >> >> I had thought this might be the source of the CPM SCC problem I >> am having, but so far it does not seem to be the case. > >I don't recall seeing the email about your problem. Could you >redescribe it? Simply put, I'm trying to get U-Boot 1.2.0 compiled and running on a Wind River SBC8560 board we have. From what I saw of the '8560 support in general and the SBC8560 in particular, I thought it would be relatively simple. After setting up the ELDK on a Fedora Core 6 system I have, I was able to make a couple of changes to sbc8560.h (mostly to use SCC1 for the console) and build an image. Loading the image into flash (using WR visionCLICK) everything goes along fine until the code attempts to initialize the CPM SCC Tx & Tx. After writing the appropriate value to the proper location, the code hangs waiting for the command to complete. In reality, what appears to be happening is the code is reading one value (0x00810000) from the CPM CPCR (0xff7919c0) and if I dump that location using visionCLICK I see a different value (0x00800000). The difference being the code sees the busy FLG and dumping the location has it clear; indicating it is no longer busy. This feels a lot like a caching issue, but from everything I can see, the TLB is set up with the cache inhibited, so everything should be read/written through to memory. I have been trying for about the past two weeks to sort this out and get U-Boot up. I'm not worried about the Linux kernel right now :-) - Mark This email message and any attachments are confidential and may contain information which is proprietary to Mintera Corporation. If you are not the intended recipient, please notify Mintera Corporation immediately -- by replying to this message or by sending an email to postmaster(a)mintera.com -- and destroy all copies of this message and any attachments. Thank you.

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[U-Boot-Users] [PATCH 2/2][SH] Hitachi MS7750SE Support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi , all. I had MS7750SE[0] that was one of the reference boards of SH correspond to u-boot. Now , 0 . Serial 1 . SDRAM 2 . Flash working. As for this board, NIC that is called STNIC is installed. However, This has not been ported for u-boot yet. I plan to support this NIC in the future. [0] : http://www.hitachi-ul.co.jp/e/SH-SE/index.html -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c new file mode 100644 index 0000000..4b4697b --- /dev/null +++ b/board/ms7750se/ms7750se.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +int checkboard(void) +{ + puts("BOARD: SH7750 Solution Engine\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +int board_late_init(void) +{ + return 0; +} diff --git a/board/ms7750se/u-boot.lds b/board/ms7750se/u-boot.lds new file mode 100644 index 0000000..5b35cfa --- /dev/null +++ b/board/ms7750se/u-boot.lds @@ -0,0 +1,106 @@ +/* + * Copyrigth (c) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} + diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h new file mode 100644 index 0000000..0467a5e --- /dev/null +++ b/include/configs/ms7750se.h @@ -0,0 +1,75 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#undef DEBUG + +#define CONFIG_SH 1 +#define CONFIG_SH4 1 +#define CONFIG_CPU_SH7750 1 +#define CONFIG_MS7750SE 1 +#define __LITTLE_ENDIAN__ 1 + +//#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_NET |CFG_CMD_PING) +#define CONFIG_COMMANDS CONFIG_CMD_DFL & ~CFG_CMD_NET + +#define CFG_SCIF_CONSOLE 1 +#define CONFIG_BAUDRATE 38400 +#define CONFIG_CONS_SCIF1 1 +#define BOARD_LATE_INIT 1 + +#include <cmd_confdefs.h> + +#define CONFIG_BOOTDELAY -1 +#define CONFIG_BOOTARGS "console=ttySC0,115200" +#define CONFIG_ENV_OVERWRITE 1 + +#define CFG_SDRAM_BASE (0x8C000000) +#define CFG_SDRAM_SIZE (64 * 1024 * 1024) + +#define CFG_LONGHELP +#define CFG_PROMPT "=> " +#define CFG_CBSIZE 256 +#define CFG_PBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_BARGSIZE 512 +#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } /* List of legal baudrate settings for this board */ + +#define CFG_MEMTEST_START (CFG_SDRAM_BASE) +#define CFG_MEMTEST_END (TEXT_BASE - 0x100000) + + +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) +#define CFG_MONITOR_BASE (CFG_FLASH_BASE) /* Address of u-boot image in Flash */ +#define CFG_MONITOR_LEN (128 * 1024) +#define CFG_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ + +#define CFG_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */ +#define CFG_BOOTMAPSZ (8 * 1024 * 1024) +#define CFG_RX_ETH_BUFFER (8) + +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#undef CFG_FLASH_CFI_BROKEN_TABLE +#undef CFG_FLASH_QUIET_TEST +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#define CFG_FLASH_BASE (0xA1000000) +#define CFG_MAX_FLASH_BANKS (1) /* Max number of + * Flash memory banks + */ +#define CFG_MAX_FLASH_SECT 142 +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } + +#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) +#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CFG_FLASH_ERASE_TOUT 120000 +#define CFG_FLASH_WRITE_TOUT 500 + +#define CONFIG_SYS_CLK_FREQ 33333333 +#define TMU_CLK_DIVIDER 4 +#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CFG_PLL_SETTLING_TIME 100 /* in us */ + +#endif /* __CONFIG_H */

1 0

[U-Boot-Users] [PATCH 8/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/include/asm-sh/u-boot.h b/include/asm-sh/u-boot.h new file mode 100644 index 0000000..c74e97c --- /dev/null +++ b/include/asm-sh/u-boot.h @@ -0,0 +1,44 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + ******************************************************************** + * NOTE: This header file defines an interface to U-Boot. Including + * this (unmodified) header file in another file is considered normal + * use of U-Boot, and does *not* fall under the heading of "derived + * work". + ******************************************************************** + */ + +#ifndef __ASM_SH_U_BOOT_H_ +#define __ASM_SH_U_BOOT_H_ + + +typedef struct bd_info { + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + unsigned long bi_sramstart; /* start of SRAM memory */ + unsigned long bi_sramsize; /* size of SRAM memory */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned char bi_enetaddr[6]; /* Ethernet adress */ + unsigned long bi_baudrate; /* Console Baudrate */ + unsigned long bi_boot_params; /* where this board expects params */ +} bd_t; + +#endif + diff --git a/lib_sh/Makefile b/lib_sh/Makefile new file mode 100644 index 0000000..c84276a --- /dev/null +++ b/lib_sh/Makefile @@ -0,0 +1,42 @@ +# +# Copyright (c) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(ARCH).a + +SOBJS = + +COBJS = board.o sh_linux.o # time.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/lib_sh/board.c b/lib_sh/board.c new file mode 100644 index 0000000..a5347e3 --- /dev/null +++ b/lib_sh/board.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <malloc.h> +#include <devices.h> +#include <version.h> +#include <net.h> +#include <environment.h> + +extern void malloc_bin_reloc (void); +extern int cpu_init(void); +extern int board_init(void); +extern int dram_init(void); +extern int watchdog_init(void); +extern int timer_init(void); + +const char version_string[] = U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; + +unsigned long monitor_flash_len = CFG_MONITOR_LEN; + +static unsigned long mem_malloc_start; +static unsigned long mem_malloc_end; +static unsigned long mem_malloc_brk; + +static void mem_malloc_init (void) +{ + + mem_malloc_start = (TEXT_BASE - CFG_GBL_DATA_SIZE - CFG_MALLOC_LEN); + mem_malloc_end = (mem_malloc_start + CFG_MALLOC_LEN - 16); + mem_malloc_brk = mem_malloc_start; + memset ((void *) mem_malloc_start, 0, + (mem_malloc_end - mem_malloc_start)); +} + +void *sbrk (ptrdiff_t increment) +{ + unsigned long old = mem_malloc_brk; + unsigned long new = old + increment; + + if ((new < mem_malloc_start) || + (new > mem_malloc_end)) { + return NULL; + } + + mem_malloc_brk = new; + return (void *) old; +} + +typedef int (init_fnc_t) (void); + +init_fnc_t *init_sequence[] = +{ + cpu_init, /* basic cpu dependent setup */ + board_init, /* basic board dependent setup */ + interrupt_init, /* set up exceptions */ + env_init, /* event init */ + serial_init, /* SCIF init */ + watchdog_init, + console_init_f, + display_options, + checkcpu, + checkboard, + dram_init, /* SDRAM init */ + NULL /* Terminate this list */ +}; + +void sh_generic_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + bd_t *bd; + init_fnc_t **init_fnc_ptr; + char *s, *e; + int i; + + memset (gd, 0, CFG_GBL_DATA_SIZE); + + gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ + + gd->bd = (bd_t *) (gd + 1); /* At end of global data */ + gd->baudrate = CONFIG_BAUDRATE; + + gd->cpu_clk = CONFIG_SYS_CLK_FREQ; + + bd = gd->bd; + bd->bi_memstart = CFG_SDRAM_BASE; + bd->bi_memsize = CFG_SDRAM_SIZE; + bd->bi_flashstart = CFG_FLASH_BASE; +#if defined(CFG_SRAM_BASE) && defined(CFG_SRAM_SIZE) + bd->bi_sramstart= CFG_SRAM_BASE; + bd->bi_sramsize = CFG_SRAM_SIZE; +#endif + bd->bi_baudrate = CONFIG_BAUDRATE; + + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { + if ((*init_fnc_ptr) () != 0) { + hang(); + } + } + + timer_init(); + + /* flash_init need timer_init().(TMU) */ + bd->bi_flashsize = flash_init(); + printf("FLASH: %dMB\n", bd->bi_flashsize / (1024*1024)); + + mem_malloc_init(); + malloc_bin_reloc(); + env_relocate(); + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); + s = getenv ("ethaddr"); + for (i = 0; i < 6; ++i) { + bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; + if (s) s = (*e) ? e + 1 : e; + } +#endif + devices_init(); + jumptable_init(); + console_init_r(); + interrupt_init(); +#ifdef BOARD_LATE_INIT + board_late_init (); +#endif +#if (CONFIG_COMMANDS & CFG_CMD_NET) +#if defined(CONFIG_NET_MULTI) + puts ("Net: "); +#endif + eth_initialize(gd->bd); +#endif + while (1) { + main_loop(); + } +} + + +/***********************************************************************/ + +void hang (void) +{ + puts ("Board ERROR \n"); + for (;;); +} diff --git a/lib_sh/sh_linux.c b/lib_sh/sh_linux.c new file mode 100644 index 0000000..7237ab3 --- /dev/null +++ b/lib_sh/sh_linux.c @@ -0,0 +1,74 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <command.h> +#include <asm/byteorder.h> + +extern image_header_t header; /* common/cmd_bootm.c */ + +/* The SH kernel reads arguments from the empty zero page at location + * 0 at the start of SDRAM. The following are copied from + * arch/sh/kernel/setup.c and may require tweaking if the kernel sources + * change. + */ +#define PARAM ((unsigned char *)CFG_SDRAM_BASE + 0x1000) + +#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) +#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) +#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) +#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) +#define INITRD_START (*(unsigned long *) (PARAM+0x010)) +#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) +/* ... */ +#define COMMAND_LINE ((char *) (PARAM+0x100)) + +#define RAMDISK_IMAGE_START_MASK 0x07FF + +#ifdef CFG_DEBUG +static void hexdump (unsigned char *buf, int len) +{ + int i; + + for (i = 0; i < len; i++) { + if ((i % 16) == 0) + printf ("%s%08x: ", i ? "\n" : "", (unsigned int) &buf[i]); + printf ("%02x ", buf[i]); + } + printf ("\n"); +} +#endif + +void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], + ulong addr, ulong *len_ptr, int verify) +{ + image_header_t *hdr = &header; + char *bootargs = getenv("bootargs"); + void (*kernel) (void) = (void (*)(void)) ntohl (hdr->ih_ep); + + /* Setup parameters */ + memset(PARAM, 0, 0x1000); /* Clear zero page */ + strcpy(COMMAND_LINE, bootargs); + kernel(); +} + diff --git a/lib_sh/time.c b/lib_sh/time.c new file mode 100644 index 0000000..3620136 --- /dev/null +++ b/lib_sh/time.c @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processer.h> + +static void tmu_timer_start (unsigned int timer) +{ + if (timer > 2) + return; + + *((volatile unsigned char *) TSTR0) |= (1 << timer); +} + +int timer_init (void) +{ + *(volatile u16 *)TCR0 = 0; + + tmu_timer_start (0); + return 0; +} + +unsigned long long get_ticks (void) +{ + return (0 - *((volatile unsigned int *) TCNT0)); +} + +unsigned long get_timer (unsigned long base) +{ + return ((0 - *((volatile unsigned int *) TCNT0)) - base); +} + +void set_timer (unsigned long t) +{ + *((volatile unsigned int *) TCNT0) = (0 - t); +} + +void reset_timer (void) +{ + set_timer (0); +} + +void udelay (unsigned long usec) +{ + unsigned int start = get_timer (0); + unsigned int end = start + (usec * ((CFG_HZ + 500000) / 1000000)); + + while (get_timer (0) < end) + continue; +} + +unsigned long get_tbclk (void) +{ + return CFG_HZ; +} +

1 0

[U-Boot-Users] [PATCH 7/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h new file mode 100644 index 0000000..b353bc5 --- /dev/null +++ b/include/asm-sh/system.h @@ -0,0 +1,275 @@ +#ifndef __ASM_SH_SYSTEM_H +#define __ASM_SH_SYSTEM_H + +/* + * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima + * Copyright (C) 2002 Paul Mundt + * + * from linux kernel code. + */ + +#include <linux/irqflags.h> +#include <asm/types.h> + +/* + * switch_to() should switch tasks to task nr n, first + */ + +#define switch_to(prev, next, last) do { \ + struct task_struct *__last; \ + register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp; \ + register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc; \ + register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev; \ + register unsigned long *__ts5 __asm__ ("r5") = (unsigned long *)next; \ + register unsigned long *__ts6 __asm__ ("r6") = &next->thread.sp; \ + register unsigned long __ts7 __asm__ ("r7") = next->thread.pc; \ + __asm__ __volatile__ (".balign 4\n\t" \ + "stc.l gbr, @-r15\n\t" \ + "sts.l pr, @-r15\n\t" \ + "mov.l r8, @-r15\n\t" \ + "mov.l r9, @-r15\n\t" \ + "mov.l r10, @-r15\n\t" \ + "mov.l r11, @-r15\n\t" \ + "mov.l r12, @-r15\n\t" \ + "mov.l r13, @-r15\n\t" \ + "mov.l r14, @-r15\n\t" \ + "mov.l r15, @r1 ! save SP\n\t" \ + "mov.l @r6, r15 ! change to new stack\n\t" \ + "mova 1f, %0\n\t" \ + "mov.l %0, @r2 ! save PC\n\t" \ + "mov.l 2f, %0\n\t" \ + "jmp @%0 ! call __switch_to\n\t" \ + " lds r7, pr ! with return to new PC\n\t" \ + ".balign 4\n" \ + "2:\n\t" \ + ".long __switch_to\n" \ + "1:\n\t" \ + "mov.l @r15+, r14\n\t" \ + "mov.l @r15+, r13\n\t" \ + "mov.l @r15+, r12\n\t" \ + "mov.l @r15+, r11\n\t" \ + "mov.l @r15+, r10\n\t" \ + "mov.l @r15+, r9\n\t" \ + "mov.l @r15+, r8\n\t" \ + "lds.l @r15+, pr\n\t" \ + "ldc.l @r15+, gbr\n\t" \ + : "=z" (__last) \ + : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ + "r" (__ts5), "r" (__ts6), "r" (__ts7) \ + : "r3", "t"); \ + last = __last; \ +} while (0) + +/* + * On SMP systems, when the scheduler does migration-cost autodetection, + * it needs a way to flush as much of the CPU's caches as possible. + * + * TODO: fill this in! + */ +static inline void sched_cacheflush(void) +{ +} + +#ifdef CONFIG_CPU_SH4A +#define __icbi() \ +{ \ + unsigned long __addr; \ + __addr = 0xa8000000; \ + __asm__ __volatile__( \ + "icbi %0\n\t" \ + : /* no output */ \ + : "m" (__m(__addr))); \ +} +#endif + +static inline unsigned long tas(volatile int *m) +{ + unsigned long retval; + + __asm__ __volatile__ ("tas.b @%1\n\t" + "movt %0" + : "=r" (retval): "r" (m): "t", "memory"); + return retval; +} + +/* + * A brief note on ctrl_barrier(), the control register write barrier. + * + * Legacy SH cores typically require a sequence of 8 nops after + * modification of a control register in order for the changes to take + * effect. On newer cores (like the sh4a and sh5) this is accomplished + * with icbi. + * + * Also note that on sh4a in the icbi case we can forego a synco for the + * write barrier, as it's not necessary for control registers. + * + * Historically we have only done this type of barrier for the MMUCR, but + * it's also necessary for the CCR, so we make it generic here instead. + */ +#ifdef CONFIG_CPU_SH4A +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define ctrl_barrier() __icbi() +#define read_barrier_depends() do { } while(0) +#else +#define mb() __asm__ __volatile__ ("": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("": : :"memory") +#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") +#define read_barrier_depends() do { } while(0) +#endif + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#else +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() +#define smp_read_barrier_depends() do { } while(0) +#endif + +#define set_mb(var, value) do { xchg(&var, value); } while (0) + +/* + * Jump to P2 area. + * When handling TLB or caches, we need to do it from P2 area. + */ +#define jump_to_P2() \ +do { \ + unsigned long __dummy; \ + __asm__ __volatile__( \ + "mov.l 1f, %0\n\t" \ + "or %1, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1: .long 2f\n" \ + "2:" \ + : "=&r" (__dummy) \ + : "r" (0x20000000)); \ +} while (0) + +/* + * Back to P1 area. + */ +#define back_to_P1() \ +do { \ + unsigned long __dummy; \ + ctrl_barrier(); \ + __asm__ __volatile__( \ + "mov.l 1f, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1: .long 2f\n" \ + "2:" \ + : "=&r" (__dummy)); \ +} while (0) + +static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) +{ + unsigned long flags, retval; + + local_irq_save(flags); + retval = *m; + *m = val; + local_irq_restore(flags); + return retval; +} + +static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) +{ + unsigned long flags, retval; + + local_irq_save(flags); + retval = *m; + *m = val & 0xff; + local_irq_restore(flags); + return retval; +} + +extern void __xchg_called_with_bad_pointer(void); + +#define __xchg(ptr, x, size) \ +({ \ + unsigned long __xchg__res; \ + volatile void *__xchg_ptr = (ptr); \ + switch (size) { \ + case 4: \ + __xchg__res = xchg_u32(__xchg_ptr, x); \ + break; \ + case 1: \ + __xchg__res = xchg_u8(__xchg_ptr, x); \ + break; \ + default: \ + __xchg_called_with_bad_pointer(); \ + __xchg__res = x; \ + break; \ + } \ + \ + __xchg__res; \ +}) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) + +static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, + unsigned long new) +{ + __u32 retval; + unsigned long flags; + + local_irq_save(flags); + retval = *m; + if (retval == old) + *m = new; + local_irq_restore(flags); /* implies memory barrier */ + return retval; +} + +/* This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +extern void *set_exception_table_vec(unsigned int vec, void *handler); + +static inline void *set_exception_table_evt(unsigned int evt, void *handler) +{ + return set_exception_table_vec(evt >> 5, handler); +} + +/* XXX + * disable hlt during certain critical i/o operations + */ +#define HAVE_DISABLE_HLT +void disable_hlt(void); +void enable_hlt(void); + +#define arch_align_stack(x) (x) + +#endif diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h new file mode 100644 index 0000000..fd00dbb --- /dev/null +++ b/include/asm-sh/types.h @@ -0,0 +1,59 @@ +#ifndef __ASM_SH_TYPES_H +#define __ASM_SH_TYPES_H + +#ifndef __ASSEMBLY__ + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +#endif /* __ASSEMBLY__ */ + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +#define BITS_PER_LONG 32 + +#ifndef __ASSEMBLY__ + + +typedef __signed__ char s8; +typedef unsigned char u8; + +typedef __signed__ short s16; +typedef unsigned short u16; + +typedef __signed__ int s32; +typedef unsigned int u32; + +typedef __signed__ long long s64; +typedef unsigned long long u64; + +/* Dma addresses are 32-bits wide. */ + +typedef u32 dma_addr_t; + +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* __ASM_SH_TYPES_H */

1 0

[U-Boot-Users] [PATCH 6/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h new file mode 100644 index 0000000..70e60b1 --- /dev/null +++ b/include/asm-sh/io.h @@ -0,0 +1,292 @@ +/* + * linux/include/asm-sh/io.h + * + * Copyright (C) 1996-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both + * constant addresses and variable addresses. + * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture + * specific IO header files. + * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. + * 04-Apr-1999 PJB Added check_signature. + * 12-Dec-1999 RMK More cleanups + * 18-Jun-2000 RMK Removed virt_to_* and friends definitions + */ +#ifndef __ASM_SH_IO_H +#define __ASM_SH_IO_H + +#ifdef __KERNEL__ + +#include <linux/types.h> +#include <asm/byteorder.h> + +/* + * Generic virtual read/write. Note that we don't support half-word + * read/writes. We define __arch_*[bl] here, and leave __arch_*w + * to the architecture specific code. + */ +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) + +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) + +extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); +extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); +extern void __raw_writesl(unsigned int addr, const void *data, int longlen); + +extern void __raw_readsb(unsigned int addr, void *data, int bytelen); +extern void __raw_readsw(unsigned int addr, void *data, int wordlen); +extern void __raw_readsl(unsigned int addr, void *data, int longlen); + +#define __raw_writeb(v,a) __arch_putb(v,a) +#define __raw_writew(v,a) __arch_putw(v,a) +#define __raw_writel(v,a) __arch_putl(v,a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) + +/* + * The compiler seems to be incapable of optimising constants + * properly. Spell it out to the compiler in some cases. + * These are only valid for small values of "off" (< 1<<12) + */ +#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) +#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) +#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) + +#define __raw_base_readb(base,off) __arch_base_getb(base,off) +#define __raw_base_readw(base,off) __arch_base_getw(base,off) +#define __raw_base_readl(base,off) __arch_base_getl(base,off) + +/* + * Now, pick up the machine-defined IO definitions + */ +#if 0 /* XXX###XXX */ +#include <asm/arch/io.h> +#endif /* XXX###XXX */ + +/* + * IO port access primitives + * ------------------------- + * + * The SH doesn't have special IO access instructions; all IO is memory + * mapped. Note that these are defined to perform little endian accesses + * only. Their primary purpose is to access PCI and ISA peripherals. + * + * The machine specific io.h include defines __io to translate an "IO" + * address to a memory address. + * + * Note that we prevent GCC re-ordering or caching values in expressions + * by introducing sequence points into the in*() definitions. Note that + * __raw_* do not guarantee this behaviour. + * + * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. + */ +#ifdef __io +#define outb(v,p) __raw_writeb(v,__io(p)) +#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p)) +#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p)) + +#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) +#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) +#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) + +#define outsb(p,d,l) __raw_writesb(__io(p),d,l) +#define outsw(p,d,l) __raw_writesw(__io(p),d,l) +#define outsl(p,d,l) __raw_writesl(__io(p),d,l) + +#define insb(p,d,l) __raw_readsb(__io(p),d,l) +#define insw(p,d,l) __raw_readsw(__io(p),d,l) +#define insl(p,d,l) __raw_readsl(__io(p),d,l) +#endif + +#define outb_p(val,port) outb((val),(port)) +#define outw_p(val,port) outw((val),(port)) +#define outl_p(val,port) outl((val),(port)) +#define inb_p(port) inb((port)) +#define inw_p(port) inw((port)) +#define inl_p(port) inl((port)) + +#define outsb_p(port,from,len) outsb(port,from,len) +#define outsw_p(port,from,len) outsw(port,from,len) +#define outsl_p(port,from,len) outsl(port,from,len) +#define insb_p(port,to,len) insb(port,to,len) +#define insw_p(port,to,len) insw(port,to,len) +#define insl_p(port,to,len) insl(port,to,len) + +/* + * ioremap and friends. + * + * ioremap takes a PCI memory address, as specified in + * linux/Documentation/IO-mapping.txt. If you want a + * physical address, use __ioremap instead. + */ +extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags); +extern void __iounmap(void *addr); + +/* + * Generic ioremap support. + * + * Define: + * iomem_valid_addr(off,size) + * iomem_to_phys(off) + */ +#ifdef iomem_valid_addr +#define __arch_ioremap(off,sz,nocache) \ + ({ \ + unsigned long _off = (off), _size = (sz); \ + void *_ret = (void *)0; \ + if (iomem_valid_addr(_off, _size)) \ + _ret = __ioremap(iomem_to_phys(_off),_size,0); \ + _ret; \ + }) + +#define __arch_iounmap __iounmap +#endif + +#define ioremap(off,sz) __arch_ioremap((off),(sz),0) +#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1) +#define iounmap(_addr) __arch_iounmap(_addr) + +/* + * DMA-consistent mapping functions. These allocate/free a region of + * uncached, unwrite-buffered mapped memory space for use with DMA + * devices. This is the "generic" version. The PCI specific version + * is in pci.h + */ +extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); +extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); +extern void consistent_sync(void *vaddr, size_t size, int rw); + +/* + * String version of IO memory access ops: + */ +extern void _memcpy_fromio(void *, unsigned long, size_t); +extern void _memcpy_toio(unsigned long, const void *, size_t); +extern void _memset_io(unsigned long, int, size_t); + +extern void __readwrite_bug(const char *fn); + +/* + * If this architecture has PCI memory IO, then define the read/write + * macros. These should only be used with the cookie passed from + * ioremap. + */ +#ifdef __mem_pci + +#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) +#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) +#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) + +#define writeb(v,c) __raw_writeb(v,__mem_pci(c)) +#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c)) +#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c)) + +#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) +#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) +#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) + +#define eth_io_copy_and_sum(s,c,l,b) \ + eth_copy_and_sum((s),__mem_pci(c),(l),(b)) + +static inline int +check_signature(unsigned long io_addr, const unsigned char *signature, + int length) +{ + int retval = 0; + do { + if (readb(io_addr) != *signature) + goto out; + io_addr++; + signature++; + length--; + } while (length); + retval = 1; +out: + return retval; +} + +#elif !defined(readb) + +#define readb(addr) (__readwrite_bug("readb"),0) +#define readw(addr) (__readwrite_bug("readw"),0) +#define readl(addr) (__readwrite_bug("readl"),0) +#define writeb(v,addr) __readwrite_bug("writeb") +#define writew(v,addr) __readwrite_bug("writew") +#define writel(v,addr) __readwrite_bug("writel") + +#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum") + +#define check_signature(io,sig,len) (0) + +#endif /* __mem_pci */ + +/* + * If this architecture has ISA IO, then define the isa_read/isa_write + * macros. + */ +#ifdef __mem_isa + +#define isa_readb(addr) __raw_readb(__mem_isa(addr)) +#define isa_readw(addr) __raw_readw(__mem_isa(addr)) +#define isa_readl(addr) __raw_readl(__mem_isa(addr)) +#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) +#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) +#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) +#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) +#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) +#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) + +#define isa_eth_io_copy_and_sum(a,b,c,d) \ + eth_copy_and_sum((a),__mem_isa(b),(c),(d)) + +static inline int +isa_check_signature(unsigned long io_addr, const unsigned char *signature, + int length) +{ + int retval = 0; + do { + if (isa_readb(io_addr) != *signature) + goto out; + io_addr++; + signature++; + length--; + } while (length); + retval = 1; +out: + return retval; +} + +#else /* __mem_isa */ + +#define isa_readb(addr) (__readwrite_bug("isa_readb"),0) +#define isa_readw(addr) (__readwrite_bug("isa_readw"),0) +#define isa_readl(addr) (__readwrite_bug("isa_readl"),0) +#define isa_writeb(val,addr) __readwrite_bug("isa_writeb") +#define isa_writew(val,addr) __readwrite_bug("isa_writew") +#define isa_writel(val,addr) __readwrite_bug("isa_writel") +#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") +#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") +#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") + +#define isa_eth_io_copy_and_sum(a,b,c,d) \ + __readwrite_bug("isa_eth_io_copy_and_sum") + +#define isa_check_signature(io,sig,len) (0) + +static inline void sync(void) +{ +} + +#endif /* __mem_isa */ +#endif /* __KERNEL__ */ +#endif /* __ASM_SH_IO_H */

1 0

[U-Boot-Users] [PATCH 5/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/include/asm-sh/posix_types.h b/include/asm-sh/posix_types.h new file mode 100644 index 0000000..4bb9f7e --- /dev/null +++ b/include/asm-sh/posix_types.h @@ -0,0 +1,123 @@ +#ifndef __ASM_SH_POSIX_TYPES_H +#define __ASM_SH_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned short __kernel_dev_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_nlink_t; +typedef long __kernel_off_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_timer_t; +typedef int __kernel_clockid_t; +typedef int __kernel_daddr_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +typedef unsigned short __kernel_old_dev_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { +#if defined(__KERNEL__) || defined(__USE_ALL) + int val[2]; +#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ + int __val[2]; +#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ +} __kernel_fsid_t; + +#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) + +#undef __FD_SET +static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) +{ + unsigned long __tmp = __fd / __NFDBITS; + unsigned long __rem = __fd % __NFDBITS; + __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); +} + +#undef __FD_CLR +static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) +{ + unsigned long __tmp = __fd / __NFDBITS; + unsigned long __rem = __fd % __NFDBITS; + __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); +} + + +#undef __FD_ISSET +static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) +{ + unsigned long __tmp = __fd / __NFDBITS; + unsigned long __rem = __fd % __NFDBITS; + return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; +} + +/* + * This will unroll the loop for the normal constant case (8 ints, + * for a 256-bit fd_set) + */ +#undef __FD_ZERO +static __inline__ void __FD_ZERO(__kernel_fd_set *__p) +{ + unsigned long *__tmp = __p->fds_bits; + int __i; + + if (__builtin_constant_p(__FDSET_LONGS)) { + switch (__FDSET_LONGS) { + case 16: + __tmp[ 0] = 0; __tmp[ 1] = 0; + __tmp[ 2] = 0; __tmp[ 3] = 0; + __tmp[ 4] = 0; __tmp[ 5] = 0; + __tmp[ 6] = 0; __tmp[ 7] = 0; + __tmp[ 8] = 0; __tmp[ 9] = 0; + __tmp[10] = 0; __tmp[11] = 0; + __tmp[12] = 0; __tmp[13] = 0; + __tmp[14] = 0; __tmp[15] = 0; + return; + + case 8: + __tmp[ 0] = 0; __tmp[ 1] = 0; + __tmp[ 2] = 0; __tmp[ 3] = 0; + __tmp[ 4] = 0; __tmp[ 5] = 0; + __tmp[ 6] = 0; __tmp[ 7] = 0; + return; + + case 4: + __tmp[ 0] = 0; __tmp[ 1] = 0; + __tmp[ 2] = 0; __tmp[ 3] = 0; + return; + } + } + __i = __FDSET_LONGS; + while (__i) { + __i--; + *__tmp = 0; + __tmp++; + } +} + +#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ + +#endif /* __ASM_SH_POSIX_TYPES_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h new file mode 100644 index 0000000..bb9a35f --- /dev/null +++ b/include/asm-sh/processor.h @@ -0,0 +1,8 @@ +#ifndef _ASM_SH_PROCESSOR_H_ +#define _ASM_SH_PROCESSOR_H_ +#if defined CONFIG_SH3 +# include <asm/cpu_sh3.h> +#elif defined (CONFIG_SH4) +# include <asm/cpu_sh4.h> +#endif +#endif diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h new file mode 100644 index 0000000..14cc1ac --- /dev/null +++ b/include/asm-sh/ptrace.h @@ -0,0 +1,112 @@ +#ifndef __ASM_SH_PTRACE_H +#define __ASM_SH_PTRACE_H + +/* + * Copyright (C) 1999, 2000 Niibe Yutaka + * from linux kernel code. + */ + +/* + * GCC defines register number like this: + * ----------------------------- + * 0 - 15 are integer registers + * 17 - 22 are control/special registers + * 24 - 39 fp registers + * 40 - 47 xd registers + * 48 - fpscr register + * ----------------------------- + * + * We follows above, except: + * 16 --- program counter (PC) + * 22 --- syscall # + * 23 --- floating point communication register + */ +#define REG_REG0 0 +#define REG_REG15 15 + +#define REG_PC 16 + +#define REG_PR 17 +#define REG_SR 18 +#define REG_GBR 19 +#define REG_MACH 20 +#define REG_MACL 21 + +#define REG_SYSCALL 22 + +#define REG_FPREG0 23 +#define REG_FPREG15 38 +#define REG_XFREG0 39 +#define REG_XFREG15 54 + +#define REG_FPSCR 55 +#define REG_FPUL 56 + +/* options set using PTRACE_SETOPTIONS */ +#define PTRACE_O_TRACESYSGOOD 0x00000001 + +/* + * This struct defines the way the registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_regs { + unsigned long regs[16]; + unsigned long pc; + unsigned long pr; + unsigned long sr; + unsigned long gbr; + unsigned long mach; + unsigned long macl; + long tra; +}; + +/* + * This struct defines the way the DSP registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_dspregs { + unsigned long a1; + unsigned long a0g; + unsigned long a1g; + unsigned long m0; + unsigned long m1; + unsigned long a0; + unsigned long x0; + unsigned long x1; + unsigned long y0; + unsigned long y1; + unsigned long dsr; + unsigned long rs; + unsigned long re; + unsigned long mod; +}; + +#define PTRACE_GETDSPREGS 55 +#define PTRACE_SETDSPREGS 56 + +#ifdef __KERNEL__ +#define user_mode(regs) (((regs)->sr & 0x40000000)==0) +#define instruction_pointer(regs) ((regs)->pc) +extern void show_regs(struct pt_regs *); + +#ifdef CONFIG_SH_DSP +#define task_pt_regs(task) \ + ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ + - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1) +#else +#define task_pt_regs(task) \ + ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ + - sizeof(unsigned long)) - 1) +#endif + +static inline unsigned long profile_pc(struct pt_regs *regs) +{ + unsigned long pc = instruction_pointer(regs); + + if (pc >= 0xa0000000UL && pc < 0xc0000000UL) + pc -= 0x20000000; + return pc; +} +#endif + +#endif /* __ASM_SH_PTRACE_H */ diff --git a/include/asm-sh/string.h b/include/asm-sh/string.h new file mode 100644 index 0000000..a78ef81 --- /dev/null +++ b/include/asm-sh/string.h @@ -0,0 +1,132 @@ +#ifndef __ASM_SH_STRING_H +#define __ASM_SH_STRING_H + +/* + * Copyright (C) 1999 Niibe Yutaka + * But consider these trivial functions to be public domain. + * + * from linux kernel code. + */ + +#define __HAVE_ARCH_STRCPY +static inline char *strcpy(char *__dest, const char *__src) +{ + register char *__xdest = __dest; + unsigned long __dummy; + + __asm__ __volatile__("1:\n\t" + "mov.b @%1+, %2\n\t" + "mov.b %2, @%0\n\t" + "cmp/eq #0, %2\n\t" + "bf/s 1b\n\t" + " add #1, %0\n\t" + : "=r" (__dest), "=r" (__src), "=&z" (__dummy) + : "0" (__dest), "1" (__src) + : "memory", "t"); + + return __xdest; +} + +#define __HAVE_ARCH_STRNCPY +static inline char *strncpy(char *__dest, const char *__src, size_t __n) +{ + register char *__xdest = __dest; + unsigned long __dummy; + + if (__n == 0) + return __xdest; + + __asm__ __volatile__( + "1:\n" + "mov.b @%1+, %2\n\t" + "mov.b %2, @%0\n\t" + "cmp/eq #0, %2\n\t" + "bt/s 2f\n\t" + " cmp/eq %5,%1\n\t" + "bf/s 1b\n\t" + " add #1, %0\n" + "2:" + : "=r" (__dest), "=r" (__src), "=&z" (__dummy) + : "0" (__dest), "1" (__src), "r" (__src+__n) + : "memory", "t"); + + return __xdest; +} + +#define __HAVE_ARCH_STRCMP +static inline int strcmp(const char *__cs, const char *__ct) +{ + register int __res; + unsigned long __dummy; + + __asm__ __volatile__( + "mov.b @%1+, %3\n" + "1:\n\t" + "mov.b @%0+, %2\n\t" + "cmp/eq #0, %3\n\t" + "bt 2f\n\t" + "cmp/eq %2, %3\n\t" + "bt/s 1b\n\t" + " mov.b @%1+, %3\n\t" + "add #-2, %1\n\t" + "mov.b @%1, %3\n\t" + "sub %3, %2\n" + "2:" + : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) + : "0" (__cs), "1" (__ct) + : "t"); + + return __res; +} + +#define __HAVE_ARCH_STRNCMP +static inline int strncmp(const char *__cs, const char *__ct, size_t __n) +{ + register int __res; + unsigned long __dummy; + + if (__n == 0) + return 0; + + __asm__ __volatile__( + "mov.b @%1+, %3\n" + "1:\n\t" + "mov.b @%0+, %2\n\t" + "cmp/eq %6, %0\n\t" + "bt/s 2f\n\t" + " cmp/eq #0, %3\n\t" + "bt/s 3f\n\t" + " cmp/eq %3, %2\n\t" + "bt/s 1b\n\t" + " mov.b @%1+, %3\n\t" + "add #-2, %1\n\t" + "mov.b @%1, %3\n" + "2:\n\t" + "sub %3, %2\n" + "3:" + :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) + : "0" (__cs), "1" (__ct), "r" (__cs+__n) + : "t"); + + return __res; +} + +#undef __HAVE_ARCH_MEMSET +extern void *memset(void *__s, int __c, size_t __count); + +#undef __HAVE_ARCH_MEMCPY +extern void *memcpy(void *__to, __const__ void *__from, size_t __n); + +#undef __HAVE_ARCH_MEMMOVE +extern void *memmove(void *__dest, __const__ void *__src, size_t __n); + +#undef __HAVE_ARCH_MEMCHR +extern void *memchr(const void *__s, int __c, size_t __n); + +#undef __HAVE_ARCH_STRLEN +extern size_t strlen(const char *); + +/* arch/sh/lib/strcasecmp.c */ +extern int strcasecmp(const char *, const char *); + +#endif /* __ASM_SH_STRING_H */

1 0

[U-Boot-Users] [PATCH 4/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/examples/stubs.c b/examples/stubs.c index 26df6e0..263dd8c 100644 --- a/examples/stubs.c +++ b/examples/stubs.c @@ -151,6 +151,22 @@ gd_t *global_data; : \ : "i"(offsetof(gd_t, jt)), "i"(XF_ ##x) \ : "r8"); +#elif defined(CONFIG_SH) +/* + * r13 holds the pointer to the global_data. r1 is a call clobbered. + */ +#define EXPORT_FUNC(x) \ + asm volatile ( \ + " .align 2\n" \ + " .globl " #x "\n" \ + #x ":\n" \ + " mov r13, r1\n" \ + " add %0, r1\n" \ + " add %1, r1\n" \ + " jmp @r1\n" \ + " nop\n" \ + " nop\n" \ + : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r1"); #else #error stubs definition missing for this architecture #endif diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h new file mode 100644 index 0000000..44dca9f --- /dev/null +++ b/include/asm-sh/bitops.h @@ -0,0 +1,13 @@ +#ifndef __ASM_SH_BITOPS_H_ +#define __ASM_SH_BITOPS_H_ + +extern void set_bit(int nr, volatile void * a); +extern void clear_bit(int nr, volatile void * a); +extern int test_and_clear_bit(int nr, volatile void * a); +extern void change_bit(unsigned long nr, volatile void *addr); +extern int test_and_set_bit(int nr, volatile void * a); +extern int test_and_change_bit(int nr, volatile void * addr); +extern int test_bit(int nr, volatile void * a); +extern int ffs(int i); + +#endif diff --git a/include/asm-sh/byteorder.h b/include/asm-sh/byteorder.h new file mode 100644 index 0000000..8836e65 --- /dev/null +++ b/include/asm-sh/byteorder.h @@ -0,0 +1,31 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_SH_BYTEORDER_H_ +#define __ASM_SH_BYTEORDER_H_ + +#include <config.h> +#include <asm/types.h> + +#ifdef __LITTLE_ENDIAN__ +#include <linux/byteorder/little_endian.h> +#else +#include <linux/byteorder/big_endian.h> +#endif + +#endif + diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h new file mode 100644 index 0000000..e0275f3 --- /dev/null +++ b/include/asm-sh/cpu_sh4.h @@ -0,0 +1,10 @@ +#ifndef _ASM_CPU_SH4_H_ +#define _ASM_CPU_SH4_H_ +#if defined (CONFIG_CPU_SH7750) +#include <asm/cpu_sh7750.h> +#elif defined (CONFIG_CPU_SH7780) +#include <asm/cpu_sh7780.h> +#else +#error "Unknown SH4 variant" +#endif +#endif diff --git a/include/asm-sh/cpu_sh7750.h b/include/asm-sh/cpu_sh7750.h new file mode 100644 index 0000000..eb4f1af --- /dev/null +++ b/include/asm-sh/cpu_sh7750.h @@ -0,0 +1,145 @@ +#ifndef _ASM_CPU_SH7750_H_ +#define _ASM_CPU_SH7750_H_ + +#define PTEH 0xFF000000 +#define PTEL 0xFF000004 +#define TTB 0xFF000008 +#define TEA 0xFF00000C +#define MMUCR 0xFF000010 +#define BASRA 0xFF000014 +#define BASRB 0xFF000018 +#define CCR 0xFF00001C +#define TRA 0xFF000020 +#define EXPEVT 0xFF000024 +#define INTEVT 0xFF000028 +#define PTEA 0xFF000034 +#define QACR0 0xFF000038 +#define QACR1 0xFF00003C +#define BARA 0xFF200000 +#define BAMRA 0xFF200004 +#define BBRA 0xFF200008 +#define BARB 0xFF20000C +#define BAMRB 0xFF200010 +#define BBRB 0xFF200014 +#define BDRB 0xFF200018 +#define BDMRB 0xFF20001C +#define BRCR 0xFF200020 + +#define BCR1 0xFF800000 +#define BCR2 0xFF800004 +#define BCR3 0xFF800050 +#define BCR4 0xFE0A00F0 +#define WCR1 0xFF800008 +#define WCR2 0xFF80000C +#define WCR3 0xFF800010 +#define MCR 0xFF800014 +#define PCR 0xFF800018 +#define RTCSR 0xFF80001C +#define RTCNT 0xFF800020 +#define RTCOR 0xFF800024 +#define RFCR 0xFF800028 +#define PCTRA 0xFF80002C +#define PDTRA 0xFF800030 +#define PCTRB 0xFF800040 +#define PDTRB 0xFF800044 +#define GPIOIC 0xFF800048 +#define SAR0 0xFFA00000 +#define DAR0 0xFFA00004 +#define DMATCR0 0xFFA00008 +#define CHCR0 0xFFA0000C +#define SAR1 0xFFA00010 +#define DAR1 0xFFA00014 +#define DMATCR1 0xFFA00018 +#define CHCR1 0xFFA0001C +#define SAR2 0xFFA00020 +#define DAR2 0xFFA00024 +#define DMATCR2 0xFFA00028 +#define CHCR2 0xFFA0002C +#define SAR3 0xFFA00030 +#define DAR3 0xFFA00034 +#define DMATCR3 0xFFA00038 +#define CHCR3 0xFFA0003C +#define DMAOR 0xFFA00040 +#define SAR4 0xFFA00050 +#define DAR4 0xFFA00054 +#define DMATCR4 0xFFA00058 + +#define FRQCR 0xFFC00000 +#define STBCR 0xFFC00004 +#define WTCNT 0xFFC00008 +#define WTCSR 0xFFC0000C +#define STBCR2 0xFFC00010 +#define R64CNT 0xFFC80000 +#define RSECCNT 0xFFC80004 +#define RMINCNT 0xFFC80008 +#define RHRCNT 0xFFC8000C +#define RWKCNT 0xFFC80010 +#define RDAYCNT 0xFFC80014 +#define RMONCNT 0xFFC80018 +#define RYRCNT 0xFFC8001C +#define RSECAR 0xFFC80020 +#define RMINAR 0xFFC80024 +#define RHRAR 0xFFC80028 +#define RWKAR 0xFFC8002C +#define RDAYAR 0xFFC80030 +#define RMONAR 0xFFC80034 +#define RCR1 0xFFC80038 +#define RCR2 0xFFC8003C +#define RCR3 0xFFC80050 +#define RYRAR 0xFFC80054 +#define ICR 0xFFD00000 +#define IPRA 0xFFD00004 +#define IPRB 0xFFD00008 +#define IPRC 0xFFD0000C +#define IPRD 0xFFD00010 +#define INTPRI 0xFE080000 +#define INTREQ 0xFE080020 +#define INTMSK 0xFE080040 +#define INTMSKCL 0xFE080060 +#define CLKSTP 0xFE0A0000 +#define CLKSTPCLR 0xFE0A0008 +#define TSTR2 0xFE100004 +#define TCOR3 0xFE100008 +#define TCNT3 0xFE10000C +#define TCR3 0xFE100010 +#define TCOR4 0xFE100014 +#define TCNT4 0xFE100018 +#define TCR4 0xFE10001C +#define TOCR 0xFFD80000 +#define TSTR0 0xFFD80004 +#define TCOR0 0xFFD80008 +#define TCNT0 0xFFD8000C +#define TCR0 0xFFD80010 +#define TCOR1 0xFFD80014 +#define TCNT1 0xFFD80018 +#define TCR1 0xFFD8001C +#define TCOR2 0xFFD80020 +#define TCNT2 0xFFD80024 +#define TCR2 0xFFD80028 +#define TCPR2 0xFFD8002C +#define SCSMR1 0xFFE00000 +#define SCBRR1 0xFFE00004 +#define SCSCR1 0xFFE00008 +#define SCTDR1 0xFFE0000C +#define SCSSR1 0xFFE00010 +#define SCRDR1 0xFFE00014 +#define SCSCMR1 0xFFE00018 +#define SCSPTR1 0xFFE0001C +#define SCF0_BASE SCSMR1 +#define SCSMR2 0xFFE80000 +#define SCBRR2 0xFFE80004 +#define SCSCR2 0xFFE80008 +#define SCFTDR2 0xFFE8000C +#define SCFSR2 0xFFE80010 +#define SCFRDR2 0xFFE80014 +#define SCFCR2 0xFFE80018 +#define SCFDR2 0xFFE8001C +#define SCSPTR2 0xFFE80020 +#define SCLSR2 0xFFE80024 +#define SCIF1_BASE SCSMR2 +#define SDIR 0xFFF00000 +#define SDDR 0xFFF00008 +#define SDINT 0xFFF00014 + +#endif /* _ASM_CPU_SH7750_H_ */ + diff --git a/include/asm-sh/global_data.h b/include/asm-sh/global_data.h new file mode 100644 index 0000000..0a44a34 --- /dev/null +++ b/include/asm-sh/global_data.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * (C) Copyright 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_SH_GLOBALDATA_H_ +#define __ASM_SH_GLOBALDATA_H_ + +typedef struct global_data +{ + bd_t *bd; + unsigned long flags; + unsigned long baudrate; + unsigned long cpu_clk; /* CPU clock in Hz! */ + unsigned long have_console; /* serial_init() was called */ + unsigned long ram_size; /* RAM size */ + unsigned long reloc_off; /* Relocation Offset */ + unsigned long env_addr; /* Address of Environment struct */ + unsigned long env_valid; /* Checksum of Environment valid */ + void **jt; /* Standalone app jump table */ +}gd_t; + +#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ +#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ +#define GD_FLG_SILENT 0x00004 /* Silent mode */ + +#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13") + +#endif /* __ASM_SH_GLOBALDATA_H_ */

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[U-Boot-Users] [PATCH 3/8] [SH] SuperH support
by Nobuhiro Iwamatsu 06 May '07

06 May '07

Hi, all. I wrote the code in which u-boot was supported for SH [0]. I am maintaining SH-IPL+g[1] that is the boot loader only for SH now. However, I think that I will maintain u-boot in the future. Now, 0. SDRAM controler 1. Internal serial device 2. Flash 3. Timer working. I plan to adopt it as a boot loader of the main in the future though only several boards are supported now. Please apply this patch . regards, Nobuhiro [0] : http://america.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/produ… [1] : http://git.nigauri.org -- Nobuhiro Iwamatsu E-Mail : iwamatsu(a)nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> diff --git a/cpu/sh4/watchdog.c b/cpu/sh4/watchdog.c new file mode 100644 index 0000000..e2bc820 --- /dev/null +++ b/cpu/sh4/watchdog.c @@ -0,0 +1,50 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +#define WDT_BASE WTCNT + +static unsigned char cnt_read (void){ + return *((volatile unsigned char *)(WDT_BASE + 0x00)); +} + +static unsigned char csr_read (void){ + return *((volatile unsigned char *)(WDT_BASE + 0x04)); +} + +static void cnt_write (unsigned char value){ + while (csr_read() & (1 << 5)) { + /* delay */ + } + *((volatile unsigned short *)(WDT_BASE + 0x00)) = ((unsigned short) value) | 0x5A00; +} + +static void csr_write (unsigned char value){ + *((volatile unsigned short *)(WDT_BASE + 0x04)) = ((unsigned short) value) | 0xA500; +} + + +int watchdog_init (void){ return 0; } + +void reset_cpu (unsigned long ignored) +{ + while(1); +} + + diff --git a/drivers/Makefile b/drivers/Makefile index d68cba6..a3a9986 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -41,7 +41,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o atmel_usart.o \ rtl8019.o rtl8139.o rtl8169.o \ s3c4510b_eth.o s3c4510b_uart.o \ sed13806.o sed156x.o \ - serial.o serial_max3100.o \ + serial.o serial_max3100.o serial_sh.o \ serial_pl010.o serial_pl011.o serial_xuartlite.o \ sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ status_led.o sym53c8xx.o systemace.o ahci.o \ diff --git a/drivers/serial_sh.c b/drivers/serial_sh.c new file mode 100644 index 0000000..fca92fd --- /dev/null +++ b/drivers/serial_sh.c @@ -0,0 +1,177 @@ +/* + * SuperH SCIF device driver. + * Copyright (c) 2007 Nobuhiro Iwamatsu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +#ifdef CFG_SCIF_CONSOLE + +#if defined (CONFIG_CONS_SCIF0) +#define SCIF_BASE SCIF0_BASE +#elif defined (CONFIG_CONS_SCIF1) +#define SCIF_BASE SCIF1_BASE +#else +#error "Default SCIF doesn't set....." +#endif + +#define SCSMR (volatile unsigned short *)(SCIF_BASE + 0x0) +#define SCBRR (volatile unsigned char *)(SCIF_BASE + 0x4) +#define SCSCR (volatile unsigned short *)(SCIF_BASE + 0x8) +#define SCFTDR (volatile unsigned char *)(SCIF_BASE + 0xC) +#define SCFSR (volatile unsigned short *)(SCIF_BASE + 0x10) +#define SCFRDR (volatile unsigned char *)(SCIF_BASE + 0x14) +#define SCFCR (volatile unsigned short *)(SCIF_BASE + 0x18) +#define SCFDR (volatile unsigned short *)(SCIF_BASE + 0x1C) +#if defined(CONFIG_SH4A) +#define SCRFDR (volatile unsigned short *)(SCIF_BASE + 0x20) +#define SCSPTR (volatile unsigned short *)(SCIF_BASE + 0x24) +#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x28) +#define SCRER (volatile unsigned short *)(SCIF_BASE + 0x2C) +#elif defined (CONFIG_SH4) +#define SCSPTR (volatile unsigned short *)(SCIF_BASE + 0x20) +#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x24) +#elif defined (CONFIG_SH3) +#define SCLSR (volatile unsigned short *)(SCIF_BASE + 0x24) +#endif + +#define SCR_RE (1 << 4) +#define SCR_TE (1 << 5) +#define FCR_RFRST (1 << 1) /* RFCL */ +#define FCR_TFRST (1 << 2) /* TFCL */ +#define FSR_DR (1 << 0) +#define FSR_RDF (1 << 1) +#define FSR_FER (1 << 3) +#define FSR_BRK (1 << 4) +#define FSR_FER (1 << 3) +#define FSR_TEND (1 << 6) +#define FSR_ER (1 << 7) + +/*----------------------------------------------------------------------*/ + +void serial_setbrg (void) +{ + DECLARE_GLOBAL_DATA_PTR; + int divisor = gd->baudrate * 32; + + *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) / + (gd->baudrate * 32) - 1; +} + +int serial_init (void) +{ + *SCSCR = (SCR_RE | SCR_TE); + *SCSMR = 0 ; + *SCSMR = 0; + *SCFCR = (FCR_RFRST | FCR_TFRST); + *SCFCR; + *SCFCR = 0; + + serial_setbrg(); + return 0; +} + +static int serial_tx_fifo_level (void) +{ + return (*SCFDR >> 8) & 0x1F; +} + +static int serial_rx_fifo_level (void) +{ + return (*SCFDR >> 0) & 0x1F; +} + +void serial_raw_putc (const char c) +{ + unsigned int fsr_bits_to_clear; + + while (1) { + if (*SCFSR & FSR_TEND) { /* Tx fifo is empty */ + fsr_bits_to_clear = FSR_TEND; + break; + } + } + + *SCFTDR = c; + if (fsr_bits_to_clear != 0) + *SCFSR &= ~fsr_bits_to_clear; +} + +void serial_putc (const char c) +{ + if (c == '\n') + serial_raw_putc ('\r'); + serial_raw_putc (c); +} + +void serial_puts (const char *s) +{ + char c; + while ((c = *s++) != 0) + serial_putc (c); +} + +int serial_tstc (void) +{ + return serial_rx_fifo_level() ? 1 : 0; +} + +#define FSR_ERR_CLEAR 0x0063 +#define RDRF_CLEAR 0x00fc +#define LSR_ORER 1 +void handle_error( void ){ + + (void)*SCFSR ; + *SCFSR = FSR_ERR_CLEAR ; + (void)*SCLSR ; + *SCLSR = 0x00 ; +} + +int serial_getc_check( void ){ + unsigned short status; + + status = *SCFSR ; + + if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK)) + handle_error(); + if( *SCLSR & LSR_ORER ) + handle_error(); + return (status & ( FSR_DR | FSR_RDF )); +} + +int serial_getc (void) +{ + unsigned short status ; + char ch; + while(!serial_getc_check()); + + ch = *SCFRDR; + status = *SCFSR ; + + *SCFSR = RDRF_CLEAR ; + + if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK)) + handle_error(); + + if( *SCLSR & LSR_ORER ) + handle_error(); + + return ch ; +} + +#endif /* CFG_SCIF_CONSOLE */ diff --git a/examples/Makefile b/examples/Makefile index e9b4974..71a8c7f 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -61,6 +61,11 @@ ifeq ($(ARCH),avr32) LOAD_ADDR = 0x00000000 endif +ifeq ($(ARCH),sh) +LOAD_ADDR = 0x8C000000 +endif + + include $(TOPDIR)/config.mk ELF = hello_world

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