May 2007 - U-Boot

[U-Boot-Users] Getting Started Porting U-Boot to M5329EVB board
by Robert S. Grimes 03 May '07

03 May '07

Hi, I'm getting started porting U-Boot to the Freescale/LogicPD M5329EVB board, based on the ColdFire MCF5329 processor. As suggested in the "U-Boot Porting Guide" in the README file, I've subscribed to this list, and I'm admitting I am (currently) clueless - hence this email! At this point, my only real question is this - has anybody done this already? If so, can/will you share? Or are you working on a similar port, and would you like to share the load? I'm very open to working with others on this, though if there are no takers, I'll go it alone and post it all later. Thanks, and take care, -Bob

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[U-Boot-Users] variable u16
by Lucas Cyrulski 03 May '07

03 May '07

Hello, i got this variable declaration: volatile u16 manuf_code; was trying to find where the typedef u16 is but failed. I'd like to make some debugging using console, and though i have to print manuf_code using printf() instruction but don't know what parameter for printf() goes with u16 variable, is it %d or %ld... Will be appreciate any help. Best Regards, Lucas

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[U-Boot-Users] How to add new flash support in Uboot code
by harsh poshtiwala 02 May '07

02 May '07

Hi , We are to use 512 MB Spansion NOR flash (Uniform Sector) on ARM926-EJS processor.. Part number S29GL512P http://www.spansion.com/products/S29GL512P.html I have checked uboot source code(1.1.6) it doesn't support this part. How can i make uboot functional for this part ? Do i need to modify any code in uboot ? if yes where should i make those changes ? I would appreciate your pointers on this -- Thanks & Regards Harsh

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[U-Boot-Users] [PATCH] Add support for treating unknown PHYs as generic PHYs
by Andy Fleming 02 May '07

02 May '07

From: David Updegraff <dave(a)cray.com> When bringing up u-boot on new boards, PHY support sometimes gets neglected. Most PHYs don't really need any special support, though. By adding a generic entry that always matches if nothing else does, we can provide support for "unsupported" PHYs for the tsec. The generic PHY driver supports most PHYs, including gigabit. Signed-off-by: David Updegraff <dave(a)cray.com> Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- I have unwound my tree, and applied this patch in place of the previous one. drivers/tsec.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 93 insertions(+), 0 deletions(-) diff --git a/drivers/tsec.c b/drivers/tsec.c index ed35f22..25566a7 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -385,6 +385,76 @@ uint mii_parse_sr(uint mii_reg, struct tsec_private * priv) return 0; } +/* Generic function which updates the speed and duplex. If + * autonegotiation is enabled, it uses the AND of the link + * partner's advertised capabilities and our advertised + * capabilities. If autonegotiation is disabled, we use the + * appropriate bits in the control register. + * + * Stolen from Linux's mii.c and phy_device.c + */ +uint mii_parse_link(uint mii_reg, struct tsec_private *priv) +{ + /* We're using autonegotiation */ + if (mii_reg & PHY_BMSR_AUTN_ABLE) { + uint lpa = 0; + uint gblpa = 0; + + /* Check for gigabit capability */ + if (mii_reg & PHY_BMSR_EXT) { + /* We want a list of states supported by + * both PHYs in the link + */ + gblpa = read_phy_reg(priv, PHY_1000BTSR); + gblpa &= read_phy_reg(priv, PHY_1000BTCR) << 2; + } + + /* Set the baseline so we only have to set them + * if they're different + */ + priv->speed = 10; + priv->duplexity = 0; + + /* Check the gigabit fields */ + if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { + priv->speed = 1000; + + if (gblpa & PHY_1000BTSR_1000FD) + priv->duplexity = 1; + + /* We're done! */ + return 0; + } + + lpa = read_phy_reg(priv, PHY_ANAR); + lpa &= read_phy_reg(priv, PHY_ANLPAR); + + if (lpa & (PHY_ANLPAR_TXFD | PHY_ANLPAR_TX)) { + priv->speed = 100; + + if (lpa & PHY_ANLPAR_TXFD) + priv->duplexity = 1; + + } else if (lpa & PHY_ANLPAR_10FD) + priv->duplexity = 1; + } else { + uint bmcr = read_phy_reg(priv, PHY_BMCR); + + priv->speed = 10; + priv->duplexity = 0; + + if (bmcr & PHY_BMCR_DPLX) + priv->duplexity = 1; + + if (bmcr & PHY_BMCR_1000_MBPS) + priv->speed = 1000; + else if (bmcr & PHY_BMCR_100_MBPS) + priv->speed = 100; + } + + return 0; +} + /* * Parse the BCM54xx status register for speed and duplex information. * The linux sungem_phy has this information, but in a table format. @@ -722,6 +792,7 @@ static void startup_tsec(struct eth_device *dev) /* Start up the PHY */ if(priv->phyinfo) phy_run_commands(priv, priv->phyinfo->startup); + adjust_link(dev); /* Enable Transmit and Receive */ @@ -1092,6 +1163,27 @@ struct phy_info phy_info_dm9161 = { {miim_end,} }, }; +/* a generic flavor. */ +struct phy_info phy_info_generic = { + 0, + "Unknown/Generic PHY", + 32, + (struct phy_cmd[]) { /* config */ + {PHY_BMCR, PHY_BMCR_RESET, NULL}, + {PHY_BMCR, PHY_BMCR_AUTON|PHY_BMCR_RST_NEG, NULL}, + {miim_end,} + }, + (struct phy_cmd[]) { /* startup */ + {PHY_BMSR, miim_read, NULL}, + {PHY_BMSR, miim_read, &mii_parse_sr}, + {PHY_BMSR, miim_read, &mii_parse_link}, + {miim_end,} + }, + (struct phy_cmd[]) { /* shutdown */ + {miim_end,} + } +}; + uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv) { @@ -1207,6 +1299,7 @@ struct phy_info *phy_info[] = { &phy_info_lxt971, &phy_info_VSC8244, &phy_info_dp83865, + &phy_info_generic, NULL }; -- 1.5.0.2.230.gfbe3d-dirty

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[U-Boot-Users] Latest git not working for MPC8349EMDS
by Benedict, Michael 02 May '07

02 May '07

Hello all, I am trying to update U-Boot on my MPC8349EA-MDS. I tried both the u-boot.git and u-boot-mpc83xx.git repositories. After I reset, I get nothing on the serial console. I was hoping someone might have a suggestion before I try to configure the BDI-2000 for this target and begin debugging this. BDI configs for the 8349EA-MDS would also be appreciated. Thank you! Michael

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[U-Boot-Users] [PATCH] FreeScale MC68360 support
by Matvejchikov Ilya 02 May '07

02 May '07

Good day! This patch adds support for MC68360 based board for u-boot-1.1.6. Mail me if you have any questions :) Best regards, Matvejchikov Ilya.

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[U-Boot-Users] Bug in the Makefile - MPC8360EMDS_config section
by David Saada 02 May '07

02 May '07

Hi, The latest version's Makefile seems to have a bug in the MPC8360EMDS_config (and derivatives) section: The include/config.h file is not generated in the build directory (represented by $(obj)) but always in the source directory. Therefore, building this board in an external directory (with O=<dir>) always fails. In addition, the build directory isn't initially created. IMO this should be the same as other board config sections (with mkdir at the beginning, and prepending $(obj) to include/config.h). Regards, David

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Re: [U-Boot-Users] U-boot & MonteJade start up
by Martijn de Gouw 02 May '07

02 May '07

Hi > I have to admit, that I don't know right now, where this big > endian/little > endian change is made. Perhaps some boot-strapping pin? Not > sure, would have > to look in the manual. Martijn? Could you jump in here? first lines in cpu/ixp/start.S reset: /* disable mmu, set big-endian */ > For the 2 IXP4xx boards I used (ixdpg425 and pdnb3) I can > say, that they "just > work" with the current U-Boot implementation in big endian > mode. And here The NPEs won't work when the cpu is run in little endian mode, according to the datasheet. best regards, Martijn de Gouw

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[U-Boot-Users] [PATCH] Conditionalize 8641 Rev1.0 MCM workarounds
by Jon Loeliger 01 May '07

01 May '07

From: James Yang <James.Yang(a)freescale.com> Signed-off-by: James Yang <James.Yang(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- cpu/mpc86xx/start.S | 42 ++++++++++++++++++++++++++++-------------- include/mpc86xx.h | 9 +++++++++ 2 files changed, 37 insertions(+), 14 deletions(-) diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 7406fe2..67c56db 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -241,26 +241,40 @@ in_flash: bl setup_ccsrbar #endif - /* Fix for SMP linux - Changing arbitration to round-robin */ - lis r3, CFG_CCSRBAR@h - ori r3, r3, 0x1000 - xor r4, r4, r4 - li r4, 0x1000 - stw r4, 0(r3) - /* setup the law entries */ - bl law_entry + /* -- MPC8641 Rev 1.0 MCM Errata fixups -- */ + + /* skip fixups if not Rev 1.0 */ + mfspr r4, SVR + rlwinm r4,r4,0,24,31 + cmpwi r4,0x10 + bne 1f + + lis r3,MCM_ABCR@ha + lwz r4,MCM_ABCR@l(r3) /* ABCR -> r4 */ + + /* set ABCR[A_STRM_CNT] = 0 */ + rlwinm r4,r4,0,0,29 + + /* set ABCR[ARB_POLICY] to 0x1 (round-robin) */ + addi r0,r0,1 + rlwimi r4,r0,12,18,19 + + stw r4,MCM_ABCR@l(r3) /* r4 -> ABCR */ sync - /* Don't use this feature due to bug in 8641D PD4 */ - /* Disable ERD_DIS */ - lis r3, CFG_CCSRBAR@h - ori r3, r3, 0x1008 - lwz r4, 0(r3) + /* Set DBCR[ERD_DIS] */ + lis r3,MCM_DBCR@ha + lwz r4,MCM_DBCR@l(r3) oris r4, r4, 0x4000 - stw r4, 0(r3) + stw r4,MCM_DBCR@l(r3) + sync +1: + /* setup the law entries */ + bl law_entry sync + #if (EMULATOR_RUN == 1) /* On the emulator we want to adjust these ASAP */ /* otherwise things are sloooow */ diff --git a/include/mpc86xx.h b/include/mpc86xx.h index bc8ba3f..673bfed 100644 --- a/include/mpc86xx.h +++ b/include/mpc86xx.h @@ -9,6 +9,15 @@ #define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */ + +/* + * platform register addresses + */ + +#define GUTS_SVR (CFG_CCSRBAR + 0xE00A4) +#define MCM_ABCR (CFG_CCSRBAR + 0x01000) +#define MCM_DBCR (CFG_CCSRBAR + 0x01008) + /* * l2cr values. Look in config_<BOARD>.h for the actual setup */ -- 1.5.0.3

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[U-Boot-Users] [PATCH] Rewrote picos_to_clk() to avoid rounding errors.
by Jon Loeliger 01 May '07

01 May '07

From: James Yang <James.Yang(a)freescale.com> Clarified that conversion is to DRAM clocks rather than platform clocks. Made function static to spd_sdram.c. Signed-off-by: James Yang <James.Yang(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- cpu/mpc86xx/spd_sdram.c | 28 ++++++++++++++++++++-------- 1 files changed, 20 insertions(+), 8 deletions(-) diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index ac9ff81..f37ab43 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -51,20 +51,32 @@ extern int dma_xfer(void *dest, uint count, void *src); #define CFG_SUPER_BANK_INTERLEAVING 0 /* - * Convert picoseconds into clock cycles (rounding up if needed). + * Convert picoseconds into DRAM clock cycles (rounding up if needed). */ -int -picos_to_clk(int picos) +static unsigned int +picos_to_clk(unsigned int picos) { - int clks; - - clks = picos / (2000000000 / (get_bus_freq(0) / 1000)); - if (picos % (2000000000 / (get_bus_freq(0) / 1000)) != 0) { + /* use unsigned long long to avoid rounding errors */ + const unsigned long long ULL_2e12 = 2000000000000ULL; + unsigned long long clks; + unsigned long long clks_temp; + + if (! picos) + return 0; + + clks = get_bus_freq(0) * (unsigned long long) picos; + clks_temp = clks; + clks = clks / ULL_2e12; + if (clks_temp % ULL_2e12) { clks++; } - return clks; + if (clks > 0xFFFFFFFFULL) { + clks = 0xFFFFFFFFULL; + } + + return (unsigned int) clks; } -- 1.5.0.3

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