November 2007 - U-Boot

[U-Boot-Users] 8610: Add diufb=15M to default kernel command lines
by Timur Tabi 07 Nov '07

07 Nov '07

In order for the Freescale MPC8610 HPCD Linux kernel to boot with the DIU framebuffer driver, the parameter "diu=15M" must be passed on the kernel command line. This patch adds that to the default U-Boot environment variable set. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- include/configs/MPC8610HPCD.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 9fa42f3..ab0f7cf 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -621,7 +621,7 @@ "diuregs=md e002c000 1d\0" \ "dium=mw e002c01c\0" \ "diuerr=md e002c014 1\0" \ - "othbootargs=debug\0" \ + "othbootargs=diufb=15M debug\0" \ "pmregs=md e00e1000 2b\0" \ "lawregs=md e0000c08 4b\0" \ "lbcregs=md e0005000 36\0" \ @@ -637,6 +637,7 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "consoledev=ttyS0\0" \ + "othbootargs=diufb=15M\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ "dtbaddr=c00000\0" \ -- 1.5.2.4

1 0

[U-Boot-Users] [GIT PULL] [ARM] Please pull from git://www.denx.de/git/u-boot-arm.git
by Peter Pearse 07 Nov '07

07 Nov '07

Wolfgang Please pull from git://www.denx.de/git/u-boot-arm.git The changes address your comments:- >> Moved to asm-arm as coloured_led.h > I still would rather have this integrated into the existing status_led driver. Incorporated coloured_led.h into status_led.h >> - ran Lindent on it (drivers/at45.c) > Actually the new version is even worse. It has many lines which are not indented by multiple of 8 chars. Revisited Signed-off-by: Peter Pearse <peter.pearse(a)arm.com> Regards Peter --- The following changes since commit afd477b227c089f2b7ce0aadb20b9ea7dc6ee6f8: Peter Pearse (1): Merge with git://www.denx.de/git/u-boot.git are found in the git repository at: git://www.denx.de/git/u-boot-arm.git Peter Pearse (1): Move coloured led API to status_led.h cpu/arm920t/start.S | 2 +- drivers/at45.c | 180 ++++++++++++++++++++------------------- include/asm-arm/coloured_led.h | 45 ---------- include/status_led.h | 21 +++++ 4 files changed, 114 insertions(+), 134 deletions(-) mode change 100755 => 100644 drivers/at45.c delete mode 100644 include/asm-arm/coloured_led.h ---

3 4

[U-Boot-Users] [PATCH] ARM optimized memcpy/memmove routines
by llandre 07 Nov '07

07 Nov '07

Hi, this patch replaces standard ARM memcpy/memmove routines with Linux versions that are much faster. Regards, llandre DAVE Electronics System House - R&D Department web: http://www.dave-tech.it email: r&d2(a)dave-tech.it Signed-off-by: Andrea Marson <r&d2(a)dave-tech.it> diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h new file mode 100644 index 0000000..fce8328 --- /dev/null +++ b/include/asm-arm/assembler.h @@ -0,0 +1,101 @@ +/* + * linux/include/asm-arm/assembler.h + * + * Copyright (C) 1996-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file contains arm architecture specific defines + * for the different processors. + * + * Do not include any C declarations in this file - it is included by + * assembler source. + */ +#ifndef __ASSEMBLY__ +#error "Only include this from assembly code" +#endif + +#include <asm/ptrace.h> + +/* + * Endian independent macros for shifting bytes within registers. + */ +#ifndef __ARMEB__ +#define pull lsr +#define push lsl +#define get_byte_0 lsl #0 +#define get_byte_1 lsr #8 +#define get_byte_2 lsr #16 +#define get_byte_3 lsr #24 +#define put_byte_0 lsl #0 +#define put_byte_1 lsl #8 +#define put_byte_2 lsl #16 +#define put_byte_3 lsl #24 +#else +#define pull lsl +#define push lsr +#define get_byte_0 lsr #24 +#define get_byte_1 lsr #16 +#define get_byte_2 lsr #8 +#define get_byte_3 lsl #0 +#define put_byte_0 lsl #24 +#define put_byte_1 lsl #16 +#define put_byte_2 lsl #8 +#define put_byte_3 lsl #0 +#endif + +/* + * Data preload for architectures that support it + */ +#if __LINUX_ARM_ARCH__ >= 5 +#define PLD(code...) code +#else +#define PLD(code...) +#endif + +/* + * Enable and disable interrupts + */ +#if __LINUX_ARM_ARCH__ >= 6 + .macro disable_irq + cpsid i + .endm + + .macro enable_irq + cpsie i + .endm +#else + .macro disable_irq + msr cpsr_c, #PSR_I_BIT | SVC_MODE + .endm + + .macro enable_irq + msr cpsr_c, #SVC_MODE + .endm +#endif + +/* + * Save the current IRQ state and disable IRQs. Note that this macro + * assumes FIQs are enabled, and that the processor is in SVC mode. + */ + .macro save_and_disable_irqs, oldcpsr + mrs \oldcpsr, cpsr + disable_irq + .endm + +/* + * Restore interrupt state previously stored in a register. We don't + * guarantee that this will preserve the flags. + */ + .macro restore_irqs, oldcpsr + msr cpsr_c, \oldcpsr + .endm + +#define USER(x...) \ +9999: x; \ + .section __ex_table,"a"; \ + .align 3; \ + .long 9999b,9001f; \ + .previous diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h new file mode 100644 index 0000000..dbe4b4e --- /dev/null +++ b/include/asm-arm/linkage.h @@ -0,0 +1,7 @@ +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H + +#define __ALIGN .align 0 +#define __ALIGN_STR ".align 0" + +#endif diff --git a/include/asm-arm/string.h b/include/asm-arm/string.h index c3ea582..3fb0ab4 100644 --- a/include/asm-arm/string.h +++ b/include/asm-arm/string.h @@ -12,10 +12,10 @@ extern char * strrchr(const char * s, int c); #undef __HAVE_ARCH_STRCHR extern char * strchr(const char * s, int c); -#undef __HAVE_ARCH_MEMCPY +#define __HAVE_ARCH_MEMCPY extern void * memcpy(void *, const void *, __kernel_size_t); -#undef __HAVE_ARCH_MEMMOVE +#define __HAVE_ARCH_MEMMOVE extern void * memmove(void *, const void *, __kernel_size_t); #undef __HAVE_ARCH_MEMCHR diff --git a/include/linux/linkage.h b/include/linux/linkage.h new file mode 100644 index 0000000..6c9873f --- /dev/null +++ b/include/linux/linkage.h @@ -0,0 +1,67 @@ +#ifndef _LINUX_LINKAGE_H +#define _LINUX_LINKAGE_H + +#include <asm/linkage.h> + +#ifdef __cplusplus +#define CPP_ASMLINKAGE extern "C" +#else +#define CPP_ASMLINKAGE +#endif + +#ifndef asmlinkage +#define asmlinkage CPP_ASMLINKAGE +#endif + +#ifndef prevent_tail_call +# define prevent_tail_call(ret) do { } while (0) +#endif + +#ifndef __ALIGN +#define __ALIGN .align 4,0x90 +#define __ALIGN_STR ".align 4,0x90" +#endif + +#ifdef __ASSEMBLY__ + +#define ALIGN __ALIGN +#define ALIGN_STR __ALIGN_STR + +#ifndef ENTRY +#define ENTRY(name) \ + .globl name; \ + ALIGN; \ + name: +#endif + +#define KPROBE_ENTRY(name) \ + .pushsection .kprobes.text, "ax"; \ + ENTRY(name) + +#define KPROBE_END(name) \ + END(name); \ + .popsection + +#ifndef END +#define END(name) \ + .size name, .-name +#endif + +#ifndef ENDPROC +#define ENDPROC(name) \ + .type name, @function; \ + END(name) +#endif + +#endif + +#define NORET_TYPE /**/ +#define ATTRIB_NORET __attribute__((noreturn)) +#define NORET_AND noreturn, + +#ifndef FASTCALL +#define FASTCALL(x) x +#define fastcall +#endif + +#endif diff --git a/lib_arm/Makefile b/lib_arm/Makefile index 037c475..8be5622 100644 --- a/lib_arm/Makefile +++ b/lib_arm/Makefile @@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).a -SOBJS = _ashldi3.o _ashrdi3.o _divsi3.o _modsi3.o _udivsi3.o _umodsi3.o +SOBJS = _ashldi3.o _ashrdi3.o _divsi3.o _modsi3.o _udivsi3.o _umodsi3.o \ + memcpy.o memmove.o COBJS = armlinux.o board.o \ cache.o div0.o diff --git a/lib_arm/copy_template.S b/lib_arm/copy_template.S new file mode 100644 index 0000000..cab355c --- /dev/null +++ b/lib_arm/copy_template.S @@ -0,0 +1,255 @@ +/* + * linux/arch/arm/lib/copy_template.s + * + * Code template for optimized memory copy functions + * + * Author: Nicolas Pitre + * Created: Sep 28, 2005 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * This can be used to enable code to cacheline align the source pointer. + * Experiments on tested architectures (StrongARM and XScale) didn't show + * this a worthwhile thing to do. That might be different in the future. + */ +//#define CALGN(code...) code +#define CALGN(code...) + +/* + * Theory of operation + * ------------------- + * + * This file provides the core code for a forward memory copy used in + * the implementation of memcopy(), copy_to_user() and copy_from_user(). + * + * The including file must define the following accessor macros + * according to the need of the given function: + * + * ldr1w ptr reg abort + * + * This loads one word from 'ptr', stores it in 'reg' and increments + * 'ptr' to the next word. The 'abort' argument is used for fixup tables. + * + * ldr4w ptr reg1 reg2 reg3 reg4 abort + * ldr8w ptr, reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort + * + * This loads four or eight words starting from 'ptr', stores them + * in provided registers and increments 'ptr' past those words. + * The'abort' argument is used for fixup tables. + * + * ldr1b ptr reg cond abort + * + * Similar to ldr1w, but it loads a byte and increments 'ptr' one byte. + * It also must apply the condition code if provided, otherwise the + * "al" condition is assumed by default. + * + * str1w ptr reg abort + * str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort + * str1b ptr reg cond abort + * + * Same as their ldr* counterparts, but data is stored to 'ptr' location + * rather than being loaded. + * + * enter reg1 reg2 + * + * Preserve the provided registers on the stack plus any additional + * data as needed by the implementation including this code. Called + * upon code entry. + * + * exit reg1 reg2 + * + * Restore registers with the values previously saved with the + * 'preserv' macro. Called upon code termination. + */ + + + enter r4, lr + + subs r2, r2, #4 + blt 8f + ands ip, r0, #3 + PLD( pld [r1, #0] ) + bne 9f + ands ip, r1, #3 + bne 10f + +1: subs r2, r2, #(28) + stmfd sp!, {r5 - r8} + blt 5f + + CALGN( ands ip, r1, #31 ) + CALGN( rsb r3, ip, #32 ) + CALGN( sbcnes r4, r3, r2 ) @ C is always set here + CALGN( bcs 2f ) + CALGN( adr r4, 6f ) + CALGN( subs r2, r2, r3 ) @ C gets set + CALGN( add pc, r4, ip ) + + PLD( pld [r1, #0] ) +2: PLD( subs r2, r2, #96 ) + PLD( pld [r1, #28] ) + PLD( blt 4f ) + PLD( pld [r1, #60] ) + PLD( pld [r1, #92] ) + +3: PLD( pld [r1, #124] ) +4: ldr8w r1, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f + subs r2, r2, #32 + str8w r0, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f + bge 3b + PLD( cmn r2, #96 ) + PLD( bge 4b ) + +5: ands ip, r2, #28 + rsb ip, ip, #32 + addne pc, pc, ip @ C is always clear here + b 7f +6: nop + ldr1w r1, r3, abort=20f + ldr1w r1, r4, abort=20f + ldr1w r1, r5, abort=20f + ldr1w r1, r6, abort=20f + ldr1w r1, r7, abort=20f + ldr1w r1, r8, abort=20f + ldr1w r1, lr, abort=20f + + add pc, pc, ip + nop + nop + str1w r0, r3, abort=20f + str1w r0, r4, abort=20f + str1w r0, r5, abort=20f + str1w r0, r6, abort=20f + str1w r0, r7, abort=20f + str1w r0, r8, abort=20f + str1w r0, lr, abort=20f + + CALGN( bcs 2b ) + +7: ldmfd sp!, {r5 - r8} + +8: movs r2, r2, lsl #31 + ldr1b r1, r3, ne, abort=21f + ldr1b r1, r4, cs, abort=21f + ldr1b r1, ip, cs, abort=21f + str1b r0, r3, ne, abort=21f + str1b r0, r4, cs, abort=21f + str1b r0, ip, cs, abort=21f + + exit r4, pc + +9: rsb ip, ip, #4 + cmp ip, #2 + ldr1b r1, r3, gt, abort=21f + ldr1b r1, r4, ge, abort=21f + ldr1b r1, lr, abort=21f + str1b r0, r3, gt, abort=21f + str1b r0, r4, ge, abort=21f + subs r2, r2, ip + str1b r0, lr, abort=21f + blt 8b + ands ip, r1, #3 + beq 1b + +10: bic r1, r1, #3 + cmp ip, #2 + ldr1w r1, lr, abort=21f + beq 17f + bgt 18f + + + .macro forward_copy_shift pull push + + subs r2, r2, #28 + blt 14f + + CALGN( ands ip, r1, #31 ) + CALGN( rsb ip, ip, #32 ) + CALGN( sbcnes r4, ip, r2 ) @ C is always set here + CALGN( subcc r2, r2, ip ) + CALGN( bcc 15f ) + +11: stmfd sp!, {r5 - r9} + + PLD( pld [r1, #0] ) + PLD( subs r2, r2, #96 ) + PLD( pld [r1, #28] ) + PLD( blt 13f ) + PLD( pld [r1, #60] ) + PLD( pld [r1, #92] ) + +12: PLD( pld [r1, #124] ) +13: ldr4w r1, r4, r5, r6, r7, abort=19f + mov r3, lr, pull #\pull + subs r2, r2, #32 + ldr4w r1, r8, r9, ip, lr, abort=19f + orr r3, r3, r4, push #\push + mov r4, r4, pull #\pull + orr r4, r4, r5, push #\push + mov r5, r5, pull #\pull + orr r5, r5, r6, push #\push + mov r6, r6, pull #\pull + orr r6, r6, r7, push #\push + mov r7, r7, pull #\pull + orr r7, r7, r8, push #\push + mov r8, r8, pull #\pull + orr r8, r8, r9, push #\push + mov r9, r9, pull #\pull + orr r9, r9, ip, push #\push + mov ip, ip, pull #\pull + orr ip, ip, lr, push #\push + str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f + bge 12b + PLD( cmn r2, #96 ) + PLD( bge 13b ) + + ldmfd sp!, {r5 - r9} + +14: ands ip, r2, #28 + beq 16f + +15: mov r3, lr, pull #\pull + ldr1w r1, lr, abort=21f + subs ip, ip, #4 + orr r3, r3, lr, push #\push + str1w r0, r3, abort=21f + bgt 15b + CALGN( cmp r2, #0 ) + CALGN( bge 11b ) + +16: sub r1, r1, #(\push / 8) + b 8b + + .endm + + + forward_copy_shift pull=8 push=24 + +17: forward_copy_shift pull=16 push=16 + +18: forward_copy_shift pull=24 push=8 + + +/* + * Abort preamble and completion macros. + * If a fixup handler is required then those macros must surround it. + * It is assumed that the fixup code will handle the private part of + * the exit macro. + */ + + .macro copy_abort_preamble +19: ldmfd sp!, {r5 - r9} + b 21f +20: ldmfd sp!, {r5 - r8} +21: + .endm + + .macro copy_abort_end + ldmfd sp!, {r4, pc} + .endm + diff --git a/lib_arm/memcpy.S b/lib_arm/memcpy.S new file mode 100644 index 0000000..7e71d67 --- /dev/null +++ b/lib_arm/memcpy.S @@ -0,0 +1,59 @@ +/* + * linux/arch/arm/lib/memcpy.S + * + * Author: Nicolas Pitre + * Created: Sep 28, 2005 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> +#include <asm/assembler.h> + + .macro ldr1w ptr reg abort + ldr \reg, [\ptr], #4 + .endm + + .macro ldr4w ptr reg1 reg2 reg3 reg4 abort + ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4} + .endm + + .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort + ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} + .endm + + .macro ldr1b ptr reg cond=al abort + ldr\cond\()b \reg, [\ptr], #1 + .endm + + .macro str1w ptr reg abort + str \reg, [\ptr], #4 + .endm + + .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort + stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} + .endm + + .macro str1b ptr reg cond=al abort + str\cond\()b \reg, [\ptr], #1 + .endm + + .macro enter reg1 reg2 + stmdb sp!, {r0, \reg1, \reg2} + .endm + + .macro exit reg1 reg2 + ldmfd sp!, {r0, \reg1, \reg2} + .endm + + .text + +/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */ + +ENTRY(memcpy) + +#include "copy_template.S" + diff --git a/lib_arm/memmove.S b/lib_arm/memmove.S new file mode 100644 index 0000000..ef7fddc --- /dev/null +++ b/lib_arm/memmove.S @@ -0,0 +1,206 @@ +/* + * linux/arch/arm/lib/memmove.S + * + * Author: Nicolas Pitre + * Created: Sep 28, 2005 + * Copyright: (C) MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> +#include <asm/assembler.h> + +/* + * This can be used to enable code to cacheline align the source pointer. + * Experiments on tested architectures (StrongARM and XScale) didn't show + * this a worthwhile thing to do. That might be different in the future. + */ +//#define CALGN(code...) code +#define CALGN(code...) + + .text + +/* + * Prototype: void *memmove(void *dest, const void *src, size_t n); + * + * Note: + * + * If the memory regions don't overlap, we simply branch to memcpy which is + * normally a bit faster. Otherwise the copy is done going downwards. This + * is a transposition of the code from copy_template.S but with the copy + * occurring in the opposite direction. + */ + +ENTRY(memmove) + + subs ip, r0, r1 + cmphi r2, ip + bls memcpy + + stmfd sp!, {r0, r4, lr} + add r1, r1, r2 + add r0, r0, r2 + subs r2, r2, #4 + blt 8f + ands ip, r0, #3 + PLD( pld [r1, #-4] ) + bne 9f + ands ip, r1, #3 + bne 10f + +1: subs r2, r2, #(28) + stmfd sp!, {r5 - r8} + blt 5f + + CALGN( ands ip, r1, #31 ) + CALGN( sbcnes r4, ip, r2 ) @ C is always set here + CALGN( bcs 2f ) + CALGN( adr r4, 6f ) + CALGN( subs r2, r2, ip ) @ C is set here + CALGN( add pc, r4, ip ) + + PLD( pld [r1, #-4] ) +2: PLD( subs r2, r2, #96 ) + PLD( pld [r1, #-32] ) + PLD( blt 4f ) + PLD( pld [r1, #-64] ) + PLD( pld [r1, #-96] ) + +3: PLD( pld [r1, #-128] ) +4: ldmdb r1!, {r3, r4, r5, r6, r7, r8, ip, lr} + subs r2, r2, #32 + stmdb r0!, {r3, r4, r5, r6, r7, r8, ip, lr} + bge 3b + PLD( cmn r2, #96 ) + PLD( bge 4b ) + +5: ands ip, r2, #28 + rsb ip, ip, #32 + addne pc, pc, ip @ C is always clear here + b 7f +6: nop + ldr r3, [r1, #-4]! + ldr r4, [r1, #-4]! + ldr r5, [r1, #-4]! + ldr r6, [r1, #-4]! + ldr r7, [r1, #-4]! + ldr r8, [r1, #-4]! + ldr lr, [r1, #-4]! + + add pc, pc, ip + nop + nop + str r3, [r0, #-4]! + str r4, [r0, #-4]! + str r5, [r0, #-4]! + str r6, [r0, #-4]! + str r7, [r0, #-4]! + str r8, [r0, #-4]! + str lr, [r0, #-4]! + + CALGN( bcs 2b ) + +7: ldmfd sp!, {r5 - r8} + +8: movs r2, r2, lsl #31 + ldrneb r3, [r1, #-1]! + ldrcsb r4, [r1, #-1]! + ldrcsb ip, [r1, #-1] + strneb r3, [r0, #-1]! + strcsb r4, [r0, #-1]! + strcsb ip, [r0, #-1] + ldmfd sp!, {r0, r4, pc} + +9: cmp ip, #2 + ldrgtb r3, [r1, #-1]! + ldrgeb r4, [r1, #-1]! + ldrb lr, [r1, #-1]! + strgtb r3, [r0, #-1]! + strgeb r4, [r0, #-1]! + subs r2, r2, ip + strb lr, [r0, #-1]! + blt 8b + ands ip, r1, #3 + beq 1b + +10: bic r1, r1, #3 + cmp ip, #2 + ldr r3, [r1, #0] + beq 17f + blt 18f + + + .macro backward_copy_shift push pull + + subs r2, r2, #28 + blt 14f + + CALGN( ands ip, r1, #31 ) + CALGN( rsb ip, ip, #32 ) + CALGN( sbcnes r4, ip, r2 ) @ C is always set here + CALGN( subcc r2, r2, ip ) + CALGN( bcc 15f ) + +11: stmfd sp!, {r5 - r9} + + PLD( pld [r1, #-4] ) + PLD( subs r2, r2, #96 ) + PLD( pld [r1, #-32] ) + PLD( blt 13f ) + PLD( pld [r1, #-64] ) + PLD( pld [r1, #-96] ) + +12: PLD( pld [r1, #-128] ) +13: ldmdb r1!, {r7, r8, r9, ip} + mov lr, r3, push #\push + subs r2, r2, #32 + ldmdb r1!, {r3, r4, r5, r6} + orr lr, lr, ip, pull #\pull + mov ip, ip, push #\push + orr ip, ip, r9, pull #\pull + mov r9, r9, push #\push + orr r9, r9, r8, pull #\pull + mov r8, r8, push #\push + orr r8, r8, r7, pull #\pull + mov r7, r7, push #\push + orr r7, r7, r6, pull #\pull + mov r6, r6, push #\push + orr r6, r6, r5, pull #\pull + mov r5, r5, push #\push + orr r5, r5, r4, pull #\pull + mov r4, r4, push #\push + orr r4, r4, r3, pull #\pull + stmdb r0!, {r4 - r9, ip, lr} + bge 12b + PLD( cmn r2, #96 ) + PLD( bge 13b ) + + ldmfd sp!, {r5 - r9} + +14: ands ip, r2, #28 + beq 16f + +15: mov lr, r3, push #\push + ldr r3, [r1, #-4]! + subs ip, ip, #4 + orr lr, lr, r3, pull #\pull + str lr, [r0, #-4]! + bgt 15b + CALGN( cmp r2, #0 ) + CALGN( bge 11b ) + +16: add r1, r1, #(\pull / 8) + b 8b + + .endm + + + backward_copy_shift push=8 pull=24 + +17: backward_copy_shift push=16 pull=16 + +18: backward_copy_shift push=24 pull=8 +

1 0

[U-Boot-Users] Need the lists opinion on the "right" way to fix something (long)
by Bruce_Leonard＠selinc.com 07 Nov '07

07 Nov '07

Not long ago Grant put in a fix to .../common/cmd_fpga.c that was the right thing to do but introduced another problem. What he did was essentially this: - #if CFG_FPGA_XILINX + #if (CONFIG_FPGA & CFG_FPGA_XILINX) It's the right thing to do because the first always evaluated to true and (in Grant's opinion and mine) the real intent is to check CONFIG_FPGA and see if it's a Xilinx part. However, it introduces the following problem. CONFIG_FPGA is defined in the board specific config file and is usually going to be something like this: #define CONFIG_FPGA CFG_XILINX_SPARTAN3 Following CFG_XILINX_SPARTAN3 to .../include/xilinx.h you find: #define CFG_XILINX_SPARTAN3 CFG_FPGA_XILINX | CFG_SPARTAN3 Now as to the problem: .../common/cmd_fpga.c includes .../include/fpga.h but NOT .../include/xilinx.h. This makes sense because .../common/cmd_fpga.c is a common file not a Xilinx specific file. But, when the preprocessor hits Grant's fix it tries to substitute CFG_XILINX_SPARTAN3 for CONFIG_FPGA and can't because CFG_XILINX_SPARTAN3 is defined in .../include/xilinx.h. The simple solution is to include .../include/xilinx.h (which includes .../include/fpga.h) and life is happy. The reason I don't like doing that is because .../common/cmd_fpga.c is a common file and I believe it would be a "bad" thing to put Xilinx specific stuff into a common file. Of course the flip side of this is that the function fpga_loadbitsream() in .../common/cmd_fpga.c is already Xilinx specific. IMHO, it shouldn't be there in the first place but I understand why it's there. It's doing some pre-processing on the Xilinx BIT file prior to handing it to fpga_load(), which is a common high-level function that then starts drilling down to determine Altera vs. Xilinx, serial vs. parallel loading, etc. Since I've only been working with u-boot/open source for about 9 months, I'm not really sure what the design philosophies are and what the acceptable and/or "righ" way of fixing this would be. Any input or direction would be greatly appreciated. Thanks. Bruce

4 4

[U-Boot-Users] kb9202b support for u-boot v1.3.0-rc3
by Matthias Kaehlcke 06 Nov '07

06 Nov '07

hi, here is an adaption of the u-boot patches from kwikbyte to u-boot v1.3.0-rc3 for the kb9202b board. it would be interesting to have kb9202b support in upstream, what needs to be done to achieve this? best regards -- Matthias Kaehlcke Linux Application Developer Barcelona If sharing a thing in no way diminishes it, it is not rightly owned if it is not shared .''`. using free software / Debian GNU/Linux | http://debian.org : :' : `. `'` gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4 `-

2 1

[U-Boot-Users] Latest u-boot for TQM8548?
by Clemens Koller 06 Nov '07

06 Nov '07

Hi there! I've just tried try to upgrade the u-boote (or u-boots? ;-) on my TQM8540 and TQM8548 boards. How is the status of TQM8548 support in u-boot? Because there is no make target for it yet, I just hacked the Makefile: --- Makefile~ 2007-11-06 15:46:30.000000000 +0100 +++ Makefile 2007-11-06 17:29:04.000000000 +0100 @@ -1972,6 +1972,7 @@ stxssa_4M_config: unconfig TQM8540_config \ TQM8541_config \ +TQM8548_config \ TQM8555_config \ TQM8560_config: unconfig @mkdir -p $(obj)include but ended up with some missing DDR configuration: make[1]: Entering directory `/home/clemens/git/u-boot/board/tqm85xx' gcc -g -Os -fPIC -ffixed-r14 -meabi -D__KERNEL__ -DTEXT_BASE=0xfffc0000 -I/home/clemens/git/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/lib/gcc/powerpc-unknown-linux-gnu/4.2.0/include -pipe -DCONFIG_PPC -D__powerpc__ -DCONFIG_MPC85xx -DCONFIG_E500 -ffixed-r2 -ffixed-r29 -Wa,-me500 -msoft-float -mno-string -Wall -Wstrict-prototypes -c -o tqm85xx.o tqm85xx.c tqm85xx.c: In function 'cas_latency': tqm85xx.c:219: error: 'CONFIG_DDR_DEFAULT_CL' undeclared (first use in this function) tqm85xx.c:219: error: (Each undeclared identifier is reported only once tqm85xx.c:219: error: for each function it appears in.) make[1]: *** [tqm85xx.o] Error 1 make[1]: Leaving directory `/home/clemens/git/u-boot/board/tqm85xx' make: *** [board/tqm85xx/libtqm85xx.a] Error 2 Which means that much stuff from include/config/TQM85xx.h isn't selected for the MPC8548, yet. Are there any patches already available in some trees? The documentation of the TQM8548 isn't comprehensive enough to get an idea about the details of the DDR. Regards, -- Clemens Koller __________________________________ R&D Imaging Devices Anagramm GmbH Rupert-Mayer-Straße 45/1 Linhof Werksgelände D-81379 München Tel.089-741518-50 Fax 089-741518-19 http://www.anagramm-technology.com

2 1

[U-Boot-Users] DHCP vendor or class ID option
by Jeffrey Mann 06 Nov '07

06 Nov '07

U-boot users: I have been searching the list and reading source code trying to figure out if something that acomplishes vendor class ids or user class ids has been implemented in u-boot's dhcp services. (microsoft has a few articles that discuss uses of class IDS. http://support.microsoft.com/kb/266675) What I am trying to acomplish is this: I would like to be able to set slightly different DHCP options when the DHCP request comes from a board running u-boot. The point of this is to provide a shorter lease time (so we don't exceed the size of the address pool when testing boards) and also to allow different TFTP server addresses to be sent to these boards. I see that bp_vend[OPT_SIZE] exists in struct type Bootp_t. Is this a vendor class id? I see around line 334 in bootp.c this is coppied from BOOTP_VENDOR_MAGIC. Is setting a vendor class ID as simple as setting a value for BOOTP_VENDOR_MAGIC in the config file? I cannot find an example in any other board files. Thanks, Jeffrey Mann

2 1

[U-Boot-Users] AT91RM9200 Flash driver - disable of icache
by Balajee Premraj 06 Nov '07

06 Nov '07

HI, For the Atmel AT91RM9200EK In the flash driver, (board/at91rm9200dk/flash.c) , during the process of the flash erase and flash write operations, the icache of the cpu is being disabled. We are trying to understand the exact reason why the instruction cache is being disabled? Will enabling the cache cause any issues.? Is there a known errata regarding the same. Thanks,Balajee

1 0

[U-Boot-Users] Creating a valid bmp file
by Roger Williamson 06 Nov '07

06 Nov '07

Currently I'm attempting to make my u-boot display a splash screen. Currently, the display dirver is being uncooperative, so I decided to focus my attention on creating a bitmap image that will be considered acceptable to the u-boot system. I've read through the brief descriptions about the bmp command and transfering data into the flash, but I'm having some issue getting u-boot to recognize my bitmaps. All I'm getting out of the system is that "There is no valid bmp file at the given address." I know that the address I give is the address of the bitmap in flash, and I am able to transfer new bitmaps over to the flash, I am just perplexed on how to create a suitable bitmap image. What am I missing. Thank you, Roger Williamson Orbital TMS -- Colombia CE Software Engineer (443) 259-7320 Note: the disclaimer at the bottom is something that our outbound mail server attaches to our emails. The intended audience of this e-mail is the public domain, therefore if you are reading this message you are one of the intended recipients. (don't you love inane legal dribble?) ----------------------------------------- Notice: This e-mail is intended solely for use of the individual or entity to which it is addressed and may contain information that is proprietary, privileged and exempt from disclosure under applicable law. If the reader is not the intended recipient or agent responsible for delivering the message to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. This communication may also contain data subject to U.S. export laws. If so, that data subject to the International Traffic in Arms Regulation cannot be disseminated, distributed or copied to foreign nationals, residing in the U.S. or abroad, absent the express prior approval of the U.S. Department of State. If you have received this communication in error, please notify the sender by reply e-mail and destroy the e-mail message and any physical copies made of the communication. Thank you.

5 6

[U-Boot-Users] Want to Use char array without System support, but cannot find memset function.
by Kaiserempire 06 Nov '07

06 Nov '07

Hi, all: I am trying write a little bootloader same like the uboot. In my program I need to use the char array. when I link my program the ld show me an error: undefined reference to 'memset'. I want to know which lib includes this symbol. I use the arm-linux-gcc 3.2 I try to use the lib file libc.a (/usr/local/arm/lib) then the system show me another error: "Not enough room for program headers (allocated 5, need 6)" Can somebody help me? Thanks. -- 倔强的站在太阳下，感受柳动溪流荷花香 ---KaiserEmpire

2 1