October 2007 - U-Boot

[U-Boot-Users] [PATCH] Removed compiler issue (invalid lvalue) - CPU PXA270
by stefano babic 09 Jan '08

09 Jan '08

Code is broken for PXA270 due to "invalid lvalue in assignment". This patch fix it in pxa-regs.h Signed-off-by: Stefano Babic <sbabic(a)denx.de> -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de ===================================================================== >From c22ab518961157f7558a448e126d1372ba74fa5c Mon Sep 17 00:00:00 2001 From: Stefano Babic <sbabic(a)denx.de> Date: Thu, 30 Aug 2007 19:29:19 +0200 Subject: [PATCH] Removed compiler issue (invalid lvalue) --- include/asm-arm/arch-pxa/pxa-regs.h | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e8cb299..9b4da3a 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1288,15 +1288,15 @@ typedef void (*ExcpHndlr) (void) ; #define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) #define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) -#define GPLR(x) ((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3) -#define GPDR(x) ((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3) -#define GPSR(x) ((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3) -#define GPCR(x) ((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3) -#define GRER(x) ((((x) & 0x7f) < 96) ? _GRER(x) : GRER3) -#define GFER(x) ((((x) & 0x7f) < 96) ? _GFER(x) : GFER3) -#define GEDR(x) ((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3) -#define GAFR(x) ((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U)) +#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \ + ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3) #else #define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) -- 1.4.3.4

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[U-Boot-Users] [PATCH] MPC8568E-MDS: reset UCCs to use them reliably
by Anton Vorontsov 09 Jan '08

09 Jan '08

In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset UCCs. p.s Similar code exists in the Linux kernel board file (for capability reasons with older U-Boots), but should be removed some day. Signed-off-by: Anton Vorontsov <avorontsov(a)ru.mvista.com> --- board/mpc8568mds/bcsr.c | 21 +++++++++++++++++++++ board/mpc8568mds/bcsr.h | 9 +++++++++ board/mpc8568mds/mpc8568mds.c | 3 +++ 3 files changed, 33 insertions(+), 0 deletions(-) diff --git a/board/mpc8568mds/bcsr.c b/board/mpc8568mds/bcsr.c index aae0f98..791a50f 100644 --- a/board/mpc8568mds/bcsr.c +++ b/board/mpc8568mds/bcsr.c @@ -21,6 +21,8 @@ */ #include <common.h> +#include <asm/io.h> + #include "bcsr.h" void enable_8568mds_duart() @@ -54,3 +56,22 @@ void enable_8568mds_qe_mdio() bcsr[7] |= 0x01; } + +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) +void reset_8568mds_uccs(void) +{ + volatile u8 *bcsr = (u8 *)(CFG_BCSR); + + /* Turn off UCC1 & UCC2 */ + out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); + out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); + + /* Mode is RGMII, all bits clear */ + out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | + BCSR_UCC2_MODE_MSK)); + + /* Turn UCC1 & UCC2 on */ + out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); + out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); +} +#endif diff --git a/board/mpc8568mds/bcsr.h b/board/mpc8568mds/bcsr.h index aefd9bf..f7f70bc 100644 --- a/board/mpc8568mds/bcsr.h +++ b/board/mpc8568mds/bcsr.h @@ -90,6 +90,11 @@ 7 Flash write protect */ +#define BCSR_UCC1_GETH_EN (0x1 << 7) +#define BCSR_UCC2_GETH_EN (0x1 << 7) +#define BCSR_UCC1_MODE_MSK (0x3 << 4) +#define BCSR_UCC2_MODE_MSK (0x3 << 0) + /*BCSR Utils functions*/ void enable_8568mds_duart(void); @@ -97,4 +102,8 @@ void enable_8568mds_flash_write(void); void disable_8568mds_flash_write(void); void enable_8568mds_qe_mdio(void); +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) +void reset_8568mds_uccs(void); +#endif + #endif /* __BCSR_H_ */ diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c index 818ff13..2b3f44f 100644 --- a/board/mpc8568mds/mpc8568mds.c +++ b/board/mpc8568mds/mpc8568mds.c @@ -106,6 +106,9 @@ int board_early_init_f (void) enable_8568mds_duart(); enable_8568mds_flash_write(); +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) + reset_8568mds_uccs(); +#endif #if defined(CONFIG_QE) && !defined(CONFIG_eTSEC_MDIO_BUS) enable_8568mds_qe_mdio(); #endif -- 1.5.0.6

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[U-Boot-Users] Linux kernel hang (infinite loop)
by Madhu Saravana Sibi Govindan 02 Jan '08

02 Jan '08

Hello all, I'm using U-boot to bring up a custom 440gp-based board. We are able to transfer the kernel image (uImage) to the target board's memory and jump to it. But, the kernel seems to hang after that. We have verified that the board info struct and the clock frequencies are ok. We also have a BDI2000 hardware debugger with us, but we are unable to set any breakpoints using this (both using telnet or using gdb). However, I can use the telnet interface and single-step the 440gp after it seems to hang. I found that 440gp is infinitely looping through the "DataTLBError" routine. It is unclear to me what might have caused this in the first place. Has anyone seen this behaviour before? We are currently working on getting breakpoints to work using the BDI2000. Any help is greatly appreciated. Regards, G.Sibi

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[U-Boot-Users] [PATCH 0/4] PPC4xx: Add board-independent support for DDR2 SPD DIMMs on 440EPx/GRx
by Larry Johnson 17 Dec '07

17 Dec '07

Summary: board/amcc/sequoia/sdram.h | 4 +- board/lwmon5/sdram.h | 4 +- cpu/ppc4xx/Makefile | 31 +- cpu/ppc4xx/denali_data_eye.c | 396 +++++++++++++ cpu/ppc4xx/denali_spd_ddr2.c | 1276 ++++++++++++++++++++++++++++++++++++++++++ include/ppc440.h | 514 +++++++++++++++-- 6 files changed, 2167 insertions(+), 58 deletions(-) This patch adds SPD DDR2 support for the 440EPx ("Denali") SDRAM controller. It should also work on the 440GRx. It is based on the DDR2 SPD code for the 440EP/440EPx, but makes no provision for DDR1 support. It also takes EPx/GRx SDRAM definitions and support code that are specific to the Sequoia/Rainier and lwmon5 boards, and copies them to general 4xx directories. (Neither Stefan nor I are happy with the names of the two new files, so suggestions are welcome!) This code has been tested on prototype Korat boards with three Kingston DIMMS: 512 MiB ECC (one rank), 512 MiB non-ECC (one rank) and 1 GiB ECC (two ranks), at PLB frequencies of 133 MHz and 166 MHz. The Korat board has a single DIMM socket, but support has been provided (though not tested) for boards with two DIMM sockets. The first patch adds the Denali SDRAM controller definitions to "ppc440.h". It also fixes two typos in the definitions, so the board- specific "sdram.h" files containing these definitions are also fixed to avoid compiler warnings. The second patch creates a non-board-specific file for performing the SDRAM data-eye search. The only significant change from the board- specific code is that error checking on reads uses ECC error information in addition to checking the value of the data read back. This eliminates the theoretical possibility that a bad read might be masked by the ECC. The third patch creates a file containing the code to configure the SDRAM controller based on the contents of the DIMMs SPDs. The fourth patch modifies "Makefile" to build the two new files when appropriate. All comments and suggestions will be appreciated. -- Best regards, Larry Johnson <lrj(a)acm.org>

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[U-Boot-Users] [PATCH] fdt: add common memory fixup function
by Martin Krause 27 Nov '07

27 Nov '07

Add the function fdt_memory() to fixup the /memory node of the fdt with the memory values detected by U-Boot (taken from bd->bi_memstart and bd->bi_memsize). The new function is called for all boards which define CONFIG_OF_LIBFDT. This patch removes already existing board specific memory fixup routines for boards wich have CONFIG_OF_LIBFDT defined and switches them to the new routine. Boards wich use the CONIFG_OF_FLAT_TREE method are not touched. Signed-off-by: Martin Krause <martin.krause(a)tqs.de> --- Updated patch. Please ignore all former versions. Best Regards, Martin Krause board/cds/common/ft_board.c | 9 --------- board/cm5200/cm5200.c | 22 ++-------------------- common/cmd_bootm.c | 10 ++++++++++ common/fdt_support.c | 41 +++++++++++++++++++++++++++++++++++++++++ cpu/mpc83xx/cpu.c | 17 ----------------- include/fdt_support.h | 1 + 6 files changed, 54 insertions(+), 46 deletions(-) diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 9d97905..be0e824 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -56,20 +56,11 @@ static void cds_pci_fixup(void *blob) void ft_board_setup(void *blob, bd_t *bd) { - u32 *p; - int len; - #ifdef CONFIG_PCI ft_pci_setup(blob, bd); #endif ft_cpu_setup(blob, bd); - p = ft_get_prop(blob, "/memory/reg", &len); - if (p != NULL) { - *p++ = cpu_to_be32(bd->bi_memstart); - *p = cpu_to_be32(bd->bi_memsize); - } - cds_pci_fixup(blob); } #endif diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index e2ab5b8..b2a64c7 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -256,14 +256,13 @@ static void compose_hostname(hw_id_t hw_id, char *buf) #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) /* - * Update 'model' and 'memory' properties in the blob according to the module - * that we are running on. + * Update 'model' property in the blob according to the module that we are + * running on. */ static void ft_blob_update(void *blob, bd_t *bd) { int len, ret, nodeoffset = 0; char module_name[MODULE_NAME_MAXLEN] = {0}; - ulong memory_data[2] = {0}; compose_module_name(hw_id, module_name); len = strlen(module_name) + 1; @@ -272,23 +271,6 @@ static void ft_blob_update(void *blob, bd_t *bd) if (ret < 0) printf("ft_blob_update(): cannot set /model property err:%s\n", fdt_strerror(ret)); - - memory_data[0] = cpu_to_be32(bd->bi_memstart); - memory_data[1] = cpu_to_be32(bd->bi_memsize); - - nodeoffset = fdt_find_node_by_path (blob, "/memory"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, - sizeof(memory_data)); - if (ret < 0) - printf("ft_blob_update): cannot set /memory/reg " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /memory node " - "err:%s\n", fdt_strerror(nodeoffset)); - } } #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index d816349..3381c07 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -992,6 +992,16 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, do_reset (cmdtp, flag, argc, argv); } #endif + /* + * Add the "/memory" node if it does not exist, and do a fixup + * of the "reg" property with values detected by U-Boot + * (taken from bd->bi_memstart and bd->bi_memsize). + */ + if (fdt_memory(of_flat_tree) < 0) { + puts ("ERROR: /memory node create failed - " + "must RESET the board to recover.\n"); + do_reset (cmdtp, flag, argc, argv); + } #ifdef CONFIG_OF_BOARD_SETUP /* Call the board-specific fixup routine */ ft_board_setup(of_flat_tree, gd->bd); diff --git a/common/fdt_support.c b/common/fdt_support.c index 175d59e..ee434d6 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -348,4 +348,45 @@ int fdt_bd_t(void *fdt) } #endif /* ifdef CONFIG_OF_HAS_BD_T */ +/********************************************************************/ + +int fdt_memory(void *fdt) +{ + int nodeoffset; + int err; + u32 tmp[2]; + bd_t *bd = gd->bd; + + err = fdt_check_header(fdt); + if (err < 0) { + printf("fdt_memory: %s\n", fdt_strerror(err)); + return err; + } + /* update, or add and update /memory node */ + nodeoffset = fdt_find_node_by_path(fdt, "/memory"); + if (nodeoffset < 0) { + nodeoffset = fdt_add_subnode(fdt, 0, "memory"); + if (nodeoffset < 0) + printf("WARNING could not create /memory: %s.\n", + fdt_strerror(nodeoffset)); + return nodeoffset; + } + err = fdt_setprop(fdt, nodeoffset, "device_type", "memory", + sizeof("memory")); + if (err < 0) { + printf("WARNING: could not set %s %s.\n", + "device_type", fdt_strerror(err)); + return err; + } + tmp[0] = cpu_to_be32(bd->bi_memstart); + tmp[1] = cpu_to_be32(bd->bi_memsize); + err = fdt_setprop(fdt, nodeoffset, "reg", tmp, sizeof(tmp)); + if (err < 0) { + printf("WARNING: could not set %s %s.\n", + "reg", fdt_strerror(err)); + return err; + } + return 0; +} + #endif /* CONFIG_OF_LIBFDT */ diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index e634f0a..51b63e6 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -526,7 +526,6 @@ ft_cpu_setup(void *blob, bd_t *bd) int nodeoffset; int err; int j; - int tmp[2]; for (j = 0; j < (sizeof(fixup_props) / sizeof(fixup_props[0])); j++) { nodeoffset = fdt_find_node_by_path(blob, fixup_props[j].node); @@ -542,22 +541,6 @@ ft_cpu_setup(void *blob, bd_t *bd) fixup_props[j].node, fdt_strerror(nodeoffset)); } } - - /* update, or add and update /memory node */ - nodeoffset = fdt_find_node_by_path(blob, "/memory"); - if (nodeoffset < 0) { - nodeoffset = fdt_add_subnode(blob, 0, "memory"); - if (nodeoffset < 0) - debug("failed to add /memory node: %s\n", - fdt_strerror(nodeoffset)); - } - if (nodeoffset >= 0) { - fdt_setprop(blob, nodeoffset, "device_type", - "memory", sizeof("memory")); - tmp[0] = cpu_to_be32(bd->bi_memstart); - tmp[1] = cpu_to_be32(bd->bi_memsize); - fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp)); - } } #elif defined(CONFIG_OF_FLAT_TREE) void diff --git a/include/fdt_support.h b/include/fdt_support.h index 60fa423..eca2186 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -29,6 +29,7 @@ #include <fdt.h> int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force); +int fdt_memory(void *fdt); #ifdef CONFIG_OF_HAS_UBOOT_ENV int fdt_env(void *fdt);

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Re: [U-Boot-Users] boot up u-boot from RAM
by Nghiem, Tien 26 Nov '07

26 Nov '07

Lei, You have to rebuild your code to put your code in the RAM area (other than the FLASH area). Don't use the address 0x00-0x2fff because its reserved for the exception vectors usually. I have a Lite5200 EVB. I use the address 0x20000 to put my u-boot in RAM and it works. I don't know if it could be done for the mpc8270. Tien -----Original Message----- From: u-boot-users-bounces(a)lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net]On Behalf Of Lei Sun Sent: Thursday, October 26, 2006 4:15 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] boot up u-boot from RAM Hi all: I am debugging a costomized board based on mpc8270, due to the design flaw, we can't boot up the system using flash, so I was trying to debug u-boot by loading it into the RAM. I used JTAG debugger to initialize the SDRAM and load the u-boot to 0x0, after reset, the PC is at 0x100. the disassembled code looks correct on that location, however, i can't single step start from 0x100. Is that because 0x100 is the reset vector ? I tried to put some breakpoint at some places not far from start point, but it gave me "unknown halt at 0x00000000" error after "run" command. after that the memory seems corrupted. Too bad I was using a bad debugger(Guardian-SE), I have a evaluation copy of the codewarrior plus USB+TAP from freescale. I tried that on our PQ2FADS-VR SDK. After reset, and CPU halt, I can't see any disassembed code on 0x100 (the uboot is already in the flash, and I assume it should read data from CS0 upon reset). Although the code does execute after hitting "run" button. I wonder why can't I see the disassembed code after reset? Thanks lei ------------------------------------------------------------------------- Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&dat=121642 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] AMCC440SPe & PCI Express
by Patil, Pankaj P. 26 Nov '07

26 Nov '07

Hi, I have been using u-boot-1.1.5 on my custom 440SPe based board. I am able to establish a link on PCIE0. However, I am having trouble accessing outbound Memory on PCIE0. My memory map seetings for Outbound PCIE memory are the default U-boot Settings. I was curious if anybody's tried accessing PCIE Outbound memory with the default settings. I seem to get a bus error when I try to access that region. Thanks Pankaj

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[U-Boot-Users] Please pull u-boot-mpc83xx.git mpc83xx branch into testing
by Kim Phillips 19 Nov '07

19 Nov '07

Wolfgang, Please pull the mpc83xx branch into your testing tree: git pull git://www.denx.de/git/u-boot-mpc83xx.git mpc83xx to get the following changes (essentially support for the MPC837xEMDS board): Dave Liu (6): mpc83xx: Add the support of MPC837x SoC mpc83xx: Add the support of MPC8315E SoC mpc83xx: Add the support of MPC837xEMDS board mpc83xx: Add the MPC837xEMDS board readme mpc83xx: add MAINTAINER and MAKEALL entries for the mpc837xemds mpc83xx: update the CREDITS and MAINTAINERS CREDITS | 5 + MAINTAINERS | 2 + MAKEALL | 1 + Makefile | 10 + board/freescale/mpc837xemds/Makefile | 50 +++ board/freescale/mpc837xemds/config.mk | 28 ++ board/freescale/mpc837xemds/mpc837xemds.c | 144 +++++++ board/freescale/mpc837xemds/pci.c | 65 +++ cpu/mpc83xx/cpu.c | 36 ++- cpu/mpc83xx/cpu_init.c | 6 +- cpu/mpc83xx/spd_sdram.c | 7 +- cpu/mpc83xx/speed.c | 201 ++++++++-- doc/README.mpc837xemds | 104 +++++ drivers/tsec.c | 10 + include/asm-ppc/global_data.h | 15 +- include/asm-ppc/immap_83xx.h | 145 +++++++- include/configs/MPC837XEMDS.h | 605 +++++++++++++++++++++++++++++ include/mpc83xx.h | 261 +++++++++++-- 18 files changed, 1635 insertions(+), 60 deletions(-) create mode 100644 board/freescale/mpc837xemds/Makefile create mode 100644 board/freescale/mpc837xemds/config.mk create mode 100644 board/freescale/mpc837xemds/mpc837xemds.c create mode 100644 board/freescale/mpc837xemds/pci.c create mode 100644 doc/README.mpc837xemds create mode 100644 include/configs/MPC837XEMDS.h Thanks, Kim

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[U-Boot-Users] [U-boot-Users][GIT PULL] Please pull coldfire tree
by Liew Tsi Chung-r5aahp 17 Nov '07

17 Nov '07

Wolfgang, The following changes since commit 5441f61a3d8b7034f19fc1361183e936198e6dbb: Detlev Zundel (1): Fix two typos. are available in the git repository at: git://www.denx.de/git/u-boot-coldfire.git TsiChungLiew (5): ColdFire 5282: Fix external flash boot and return dramsize ColdFire 5253: Assign correct SDRAM size ColdFire 5329: Assign correct SDRAM size and fix cache ColdFire: Fix build error when CONFIG_WATCHDOG is defined ColdFire 54455: Fix correct boot location for atmel and intel Makefile | 4 +++ board/freescale/m54455evb/config.mk | 4 ++- board/m5282evb/m5282evb.c | 1 + cpu/mcf52x2/start.S | 6 ++++- cpu/mcf532x/start.S | 4 +- include/configs/M5253EVBE.h | 2 +- include/configs/M5282EVB.h | 2 +- include/configs/M5329EVB.h | 2 +- include/configs/M54455EVB.h | 36 +++++++++++++++++++--------------- lib_m68k/m68k_linux.c | 3 ++ 10 files changed, 41 insertions(+), 23 deletions(-)

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[U-Boot-Users] RFC: do_reset for MCF5329/MCF537x
by w.wegner＠astro-kom.de 17 Nov '07

17 Nov '07

Hi list, I just noticed a problem in the current git tree for Coldfire MCF532x/537x. The function do_reset relies on the watchdog, which is not available if it is switched off. Is there any objection against using the soft reset of the reset control module like this? (The bits are currently not defined in the header files, but of course could be added for readability.) int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { volatile ccm_t *ccmp = (ccm_t *) (MMAP_CCM); ccmp->rstctrl = 0xc0; /* MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT */ /* we don't return! */ return 0; }; Best regards, Wolfgang

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