January 2007 - U-Boot

[U-Boot-Users] Question about U-Boot in general and the AT91RM9200 in particular
by Javier Ruere 04 Jan '07

04 Jan '07

Hello everyone, I have been working with an AT91RM9200-EK board for a couple of months now and we are about to make our own custom board. Lately I started investigating about U-Boot and how it works in this board and, though I have found a lot of bits of information, I am still quite confused. I would like to ask about U-Boot running from RAM. On the one hand, I have seen links [1] and [2] that say that it should not be done but, on the other hand, from the documentation from Atmel [3] I see it _is_ being run from RAM. I have done this myself with u-boot 1.1.6 defining CONFIG_SKIP_LOWLEVEL_INIT at the top of include/configs/at91rm9200dk.h, otherwise it wouldn't work. I found out about this define here [4] For what I gather from the instructions from Atmel, there is always a bootloader before U-Boot, loading it from the dataflash, serial port or Flash and this could explain why I must define CONFIG_SKIP_LOWLEVEL_INIT, so that the hardware is not initialized twice. Would it work to put an uncompressed image of U-Boot at the beginning of the flash memory and let it initialize the board if I don't add the define I mentioned before? Thank you all for your time and help. Regards, Javier Ruere [1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/25551/focus=25596 [2] http://www.denx.de/wiki/view/DULG/CanUBootBeConfiguredSuchThatItCanBeStarte… [3] http://www.atmel.com/dyn/resources/prod_documents/UBootFlashProgramming.zip [4] http://www.at91.com/www/phpBB2_mirror/viewtopic.php4?t=1300&highlight=at91r…

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Re: [U-Boot-Users] 1.1.6 at91 based board dataflash copy panic.
by Ivan Kuten 04 Jan '07

04 Jan '07

Hello, I had the same problem with u-boot with dataflash only setup (no NOR flash) and used the following patch (see attach) cmd_mem.c doing wrong when copy from Dataflash to SDRAM: - if (addr_dataflash(addr) && !addr_dataflash(dest) && (addr2info(dest)==NULL) ){ + if (addr_dataflash(addr) && !addr_dataflash(dest) +#ifndef CFG_NO_FLASH + && (addr2info(dest)==NULL) +#endif + ){ and do not forget to set CFG_NO_FLASH in your include. ------------------------------------ Best regards, Ivan Embedded Linux Engineer Promwad - www.promwad.com ------------------------------------ -------------------------------------------------- Hello all, We are trying u-boot 1.1.6 on a customised at91rm9200 board. The main features are dataflash, 32MB and networking with DM9161. We have been using u-boot 1.1.4 quite well now, but we would like to test 1.1.6. Kernel boots ok, but we have found a problem. When we do a cp from the dataflash to ram like this: cp.b $(kerneladdr) 0x21600000 0x1 where kerneladdr is 0xC0040000 we have the following: data abort Resetting CPU ...

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Re: [U-Boot-Users] Question about U-Boot in general and the AT91RM9200 in particular
by Ivan Kuten 04 Jan '07

04 Jan '07

Hello, AT91RM9200 is quite specific in that ROM Boot program copies initial bootloader in SRAM (see ch.13 in AT91RM9200 manual): The main features of the Boot Program are: · Downloads and runs an application from external storage media into internal SRAM · Downloaded code size depends on embedded SRAM size thus in any way you must use a small (<12Kb) initial bootloader, which in turn loads u-boot from dataflash or NOR flash in SDRAM. ------------------------------------ Best regards, Ivan Embedded Linux Engineer Promwad - www.promwad.com ------------------------------------ > Hello everyone, > For what I gather from the instructions from Atmel, there is always a > bootloader before U-Boot, loading it from the dataflash, serial port or > Flash > and this could explain why I must define CONFIG_SKIP_LOWLEVEL_INIT, so > that the hardware is not initialized twice. > Would it work to put an uncompressed image of U-Boot at the beginning of > flash memory and let it initialize the board if I don't add the define I > mentioned before? > Thank you all for your time and help. > > Regards, > Javier Ruere > > > [1] > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/25551/focus=25596 > [2] > http://www.denx.de/wiki/view/DULG/CanUBootBeConfiguredSuchThatItCanBeStarte… > [3] > http://www.atmel.com/dyn/resources/prod_documents/UBootFlashProgramming.zip > [4] > http://www.at91.com/www/phpBB2_mirror/viewtopic.php4?t=1300&highlight=at91r… > > > > ------------------------------ > > Message: 2 > Date: Thu, 04 Jan 2007 01:05:25 +0100 > From: Wolfgang Denk <wd(a)denx.de> > Subject: Re: [U-Boot-Users] Question about U-Boot in general and the > AT91RM9200 in particular > To: Javier Ruere <javierruere(a)apexar.com> > Cc: u-boot-users(a)lists.sourceforge.net > Message-ID: <20070104000525.86CB7352636(a)atlas.denx.de> > Content-Type: text/plain; charset=ISO-8859-1 > > In message <200701031949.26084.javierruere(a)apexar.com> you wrote: >> >> For what I gather from the instructions from Atmel, there is always a >> bootloader before U-Boot, loading it from the dataflash, serial port or >> Flash > > No, this is NOT correct. If you have NOR flash on your board (which > we consider a standard configuration) then U-Boot can boot directly, > without a primary bootstrap loader. This is the mode of operation you > want to have if your task is to get new hardware running. > >> Would it work to put an uncompressed image of U-Boot at the beginning >> of the >> flash memory and let it initialize the board if I don't add the define I >> mentioned before? > > If "flash memory" means NOR flash, then yes, this will work fine. > Actually this is the recommended (by me) mode of operation. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de > "An organization dries up if you don't challenge it with growth." > - Mark Shepherd, former President and CEO of Texas Instruments > > > > ------------------------------ > > Message: 3 > Date: Thu, 4 Jan 2007 02:03:03 +0100 > From: Stanley F. Lynn <hbdok(a)ebookpizzazz.com> > Subject: [U-Boot-Users] hazelnut negligently > To: u-boot-users(a)lists.sourceforge.net > Message-ID: <459C5247.6040803(a)ebookpizzazz.com> > Content-Type: text/plain; charset="us-ascii" > > An HTML attachment was scrubbed... > URL: > http://sourceforge.net/mailarchive/forum.php?forum=u-boot-users/attachments… >

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[U-Boot-Users] hazelnut negligently
by Stanley F. Lynn 04 Jan '07

04 Jan '07

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[U-Boot-Users] MPC8360 - UEC ethernet and MII support, feature add
by Russell McGuire 03 Jan '07

03 Jan '07

Everyone, I was attempting to ascertain why when using the /drivers/qe/uec Ethernet driver, that MII support would fail. After digging through the uec.c driver, it was simple to see that it does not call miiphy_register(). So I guess my question is, since I have never 'submitted' patch/change to the code before, is there an existing maintainer for this file/driver that would like to add support for the miiphy_register. I wasn't able to interpret from the MAINTAINERS file who owns this driver/file. I think there might also need to be a wrapper read/write function written to fully support this. I am working on a solution here, as I am using it to bring up my custom 8360 board. I suppose in a short time I will have a working model that I could submit. Anyone? -Russ

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[U-Boot-Users] cache_8xx.S: code to flush out the data cache
by Sachin Rane 03 Jan '07

03 Jan '07

Hi, In file '/u-boot-1.1.4/post/cache_8xx.S', assembly code is provided for the function 'cache_post_test4'. Comments have been added to describe what exactly happening in the code. I couldn't find any instruction in the code which flushes out the data cache even though it is mentioned in the comments. The code snippet is appended for reference. Am I missing something? Regards, Sachin Rane 8< ------------------------------------------------------------------------ ------------------------------------------------------------------------ ------------- /* * turn on the data cache * switch the data cache to write-back mode * invalidate the data cache * write the negative pattern to a cached area * flush the data cache * write the zero pattern to the area * invalidate the data cache * read the area * * The negative pattern must be read at the last step */ .global cache_post_test4 cache_post_test4: mflr r0 stw r0, 4(r1) stwu r3, -4(r1) stwu r4, -4(r1) bl cache_post_ddisable bl cache_post_dinvalidate /* Write the negative pattern to the test area */ lwz r0, 0(r1) mtctr r0 li r0, 0xff lwz r3, 4(r1) subi r3, r3, 1 1: stbu r0, 1(r3) bdnz 1b bl cache_post_dwb bl cache_post_dinvalidate /* Write the zero pattern to the test area */ lwz r0, 0(r1) mtctr r0 li r0, 0 lwz r3, 4(r1) subi r3, r3, 1 1: stbu r0, 1(r3) bdnz 1b bl cache_post_ddisable bl cache_post_dinvalidate /* Read the test area */ lwz r0, 0(r1) mtctr r0 lwz r4, 4(r1) subi r4, r4, 1 li r3, 0 1: lbzu r0, 1(r4) cmpli cr0, r0, 0xff beq 2f li r3, -1 b 3f 2: bdnz 1b 3: addi r1, r1, 8 lwz r0, 4(r1) mtlr r0 blr cache_post_test5_1: li r3, 0 cache_post_test5_2: li r3, -1 8< ------------------------------------------------------------------------ ------------------------------------------------------------------------ -------------

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[U-Boot-Users] Experience in working with engineering and shop personnel.
by Brewer 03 Jan '07

03 Jan '07

Additional experience in preparing, updating and design of electrical systems line drawings by using computer aided drafting and engineering. Startup, install, repair ? I thank AARP and Hawaii Broadcasting for this event. This season's harvest is actually expected to be 5 percent smaller than the last. Board economist Harvey Shapiro said the figures show Hawaii's real estate market remains in transition, and that demand will eventually slow to a more normal pace. Qualified candidates must have experience with the Siemens Artecs EMS system. Must also be capable of reading all types of construction drawings and be capable on ACAD or equivalent systems. BSEE, BSCEE, or similar degree is required. Experience will also include hands-on relay settings configuration integration design, installation, commissioning and checkout services. Chicago: Best Sports City in the NationAll right, so the Bears let us down on Christmas Eve. Per diem is available for the contract opening. Startup, install, repair ? Do you require relocation assistance?

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[U-Boot-Users] u-boot size and boot issue
by mitsy 03 Jan '07

03 Jan '07

Hello list, I have mips board (au1550) and I'm having issues booting the board on its own when the u-boot size gets larger than 256k. It will boot fine when it's connected to BDI. What am I doing wrong? I've been trying to figure out where I need to make a change to support u-boot with larger size since as long as the size if smaller than 256k, it works just fine. Any suggestion will be greatly appreciated. Thank you so much for your help.

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[U-Boot-Users] Fw: cpu POST hang
by Brandon Clarke 02 Jan '07

02 Jan '07

----- Original Message ---- From: Andy Fleming <afleming(a)gmail.com> To: Brandon Clarke <bmclarke2001(a)yahoo.com> Sent: Sunday, December 31, 2006 1:18:47 PM Subject: Re: [U-Boot-Users] cpu POST hang > The first argument to the function is in r3. It's the code you want > to execute. Rather, it's a pointer to a function which executes that > code. This instruction is used to branch to that function with op1 > and op2 as arguments. By commenting it out, you have circumvented the > function entirely, and written op1 to *res. > If you are hanging, it is because code is not set properly, Beyond setting the CFG_POST_CPU flag in uboot I was unaware of other code modifications that needed to be made. I was kind of curious as to how general cpu post code could be created. Does the cpu post code not support particular processors? Can you elaborate on this further? > or points to a function that never terminates. cpu_post_exec_12 is the function that is being called (in the cpu_post_test_cmp function) and it's testing the "cmp" function of the cpu. The code pointer (*code) contains this data: unsigned long code[] = { ASM_2C(test->cmd, test->cr, 3, 4), ASM_MFCR(3), ASM_BLR }; test->cmd = OP_CMPW=0x7c000000 (which is the opcode for a cmp according to BookE) test->cr=2=which is the register that will contain the result of the compare. and 3, and 4 which are the registers (r3 and r4) which are supposed to contain the data to be compared. Since the rest of the POST runs without a problem and, since the other cpu functions being tested also have an ASM_MFCR and an ASM_BLR function, I thought that the code causing the system to hang could be found in the ASM_2C definition. In calculating the numbers for ASM_2C (opcode+res...etc.) the code looks like it should function fine. Since this is the code that is supposed to be executed at the hanging branch I'm kind of confussed as to why it won't work. Can anyone point me to other possibilities for this hang? Thanks, Brandon __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] Docs on ppc440 cache manipulation
by Sachin Rane 02 Jan '07

02 Jan '07

Hi, I am looking for a document which gives more focus on the PPC440GX cache operation. I have been using ppc440GX Users Manual but some of the terms are not clear like 'cache Index' or how to disable L1 cache. Regards, Sachin Rane

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