June 2006 - U-Boot

[U-Boot-Users] U boot modification...
by Kiran Jammula 23 May '12

23 May '12

Hi, I am using U boot for my project. I need to configure the console while booting by prompting the user from target board LCD and Keypad. So please let me know which file of the U-boot I have to modify to achieve this. Kiran _________________________________________________________________ Special offer for NRIs! http://creative.mediaturf.net/creatives/citibankrca/rca_msntagofline.htm Get a zero balance account for next 20 years. From Citibank

4 5

[U-Boot-Users] Ethernet loopback command
by Thomas Schäfer 17 Apr '12

17 Apr '12

Hi, The patch attached provides a command called 'ethloop' which allows to perform loopback testing on the current eth device. To achieve this, a new ethernet packet type (PROT_TEST, 0x0808, AFAIK this is not used otherwise) is introduced in net/net.c. The patch is against SF CVS from 20050307. The functions EthLoopStart, EthLoopSend and EthLoopHandler generate a simple ethernet frame with NetOurEther as destination address and packet type PROT_TEST. The looped back package is compared with the original one and a message is displayed. It is necessary to set the ethernet line into loopback mode either by programming the PHY or using a loopback plug. I've tested this on our PPC405 custom board, but it should also work on all other systems because packet generation is independent of the underlying ethernet hardware. Example usage: => mii w 0 0 7100 <-- sets PHY into loopback mode => ethloop Using ppc_405x_eth0 device Got ethernet loopback frame, len=64 loopback test successfully completed => mii w 0 0 8000 <-- PHY reset after test is completed Maybe this is also useful for others.. Best regards, Thomas Schäfer ____________________________________ Kontron Modular Computers GmbH Konrad-Zuse-Str. 9 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: thomas.schaefer(a)kontron.com

5 5

[U-Boot-Users] Add a new command to U-Boot
by Carlos Filipe Silva 20 May '09

20 May '09

Hi all! I have one doubt. How can I add a new command to U-Boot? Do I have to use only the macro U_BOOT_CMD() like files .../common/cmd_* or do I have to do more things, like defines, etc.? And after this is compliled with no error, if I type help in U-Boot's shell, do I see this command like the others? Best regards, Carlos Silva

11 24

[U-Boot-Users] how to support usbtty
by zhuzhenhua 31 Aug '08

31 Aug '08

becides set CONFIG_USB_TTY, what other modification need to do for the usbtty support? thanks for any hints

5 10

[U-Boot-Users] bootargs for partitioned nand flash
by Terence Soh 30 Apr '08

30 Apr '08

Hi, I'm trying to get a 64 MByte nand flash to be partitioned in a 32MB cramfs and 32MB jffs2 partition. In case anyone's curious, I would like the cramfs to be root as it would be a faster mount and its read-only feature. I tried to do this in the kernel by static struct mtd_partition partition_info[] = { [0] = { .name = "CRAM", .offset = 0, .size = 32 * 1024 * 1024, .mask_flags = MTD_WRITEABLE, /* force read-only */ }, [1] = { .name = "JFFS2", .offset = 32 * 1024 * 1024, .size = MTDPART_SIZ_FULL, } }; but when I cat/proc/mtd, I get / # cat /proc/mtd dev: size erasesize name mtd0: 04000000 00004000 "rootfs" so I realise that this is affected by the bootargs passed by u-bootloader which is "bootargs=console=ttyS0 mtdparts=a9m9750:0x4000000@0(rootfs) root=mtdblock/0 rootfstype=jffs2" How should I passed the bootargs? Thanks in advance, Terence.

4 3

[U-Boot-Users] u-boot for MPC8548
by Rupesh S 07 Jun '07

07 Jun '07

Hi Does u-boot support any evaluation boards based on the MPC8548 processor ? Thanks in advance -- Rupesh S

2 1

[U-Boot-Users] [PATCH 1/1] Support for National DP83848 Ethernet Phy
by kim M 22 May '07

22 May '07

Hi all If anyone interested, this is a patch which adds support for the National DP83848 Ethernet Phy. It allows derivatives of the at91rm9200dk board to use this Phy. You will have to edit your at91rm9200.c to use this Phy instead of the default dm9161. I think it makes sense to include it in the main branch, since it is a free feature and it does not occupy space unless used. BR Kim

2 1

[U-Boot-Users] Sequence of Xilinx ML403/PPC
by S. Egbert 28 Dec '06

28 Dec '06

Awesome... Got U-boot 1.1.4 working on a Xilinx ML403 (PPC 405) evaluation board with our custom core. Next for this planning stage, I'm trying to juggle 'leap-frogging' memory mapping between the first-loader (Xilinx SREC bootloader in firmware), second loader (U-boot 1.1.4) and Linux 2.4 OS. Firstly, we started with Xilinx's SREC (bootloader.c) bootloader (I know, I know, SREC is space consuming) and plan to replace this first bootloader with an ELF or pseudo-binary version later after everything-else is checked out. Planning-wise, I envisioned that such a bring-up memory overlaying sequence would be something like this: 1. Xilinx bootloader.c reads SREC from 16-bit flash and decode/verify/copies to lowest RAM (0000_0000). Then transfers control to 0000_0100. 2. U-boot starts up and relocate itself to MONITOR region which is in the highest RAM region of 01F0_0000. 3. U-boot Scripting occurs which copies Linux OS from flash into where? Next highest or lowest portion of RAM? Is it dependent on whether dual-stage vmlinux.initrd or single-stage vmlinux is used or not? At power-up, with U-Boot 1.1.4 being unusually low-RAM-based before starting up (instead of executing straight out of ROM), I noticed that despite being relocated to MONITOR (higher RAM) region, the PIT exception vector appears to be active in 0000_10c0-ish. Despite this RAM-to-RAM relocation, this "mtest" clobbering of the 0000_10C0 region caused Machine Exception error whenever I attempt to perform memory test over this supposedly former exception vector region. I thought that the objective during U-boot relocation was to ensure a completely discontinued RAM region (formerly occupied by U-boot ROM-based session). A hard and easy questions to the esteemed and avid readers of u-boot-users mailing list... 1. Where do I go from there with regard to the 0000_1000 (PIT_EXCEPTION). Isn't the PIT specific to Motorola 8xx-series (this here is a PPC 405). What exception did the lib_ppc/start.S/trap_init() exactly skipped? Skipped an exception mentioned vaguely in this source code vaguely. Do I need to tweak the trap_init() some more to relocate these untransfered exception vectors into the high MONITOR region? 2. And lastly, do I go high or low for Linux OS? Thank you, S. Egbert

7 13

[U-Boot-Users] PXA27x USB support?
by David Snowdon 21 Nov '06

21 Nov '06

G'Day, Has anyone given PXA27X USB support a go? If not, I'm probably going to need to have a crack. Anyone else have a need for it? Any sage words of advice from someone who's looked at USB for another platform? Cheers, Dave.

8 10

[U-Boot-Users] MPC8270/MPC8250 Ethernet Problem
by Aaron Sells 07 Nov '06

07 Nov '06

I am having trouble getting Ethernet to work correctly on our Embedded Planet EP82xxM board. Specifically, pings and TFTP transfers fail when the board is populated with an MPC8250 or an MPC8270. However, when the board is populated with an MPC8280 processor, Ethernet works. Any suggestions of things to try out to resolve this would be greatly appreciated. FCC2/3 port pins appear to be correctly configured. PHY registers are able to be accessed and seem to show the correct configuration. No packets are appearing on the wire when sniffed with Ethereal. With ET_DEBUG turned on, pinging results in the following output: ep82xxm=> ping 10.0.0.26 Using FCC3 ETHERNET device sending ARP for 0a00001a ARP broadcast 1 packet received packet received Receive from protocol 0x0 packet received packet received Receive from protocol 0x0 . . . ARP broadcast 2 packet received packet received Receive from protocol 0x0 packet received packet received Receive from protocol 0x0 . . . ping failed; host 10.0.0.26 is not alive MII info and dump result in the following output: ep82xxm=> mii info PHY 0x00: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 100baseT, FDX PHY 0x01: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 10baseT, HDX ep82xxm=> mii dump 0 0-5 0. (3100) -- PHY control register -- (8000:0000) 0.15 = 0 reset (4000:0000) 0.14 = 0 loopback (2040:2000) 0. 6,13 = b01 speed selection = 100 Mbps (1000:1000) 0.12 = 1 A/N enable (0800:0000) 0.11 = 0 power-down (0400:0000) 0.10 = 0 isolate (0200:0000) 0. 9 = 0 restart A/N (0100:0100) 0. 8 = 1 duplex = full (0080:0000) 0. 7 = 0 collision test enable (003f:0000) 0. 5- 0 = 0 (reserved) 1. (782d) -- PHY status register -- (8000:0000) 1.15 = 0 100BASE-T4 able (4000:4000) 1.14 = 1 100BASE-X full duplex able (2000:2000) 1.13 = 1 100BASE-X half duplex able (1000:1000) 1.12 = 1 10 Mbps full duplex able (0800:0800) 1.11 = 1 10 Mbps half duplex able (0400:0000) 1.10 = 0 100BASE-T2 full duplex able (0200:0000) 1. 9 = 0 100BASE-T2 half duplex able (0100:0000) 1. 8 = 0 extended status (0080:0000) 1. 7 = 0 (reserved) (0040:0000) 1. 6 = 0 MF preamble suppression (0020:0020) 1. 5 = 1 A/N complete (0010:0000) 1. 4 = 0 remote fault (0008:0008) 1. 3 = 1 A/N able (0004:0004) 1. 2 = 1 link status (0002:0000) 1. 1 = 0 jabber detect (0001:0001) 1. 0 = 1 extended capabilities 2. (0013) -- PHY ID 1 register -- (ffff:0013) 2.15- 0 = 19 OUI portion 3. (78e2) -- PHY ID 2 register -- (fc00:7800) 3.15-10 = 30 OUI portion (03f0:00e0) 3. 9- 4 = 14 manufacturer part number (000f:0002) 3. 3- 0 = 2 manufacturer rev. number 4. (01e1) -- Autonegotiation advertisement register -- (8000:0000) 4.15 = 0 next page able (4000:0000) 4.14 = 0 reserved (2000:0000) 4.13 = 0 remote fault (1000:0000) 4.12 = 0 reserved (0800:0000) 4.11 = 0 asymmetric pause (0400:0000) 4.10 = 0 pause enable (0200:0000) 4. 9 = 0 100BASE-T4 able (0100:0100) 4. 8 = 1 100BASE-TX full duplex able (0080:0080) 4. 7 = 1 100BASE-TX able (0040:0040) 4. 6 = 1 10BASE-T full duplex able (0020:0020) 4. 5 = 1 10BASE-T able (001f:0001) 4. 4- 0 = 1 selector = IEEE 802.3 5. (45e1) -- Autonegotiation partner abilities register -- (8000:0000) 5.15 = 0 next page able (4000:4000) 5.14 = 1 acknowledge (2000:0000) 5.13 = 0 remote fault (1000:0000) 5.12 = 0 (reserved) (0800:0000) 5.11 = 0 asymmetric pause able (0400:0400) 5.10 = 1 pause able (0200:0000) 5. 9 = 0 100BASE-T4 able (0100:0100) 5. 8 = 1 100BASE-X full duplex able (0080:0080) 5. 7 = 1 100BASE-TX able (0040:0040) 5. 6 = 1 10BASE-T full duplex able (0020:0020) 5. 5 = 1 10BASE-T able (001f:0001) 5. 4- 0 = 1 selector = IEEE 802.3 My environment settings are as follows: ep82xxm=> printenv bootdelay=5 baudrate=115200 ethaddr=00:10:EC:00:88:66 eth1addr=00:10:EC:80:88:66 ipaddr=10.0.0.245 serverip=10.0.0.26 gatewayip=10.0.0.1 netmask=255.255.255.0 hostname=EP82xxM ethprime=FCC3 ETHERNET stdin=serial stdout=serial stderr=serial ethact=FCC3 ETHERNET Thanks for your help!

3 3