February 2006 - U-Boot

[U-Boot-Users] Help: flash driver for CFI complient flash
by s.maiti＠tcs.com 05 Apr '06

05 Apr '06

Hi all, I am using a flash of AMD make (Am29LV160B) in our custom board which is based on mpc8260ads board. This flash is CFI complient. So I want to use the cfi_flash.c as a driver for the flash. Can anyone tell me the procedure ie. what need to be done to use the driver? Please help. Thanks and regards, Souvik Maiti Tata Consultancy Services Limited Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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[U-Boot-Users] PATCH: apply SoC concept on arm926 cpus
by Andreas Engel 03 Apr '06

03 Apr '06

CHANGELOG entry: * Patch by Andreas Engel, 20 June 2005 applied the SoC concept to arm926ejs cpus, i.e. moved the SoC specific timer and cpu_reset code from the ./cpu/$(CPU) directory into new ./cpu/$(CPU)/$(SOC) directories

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[U-Boot-Users] IMPORTANT NOTE to all maintainers with NAND flash
by Wolfgang Denk 24 Mar '06

24 Mar '06

Hello, this is a "heads up" note to all maintainers of boards with NAND flash: I am going to drop support for the old NAND flash code and replace it by Ladislav Michl's rewrite, which is available in the "testing-NAND" branch of our git repository. This new code has been available for testing for 6 months, and I have not received any negative feedback (I did not receive any positive feedback, either - but if you did not care until now you should not complain later). Dropping the support for the old code means that the build for all boards that use NAND currently will *break*. I am aware that this is not a nice thing to do, but I see no other way to get the attention of the board maintainers and force them to update their code to the new way for their boards. This should be not be very hard, though. Since the new implementation is borrowed from Linux, it is quite likely that the said boards could use the new NAND support already present for them in the Linux source. We will now merge the "testing-NAND" branch back into the main tree; once this is done, I will allow for a transition period of 4 weeks. After this, the old code will be removed, even if it breaks support for some boards. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de The software required `Windows 95 or better', so I installed Linux.

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[U-Boot-Users] [PATCH] fix building of tools/env programs
by Murray.Jensen＠csiro.au 23 Mar '06

23 Mar '06

This patch shows what I had to do to get the programs in the tools/env directory to build (i.e. fw_printenv/fw_setenv). Your mileage may vary. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix building of programs in the tools/env directory Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

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[U-Boot-Users] Re: compile u-boot with recent toolchain : symbols problem
by Anton Wöllert 22 Mar '06

22 Mar '06

I've got the same problem with binutils 2.16 and gcc 3.4.4. also binutils 2.16.91.0.1 doesn't work right. > > > > I used to compile U-Boot with ELDK, but I currently need to work with > > newer toolchain : > > - binutils-2.16 > > - gcc-3.4.3 > > This looks line a binutils problem, then. May I ask why you have to > use binutils-2.16 ? May I ask you why it should not be used? How to recover bugs, if people just use older software? > > And which exact board are we talking about? > > > The "__u_boot_cmd_start" symbol value, generated with this new > > toolchain, is wrong (U-Boot crashes when relocating the command > > table). > > Can you please provide exact data, like the differences between the > System.map and the u-boot.map files when using binutils-2.16 and > another, working version of binutils? [Please use the _same_ version > of GCC for this comparison.] > > > There are two new sections between "__u_boot_cmd_start" and > > ".u_boot_cmd" address : > > - .data.rel.local > > - .data.rel > > Can you please show exactly what happens? The above, i couldn't acknowledge, but u-boot definitly hangs _after_ relocating to memory. it will dump 'Now running in RAM at .....'. But then it hangs. After relocating, it tries to manually relocate the command table. But that doesn't work. Don't know why, but with the patch it works. Obviously __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; and __u_boot_cmd_start = ADDR(.u_boot_cmd); .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; should be the same. However, this should be a binutils bug or the linker script voodoo that is done with the first script above isn't really valid. Maybe .u_boot_cmd gets misalligned. Maybe i should try to DEBUG(& __u_boot_cmd_start) in both (the patched and unpatched) versions to see, where it points, or maybe objdump show more. Btw. this happens on the tqm8xx board. Thanks to Vincent for recovering that, that saved me a lot of time... kind regards Anton Wöllert

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[U-Boot-Users] [PATCH] Support for the Lite5200B
by Txema Lopez 17 Mar '06

17 Mar '06

Hi all, This is a patch to support the new Lite5200B board based on the MPC5200B. It has been implemented as a modification of the actual icecube. The main differences beetwen both boards are the type and amount of ram and flash memory. The Lite5200B has 256M of DDR ram and 32 M of flash mapped in two banks.It's used the cfi flash driver but it's needed a patch for this driver to support the x8/x16 flash in x8 mode. There is a patch supplied by Alex Bastos and I supply another one. Signed-off-by: Jose Maria Lopez <tlopez(a)aotek.es> CHANGELOG * Add support for the Lite5200B board: Patch by Jose Maria Lopez, 16 Jan 2006 diff -purN u-boot-cvs/board/icecube/flash.c u-boot/board/icecube/flash.c --- u-boot-cvs/board/icecube/flash.c 2006-01-12 12:22:10.000000000 +0100 +++ u-boot/board/icecube/flash.c 2006-01-16 09:57:14.000000000 +0100 @@ -23,6 +23,7 @@ #include <common.h> +#ifndef CFG_FLASH_CFI_DRIVER flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it @@ -489,3 +490,4 @@ static int write_word_amd (flash_info_t return (res); } +#endif /*CFG_FLASH_CFI_DRIVER*/ diff -purN u-boot-cvs/board/icecube/icecube.c u-boot/board/icecube/icecube.c --- u-boot-cvs/board/icecube/icecube.c 2006-01-12 12:22:10.000000000 +0100 +++ u-boot/board/icecube/icecube.c 2006-01-13 13:40:34.000000000 +0100 @@ -28,12 +28,15 @@ #include <mpc5xxx.h> #include <pci.h> -#if defined(CONFIG_MPC5200_DDR) -#include "mt46v16m16-75.h" +#if defined(CONFIG_LITE5200B) +#include "mt46v32m16.h" #else +# if defined(CONFIG_MPC5200_DDR) +#include "mt46v16m16-75.h" +# else #include "mt48lc16m16a2-75.h" +# endif #endif - #ifndef CFG_RAMBOOT static void sdram_start (int hi_addr) { @@ -236,7 +239,9 @@ long int initdram (int board_type) int checkboard (void) { -#if defined(CONFIG_MPC5200) +#if defined (CONFIG_LITE5200B) + puts ("Board: Freescale Lite5200B\n"); +#elif defined(CONFIG_MPC5200) puts ("Board: Motorola MPC5200 (IceCube)\n"); #elif defined(CONFIG_MGT5100) puts ("Board: Motorola MGT5100 (IceCube)\n"); diff -purN u-boot-cvs/board/icecube/mt46v32m16.h u-boot/board/icecube/mt46v32m16.h --- u-boot-cvs/board/icecube/mt46v32m16.h 1970-01-01 01:00:00.000000000 +0100 +++ u-boot/board/icecube/mt46v32m16.h 2006-01-09 14:54:47.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas(a)motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 1 /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x704f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif diff -purN u-boot-cvs/include/configs/IceCube.h u-boot/include/configs/IceCube.h --- u-boot-cvs/include/configs/IceCube.h 2006-01-12 12:22:11.000000000 +0100 +++ u-boot/include/configs/IceCube.h 2006-01-11 15:24:13.000000000 +0100 @@ -118,12 +118,16 @@ #include <cmd_confdefs.h> #if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ -# define CFG_LOWBOOT 1 -# define CFG_LOWBOOT16 1 +# define CFG_LOWBOOT 1 +# define CFG_LOWBOOT16 1 #endif #if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ -# define CFG_LOWBOOT 1 -# define CFG_LOWBOOT08 1 +#if defined(CONFIG_LITE5200B) +# error CFG_LOWBOOT08 is incompatible with the Lite5200B +#else +# define CFG_LOWBOOT 1 +# define CFG_LOWBOOT08 1 +#endif #endif /* @@ -160,8 +164,12 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#if defined(CONFIG_LITE5200B) +#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#else +#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ #endif +#endif /* CONFIG_MPC5200 */ /* * I2C configuration */ @@ -182,6 +190,20 @@ /* * Flash configuration */ +#if defined(CONFIG_LITE5200B) +#define CFG_FLASH_BASE 0xFE000000 +#define CFG_FLASH_SIZE 0x01000000 +#if !defined(CFG_LOWBOOT) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01760000 + 0x00800000) +#else /* CFG_LOWBOOT */ +#if defined(CFG_LOWBOOT08) +# error CFG_LOWBOOT08 is incompatible with the Lite5200B +#endif +#if defined(CFG_LOWBOOT16) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01060000) +#endif +#endif /* CFG_LOWBOOT */ +#else /* !CONFIG_LITE5200B (IceCube)*/ #define CFG_FLASH_BASE 0xFF000000 #define CFG_FLASH_SIZE 0x01000000 #if !defined(CFG_LOWBOOT) @@ -194,6 +216,7 @@ #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000) #endif #endif /* CFG_LOWBOOT */ +#endif /* CONFIG_LITE5200B */ #define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ @@ -203,13 +226,23 @@ #undef CONFIG_FLASH_16BIT /* Flash is 8-bit */ +#if defined(CONFIG_LITE5200B) +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START} +#endif + /* * Environment settings */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_SIZE 0x10000 +#if defined(CONFIG_LITE5200B) +#define CFG_ENV_SECT_SIZE 0x20000 +#else #define CFG_ENV_SECT_SIZE 0x10000 +#endif #define CONFIG_ENV_OVERWRITE 1 /* @@ -246,6 +279,9 @@ */ /* #define CONFIG_FEC_10MBIT 1 */ #define CONFIG_PHY_ADDR 0x00 +#if defined(CONFIG_LITE5200B) +#define CONFIG_FEC_MII100 1 +#endif /* * GPIO configuration @@ -288,6 +324,16 @@ #define CFG_HID0_FINAL 0 #endif +#if defined(CONFIG_LITE5200B) +#define CFG_CS1_START CFG_FLASH_BASE +#define CFG_CS1_SIZE CFG_FLASH_SIZE +#define CFG_CS1_CFG 0x00047800 +#define CFG_CS0_START (CFG_FLASH_BASE + CFG_FLASH_SIZE) +#define CFG_CS0_SIZE CFG_FLASH_SIZE +#define CFG_BOOTCS_START CFG_CS0_START +#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE +#define CFG_BOOTCS_CFG 0x00047800 +#else /* IceCube*/ #ifdef CONFIG_MPC5200_DDR #define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE) @@ -306,6 +352,7 @@ #define CFG_CS0_SIZE CFG_FLASH_SIZE #endif /* CONFIG_MPC5200_DDR */ +#endif /*CONFIG_LITE5200B */ #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 diff -purN u-boot-cvs/MAKEALL u-boot/MAKEALL --- u-boot-cvs/MAKEALL 2006-01-12 12:22:07.000000000 +0100 +++ u-boot/MAKEALL 2006-01-11 13:51:02.000000000 +0100 @@ -27,7 +27,7 @@ LIST_5xx=" \ LIST_5xxx=" \ cpci5200 icecube_5100 icecube_5200 EVAL5200 \ pf5200 PM520 Total5100 Total5200 \ - Total5200_Rev2 TQM5200_auto o2dnt \ + Total5200_Rev2 TQM5200_auto o2dnt lite5200b \ " ######################################################################### diff -purN u-boot-cvs/Makefile u-boot/Makefile --- u-boot-cvs/Makefile 2006-01-12 12:22:07.000000000 +0100 +++ u-boot/Makefile 2006-01-16 09:17:59.000000000 +0100 @@ -277,6 +277,20 @@ icecube_5100_config: unconfig } @./mkconfig -a IceCube ppc mpc5xxx icecube +lite5200b_config \ +lite5200b_LOWBOOT_config: unconfig + @ >include/config.h + @ echo "#define CONFIG_MPC5200_DDR" >>include/config.h + @ echo "... DDR memory revision" + @ echo "#define CONFIG_MPC5200" >>include/config.h + @ echo "#define CONFIG_LITE5200B" >>include/config.h + @[ -z "$(findstring LOWBOOT_,$@)" ] || \ + { echo "TEXT_BASE = 0xFF000000" >board/icecube/config.tmp ; \ + echo "... with LOWBOOT configuration" ; \ + } + @ echo "... with MPC5200B processor" + @./mkconfig -a IceCube ppc mpc5xxx icecube + inka4x0_config: unconfig @./mkconfig inka4x0 ppc mpc5xxx inka4x0 diff -purN u-boot-cvs/README u-boot/README --- u-boot-cvs/README 2006-01-12 12:22:07.000000000 +0100 +++ u-boot/README 2006-01-11 13:51:06.000000000 +0100 @@ -261,44 +261,45 @@ The following options need to be configu PowerPC based boards: --------------------- - CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCIPPC2 - CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC6 - CONFIG_AMX860 CONFIG_GTH CONFIG_pcu_e - CONFIG_AP1000 CONFIG_gw8260 CONFIG_PIP405 - CONFIG_AR405 CONFIG_hermes CONFIG_PM826 - CONFIG_BAB7xx CONFIG_hymod CONFIG_ppmc8260 - CONFIG_c2mon CONFIG_IAD210 CONFIG_QS823 - CONFIG_CANBT CONFIG_ICU862 CONFIG_QS850 - CONFIG_CCM CONFIG_IP860 CONFIG_QS860T - CONFIG_CMI CONFIG_IPHASE4539 CONFIG_RBC823 - CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RPXClassic - CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXlite - CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXsuper - CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_rsdproto - CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_sacsng - CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_Sandpoint8240 - CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8245 - CONFIG_CSB272 CONFIG_LANTEC CONFIG_sbc8260 - CONFIG_CU824 CONFIG_lwmon CONFIG_sbc8560 - CONFIG_DASA_SIM CONFIG_MBX CONFIG_SM850 - CONFIG_DB64360 CONFIG_MBX860T CONFIG_SPD823TS - CONFIG_DB64460 CONFIG_MHPC CONFIG_STXGP3 - CONFIG_DU405 CONFIG_MIP405 CONFIG_SXNI855T - CONFIG_DUET_ADS CONFIG_MOUSSE CONFIG_TQM823L - CONFIG_EBONY CONFIG_MPC8260ADS CONFIG_TQM8260 - CONFIG_ELPPC CONFIG_MPC8540ADS CONFIG_TQM850L - CONFIG_ELPT860 CONFIG_MPC8540EVAL CONFIG_TQM855L - CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM860L - CONFIG_ERIC CONFIG_MUSENKI CONFIG_TTTech - CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_UTX8245 - CONFIG_ETX094 CONFIG_NETPHONE CONFIG_V37 - CONFIG_EVB64260 CONFIG_NETTA CONFIG_W7OLMC - CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMG - CONFIG_FADS850SAR CONFIG_NX823 CONFIG_WALNUT - CONFIG_FADS860T CONFIG_OCRTC CONFIG_ZPC1900 - CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZUMA - CONFIG_FPS850L CONFIG_OXC - CONFIG_FPS860L CONFIG_PCI405 + CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCI405 + CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC2 + CONFIG_AMX860 CONFIG_GTH CONFIG_PCIPPC6 + CONFIG_AP1000 CONFIG_gw8260 CONFIG_pcu_e + CONFIG_AR405 CONFIG_hermes CONFIG_PIP405 + CONFIG_BAB7xx CONFIG_hymod CONFIG_PM826 + CONFIG_c2mon CONFIG_IAD210 CONFIG_ppmc8260 + CONFIG_CANBT CONFIG_ICU862 CONFIG_QS823 + CONFIG_CCM CONFIG_IP860 CONFIG_QS850 + CONFIG_CMI CONFIG_IPHASE4539 CONFIG_QS860T + CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RBC823 + CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXClassic + CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXlite + CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_RPXsuper + CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_rsdproto + CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_sacsng + CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8240 + CONFIG_CSB272 CONFIG_LANTEC CONFIG_Sandpoint8245 + CONFIG_CU824 CONFIG_LITE5200B CONFIG_sbc8260 + CONFIG_DASA_SIM CONFIG_lwmon CONFIG_sbc8560 + CONFIG_DB64360 CONFIG_MBX CONFIG_SM850 + CONFIG_DB64460 CONFIG_MBX860T CONFIG_SPD823TS + CONFIG_DU405 CONFIG_MHPC CONFIG_STXGP3 + CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_SXNI855T + CONFIG_EBONY CONFIG_MOUSSE CONFIG_TQM823L + CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM8260 + CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM850L + CONFIG_ep8260 CONFIG_MPC8540EVAL CONFIG_TQM855L + CONFIG_ERIC CONFIG_MPC8560ADS CONFIG_TQM860L + CONFIG_ESTEEM192E CONFIG_MUSENKI CONFIG_TTTech + CONFIG_ETX094 CONFIG_MVS1 CONFIG_UTX8245 + CONFIG_EVB64260 CONFIG_NETPHONE CONFIG_V37 + CONFIG_FADS823 CONFIG_NETTA CONFIG_W7OLMC + CONFIG_FADS850SAR CONFIG_NETVIA CONFIG_W7OLMG + CONFIG_FADS860T CONFIG_NX823 CONFIG_WALNUT + CONFIG_FLAGADM CONFIG_OCRTC CONFIG_ZPC1900 + CONFIG_FPS850L CONFIG_ORSG CONFIG_ZUMA + CONFIG_FPS860L CONFIG_OXC + ARM based boards: -----------------

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[U-Boot-Users] Bug in DTT for temperatures below zero degress !!!
by Steven Scholz 14 Mar '06

14 Mar '06

Hi there, there's a terrible bug in the current U-Boot CVS concerning DDT: For temperature below zero the function dtt_get_temp() (at least for lm75) returns wrong values! ... DTT: 1 is 235 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (235°C) WDT: disabled This is because of the use of an "int" although the lm75 only returns two byte ("signed short"). This trivial fix is needed: Index: u-boot/dtt/lm75.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/dtt/lm75.c,v retrieving revision 1.2 diff -u -r1.2 lm75.c --- u-boot/dtt/lm75.c 27 Jun 2003 21:32:38 -0000 1.2 +++ u-boot/dtt/lm75.c 15 Jun 2005 08:44:21 -0000 @@ -174,7 +170,7 @@ int dtt_get_temp(int sensor) { - return (dtt_read(sensor, DTT_READ_TEMP) / 256); + return ( ((signed short) dtt_read(sensor, DTT_READ_TEMP)) / 256); } /* dtt_get_temp() */ #endif /* CONFIG_DTT_LM75 */ Then the output is correct: ... DTT: 1 is -28 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (-28°C) CCFL: disabled (too cold!) WDT: disabled I am afraid this is an issues on all DTT in U-Boot. Some even only use "uchar". Comments? -- Steven

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[U-Boot-Users] AMCC Luan BDI2000 Config File
by Jeff Stevens 13 Mar '06

13 Mar '06

Does anyone know where I can get a BDI2000 config file for AMCC's Luan eval board, and a BDI2000 reg file for the 440SP? Thanks, Jeff jsteve17(a)yahoo.com __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] gunzip question about large uImages
by Robin Getz 13 Mar '06

13 Mar '06

Quick Question: It looks to me that the max uncompressed image size is hard coded to 4Meg (0x400000 bytes). Any thoughts why? Long question: We were having some problems booting large uImages (reported here ~ month ago). It seemed as if the were not being decompressed properly. When we had someone (Aubrey Li) dig into it he found/pointed out that in the latest cvs, u-boot/common/cmd_bootm.c the function do_bootm defines what looks to be a uncompressed max length as: uint unc_len = 0x400000; This is passed to gunzip if the image needs to be uncompressed. --snip-- case IH_COMP_GZIP: printf (" Uncompressing %s ... ", name); if (gunzip ((void *)ntohl(hdr->ih_load), unc_len, (uchar *)data, &len) != 0) { puts ("GUNZIP ERROR - must RESET board to recover\n"); SHOW_BOOT_PROGRESS (-6); do_reset (cmdtp, flag, argc, argv); } break; --snip-- gunzip takes this as the second parameter and sets it to dstlen. int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) This is passed to the inflation routine as s.avail_out = dstlen; where inflate from u-boot/lib_generic/zlib.c uses this to halt decompression if the image size can not fit. -- snip -- from int inflate(z, f) -- if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0) r = inflate_packet_flush(z->state->blocks); --snip -- from local int inflate_flush(s, z, r)-- /* compute number of bytes to copy as far as end of window */ n = (uInt)((q <= s->write ? s->write : s->end) - q); if (n > z->avail_out) n = z->avail_out; if (n && r == Z_BUF_ERROR) r = Z_OK; /* update counters */ z->avail_out -= n; z->total_out += n; -- When unc_len is increased - our problem goes away... So: two questions: - what is the best way to manage the size of unc_len? in include/configs/platform.h? Or just make it really_really big? - do you want a patch in u-boot/common/cmd_bootm.c/gunzip to check to see if the image was completely decompressed? OR - do you want a patch in u-boot/lib_generic/zlib.c to return an error if it runs out of room? Thanks -Robin

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[U-Boot-Users] Why exceptions are enabled before exception vector code is copied
by Cedric VINCENT 13 Mar '06

13 Mar '06

Dear Wolfgang. Can I ask you why exceptions are enabled before exception vector code is copied to the low RAM pages ? (I am talking about U-Boot/PPC) On my board, U-Boot crashes before relocation (when debugging) since Xilinx Microprocessor Debugger (XMD) makes a spurious "Machine Check Exception". For other reasons, such an exception could arrived before u-boot starts. Finally, it is a bug or a very strange coding behaviour... Cedric VINCENT.

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[U-Boot-Users] [PATCH] I2C2 support for MPC8548CDS
by Zajac Adam-AAZ004 13 Mar '06

13 Mar '06

The attached patch adds I2C2 support for the MPC8548CDS board. I've performed a limited testing on our MPC8548CDS board and everything seems to be working fine. Since this processor is brand new, I may need to revise the changes when we build our real system based on '8548. Thanks, Adam Zajac <<mpc8548cds_i2c2.patch.gz>>

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[U-Boot-Users] malloc with no return check?
by Andrew Dyer 13 Mar '06

13 Mar '06

I noticed the au1xxx ethernet driver has a malloc where the return value isn't checked. I did some more looking while waiting for a slow flash programmer and at least these files seem to do the same thing: ./drivers/ns8382x.c ./drivers/bcm570x.c ./drivers/rtl8139.c ./drivers/eepro100.c ./drivers/dc2114x.c ./drivers/e1000.c ./drivers/sk98lin/skge.c ./drivers/cfb_console.c ./drivers/natsemi.c ./drivers/inca-ip_sw.c ./drivers/rtl8169.c ./drivers/pcnet.c ./cpu/mips/au1x00_eth.c ./cpu/ppc4xx/serial.c ./cpu/ppc4xx/405gp_enet.c ./cpu/ppc4xx/440gx_enet.c ./cpu/i386/serial.c ./cpu/mpc8xx/scc.c ./common/hush.c ./cpu/mpc8xx/spi.c ?maybe ./cpu/mpc8260/spi.c ?maybe ./cpu/mpc85xx/ether_fcc.c ./cpu/mpc8260/ether_fcc.c ./cpu/mpc5xxx/fec.c ./cpu/mpc8220/fec.c ./tools/easylogo/easylogo.c I didn't look under the board directory or check all varieties of alloc :-) I will submit patches for the mips stuff hopefully next week. -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] [PATCH] in tftp client, recover from lost ACKs
by Brenda J. Butler 13 Mar '06

13 Mar '06

CHANGELOG entry: * Patch by John McCarthy and Brenda J. Butler, 8 July 2005 When the tftp client sends an ack but it gets lost, the server will resend the block. The client was now expecting the next block and ignored this block, the server never got an ack, and they got stuck. Now the tftp client will ack the block the second (and subsequent) time(s) allowing the tftp session to proceed. This little fix assumes that the server will resend exactly the same contents (same size from same offset). Here is the patch for you to look at; it is also in an attachment where the tabs and lines are preserved better. Apply to top of head checkout with patch -p0 < uboot2.patch Index: net/tftp.c =================================================================== RCS file: /u00/cvs/u-boot3/net/tftp.c,v retrieving revision 1.1 retrieving revision 1.3 diff -u -r1.1 -r1.3 --- net/tftp.c 15 Mar 2005 17:53:28 -0000 1.1 +++ net/tftp.c 5 Jul 2005 19:48:46 -0000 1.3 @@ -246,17 +246,17 @@ } } - if (TftpBlock == TftpLastBlock) { - /* - * Same block again; ignore it. - */ - break; - } - TftpLastBlock = TftpBlock; NetSetTimeout (TIMEOUT * CFG_HZ, TftpTimeout); - store_block (TftpBlock - 1, pkt + 2, len); + if (TftpBlock != TftpLastBlock) { + /* + * Same block again; do everything again + * except store it. Hope the server sent + * exactly the same length/contents. + */ + store_block (TftpBlock - 1, pkt + 2, len); + } /* * Acknoledge the block just received, which will prompt

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[U-Boot-Users] [PATCH] fix [id]cache_status for MPC85xx processors
by Murray.Jensen＠csiro.au 13 Mar '06

13 Mar '06

The existing code for the [id]cache_status commands on MPC85xx processors looks at the wrong bit to determine if the L1 cache is enabled. It looks at the most significant bit when it should look at the least significant bit. This patch corrects this bug. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 19, 2005: - fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix fw_setenv with uninitialised environment
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

In tools/env/fw_env.c when the environment is uninitialised, and the default_environment[] array is used instead, if a setenv is done there is a good chance that the array bounds will be exceeded. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix array overflow with fw_setenv on uninitialised environment Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] TQM834x maintainer?
by Kumar Gala 12 Mar '06

12 Mar '06

Who is the maintainer of the TQM834x board? I'm looking at changing 83xx so it runs with the MMU on and wanted to know the following: A) is that issue B) what's the memory map for TQM834x? thanks - kumar

3 3

[U-Boot-Users] PATCH: Add support for EmbeddedPlanet EP88x boards
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch adds support for EmbeddedPlanet EP88x boards. It was tested on EP88xC board with MPC885 processor, 64MB RAM, and 16MB flash. CHANGELOG Add support for EmbeddedPlanet EP88x boards -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

3 5

[U-Boot-Users] extra headers in xilinx ml300 board
by Michael Libeskind 12 Mar '06

12 Mar '06

/board/xilinx/xilinx_enet/emac_adapter.c and /board/xilinx/xilinx_iic/iic_adapter.c both have a #include <configs/ml300.h> which I believe prevents users from making other board configs under the /board/xilinx directory based on the ML300 that use the xilinx_enet and xilinx_iic adapaters. Can this be removed?

2 3

[U-Boot-Users] [PATCH] board support for the mpc8540eval board
by Ron Alder 12 Mar '06

12 Mar '06

The attached patch adds support for the MPC8540 EVAL board. The patch is based on the top of the cvs tree as of 11 July 2005. CHANGELOG entry: * Patch by Ron Alder, 11 July 2005 Add Xianghua Xiao and Lunsheng Wang's support for the GDA MPC8540 EVAL board.

2 1

[U-Boot-Users] [PATCH] add support for Nat Semi DP83865 PHY to MPC85xx TSEC driver
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the National Semiconductor DP83865 gigabit ethernet PHY to the MPC85xx TSEC ethernet driver. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add Nat Semi DP83865 PHY support to MPC85xx TSEC driver Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] add (some) definitions for MPC85xx local bus controller
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds (some) definitions for the MPC85xx local bus controller register bits, in a similar vein to the MPC8260 memory controller, which is almost identical. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add (some) definitions for the MPC85xx local bus controller Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] CPM I/O port pin functions for MPC85xx
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds the file "include/asm-ppc/iopin_85xx.h" which mirrors the functions in "include/asm-ppc/iopin_8260.h" for manipulating the CPM2 I/O pins for MPC85xx processors (that have a CPM). Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add CPM2 I/O pin functions for MPC85xx processors Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix conditional for including ks8695eth driver
by Greg Ungerer 12 Mar '06

12 Mar '06

Move the c-preprocessor conditional check for compiling the ks8695eth driver code to after including the headers. Otherwise it can never be compiled in. Index: drivers/ks8695eth.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/ks8695eth.c,v retrieving revision 1.2 diff -u -r1.2 ks8695eth.c --- drivers/ks8695eth.c 23 May 2005 10:49:51 -0000 1.2 +++ drivers/ks8695eth.c 3 Jun 2005 14:13:54 -0000 @@ -18,8 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifdef CONFIG_DRIVER_KS8695ETH - /****************************************************************************/ #include <common.h> @@ -28,6 +26,7 @@ #include <asm/io.h> #include <asm/arch/platform.h> +#ifdef CONFIG_DRIVER_KS8695ETH /****************************************************************************/ /*

3 3

[U-Boot-Users] [git patch] MPC8349ADS
by Kumar Gala 12 Mar '06

12 Mar '06

Please pull from 'mpc8349ads' branch of git.kernel.org:/pub/scm/boot/u-boot/u-boot.git to receive the following updates: CHANGELOG | 3 board/mpc8349ads/Makefile | 2 board/mpc8349ads/mpc8349ads.c | 41 ---- board/mpc8349ads/pci.c | 380 ++++++++++++++++++++++++++++++++++++++++++ include/asm-ppc/mpc8349_pci.h | 1 include/configs/MPC8349ADS.h | 24 +- 6 files changed, 400 insertions(+), 51 deletions(-) Kumar Gala: Added PCI support for MPC8349ADS board diff --git a/CHANGELOG b/CHANGELOG index c1da98f..6c66441 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Added PCI support for MPC8349ADS board + Patch by Kumar Gala 11 Jan 2006 + * Add support for 28F256J3A flah (=> 64 MB) on PM520 board * Fix compiler problem with at91rm9200dk board. diff --git a/board/mpc8349ads/Makefile b/board/mpc8349ads/Makefile index 4327b0d..f865f9c 100644 --- a/board/mpc8349ads/Makefile +++ b/board/mpc8349ads/Makefile @@ -24,7 +24,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := $(BOARD).o +OBJS := $(BOARD).o pci.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c index da8d3d7..505acbc 100644 --- a/board/mpc8349ads/mpc8349ads.c +++ b/board/mpc8349ads/mpc8349ads.c @@ -147,47 +147,6 @@ int checkboard (void) return 0; } -#if defined(CONFIG_PCI) -/* - * Initialize PCI Devices, report devices found - */ -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_mpc83xxads_config_table[] = { - {PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID, - pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMON_MEMORY | PCI_COMMAND_MASTER - } }, - {} -} -#endif - - -volatile static struct pci_controller hose[] = { - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - }, - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - } -}; -#endif /* CONFIG_PCI */ - - -void -pci_init_board(void) -{ -#ifdef CONFIG_PCI - extern void pci_mpc83xx_init(volatile struct pci_controller *hose); - - pci_mpc83xx_init(hose); -#endif /* CONFIG_PCI */ -} - /* * if MPC8349ADS is soldered with SDRAM */ diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c new file mode 100644 index 0000000..6cafbaa --- /dev/null +++ b/board/mpc8349ads/pci.c @@ -0,0 +1,380 @@ +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <asm/mmu.h> +#include <common.h> +#include <asm/global_data.h> +#include <pci.h> +#include <asm/mpc8349_pci.h> +#include <i2c.h> + +#ifdef CONFIG_PCI + +/* System RAM mapped to PCI space */ +#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE + +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_mpc83xxads_config_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_IDSEL_NUMBER, PCI_ANY_ID, + pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER + } + }, + {} +}; +#endif + +static struct pci_controller pci_hose[] = { + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + }, + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + } +}; + +/************************************************************************** + * + * pib_init() -- initialize the PCA9555PW IO expander on the PIB board + * + */ +void +pib_init(void) +{ + u8 val8; + /* + * Assign PIB PMC slot to desired PCI bus + */ + mpc8349_i2c = (i2c_t*)(CFG_IMMRBAR + CFG_I2C2_OFFSET); + i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); + + val8 = 0; + i2c_write(0x23, 0x6, 1, &val8, 1); + i2c_write(0x23, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x23, 0x2, 1, &val8, 1); + i2c_write(0x23, 0x3, 1, &val8, 1); + + val8 = 0; + i2c_write(0x26, 0x6, 1, &val8, 1); + val8 = 0x34; + i2c_write(0x26, 0x7, 1, &val8, 1); +#if defined(PCI_64BIT) + val8 = 0xf4; /* PMC2:PCI1/64-bit */ +#elif defined(PCI_ALL_PCI1) + val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */ +#elif defined(PCI_ONE_PCI1) + val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */ +#else + val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */ +#endif + i2c_write(0x26, 0x2, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x26, 0x3, 1, &val8, 1); + val8 = 0; + i2c_write(0x27, 0x6, 1, &val8, 1); + i2c_write(0x27, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x27, 0x2, 1, &val8, 1); + val8 = 0xef; + i2c_write(0x27, 0x3, 1, &val8, 1); + asm("eieio"); + +#if defined(PCI_64BIT) + printf("PCI1: 64-bit on PMC2\n"); +#elif defined(PCI_ALL_PCI1) + printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n"); +#elif defined(PCI_ONE_PCI1) + printf("PCI1: 32-bit on PMC1\n"); + printf("PCI2: 32-bit on PMC2, PMC3\n"); +#else + printf("PCI1: 32-bit on PMC1, PMC2\n"); + printf("PCI2: 32-bit on PMC3\n"); +#endif +} + +/************************************************************************** + * pci_init_board() + * + * NOTICE: PCI2 is not currently supported + * + */ +void +pci_init_board(void) +{ + DECLARE_GLOBAL_DATA_PTR; + volatile immap_t * immr; + volatile clk8349_t * clk; + volatile law8349_t * pci_law; + volatile pot8349_t * pci_pot; + volatile pcictrl8349_t * pci_ctrl; + volatile pciconf8349_t * pci_conf; + u16 reg16; + u32 reg32; + u32 dev; + struct pci_controller * hose; + + immr = (immap_t *)CFG_IMMRBAR; + clk = (clk8349_t *)&immr->clk; + pci_law = immr->sysconf.pcilaw; + pci_pot = immr->ios.pot; + pci_ctrl = immr->pci_ctrl; + pci_conf = immr->pci_conf; + + hose = &pci_hose[0]; + + pib_init(); + + /* + * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode + */ + + reg32 = clk->occr; + udelay(2000); + clk->occr = 0xff000000; + udelay(2000); + + /* + * Release PCI RST Output signal + */ + pci_ctrl[0].gcr = 0; + udelay(2000); + pci_ctrl[0].gcr = 1; + +#ifdef CONFIG_MPC83XX_PCI2 + pci_ctrl[1].gcr = 0; + udelay(2000); + pci_ctrl[1].gcr = 1; +#endif + + /* We need to wait at least a 1sec based on PCI specs */ + { + int i; + + for (i = 0; i < 1000; ++i) + udelay (1000); + } + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M; + + /* + * Configure PCI Outbound Translation Windows + */ + + /* PCI1 mem space - prefetch */ + pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK); + + /* PCI1 IO space */ + pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK); + + /* PCI1 mmio - non-prefetch mem space */ + pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[2].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK); + + /* + * Configure PCI Inbound Translation Windows + */ + + /* we need RAM mapped to PCI space for the devices to + * access main memory */ + pci_ctrl[0].pitar1 = 0x0; + pci_ctrl[0].pibar1 = 0x0; + pci_ctrl[0].piebar1 = 0x0; + pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1); + + hose->first_busno = 0; + hose->last_busno = 0xff; + + /* PCI memory prefetch space */ + pci_set_region(hose->regions + 0, + CFG_PCI1_MEM_BASE, + CFG_PCI1_MEM_PHYS, + CFG_PCI1_MEM_SIZE, + PCI_REGION_MEM|PCI_REGION_PREFETCH); + + /* PCI memory space */ + pci_set_region(hose->regions + 1, + CFG_PCI1_MMIO_BASE, + CFG_PCI1_MMIO_PHYS, + CFG_PCI1_MMIO_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 2, + CFG_PCI1_IO_BASE, + CFG_PCI1_IO_PHYS, + CFG_PCI1_IO_SIZE, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(hose->regions + 3, + CONFIG_PCI_SYS_MEM_BUS, + CONFIG_PCI_SYS_MEM_PHYS, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + hose->region_count = 4; + + pci_setup_indirect(hose, + (CFG_IMMRBAR+0x8300), + (CFG_IMMRBAR+0x8304)); + + pci_register_hose(hose); + + /* + * Write to Command register + */ + reg16 = 0xff; + dev = PCI_BDF(hose->first_busno, 0, 0); + pci_hose_read_config_word (hose, dev, PCI_COMMAND, &reg16); + reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16); + + /* + * Clear non-reserved bits in status register. + */ + pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf("PCI: Bus Dev VenId DevId Class Int\n"); +#endif + /* + * Hose scan. + */ + hose->last_busno = pci_hose_scan(hose); + +#ifdef CONFIG_MPC83XX_PCI2 + hose = &pci_hose[1]; + + /* + * Configure PCI Outbound Translation Windows + */ + + /* PCI2 mem space - prefetch */ + pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK); + + /* PCI2 IO space */ + pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK); + + /* PCI2 mmio - non-prefetch mem space */ + pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | (POCMR_CM_256M & POCMR_CM_MASK); + + /* + * Configure PCI Inbound Translation Windows + */ + + /* we need RAM mapped to PCI space for the devices to + * access main memory */ + pci_ctrl[1].pitar1 = 0x0; + pci_ctrl[1].pibar1 = 0x0; + pci_ctrl[1].piebar1 = 0x0; + pci_ctrl[1].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1); + + hose->first_busno = pci_hose[0].last_busno + 1; + hose->last_busno = 0xff; + + /* PCI memory prefetch space */ + pci_set_region(hose->regions + 0, + CFG_PCI2_MEM_BASE, + CFG_PCI2_MEM_PHYS, + CFG_PCI2_MEM_SIZE, + PCI_REGION_MEM|PCI_REGION_PREFETCH); + + /* PCI memory space */ + pci_set_region(hose->regions + 1, + CFG_PCI2_MMIO_BASE, + CFG_PCI2_MMIO_PHYS, + CFG_PCI2_MMIO_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 2, + CFG_PCI2_IO_BASE, + CFG_PCI2_IO_PHYS, + CFG_PCI2_IO_SIZE, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(hose->regions + 3, + CONFIG_PCI_SYS_MEM_BUS, + CONFIG_PCI_SYS_MEM_PHYS, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + hose->region_count = 4; + + pci_setup_indirect(hose, + (CFG_IMMRBAR+0x8380), + (CFG_IMMRBAR+0x8384)); + + pci_register_hose(hose); + + /* + * Write to Command register + */ + reg16 = 0xff; + dev = PCI_BDF(hose->first_busno, 0, 0); + pci_hose_read_config_word (hose, dev, PCI_COMMAND, &reg16); + reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16); + + /* + * Clear non-reserved bits in status register. + */ + pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + + /* + * Hose scan. + */ + hose->last_busno = pci_hose_scan(hose); +#endif + +} +#endif /* CONFIG_PCI */ diff --git a/include/asm-ppc/mpc8349_pci.h b/include/asm-ppc/mpc8349_pci.h index 48255a3..7a1adba 100644 --- a/include/asm-ppc/mpc8349_pci.h +++ b/include/asm-ppc/mpc8349_pci.h @@ -77,6 +77,7 @@ #define POCMR_ENABLE 0x80000000 #define POCMR_PCI_IO 0x40000000 #define POCMR_PREFETCH_EN 0x20000000 +#define POCMR_PCI2 0x10000000 /* Soft PCI reset */ diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index d6d2fab..5677fa1 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -41,9 +41,8 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */ -/* FIXME: Real PCI support will come in a follow-up update. */ -#undef CONFIG_PCI - +#define CONFIG_PCI +#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -324,19 +323,26 @@ * General PCI * Addresses are mapped 1-1. */ + #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE -#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ +#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCI1_MMIO_BASE 0x90000000 +#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE +#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI1_IO_BASE 0x00000000 #define CFG_PCI1_IO_PHYS 0xe2000000 -#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */ +#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */ -#define CFG_PCI2_MEM_BASE 0xA0000000 +#define CFG_PCI2_MEM_BASE 0xa0000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE -#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */ +#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCI2_MMIO_BASE 0xb0000000 +#define CFG_PCI2_MMIO_PHYS CFG_PCI2_MMIO_BASE +#define CFG_PCI2_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI2_IO_BASE 0x00000000 -#define CFG_PCI2_IO_PHYS 0xe3000000 -#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */ +#define CFG_PCI2_IO_PHYS 0xe2100000 +#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */ #if defined(CONFIG_PCI) #define PCI_ALL_PCI1

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[U-Boot-Users] [git patch] flat device tree
by Kumar Gala 12 Mar '06

12 Mar '06

Please pull from 'ft_infr' branch of git.kernel.org:/pub/scm/boot/u-boot/u-boot.git to receive the following updates: CHANGELOG | 28 ++++++++++++++++++++++++++ README | 17 ++++++++++++++++ common/cmd_bootm.c | 16 +++++++++------ common/ft_build.c | 49 ++++++++++++++++++++++++++++++++++++----------- cpu/mpc83xx/cpu.c | 38 ++++++++++++++++++++++++++++++++++++ include/configs/stxxtc.h | 2 + include/ft_build.h | 4 ++- 7 files changed, 136 insertions(+), 18 deletions(-) Kumar Gala: Added CONFIG_ options for bd_t and env in flat dev tree Allow board code to fixup the flat device tree before booting a Added OF_STDOUT_PATH and OF_SOC Add support for passing initrd information via flat device tree Add helper function for generic flat device tree fixups for mpc83xx diff --git a/CHANGELOG b/CHANGELOG index c1da98f..1ad9bd3 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,34 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Add helper function for generic flat device tree fixups for mpc83xx + Patch by Kumar Gala 11 Jan 2006 + +* Add support for passing initrd information via flat device tree + Patch by Kumar Gala 11 Jan 2006 + +* Added OF_STDOUT_PATH and OF_SOC + + OF_STDOUT_PATH specifies the path to the device the kernel can use + for console output + + OF_SOC specifies the proper name of the SOC node if one exists. + Patch by Kumar Gala 11 Jan 2006 + +* Allow board code to fixup the flat device tree before booting a + kernel + Patch by Kumar Gala 11 Jan 2006 + +* Added CONFIG_ options for bd_t and env in flat dev tree + + CONFIG_OF_HAS_BD_T will put a copy of the bd_t + into the resulting flat device tree. + + CONFIG_OF_HAS_UBOOT_ENV will copy the environment + variables from u-boot into the flat device tree + + Patch by Kumar Gala 11 Jan 2006 + * Add support for 28F256J3A flah (=> 64 MB) on PM520 board * Fix compiler problem with at91rm9200dk board. diff --git a/README b/README index 6f61008..ecaef9e 100644 --- a/README +++ b/README @@ -411,7 +411,24 @@ The following options need to be configu The maximum size of the constructed OF tree. OF_CPU - The proper name of the cpus node. + OF_SOC - The proper name of the soc node. OF_TBCLK - The timebase frequency. + OF_STDOUT_PATH - The path to the console device + + CONFIG_OF_HAS_BD_T + + The resulting flat device tree will have a copy of the bd_t. + Space should be pre-allocated in the dts for the bd_t. + + CONFIG_OF_HAS_UBOOT_ENV + + The resulting flat device tree will have a copy of u-boot's + environment variables + + CONFIG_OF_BOARD_SETUP + + Board code has addition modification that it wants to make + to the flat device tree before handing it off to the kernel - Serial Ports: CFG_PL010_SERIAL diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 8599a49..9562dbe 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -819,7 +819,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); #else - ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd); + ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd, initrd_start, initrd_end); /* ft_dump_blob(of_flat_tree); */ #if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) @@ -828,12 +828,16 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl /* * Linux Kernel Parameters: * r3: ptr to OF flat tree, followed by the board info data - * r4: initrd_start or 0 if no initrd - * r5: initrd_end - unused if r4 is 0 - * r6: Start of command line string - * r7: End of command line string + * r4: physical pointer to the kernel itself + * r5: NULL + * r6: NULL + * r7: NULL */ - (*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, cmd_start, cmd_end); + if (getenv("disable_of") != NULL) + (*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, + cmd_start, cmd_end); + else + (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0); #endif } diff --git a/common/ft_build.c b/common/ft_build.c index 65a274f..9e9c906 100644 --- a/common/ft_build.c +++ b/common/ft_build.c @@ -163,7 +163,7 @@ void ft_add_rsvmap(struct ft_cxt *cxt, u ((u64 *) cxt->pres)[0] = cpu_to_be64(physaddr); /* phys = 0, size = 0, terminate */ ((u64 *) cxt->pres)[1] = cpu_to_be64(size); - cxt->pres += 18; /* advance */ + cxt->pres += 16; /* advance */ ((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */ ((u64 *) cxt->pres)[1] = 0; @@ -529,6 +529,7 @@ extern uchar(*env_get_char) (int); #define BDM(x) { .name = #x, .offset = offsetof(bd_t, bi_ ##x ) } +#ifdef CONFIG_OF_HAS_BD_T static const struct { const char *name; int offset; @@ -574,19 +575,24 @@ static const struct { #endif BDM(baudrate), }; +#endif -void ft_setup(void *blob, int size, bd_t * bd) +void ft_setup(void *blob, int size, bd_t * bd, ulong initrd_start, ulong initrd_end) { - DECLARE_GLOBAL_DATA_PTR; - u8 *end; u32 *p; int len; struct ft_cxt cxt; - int i, k, nxt; - static char tmpenv[256]; - char *s, *lval, *rval; ulong clock; - uint32_t v; +#if defined(CONFIG_OF_HAS_UBOOT_ENV) + int k, nxt; +#endif +#if defined(CONFIG_OF_HAS_BD_T) + u8 *end; +#endif +#if defined(CONFIG_OF_HAS_UBOOT_ENV) || defined(CONFIG_OF_HAS_BD_T) + int i; + static char tmpenv[256]; +#endif /* disable OF tree; booting old kernel */ if (getenv("disable_of") != NULL) { @@ -596,7 +602,8 @@ void ft_setup(void *blob, int size, bd_t ft_begin(&cxt, blob, size); - /* fs_add_rsvmap not used */ + if (initrd_start && initrd_end) + ft_add_rsvmap(&cxt, initrd_start, initrd_end - initrd_start + 1); ft_begin_tree(&cxt); @@ -610,9 +617,12 @@ void ft_setup(void *blob, int size, bd_t /* back into root */ ft_backtrack_node(&cxt); +#ifdef CONFIG_OF_HAS_UBOOT_ENV ft_begin_node(&cxt, "u-boot-env"); for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { + char *s, *lval, *rval; + for (nxt = i; env_get_char(nxt) != '\0'; ++nxt) ; s = tmpenv; for (k = i; k < nxt && s < &tmpenv[sizeof(tmpenv) - 1]; ++k) @@ -629,12 +639,20 @@ void ft_setup(void *blob, int size, bd_t } ft_end_node(&cxt); +#endif ft_begin_node(&cxt, "chosen"); ft_prop_str(&cxt, "name", "chosen"); ft_prop_str(&cxt, "bootargs", getenv("bootargs")); ft_prop_int(&cxt, "linux,platform", 0x600); /* what is this? */ + if (initrd_start && initrd_end) { + ft_prop_int(&cxt, "linux,initrd-start", initrd_start); + ft_prop_int(&cxt, "linux,initrd-end", initrd_end); + } +#ifdef OF_STDOUT_PATH + ft_prop_str(&cxt, "linux,stdout-path", OF_STDOUT_PATH); +#endif ft_end_node(&cxt); @@ -647,14 +665,19 @@ void ft_setup(void *blob, int size, bd_t ft_dump_blob(blob); */ +#ifdef CONFIG_OF_HAS_BD_T /* paste the bd_t at the end of the flat tree */ end = (char *)blob + be32_to_cpu(((struct boot_param_header *)blob)->totalsize); memcpy(end, bd, sizeof(*bd)); +#endif #ifdef CONFIG_PPC +#ifdef CONFIG_OF_HAS_BD_T for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) { + uint32_t v; + sprintf(tmpenv, "/bd_t/%s", bd_map[i].name); v = *(uint32_t *)((char *)bd + bd_map[i].offset); @@ -670,6 +693,7 @@ void ft_setup(void *blob, int size, bd_t p = ft_get_prop(blob, "/bd_t/ethspeed", &len); if (p != NULL) *p = cpu_to_be32((uint32_t) bd->bi_ethspeed); +#endif clock = bd->bi_intfreq; p = ft_get_prop(blob, "/cpus/" OF_CPU "/clock-frequency", &len); @@ -680,11 +704,14 @@ void ft_setup(void *blob, int size, bd_t clock = OF_TBCLK; p = ft_get_prop(blob, "/cpus/" OF_CPU "/timebase-frequency", &len); if (p != NULL) - *p = cpu_to_be32(OF_TBCLK); + *p = cpu_to_be32(clock); #endif - #endif /* __powerpc__ */ +#ifdef CONFIG_OF_BOARD_SETUP + ft_board_setup(blob, bd); +#endif + /* printf("final OF-tree\n"); ft_dump_blob(blob); diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 8c9b515..e49e4fe 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -35,6 +35,7 @@ #include <watchdog.h> #include <command.h> #include <mpc83xx.h> +#include <ft_build.h> #include <asm/processor.h> @@ -151,3 +152,40 @@ void watchdog_reset (void) hang(); /* FIXME: implement watchdog_reset()? */ } #endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_OF_FLAT_TREE) +void +ft_cpu_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + ulong clock; + + clock = bd->bi_busfreq; + p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + +#ifdef CONFIG_MPC83XX_TSEC1 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len); + memcpy(p, bd->bi_enetaddr, 6); +#endif + +#ifdef CONFIG_MPC83XX_TSEC2 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len); + memcpy(p, bd->bi_enet1addr, 6); +#endif +} +#endif diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 3ffe6b2..be6c36c 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -584,5 +584,7 @@ typedef unsigned int led_id_t; #define OF_CPU "PowerPC,MPC870@0" #define OF_TBCLK (MPC8XX_HZ / 16) +#define CONFIG_OF_HAS_BD_T 1 +#define CONFIG_OF_HAS_UBOOT_ENV 1 #endif /* __CONFIG_H */ diff --git a/include/ft_build.h b/include/ft_build.h index 9104b1a..47ca575 100644 --- a/include/ft_build.h +++ b/include/ft_build.h @@ -57,10 +57,12 @@ void ft_prop_int(struct ft_cxt *cxt, con void ft_begin(struct ft_cxt *cxt, void *blob, int max_size); void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size); -void ft_setup(void *blob, int size, bd_t * bd); +void ft_setup(void *blob, int size, bd_t * bd, ulong initrd_start, ulong initrd_end); void ft_dump_blob(const void *bphp); void ft_merge_blob(struct ft_cxt *cxt, void *blob); void *ft_get_prop(void *bphp, const char *propname, int *szp); +void ft_board_setup(void *blob, bd_t *bd); + #endif

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