December 2006 - U-Boot

Re: [U-Boot-Users] [DNX#2006120742000027] [PATCH] Add support for 8641 Rev 2 silicon.
by U-Boot patch tracking system 07 Dec '06

07 Dec '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006120742000027]. Please keep this ticket ID string in the subject line of any e-mail replies!!! Your U-Boot support team Powered by OTRS (http://otrs.org/)

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Re: [U-Boot-Users] [DNX#2006120742000036] [PATCH] Set Rev 2.x 86xx PIC in mixed mode.
by U-Boot patch tracking system 07 Dec '06

07 Dec '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006120742000036]. Please keep this ticket ID string in the subject line of any e-mail replies!!! Your U-Boot support team Powered by OTRS (http://otrs.org/)

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Re: [U-Boot-Users] [DNX#2006120742000018] [PATCH] Add flash cmd function to 8641HPCN ramboot
by U-Boot patch tracking system 07 Dec '06

07 Dec '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006120742000018]. Please keep this ticket ID string in the subject line of any e-mail replies!!! Your U-Boot support team Powered by OTRS (http://otrs.org/)

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Re: [U-Boot-Users] [DNX#2006120742000018] [PATCH] Add flash cmd function to 8641HPCN ramboot [...]
by DENX Support System 07 Dec '06

07 Dec '06

Hello list, inside the automatic U-Boot patch tracking system a new ticket [DNX#2006120742000018] was created: <snip> > From: Jason Jin <jason.jin(a)freescale.com> > > Also fixes some commmand for 8641 HPCN ramboot case. > > Signed-off-by: Jason Jin <jason.jin(a)freescale.com> > Signed-off-by: Jon Loeliger <jdl(a)freescale.com> > --- > include/configs/MPC8641HPCN.h | 16 +++------------- > 1 files changed, 3 insertions(+), 13 deletions(-) > > diff --git a/include/configs/MPC8641HPCN.h > b/include/configs/MPC8641HPCN.h > index 4a313af..0e42fa0 100644 > --- a/include/configs/MPC8641HPCN.h > +++ b/include/configs/MPC8641HPCN.h > @@ -212,7 +212,6 @@ #undef CFG_RAMBOOT > #endif > > #if defined(CFG_RAMBOOT) > -#undef CFG_FLASH_CFI_DRIVER > #undef CONFIG_SPD_EEPROM > #define CFG_SDRAM_SIZE 256 > #endif > @@ -468,7 +467,6 @@ #ifndef CFG_RAMBOOT > #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ > #define CFG_ENV_SIZE 0x2000 > #else > - #define CFG_NO_FLASH 1 /* Flash is not usable now */ > #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ > #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) > #define CFG_ENV_SIZE 0x2000 > @@ -486,21 +484,13 @@ #if defined(CFG_RAMBOOT) > | CFG_CMD_SCSI \ > | CFG_CMD_EXT2) \ > & \ > - ~(CFG_CMD_ENV \ > - | CFG_CMD_IMLS \ > - | CFG_CMD_FLASH \ > - | CFG_CMD_LOADS)) > + ~(CFG_CMD_ENV)) > #else > #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ > | CFG_CMD_PING \ > - | CFG_CMD_I2C \ > - | CFG_CMD_SCSI \ > - | CGF_CMD_EXT2) \ > + | CFG_CMD_I2C) \ > & \ > - ~(CFG_CMD_ENV \ > - | CFG_CMD_IMLS \ > - | CFG_CMD_FLASH \ > - | CFG_CMD_LOADS)) > + ~(CFG_CMD_ENV)) > #endif > #else > #if defined(CONFIG_PCI) > -- > 1.4.2.3 </snip> Your U-Boot support team

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[U-Boot-Users] [PATCH] Set Rev 2.x 86xx PIC in mixed mode.
by Jon Loeliger 07 Dec '06

07 Dec '06

From: Haiying Wang <haiying.wang(a)freescale.com> Prevent false interrupt from hanging Linux as MSR[EE] is set to enable interrupts by changing the PIC out of the default pass through mode into mixed mode. Signed-off-by: Haiying Wang <haiying.wang(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- cpu/mpc86xx/interrupts.c | 20 ++++++++++++++++++++ include/asm-ppc/immap_86xx.h | 2 ++ 2 files changed, 22 insertions(+), 0 deletions(-) diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c index 1df6cdc..49820bb 100644 --- a/cpu/mpc86xx/interrupts.c +++ b/cpu/mpc86xx/interrupts.c @@ -80,6 +80,26 @@ int interrupt_init(void) { int ret; + /* + * The IRQ0 on Rev 2 is pulled high (low in Rev 1.x) to + * implement PEX10 errata. As INT is active high, it + * will cause core to take 0x500 interrupt. + * + * Due to the PIC's default pass through mode, as soon + * as interrupts are enabled (MSR[EE] = 1), an interrupt + * will be taken and u-boot will hang. This is due to a + * hardware change (per an errata fix) on new revisions + * of the board with Rev 2.x parts. + * + * Setting the PIC to mixed mode prevents the hang. + */ + if ((get_svr() & 0xf0) == 0x20) { + volatile immap_t *immr = (immap_t *)CFG_IMMR; + immr->im_pic.gcr = MPC86xx_PICGCR_RST; + while (immr->im_pic.gcr & MPC86xx_PICGCR_RST); + immr->im_pic.gcr = MPC86xx_PICGCR_MODE; + } + /* call cpu specific function from $(CPU)/interrupts.c */ ret = interrupt_init_cpu(&decrementer_count); diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index a5552c4..0e3fc34 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -721,6 +721,8 @@ typedef struct ccsr_pic { uint frr; /* 0x41000 - Feature Reporting Register */ char res10[28]; uint gcr; /* 0x41020 - Global Configuration Register */ +#define MPC86xx_PICGCR_RST 0x80000000 +#define MPC86xx_PICGCR_MODE 0x20000000 char res11[92]; uint vir; /* 0x41080 - Vendor Identification Register */ char res12[12]; -- 1.4.2.3

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[U-Boot-Users] [PATCH] Add support for 8641 Rev 2 silicon.
by Jon Loeliger 07 Dec '06

07 Dec '06

From: Ed Swarthout <ed.swarthout(a)freescale.com> Without this patch, I am unable to get to the prompt on rev 2 silicon. Only set ddrioovcr for rev1. Signed-off-by: Ed Swarthout<ed.swarthout(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- cpu/mpc86xx/spd_sdram.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index b18e822..ac9ff81 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -284,9 +284,9 @@ #endif } /* - * Adjust DDR II IO voltage biasing. It just makes it work. + * Adjust DDR II IO voltage biasing. Rev1 only */ - if (spd.mem_type == SPD_MEMTYPE_DDR2) { + if (((get_svr() & 0xf0) == 0x10) && (spd.mem_type == SPD_MEMTYPE_DDR2)) { gur->ddrioovcr = (0 | 0x80000000 /* Enable */ | 0x10000000 /* VSEL to 1.8V */ -- 1.4.2.3

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[U-Boot-Users] [PATCH] Add flash cmd function to 8641HPCN ramboot
by Jon Loeliger 07 Dec '06

07 Dec '06

From: Jason Jin <jason.jin(a)freescale.com> Also fixes some commmand for 8641 HPCN ramboot case. Signed-off-by: Jason Jin <jason.jin(a)freescale.com> Signed-off-by: Jon Loeliger <jdl(a)freescale.com> --- include/configs/MPC8641HPCN.h | 16 +++------------- 1 files changed, 3 insertions(+), 13 deletions(-) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 4a313af..0e42fa0 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -212,7 +212,6 @@ #undef CFG_RAMBOOT #endif #if defined(CFG_RAMBOOT) -#undef CFG_FLASH_CFI_DRIVER #undef CONFIG_SPD_EEPROM #define CFG_SDRAM_SIZE 256 #endif @@ -468,7 +467,6 @@ #ifndef CFG_RAMBOOT #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ #define CFG_ENV_SIZE 0x2000 #else - #define CFG_NO_FLASH 1 /* Flash is not usable now */ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) #define CFG_ENV_SIZE 0x2000 @@ -486,21 +484,13 @@ #if defined(CFG_RAMBOOT) | CFG_CMD_SCSI \ | CFG_CMD_EXT2) \ & \ - ~(CFG_CMD_ENV \ - | CFG_CMD_IMLS \ - | CFG_CMD_FLASH \ - | CFG_CMD_LOADS)) + ~(CFG_CMD_ENV)) #else #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_PING \ - | CFG_CMD_I2C \ - | CFG_CMD_SCSI \ - | CGF_CMD_EXT2) \ + | CFG_CMD_I2C) \ & \ - ~(CFG_CMD_ENV \ - | CFG_CMD_IMLS \ - | CFG_CMD_FLASH \ - | CFG_CMD_LOADS)) + ~(CFG_CMD_ENV)) #endif #else #if defined(CONFIG_PCI) -- 1.4.2.3

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Re: [U-Boot-Users] [PATCH] 83xx: Put the version (and magic) after the HRCW.
by Joakim Tjernlund 07 Dec '06

07 Dec '06

> > Sam Song wrote: > > Jerry Van Baren <gerald.vanbaren(a)comcast.net> wrote: > >> Put the version (and magic) after the HRCW. This > >> puts it in a fixed location in flash, not at the > > start > >> of flash but as close as we can get. > > > > Nice effort. Space saving and better version check. > > > > I guess the same change could apply for MPC8260/47/8. > > > > Thanks, > > > > Sam > > Yes. Most boards have the version in the first bytes of > flash, but this > was not possible on the 82xx because of the HRCW, so it was put in > .data. This set up was copied for the 83xx (which also has a > HRCW). My > change moves it back to .text just after the HRCW. I put also the > u-boot magic number back in in honor of Wolfgang. ;-) > > If you change the file names in the patch, it probably would > apply. :-) > I intend to do this (perhaps literally), but ran out of > ambition tonight. > Looks almost the same as the patch I sent the other day. I am good with either version. Jocke

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[U-Boot-Users] location independence
by cam＠sysgo.com 07 Dec '06

07 Dec '06

Hello, I have to evaluate if U-Boot fulfills an special requirement, and for that I have to answer the following: Is the part of the U-Boot code that is executed from flash "location independent"? By "location independent" I mean code that can be executed from any address range (in flash) without any modification. The target is MPC85xx. (The bootpage is obviously out of question). Best regards, Carlos Mitidieri

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[U-Boot-Users] reg usb commands
by mahendra varman 07 Dec '06

07 Dec '06

Hi Iam using U-boot 1.1.6 for a board under cmd_usb.c i can find commands for usb reset command usb start command usb device info command usb read command but I COULD NOT FIND A COMMAND FOR USB WRITE any idea?

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[U-Boot-Users] 85xx sync to msync necessary?
by Sam Song 07 Dec '06

07 Dec '06

Hi, I found that there was an unclear assembly usage on 'sync' for 85xx in current tree. On P202 of E500CORERM.pdf, it says that 'sync' has replaced by 'msync' in BOOK-E and E500. But there are still some 'sync' for 85xx at cpu/mpc85xx folder and other files like drivers/ tsec.c. I changed all 'sync' as 'msync' on my customized 8548 boards. Seems no obvious difference. Both OK. So I wonder whether we should fix it. Thoughts? Thanks, Sam ___________________________________________________________ 抢注雅虎免费邮箱-3.5G容量，20M附件！ http://cn.mail.yahoo.com

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[U-Boot-Users] [PATCH] Write YAFFS filesystem images to NAND (Updated)
by Frank Mandarino 06 Dec '06

06 Dec '06

The attached patch updates my previous patch of Sept 9th, 2006 for the latest versions of U-Boot and YAFFS. It adds two sub-commands, "write.yaffs" and "write.yaffs1", to the nand command set, which write YAFFS filesystem images generated by mkyaffs2image and mkyaffsimage from RAM to NAND flash. YAFFS images cannot be written using the normal nand write command because they contain data which must be written to the NAND OOB area. The "write.yaffs" command writes images generated by mkyaffs2image for 2048+64 NAND chips. I do not have access to this type of chip, so it has not been tested (any takers?). The "write.yaffs1" command writes images generated by mkyaffsimage for 512+16 NAND. It writes the older yaffs1 OOB format used by Linux kernels before 2.6.18, or, by defining a CFG parameter, it writes the newer OOB format used by Linux 2.6.18 and up. This patch is much simpler than the previous version because the new nand_util.c code contains most of the required functionality. It uses two CFG parameters: CFG_NAND_WRITE_YAFFS - enables the YAFFS writing code. CFG_NAND_WRITE_YAFFS1_NEW_OOB_LAYOUT - writes the OOB data in the format used by Linux 2.6.18 and up. I find it VERY convenient to write YAFFS filesystems in U-Boot, especially the Linux root filesystem. Without this patch, I need to maintain a separate non-YAFFS root filesystem in NAND so that I can boot Linux in order to update my YAFFS root filesystem. This wastes valuable NAND space and is more time-consuming. Signed-off-by: Frank Mandarino <fmandarino(a)endrelia.com> Regards, ../fam -- Frank Mandarino fmandarino(a)endrelia.com Endrelia Technologies Inc. Toronto, Ontario, Canada

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[U-Boot-Users] Access ErrorHeadline functionality has been disabled from your intranet.
by Wade Pauline 06 Dec '06

06 Dec '06

Liberal MP Paul Szabo, one of the Liberals who voted against same sex marriage last year, called Harper's motion "hollow" and said he'll vote against it. He wants to focus on bringing another Grey Cup home to Saskatchewan, he said. If you are the system administrator, please click here. Disaster recovery is preparing for the worst. And Harper has said if the House votes against changing the law to allow same-sex marriages, the matter would be settled. If you use a combination of normal and differential backups, you must have the last normal backup media set and the last differential backup sets to restore your data. Access ErrorHeadline functionality has been disabled from your intranet. If you have questions, please visit our forum. Access ErrorHeadline functionality has been disabled from your intranet. If you are the system administrator, please click here. West Vancouver police spokesman Sgt. Copying is a useful temporary method to back up files between normal and incremental backups; it does not affect other backup operations. This could be used for internet backup, disk backup, hard drive or file backups. Care should be taken to label them. If you are the system administrator, please click here. If you are the system administrator, please click here. "If we have a party vote, he'll say that I muzzled my MPs and that if I had let them vote freely the motion would have passed," Dion said of Harper. If you are the system administrator, please click here. Access ErrorHeadline functionality has been disabled from your intranet. If the backup does not fit onto one or a few CDs, it is easy to use many discs with sequential labels. Please contact your system administrator to report this fault. Link to this Article! With people, one generation is older than the following generation. File-by-file backup is far more efficient.

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[U-Boot-Users] [PATCH] Add support for AT91RM9200 NAND (Smartmedia) controller
by Frank Mandarino 06 Dec '06

06 Dec '06

The attached patch adds support for the AT91RM9200 NAND (Smartmedia) controller, allowing use of the U-Boot NAND commands on AT91RM9200-based boards which use NAND flash. It uses four CFG parameters: CFG_NAND_BASE - address of Smartmedia chip select (normally 0x40000000) CFG_NAND_AT91_CLE_BIT - address bit number used to set CLE signal CFG_NAND_AT91_ALE_BIT - address bit number used to set ALE signal CFG_NAND_CHIP_DELAY - command delay time in microseconds I have been using this code for almost a year with no problems on our custom AT91RM9200 board. I believe it would be useful for others as the popularity of NAND flash increases. Regards, ../fam -- Frank Mandarino fmandarino(a)endrelia.com Endrelia Technologies Inc. Toronto, Ontario, Canada

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Re: [U-Boot-Users] [PATCH] use CFI-Flash and board depended driver together
by Yotam Admon 06 Dec '06

06 Dec '06

Hi, The callback function which obtains the portwidth, chipwidth is the prefer option for a more generic solution. The driver will then support the none CFI devices as well. Call for a board specific function to setup the flash_info_t for that bank will cause a code duplication for auto detect of none CFI devices. Thanks, Yotam -----Original Message----- From: Tolunay Orkun [mailto:listmember@orkun.us] Sent: Tuesday, December 05, 2006 2:56 AM To: U-Boot Cc: Stefan Roese; Jens Scharsig; Andrew Dyer; Rui Sousa; Timur Tabi; Yotam Admon; matvejchikov(a)gmail.com Subject: Re: [U-Boot-Users] [PATCH] use CFI-Flash and board depended driver together Tolunay Orkun wrote: > Jens Scharsig wrote: >> Hello, >> >> i need to use cfi and board flash driver together. This Patch contains a >> simple way to do this with a minimun changes at cfi_flash.c. All changes >> will only enable if CFG_FLASH_BOARD_DRIVER defined. >> >> >> CHANGELOG >> >> * Rename flash_print_info, flash_erase, write_buff and >> flash_real_protect to cfi_xxxx, if CFG_FLASH_BOARD_DRIVER is >> defined. This will allow use cfi driver together with board a >> dependent flash driver (see README.board-dependent-flash for >> an example) > > I have to object to this patch. I will be providing a testing patch > tonight or tomorrow that will address this issue properly which is > teaching cfi_flash driver to deal with non-cfi flash. There is no need > to have two flash drivers... I've started with this patch but ran into some roadblocks so it did not happen last Friday as promised. I have been thinking better solutions that avoids two sets of flash drivers. Basically, I was trying to detect the port and chip width by using a technique similar to flash_detect_cfi() but instead of checking for combinations of Q R Y etc., I was trying to see there was a change in the first 16 bytes of flash. Well that seemed workable until I actually tried the modified code :( The probe this way failed miserably with Intel flash responding to 0x90 in either in upper or lower byte even in 16-bit mode! Thus, if the flash is not detected by CFI method the portwidth and chipwidth will have to be set manually for even jedec ids to be read properly. If the jedec probe worked, the jedec ids could be used to lookup a static list for proper configuration of info structure. I have not given up yet. I would like to start over and take a simpler approach. Here is the idea: The CFI driver will do CFI probe. If the probe is not successful and board configuration has defined a macro, CFI driver will call a board specific function to setup the flash_info_t for that bank. I will pass the bank number to the function as argument. If the function returns non-zero, I will assume that board has setup the info structure successfully (hopefully) and move on. This still avoids driver code duplication by only passing the responsibility of setting up the info structure to the board. A variation of this could be the callback function obtains the portwidth, chipwidth (and possibly the command set) for the specific bank and do flash_read_jedec_ids to get the ids and lookup the values from a statically compiled list like I originally intended. This list would be compiled in compiled only if this feature is enabled, say CFG_FLASH_CFI_JEDEC. Instead of a callback we could use the flash_base address list and augment the array to an array of structures which include base, portwidth and chipwidth but that would require a change in all boards that uses CFI driver. A callback to the board supplied function is the least invasive way in my opinion. In either method, to cut the compiled image size a bit if there is definitely no cfi compliant flash on any bank we can omit the cfi detection and other cfi related setup code using a macro like CFG_FLASH_CFI_DISABLE (or something like that). I would like to hear opinions regarding which choices looks more attractive... Tolunay

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[U-Boot-Users] [PATCH] NXP Semiconductors I2C IP block drivers
by Robert Deliën 06 Dec '06

06 Dec '06

Hi, The patch attached adds drivers for the NXP Semiconductors (former Philips Semiconductors) Nexperia I2C IP blocks as found onboard the PNX8550, PNX8535 and PNX8536. The configuration of the SilverBox development platform has been altered to include these new drivers. This patch depends on the PNX8550 on SilverBox support patch I have submitted at 04-12-2006 13:43. With kind regards, Robert.

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[U-Boot-Users] Memory Maps
by Matias Sundman (AS/EAB) 06 Dec '06

06 Dec '06

Hello, In the PowerPC architecture and specifically a Freescale 8270 the HRCW word decides if U-boot is going to be booted from regions: HIMEM 0xFE00_0000-0xFFFF_FFFF or LOMEM 0x0000_0000-0x01FF_FFFF. The CIP field decides the exception vectors; physical address 0xFFFn_nnnn or physical address 0x000n_nnnn. Now, in my current board range I have TEXT_BASE as 0xFFF0'0000 and CFG_FLASH_BASE as 0XFE00'0000. ( 32M ) I my world that makes sense since the flash is mapped in the same range as the bootloader. The start.S file says that things will be fine as longs as we configure BR0 with the same boot ROM link address. Isn't TEXT_BASE the boot ROM link address? In one of the TQM boards ( 8260 ) I see that TEXT_BASE is 0x4000'0000 and the FLASH_BASE is 0xFF80'0000. Here the TEXT_BASE is mapped to a totally different address than HIMEM/LOMEM, the exception vectors and the FLASH_BASE - How is that possible? In other words - Could someone explain what the relationship is actually between TEXT_BASE, FLASH_BASE and the BR0 register settings are? Thx // Matias

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[U-Boot-Users] Problems with an E1000 driver
by Marc Lawrence 06 Dec '06

06 Dec '06

Dear All This is my first post - so a quick background. In my spare time I am working on the Qnap Turbostation series of NAS devices; which uses an extended version of U-Boot 1.2. (the modified code - only sandpoint8245.c can be obtained from Qnap). Further board specifications and info can be found at http://scratchpad.wikia.com/wiki/Open_Turbostation:TS101 A colleague is looking at porting the existing U-Boot to version 1.6 - and trying to enable network support (the Qnap version is based on sandpoint 8245). There are two board variants - one with an RTL 8139 ethernet driver (which seems to work no problems); and mine which has an Intel 8250 OEM. Currently my version of the boot code fails; and generates program exceptions. Working backwards we have identified that the failure is occurring in e1000.c between lines 2580 and 2625 - within the e1000_sw_init function. In particular I suspect the code problem is with reading the E1000_STATUS register. <<<>>> if (hw->mac_type >= e1000_82543) { uint32_t status = E1000_READ_REG(hw, STATUS); <<<>>> I had a quick look on the tracker list; and google but was not able to find anything specific. (perhaps im just blind ;-) Currently we daisy chain to the new U-Boot version (as JTAG access is somewhat unreliable at the moment). Thus we download the new version to RAM; then copy it to spare flash; and issue the 'go' command from the U-Boot prompt. I know this is not the recommended path - and therefore wonder if this might also be the associated with the problem. A program trace is attached. I would be grateful if someone could provide some pointers about what might be going wrong. I do know (from debug messages) that the code point never reaches the end of the function - i.e. return E1000_SUCCESS; Many thanks, Marc Ps Please note: to aid initial debugging I had issued extra printf statements - showing "Marc:...".

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[U-Boot-Users] U-boot patches for Malta board
by Sathesh Babu Edara 06 Dec '06

06 Dec '06

Hi, Can some one give pointers on where can i get u-bootloader patches for Malta board?. Regards, Sathesh

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[U-Boot-Users] U-boot for Malta board and MIPS24KE
by Sathesh Babu Edara 06 Dec '06

06 Dec '06

Hi , Could you please tell me U-boot implentation for Malta board?. Does u-boot have support for MIPS24KE. Thanks in advance. Regards, Sathesh

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[U-Boot-Users] Breakage of board ports on new features.
by Pantelis Antoniou 05 Dec '06

05 Dec '06

Hi there, So I'm cleaning my new 834x board in the time period of just two days. There's a commit with a bunch of 834x related fixes which totally broke the board port. I understand that the main code is volatile, but it seems there's a blatant disregard of keeping up a minimum of backwards compatibility. If someone changes code that's supporting a bunch of board ports, please put in some default macros to ensure past behaviour is preserved. I.e. in this case the CONFIG_MPC8349 & CFG_FLASH_SIZE could have easily been defined with the defaults values for the non updated board ports to continue working. Please don't make our lives harder than they are. /me steps down the soapbox. Regards Pantelis

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Re: [U-Boot-Users] LAN9118 ethernet controller (William Feng)
by Tim Braun 05 Dec '06

05 Dec '06

> Date: Fri, 01 Dec 2006 17:50:45 -0800 > From: William Feng <wfeng(a)mysourcecommunications.com> > I have an ARM board which has a LAN9118 ethernet controller (SMSC) > instead of a LAN91C111 which is supported in u-boot. Is there any > existing patch or ongoing work to support it? Here's a patch I've got on the shelf against 1.1.3 which should provide a driver for you. It uses CONFIG_NET_MULTI, CONFIG_DRIVER_LAN911X, and CONFIG_LAN911x_BASE to configure. Tim Braun, Sr. Des. Eng. LibreStream Technologies 200-55 Rothwell Rd. Winnipeg R3P 2M5

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[U-Boot-Users] Flat device tree, blob for Icecube board
by Wolfgang Grandegger 05 Dec '06

05 Dec '06

Hello, does anyone have a flat device tree blob for the Icecube eval board? Or what is the recipe to make one? TIA. Wolfgang.

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[U-Boot-Users] u-boot won't start on its own anymore...
by mitsy 05 Dec '06

05 Dec '06

My u-boot was running fine until I added some commands. What's happening is that it runs just fine if I have BDI attached or run "reset" command from u-boot itself. However, if I physically power cycle without BDI, it won't start anymore on its own. The functions I have added have nothing to do with the boot-up, and the bdi config file has been always the same so I don't believe it's some initialization issue. I assume something went wrong when the code size changed... Has anyone seen this issue? Any suggestion on what should I look for to fix this? Thank you so much for your advice! Mitsy

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[U-Boot-Users] Boot Linux kernel from external HDD, connected to PCI interface.
by Leonid 05 Dec '06

05 Dec '06

Hi: I have AMCC PPC440EP card with Silicon Image 680 PCI-IDE chip, external HDD is connected to it as IDE1 - see snapshot from Linux booting log: SiI680: IDE controller at PCI slot 0000:01:06.0 SiI680: chipset revision 2 SiI680: BASE CLOCK == 133 SiI680: 100% native mode on irq 25 ide0: MMIO-DMA , BIOS settings: hda:pio, hdb:pio ide1: MMIO-DMA , BIOS settings: hdc:pio, hdd:pio hdc: Maxtor 6L100P0, ATA DISK drive ide1 at 0xd105cfc0-0xd105cfc7,0xd105cfca on irq 25 hdc: max request size: 64KiB hdc: 195813072 sectors (100256 MB) w/8192KiB Cache, CHS=65535/16/63, UDMA(133) hdc: cache flushes supported hdc: hdc1 hdc2 hdc3 However this HDD is visible only because Linux kernel happened to have drivers for Silicon Image chip. I boot Linux kernel either from the flash or from RAM. The question is does u-boot itself support Silicon Image or, by other words, can I boot kernel from some partition on HDD (behind this PCI-IDE chip) and if yes - how? Thanks, Leonid.

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