January 2006 - U-Boot

[U-Boot-Users] [PATCH] Only disable the MPC83xx watchdog if its enabled out of reset
by Kumar Gala 12 Mar '06

12 Mar '06

Only disable the MPC83xx watchdog if its enabled out of reset Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Only disable the MPC83xx watchdog if its enabled out of reset. If its disabled out of reset SW can later enable it if so desired Patch by Kumar Gala 21 Dec 2005 --- commit 660737c7f106a7c7817375ed29e52fbf28c5838f tree d2448e66f669ed2a5464535eab5a747aafe14eb1 parent ae907acc35249e178692e74a6f76df6eb217cf6b author Kumar Gala <galak(a)kernel.crashing.org> Wed, 21 Dec 2005 17:39:01 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 21 Dec 2005 17:39:01 -0600 cpu/mpc83xx/start.S | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index fb001a6..0e1a5fd 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -426,8 +426,14 @@ init_e300_core: /* time t 10 */ #else /* Disable Wathcdog */ /*-------------------*/ + lwz r4, SWCRR(r3) + /* Check to see if its enabled for disabling + once disabled by SW you can't re-enable */ + andi. r4, r4, 0x4 + beq 1f xor r4, r4, r4 stw r4, SWCRR(r3) +1: #endif /* CONFIG_WATCHDOG */ /* Initialize the Hardware Implementation-dependent Registers */

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[U-Boot-Users] [PATCH] Report back PCI bus when doing table based device config
by Kumar Gala 12 Mar '06

12 Mar '06

Report back PCI bus when doing table based device config Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Report back PCI bus when doing table based device config Patch by Kumar Gala 14 Dec 2005 --- commit 837f814f04849814fd95710796e8e107b01c9121 tree d8f0e663f827d5fb4deb9b5e20841cd9ddcc2807 parent d7b4ec6d89455f45e3c0e6d48daaba4d917c26a7 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:59:49 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:59:49 -0600 drivers/pci.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/pci.c b/drivers/pci.c index 5360030..3c24b99 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -459,6 +459,7 @@ int pci_hose_scan_bus(struct pci_control PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); if (cfg) { cfg->config_device(hose, dev, cfg); + sub_bus = max(sub_bus, hose->current_busno); #ifdef CONFIG_PCI_PNP } else { int n = pciauto_config_device(hose, dev);

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[U-Boot-Users] [PATCH] Allow config of GPIO direction & data registers at boot on 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Allow config of GPIO direction & data registers at boot on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Allow config of GPIO direction & data registers at boot on 83xx Patch by Kumar Gala 14 Dec 2005 Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- commit 318fab58c6c6cd81b407edd2a06a35f4778f9bc9 tree 4c59954eab46500b5b75f2201cc1a9c631c0d23c parent 08dac06850e30a256df62803e8ca22c86f92c7cb author Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:53:19 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:53:19 -0600 cpu/mpc83xx/cpu_init.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index e75b8b7..db28a6a 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -154,6 +154,14 @@ void cpu_init_f (volatile immap_t * im) im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM; im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM; #endif +#ifdef CFG_GPIO1_PRELIM + im->pgio[0].dir = CFG_GPIO1_DIR; + im->pgio[0].dat = CFG_GPIO1_DAT; +#endif +#ifdef CFG_GPIO2_PRELIM + im->pgio[1].dir = CFG_GPIO2_DIR; + im->pgio[1].dat = CFG_GPIO2_DAT; +#endif }

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[U-Boot-Users] [PATCH] Add helper function for generic flat device tree fixups for 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Add helper function for generic flat device tree fixups for 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Add helper function for generic flat device tree fixups for 83xx Patch by Kumar Gala 13 Dec 2005 --- commit b0ffe0fd03bdd3118a2261e183387110c7f98b62 tree 7e533ce44581532f5aefc00a7fbc805690e6815d parent dbd0923389252c41a48ed9827b2359af9d52567e author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:17:24 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:17:24 -0600 cpu/mpc83xx/cpu.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 8c9b515..f20d584 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -151,3 +151,36 @@ void watchdog_reset (void) hang(); /* FIXME: implement watchdog_reset()? */ } #endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_OF_FLAT_TREE) +void +ft_cpu_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + ulong clock; + + clock = bd->bi_busfreq; + p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + +#ifdef CONFIG_MPC83XX_TSEC1 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len); + memcpy(p, bd->bi_enetaddr, 6); +#endif + +#ifdef CONFIG_MPC83XX_TSEC2 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len); + memcpy(p, bd->bi_enet1addr, 6); +#endif +} +#endif

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[U-Boot-Users] [PATCH] Allow board code to fixup the OF flat device tree before booting a kernel
by Kumar Gala 12 Mar '06

12 Mar '06

Allow board code to fixup the OF flat device tree before booting a kernel Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Allow board code to fixup the OF flat device tree before booting a kernel Patch by Kumar Gala 13 Dec 2005 --- commit 943fd6f23661331e7ab70f9ab190387f5e0ca1ff tree 182dedeba4351f5c4e1cfd1c12a7870fad50b76a parent 7abb967b49b86994aca615acc60cbc322efb9b98 author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:09:21 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:09:21 -0600 README | 6 ++++++ common/ft_build.c | 5 ++++- 2 files changed, 10 insertions(+), 1 deletions(-) diff --git a/README b/README index 21f5bf0..ea37dac 100644 --- a/README +++ b/README @@ -411,6 +411,7 @@ The following options need to be configu The maximum size of the constructed OF tree. OF_CPU - The proper name of the cpus node. + OF_SOC - The proper name of the soc node. OF_TBCLK - The timebase frequency. CONFIG_OF_HAS_BD_T @@ -423,6 +424,11 @@ The following options need to be configu The resulting flat device tree will have a copy of u-boot's environment variables + CONFIG_OF_BOARD_SETUP + + Board code has addition modification that it wants to make + to the flat device tree before handing it off to the kernel + - Serial Ports: CFG_PL010_SERIAL diff --git a/common/ft_build.c b/common/ft_build.c index c67af6f..bebee30 100644 --- a/common/ft_build.c +++ b/common/ft_build.c @@ -690,9 +690,12 @@ void ft_setup(void *blob, int size, bd_t if (p != NULL) *p = cpu_to_be32(clock); #endif - #endif /* __powerpc__ */ +#ifdef CONFIG_OF_BOARD_SETUP + ft_board_setup(blob, bd); +#endif + /* printf("final OF-tree\n"); ft_dump_blob(blob);

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[U-Boot-Users] [PATCH] Added a toplevel .gitignore
by Kumar Gala 12 Mar '06

12 Mar '06

Added a toplevel .gitignore Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- commit 7abb967b49b86994aca615acc60cbc322efb9b98 tree 194dbd93ef25c38a5e3c4c34c70c06ef7f5d93f8 parent 559cd2d2afac76082f41b648a83d846482c41a5c author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 10:57:13 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 10:57:13 -0600 .gitignore | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..c7e95a4 --- /dev/null +++ b/.gitignore @@ -0,0 +1,24 @@ +# +# NOTE! Don't add files that are generated in specific +# subdirectories here. Add them in the ".gitignore" file +# in that subdirectory instead. +# +# Normal rules +# +.* +*.o +*.a + +# +# Top-level generic files +# +u-boot* +System.map + +# +# Generated include files +# +include/asm +include/asm-*/arch +include/config.h +include/config.mk

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[U-Boot-Users] [PATCH][UPDATE] Enabled time handling on 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Enabled time handling on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Enable time handling on 83xx Patch by Kumar Gala 09 Dec 2005 --- commit 559cd2d2afac76082f41b648a83d846482c41a5c tree 59a0714c366cc6774bb52ba7a9bc9219bb0bba6e parent 4d09dc8e4240955641b03aa3351a83eb308d9efb author Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:44:09 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:44:09 -0600 cpu/mpc83xx/interrupts.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c index 53474f6..dfd51c1 100644 --- a/cpu/mpc83xx/interrupts.c +++ b/cpu/mpc83xx/interrupts.c @@ -43,6 +43,16 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { + DECLARE_GLOBAL_DATA_PTR; + + volatile immap_t *immr = (immap_t *) CFG_IMMRBAR; + + *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; + + /* Enable e300 time base */ + + immr->sysconf.spcr |= 0x00400000; + return 0; }

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[U-Boot-Users] [PATCH] Added CONFIG_ options for bd_t and env in flat dev tree
by Kumar Gala 12 Mar '06

12 Mar '06

Added CONFIG_ options for bd_t and env in flat dev tree Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added CONFIG_ options for bd_t and env in flat dev tree CONFIG_OF_HAS_BD_T will put a copy of the bd_t into the resulting flat device tree. CONFIG_OF_HAS_UBOOT_ENV will copy the environment variables from u-boot into the flat device tree Patch by Kumar Gala 30 Nov 2005 --- commit 993a33b3ee2ab8b6ba7babfc3cb79b85c5ad9080 tree 8f0bf1a80e077cf490fad35cf8b3f101cc2ee567 parent 9eaf17bb9619be82f24c1ec88829ffe487e67ea8 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 13:16:36 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 13:16:36 -0600 README | 10 ++++++++++ common/ft_build.c | 10 +++++++++- include/configs/stxxtc.h | 2 ++ 3 files changed, 21 insertions(+), 1 deletions(-) diff --git a/README b/README index 6f61008..21f5bf0 100644 --- a/README +++ b/README @@ -413,6 +413,16 @@ The following options need to be configu OF_CPU - The proper name of the cpus node. OF_TBCLK - The timebase frequency. + CONFIG_OF_HAS_BD_T + + The resulting flat device tree will have a copy of the bd_t. + Space should be pre-allocated in the dts for the bd_t. + + CONFIG_OF_HAS_UBOOT_ENV + + The resulting flat device tree will have a copy of u-boot's + environment variables + - Serial Ports: CFG_PL010_SERIAL diff --git a/common/ft_build.c b/common/ft_build.c index 65a274f..c67af6f 100644 --- a/common/ft_build.c +++ b/common/ft_build.c @@ -529,6 +529,7 @@ extern uchar(*env_get_char) (int); #define BDM(x) { .name = #x, .offset = offsetof(bd_t, bi_ ##x ) } +#ifdef CONFIG_OF_HAS_BD_T static const struct { const char *name; int offset; @@ -574,6 +575,7 @@ static const struct { #endif BDM(baudrate), }; +#endif void ft_setup(void *blob, int size, bd_t * bd) { @@ -610,6 +612,7 @@ void ft_setup(void *blob, int size, bd_t /* back into root */ ft_backtrack_node(&cxt); +#ifdef CONFIG_OF_HAS_UBOOT_ENV ft_begin_node(&cxt, "u-boot-env"); for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { @@ -629,6 +632,7 @@ void ft_setup(void *blob, int size, bd_t } ft_end_node(&cxt); +#endif ft_begin_node(&cxt, "chosen"); @@ -647,13 +651,16 @@ void ft_setup(void *blob, int size, bd_t ft_dump_blob(blob); */ +#ifdef CONFIG_OF_HAS_BD_T /* paste the bd_t at the end of the flat tree */ end = (char *)blob + be32_to_cpu(((struct boot_param_header *)blob)->totalsize); memcpy(end, bd, sizeof(*bd)); +#endif #ifdef CONFIG_PPC +#ifdef CONFIG_OF_HAS_BD_T for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) { sprintf(tmpenv, "/bd_t/%s", bd_map[i].name); v = *(uint32_t *)((char *)bd + bd_map[i].offset); @@ -670,6 +677,7 @@ void ft_setup(void *blob, int size, bd_t p = ft_get_prop(blob, "/bd_t/ethspeed", &len); if (p != NULL) *p = cpu_to_be32((uint32_t) bd->bi_ethspeed); +#endif clock = bd->bi_intfreq; p = ft_get_prop(blob, "/cpus/" OF_CPU "/clock-frequency", &len); @@ -680,7 +688,7 @@ void ft_setup(void *blob, int size, bd_t clock = OF_TBCLK; p = ft_get_prop(blob, "/cpus/" OF_CPU "/timebase-frequency", &len); if (p != NULL) - *p = cpu_to_be32(OF_TBCLK); + *p = cpu_to_be32(clock); #endif #endif /* __powerpc__ */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 3ffe6b2..be6c36c 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -584,5 +584,7 @@ typedef unsigned int led_id_t; #define OF_CPU "PowerPC,MPC870@0" #define OF_TBCLK (MPC8XX_HZ / 16) +#define CONFIG_OF_HAS_BD_T 1 +#define CONFIG_OF_HAS_UBOOT_ENV 1 #endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH] Fix PCI prefetch region support for PCI bridges
by Kumar Gala 12 Mar '06

12 Mar '06

Fix PCI prefetch region support for PCI bridges Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Fixed PCI prefetch region support for PCI bridges. Since bridges can support separate BARs for Prefetch windows we should set them up if we support a prefetch region Patch by Kumar Gala 30 Nov 2005 --- commit 9eaf17bb9619be82f24c1ec88829ffe487e67ea8 tree b08f701087b021e21170ff3a74ed034ae4d0c989 parent c087756e1f8aae91b05ae5b5207ba992ef32c238 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 12:48:28 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 12:48:28 -0600 drivers/pci_auto.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index b70bacc..15f7432 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -179,10 +179,14 @@ static void pciauto_prescan_setup_bridge pciauto_region_align(pci_prefetch, 0x100000); /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE, + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, (pci_prefetch->bus_lower & 0xfff00000) >> 16); cmdstat |= PCI_COMMAND_MEMORY; + } else { + /* We don't support prefetchable memory for now, so disable */ + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000); } if (pci_io) { @@ -197,10 +201,6 @@ static void pciauto_prescan_setup_bridge cmdstat |= PCI_COMMAND_IO; } - /* We don't support prefetchable memory for now, so disable */ - pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); - pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000); - /* Enable memory and I/O accesses, enable bus master */ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER); } @@ -227,7 +227,7 @@ static void pciauto_postscan_setup_bridg /* Round memory allocator to 1MB boundary */ pciauto_region_align(pci_prefetch, 0x100000); - pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, (pci_prefetch->bus_lower-1) >> 16); }

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[U-Boot-Users] [PATCH] Make System IO Config Registers board configurable on MPC83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Make System IO Config Registers board configurable on MPC83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Make System IO Config Registers board configurable on MPC83xx Patch by Kumar Gala 23 Nov 2005 --- commit 01b445b70c5e296c115b93a894ff3c7ffc1586d5 tree 2a2398b1bd34aa9b79e7ba34b4ccf7c28c932734 parent f6a259d086597f691d821a5ac2181ce249fad987 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 23 Nov 2005 14:31:37 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 23 Nov 2005 14:31:37 -0600 cpu/mpc83xx/cpu_init.c | 8 ++++++-- include/configs/MPC8349ADS.h | 4 ++++ include/configs/TQM834x.h | 4 ++++ 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index dcb3445..e75b8b7 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -63,8 +63,12 @@ void cpu_init_f (volatile immap_t * im) im->sysconf.spcr |= SPCR_TBEN; /* System General Purpose Register */ - im->sysconf.sicrh = SICRH_TSOBI1; - im->sysconf.sicrl = SICRL_LDP_A; +#ifdef CFG_SICRH + im->sysconf.sicrh = CFG_SICRH; +#endif +#ifdef CFG_SICRL + im->sysconf.sicrl = CFG_SICRL; +#endif /* * Memory Controller: diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index 41309ac..7197e0f 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -504,6 +504,10 @@ HRCWH_TSEC2M_IN_GMII ) #endif +/* System IO Config */ +#define CFG_SICRH SICRH_TSOBI1 +#define CFG_SICRL SICRL_LDP_A + #define CFG_HID0_INIT 0x000000000 #define CFG_HID0_FINAL CFG_HID0_INIT diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index c25a777..a2184ee 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -417,6 +417,10 @@ extern int tqm834x_num_flash_banks; HRCWH_TSEC2M_IN_GMII ) #endif +/* System IO Config */ +#define CFG_SICRH SICRH_TSOBI1 +#define CFG_SICRL SICRL_LDP_A + /* i-cache and d-cache disabled */ #define CFG_HID0_INIT 0x000000000 #define CFG_HID0_FINAL CFG_HID0_INIT

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[U-Boot-Users] [PATCH] Added support for PCI prefetchable region and BARs
by Kumar Gala 12 Mar '06

12 Mar '06

Added support for PCI prefetchable region and BARs Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added support for PCI prefetchable region and BARs If a host controller sets up a region as prefetchable and a device's BAR denotes it as prefetchable, allocate the BAR into the prefetch region. If a BAR is prefetchable and no prefetchable region has been setup by the controller we fall back to allocating the BAR into the normally memory region. Patch by Kumar Gala 22 Nov 2005 --- commit f6a259d086597f691d821a5ac2181ce249fad987 tree 455dc92391d7b33119acd175595a2778ea6bcaa5 parent 680def7ecaabea707792ff987cd9baa9b4e18b38 author Kumar Gala <galak(a)kernel.crashing.org> Tue, 22 Nov 2005 13:29:25 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 22 Nov 2005 13:29:25 -0600 drivers/pci_auto.c | 50 ++++++++++++++++++++++++++++++++++++++++++++------ include/pci.h | 4 +++- 2 files changed, 47 insertions(+), 7 deletions(-) diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index 3302457..b70bacc 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -77,6 +77,7 @@ int pciauto_region_allocate(struct pci_r void pciauto_setup_device(struct pci_controller *hose, pci_dev_t dev, int bars_num, struct pci_region *mem, + struct pci_region *prefetch, struct pci_region *io) { unsigned int bar_value, bar_response, bar_size; @@ -111,7 +112,10 @@ void pciauto_setup_device(struct pci_con found_mem64 = 1; bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; - bar_res = mem; + if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH)) + bar_res = prefetch; + else + bar_res = mem; DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%x, ", bar_nr, bar_size); } @@ -148,6 +152,7 @@ static void pciauto_prescan_setup_bridge pci_dev_t dev, int sub_bus) { struct pci_region *pci_mem = hose->pci_mem; + struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; unsigned int cmdstat; @@ -169,6 +174,17 @@ static void pciauto_prescan_setup_bridge cmdstat |= PCI_COMMAND_MEMORY; } + if (pci_prefetch) { + /* Round memory allocator to 1MB boundary */ + pciauto_region_align(pci_prefetch, 0x100000); + + /* Set up memory and I/O filter limits, assume 32-bit I/O space */ + pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE, + (pci_prefetch->bus_lower & 0xfff00000) >> 16); + + cmdstat |= PCI_COMMAND_MEMORY; + } + if (pci_io) { /* Round I/O allocator to 4KB boundary */ pciauto_region_align(pci_io, 0x1000); @@ -193,6 +209,7 @@ static void pciauto_postscan_setup_bridg pci_dev_t dev, int sub_bus) { struct pci_region *pci_mem = hose->pci_mem; + struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; /* Configure bus number registers */ @@ -206,6 +223,14 @@ static void pciauto_postscan_setup_bridg (pci_mem->bus_lower-1) >> 16); } + if (pci_prefetch) { + /* Round memory allocator to 1MB boundary */ + pciauto_region_align(pci_prefetch, 0x100000); + + pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, + (pci_prefetch->bus_lower-1) >> 16); + } + if (pci_io) { /* Round I/O allocator to 4KB boundary */ pciauto_region_align(pci_io, 0x1000); @@ -239,6 +264,11 @@ void pciauto_config_init(struct pci_cont hose->pci_mem->size < hose->regions[i].size) hose->pci_mem = hose->regions + i; break; + case (PCI_REGION_MEM | PCI_REGION_PREFETCH): + if (!hose->pci_prefetch || + hose->pci_prefetch->size < hose->regions[i].size) + hose->pci_prefetch = hose->regions + i; + break; } } @@ -251,6 +281,14 @@ void pciauto_config_init(struct pci_cont hose->pci_mem->bus_start + hose->pci_mem->size - 1); } + if (hose->pci_prefetch) { + pciauto_region_init(hose->pci_prefetch); + + DEBUGF("PCI Autoconfig: Prefetchable Memory region: [%lx-%lx]\n", + hose->pci_prefetch->bus_start, + hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1); + } + if (hose->pci_io) { pciauto_region_init(hose->pci_io); @@ -275,7 +313,7 @@ int pciauto_config_device(struct pci_con switch(class) { case PCI_CLASS_BRIDGE_PCI: hose->current_busno++; - pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io); DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev)); @@ -301,12 +339,12 @@ int pciauto_config_device(struct pci_con return sub_bus; } - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; case PCI_CLASS_BRIDGE_CARDBUS: /* just do a minimal setup of the bridge, let the OS take care of the rest */ - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev)); @@ -328,11 +366,11 @@ int pciauto_config_device(struct pci_con * the PIMMR window to be allocated (BAR0 - 1MB size) */ DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n"); - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; #endif default: - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; } diff --git a/include/pci.h b/include/pci.h index 8f19997..f78a769 100644 --- a/include/pci.h +++ b/include/pci.h @@ -309,6 +309,7 @@ struct pci_region { #define PCI_REGION_MEM 0x00000000 /* PCI memory space */ #define PCI_REGION_IO 0x00000001 /* PCI IO space */ #define PCI_REGION_TYPE 0x00000001 +#define PCI_REGION_PREFETCH 0x00000008 /* prefetchable PCI memory */ #define PCI_REGION_MEMORY 0x00000100 /* System memory */ #define PCI_REGION_RO 0x00000200 /* Read-only memory */ @@ -386,7 +387,7 @@ struct pci_controller { int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32); /* Used by auto config */ - struct pci_region *pci_mem, *pci_io; + struct pci_region *pci_mem, *pci_io, *pci_prefetch; /* Used by ppc405 autoconfig*/ struct pci_region *pci_fb; @@ -472,6 +473,7 @@ extern int pciauto_region_allocate(struc extern void pciauto_setup_device(struct pci_controller *hose, pci_dev_t dev, int bars_num, struct pci_region *mem, + struct pci_region *prefetch, struct pci_region *io); int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);

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[U-Boot-Users] [PATCH] Added PCI support for MPC8349ADS board
by Kumar Gala 12 Mar '06

12 Mar '06

Added PCI support for MPC8349ADS board Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added PCI support for MPC8349ADS board Patch by Kumar Gala 10 Nov 2005 --- commit 17bdd79e9b7151c511b9e5c94cd850ab4d74b1a4 tree ef96e01f333e94ea6d9267fceec9b8b3a0d7553b parent d47f4a474e3ca12a373ac849f2941da29ee487a0 author Kumar Gala <galak(a)kernel.crashing.org> Thu, 10 Nov 2005 15:50:57 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Thu, 10 Nov 2005 15:50:57 -0600 board/mpc8349ads/Makefile | 2 board/mpc8349ads/mpc8349ads.c | 41 ------ board/mpc8349ads/pci.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/configs/MPC8349ADS.h | 4 - 4 files changed, 262 insertions(+), 45 deletions(-) diff --git a/board/mpc8349ads/Makefile b/board/mpc8349ads/Makefile index 4327b0d..f865f9c 100644 --- a/board/mpc8349ads/Makefile +++ b/board/mpc8349ads/Makefile @@ -24,7 +24,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := $(BOARD).o +OBJS := $(BOARD).o pci.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c index da8d3d7..505acbc 100644 --- a/board/mpc8349ads/mpc8349ads.c +++ b/board/mpc8349ads/mpc8349ads.c @@ -147,47 +147,6 @@ int checkboard (void) return 0; } -#if defined(CONFIG_PCI) -/* - * Initialize PCI Devices, report devices found - */ -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_mpc83xxads_config_table[] = { - {PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID, - pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMON_MEMORY | PCI_COMMAND_MASTER - } }, - {} -} -#endif - - -volatile static struct pci_controller hose[] = { - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - }, - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - } -}; -#endif /* CONFIG_PCI */ - - -void -pci_init_board(void) -{ -#ifdef CONFIG_PCI - extern void pci_mpc83xx_init(volatile struct pci_controller *hose); - - pci_mpc83xx_init(hose); -#endif /* CONFIG_PCI */ -} - /* * if MPC8349ADS is soldered with SDRAM */ diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c new file mode 100644 index 0000000..4c37984 --- /dev/null +++ b/board/mpc8349ads/pci.c @@ -0,0 +1,260 @@ +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <asm/mmu.h> +#include <common.h> +#include <asm/global_data.h> +#include <pci.h> +#include <i2c.h> + +#ifdef CONFIG_PCI + +/* System RAM mapped to PCI space */ +#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE + +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_mpc83xxads_config_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_IDSEL_NUMBER, PCI_ANY_ID, + pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER + } + }, + {} +}; +#endif + +static struct pci_controller pci_hose[] = { + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + }, + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + } +}; + +/************************************************************************** + * + * pib_init() -- initialize the PCA9555PW IO expander on the PIB board + * + */ +void +pib_init(void) +{ + u8 val8; + /* + * Assign PIB PMC slot to desired PCI bus + */ + mpc8349_i2c = (i2c_t*)(CFG_IMMRBAR + CFG_I2C2_OFFSET); + i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); + + val8 = 0; + i2c_write(0x23, 0x6, 1, &val8, 1); + i2c_write(0x23, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x23, 0x2, 1, &val8, 1); + i2c_write(0x23, 0x3, 1, &val8, 1); + + val8 = 0; + i2c_write(0x26, 0x6, 1, &val8, 1); + val8 = 0x34; + i2c_write(0x26, 0x7, 1, &val8, 1); +#if defined(PCI_64BIT) + val8 = 0xf4; /* PMC2:PCI1/64-bit */ +#elif defined(PCI_ALL_PCI1) + val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */ +#elif defined(PCI_ONE_PCI1) + val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */ +#else + val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */ +#endif + i2c_write(0x26, 0x2, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x26, 0x3, 1, &val8, 1); + val8 = 0; + i2c_write(0x27, 0x6, 1, &val8, 1); + i2c_write(0x27, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x27, 0x2, 1, &val8, 1); + val8 = 0xef; + i2c_write(0x27, 0x3, 1, &val8, 1); + asm("eieio"); + +#if defined(PCI_64BIT) + printf("PCI1: 64-bit on PMC2\n"); +#elif defined(PCI_ALL_PCI1) + printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n"); +#elif defined(PCI_ONE_PCI1) + printf("PCI1: 32-bit on PMC1\n"); + printf("PCI2: 32-bit on PMC2, PMC3\n"); +#else + printf("PCI1: 32-bit on PMC1, PMC2\n"); + printf("PCI2: 32-bit on PMC3\n"); +#endif +} + +/************************************************************************** + * pci_init_board() + * + * NOTICE: PCI2 is not currently supported + * + */ +void +pci_init_board(void) +{ + DECLARE_GLOBAL_DATA_PTR; + volatile immap_t * immr; + volatile clk8349_t * clk; + volatile law8349_t * pci_law; + volatile pot8349_t * pci_pot; + volatile pcictrl8349_t * pci_ctrl; + volatile pciconf8349_t * pci_conf; + u16 reg16; + u32 reg32; + struct pci_controller * hose; + + immr = (immap_t *)CFG_IMMRBAR; + clk = (clk8349_t *)&immr->clk; + pci_law = immr->sysconf.pcilaw; + pci_pot = immr->ios.pot; + pci_ctrl = immr->pci_ctrl; + pci_conf = immr->pci_conf; + + hose = &pci_hose[0]; + + pib_init(); + + /* + * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode + */ + + reg32 = clk->occr; + udelay(2000); + clk->occr = 0xff000000; + udelay(2000); + + /* + * Release PCI RST Output signal + */ + pci_ctrl[0].gcr = 0; + udelay(2000); + pci_ctrl[0].gcr = 1; + udelay(2000); + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M; + + /* + * Configure PCI Outbound Translation Windows + */ + + /* PCI1 mem space */ + pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK); + + /* PCI1 IO space */ + pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK); + + /* + * Configure PCI Inbound Translation Windows + */ + + /* we need RAM mapped to PCI space for the devices to + * access main memory */ + pci_ctrl[0].pitar1 = 0x0; + pci_ctrl[0].pibar1 = 0x0; + pci_ctrl[0].piebar1 = 0x0; + pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G; + + hose->first_busno = 0; + hose->last_busno = 0xff; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CFG_PCI1_MEM_BASE, + CFG_PCI1_MEM_PHYS, + CFG_PCI1_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CFG_PCI1_IO_BASE, + CFG_PCI1_IO_PHYS, + CFG_PCI1_IO_SIZE, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(hose->regions + 2, + CONFIG_PCI_SYS_MEM_BUS, + CONFIG_PCI_SYS_MEM_PHYS, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + hose->region_count = 3; + + pci_setup_indirect(hose, + (CFG_IMMRBAR+0x8300), + (CFG_IMMRBAR+0x8304)); + + pci_register_hose(hose); + + /* + * Write to Command register + */ + reg16 = 0xff; + pci_hose_read_config_word (hose, PCI_BDF(0,0,0), PCI_COMMAND, + &reg16); + reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, + reg16); + + /* + * Clear non-reserved bits in status register. + */ + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_STATUS, + 0xffff); + pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER, + 0x80); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf("PCI: Bus Dev VenId DevId Class Int\n"); +#endif + /* + * Hose scan. + */ + hose->last_busno = pci_hose_scan(hose); +} +#endif /* CONFIG_PCI */ diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index d6d2fab..41309ac 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -41,9 +41,7 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */ -/* FIXME: Real PCI support will come in a follow-up update. */ -#undef CONFIG_PCI - +#define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE

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[U-Boot-Users] [PATCH] dhcp vendor fields - support opt bootfile, ignore tftp server
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the dhcp vendor optional bootfile (#67). It also ignores the vendor tftp server name option (#66). Both of these are supplied by the DEC Tru64 Unix dhcp server (called "join"), and in the case of the bootfile, it is the only place the boot file name is supplied. There is a perfectly good, 128 byte, field in the main bootp/dhcp packet where the boot file name could have been stored, but it wasn't used - go figure. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] Fix RGMII support in 8548 CDS
by Andy Fleming 12 Mar '06

12 Mar '06

This patch fixes a hw timing issue on 8548 CDS for eTSEC 3 in RGMII mode: Index: tsec.h =================================================================== RCS file: /cm/vault/u-boot/u-boot/cpu/mpc85xx/tsec.h,v retrieving revision 1.1.1.1.4.6 diff -r1.1.1.1.4.6 tsec.h 111c111 < #define MIIM_CIS8204_EPHYCON_RGMII 0x1000 --- > #define MIIM_CIS8204_EPHYCON_RGMII 0x1100

2 1

[U-Boot-Users] LXT971A PHY debugging on MPC8540 Custom Board
by Shirasat Girish-ags032 12 Mar '06

12 Mar '06

Hi , I have partially ported Uboot on one of our MPC8540 based custom boards. I am currently facing problems in bringing up the 10/100Mbps FEC interface. We are using the LXT971A PHY for the FEC interface. Well the problem is that , the MAC is putting out the data but the PHY is failing to put the data on the line. The PHY is successfully able to auto- negotiate. The MAC putting out data was confirmed by the MAC debug registers and by probing the Tx_EN,clock and TX_D lines. I carried out the MAC loop back test which passed . Then went on for the PHY internal loop back test. Well, when the loop back is enabled the MAC fails to transmit the frame successfully. The thing confusing me is that why the MAC frame transmission is getting affected when i enable the PHY loopback test. Any pointers will be very helpful. Regards, Girish

3 3

[U-Boot-Users] [Patch][CVS] Updating for RPXlite_DW---20050619
by Sam Song 12 Mar '06

12 Mar '06

Hi list, To make things better on RPXlite DW board with more flexible functions, a small patch added and tested. I change ifdef to make this patch work online this time. Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Add netconsole and several useful commands. ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/configs/RPXlite_DW.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXlite_DW.h,v retrieving revision 1.6 diff -p -u -r1.6 RPXlite_DW.h --- include/configs/RPXlite_DW.h 22 Jan 2005 18:13:06 -0000 1.6 +++ include/configs/RPXlite_DW.h 19 Jun 2005 13:44:10 -0000 @@ -45,7 +45,7 @@ */ /* #define DEBUG 1 */ -/* #ifdef DEPLOYMENT 1 */ +/* #define DEPLOYMENT 1 */ #undef CONFIG_MPC860 #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ @@ -117,6 +117,36 @@ #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) +#if 1 /* Enable this staff could make image enlarge about 25KB. Mask it if you + don't want the advanced function */ + +#ifdef CONFIG_SPLASH_SCREEN +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_BMP | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#else +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#endif /* CONFIG_SPLASH_SCREEN */ + +/* test-only */ +#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ +#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ + +#define CONFIG_NETCONSOLE + +#endif /* 1 */ + /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> @@ -446,5 +476,6 @@ #define CONFIG_SERVERIP 172.16.115.6 #define CONFIG_ROOTPATH /workspace/myfilesystem/target/ #define CONFIG_BOOTFILE uImage.rpxusb +#define CONFIG_HOSTNAME LITE_H1_DW #endif /* __CONFIG_H */

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[U-Boot-Users] [Patch][CVS] Fix a dummy pci prototype declaration
by Sam Song 12 Mar '06

12 Mar '06

Hi list, I happened to find the mistaken declaration on pci_cfgfunc_nothing in include/pci.h. Thanks for Wolfgang help me confirm that:-) Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Fix the mistaken declaration on pci_cfgfunc_nothing Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/pci.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/pci.h,v retrieving revision 1.3 diff -p -u -r1.3 pci.h --- include/pci.h 31 May 2003 18:35:28 -0000 1.3 +++ include/pci.h 19 Jun 2005 12:57:39 -0000 @@ -336,8 +336,8 @@ struct pci_config_table { unsigned long priv[3]; }; -extern void pci_cfgfunc_nothing(struct pci_controller* hose, pci_dev_t dev, - struct pci_config_table *); +extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev, + struct pci_config_table *); extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *);

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[U-Boot-Users] [Patch][CVS] Adjust CFG_CMD_ECHO as default ENV setting
by Sam Song 12 Mar '06

12 Mar '06

Hi list, Attached patch makes up a fix on CFG_CMD_ECHO. To avoid breaking exists boards, I adjust "echo" as a default command with aggreement of Wolfgang. For the sake of it's effect on all boards, pls check this one more carefully. About 12 boards related was fixed as well. Fix policy is that if CONFIG_CMD_DFL is used, CFG_CMD_ECHO shouldn't be redefined. Did I fix too much or not enough? Ideas pls... Sorry for the late. I just made my PC get CVS tree:-( CVS hasn't supported proxy. It brings me some troubles more or less. Thanks for all your concern, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Adjust echo as a defalut command. Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: README =================================================================== RCS file: /cvsroot/u-boot/u-boot/README,v retrieving revision 1.126 diff -p -u -r1.126 README --- README 3 May 2005 14:12:25 -0000 1.126 +++ README 19 Jun 2005 12:27:42 -0000 @@ -590,7 +590,7 @@ The following options need to be configu CFG_CMD_DIAG * Diagnostics CFG_CMD_DOC * Disk-On-Chip Support CFG_CMD_DTT * Digital Therm and Thermostat - CFG_CMD_ECHO * echo arguments + CFG_CMD_ECHO echo arguments CFG_CMD_EEPROM * EEPROM read/write support CFG_CMD_ELF * bootelf, bootvx CFG_CMD_ENV saveenv Index: common/command.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/common/command.c,v retrieving revision 1.18 diff -p -u -r1.18 command.c --- common/command.c 6 Apr 2005 00:04:17 -0000 1.18 +++ common/command.c 19 Jun 2005 12:27:51 -0000 @@ -42,6 +42,8 @@ U_BOOT_CMD( NULL ); +#if (CONFIG_COMMANDS & CFG_CMD_ECHO) + int do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -74,6 +76,8 @@ U_BOOT_CMD( " - echo args to console; \\c suppresses newline\n" ); +#endif /* CFG_CMD_ECHO */ + #ifdef CFG_HUSH_PARSER int Index: include/cmd_confdefs.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/cmd_confdefs.h,v retrieving revision 1.22 diff -p -u -r1.22 cmd_confdefs.h --- include/cmd_confdefs.h 1 Apr 2005 00:25:45 -0000 1.22 +++ include/cmd_confdefs.h 19 Jun 2005 12:27:53 -0000 @@ -110,7 +110,6 @@ CFG_CMD_DIAG | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_EXT2 | \ Index: include/configs/ISPAN.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ISPAN.h,v retrieving revision 1.2 diff -p -u -r1.2 ISPAN.h --- include/configs/ISPAN.h 31 Dec 2004 09:32:53 -0000 1.2 +++ include/configs/ISPAN.h 19 Jun 2005 12:27:55 -0000 @@ -108,7 +108,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/MIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/MIP405.h,v retrieving revision 1.10 diff -p -u -r1.10 MIP405.h --- include/configs/MIP405.h 23 Feb 2004 22:22:33 -0000 1.10 +++ include/configs/MIP405.h 19 Jun 2005 12:27:56 -0000 @@ -58,7 +58,6 @@ CFG_CMD_CACHE | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FAT | \ Index: include/configs/PIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/PIP405.h,v retrieving revision 1.8 diff -p -u -r1.8 PIP405.h --- include/configs/PIP405.h 20 Jan 2004 23:12:34 -0000 1.8 +++ include/configs/PIP405.h 19 Jun 2005 12:27:57 -0000 @@ -50,7 +50,6 @@ CFG_CMD_PCI | \ CFG_CMD_CACHE | \ CFG_CMD_IRQ | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO | \ Index: include/configs/RPXsuper.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXsuper.h,v retrieving revision 1.3 diff -p -u -r1.3 RPXsuper.h --- include/configs/RPXsuper.h 20 Jan 2004 23:12:34 -0000 1.3 +++ include/configs/RPXsuper.h 19 Jun 2005 12:27:58 -0000 @@ -154,7 +154,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_IMMAP | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO & \ ~CFG_CMD_KGDB ) Index: include/configs/Rattler.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/Rattler.h,v retrieving revision 1.2 diff -p -u -r1.2 Rattler.h --- include/configs/Rattler.h 5 May 2005 09:13:21 -0000 1.2 +++ include/configs/Rattler.h 19 Jun 2005 12:27:59 -0000 @@ -125,7 +125,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_JFFS2 \ | CFG_CMD_MII \ Index: include/configs/TQM5200.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/TQM5200.h,v retrieving revision 1.12 diff -p -u -r1.12 TQM5200.h --- include/configs/TQM5200.h 2 Apr 2005 22:37:55 -0000 1.12 +++ include/configs/TQM5200.h 19 Jun 2005 12:28:00 -0000 @@ -161,7 +161,6 @@ CFG_CMD_ASKENV | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_MII | \ Index: include/configs/ZPC1900.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ZPC1900.h,v retrieving revision 1.5 diff -p -u -r1.5 ZPC1900.h --- include/configs/ZPC1900.h 9 Oct 2004 23:33:43 -0000 1.5 +++ include/configs/ZPC1900.h 19 Jun 2005 12:28:01 -0000 @@ -112,7 +112,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/gw8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/gw8260.h,v retrieving revision 1.2 diff -p -u -r1.2 gw8260.h --- include/configs/gw8260.h 27 Jun 2003 21:32:46 -0000 1.2 +++ include/configs/gw8260.h 19 Jun 2005 12:28:02 -0000 @@ -305,7 +305,6 @@ CFG_CMD_BEDBUG | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_IMMAP | \ CFG_CMD_MII) Index: include/configs/ppmc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ppmc8260.h,v retrieving revision 1.4 diff -p -u -r1.4 ppmc8260.h --- include/configs/ppmc8260.h 25 Mar 2004 15:14:45 -0000 1.4 +++ include/configs/ppmc8260.h 19 Jun 2005 12:28:04 -0000 @@ -279,7 +279,6 @@ #define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_MEMTEST | \ CFG_CMD_MII | \ Index: include/configs/sacsng.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sacsng.h,v retrieving revision 1.7 diff -p -u -r1.7 sacsng.h --- include/configs/sacsng.h 25 Mar 2004 15:14:45 -0000 1.7 +++ include/configs/sacsng.h 19 Jun 2005 12:28:07 -0000 @@ -507,7 +507,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ @@ -520,7 +519,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ Index: include/configs/sbc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sbc8260.h,v retrieving revision 1.11 diff -p -u -r1.11 sbc8260.h --- include/configs/sbc8260.h 11 Jul 2004 21:49:43 -0000 1.11 +++ include/configs/sbc8260.h 19 Jun 2005 12:28:09 -0000 @@ -448,7 +448,6 @@ #ifdef CONFIG_ETHER_ON_FCC # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ @@ -459,7 +458,6 @@ #else # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ Index: include/configs/utx8245.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/utx8245.h,v retrieving revision 1.3 diff -p -u -r1.3 utx8245.h --- include/configs/utx8245.h 5 Jun 2003 15:40:53 -0000 1.3 +++ include/configs/utx8245.h 19 Jun 2005 12:28:10 -0000 @@ -91,7 +91,6 @@ protect on $(u-boot_startaddr) $(u-boot_ | CFG_CMD_ENV | CFG_CMD_CONSOLE \ | CFG_CMD_LOADS | CFG_CMD_LOADB \ | CFG_CMD_IMI | CFG_CMD_CACHE \ - | CFG_CMD_RUN | CFG_CMD_ECHO \ | CFG_CMD_REGINFO | CFG_CMD_NET\ | CFG_CMD_DHCP | CFG_CMD_I2C \ | CFG_CMD_DATE)

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[U-Boot-Users] Patch to cpu/mpc8260/speed.c
by KokHow Teh 12 Mar '06

12 Mar '06

Hi; I am using u-boot-1.1.2 and I am sending this minor patch to the cpu/mpc8260/speed.c file in view of MPC8280EC document which lays down how the PCIDF is calculated but not reflected correctly in the file. Index: cpu/mpc8260/speed.c =================================================================== RCS file: /usr/cvsroot/u-boot/cpu/mpc8260/speed.c,v retrieving revision 1.2 diff -u -b -B -r1.2 speed.c --- cpu/mpc8260/speed.c 28 Apr 2005 07:01:04 -0000 1.2 +++ cpu/mpc8260/speed.c 16 Jun 2005 04:35:12 -0000 @@ -202,11 +202,12 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; corecnf_t *cp; sccr = immap->im_clkrst.car_sccr; dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; + pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; scmr = immap->im_clkrst.car_scmr; corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; @@ -243,8 +244,8 @@ cp->vco_div, cp->freq_60x, cp->freq_core); printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, " - "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, - pllmf); + "plldf %ld, pllmf %ld, pcidf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, + pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", gd->vco_out, gd->scc_clk, gd->brg_clk); @@ -253,10 +254,18 @@ gd->cpu_clk, gd->cpm_clk, gd->bus_clk); if (sccr & SCCR_PCI_MODE) { - uint pci_div; + uint pci_div, pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) + pci_div *= 5; + else if (pcidf == 0xB) + pci_div *= 6; + else + pci_div *= (pcidf + 1); + } else + pci_div = pcidf + 1; printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); } Regards, TEH

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[U-Boot-Users] Patch to fix jffs2's lack of "data crc".
by Rick Bronson 12 Mar '06

12 Mar '06

1. A description of the bug: When jffs2 reads files it crc's the header but not the data. If the data is corrupt it can cause jffs2 to accept a chunk when it shouldn't. My patch adds in code to crc the data. 2. A CHANGELOG entry Add crc of data to jffs2 (in jffs2_1pass_build_lists()).

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[U-Boot-Users] parser problem?
by Andrew Dyer 12 Mar '06

12 Mar '06

I noticed on my board that if I enter a space and then return at the u-boot command line I get an exception. I using u-boot from cvs and the standard (not hush) parser on a mips platform. Does anybody else see this behaviour? -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] byteorder of image_header_t members?
by Steven Scholz 12 Mar '06

12 Mar '06

Hi there, if uint32_t members of image_header_t are stored in network byteorder, then all references of these members should use ntohl(), right? So should we fix this for instance: #~> grep "\->ih_magic" * cmd_autoscript.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { >>> cmd_bootm.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: (ntohl(hdr->ih_magic) != IH_MAGIC)) >>> cmd_doc.c: if (hdr->ih_magic == IH_MAGIC) { <<< >>> cmd_fdc.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_fpga.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_ide.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_nand.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_scsi.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_usb.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { -- Steven

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[U-Boot-Users] PATCH: Switch FADS family boards to new clock mechanism
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch switches MPC86xADS and MPC885ADS boards (FADS family) to new clock control mechanism (clocks are controlled by environment variable). Also, board revision detection is fixed. CHANGELOG - Switch MPC86xADS and MPC885ADS boards to use cpuclk environment variable to set clock -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: RPXlite configuration fixes
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes several bugs in and adds some features to long orphaned RPXlite port. CHANGELOG Fix RPXlite board configuration. - Use correct flash sector size - Use correct memory test end address - Add support for bzip2 compression - Various small fixes -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: Numerous fixes for ZPC.1900 port
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes memory configuration for Zephyr Engineering ZPC.1900 board. CHANGELOG Memory configuration changes for ZPC.1900 board - Fix SDRAM timing on both local bus and 60x bus - Add support for second flash bank (SIMM) - Change boot flash base -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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