August 2005 - U-Boot

[U-Boot-Users] Ethernet loopback command
by Thomas Schäfer 17 Apr '12

17 Apr '12

Hi, The patch attached provides a command called 'ethloop' which allows to perform loopback testing on the current eth device. To achieve this, a new ethernet packet type (PROT_TEST, 0x0808, AFAIK this is not used otherwise) is introduced in net/net.c. The patch is against SF CVS from 20050307. The functions EthLoopStart, EthLoopSend and EthLoopHandler generate a simple ethernet frame with NetOurEther as destination address and packet type PROT_TEST. The looped back package is compared with the original one and a message is displayed. It is necessary to set the ethernet line into loopback mode either by programming the PHY or using a loopback plug. I've tested this on our PPC405 custom board, but it should also work on all other systems because packet generation is independent of the underlying ethernet hardware. Example usage: => mii w 0 0 7100 <-- sets PHY into loopback mode => ethloop Using ppc_405x_eth0 device Got ethernet loopback frame, len=64 loopback test successfully completed => mii w 0 0 8000 <-- PHY reset after test is completed Maybe this is also useful for others.. Best regards, Thomas Schäfer ____________________________________ Kontron Modular Computers GmbH Konrad-Zuse-Str. 9 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: thomas.schaefer(a)kontron.com

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[U-Boot-Users] New NAND code
by Stefan Roese 10 Aug '06

10 Aug '06

Hi! I was just wondering about state of the NAND code. When I remember correctly a pretty big rewrite was done but not commited yet. Is the last patch sent to this list from Pantelis Antoniou on 5th May still the latest version? Best regards, Stefan

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[U-Boot-Users] [PATCH] HEAD cmd_falsh.c for m68k tool chain
by Jens Scharsig 31 Jul '06

31 Jul '06

CHANGELOG entry: * Patch by Jens Scharsig, 28 July 2005 - fix some compiler/parser error, if using m68k tool chain - optical fix for protect on/off all messages, if using more then one bank Best regards, Jens Scharsig Index: common/cmd_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/common/cmd_flash.c,v retrieving revision 1.13 diff -p -u -r1.13 cmd_flash.c --- common/cmd_flash.c 15 Jul 2005 22:47:24 -0000 1.13 +++ common/cmd_flash.c 28 Jul 2005 12:32:00 -0000 @@ -117,11 +117,15 @@ static int addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last) { char *ep; + char len_used; /* indicates if the "start +length" form used */ + char found; + ulong bank; + *addr_first = simple_strtoul(arg1, &ep, 16); if (ep == arg1 || *ep != '\0') - return -1; - - char len_used = 0; /* indicates if the "start +length" form used */ + return -1; + + len_used = 0; /* indicates if the "start +length" form used */ if (arg2 && *arg2 == '+'){ len_used = 1; ++arg2; @@ -146,8 +150,7 @@ addr_spec(char *arg1, char *arg2, ulong */ /* find the end addr of the sector where the *addr_last is */ - char found = 0; - ulong bank; + found = 0; for (bank = 0; bank < CFG_MAX_FLASH_BANKS && !found; ++bank){ int i; flash_info_t *info = &flash_info[bank]; @@ -453,12 +456,10 @@ int do_protect (cmd_tbl_t *cmdtp, int fl info->protect[i] = p; #endif /* CFG_FLASH_PROTECTION */ } - } - #if defined(CFG_FLASH_PROTECTION) - if (!rcode) puts (" done\n"); + if (!rcode) puts (" done\n"); #endif /* CFG_FLASH_PROTECTION */ - + } return rcode; }

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[U-Boot-Users] MIPS: AMD Alchemy au1x00 ethernet problems
by geoff cleary 23 Jul '06

23 Jul '06

Hi I am seeing a problem with network support on the AMD dbau1550 eval board (and our own board based on Au1550). It seems that after one network command, no further packets can be sent. The minimal case that shows the problem is to include the ping command. The first ping will succeed; any other network commands time out. I have successfully loaded large files using tftpboot command and confirmed the image loaded correctly. Trying the command again fails with TX timeout. Has anyone seen this problem or have any suggestions as to what is going on? We are building little endian. I have tried Joseph Chiu's buffer 0 patch. Thanks Geoff __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] i386 multi_image.
by David Updegraff 22 Jul '06

22 Jul '06

Hi. I think this is needed to correctly boot multi-part images if you are unfortuanate enough to be working on an i386 platform. -dbu. diff --git a/lib_i386/i386_linux.c b/lib_i386/i386_linux.c --- a/lib_i386/i386_linux.c +++ b/lib_i386/i386_linux.c @@ -150,6 +150,11 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, in initrd_start = 0; initrd_end = 0; } + /* <dave(a)cray.com> : if multi-part img. need to advance base ptr */ + if ((hdr->ih_type==IH_TYPE_MULTI) && (len_ptr[1])) { + int i; + for (i=0, addr+=sizeof(int); len_ptr[i++]; addr+=sizeof(int)); + } base_ptr = load_zimage((void*)addr + sizeof(image_header_t), ntohl(hdr->ih_size), initrd_start, initrd_end-initrd_start, 0);

2 1

[U-Boot-Users] [Patch] KVME080 Support
by Sangmoon Kim 22 Jul '06

22 Jul '06

Hi, This patch adds support for KVME080 board. KVME080 is a VME board with MPC8245 CPU. It also patches drivers/cfi_flash.c. First, it adds CFG_FLASH_PROTECT_CLEAR because for some flash memories(such as 28F320C3) all banks are protected after reset. Second, it makes write_buff not to call flash_write_cfibuffer if buffer_size is1. Because for flash memories with buffer_size 1, buffer write is not supported. Third, it makes 64 bit writes to use FLASH_WRITE64 if FLASH_WRITE64 is defined. Because KVME080 needs it. Fourth, it makes flash_detect_cfi call FLASH_PORTWIDTH when changing portwidth if FLASH_PORTWIDTH is defined. Because on some CPUs (such as MPC8245), port width should be changed. Regards, Sangmoon Kim

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[U-Boot-Users] MIPS LE build problems
by Wolfgang Denk 22 Jul '06

22 Jul '06

Dear Thomas, I always wondered what exactly was the reason why I was not able to build the dbau1x00 targets (especially the little endian dbau1550_el target using the ELDK toolchain). Also, I always wondered about the reference to a non-exitent cpu/mips/little/liblittle.a library. Is ther ea special reason for the current settings of build options for the dbau1x00 targets? Attached below is a patch which makes all dbau1x00 targets build fine with the current ELDK, and I believe these settings are more correct than the previous ones. If you don't protest I would like to merge this patch into the public source tree? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Remember, there's a big difference between kneeling down and bending over. - Frank Zappa

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[U-Boot-Users] parse bug in cmd_mii.c
by Andrew Dyer 22 Jul '06

22 Jul '06

I noticed that in do_mii() the code is dereferencing argv[1] without checking what value argc has. This leads to an exception if a command line like 'mii ' is given where argv[1] is NULL. I have a patch, but my cmd_mii.c is carrying around some other patches (some submitted to the list, some local). Is there a good way to separate out the patches I want to submit by themselves? -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] PATCH: Add PLEB 2 to top-level makefile
by David Snowdon 20 Jun '06

20 Jun '06

Please find attached a patch to the top level Makefile and associated documentation to add support for the PLEB 2 board (which somehow got left out of the last patch). Modifies: Makefile README MAKEALL Regards, Dave.

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[U-Boot-Users] NOTE: New MTD flash partitioning methods
by Wolfgang Denk 20 Jun '06

20 Jun '06

Hello everybody, especially board maintainers! I just comitted a bigger patch that implements a new "mtdparts" command and a common partition scheme that allows U-Boot and Linux to share the same idea about flash partitioning.. Old, obsolete and duplicated code was cleaned up and replaced by the new partitioning method. There are two possible approaches now: The first one is to define a single, static partition: #undef CONFIG_JFFS2_CMDLINE #define CONFIG_JFFS2_DEV "nor0" #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */ #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */ #define CONFIG_JFFS2_PART_OFFSET 0x00000000 The second method is to use the "mtdparts" command line and dynamic partitioning: /* mtdparts command line support */ #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2" #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)" Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. The code was tested on the following targets: Alaska8220, CPCI4052, NC650, PPChamelion, incaip. Besides the above targets, there were several other targets affected, where necessary changes were made. However, no testing was done for those targets, only compilation was verified (for PPC, MIPS and ARM targets). Due to the lack of tool chain for NICOS and i386 I was not able to compile the following targets: ADNPESC1, DK1C20, DK1S10, sc520_cdp, sc520_spunk. Among the modified and not tested targets there is a group of targets which were implementing their custom multi-partition scheme. This was mostly duplicating jffs2_part_info() routine code. Introducing the new common scheme required removing this duplicated code, so those targets should be especially carefully tested by the board main- tainers. Target list that require special attention: xsengine, voiceblue, mx1fs2, MPC8260ADS, innokom and VoVPN-GW (JFFS2 is by default not compiled in) and especially SXNI855T where the jffs2_part_info() routine was doing some custom NAND read caching. Thanks. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de If there was anything that depressed him more than his own cynicism, it was that quite often it still wasn't as cynical as real life. - Terry Pratchett, _Guards! Guards!_

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[U-Boot-Users] PATCH - Add support for wrPPMC7xx/74xx boards
by Richard Danter 20 Jun '06

20 Jun '06

Please find attached my patch for the Wind River PPMC 7xx/74xx boards. It has been tested with an MPC750 (66MHz bus) and MPC7400 (100MHz bus). It adds ppmc7xx to the board directory. The following common files have been modified: cpu/74xx_7xx/cpu.c cpu/74xx_7xx/start.S CREDITS drivers/pci.c include/ns16550.h MAKEALL Makefile This is my first patch so please let me know if I have missed anything. Thanks Rich

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[U-Boot-Users] [PATCH] Support for new board, gth2
by Thomas Lange 19 Jun '06

19 Jun '06

* Patch by Thomas Lange Aug 11 2005 - Add support for gth2 board Changes to common files: * common/cmd_ide.c Swap input data if GTH2 and Big endian * cpu/mips/au1x00_serial.c Call GTH2 log functions. Make sure watchdog is kicked * cpu/mips/cpu.c If gth2, hang during reset until hardware watchdog kicks in * include/asm-mips/au1x00.h Add GPIO definitions /Thomas

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[U-Boot-Users] [PATCH] dbau1x00 corrections
by Thomas Lange 19 Jun '06

19 Jun '06

* Patch by Thomas Lange Aug 10 2005 - Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. /Thomas Index: board/dbau1x00/lowlevel_init.S =================================================================== RCS file: /cvsroot/u-boot/u-boot/board/dbau1x00/lowlevel_init.S,v retrieving revision 1.1 diff -p -u -r1.1 lowlevel_init.S --- board/dbau1x00/lowlevel_init.S 2 Apr 2005 23:52:28 -0000 1.1 +++ board/dbau1x00/lowlevel_init.S 10 Aug 2005 13:07:23 -0000 @@ -185,6 +185,8 @@ tlbloop: bne t0, t2, tlbloop nop +#endif /* CONFIG_DBAU1550 */ + /* First setup pll:s to make serial work ok */ /* We have a 12 MHz crystal */ li t0, SYS_CPUPLL @@ -205,6 +207,7 @@ tlbloop: sw t1, 0(t0) /* aux pll */ sync +#ifdef CONFIG_DBAU1550 /* Static memory controller */ /* RCE0 - can not change while fetching, do so from icache */ move t2, ra /* Store return address */ @@ -237,7 +240,7 @@ noCacheJump: sw t1, 0(t0) #else /* CONFIG_DBAU1550 */ li t0, MEM_STTIME0 - li t1, 0x00014C0F + li t1, 0x040181D7 sw t1, 0(t0) /* RCE0 AMD 29LV640M MirrorBit Flash */ Index: include/configs/dbau1x00.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/dbau1x00.h,v retrieving revision 1.4 diff -p -u -r1.4 dbau1x00.h --- include/configs/dbau1x00.h 9 Jan 2005 22:29:00 -0000 1.4 +++ include/configs/dbau1x00.h 10 Aug 2005 13:07:24 -0000 @@ -81,8 +81,7 @@ CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \ CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C)) #else /* CONFIG_DBAU1550 */ -/* Boot from Compact flash partition 2 as default */ -#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm" +#define CONFIG_BOOTCOMMAND "bootp;bootm" #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \ ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \ @@ -133,8 +132,6 @@ #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */ -#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} - #else /* CONFIG_DBAU1550 */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ @@ -145,6 +142,8 @@ #endif /* CONFIG_DBAU1550 */ +#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} + #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1

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[U-Boot-Users] [Patch] MCF5282 without preloader
by Jens Scharsig 12 Jun '06

12 Jun '06

This patch adds the MCF5282 support and includes the Zachary P. Landau fec and immap fixes as patch. CHANGELOG: * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add MCF5282 support (without preloader) relocate ichache_State to ram u-boot can run from internal flash THX to Zachary P. Landau and Wolfgang Denk for help and inspirations. Best regards Jens Scharsig * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add MCF5282 support (without preloader) relocate ichache_State to ram u-boot can run from internal flash

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[U-Boot-Users] [Patch] New Board (EB+MCF-EV123 based on Frescale MCF5282)
by Jens Scharsig 12 Jun '06

12 Jun '06

This patch adds the BuS EB+MCF-EV123 Board. Board characteristics: CPU: Frescale MCF5282 RAM: 16MB SDRAM (16 Bit) FLASH: 2MB 16bit external PHY: Inter LXF972 These board is a reference design for future BuS Elektronik consumer boards. I think this patch is helpful for all other MCF528x users. CHANGELOG: * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add EB+MCF-EV123 board support. includes "[Patch] MCF5282 without preloader" Add m68k Boards to MAKEALL THX to Zachary P. Landau and Wolfgang Denk for help. Best regards, Jens Scharsig * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add EB+MCF-EV123 board support. includes [Patch] MCF5282 without preloader Add m68k Boards to MAKEALL

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[U-Boot-Users] patch: Nios-II boards EP1C20, EP1S10 and EP1S40 part 2
by Scott McNutt 10 Jun '06

10 Jun '06

Part 2: Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 Regards, --Scott diff -Naurb u-boot-current/board/altera/ep1s40/Makefile u-boot-new/board/altera/ep1s40/Makefile --- u-boot-current/board/altera/ep1s40/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1s40/config.mk u-boot-new/board/altera/ep1s40/config.mk --- u-boot-current/board/altera/ep1s40/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1s40/ep1s40.c u-boot-new/board/altera/ep1s40/ep1s40.c --- u-boot-current/board/altera/ep1s40/ep1s40.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/ep1s40.c 2005-08-11 13:16:53.000000000 -0400 @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1S40\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1s40/u-boot.lds u-boot-new/board/altera/ep1s40/u-boot.lds --- u-boot-current/board/altera/ep1s40/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff -Naurb u-boot-current/include/configs/EP1C20.h u-boot-new/include/configs/EP1C20.h --- u-boot-current/include/configs/EP1C20.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1C20.h 2005-08-11 12:18:18.000000000 -0400 @@ -0,0 +1,199 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1C20 1 /* EP1C20 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ +#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_RESET_ADDR, since we assume the monitor is stored at the + * reset address, no? This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for + * epcs device access is enabled. The base address is the epcs + * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK. + * The register base is currently at offset 0x600 from the memory base. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */ + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- leds are, after all, + * board-specific, no? + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ diff -Naurb u-boot-current/include/configs/EP1S10.h u-boot-new/include/configs/EP1S10.h --- u-boot-current/include/configs/EP1S10.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1S10.h 2005-08-11 13:36:23.000000000 -0400 @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1S10 1 /* EP1S10 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */ + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom + * of flash memory. This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- None for stratix. + *----------------------------------------------------------------------*/ +#undef CFG_NIOS_EPCSBASE + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- since leds are board-specific. + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ diff -Naurb u-boot-current/include/configs/EP1S40.h u-boot-new/include/configs/EP1S40.h --- u-boot-current/include/configs/EP1S40.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1S40.h 2005-08-11 13:28:35.000000000 -0400 @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1S40 1 /* EP1S40 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */ + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom + * of flash memory. This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- None for stratix. + *----------------------------------------------------------------------*/ +#undef CFG_NIOS_EPCSBASE + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- since leds are board-specific. + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */

2 1

[U-Boot-Users] patch: Nios-II boards EP1C20, EP1S10 and EP1S40 part 1
by Scott McNutt 10 Jun '06

10 Jun '06

Part 1: Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-11 10:49:01.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 12:16:00.000000000 -0400 @@ -26,6 +26,9 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 + Patch by Scott McNutt + * Add EPCS Controller bootrom work-around for Nios-II Patch by Scott McNutt -When booting from an epcs controller, the epcs bootrom may leave the diff -Naurb u-boot-current/MAINTAINERS u-boot-new/MAINTAINERS --- u-boot-current/MAINTAINERS 2005-08-05 19:46:25.000000000 -0400 +++ u-boot-new/MAINTAINERS 2005-08-11 12:30:16.000000000 -0400 @@ -484,6 +484,9 @@ PCI5441 Nios-II PK1C20 Nios-II + EP1C20 Nios-II + EP1S10 Nios-II + EP1S40 Nios-II ######################################################################### # MicroBlaze Systems: # diff -Naurb u-boot-current/MAKEALL u-boot-new/MAKEALL --- u-boot-current/MAKEALL 2005-08-05 19:46:26.000000000 -0400 +++ u-boot-new/MAKEALL 2005-08-11 12:30:52.000000000 -0400 @@ -230,7 +230,7 @@ ## Nios-II Systems ######################################################################### -LIST_nios2="PCI5441 PK1C20" +LIST_nios2="PCI5441 PK1C20 EP1C20 EP1S10 EP1S40" ######################################################################### ## MicroBlaze Systems diff -Naurb u-boot-current/Makefile u-boot-new/Makefile --- u-boot-current/Makefile 2005-08-09 13:22:31.000000000 -0400 +++ u-boot-new/Makefile 2005-08-11 12:29:52.000000000 -0400 @@ -1693,6 +1693,15 @@ ## Nios-II ######################################################################### +EP1C20_config : unconfig + @./mkconfig EP1C20 nios2 nios2 ep1c20 altera + +EP1S10_config : unconfig + @./mkconfig EP1S10 nios2 nios2 ep1s10 altera + +EP1S40_config : unconfig + @./mkconfig EP1S40 nios2 nios2 ep1s40 altera + PK1C20_config : unconfig @./mkconfig PK1C20 nios2 nios2 pk1c20 psyent diff -Naurb u-boot-current/README u-boot-new/README --- u-boot-current/README 2005-08-05 14:10:04.000000000 -0400 +++ u-boot-new/README 2005-08-11 12:31:48.000000000 -0400 @@ -319,6 +319,7 @@ ------------------------ CONFIG_PCI5441 CONFIG_PK1C20 + CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40 - CPU Module Type: (if CONFIG_COGENT is defined) diff -Naurb u-boot-current/board/altera/common/AMDLV065D.c u-boot-new/board/altera/common/AMDLV065D.c --- u-boot-current/board/altera/common/AMDLV065D.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/common/AMDLV065D.c 2005-08-10 14:01:24.000000000 -0400 @@ -0,0 +1,190 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <common.h> +#if defined(CONFIG_NIOS) +#include <nios.h> +#else +#include <asm/io.h> +#endif + +#define SECTSZ (64 * 1024) +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/*----------------------------------------------------------------------*/ +unsigned long flash_init (void) +{ + int i; + unsigned long addr; + flash_info_t *fli = &flash_info[0]; + + fli->size = CFG_FLASH_SIZE; + fli->sector_count = CFG_MAX_FLASH_SECT; + fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D; + + addr = CFG_FLASH_BASE; + for (i = 0; i < fli->sector_count; ++i) { + fli->start[i] = addr; + addr += SECTSZ; + fli->protect[i] = 1; + } + + return (CFG_FLASH_SIZE); +} +/*--------------------------------------------------------------------*/ +void flash_print_info (flash_info_t * info) +{ + int i, k; + int erased; + unsigned long *addr; + + printf (" Size: %ld KB in %d Sectors\n", + info->size >> 10, info->sector_count); + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + + /* Check if whole sector is erased */ + erased = 1; + addr = (unsigned long *) info->start[i]; + for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) { + if ( readl(addr++) != (unsigned long)-1) { + erased = 0; + break; + } + } + + /* Print the info */ + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " "); + } + printf ("\n"); +} + +/*-------------------------------------------------------------------*/ + + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + unsigned char *addr = (unsigned char *) info->start[0]; + unsigned char *addr2; + int prot, sect; + ulong start; + + /* Some sanity checking */ + if ((s_first < 0) || (s_first > s_last)) { + printf ("- no sectors to erase\n"); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + /* It's ok to erase multiple sectors provided we don't delay more + * than 50 usec between cmds ... at which point the erase time-out + * occurs. So don't go and put printf() calls in the loop ... it + * won't be very helpful ;-) + */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr2 = (unsigned char *) info->start[sect]; + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr, 0x80); + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr2, 0x30); + /* Now just wait for 0xff & provide some user + * feedback while we wait. + */ + start = get_timer (0); + while ( readb (addr2) != 0xff) { + udelay (1000 * 1000); + putc ('.'); + if (get_timer (start) > CFG_FLASH_ERASE_TOUT) { + printf ("timeout\n"); + return 1; + } + } + } + } + printf ("\n"); + return 0; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + + vu_char *cmd = (vu_char *) info->start[0]; + vu_char *dst = (vu_char *) addr; + unsigned char b; + ulong start; + + while (cnt) { + /* Check for sufficient erase */ + b = *src; + if ((readb (dst) & b) != b) { + printf ("%02x : %02x\n", readb (dst), b); + return (2); + } + + writeb (cmd, 0xaa); + writeb (cmd, 0x55); + writeb (cmd, 0xa0); + writeb (dst, b); + + /* Verify write */ + start = get_timer (0); + while (readb (dst) != b) { + if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + return 1; + } + } + dst++; + src++; + cnt--; + } + + return (0); +} diff -Naurb u-boot-current/board/altera/common/epled.c u-boot-new/board/altera/common/epled.c --- u-boot-current/board/altera/common/epled.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/common/epled.c 2005-08-09 11:33:38.000000000 -0400 @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <nios2-io.h> +#include <status_led.h> + +/* The LED port is configured as output only, so we + * must track the state manually. + */ +static led_id_t val = 0; + +void __led_init (led_id_t mask, int state) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + if (state == STATUS_LED_ON) + val &= ~mask; + else + val |= mask; + writel (&pio->data, val); +} + +void __led_set (led_id_t mask, int state) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + if (state == STATUS_LED_ON) + val &= ~mask; + else + val |= mask; + writel (&pio->data, val); +} + +void __led_toggle (led_id_t mask) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + val ^= mask; + writel (&pio->data, val); +} diff -Naurb u-boot-current/board/altera/ep1c20/Makefile u-boot-new/board/altera/ep1c20/Makefile --- u-boot-current/board/altera/ep1c20/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1c20/config.mk u-boot-new/board/altera/ep1c20/config.mk --- u-boot-current/board/altera/ep1c20/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1c20/ep1c20.c u-boot-new/board/altera/ep1c20/ep1c20.c --- u-boot-current/board/altera/ep1c20/ep1c20.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/ep1c20.c 2005-08-11 12:11:38.000000000 -0400 @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int board_early_init_f (void) +{ + return 0; +} + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1C20\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1c20/u-boot.lds u-boot-new/board/altera/ep1c20/u-boot.lds --- u-boot-current/board/altera/ep1c20/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff -Naurb u-boot-current/board/altera/ep1s10/Makefile u-boot-new/board/altera/ep1s10/Makefile --- u-boot-current/board/altera/ep1s10/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1s10/config.mk u-boot-new/board/altera/ep1s10/config.mk --- u-boot-current/board/altera/ep1s10/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1s10/ep1s10.c u-boot-new/board/altera/ep1s10/ep1s10.c --- u-boot-current/board/altera/ep1s10/ep1s10.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/ep1s10.c 2005-08-11 12:28:03.000000000 -0400 @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int board_early_init_f (void) +{ + return 0; +} + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1S10\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1s10/u-boot.lds u-boot-new/board/altera/ep1s10/u-boot.lds --- u-boot-current/board/altera/ep1s10/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +}

2 1

[U-Boot-Users] patch:
by Scott McNutt 10 Jun '06

10 Jun '06

Add EPCS Controller bootrom work-around for Nios-II -When booting from an epcs controller, the epcs bootrom may leave the slave select in an asserted state causing soft reset hang. This patch ensures slave select is negated at reset. Regards, --Scott --- u-boot-current/CHANGELOG 2005-08-11 10:41:00.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:45:49.000000000 -0400 @@ -26,6 +26,12 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Add EPCS Controller bootrom work-around for Nios-II + Patch by Scott McNutt + -When booting from an epcs controller, the epcs bootrom may leave the + slave select in an asserted state causing soft reset hang. This + patch ensures slave select is negated at reset. + * Update PK1C20 board for Nios-II 5.0 Patch by Scott McNutt -Update base addresses for standard configuration diff -Naurb u-boot-current/cpu/nios2/epcs.c u-boot-new/cpu/nios2/epcs.c --- u-boot-current/cpu/nios2/epcs.c 2005-08-09 13:24:21.000000000 -0400 +++ u-boot-new/cpu/nios2/epcs.c 2005-08-10 10:18:31.000000000 -0400 @@ -210,6 +210,21 @@ { 0, 0, 0, 0, 0, 0 } }; +int epcs_reset (void) +{ + /* When booting from an epcs controller, the epcs bootrom + * code may leave the slave select in an asserted state. + * This causes two problems: (1) The initial epcs access + * will fail -- not a big deal, and (2) a software reset + * will cause the bootrom code to hang since it does not + * ensure the select is negated prior to first access -- a + * big deal. Here we just negate chip select and everything + * gets better :-) + */ + epcs_cs (0); /* Negate chip select */ + return (0); +} + epcs_devinfo_t *epcs_dev_find (void) { unsigned char buf[4]; diff -Naurb u-boot-current/include/nios2-epcs.h u-boot-new/include/nios2-epcs.h --- u-boot-current/include/nios2-epcs.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/nios2-epcs.h 2005-08-10 10:15:40.000000000 -0400 @@ -38,6 +38,11 @@ unsigned char prot_mask; /* Protection mask */ }epcs_devinfo_t; +/* Resets the epcs controller -- to prevent (potential) soft-reset + * problems when booting from the epcs controller + */ +extern int epcs_reset (void); + /* Returns the devinfo struct if EPCS device is found; * NULL otherwise. */ diff -Naurb u-boot-current/lib_nios2/board.c u-boot-new/lib_nios2/board.c --- u-boot-current/lib_nios2/board.c 2004-10-10 17:27:35.000000000 -0400 +++ u-boot-new/lib_nios2/board.c 2005-08-10 10:15:55.000000000 -0400 @@ -31,6 +31,9 @@ #ifdef CONFIG_STATUS_LED #include <status_led.h> #endif +#if defined(CFG_NIOS_EPCSBASE) +#include <nios2-epcs.h> +#endif /* @@ -92,6 +95,9 @@ #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, /* Call board-specific init code early.*/ #endif +#if defined(CFG_NIOS_EPCSBASE) + epcs_reset, +#endif env_init, serial_init, @@ -166,6 +172,10 @@ WATCHDOG_RESET (); interrupt_init (); +#if defined(CONFIG_BOARD_LATE_INIT) + board_late_init (); +#endif + /* main_loop */ for (;;) { WATCHDOG_RESET ();

2 1

[U-Boot-Users] patch: PK1C20 for Nios-II 5.0
by Scott McNutt 10 Jun '06

10 Jun '06

Update PK1C20 board for Nios-II 5.0 -Update base addresses for standard configuration -Eliminate use of CACHE_BYPASS in board code Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-11 10:31:52.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:38:07.000000000 -0400 @@ -26,6 +26,11 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Update PK1C20 board for Nios-II 5.0 + Patch by Scott McNutt + -Update base addresses for standard configuration + -Eliminate use of CACHE_BYPASS in board code + * Fix I/O Macros and mini-app stubs for Nios-II Patch by Scott McNutt -Fix asm/io.h macros diff -Naurb u-boot-current/board/psyent/pk1c20/config.mk u-boot-new/board/psyent/pk1c20/config.mk --- u-boot-current/board/psyent/pk1c20/config.mk 2004-10-10 17:27:32.000000000 -0400 +++ u-boot-new/board/psyent/pk1c20/config.mk 2005-08-09 17:34:46.000000000 -0400 @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x018e0000 +TEXT_BASE = 0x01fc0000 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include diff -Naurb u-boot-current/board/psyent/pk1c20/led.c u-boot-new/board/psyent/pk1c20/led.c --- u-boot-current/board/psyent/pk1c20/led.c 2004-10-10 17:27:32.000000000 -0400 +++ u-boot-new/board/psyent/pk1c20/led.c 2005-08-09 11:33:38.000000000 -0400 @@ -22,7 +22,7 @@ */ #include <common.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <status_led.h> @@ -33,30 +33,30 @@ void __led_init (led_id_t mask, int state) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; if (state == STATUS_LED_ON) val &= ~mask; else val |= mask; - pio->data = val; + writel (&pio->data, val); } void __led_set (led_id_t mask, int state) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; if (state == STATUS_LED_ON) val &= ~mask; else val |= mask; - pio->data = val; + writel (&pio->data, val); } void __led_toggle (led_id_t mask) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; val ^= mask; - pio->data = val; + writel (&pio->data, val); } diff -Naurb u-boot-current/include/configs/PK1C20.h u-boot-new/include/configs/PK1C20.h --- u-boot-current/include/configs/PK1C20.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/configs/PK1C20.h 2005-08-09 18:04:01.000000000 -0400 @@ -32,7 +32,7 @@ #define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ #define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ -#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ @@ -51,7 +51,7 @@ #define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ #define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ #define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ -#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ #define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/ /*------------------------------------------------------------------------ @@ -61,7 +61,7 @@ * -Global data is placed below the heap. * -The stack is placed below global data (&grows down). *----------------------------------------------------------------------*/ -#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */ #define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) @@ -95,9 +95,9 @@ * CONSOLE *----------------------------------------------------------------------*/ #if defined(CONFIG_CONSOLE_JTAG) -#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */ +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ #else -#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */ +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ #endif #define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ @@ -110,9 +110,9 @@ * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for * epcs device access is enabled. The base address is the epcs * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK. - * The register base is currently at offset 0x400 from the memory base. + * The register base is currently at offset 0x600 from the memory base. *----------------------------------------------------------------------*/ -#define CFG_NIOS_EPCSBASE 0x00900400 /* EPCS register base */ +#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */ /*------------------------------------------------------------------------ * DEBUG @@ -126,7 +126,7 @@ * registers, we can slow it down to 10 msec using TMRCNT. If the default * period is acceptable, TMRCNT can be left undefined. *----------------------------------------------------------------------*/ -#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ #define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ #define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ #define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) @@ -137,7 +137,7 @@ * must implement its own led routines -- leds are, after all, * board-specific, no? *----------------------------------------------------------------------*/ -#define CFG_LEDPIO_ADDR 0x00920840 /* LED PIO base addr */ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ #define CONFIG_STATUS_LED /* Enable status driver */ #define STATUS_LED_BIT 1 /* Bit-0 on PIO */ @@ -150,7 +150,7 @@ * way out to avoid changes there -- define the base address to ensure * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ -#define CONFIG_SMC91111_BASE 0x80910300 /* Base addr (bypass) */ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ #define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff -Naurb u-boot-current/board/psyent/common/AMDLV065D.c u-boot-new/board/psyent/common/AMDLV065D.c --- u-boot-current/board/psyent/common/AMDLV065D.c 2004-10-10 17:27:31.000000000 -0400 +++ u-boot-new/board/psyent/common/AMDLV065D.c 2005-08-10 14:01:24.000000000 -0400 @@ -26,7 +26,7 @@ #if defined(CONFIG_NIOS) #include <nios.h> #else -#include <nios2.h> +#include <asm/io.h> #endif #define SECTSZ (64 * 1024) @@ -56,9 +56,8 @@ void flash_print_info (flash_info_t * info) { int i, k; - unsigned long size; int erased; - volatile unsigned char *flash; + unsigned long *addr; printf (" Size: %ld KB in %d Sectors\n", info->size >> 10, info->sector_count); @@ -66,14 +65,10 @@ for (i = 0; i < info->sector_count; ++i) { /* Check if whole sector is erased */ - if (i != (info->sector_count - 1)) - size = info->start[i + 1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; erased = 1; - flash = (volatile unsigned char *) CACHE_BYPASS(info->start[i]); - for (k = 0; k < size; k++) { - if (*flash++ != 0xff) { + addr = (unsigned long *) info->start[i]; + for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) { + if ( readl(addr++) != (unsigned long)-1) { erased = 0; break; } @@ -83,7 +78,7 @@ if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s%s", - CACHE_NO_BYPASS(info->start[i]), + info->start[i], erased ? " E" : " ", info->protect[i] ? "RO " : " "); } @@ -95,9 +90,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { - volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) - CACHE_BYPASS(info->start[0]); - volatile CFG_FLASH_WORD_SIZE *addr2; + unsigned char *addr = (unsigned char *) info->start[0]; + unsigned char *addr2; int prot, sect; ulong start; @@ -127,19 +121,18 @@ */ for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CFG_FLASH_WORD_SIZE *) - CACHE_BYPASS((info->start[sect])); - *addr = 0xaa; - *addr = 0x55; - *addr = 0x80; - *addr = 0xaa; - *addr = 0x55; - *addr2 = 0x30; + addr2 = (unsigned char *) info->start[sect]; + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr, 0x80); + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr2, 0x30); /* Now just wait for 0xff & provide some user * feedback while we wait. */ start = get_timer (0); - while (*addr2 != 0xff) { + while ( readb (addr2) != 0xff) { udelay (1000 * 1000); putc ('.'); if (get_timer (start) > CFG_FLASH_ERASE_TOUT) { @@ -163,27 +156,27 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { - vu_char *cmd = (vu_char *) CACHE_BYPASS(info->start[0]); - vu_char *dst = (vu_char *) CACHE_BYPASS(addr); + vu_char *cmd = (vu_char *) info->start[0]; + vu_char *dst = (vu_char *) addr; unsigned char b; ulong start; while (cnt) { /* Check for sufficient erase */ b = *src; - if ((*dst & b) != b) { - printf ("%02x : %02x\n", *dst, b); + if ((readb (dst) & b) != b) { + printf ("%02x : %02x\n", readb (dst), b); return (2); } - *cmd = 0xaa; - *cmd = 0x55; - *cmd = 0xa0; - *dst = b; + writeb (cmd, 0xaa); + writeb (cmd, 0x55); + writeb (cmd, 0xa0); + writeb (dst, b); /* Verify write */ start = get_timer (0); - while (*dst != b) { + while (readb (dst) != b) { if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { return 1; }

2 1

[U-Boot-Users] patch: Nios-II mini-app and I/O macros
by Scott McNutt 10 Jun '06

10 Jun '06

Fix I/O Macros and mini-app stubs for Nios-II -Fix asm/io.h macros -Eliminate use of CACHE_BYPASS in cpu code -Eliminate assembler warnings -Fix mini-app stubs and force no small data Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-07 19:06:32.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:30:51.000000000 -0400 @@ -26,6 +26,13 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Fix I/O Macros and mini-app stubs for Nios-II + Patch by Scott McNutt + -Fix asm/io.h macros + -Eliminate use of CACHE_BYPASS in cpu code + -Eliminate assembler warnings + -Fix mini-app stubs and force no small data + * Fix build problems for PM856 Board * Fix sign extension bug in 'fpga loadb' command; diff -Naurb u-boot-20050809/cpu/nios2/epcs.c u-boot-new/cpu/nios2/epcs.c --- u-boot-20050809/cpu/nios2/epcs.c 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/cpu/nios2/epcs.c 2005-08-09 11:05:32.781250000 -0400 @@ -25,7 +25,7 @@ #if defined(CFG_NIOS_EPCSBASE) #include <command.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <nios2-epcs.h> @@ -72,8 +72,7 @@ */ #define EPCS_TIMEOUT 100 /* 100 msec timeout */ -static nios_spi_t *epcs = - (nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE); +static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE; /*********************************************************************** * Device access @@ -81,16 +80,20 @@ static int epcs_cs (int assert) { ulong start; + unsigned tmp; + if (assert) { - epcs->control |= NIOS_SPI_SSO; + tmp = readl (&epcs->control); + writel (&epcs->control, tmp | NIOS_SPI_SSO); } else { /* Let all bits shift out */ start = get_timer (0); - while ((epcs->status & NIOS_SPI_TMT) == 0) + while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - epcs->control &= ~NIOS_SPI_SSO; + tmp = readl (&epcs->control); + writel (&epcs->control, tmp & ~NIOS_SPI_SSO); } return (0); } @@ -100,10 +103,10 @@ ulong start; start = get_timer (0); - while ((epcs->status & NIOS_SPI_TRDY) == 0) + while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - epcs->txdata = c; + writel (&epcs->txdata, c); return (0); } @@ -112,10 +115,10 @@ ulong start; start = get_timer (0); - while ((epcs->status & NIOS_SPI_RRDY) == 0) + while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - return (epcs->rxdata); + return (readl (&epcs->rxdata)); } static unsigned char bitrev[] = { diff -Naurb u-boot-20050809/cpu/nios2/interrupts.c u-boot-new/cpu/nios2/interrupts.c --- u-boot-20050809/cpu/nios2/interrupts.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/interrupts.c 2005-08-09 11:27:39.515625000 -0400 @@ -27,6 +27,7 @@ #include <nios2.h> #include <nios2-io.h> +#include <asm/io.h> #include <asm/ptrace.h> #include <common.h> #include <command.h> @@ -79,7 +80,7 @@ /* Interrupt is cleared by writing anything to the * status register. */ - tmr->status = 0; + writel (&tmr->status, 0); timestamp += CFG_NIOS_TMRMS; #ifdef CONFIG_STATUS_LED status_led_tick(timestamp); @@ -88,16 +89,17 @@ static void tmr_init (void) { - nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE); + nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE; + + writel (&tmr->status, 0); + writel (&tmr->control, 0); + writel (&tmr->control, NIOS_TIMER_STOP); - tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO); - tmr->control |= NIOS_TIMER_STOP; #if defined(CFG_NIOS_TMRCNT) - tmr->periodl = CFG_NIOS_TMRCNT & 0xffff; - tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff; + writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff); + writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff); #endif - tmr->control |= ( NIOS_TIMER_ITO | - NIOS_TIMER_CONT | + writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START ); irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr); } diff -Naurb u-boot-20050809/cpu/nios2/serial.c u-boot-new/cpu/nios2/serial.c --- u-boot-20050809/cpu/nios2/serial.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/serial.c 2005-08-09 10:49:40.203125000 -0400 @@ -24,7 +24,7 @@ #include <common.h> #include <watchdog.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> /*------------------------------------------------------------------ @@ -32,8 +32,7 @@ *-----------------------------------------------------------------*/ #if defined(CONFIG_CONSOLE_JTAG) -static nios_jtag_t *jtag = - (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE); +static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE; void serial_setbrg( void ){ return; } int serial_init( void ) { return(0);} @@ -42,9 +41,9 @@ { unsigned val; - while (NIOS_JTAG_WSPACE (jtag->control) == 0) + while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0) WATCHDOG_RESET (); - jtag->data = (unsigned char)c; + writel (&jtag->data, (unsigned char)c); } void serial_puts (const char *s) @@ -55,7 +54,7 @@ int serial_tstc (void) { - return (jtag->control & NIOS_JTAG_RRDY); + return ( readl (&jtag->control) & NIOS_JTAG_RRDY); } int serial_getc (void) @@ -65,7 +64,7 @@ while (1) { WATCHDOG_RESET (); - val = jtag->data; + val = readl (&jtag->data); if (val & NIOS_JTAG_RVALID) break; } @@ -78,8 +77,7 @@ *-----------------------------------------------------------------*/ #else -static nios_uart_t *uart = (nios_uart_t *) - CACHE_BYPASS(CFG_NIOS_CONSOLE); +static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE; #if defined(CFG_NIOS_FIXEDBAUD) @@ -97,7 +95,7 @@ unsigned div; div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; - uart->divisor = div; + writel (&uart->divisor,div); return; } @@ -117,9 +115,9 @@ { if (c == '\n') serial_putc ('\r'); - while ((uart->status & NIOS_UART_TRDY) == 0) + while ((readl (&uart->status) & NIOS_UART_TRDY) == 0) WATCHDOG_RESET (); - uart->txdata = (unsigned char)c; + writel (&uart->txdata,(unsigned char)c); } void serial_puts (const char *s) @@ -131,14 +129,14 @@ int serial_tstc (void) { - return (uart->status & NIOS_UART_RRDY); + return (readl (&uart->status) & NIOS_UART_RRDY); } int serial_getc (void) { while (serial_tstc () == 0) WATCHDOG_RESET (); - return( uart->rxdata & 0x00ff ); + return (readl (&uart->rxdata) & 0x00ff ); } #endif /* CONFIG_JTAG_CONSOLE */ diff -Naurb u-boot-20050809/cpu/nios2/sysid.c u-boot-new/cpu/nios2/sysid.c --- u-boot-20050809/cpu/nios2/sysid.c 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/cpu/nios2/sysid.c 2005-08-09 10:55:19.234375000 -0400 @@ -26,20 +26,21 @@ #if defined (CFG_NIOS_SYSID_BASE) #include <command.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <linux/time.h> void display_sysid (void) { - struct nios_sysid_t *sysid = - (struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE); + struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE; struct tm t; char asc[32]; + time_t stamp; - localtime_r ((time_t *)&sysid->timestamp, &t); + stamp = readl (&sysid->timestamp); + localtime_r (&stamp, &t); asctime_r (&t, asc); - printf ("SYSID : %08x, %s", sysid->id, asc); + printf ("SYSID : %08x, %s", readl (&sysid->id), asc); } diff -Naurb u-boot-20050809/include/asm-nios2/io.h u-boot-new/include/asm-nios2/io.h --- u-boot-20050809/include/asm-nios2/io.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/asm-nios2/io.h 2005-05-26 14:50:50.421875000 -0400 @@ -39,12 +39,13 @@ #define readl(addr)\ ({unsigned long val;\ asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) + #define writeb(addr,val)\ - asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val)) #define writew(addr,val)\ - asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val)) #define writel(addr,val)\ - asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val)) #define inb(addr) readb(addr) #define inw(addr) readw(addr) diff -Naurb u-boot-current/cpu/nios2/exceptions.S u-boot-new/cpu/nios2/exceptions.S --- u-boot-current/cpu/nios2/exceptions.S 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/exceptions.S 2005-08-09 14:04:34.000000000 -0400 @@ -30,6 +30,9 @@ .global _exception + .set noat + .set nobreak + _exception: /* SAVE ALL REGS -- this allows trap and unimplemented * instruction handlers to be coded conveniently in C diff -Naurb u-boot-current/examples/Makefile u-boot-new/examples/Makefile --- u-boot-current/examples/Makefile 2005-05-16 10:19:50.000000000 -0400 +++ u-boot-new/examples/Makefile 2005-08-09 17:43:17.000000000 -0400 @@ -42,7 +42,7 @@ endif ifeq ($(ARCH),nios2) -LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds +LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds endif ifeq ($(ARCH),m68k) diff -Naurb u-boot-current/examples/stubs.c u-boot-new/examples/stubs.c --- u-boot-current/examples/stubs.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/examples/stubs.c 2005-08-09 16:59:16.000000000 -0400 @@ -92,7 +92,7 @@ #x ":\n" \ " movhi r8, %%hi(%0)\n" \ " ori r8, r0, %%lo(%0)\n" \ -" add r8, r0, r15\n" \ +" add r8, r8, r15\n" \ " ldw r8, 0(r8)\n" \ " ldw r8, %1(r8)\n" \ " jmp r8\n" \ diff -Naurb u-boot-current/nios2_config.mk u-boot-new/nios2_config.mk --- u-boot-current/nios2_config.mk 2004-10-10 17:27:30.000000000 -0400 +++ u-boot-new/nios2_config.mk 2005-08-09 16:02:12.000000000 -0400 @@ -23,4 +23,4 @@ # PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ -PLATFORM_CPPFLAGS += -ffixed-r15 +PLATFORM_CPPFLAGS += -ffixed-r15 -G0

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[U-Boot-Users] Kernel XIP
by shivappa.kushtagi＠wipro.com 19 May '06

19 May '06

Hello, I configured for kernel XIP and created xipImage. When I tried to load it through u-boot, it complained about invalid magic number. Later I added a 64 byte header required for u-boot with the following mkimage command: mkimage -A arm -O linux -T kernel -C none -a 0x00080000 -e 0x00080040 -d xipImage XIPImage. Actually some of the document found at CELF wiki specifies that we need to give "-x" option to mkimage. With -x option, mkimage fails with the following error message : mkimage: Bad file: "xipImage" has invalid buffer for XIP. After looking into the mkimage source code, found that it expects 0xFF for the first 64 bytes of xipImage. Which is missing in the xipImage I have built. There must be some in-consistency between the way xipImage is built or mkimage command. Also, I didn't find any significance of the code for "-x" if we specify the "entry point" correctly (load address + 0x40). After the mkimage, I flashed the XIPImage at address 0x00080000. After resetting the board, I got the following boot messages : ## Booting image at 00080000 ... Image Name: Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 2009016 Bytes = 1.9 MB Load Address: 00080000 Entry Point: 00080040 Verifying Checksum ... OK XIP Kernel Image ... OK Starting kernel ... And it stops here.... Any idea what is going wrong here ? My configuration: Processor : ARM926EJ-Sid(wb) rev 3 (v5l) Kernel : 2.6.10 Regards Shivappa

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[U-Boot-Users] PATCH: apply SoC concept on arm926 cpus
by Andreas Engel 03 Apr '06

03 Apr '06

CHANGELOG entry: * Patch by Andreas Engel, 20 June 2005 applied the SoC concept to arm926ejs cpus, i.e. moved the SoC specific timer and cpu_reset code from the ./cpu/$(CPU) directory into new ./cpu/$(CPU)/$(SOC) directories

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[U-Boot-Users] [PATCH] fix building of tools/env programs
by Murray.Jensen＠csiro.au 23 Mar '06

23 Mar '06

This patch shows what I had to do to get the programs in the tools/env directory to build (i.e. fw_printenv/fw_setenv). Your mileage may vary. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix building of programs in the tools/env directory Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 3

[U-Boot-Users] Re: compile u-boot with recent toolchain : symbols problem
by Anton Wöllert 22 Mar '06

22 Mar '06

I've got the same problem with binutils 2.16 and gcc 3.4.4. also binutils 2.16.91.0.1 doesn't work right. > > > > I used to compile U-Boot with ELDK, but I currently need to work with > > newer toolchain : > > - binutils-2.16 > > - gcc-3.4.3 > > This looks line a binutils problem, then. May I ask why you have to > use binutils-2.16 ? May I ask you why it should not be used? How to recover bugs, if people just use older software? > > And which exact board are we talking about? > > > The "__u_boot_cmd_start" symbol value, generated with this new > > toolchain, is wrong (U-Boot crashes when relocating the command > > table). > > Can you please provide exact data, like the differences between the > System.map and the u-boot.map files when using binutils-2.16 and > another, working version of binutils? [Please use the _same_ version > of GCC for this comparison.] > > > There are two new sections between "__u_boot_cmd_start" and > > ".u_boot_cmd" address : > > - .data.rel.local > > - .data.rel > > Can you please show exactly what happens? The above, i couldn't acknowledge, but u-boot definitly hangs _after_ relocating to memory. it will dump 'Now running in RAM at .....'. But then it hangs. After relocating, it tries to manually relocate the command table. But that doesn't work. Don't know why, but with the patch it works. Obviously __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; and __u_boot_cmd_start = ADDR(.u_boot_cmd); .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; should be the same. However, this should be a binutils bug or the linker script voodoo that is done with the first script above isn't really valid. Maybe .u_boot_cmd gets misalligned. Maybe i should try to DEBUG(& __u_boot_cmd_start) in both (the patched and unpatched) versions to see, where it points, or maybe objdump show more. Btw. this happens on the tqm8xx board. Thanks to Vincent for recovering that, that saved me a lot of time... kind regards Anton Wöllert

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[U-Boot-Users] Bug in DTT for temperatures below zero degress !!!
by Steven Scholz 14 Mar '06

14 Mar '06

Hi there, there's a terrible bug in the current U-Boot CVS concerning DDT: For temperature below zero the function dtt_get_temp() (at least for lm75) returns wrong values! ... DTT: 1 is 235 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (235°C) WDT: disabled This is because of the use of an "int" although the lm75 only returns two byte ("signed short"). This trivial fix is needed: Index: u-boot/dtt/lm75.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/dtt/lm75.c,v retrieving revision 1.2 diff -u -r1.2 lm75.c --- u-boot/dtt/lm75.c 27 Jun 2003 21:32:38 -0000 1.2 +++ u-boot/dtt/lm75.c 15 Jun 2005 08:44:21 -0000 @@ -174,7 +170,7 @@ int dtt_get_temp(int sensor) { - return (dtt_read(sensor, DTT_READ_TEMP) / 256); + return ( ((signed short) dtt_read(sensor, DTT_READ_TEMP)) / 256); } /* dtt_get_temp() */ #endif /* CONFIG_DTT_LM75 */ Then the output is correct: ... DTT: 1 is -28 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (-28°C) CCFL: disabled (too cold!) WDT: disabled I am afraid this is an issues on all DTT in U-Boot. Some even only use "uchar". Comments? -- Steven

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[U-Boot-Users] gunzip question about large uImages
by Robin Getz 13 Mar '06

13 Mar '06

Quick Question: It looks to me that the max uncompressed image size is hard coded to 4Meg (0x400000 bytes). Any thoughts why? Long question: We were having some problems booting large uImages (reported here ~ month ago). It seemed as if the were not being decompressed properly. When we had someone (Aubrey Li) dig into it he found/pointed out that in the latest cvs, u-boot/common/cmd_bootm.c the function do_bootm defines what looks to be a uncompressed max length as: uint unc_len = 0x400000; This is passed to gunzip if the image needs to be uncompressed. --snip-- case IH_COMP_GZIP: printf (" Uncompressing %s ... ", name); if (gunzip ((void *)ntohl(hdr->ih_load), unc_len, (uchar *)data, &len) != 0) { puts ("GUNZIP ERROR - must RESET board to recover\n"); SHOW_BOOT_PROGRESS (-6); do_reset (cmdtp, flag, argc, argv); } break; --snip-- gunzip takes this as the second parameter and sets it to dstlen. int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) This is passed to the inflation routine as s.avail_out = dstlen; where inflate from u-boot/lib_generic/zlib.c uses this to halt decompression if the image size can not fit. -- snip -- from int inflate(z, f) -- if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0) r = inflate_packet_flush(z->state->blocks); --snip -- from local int inflate_flush(s, z, r)-- /* compute number of bytes to copy as far as end of window */ n = (uInt)((q <= s->write ? s->write : s->end) - q); if (n > z->avail_out) n = z->avail_out; if (n && r == Z_BUF_ERROR) r = Z_OK; /* update counters */ z->avail_out -= n; z->total_out += n; -- When unc_len is increased - our problem goes away... So: two questions: - what is the best way to manage the size of unc_len? in include/configs/platform.h? Or just make it really_really big? - do you want a patch in u-boot/common/cmd_bootm.c/gunzip to check to see if the image was completely decompressed? OR - do you want a patch in u-boot/lib_generic/zlib.c to return an error if it runs out of room? Thanks -Robin

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[U-Boot-Users] Why exceptions are enabled before exception vector code is copied
by Cedric VINCENT 13 Mar '06

13 Mar '06

Dear Wolfgang. Can I ask you why exceptions are enabled before exception vector code is copied to the low RAM pages ? (I am talking about U-Boot/PPC) On my board, U-Boot crashes before relocation (when debugging) since Xilinx Microprocessor Debugger (XMD) makes a spurious "Machine Check Exception". For other reasons, such an exception could arrived before u-boot starts. Finally, it is a bug or a very strange coding behaviour... Cedric VINCENT.

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[U-Boot-Users] [PATCH] I2C2 support for MPC8548CDS
by Zajac Adam-AAZ004 13 Mar '06

13 Mar '06

The attached patch adds I2C2 support for the MPC8548CDS board. I've performed a limited testing on our MPC8548CDS board and everything seems to be working fine. Since this processor is brand new, I may need to revise the changes when we build our real system based on '8548. Thanks, Adam Zajac <<mpc8548cds_i2c2.patch.gz>>

2 1

[U-Boot-Users] malloc with no return check?
by Andrew Dyer 13 Mar '06

13 Mar '06

I noticed the au1xxx ethernet driver has a malloc where the return value isn't checked. I did some more looking while waiting for a slow flash programmer and at least these files seem to do the same thing: ./drivers/ns8382x.c ./drivers/bcm570x.c ./drivers/rtl8139.c ./drivers/eepro100.c ./drivers/dc2114x.c ./drivers/e1000.c ./drivers/sk98lin/skge.c ./drivers/cfb_console.c ./drivers/natsemi.c ./drivers/inca-ip_sw.c ./drivers/rtl8169.c ./drivers/pcnet.c ./cpu/mips/au1x00_eth.c ./cpu/ppc4xx/serial.c ./cpu/ppc4xx/405gp_enet.c ./cpu/ppc4xx/440gx_enet.c ./cpu/i386/serial.c ./cpu/mpc8xx/scc.c ./common/hush.c ./cpu/mpc8xx/spi.c ?maybe ./cpu/mpc8260/spi.c ?maybe ./cpu/mpc85xx/ether_fcc.c ./cpu/mpc8260/ether_fcc.c ./cpu/mpc5xxx/fec.c ./cpu/mpc8220/fec.c ./tools/easylogo/easylogo.c I didn't look under the board directory or check all varieties of alloc :-) I will submit patches for the mips stuff hopefully next week. -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] [PATCH] in tftp client, recover from lost ACKs
by Brenda J. Butler 13 Mar '06

13 Mar '06

CHANGELOG entry: * Patch by John McCarthy and Brenda J. Butler, 8 July 2005 When the tftp client sends an ack but it gets lost, the server will resend the block. The client was now expecting the next block and ignored this block, the server never got an ack, and they got stuck. Now the tftp client will ack the block the second (and subsequent) time(s) allowing the tftp session to proceed. This little fix assumes that the server will resend exactly the same contents (same size from same offset). Here is the patch for you to look at; it is also in an attachment where the tabs and lines are preserved better. Apply to top of head checkout with patch -p0 < uboot2.patch Index: net/tftp.c =================================================================== RCS file: /u00/cvs/u-boot3/net/tftp.c,v retrieving revision 1.1 retrieving revision 1.3 diff -u -r1.1 -r1.3 --- net/tftp.c 15 Mar 2005 17:53:28 -0000 1.1 +++ net/tftp.c 5 Jul 2005 19:48:46 -0000 1.3 @@ -246,17 +246,17 @@ } } - if (TftpBlock == TftpLastBlock) { - /* - * Same block again; ignore it. - */ - break; - } - TftpLastBlock = TftpBlock; NetSetTimeout (TIMEOUT * CFG_HZ, TftpTimeout); - store_block (TftpBlock - 1, pkt + 2, len); + if (TftpBlock != TftpLastBlock) { + /* + * Same block again; do everything again + * except store it. Hope the server sent + * exactly the same length/contents. + */ + store_block (TftpBlock - 1, pkt + 2, len); + } /* * Acknoledge the block just received, which will prompt

2 1

[U-Boot-Users] [PATCH] fix [id]cache_status for MPC85xx processors
by Murray.Jensen＠csiro.au 13 Mar '06

13 Mar '06

The existing code for the [id]cache_status commands on MPC85xx processors looks at the wrong bit to determine if the L1 cache is enabled. It looks at the most significant bit when it should look at the least significant bit. This patch corrects this bug. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 19, 2005: - fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix fw_setenv with uninitialised environment
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

In tools/env/fw_env.c when the environment is uninitialised, and the default_environment[] array is used instead, if a setenv is done there is a good chance that the array bounds will be exceeded. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix array overflow with fw_setenv on uninitialised environment Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] PATCH: Add support for EmbeddedPlanet EP88x boards
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch adds support for EmbeddedPlanet EP88x boards. It was tested on EP88xC board with MPC885 processor, 64MB RAM, and 16MB flash. CHANGELOG Add support for EmbeddedPlanet EP88x boards -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] extra headers in xilinx ml300 board
by Michael Libeskind 12 Mar '06

12 Mar '06

/board/xilinx/xilinx_enet/emac_adapter.c and /board/xilinx/xilinx_iic/iic_adapter.c both have a #include <configs/ml300.h> which I believe prevents users from making other board configs under the /board/xilinx directory based on the ML300 that use the xilinx_enet and xilinx_iic adapaters. Can this be removed?

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[U-Boot-Users] [PATCH] board support for the mpc8540eval board
by Ron Alder 12 Mar '06

12 Mar '06

The attached patch adds support for the MPC8540 EVAL board. The patch is based on the top of the cvs tree as of 11 July 2005. CHANGELOG entry: * Patch by Ron Alder, 11 July 2005 Add Xianghua Xiao and Lunsheng Wang's support for the GDA MPC8540 EVAL board.

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[U-Boot-Users] [PATCH] add support for Nat Semi DP83865 PHY to MPC85xx TSEC driver
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the National Semiconductor DP83865 gigabit ethernet PHY to the MPC85xx TSEC ethernet driver. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add Nat Semi DP83865 PHY support to MPC85xx TSEC driver Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] add (some) definitions for MPC85xx local bus controller
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds (some) definitions for the MPC85xx local bus controller register bits, in a similar vein to the MPC8260 memory controller, which is almost identical. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add (some) definitions for the MPC85xx local bus controller Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

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[U-Boot-Users] [PATCH] CPM I/O port pin functions for MPC85xx
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds the file "include/asm-ppc/iopin_85xx.h" which mirrors the functions in "include/asm-ppc/iopin_8260.h" for manipulating the CPM2 I/O pins for MPC85xx processors (that have a CPM). Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add CPM2 I/O pin functions for MPC85xx processors Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix conditional for including ks8695eth driver
by Greg Ungerer 12 Mar '06

12 Mar '06

Move the c-preprocessor conditional check for compiling the ks8695eth driver code to after including the headers. Otherwise it can never be compiled in. Index: drivers/ks8695eth.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/ks8695eth.c,v retrieving revision 1.2 diff -u -r1.2 ks8695eth.c --- drivers/ks8695eth.c 23 May 2005 10:49:51 -0000 1.2 +++ drivers/ks8695eth.c 3 Jun 2005 14:13:54 -0000 @@ -18,8 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifdef CONFIG_DRIVER_KS8695ETH - /****************************************************************************/ #include <common.h> @@ -28,6 +26,7 @@ #include <asm/io.h> #include <asm/arch/platform.h> +#ifdef CONFIG_DRIVER_KS8695ETH /****************************************************************************/ /*

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[U-Boot-Users] [PATCH] dhcp vendor fields - support opt bootfile, ignore tftp server
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the dhcp vendor optional bootfile (#67). It also ignores the vendor tftp server name option (#66). Both of these are supplied by the DEC Tru64 Unix dhcp server (called "join"), and in the case of the bootfile, it is the only place the boot file name is supplied. There is a perfectly good, 128 byte, field in the main bootp/dhcp packet where the boot file name could have been stored, but it wasn't used - go figure. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] Fix RGMII support in 8548 CDS
by Andy Fleming 12 Mar '06

12 Mar '06

This patch fixes a hw timing issue on 8548 CDS for eTSEC 3 in RGMII mode: Index: tsec.h =================================================================== RCS file: /cm/vault/u-boot/u-boot/cpu/mpc85xx/tsec.h,v retrieving revision 1.1.1.1.4.6 diff -r1.1.1.1.4.6 tsec.h 111c111 < #define MIIM_CIS8204_EPHYCON_RGMII 0x1000 --- > #define MIIM_CIS8204_EPHYCON_RGMII 0x1100

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[U-Boot-Users] LXT971A PHY debugging on MPC8540 Custom Board
by Shirasat Girish-ags032 12 Mar '06

12 Mar '06

Hi , I have partially ported Uboot on one of our MPC8540 based custom boards. I am currently facing problems in bringing up the 10/100Mbps FEC interface. We are using the LXT971A PHY for the FEC interface. Well the problem is that , the MAC is putting out the data but the PHY is failing to put the data on the line. The PHY is successfully able to auto- negotiate. The MAC putting out data was confirmed by the MAC debug registers and by probing the Tx_EN,clock and TX_D lines. I carried out the MAC loop back test which passed . Then went on for the PHY internal loop back test. Well, when the loop back is enabled the MAC fails to transmit the frame successfully. The thing confusing me is that why the MAC frame transmission is getting affected when i enable the PHY loopback test. Any pointers will be very helpful. Regards, Girish

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[U-Boot-Users] [Patch][CVS] Updating for RPXlite_DW---20050619
by Sam Song 12 Mar '06

12 Mar '06

Hi list, To make things better on RPXlite DW board with more flexible functions, a small patch added and tested. I change ifdef to make this patch work online this time. Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Add netconsole and several useful commands. ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/configs/RPXlite_DW.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXlite_DW.h,v retrieving revision 1.6 diff -p -u -r1.6 RPXlite_DW.h --- include/configs/RPXlite_DW.h 22 Jan 2005 18:13:06 -0000 1.6 +++ include/configs/RPXlite_DW.h 19 Jun 2005 13:44:10 -0000 @@ -45,7 +45,7 @@ */ /* #define DEBUG 1 */ -/* #ifdef DEPLOYMENT 1 */ +/* #define DEPLOYMENT 1 */ #undef CONFIG_MPC860 #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ @@ -117,6 +117,36 @@ #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) +#if 1 /* Enable this staff could make image enlarge about 25KB. Mask it if you + don't want the advanced function */ + +#ifdef CONFIG_SPLASH_SCREEN +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_BMP | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#else +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#endif /* CONFIG_SPLASH_SCREEN */ + +/* test-only */ +#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ +#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ + +#define CONFIG_NETCONSOLE + +#endif /* 1 */ + /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> @@ -446,5 +476,6 @@ #define CONFIG_SERVERIP 172.16.115.6 #define CONFIG_ROOTPATH /workspace/myfilesystem/target/ #define CONFIG_BOOTFILE uImage.rpxusb +#define CONFIG_HOSTNAME LITE_H1_DW #endif /* __CONFIG_H */

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[U-Boot-Users] [Patch][CVS] Fix a dummy pci prototype declaration
by Sam Song 12 Mar '06

12 Mar '06

Hi list, I happened to find the mistaken declaration on pci_cfgfunc_nothing in include/pci.h. Thanks for Wolfgang help me confirm that:-) Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Fix the mistaken declaration on pci_cfgfunc_nothing Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/pci.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/pci.h,v retrieving revision 1.3 diff -p -u -r1.3 pci.h --- include/pci.h 31 May 2003 18:35:28 -0000 1.3 +++ include/pci.h 19 Jun 2005 12:57:39 -0000 @@ -336,8 +336,8 @@ struct pci_config_table { unsigned long priv[3]; }; -extern void pci_cfgfunc_nothing(struct pci_controller* hose, pci_dev_t dev, - struct pci_config_table *); +extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev, + struct pci_config_table *); extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *);

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[U-Boot-Users] [Patch][CVS] Adjust CFG_CMD_ECHO as default ENV setting
by Sam Song 12 Mar '06

12 Mar '06

Hi list, Attached patch makes up a fix on CFG_CMD_ECHO. To avoid breaking exists boards, I adjust "echo" as a default command with aggreement of Wolfgang. For the sake of it's effect on all boards, pls check this one more carefully. About 12 boards related was fixed as well. Fix policy is that if CONFIG_CMD_DFL is used, CFG_CMD_ECHO shouldn't be redefined. Did I fix too much or not enough? Ideas pls... Sorry for the late. I just made my PC get CVS tree:-( CVS hasn't supported proxy. It brings me some troubles more or less. Thanks for all your concern, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Adjust echo as a defalut command. Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: README =================================================================== RCS file: /cvsroot/u-boot/u-boot/README,v retrieving revision 1.126 diff -p -u -r1.126 README --- README 3 May 2005 14:12:25 -0000 1.126 +++ README 19 Jun 2005 12:27:42 -0000 @@ -590,7 +590,7 @@ The following options need to be configu CFG_CMD_DIAG * Diagnostics CFG_CMD_DOC * Disk-On-Chip Support CFG_CMD_DTT * Digital Therm and Thermostat - CFG_CMD_ECHO * echo arguments + CFG_CMD_ECHO echo arguments CFG_CMD_EEPROM * EEPROM read/write support CFG_CMD_ELF * bootelf, bootvx CFG_CMD_ENV saveenv Index: common/command.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/common/command.c,v retrieving revision 1.18 diff -p -u -r1.18 command.c --- common/command.c 6 Apr 2005 00:04:17 -0000 1.18 +++ common/command.c 19 Jun 2005 12:27:51 -0000 @@ -42,6 +42,8 @@ U_BOOT_CMD( NULL ); +#if (CONFIG_COMMANDS & CFG_CMD_ECHO) + int do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -74,6 +76,8 @@ U_BOOT_CMD( " - echo args to console; \\c suppresses newline\n" ); +#endif /* CFG_CMD_ECHO */ + #ifdef CFG_HUSH_PARSER int Index: include/cmd_confdefs.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/cmd_confdefs.h,v retrieving revision 1.22 diff -p -u -r1.22 cmd_confdefs.h --- include/cmd_confdefs.h 1 Apr 2005 00:25:45 -0000 1.22 +++ include/cmd_confdefs.h 19 Jun 2005 12:27:53 -0000 @@ -110,7 +110,6 @@ CFG_CMD_DIAG | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_EXT2 | \ Index: include/configs/ISPAN.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ISPAN.h,v retrieving revision 1.2 diff -p -u -r1.2 ISPAN.h --- include/configs/ISPAN.h 31 Dec 2004 09:32:53 -0000 1.2 +++ include/configs/ISPAN.h 19 Jun 2005 12:27:55 -0000 @@ -108,7 +108,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/MIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/MIP405.h,v retrieving revision 1.10 diff -p -u -r1.10 MIP405.h --- include/configs/MIP405.h 23 Feb 2004 22:22:33 -0000 1.10 +++ include/configs/MIP405.h 19 Jun 2005 12:27:56 -0000 @@ -58,7 +58,6 @@ CFG_CMD_CACHE | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FAT | \ Index: include/configs/PIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/PIP405.h,v retrieving revision 1.8 diff -p -u -r1.8 PIP405.h --- include/configs/PIP405.h 20 Jan 2004 23:12:34 -0000 1.8 +++ include/configs/PIP405.h 19 Jun 2005 12:27:57 -0000 @@ -50,7 +50,6 @@ CFG_CMD_PCI | \ CFG_CMD_CACHE | \ CFG_CMD_IRQ | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO | \ Index: include/configs/RPXsuper.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXsuper.h,v retrieving revision 1.3 diff -p -u -r1.3 RPXsuper.h --- include/configs/RPXsuper.h 20 Jan 2004 23:12:34 -0000 1.3 +++ include/configs/RPXsuper.h 19 Jun 2005 12:27:58 -0000 @@ -154,7 +154,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_IMMAP | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO & \ ~CFG_CMD_KGDB ) Index: include/configs/Rattler.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/Rattler.h,v retrieving revision 1.2 diff -p -u -r1.2 Rattler.h --- include/configs/Rattler.h 5 May 2005 09:13:21 -0000 1.2 +++ include/configs/Rattler.h 19 Jun 2005 12:27:59 -0000 @@ -125,7 +125,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_JFFS2 \ | CFG_CMD_MII \ Index: include/configs/TQM5200.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/TQM5200.h,v retrieving revision 1.12 diff -p -u -r1.12 TQM5200.h --- include/configs/TQM5200.h 2 Apr 2005 22:37:55 -0000 1.12 +++ include/configs/TQM5200.h 19 Jun 2005 12:28:00 -0000 @@ -161,7 +161,6 @@ CFG_CMD_ASKENV | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_MII | \ Index: include/configs/ZPC1900.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ZPC1900.h,v retrieving revision 1.5 diff -p -u -r1.5 ZPC1900.h --- include/configs/ZPC1900.h 9 Oct 2004 23:33:43 -0000 1.5 +++ include/configs/ZPC1900.h 19 Jun 2005 12:28:01 -0000 @@ -112,7 +112,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/gw8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/gw8260.h,v retrieving revision 1.2 diff -p -u -r1.2 gw8260.h --- include/configs/gw8260.h 27 Jun 2003 21:32:46 -0000 1.2 +++ include/configs/gw8260.h 19 Jun 2005 12:28:02 -0000 @@ -305,7 +305,6 @@ CFG_CMD_BEDBUG | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_IMMAP | \ CFG_CMD_MII) Index: include/configs/ppmc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ppmc8260.h,v retrieving revision 1.4 diff -p -u -r1.4 ppmc8260.h --- include/configs/ppmc8260.h 25 Mar 2004 15:14:45 -0000 1.4 +++ include/configs/ppmc8260.h 19 Jun 2005 12:28:04 -0000 @@ -279,7 +279,6 @@ #define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_MEMTEST | \ CFG_CMD_MII | \ Index: include/configs/sacsng.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sacsng.h,v retrieving revision 1.7 diff -p -u -r1.7 sacsng.h --- include/configs/sacsng.h 25 Mar 2004 15:14:45 -0000 1.7 +++ include/configs/sacsng.h 19 Jun 2005 12:28:07 -0000 @@ -507,7 +507,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ @@ -520,7 +519,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ Index: include/configs/sbc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sbc8260.h,v retrieving revision 1.11 diff -p -u -r1.11 sbc8260.h --- include/configs/sbc8260.h 11 Jul 2004 21:49:43 -0000 1.11 +++ include/configs/sbc8260.h 19 Jun 2005 12:28:09 -0000 @@ -448,7 +448,6 @@ #ifdef CONFIG_ETHER_ON_FCC # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ @@ -459,7 +458,6 @@ #else # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ Index: include/configs/utx8245.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/utx8245.h,v retrieving revision 1.3 diff -p -u -r1.3 utx8245.h --- include/configs/utx8245.h 5 Jun 2003 15:40:53 -0000 1.3 +++ include/configs/utx8245.h 19 Jun 2005 12:28:10 -0000 @@ -91,7 +91,6 @@ protect on $(u-boot_startaddr) $(u-boot_ | CFG_CMD_ENV | CFG_CMD_CONSOLE \ | CFG_CMD_LOADS | CFG_CMD_LOADB \ | CFG_CMD_IMI | CFG_CMD_CACHE \ - | CFG_CMD_RUN | CFG_CMD_ECHO \ | CFG_CMD_REGINFO | CFG_CMD_NET\ | CFG_CMD_DHCP | CFG_CMD_I2C \ | CFG_CMD_DATE)

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[U-Boot-Users] Patch to cpu/mpc8260/speed.c
by KokHow Teh 12 Mar '06

12 Mar '06

Hi; I am using u-boot-1.1.2 and I am sending this minor patch to the cpu/mpc8260/speed.c file in view of MPC8280EC document which lays down how the PCIDF is calculated but not reflected correctly in the file. Index: cpu/mpc8260/speed.c =================================================================== RCS file: /usr/cvsroot/u-boot/cpu/mpc8260/speed.c,v retrieving revision 1.2 diff -u -b -B -r1.2 speed.c --- cpu/mpc8260/speed.c 28 Apr 2005 07:01:04 -0000 1.2 +++ cpu/mpc8260/speed.c 16 Jun 2005 04:35:12 -0000 @@ -202,11 +202,12 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; corecnf_t *cp; sccr = immap->im_clkrst.car_sccr; dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; + pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; scmr = immap->im_clkrst.car_scmr; corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; @@ -243,8 +244,8 @@ cp->vco_div, cp->freq_60x, cp->freq_core); printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, " - "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, - pllmf); + "plldf %ld, pllmf %ld, pcidf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, + pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", gd->vco_out, gd->scc_clk, gd->brg_clk); @@ -253,10 +254,18 @@ gd->cpu_clk, gd->cpm_clk, gd->bus_clk); if (sccr & SCCR_PCI_MODE) { - uint pci_div; + uint pci_div, pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) + pci_div *= 5; + else if (pcidf == 0xB) + pci_div *= 6; + else + pci_div *= (pcidf + 1); + } else + pci_div = pcidf + 1; printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); } Regards, TEH

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[U-Boot-Users] Patch to fix jffs2's lack of "data crc".
by Rick Bronson 12 Mar '06

12 Mar '06

1. A description of the bug: When jffs2 reads files it crc's the header but not the data. If the data is corrupt it can cause jffs2 to accept a chunk when it shouldn't. My patch adds in code to crc the data. 2. A CHANGELOG entry Add crc of data to jffs2 (in jffs2_1pass_build_lists()).

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[U-Boot-Users] parser problem?
by Andrew Dyer 12 Mar '06

12 Mar '06

I noticed on my board that if I enter a space and then return at the u-boot command line I get an exception. I using u-boot from cvs and the standard (not hush) parser on a mips platform. Does anybody else see this behaviour? -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] byteorder of image_header_t members?
by Steven Scholz 12 Mar '06

12 Mar '06

Hi there, if uint32_t members of image_header_t are stored in network byteorder, then all references of these members should use ntohl(), right? So should we fix this for instance: #~> grep "\->ih_magic" * cmd_autoscript.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { >>> cmd_bootm.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: (ntohl(hdr->ih_magic) != IH_MAGIC)) >>> cmd_doc.c: if (hdr->ih_magic == IH_MAGIC) { <<< >>> cmd_fdc.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_fpga.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_ide.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_nand.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_scsi.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_usb.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { -- Steven

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[U-Boot-Users] PATCH: Switch FADS family boards to new clock mechanism
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch switches MPC86xADS and MPC885ADS boards (FADS family) to new clock control mechanism (clocks are controlled by environment variable). Also, board revision detection is fixed. CHANGELOG - Switch MPC86xADS and MPC885ADS boards to use cpuclk environment variable to set clock -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: RPXlite configuration fixes
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes several bugs in and adds some features to long orphaned RPXlite port. CHANGELOG Fix RPXlite board configuration. - Use correct flash sector size - Use correct memory test end address - Add support for bzip2 compression - Various small fixes -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

3 16

[U-Boot-Users] PATCH: Numerous fixes for ZPC.1900 port
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes memory configuration for Zephyr Engineering ZPC.1900 board. CHANGELOG Memory configuration changes for ZPC.1900 board - Fix SDRAM timing on both local bus and 60x bus - Add support for second flash bank (SIMM) - Change boot flash base -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

2 1

[U-Boot-Users] PATCH: Add support for Adder boards with 16MB SDRAM
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch adds support for Analogue&Micro Adder boards with 16MB SDRAM (current configuration supports 8MB only). Also, added support for second FEC on Adder87x board. CHANGELOG - Add support for Adder boards with 16MB SDRAM - Add support for second FEC on Adder87x board -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

2 1

[U-Boot-Users] [PATCH] include top config.mk only after CROSS_COMPILE is defined
by Friedrich Lobenstock 12 Mar '06

12 Mar '06

Hi Wolfgang! During compiling I just spotted the fact that gccincdir := $(shell $(CC) -print-file-name=include) in the top config.mk does execute "gcc -print-file-name=include" instead of "m68k-elf-gcc ..." which I would expect as i compile for m68k. I think that this does not make much difference as the includes should mostly be the same, but for the sake of completeness I want to bring the attached patch to your attention. Description of the patch: * CROSS_COMPILE is referenced in the top 'config.mk' file therefore we need to include it in the main Makefile only after CROSS_COMPILE is defined This patch is against the u-boot-1.1.2. -- MfG / Regards Friedrich Lobenstock --- u-boot-1.1.2-org/Makefile 2004-12-19 10:58:11.000000000 +0100 +++ u-boot-1.1.2/Makefile 2005-06-01 18:35:44.000000000 +0200 @@ -46,9 +46,6 @@ # load ARCH, BOARD, and CPU configuration include include/config.mk export ARCH CPU BOARD VENDOR SOC -# load other configuration -include $(TOPDIR)/config.mk - ifndef CROSS_COMPILE ifeq ($(HOSTARCH),ppc) CROSS_COMPILE = @@ -86,6 +83,10 @@ export CROSS_COMPILE +# load other configuration +include $(TOPDIR)/config.mk + + ######################################################################### # U-Boot objects....order is important (i.e. start must be first)

3 3

[U-Boot-Users] [PATCH] soft_i2c/i2c_probe(): Perform reads instead of writes
by Peter Korsgaard 12 Mar '06

12 Mar '06

Hi, The following little patch makes the i2c_probe function use reads instead of writes to match the comment (broken in r1.2). * Patch by Peter Korsgaard, 26 May 2005: Use reads instead of writes for probe in soft_i2c. -- Bye, Peter Korsgaard

4 6

[U-Boot-Users] [PATCH] add OpenGear CM4008 board support
by Greg Ungerer 12 Mar '06

12 Mar '06

Hi All, Attached is a patch that adds support to u-boot for the OpenGear CM4008 8 port console manager board. It is built around the KS8695P CPU, with 8 serial ports, 16MB RAM, and 8MB NOR flash. This patch was originally generated against u-boot 1.1.1. Regards Greg diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/cm4008.c u-boot/board/cm4008/cm4008.c --- u-boot-1.1.1/board/cm4008/cm4008.c 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/cm4008.c 2005-05-04 22:47:00.021931928 +1000 @@ -0,0 +1,101 @@ +/* + * (C) Copyright 2005 + * Greg Ungerer, OpenGear Inc, <greg.ungerer(a)opengear.com> + * + * (C) Copyright 2002 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/platform.h> + +/* ------------------------------------------------------------------------- */ + +#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) +#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b) + +/* ------------------------------------------------------------------------- */ + + +/* + * Miscelaneous platform dependent initialisations + */ +int env_flash_cmdline (void) +{ + unsigned char *sp = (unsigned char *) 0x0201c020; + unsigned char *ep; + int len; + + /* Check if "erase" push button is depressed */ + if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) { + printf("### Entering network recovery mode...\n"); + setenv("bootargs", "console=ttyAM0,115200 mem=16M initrd=0x400000,6M root=/dev/ram0"); + setenv("bootcmd", "bootp 0x400000; gofsk 0x400000"); + setenv("bootdelay", "2"); + return 0; + } + + /* Check for flash based kernel boot args to use as default */ + for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++) + ; + + if ((len > 0) && (len <1024)) + setenv("bootargs", sp); + + return 0; +} + +int board_late_init (void) +{ + return 0; +} + + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* arch number of CM4008 */ + gd->bd->bi_arch_number = 624; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x00000100; + + /* power down all but port 0 on the switch */ + ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005); + ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005); + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return (0); +} diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/config.mk u-boot/board/cm4008/config.mk --- u-boot-1.1.1/board/cm4008/config.mk 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/config.mk 2005-01-11 00:56:42.000000000 +1000 @@ -0,0 +1 @@ +TEXT_BASE = 0x00f00000 diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/flash.c u-boot/board/cm4008/flash.c --- u-boot-1.1.1/board/cm4008/flash.c 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/flash.c 2005-01-17 00:55:13.000000000 +1000 @@ -0,0 +1,409 @@ +/* + * (C) Copyright 2005 + * Greg Ungerer, OpenGear Inc, greg.ungerer(a)opengear.com + * + * (C) Copyright 2001 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <linux/byteorder/swab.h> + + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +#define mb() __asm__ __volatile__ ("" : : : "memory") + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (unsigned char * addr, flash_info_t * info); +static int write_data (flash_info_t * info, ulong dest, unsigned char data); +static void flash_get_offsets (ulong base, flash_info_t * info); +void inline spin_wheel (void); + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + int i; + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + switch (i) { + case 0: + flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]); + flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); + break; + case 1: + /* ignore for now */ + flash_info[i].flash_id = FLASH_UNKNOWN; + break; + default: + panic ("configured too many flash banks!\n"); + break; + } + size += flash_info[i].size; + } + + /* Protect monitor and environment sectors + */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + _bss_start - _armboot_start, + &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t * info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) + return; + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + for (i = 0; i < info->sector_count; i++) { + info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); + info->protect[i] = 0; + } + } +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_INTEL: + printf ("INTEL "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_28F128J3A: + printf ("28F128J3A\n"); + break; + default: + printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", + info->start[i], info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + return; +} + +/* + * The following code cannot be run from FLASH! + */ +static ulong flash_get_size (unsigned char * addr, flash_info_t * info) +{ + volatile unsigned char value; + + /* Write auto select command: read Manufacturer ID */ + addr[0x5555] = 0xAA; + addr[0x2AAA] = 0x55; + addr[0x5555] = 0x90; + + mb (); + value = addr[0]; + + switch (value) { + + case (unsigned char)INTEL_MANUFACT: + info->flash_id = FLASH_MAN_INTEL; + break; + + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + addr[0] = 0xFF; /* restore read mode */ + return (0); /* no or unknown flash */ + } + + mb (); + value = addr[2]; /* device ID */ + + switch (value) { + + case (unsigned char)INTEL_ID_28F640J3A: + info->flash_id += FLASH_28F640J3A; + info->sector_count = 64; + info->size = 0x00800000; + break; /* => 8 MB */ + + case (unsigned char)INTEL_ID_28F128J3A: + info->flash_id += FLASH_28F128J3A; + info->sector_count = 128; + info->size = 0x01000000; + break; /* => 16 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + break; + } + + if (info->sector_count > CFG_MAX_FLASH_SECT) { + printf ("** ERROR: sector count %d > max (%d) **\n", + info->sector_count, CFG_MAX_FLASH_SECT); + info->sector_count = CFG_MAX_FLASH_SECT; + } + + addr[0] = 0xFF; /* restore read mode */ + + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + int flag, prot, sect; + ulong type; + int rcode = 0; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + type = (info->flash_id & FLASH_VENDMASK); + if ((type != FLASH_MAN_INTEL)) { + printf ("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) + printf ("- Warning: %d protected sectors will not be erased!\n", prot); + else + printf ("\n"); + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + volatile unsigned char *addr; + unsigned char status; + + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + addr = (volatile unsigned char *) (info->start[sect]); + *addr = 0x50; /* clear status register */ + *addr = 0x20; /* erase setup */ + *addr = 0xD0; /* erase confirm */ + + while (((status = *addr) & 0x80) != 0x80) { + if (get_timer_masked () > + CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + *addr = 0xB0; /* suspend erase */ + *addr = 0xFF; /* reset to read mode */ + rcode = 1; + break; + } + } + + *addr = 0x50; /* clear status register cmd */ + *addr = 0xFF; /* resest to read mode */ + + printf (" done\n"); + } + } + return rcode; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + * 4 - Flash not identified + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong cp, wp; + unsigned char data; + int count, i, l, rc, port_width; + + if (info->flash_id == FLASH_UNKNOWN) + return 4; + + wp = addr; + port_width = 1; + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + for (; i < port_width && cnt > 0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt == 0 && i < port_width; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + if ((rc = write_data (info, wp, data)) != 0) { + return (rc); + } + wp += port_width; + } + + /* + * handle word aligned part + */ + count = 0; + while (cnt >= port_width) { + data = 0; + for (i = 0; i < port_width; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_data (info, wp, data)) != 0) { + return (rc); + } + wp += port_width; + cnt -= port_width; + if (count++ > 0x800) { + spin_wheel (); + count = 0; + } + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i < port_width; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + return (write_data (info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word or halfword to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_data (flash_info_t * info, ulong dest, unsigned char data) +{ + volatile unsigned char *addr = (volatile unsigned char *) dest; + ulong status; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*addr & data) != data) { + printf ("not erased at %08lx (%lx)\n", (ulong) addr, + (ulong) * addr); + return (2); + } + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + *addr = 0x40; /* write setup */ + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait while polling the status register */ + while (((status = *addr) & 0x80) != 0x80) { + if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { + *addr = 0xFF; /* restore read mode */ + return (1); + } + } + + *addr = 0xFF; /* restore read mode */ + + return (0); +} + +void inline spin_wheel (void) +{ + static int p = 0; + static char w[] = "\\/-"; + + printf ("\010%c", w[p]); + (++p == 3) ? (p = 0) : 0; +} diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/Makefile u-boot/board/cm4008/Makefile --- u-boot-1.1.1/board/cm4008/Makefile 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/Makefile 2004-11-02 00:38:51.000000000 +1000 @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := cm4008.o flash.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/u-boot.lds u-boot/board/cm4008/u-boot.lds --- u-boot-1.1.1/board/cm4008/u-boot.lds 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/u-boot.lds 2004-11-05 00:27:11.000000000 +1000 @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/ks8695/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -Naur --exclude=CVS u-boot-1.1.1/include/configs/cm4008.h u-boot/include/configs/cm4008.h --- u-boot-1.1.1/include/configs/cm4008.h 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/include/configs/cm4008.h 2005-03-20 22:31:27.000000000 +1000 @@ -0,0 +1,127 @@ +/* + * (C) Copyright 2004 + * Greg Ungerer <greg.ungerer(a)opengear.com>. + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +#define CONFIG_INIT_CRITICAL /* undef for developing */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_KS8695 1 /* it is a KS8695 CPU */ +#define CONFIG_CM4008 1 /* it is an OpenGear CM4008 boad */ + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ + +/* + * select serial console configuration + */ +#define CFG_ENV_IS_NOWHERE +#define CONFIG_SERIAL1 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> +#undef CONFIG_COMMANDS +#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~(CFG_CMD_NONSTD | CFG_CMD_ENV)) + +#define CONFIG_BOOTDELAY 0 +#define CONFIG_BOOTARGS "mem=16M console=ttyAM0,115200" +#define CONFIG_BOOTCOMMAND "gofsk 0x02200000" + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00800000 /* memtest works on */ +#define CFG_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x00008000 /* default load address */ + +#define CFG_HZ (1000) /* 1ms resolution ticks */ + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ + +#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment */ + +#endif /* __CONFIG_H */ diff -Naur --exclude=CVS u-boot-1.1.1/Makefile u-boot/Makefile --- u-boot-1.1.1/Makefile 2004-04-25 09:23:30.000000000 +1000 +++ u-boot/Makefile 2005-03-12 23:06:59.000000000 +1000 @@ -1040,6 +1040,11 @@ VCMA9_config : unconfig @./mkconfig $(@:_config=) arm arm920t vcma9 mpl +cm4008_config : unconfig + @./mkconfig $(@:_config=) arm ks8695 cm4008 + +cm41xx_config : unconfig + @./mkconfig $(@:_config=) arm ks8695 cm41xx ######################################################################### ## S3C44B0 Systems

2 16

[U-Boot-Users] [PATCH] revised word alignment fixes for word aligned NS16550 UART
by jean-paul.saman＠philips.com 12 Mar '06

12 Mar '06

The patch is created against current CVS 2005 march 1st and fixes problems for boards that only have word access to the NS16550 UART. OBSOLETES: From: Jean-Paul Saman Date: 23-02-2005 Subject: [PATCH] word alignment fixes for word aligned NS16550 UART peripheral CHANGELOG: * Patch by Jean-Paul Saman, 23 Feb 2005 - include/ns16550.h Fixes alignement bug with UART that only supports word aligned access: removed "__attribute__ ((packed));" for "(CFG_NS16550_REG_SIZE == 4)" GCC generates bytes access when it encounters the packed attribute regardless if the struct is already word aligned for a platform. Peripherals that can only handle word aligned access won't work properly when accessed with byte access. The struct NS16550 is already word aligned for REG_SIZE = 4, so there is no need to packed the struct in that case. Kind greetings, Jean-Paul Saman Philips Semiconductors CTO/RTG Philips HighTech Campus, building WDB 3.29 Professor van den Holstlaan 4 5655 AA Eindhoven tel: +31 (0)40 27 45131

2 1

[U-Boot-Users] Suspect behaiviour if gatewayip not set
by Robin Gilks 12 Mar '06

12 Mar '06

Greetings Having played with netconsole a bit, I've observed that the current behaiviour of warning if gatewayip is not set and then using its value of zero when talking to outside the current subnet is somewhat suspect. The particular case of netconsole means that no error message is evident - it is trying to be sent the error down the ethernet connection that is being initiated with an arp(0.0.0.0)! I propose that the warning message stay but the target address is put into the arp so that a proxying router can reply to it rather then send out a nonsense arp request. CHANGELOGg: * Patch by Robin Gilks 23 December 2004 net.c - if gatewayip not set send arp request for destination IP not zero --- net.c.old 2004-10-26 12:46:58.000000000 +1300 +++ net.c 2004-12-23 09:42:46.000000000 +1300 @@ -207,8 +207,10 @@ (NetOurIP & NetOurSubnetMask)) { if (NetOurGatewayIP == 0) { puts ("## Warning: gatewayip needed but not set\n"); + NetArpWaitReplyIP = NetArpWaitPacketIP; + } else { + NetArpWaitReplyIP = NetOurGatewayIP; } - NetArpWaitReplyIP = NetOurGatewayIP; } else { NetArpWaitReplyIP = NetArpWaitPacketIP; } -- Robin Gilks Senior Design Engineer Phone: (+64)(3) 357 1569 Tait Electronics Fax : (+64)(3) 359 4632 PO Box 1645 Christchurch Email : robin.gilks(a)tait.co.nz New Zealand ======================================================================= This email, including any attachments, is only for the intended addressee. It is subject to copyright, is confidential and may be the subject of legal or other privilege, none of which is waived or lost by reason of this transmission. If the receiver is not the intended addressee, please accept our apologies, notify us by return, delete all copies and perform no other act on the email. Unfortunately, we cannot warrant that the email has not been altered or corrupted during transmission. =======================================================================

2 1

[U-Boot-Users] Patch for drivers/cfi_flash.c; properly detect write errors.
by Marcus Hall 28 Feb '06

28 Feb '06

Hello.. It seems that there is a minor problem in cfi_flash.c that prevents it from detecting that a flash write error has occurred. The first change in the attached patch is trivial, it just makes the strings output for a protected and a non-protected sector have the same length so the output looks prettier.. The second change is in flash_full_status_check(). We have just called flash_status_check() and then did a switch() on the vendor. For intel, we *should* check if there are any error bits if the previous call returned ERR_OK (Otherwise we will have output an error message in flash_status_check() already.) The original code would only check for error bits if flash_status_check() returns ERR_TIMEOUT. -- Marcus Hall marcushall(a)lucent.com *** ../u-boot-1.1.3/drivers/cfi_flash.c Sat Aug 13 17:53:35 2005 --- u-boot-1.1.3/drivers/cfi_flash.c Tue Aug 23 14:47:06 2005 *************** *** 502,508 **** if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", ! info->start[i], info->protect[i] ? " (RO) " : " "); #endif } putc ('\n'); --- 502,508 ---- if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", ! info->start[i], info->protect[i] ? " (RO)" : " "); #endif } putc ('\n'); *************** *** 718,724 **** switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: ! if ((retcode != ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, --- 718,724 ---- switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: ! if ((retcode == ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt,

2 1

[U-Boot-Users] [PATCH] cfi_flash.c patches
by Sangmoon Kim 28 Feb '06

28 Feb '06

Hi, The two patches attached are for drivers/cfi_flash.c. cfi_flash-protect.patch adds CFG_FLASH_PROTECT_CLEAR because for some flash memories(such as 28F320C3) all banks are protected after reset. cfi_flash-buffer.patch makes write_buff not to call flash_write_cfibuffer if buffer_size is1. Because for flash memories with buffer_size 1, buffer write is not supported. Regards, Sangmoon Kim

7 28

[U-Boot-Users] PATCH for drivers/cfi_flash.c
by Tolunay Orkun 28 Feb '06

28 Feb '06

This patch reworks the patch submitted on May 6, 2005: Ref: http://sourceforge.net/mailarchive/message.php?msg_id=11674386 This patch (cfi_flash.patch.tolunay) is prepared against current CVS version + Peter Pearse Patch dated March 15, 2005. Ref: http://sourceforge.net/mailarchive/message.php?msg_id=11164812 CHANGELOG: * Patch by Tolunay Orkun, 02 July 2005: Fixes for drivers/cfi_flash.c: - Fix wrong timeout value usage in flash_status_check() - Round write_tout up when converting to msec in flash_get_size() - Remove clearing flash status at the end of flash_write_cfibuffer() which sets Intel 28F640J3 flash back to command mode on CSB472 ~~~ In case Peter's Patch is rejected for some reason please apply the alternate patch (cfi_flash.patch.tolunay2) instead. It makes one additional fix that I had submitted in my original patch. CHANGELOG (Alternate) * Patch by Tolunay Orkun, 02 July 2005: Fixes for drivers/cfi_flash.c: - Fix wrong timeout value usage in flash_status_check() - Round write_tout up when converting to msec in flash_get_size() - Remove clearing flash status at the end of flash_write_cfibuffer() which sets Intel 28F640J3 flash back to command mode on CSB472 - Fix incorrect if condition in flash_full_status_check() Best regards, Tolunay Orkun Index: drivers/cfi_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/cfi_flash.c,v retrieving revision 1.18 diff -p -u -r1.18 cfi_flash.c --- drivers/cfi_flash.c 16 May 2005 15:23:24 -0000 1.18 +++ drivers/cfi_flash.c 2 Jul 2005 23:45:50 -0000 @@ -694,7 +694,7 @@ static int flash_status_check (flash_inf /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); @@ -1113,8 +1113,9 @@ static ulong flash_get_size (ulong base, info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ @@ -1281,7 +1282,6 @@ static int flash_write_cfibuffer (flash_ info->buffer_write_tout, "buffer write"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */ Index: drivers/cfi_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/cfi_flash.c,v retrieving revision 1.18 diff -p -u -r1.18 cfi_flash.c --- drivers/cfi_flash.c 16 May 2005 15:23:24 -0000 1.18 +++ drivers/cfi_flash.c 2 Jul 2005 23:52:15 -0000 @@ -694,7 +694,7 @@ static int flash_status_check (flash_inf /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); @@ -719,7 +719,7 @@ static int flash_full_status_check (flas case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: if ((retcode != ERR_OK) - && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { + || !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, info->start[sector]); @@ -1113,8 +1113,9 @@ static ulong flash_get_size (ulong base, info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ @@ -1281,7 +1282,6 @@ static int flash_write_cfibuffer (flash_ info->buffer_write_tout, "buffer write"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */

2 1

[U-Boot-Users] cfi_flash.c patch
by richard＠uclinux.net 28 Feb '06

28 Feb '06

Afternoon... Adding 2 spaces in cfi_flash.c makes the output of "flinfo" much more readable if there are protected and unprotected sectors: rick ---------------------------------------------------------------------------- CHANGELOG: * Patch by Richard Klingler, 09 Apr 2005: correct column layout of flinfo output. --- u-boot.orig/drivers/cfi_flash.c 2005-01-09 19:12:33.000000000 +0200 +++ u-boot/drivers/cfi_flash.c 2005-04-09 16:35:04.000000000 +0300 @@ -483,7 +483,7 @@ void flash_print_info (flash_info_t * in if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + info->start[i], info->protect[i] ? " (RO) " : " "); #endif } putc ('\n');

3 3

[U-Boot-Users] PATCH: minor bugs fix in cfi_driver.c
by Pierre AUBERT 28 Feb '06

28 Feb '06

Please find attached a little patch against current CVS. CHANGELOG: * Patch by Pierre Aubert 09 Dec 2004 - Fix flash information strings alignement in cfi_driver.c - Fix monitor size for flash protection in cfi_driver.c Best regards diff -pur u-boot/drivers/cfi_flash.c u-boot-paub/drivers/cfi_flash.c --- u-boot/drivers/cfi_flash.c 2004-10-11 01:27:35.000000000 +0200 +++ u-boot-paub/drivers/cfi_flash.c 2004-12-09 10:11:31.000000000 +0100 @@ -334,7 +334,7 @@ unsigned long flash_init (void) #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE, - CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, + CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); #endif @@ -477,7 +477,7 @@ void flash_print_info (flash_info_t * in if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + info->start[i], info->protect[i] ? " (RO)" : " "); #endif } putc ('\n');

2 1

[U-Boot-Users] MIPS LE build patch
by Matej Kupljen 17 Nov '05

17 Nov '05

Hi Wolfgang, You did not say anything about the new config.mk for the MIPS target which supports building BE and LE u-boot. This is the message: http://sourceforge.net/mailarchive/message.php?msg_id=12736269 What about the patch that can resolve problems with the binutils, so there is no need to patch the binutils. See: http://sourceforge.net/mailarchive/message.php?msg_id=10690757 BR, Matej

2 2

[U-Boot-Users] Error: start address not on sector boundary
by HS8JCV 14 Oct '05

14 Oct '05

Hi all I complie new u-boot for Flash SST39VF3201. It complete and can boot with u-boot. Follow that. boot 1.0 (Nov 25 2003 - 23:08:05) Uncompressing image... U-Boot 1.1.2 (Jun 25 2005 - 22:30:04) U-Boot code: 21F00000 -> 21F16F88 BSS: -> 21F1B640 RAM Configuration: Bank #0: 20000000 32 MB SST: SST39VF3201 (32Mbit) Flash: 4 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial U-Boot> after I setenv and saveenv It reponse "Error: start address not on sector boundary". U-Boot> setenv ethaddr 12:34:56:78:99:22 U-Boot> saveenv Saving Environment to Flash... Error: start address not on sector boundary and Flash Organizations follow this code. OrgDef OrgSST39VF3201[] = { { 1,16*1024 }, /* 1 * 16 kBytes sectors */ { 2,8*1024 }, /* 2 * 8 kBytes sectors */ { 1,32*1024 }, /* 1 * 32 kBytes sectors */ { 63,64*1024 }, /* 31 * 64 kBytes sectors */ }; Why it show error.? How to resolve this error.? Best Regard Supparerk

3 2

[U-Boot-Users] i.MX support for scb9328 cleaned up
by Konstantin Kletschke 12 Oct '05

12 Oct '05

I cleaned up board support for the scb9328 board. I did changes to the scb9328.h, it is very much more readable more. Many timings have been tuned, the system is much faster now. Also the board/scb9328/flash.c is removed, the patch will delete it! The cfi_flash.c is used now. If anybody is interested, it is at http://www.ludenkalle.de/u-boot-1.1.2-imx1/u-boot-1.1.2-imx1.diff It contains the code unlocking intel k3 devices. splitdiff output is at http://www.ludenkalle.de/u-boot-1.1.2-imx1/u-boot-1.1.2_* (directory viewing on http://www.ludenkalle.de/u-boot-1.1.2-imx1/ is allowed). May be I could get advice what still looks odd so I can fix it, so the stuff could be apllied. Or it can be applied as is... Regards, Konsti -- GPG KeyID EF62FCEF Fingerprint: 13C9 B16B 9844 EC15 CC2E A080 1E69 3FDA EF62 FCEF

3 12

[U-Boot-Users] (no subject)
by Andy Fleming 09 Oct '05

09 Oct '05

Here's a patch which puts the PHYs for the 3rd and 4th eTSECS into RGMII mode on the 8548 CDS.

2 1

[U-Boot-Users] NS7520 processor support patch
by Arthur Shipkowski 09 Oct '05

09 Oct '05

This patch adds support for the NS7520 processor as CONFIG_NETARM_NS7520. The patch adds its support to the current Net+ARM related files when possible. The sole exception is the Ethernet driver, because the Ethernet support is not like that on the prior Net+ARM parts nor like that on the NS9750. This patch has been tested against current CVS with MAKEALL arm. CHANGELOG: * Patch by Art Shipkowski, 12 May 2005: Implemented support for the NetSilicon NS7520 processor. Art Shipkowski Videon Central Software Engineer (814)235-1111 x307 art(a)videon-central.com

2 1

[U-Boot-Users] cfi_flash.c bug regarding intel k3 devices
by Konstantin Kletschke 09 Oct '05

09 Oct '05

Hi! cfi_flash.c handles intel k3 devices not correct, they power up with all sectors locked. Similair to flash_unlock_seq for amd devices, there must exist a flash_unlock_seq_intelk3 to do this for intel devices. --- u-boot-1.1.2/drivers/cfi_flash.c 2004-12-18 23:35:45.000000000 +0100 +++ u-boot-1.1.2-imx1/drivers/cfi_flash.c 2005-05-12 15:59:06.000000000 +0200 @@ -111,6 +111,9 @@ #define AMD_ADDR_START 0x555 #define AMD_ADDR_ACK 0x2AA +#define INTEL_CMD_UNLOCK_START 0x60 +#define INTEL_CMD_UNLOCK_ACK 0xD0 + #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 @@ -180,6 +183,7 @@ static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf); static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect); +static void flash_unlock_seq_intelk3 (flash_info_t * info, flash_sect_t sect); static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); @@ -239,7 +243,6 @@ } #endif - /*----------------------------------------------------------------------- * read a character at a port width address */ @@ -397,6 +400,7 @@ switch (info->vendor) { case CFI_CMDSET_INTEL_STANDARD: case CFI_CMDSET_INTEL_EXTENDED: + flash_unlock_seq_intelk3 (info, sect); flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS); flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE); flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM); @@ -858,6 +862,12 @@ flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK); } +static void flash_unlock_seq_intelk3 (flash_info_t * info, flash_sect_t sect) +{ + flash_write_cmd (info, sect, 0, INTEL_CMD_UNLOCK_START); + flash_write_cmd (info, sect, 0, INTEL_CMD_UNLOCK_ACK); +} + /*----------------------------------------------------------------------- */ static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) May be there must be added an "if" to filter intel k3 devices only, can somebody confirm this? Regards, Konsti -- GPG KeyID EF62FCEF Fingerprint: 13C9 B16B 9844 EC15 CC2E A080 1E69 3FDA EF62 FCEF

3 6

[U-Boot-Users] [PATCH] - OMAP242x fix for GP device booting.
by Woodruff, Richard 06 Oct '05

06 Oct '05

Hello, This patch fixes booting on OMAP242x GP devices, and it unlocks a GP SRAM suitable for DSS subsystem access. One other minor change is to the DDR's DLL count value when used in unlock mode. This change allows standard low speed operation for 100MHz DDR's. Regards, Richard W.

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[U-Boot-Users] [PATCH] bugfix in cmd_bootm.c when booting at91rm9200dk from dataflash
by Peter Menzebach 06 Oct '05

06 Oct '05

Attached a bugfix, when booting an u-boot image from serial dataflash of at91rm9200dk. In do_bootm, the variable addr was pointing to the virtual address in dataflash, not to the copy in RAM. Patch was submitted to the sourceforge patch area, too. Peter Menzebach

2 1

[U-Boot-Users] [PATCH] Add JFFS2 support for TRAB board
by Martin Krause 06 Oct '05

06 Oct '05

Subject: [PATCH] Add JFFS2 support for TRAB board --- CHANGELOG | 3 +++ include/configs/trab.h | 24 ++++++++++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-) 50a9addde722baec91dd20427f52502ea13e29a3 diff --git a/CHANGELOG b/CHANGELOG --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Add JFFS2 support for TRAB board + Patch by Martin Krause, 25 Aug 2005 + * Fixed Bamboo port to enable running without DDR-DIMM (Bamboo has also 64MB onboard DDR) Patch by Stefan Roese, 24 Aug 2005 diff --git a/include/configs/trab.h b/include/configs/trab.h --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -159,10 +159,11 @@ CFG_CMD_BSP | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_USB | \ CFG_CMD_FAT | \ + CFG_CMD_JFFS2 | \ CFG_CMD_NFS | \ - CFG_CMD_SNTP ) + CFG_CMD_SNTP | \ + CFG_CMD_USB ) #else #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CONFIG_COMMANDS_ADD_HWFLOW | \ @@ -172,10 +173,11 @@ CFG_CMD_BSP | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_USB | \ CFG_CMD_FAT | \ + CFG_CMD_JFFS2 | \ CFG_CMD_NFS | \ - CFG_CMD_SNTP ) + CFG_CMD_SNTP | \ + CFG_CMD_USB ) #endif /* moved up */ @@ -377,6 +379,20 @@ #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_MONITOR_LEN (256 << 10) +/* Dynamic MTD partition support */ +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "nor0=0" + +/* production flash layout */ +#define MTDPARTS_DEFAULT "mtdparts=0:32k(Firmware1)ro," \ + "16k(Env1)," \ + "16k(Env2)," \ + "320k(Firmware2)ro," \ + "896k(Kernel)," \ + "5376k(Root-FS)," \ + "1408k(JFFS2)," \ + "-(VFD)" + /*----------------------------------------------------------------------- * FLASH and environment organization */ TQ-Systems GmbH Mühlstraße 2, Gut Delling, 82229 Seefeld Tel. +49 (8153) 93 08-157, Fax +49 (8153) 93 08-7157 martin.krause(a)tqs.de www.tq-group.com

2 1

[U-Boot-Users] netconsole.c requires CONFIG_NET_MULTI?
by Marcus Hall 06 Oct '05

06 Oct '05

Is there any reason that netconsole.c requires CONFIG_NET_MULTI to run? I didn't see any dependency, and I removed the check and all seems good. Is there something that I am missing? Thanks! Marcus Hall marcushall(a)lucent.com *** ../u-boot-1.1.3/drivers/netconsole.c Sat Aug 13 17:53:35 2005 --- u-boot/drivers/netconsole.c Wed Aug 24 10:36:33 2005 *************** *** 29,38 **** #include <devices.h> #include <net.h> - #ifndef CONFIG_NET_MULTI - #error define CONFIG_NET_MULTI to use netconsole - #endif - static char input_buffer[512]; static int input_size = 0; /* char count in input buffer */ static int input_offset = 0; /* offset to valid chars in input buffer */ --- 29,34 ----

2 1

[U-Boot-Users] [PATCH 5/5][RESEND] CSB 637 board support
by Anders Larsen 06 Oct '05

06 Oct '05

Hi, the attached patch adds support for the Cogent csb637 board. Patch gzip'ed due to size. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Patch by Anders Larsen <alarsen(a)rea.de>, 2005-04-29 Add support for the Cogent csb637 board --- MAKEALL | 10 Makefile | 3 README | 15 board/csb637/Makefile | 46 + board/csb637/config.mk | 1 board/csb637/csb637.c | 83 + board/csb637/u-boot.lds | 56 + cpu/arm920t/at91rm9200/Makefile | 2 cpu/arm920t/at91rm9200/bcm5221.c | 232 ++++ include/asm-arm/mach-types.h | 2319 +++++++++++++++++++++++++++++++++++++- include/bcm5221.h | 104 ++ include/configs/csb637.h | 235 ++++ 12 files changed, 3058 insertions(+), 48 deletions(-)

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[U-Boot-Users] [PATCH 1/5][RESEND] CSB637 - add KB920x support
by Anders Larsen 06 Oct '05

06 Oct '05

Hi, the patch below adds support for the KwikByte KB920x boards. I resend it (refreshed) since it is touched by the next patch in the series. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Patch by Matt <james(a)kwikbyte.com>, 2005-04-27 Add support for the KwikByte KB920x boards --- MAKEALL | 8 +- Makefile | 3 + README | 8 +- board/kb9202/Makefile | 49 ++++++++++ board/kb9202/config.mk | 1 board/kb9202/kb9202.c | 66 +++++++++++++ board/kb9202/lxt972.c | 211 ++++++++++++++++++++++++++++++++++++++++++ board/kb9202/u-boot.lds | 56 +++++++++++ cpu/arm920t/at91rm9200/i2c.c | 4 + include/configs/kb9202.h | 173 ++++++++++++++++++++++++++++++++++ 10 files changed, 571 insertions(+), 8 deletions(-) diff --git a/MAKEALL b/MAKEALL --- a/MAKEALL +++ b/MAKEALL @@ -167,10 +167,10 @@ LIST_ARM7="B2 ep7312 evb4510 impa7 modne LIST_ARM9=" \ at91rm9200dk cmc_pu2 integratorcp integratorap \ - lpd7a400 mx1ads mx1fs2 omap1510inn \ - omap1610h2 omap1610inn omap730p2 scb9328 \ - smdk2400 smdk2410 trab VCMA9 \ - versatile voiceblue \ + kb9202 lpd7a400 mx1ads mx1fs2 \ + omap1510inn omap1610h2 omap1610inn omap730p2 \ + scb9328 smdk2400 smdk2410 trab \ + VCMA9 versatile voiceblue \ " ######################################################################### diff --git a/Makefile b/Makefile --- a/Makefile +++ b/Makefile @@ -1390,6 +1390,9 @@ integratorap_config : unconfig integratorcp_config : unconfig @./mkconfig $(@:_config=) arm arm926ejs integratorcp +kb9202_config : unconfig + @./mkconfig $(@:_config=) arm arm920t kb9202 NULL at91rm9200 + lpd7a400_config \ lpd7a404_config: unconfig @./mkconfig $(@:_config=) arm lh7a40x lpd7a40x diff --git a/README b/README --- a/README +++ b/README @@ -305,10 +305,10 @@ The following options need to be configu CONFIG_AT91RM9200DK, CONFIG_CERF250, CONFIG_DNP1110, CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, - CONFIG_LART, CONFIG_LPD7A400 CONFIG_LUBBOCK, - CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON, - CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410, - CONFIG_TRAB, CONFIG_VCMA9 + CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400 + CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, + CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, + CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9 MicroBlaze based boards: ------------------------ diff --git a/board/kb9202/Makefile b/board/kb9202/Makefile new file mode 100644 --- /dev/null +++ b/board/kb9202/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Adapted for KwikByte KB920x boards - APR2005 +# +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := kb9202.o lxt972.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/kb9202/config.mk b/board/kb9202/config.mk new file mode 100644 --- /dev/null +++ b/board/kb9202/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/kb9202/kb9202.c b/board/kb9202/kb9202.c new file mode 100644 --- /dev/null +++ b/board/kb9202/kb9202.c @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Adatped for KwikByte KB920x board from at91rm9200dk.c: 22APR2005 + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +void lowlevel_init(void) { + /* Required by assembly functions - do nothing */ +} + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + + gd->bd->bi_arch_number = MACH_TYPE_KB9200; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} diff --git a/board/kb9202/lxt972.c b/board/kb9202/lxt972.c new file mode 100644 --- /dev/null +++ b/board/kb9202/lxt972.c @@ -0,0 +1,211 @@ +/* + * + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Adatped for KwikByte KB920x board: 22APR2005 + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <lxt971a.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * lxt972_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +static unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short Id1, Id2; + + at91rm9200_EmacEnableMDIO (p_mac); + at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID1, &Id1); + at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID2, &Id2); + at91rm9200_EmacDisableMDIO (p_mac); + + if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0)) + return TRUE; + + return FALSE; +} + +/* + * Name: + * lxt972_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short stat1; + + if (!at91rm9200_EmacReadPhy (p_mac, PHY_LXT971_STAT2, &stat1)) + return FALSE; + + if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link status up? */ + return FALSE; + + if (stat1 & PHY_LXT971_STAT2_100BTX) { + + if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { + + /*set Emac for 100BaseTX and Full Duplex */ + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + } else { + + /*set Emac for 100BaseTX and Half Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + } + + return TRUE; + + } else { + + if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { + + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + } else { + + /*set MII for 10BaseT and Half Duplex */ + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + } + + return TRUE; + } + + return FALSE; +} + + +/* + * Name: + * lxt972_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac) +{ + UCHAR ret = TRUE; + unsigned short IntValue = 0; + + at91rm9200_EmacEnableMDIO (p_mac); + + if (!lxt972_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = lxt972_GetLinkSpeed (p_mac); + } + + /* Disable PHY Interrupts */ + at91rm9200_EmacWritePhy (p_mac, PHY_LXT971_INT_ENABLE, 0); + + at91rm9200_EmacDisableMDIO (p_mac); + + return (ret); +} + + +/* + * Name: + * lxt972_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * TRUE - if link status set successfully + * FALSE - if link status not set + */ +static UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short PhyAnalpar; + + /* Set lxt972 control register */ + if (!at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_CTRL, &value)) + return FALSE; + + /* Restart Auto_negotiation */ + value |= PHY_COMMON_CTRL_RES_AUTO; + if (!at91rm9200_EmacWritePhy (p_mac, PHY_COMMON_CTRL, &value)) + return FALSE; + + /*check AutoNegotiate complete */ + udelay (10000); + at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_STAT, &value); + if (!(value & PHY_COMMON_STAT_AN_COMP)) + return FALSE; + + return (lxt972_GetLinkSpeed (p_mac)); +} + + +/* + * Name: + * at91rm92000_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91rm92000_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = lxt972_InitPhy; + p_phyops->IsPhyConnected = lxt972_IsPhyConnected; + p_phyops->GetLinkSpeed = lxt972_GetLinkSpeed; + p_phyops->AutoNegotiate = lxt972_AutoNegotiate; +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/board/kb9202/u-boot.lds b/board/kb9202/u-boot.lds new file mode 100644 --- /dev/null +++ b/board/kb9202/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c --- a/cpu/arm920t/at91rm9200/i2c.c +++ b/cpu/arm920t/at91rm9200/i2c.c @@ -64,10 +64,14 @@ at91_xfer(unsigned char chip, unsigned i twi->TWI_MMR = (chip << 16) | (alen << 8) | ((rw == 1) ? AT91C_TWI_MREAD : 0); +#ifdef CONFIG_KB920x + twi->TWI_IADR = addr; +#else /* Set TWI Internal Address Register with first messages data field */ /* only one address byte is supported */ if (alen > 0) twi->TWI_IADR = addr & 0xff; +#endif length = len; buf = buffer; diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h new file mode 100644 --- /dev/null +++ b/include/configs/kb9202.h @@ -0,0 +1,173 @@ +/* + * Rick Bronson <rick(a)efn.org> + * + * Configuation settings for the AT91RM9200DK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Adatped for KwikByte KB920x board from at91rm9200dk.h: 22APR2005 + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +#define AT91C_MAIN_CLOCK 180000000 /* from 10 MHz crystal */ +#define AT91C_MASTER_CLOCK 60000000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ + +#define AT91_SLOW_CLOCK 32768 /* slow clock */ + +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ +/* Only define one of the following, based on board type */ +/* #define CONFIG_KB9200 1 KwikByte KB9202 board */ +/* #define CONFIG_KB9201 1 KwikByte KB9202 board */ +#define CONFIG_KB9202 1 /* KwikByte KB9202 board */ + +#define CONFIG_KB920x 1 /* Any KB920x board */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define USE_920T_MMU 1 + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT + +#define CFG_LONGHELP + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +#define CONFIG_BAUDRATE 115200 + +/* + * Hardware drivers + */ + +/* define one of these to choose the DBGU, USART0 or USART1 as console */ +#define CONFIG_DBGU +#undef CONFIG_USART0 +#undef CONFIG_USART1 + +#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ + +#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ENV_OVERWRITE 1 + +#define CONFIG_COMMANDS \ + ((CONFIG_CMD_DFL | \ + CFG_CMD_I2C | \ + CFG_CMD_PING | \ + CFG_CMD_DHCP ) & \ + ~(CFG_CMD_BDI | \ + CFG_CMD_FPGA | \ + CFG_CMD_MISC)) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ + +#define CFG_MEMTEST_START PHYS_SDRAM +#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - (512*1024) + +#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_RETRY_COUNT 20 + +#define CFG_FLASH_BASE 0x10000000 + +#ifdef CONFIG_KB9202 +#define PHYS_FLASH_SIZE 0x1000000 +#else +#define PHYS_FLASH_SIZE 0x200000 +#endif + +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 256 + +#define CONFIG_HARD_I2C + +#define CFG_ENV_IS_IN_EEPROM + +#ifdef CONFIG_KB9202 +#define CFG_ENV_OFFSET 0x3000 +#define CFG_ENV_SIZE 0x1000 +#else +#define CFG_ENV_OFFSET 0x1000 +#define CFG_ENV_SIZE 0x1000 +#endif +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 6 +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_SPEED 50000 +#define CFG_I2C_SLAVE 0 /* not used */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 + +#define CFG_LOAD_ADDR 0x21000000 /* default load address */ + +#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ + +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI + +#ifndef __ASSEMBLY__ +/*----------------------------------------------------------------------- + * Board specific extension for bd_info + * + * This structure is embedded in the global bd_info (bd_t) structure + * and can be used by the board specific code (eg board/...) + */ + +struct bd_info_ext { + /* helper variable for board environment handling + * + * env_crc_valid == 0 => uninitialised + * env_crc_valid > 0 => environment crc in flash is valid + * env_crc_valid < 0 => environment crc in flash is invalid + */ + int env_crc_valid; +}; +#endif + +#define CFG_HZ 1000 +#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ + /* AT91C_TC_TIMER_DIV1_CLOCK */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif

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[U-Boot-Users] [PATCH 4/5][RESEND] CSB637 - set asynchronous clock mode
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, the patch below selects AT91RM9200 asynchronous clock mode which improves the execution speed by a factor of ~4. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Patch by Anders Larsen <alarsen(a)rea.de>, 2005-05-03 Set AT91RM9200 asynchronous clocking mode --- cpu/arm920t/at91rm9200/lowlevel_init.S | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S --- a/cpu/arm920t/at91rm9200/lowlevel_init.S +++ b/cpu/arm920t/at91rm9200/lowlevel_init.S @@ -123,6 +123,11 @@ LoopOsc: cmp r2, r0 bne 2b + /* switch from FastBus to Asynchronous Clocking Mode */ + mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #0xC0000000 @ set bit 31 (iA) and 30 (nF) + mcr p15, 0, r0, c1, c0, 0 + /* everything is fine now */ mov pc, lr

2 2

[U-Boot-Users] [PATCH 3/5][RESEND] CSB637 - fix dm9161 PHY interrupt mask
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, the patch below fixes a bug in the dm9161 interrupt masking; a bit set /disables/ (masks) the interrupt. Furthermore, the PHY is explicitly (re)connected when auto- negotiation is started. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Patch by Anders Larsen <alarsen(a)rea.de>, 2005-04-29 Mask DM9161 interrupts correctly --- cpu/arm920t/at91rm9200/dm9161.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/cpu/arm920t/at91rm9200/dm9161.c b/cpu/arm920t/at91rm9200/dm9161.c --- a/cpu/arm920t/at91rm9200/dm9161.c +++ b/cpu/arm920t/at91rm9200/dm9161.c @@ -138,9 +138,9 @@ UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac) /* Disable PHY Interrupts */ at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue); - /* clear FDX, SPD, Link, INTR masks */ - IntValue &= ~(DM9161_FDX_MASK | DM9161_SPD_MASK | - DM9161_LINK_MASK | DM9161_INTR_MASK); + /* set FDX, SPD, Link, INTR masks */ + IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK | + DM9161_LINK_MASK | DM9161_INTR_MASK); at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue); at91rm9200_EmacDisableMDIO (p_mac); @@ -190,6 +190,7 @@ UCHAR dm9161_AutoNegotiate (AT91PS_EMAC return FALSE; /* Restart Auto_negotiation */ value |= DM9161_RESTART_AUTONEG; + value &= ~DM9161_ISOLATE; if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) return FALSE;

2 2

[U-Boot-Users] [PATCH 2/5][RESEND] CSB637 - move PHY code to common directory
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, the attached patch moves the at91rm9200 PHY code from the board specific directories into cpu/arm920t/at91rm9200 to avoid excess code duplication. Patch gzip'ed due to size. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Patch by Anders Larsen <alarsen(a)rea.de>, 2005-04-29 Move the AT91RM9200 PHY code into a common directory --- board/at91rm9200dk/Makefile | 2 board/at91rm9200dk/at91rm9200dk.c | 26 ++++ board/at91rm9200dk/dm9161.c | 243 ------------------------------------- board/cmc_pu2/Makefile | 2 board/cmc_pu2/cmc_pu2.c | 26 ++++ board/cmc_pu2/dm9161.c | 243 ------------------------------------- board/kb9202/Makefile | 2 board/kb9202/kb9202.c | 33 +++++ board/kb9202/lxt972.c | 211 -------------------------------- cpu/arm920t/at91rm9200/Makefile | 2 cpu/arm920t/at91rm9200/dm9161.c | 224 ++++++++++++++++++++++++++++++++++ cpu/arm920t/at91rm9200/ether.c | 2 cpu/arm920t/at91rm9200/lxt972.c | 192 +++++++++++++++++++++++++++++ include/at91rm9200_net.h | 2 include/dm9161.h | 8 + 15 files changed, 510 insertions(+), 708 deletions(-)

2 2

[U-Boot-Users] [PATCH 4/4] add csb637 (at91rm9200) support
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, this patch switches the at91rm9200 to asynchronous clocking mode after initialization (it would otherwise stay in FastBus mode which is the _slowest_ clock mode). This lets the core run at full speed when not doing bus accesses, increasing overall performance by a factor of four. The performance difference between asynchronous ans synchronous clocking mode as measured with nbench 2.2.2 disappears in the statistical noise; since asynchronous clocking mode imposes less restrictions on the clock frequencies it is the mode of choice. This patch replaces my similar patch from 2005-04-29. Changelog: * patch by Anders Larsen, 2005-05-03 set the at91rm9200 to asynchronous clocking mode Cheers Anders

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[U-Boot-Users] [PATCH 4/4] add csb637 (at91rm9200) support
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, this patch switches the at91rm9200 to synchronous clock mode after initialization (it would otherwise stay in FastBus mode which is the _slowest_ clock mode). This lets the core run at full speed when not doing bus accesses, increasing overall performance by a factor of four. Changelog: * patch by Anders Larsen, 2004-04-29 set the at91rm9200 clock to synchronous mode Cheers Anders

3 3

[U-Boot-Users] [PATCH 3/4] add csb637 (at91rm9200) support
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, this patch adds basic support for the Cogent csb637 AT91RM9200-based board. This implementation loads u-boot directly from NOR flash and does not support dataflash, CF, MMC. The on-board LCD controller is not supported (yet). The configuration matches the version I got, that is, 8MiB of CFI flash and 64MiB of SDRAM (the board is available with other memory options, too). Changelog: * patch by Anders Larsen, 2004-04-29 add support for Cogent csb637 Cheers Anders

2 1

[U-Boot-Users] [PATCH 2/4] add csb637 (at91rm9200) support
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, this patch fixes two bugs in dm9161.c; - in dm9161_InitPhy the interrupts were enabled instead of disabled - in dm9161_AutoNegotiate the PHY was disconnected from the wire and never re-connected (it seems this function is never called). Changelog: * patch by Anders Larsen, 2005-04-29 fix dm9161.c initialization Cheers Anders

2 1

[U-Boot-Users] [PATCH 1/4][RESEND] add csb637 (at91rm9200) support
by Anders Larsen 05 Oct '05

05 Oct '05

Hi, this patch moves the implementation of the DM9161 PHY from the board directories into cpu/arm920t/at91rm9200 (patch gzip'ed due to size) Rationale: The code in question (dm9161.c) is used by two boards, namely the at91rm9200dk and the cmc_pu2; the source file in question was present (identically) in both board-specific directories. I didn't move it into the global drivers directory, since the code is at91rm9200-specific. The patch patch also moves lxt972.c from board/kb9202 accordingly, see pending patch from 2005-04-27 "KB920x initial patch..." Changelog: * patch by Anders Larsen, 2005-04-29 move dm9161.c and lxt972.c into cpu/arm920t/at91rm9200 Cheers Anders

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[U-Boot-Users] [PATCH]: Fix partition initialization for SystemACE
by Stephen Williams 05 Oct '05

05 Oct '05

This patch seems to have gotten lost in the frey. It properly initializes the partition table structure for SystemACE devices. Without it, partition commands to not work properly. CHANGELOG * Patch by Stephen Williams, 28 April 2005 Properly intialize the device partition structure for SystemACE disks. -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep."

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[U-Boot-Users] patch submission info
by kb_admin 05 Oct '05

05 Oct '05

Greetings, Can someone please tell me the appropriate list to which I should submit the diffs/patch file for new board support? Thank you in advance, Matt kb9200_dev(a)kwikbyte.com

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[U-Boot-Users] PATCH: Point e500 IVPR at memory during code relocation
by Kylo Ginsberg 05 Oct '05

05 Oct '05

Hello, Please consider the following e500-specific patch, which reloads the IVPR to point at ram when code is relocated to ram. The IVPR assumes 64KB alignment, so code is copied to a 64K aligned region. * Patch by Kylo Ginsberg, 13 Apr 2005: - repoint IVPR at ram when code is relocated Thanks, Kylo

2 1

[U-Boot-Users] [PATCH] Differing gcc version ARM options
by Peter Pearse 04 Oct '05

04 Oct '05

Hi Attached a bzipped patch file to fix the problems with different ARM options in different gcc versions. Patched against CVS head 30th June 2005. Tested with MAKEALL arm. CHANGELOG: * Patch by Peter Pearse, 30th June 2005 - Import cc-option shell function from kernel - Use it to get the correct ARM gcc options for individual cpus Replaces my earlier "[PATCH] Differing gcc version ARM options". ------------------------------------------------------------------------- Peter Pearse ARM Ltd

2 1

[U-Boot-Users] [Patch] CFI flash for ARM supplied & supported development boards
by Peter Pearse 04 Oct '05

04 Oct '05

The attached patch has been tested for building with MAKEALL arm. Patched code has been tested to boot linux & save environment with - Integrator/CP CM926EJ-S - Versatile PB926EJ-S - Versatile AB926EJ-S. It provides CFI support for all ARM supplied ARM supported development boards i.e. http://www.arm.com/products/DevTools/VPB926EJ-S.html http://www.arm.com/products/DevTools/Applicationbaseboard.html http://www.arm.com/products/DevTools/IntegratorCP.html This protects against possible future flash component changes. Replaces the patch submitted on 2005-03-15. Patched against CVS head of 12 Apr 2005. > CHANGELOG: > * Patch by Peter Pearse, 12 Apr 2005 > Changes all ARM supplied development boards, supported by ARM, to use CFI flash. > Adds CFI support for the Versatile/AB926EJ-S. Please report any errors and/or omissions to ------------------------ Peter.Pearse(a)arm.com -------------------------

3 2

[U-Boot-Users] [Patch] Multicore patch for ARM supplied development boards.
by Peter Pearse 04 Oct '05

04 Oct '05

Hi Attached corrected multicore patch - somehow I lost the fact that the omap boards not yet migrated to using lowlevel_init. Please inform me of any defects found. CHANGELOG: * Patch by Peter Pearse, 12 Apr 2005 - add core module targets for integratorap, integratorcp - add ARM946E cpu support - remap SSRAM memory to 0x00000000 Notes ----- a) Provides targets for all supported Core Modules - targets are of the form integrator<type>_CM<id>_config Examples make integratorap_CM946E_S make integratorcp_CM920T_config b) Previous targets integegratorcp, integratorap retained. c) Tested to build with MAKEALL arm d) Tested to boot linux with - Integrator/CP CM920T - Integrator/CP CM926EJ-S - Versatile PB926EJ-S - both Integrator combinations boot in all three settings - Manually run U-Boot in ARM Boot Monitor - Auto boot U-Boot through ARM Boot Monitor - Auto boot direct into U-Boot e) Patched against head at 12 Apr 2005 f) Replaces the patch submitted on 11 Apr 2005 ------------------------ Peter.Pearse(a)arm.com -------------------------

3 2

[U-Boot-Users] [Patch]
by Peter Pearse 04 Oct '05

04 Oct '05

Hi Attached remade multicore patch to allow users to specify the core module fitted to their ARM supplied Integrator development board. Please inform me of any defects found. CHANGELOG: * Patch by Peter Pearse, 11 Apr 2005 - add core module targets for integratorap, integratorcp - add ARM946E cpu support - remap SSRAM memory to 0x00000000 Notes ----- a) Provides targets for all supported Core Modules - targets are of the form integrator<type>_CM<id>_config Examples make integratorap_CM946E_S make integratorcp_CM920T_config b) Previous targets integegratorcp, integratorap retained. c) Tested to build with MAKEALL arm d) Tested to boot linux with - Integrator/CP CM920T - Integrator/CP CM926EJ-S - Versatile PB926EJ-S - both Integrator combinations boot in all three settings - Manually run U-Boot in ARM Boot Monitor - Auto boot U-Boot through ARM Boot Monitor - Auto boot direct into U-Boot e) Patched against head at 11 Apr 2005 f) Replaces the patch submitted on 02 Feb 2005 ------------------------ Peter.Pearse(a)arm.com -------------------------

3 2

[U-Boot-Users] [PATCH] Vibren PXA255 IDP Support
by Cliff Brake 26 Sep '05

26 Sep '05

The following patch adds support for the Vibren (was Accelent) PXA255 IDP platform: ftp://bec-systems.com/pub/pxa255_idp/u-boot/uboot_pxa255-idp_2004-12-28.pat… Let me know if any issues. I also maintain arch mirrors of the U-boot CVS tree and my IDP tree if you happen to use arch. http://bec-systems.com/phpwiki/index.php/UbootNotes Cliff -- ======================= Cliff Brake http://bec-systems.com http://www.vibren.com

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[U-Boot-Users] [PATCH] AT91RM9200 - OHCI Patch
by Eric BENARD / Free 26 Sep '05

26 Sep '05

Hi, please find attached patches which add OHCI controller support for AT91RM9200 CPU. - diff-at91-ohci-1.patch : add files into cpu/arm920t/at91rm9200 - diff-at91-ohci-2.patch : add defines into include/asm-arm/arch-at91RM9200 - diff-mp2usb-ohci-partial : add usb configuration to MP2USB patch previously sent. CHANGELOG * Patch by Eric Benard, 07 Apr 2005: Add support for AT91RM9200 OHCI Controller. Sample session (on a PQFP AT91) : U-Boot 1.1.3 (Apr 7 2005 - 20:10:34) U-Boot code: 27F00000 -> 27F1C438 BSS: -> 27F2F204 RAM Configuration: Bank #0: 20000000 128 MB Flash: 16 MB In: serial Out: serial Err: serial Press SPACE to abort autoboot in 3 seconds => usb start (Re)start USB... USB: scanning bus for devices... 2 USB Devices found => usb scan Scan for storage device: scanning bus for storage devices... Device 0: Vendor: Kingston Prod.: DataTraveler II+ Rev: 1.13 Type: Removable Hard Disk Capacity: 491.5 MB = 0.4 GB (1006592 x 512) => usb info 1: Hub, USB Revision 1.10 - OHCI Root Hub - Class: Hub - PacketSize: 8 Configurations: 1 - Vendor: 0x0000 Product 0x0000 Version 0.0 Configuration: 1 - Interfaces: 1 Self Powered 0mA Interface: 0 - Alternate Settings 0, Endpoints: 1 - Class Hub - Endpoint 1 In Interrupt MaxPacket 2 Interval 255ms 2: Mass Storage, USB Revision 2.0 - Kingston DataTraveler II+ 5B51050206B4 - Class: (from Interface) Mass Storage - PacketSize: 64 Configurations: 1 - Vendor: 0x0951 Product 0x1601 Version 1.0 Configuration: 1 - Interfaces: 1 Bus Powered 200mA Interface: 0 - Alternate Settings 0, Endpoints: 3 - Class Mass Storage, Transp. SCSI, Bulk only - Endpoint 1 In Bulk MaxPacket 64 - Endpoint 2 Out Bulk MaxPacket 64 - Endpoint 3 In Interrupt MaxPacket 64 Interval 1ms => usb part print_part of 0 Partition Map for USB device 0 -- Partition Type: DOS Partition Start Sector Num Sectors Type 1 32 1006560 b print_part of 1 ## Unknown partition table print_part of 2 ## Unknown partition table print_part of 3 ## Unknown partition table print_part of 4 ## Unknown partition table Best regards Eric

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[U-Boot-Users] [PATCH] : updates include/asm-arm/mach-types.h
by Eric BENARD / Free 26 Sep '05

26 Sep '05

Hi, this patch updates mach-types.h to one generated on the 04/06/2005. Thanks Eric

2 1

[U-Boot-Users] [PATCH] Add Board MP2USB Board
by Eric BENARD / Free 26 Sep '05

26 Sep '05

Hi, same player shoot again, sorry for the bad previous patches. these patches add support for MP2USB board which is based on AT91RM9200 cpu. - diff-mp2usb-1.patch : adds board/mp2usb directory - diff-mp2usb-2.patch : adds include/configs/mp2usb.h - diff-mp2usb-3.patch : modify MAKEALL - diff-mp2usb-4.patch : modify Makefile CHANGELOG * Patch by Eric Benard, 07 Apr 2005: Add support for MP2USB board. Many thanks Best regards Eric

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[U-Boot-Users] board support for armadillo
by Rowel Atienza 26 Sep '05

26 Sep '05

Wolfgang, patch against current cvs snapshot for armadillo board support. rowel CHANGELOG: * Patch by Rowel Atienza April 6, 2005 Added board support for armadillo HT1070 =================================================================================== diff -purN u-boot/board/armadillo/armadillo.c u-boot-armadillo/board/armadillo/armadillo.c --- u-boot/board/armadillo/armadillo.c 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/armadillo.c 2005-04-06 09:30:54.000000000 +0800 @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2005 Rowel Atienza <rowel(a)diwalabs.com> + * Armadillo board HT1070 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <clps7111.h> + +/* ------------------------------------------------------------------------- */ + + +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Activate LED flasher */ + IO_LEDFLSH = 0x40; + + /* arch number MACH_TYPE_ARMADILLO - not official*/ + gd->bd->bi_arch_number = 83; + + /* location of boot parameters */ + gd->bd->bi_boot_params = 0xc0000100; + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return (0); +} diff -purN u-boot/board/armadillo/config.mk u-boot-armadillo/board/armadillo/config.mk --- u-boot/board/armadillo/config.mk 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/config.mk 2005-04-06 09:30:54.000000000 +0800 @@ -0,0 +1,29 @@ +# +# (C) Copyright 2000 +# Sysgo Real-Time Solutions, GmbH <www.elinos.com> +# Marius Groeger <mgroeger(a)sysgo.de> +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +#address where u-boot will be relocated +TEXT_BASE = 0xc0f80000 diff -purN u-boot/board/armadillo/flash.c u-boot-armadillo/board/armadillo/flash.c --- u-boot/board/armadillo/flash.c 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/flash.c 2005-04-06 09:30:54.000000000 +0800 @@ -0,0 +1,336 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2005 Rowel Atienza <rowel(a)diwalabs.com> + * Flash driver for armadillo board HT1070 + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#define FLASH_BANK_SIZE 0x400000 + +/*value used by hermit is 0x200*/ +/*document says sector size is either 64k in low mem reg and 8k in high mem reg*/ +#define MAIN_SECT_SIZE 0x10000 + +#define UNALIGNED_MASK (3) +#define FL_WORD(addr) (*(volatile unsigned short*)(addr)) +#define FLASH_TIMEOUT 20000000 + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + + +/*----------------------------------------------------------------------- + */ + +ulong flash_init (void) +{ + int i, j; + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_info[i].flash_id = + (FUJ_MANUFACT & FLASH_VENDMASK); + /*(INTEL_ID_28F128J3 & FLASH_TYPEMASK);*/ + flash_info[i].size = FLASH_BANK_SIZE; + flash_info[i].sector_count = CFG_MAX_FLASH_SECT; + memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + for (j = 0; j < flash_info[i].sector_count; j++) { + flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE; + } + size += flash_info[i].size; + } + + /* Protect monitor and environment sectors + */ + flash_protect ( FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + monitor_flash_len - 1, + &flash_info[0]); + + flash_protect ( FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (FUJ_MANUFACT & FLASH_VENDMASK): + printf ("Fujitsu: "); + break; + default: + printf ("Unknown Vendor "); + break; + } +/* + switch (info->flash_id & FLASH_TYPEMASK) { + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf ("28F128J3 (128Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + goto Done; + break; + } +*/ + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + + Done: +} + +/* + * * Loop until both write state machines complete. + * */ +static unsigned short flash_status_wait(unsigned long addr, unsigned short value) +{ + unsigned short status; + long timeout = FLASH_TIMEOUT; + while (((status = (FL_WORD(addr))) != value) && timeout > 0) { + timeout--; + } + return status; +} + + +/* + * Loop until the Write State machine is ready, then do a full error + * check. Clear status and leave the flash in Read Array mode; return + * 0 for no error, -1 for error. + */ +static int flash_status_full_check(unsigned long addr, unsigned short value1, unsigned short value2) +{ + unsigned short status1, status2; + + status1 = flash_status_wait(addr, value1); + status2 = flash_status_wait(addr + 2, value2); + return (status1 != value1 || status2 != value2) ? -1 : 0; +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + int flag, prot, sect; + int rc = ERR_OK; + unsigned long base; + unsigned long addr; + + if ((info->flash_id & FLASH_VENDMASK) != + (FUJ_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + flag = disable_interrupts (); + + printf ("Erasing %d sectors starting at sector %2d.\n This make take some time ... ", s_last-s_first, sect); + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + + addr = sect*MAIN_SECT_SIZE; + addr &= ~(unsigned long)UNALIGNED_MASK; /* word align */ + base = addr & 0xF0000000; + + FL_WORD(base + (0x555 << 1)) = 0xAA; + FL_WORD(base + (0x2AA << 1)) = 0x55; + FL_WORD(base + (0x555 << 1)) = 0x80; + FL_WORD(base + (0x555 << 1)) = 0xAA; + FL_WORD(base + (0x2AA << 1)) = 0x55; + FL_WORD(addr) = 0x30; + if(flash_status_full_check(addr, 0xFFFF, 0xFFFF)) return ERR_PROTECTED; + } + } + printf ("\nDone.\n"); + if (ctrlc ()) + printf ("User Interrupt!\n"); + + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (flag) + enable_interrupts (); + + return rc; +} + + + + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_word (flash_info_t * info, ulong dest, ushort data) +{ + int flag; + unsigned long base; + + /* Check if Flash is (sufficiently) erased + */ + if ((FL_WORD(dest) & data) != data) + return ERR_NOT_ERASED; + + /*if(dest & UNALIGNED_MASK) return ERR_ALIGN;*/ + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + flag = disable_interrupts (); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + base = dest & 0xF0000000; + FL_WORD(base + (0x555 << 1)) = 0xAA; + FL_WORD(base + (0x2AA << 1)) = 0x55; + FL_WORD(base + (0x555 << 1)) = 0xA0; + FL_WORD(dest) = data; + /*printf("writing 0x%p = 0x%x\n",dest,data);*/ + if( flash_status_wait(dest, data) != data ) return ERR_PROG_ERROR; + + if (flag) + enable_interrupts (); + + return ERR_OK; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong cp, wp; + ushort data; + int l; + int i, rc; + + wp = (addr & ~1); /* get lower word aligned address */ + printf("Writing %d short data to 0x%p from 0x%p.\n ",cnt,wp,src); + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + for (; i < 2 && cnt > 0; ++i) { + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; + } + for (; cnt == 0 && i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 2; + } + + /* + * handle word aligned part + */ + while (cnt >= 2) { + data = *((vu_short *) src); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 0) { + printf("\nDone.\n"); + return ERR_OK; + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); + --cnt; + } + for (; i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + return write_word (info, wp, data); +} diff -purN u-boot/board/armadillo/lowlevel_init.S u-boot-armadillo/board/armadillo/lowlevel_init.S --- u-boot/board/armadillo/lowlevel_init.S 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/lowlevel_init.S 2005-04-06 11:07:28.000000000 +0800 @@ -0,0 +1,66 @@ +/* + * Initialization stuff - taken from hermit + * (C) Copyright 2005 Rowel Atienza <rowel(a)diwalabs.com> + * Armadillo board HT1070 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <config.h> +#include <version.h> + + +/* some parameters for the board */ +/* setting up the memory */ +#define SRAM_START 0x60000000 +#define SRAM_SIZE 0x0000c000 + +.globl lowlevel_init +lowlevel_init: + mov r0, #0x70 /* 32-bit code + data, MMU mandatory */ + mcr p15, 0, r0, c1, c0, 0 /* MMU init */ + + mov r0, #0 + mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ + mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ + + mov r0, #0x80000000 /* I/O base */ + + mov r1, #0x6 /* CLKCTL_73 in SYSCON3 */ + add r2, r0, #0x2200 /* address of SYSCON3 in r2 */ + str r1, [r2] /* set clock speed to 73.728 MHz */ + + mov r1, #0x81 /* 64KHz DRAM refresh period */ + str r1, [r0, #0x200] /* set DRFPR */ + + mov r1, #0x500 /* permanent enable, 16bits wide */ + add r1, r1, #0x42 /* 128Mbit, CAS lat = 2 SDRAM */ + add r2, r0, #0x2300 /* load address in r2 */ + str r1, [r2] + + mov r1, #0x100 /* SDRAM refresh rate */ + add r2, r0, #0x2340 /* load address in r2 */ + str r1, [r2] + + mov sp, #SRAM_START /* init stack pointer */ + add sp, sp, #SRAM_SIZE + + /* everything is fine now */ + mov pc, lr diff -purN u-boot/board/armadillo/Makefile u-boot-armadillo/board/armadillo/Makefile --- u-boot/board/armadillo/Makefile 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/Makefile 2005-04-06 11:08:19.000000000 +0800 @@ -0,0 +1,48 @@ +# +# (C) Copyright 2002 +# Sysgo Real-Time Solutions, GmbH <www.elinos.com> +# Marius Groeger <mgroeger(a)sysgo.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := armadillo.o flash.o +SOBJS := lowlevel_init.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -purN u-boot/board/armadillo/u-boot.lds u-boot-armadillo/board/armadillo/u-boot.lds --- u-boot/board/armadillo/u-boot.lds 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/board/armadillo/u-boot.lds 2005-04-06 09:30:54.000000000 +0800 @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm720t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -purN u-boot/cpu/arm720t/cpu.c u-boot-armadillo/cpu/arm720t/cpu.c --- u-boot/cpu/arm720t/cpu.c 2005-04-04 01:23:39.000000000 +0800 +++ u-boot-armadillo/cpu/arm720t/cpu.c 2005-04-06 09:30:54.000000000 +0800 @@ -57,7 +57,7 @@ int cleanup_before_linux (void) * and we set the CPU-speed to 73 MHz - see start.S for details */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) unsigned long i; disable_interrupts (); @@ -95,7 +95,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag * */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1(void) { diff -purN u-boot/cpu/arm720t/interrupts.c u-boot-armadillo/cpu/arm720t/interrupts.c --- u-boot/cpu/arm720t/interrupts.c 2005-04-04 20:08:30.000000000 +0800 +++ u-boot-armadillo/cpu/arm720t/interrupts.c 2005-04-06 09:30:54.000000000 +0800 @@ -180,7 +180,7 @@ void do_fiq (struct pt_regs *pt_regs) void do_irq (struct pt_regs *pt_regs) { -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) printf ("interrupt request\n"); show_regs (pt_regs); bad_mode (); @@ -233,7 +233,7 @@ int interrupt_init (void) /* set timer 2 counter */ lastdec = TIMER_LOAD_VAL; -#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* disable all interrupts */ IO_INTMR1 = 0; @@ -301,7 +301,7 @@ int interrupt_init (void) */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) void reset_timer (void) { diff -purN u-boot/cpu/arm720t/serial.c u-boot-armadillo/cpu/arm720t/serial.c --- u-boot/cpu/arm720t/serial.c 2004-07-02 00:30:47.000000000 +0800 +++ u-boot-armadillo/cpu/arm720t/serial.c 2005-04-06 09:30:54.000000000 +0800 @@ -30,7 +30,7 @@ #include <common.h> -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) #include <clps7111.h> diff -purN u-boot/cpu/arm720t/start.S u-boot-armadillo/cpu/arm720t/start.S --- u-boot/cpu/arm720t/start.S 2005-04-04 20:44:14.000000000 +0800 +++ u-boot-armadillo/cpu/arm720t/start.S 2005-04-06 09:30:54.000000000 +0800 @@ -188,7 +188,7 @@ _start_armboot: .word start_armboot ************************************************************************* */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* Interupt-Controller base addresses */ INTMR1: .word 0x80000280 @ 32 bit size @@ -209,7 +209,7 @@ SYSCON3: .word 0x80002200 #endif cpu_init_crit: -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) /* * mask all IRQs by clearing all bits in the INTMRs @@ -495,7 +495,7 @@ fiq: #endif -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) .align 5 .globl reset_cpu reset_cpu: diff -purN u-boot/include/asm-arm/arch-arm720t/hardware.h u-boot-armadillo/include/asm-arm/arch-arm720t/hardware.h --- u-boot/include/asm-arm/arch-arm720t/hardware.h 2004-07-02 00:30:48.000000000 +0800 +++ u-boot-armadillo/include/asm-arm/arch-arm720t/hardware.h 2005-04-06 09:30:54.000000000 +0800 @@ -32,6 +32,8 @@ /* include IMPA7 specific hardware file if there was one */ #elif defined(CONFIG_EP7312) /* include EP7312 specific hardware file if there was one */ +#elif defined(CONFIG_ARMADILLO) +/* include armadillo specific hardware file if there was one */ #else #error No hardware file defined for this configuration #endif diff -purN u-boot/include/configs/armadillo.h u-boot-armadillo/include/configs/armadillo.h --- u-boot/include/configs/armadillo.h 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-armadillo/include/configs/armadillo.h 2005-04-06 11:38:47.000000000 +0800 @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2000 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * Configuation settings for the EP7312 board. + * + * Modified to work on Armadillo HT1070 ARM720T board + * (C) Copyright 2005 Rowel Atienza rowel(a)diwalabs.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +/*#define CONFIG_INIT_CRITICAL*/ /* undef for developing */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ +#define CONFIG_ARMADILLO 1 /* on an Armadillo Board */ +#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ +#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ + +#undef CONFIG_USE_IRQ /* don't need them anymore */ + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ +#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ +#define CS8900_BASE 0x20000300 /* armadillo board */ +#define CS8900_BUS16 1 +#undef CS8900_BUS32 + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE) + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL) /* | CFG_CMD_JFFS2)*/ + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "root=/dev/ram0 rootfstype=ext2 console=ttyAM0,115200" + +#define CONFIG_BOOTCOMMAND "bootm 40000 180000" + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "ARMADILLO # " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/ + +#define CFG_HZ 2000 /* decrementer freq: 2 kHz */ + + /* valid baudrates */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB armadillo SDRAM */ + +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ + +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */ +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#endif /* __CONFIG_H */ diff -purN u-boot/lib_arm/armlinux.c u-boot-armadillo/lib_arm/armlinux.c --- u-boot/lib_arm/armlinux.c 2005-01-12 08:15:17.000000000 +0800 +++ u-boot-armadillo/lib_arm/armlinux.c 2005-04-06 09:30:54.000000000 +0800 @@ -167,7 +167,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, i do_reset (cmdtp, flag, argc, argv); } -#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) +#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) || defined(CONFIG_ARMADILLO) /* *we need to copy the ramdisk to SRAM to let Linux boot */ diff -purN u-boot/MAINTAINERS u-boot-armadillo/MAINTAINERS --- u-boot/MAINTAINERS 2005-04-04 07:11:38.000000000 +0800 +++ u-boot-armadillo/MAINTAINERS 2005-04-06 09:30:54.000000000 +0800 @@ -342,6 +342,9 @@ Unknown / orphaned boards: # Board CPU # ######################################################################### +Rowel Atienza <rowel(a)diwalabs.com> + armadillo ARM720T + George G. Davis <gdavis(a)mvista.com> assabet SA1100 diff -purN u-boot/MAKEALL u-boot-armadillo/MAKEALL --- u-boot/MAKEALL 2005-04-06 08:04:17.000000000 +0800 +++ u-boot-armadillo/MAKEALL 2005-04-06 09:30:54.000000000 +0800 @@ -146,7 +146,7 @@ LIST_SA="assabet dnp1110 gcplus lart sha ## ARM7 Systems ######################################################################### -LIST_ARM7="B2 ep7312 evb4510 impa7 modnet50" +LIST_ARM7="armadillo B2 ep7312 evb4510 impa7 modnet50" ######################################################################### ## ARM9 Systems diff -purN u-boot/Makefile u-boot-armadillo/Makefile --- u-boot/Makefile 2005-04-06 08:04:17.000000000 +0800 +++ u-boot-armadillo/Makefile 2005-04-06 09:30:54.000000000 +0800 @@ -1406,6 +1406,9 @@ B2_config : unconfig ## ARM720T Systems ######################################################################### +armadillo_config: unconfig + @./mkconfig $(@:_config=) arm arm720t armadillo + ep7312_config : unconfig @./mkconfig $(@:_config=) arm arm720t ep7312 diff -purN u-boot/README u-boot-armadillo/README --- u-boot/README 2005-04-06 07:32:22.000000000 +0800 +++ u-boot-armadillo/README 2005-04-06 09:36:09.000000000 +0800 @@ -302,13 +302,13 @@ The following options need to be configu ARM based boards: ----------------- - CONFIG_AT91RM9200DK, CONFIG_CERF250, CONFIG_DNP1110, - CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, - CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, - CONFIG_LART, CONFIG_LPD7A400 CONFIG_LUBBOCK, - CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON, - CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410, - CONFIG_TRAB, CONFIG_VCMA9 + CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250, + CONFIG_DNP1110, CONFIG_EP7312, CONFIG_H2_OMAP1610, + CONFIG_HHP_CRADLE, CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, + CONFIG_INNOVATOROMAP1610, CONFIG_LART, CONFIG_LPD7A400 + CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, + CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, + CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9 MicroBlaze based boards: ------------------------

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[U-Boot-Users] [Patch] Second Eth enabled for MPC885ADS and MPC8272ADS
by Vitaly Bordug 26 Sep '05

26 Sep '05

Wolfgang, I agree that hardcoded MAC is not a good thing since it is not really required. I noticed that 8272ADS also has the only FCC - the relevant change for it is also included. Attached a patch which enables the second Ethernet address in MPC885ADS and MPC8272ADS configurations. Patch made against current CVS. CHANGELOG: * Second Ethernet address enabled in the configurations for MPC885ADS and MPC8272ADS. -- Sincerely, Vitaly ? include/configs/MPC8260ADS.my.h Index: include/configs/MPC8260ADS.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/MPC8260ADS.h,v retrieving revision 1.20 diff -p -u -r1.20 MPC8260ADS.h --- include/configs/MPC8260ADS.h 31 Dec 2004 09:32:53 -0000 1.20 +++ include/configs/MPC8260ADS.h 30 Mar 2005 15:36:06 -0000 @@ -390,4 +390,8 @@ #define CFG_RESET_ADDRESS 0x04400000 +#if CONFIG_ADSTYPE == CFG_8272ADS +#define CONFIG_HAS_ETH1 +#endif + #endif /* __CONFIG_H */ Index: include/configs/MPC885ADS.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/MPC885ADS.h,v retrieving revision 1.1 diff -p -u -r1.1 MPC885ADS.h --- include/configs/MPC885ADS.h 6 Jun 2004 21:35:08 -0000 1.1 +++ include/configs/MPC885ADS.h 30 Mar 2005 15:36:07 -0000 @@ -42,4 +42,6 @@ #define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */ #define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V) +#define CONFIG_HAS_ETH1 + #endif /* __CONFIG_H */

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[U-Boot-Users] [PATCH] Add client id and class id to dhcp options
by Kylo Ginsberg 26 Sep '05

26 Sep '05

This patch adds the client identifier and class identifier options to dhcp. The former permits consistent address assignment from servers that key off the client identifier; the latter aids in debugging. Index: net/bootp.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/net/bootp.c,v retrieving revision 1.14 diff -u -r1.14 bootp.c --- net/bootp.c 15 Apr 2004 21:48:49 -0000 1.14 +++ net/bootp.c 30 Mar 2005 01:14:17 -0000 @@ -378,8 +378,11 @@ * Initialize BOOTP extension fields in the request. */ #if (CONFIG_COMMANDS & CFG_CMD_DHCP) -static int DhcpExtended (u8 * e, int message_type, IPaddr_t ServerID, IPaddr_t RequestedIP) +static int DhcpExtended (u8 * e, int message_type, IPaddr_t ServerID, IPaddr_t RequestedIP, + char *EtherAddr) { + char *class_id = "U-boot"; + int len; u8 *start = e; u8 *cnt; @@ -404,6 +407,23 @@ *e++ = (576 - 312 + OPT_SIZE) >> 8; *e++ = (576 - 312 + OPT_SIZE) & 0xff; + *e++ = 61; /* Client Identifier, use the MAC */ + *e++ = 7; + *e++ = 1; + *e++ = EtherAddr[0]; + *e++ = EtherAddr[1]; + *e++ = EtherAddr[2]; + *e++ = EtherAddr[3]; + *e++ = EtherAddr[4]; + *e++ = EtherAddr[5]; + + *e++ = 60; /* Class Identifier */ + len = strlen(class_id); + *e++ = len; + /* don't use strcpy, we don't want the terminating 0 */ + memcpy(e, class_id, len); + e += len; + if (ServerID) { int tmp = ntohl (ServerID); @@ -671,7 +691,7 @@ /* Request additional information from the BOOTP/DHCP server */ #if (CONFIG_COMMANDS & CFG_CMD_DHCP) - ext_len = DhcpExtended(bp->bp_vend, DHCP_DISCOVER, 0, 0); + ext_len = DhcpExtended(bp->bp_vend, DHCP_DISCOVER, 0, 0, NetOurEther); #else ext_len = BootpExtended(bp->bp_vend); #endif /* CFG_CMD_DHCP */ @@ -817,7 +837,7 @@ * Copy options from OFFER packet if present */ NetCopyIP(&OfferedIP, &bp->bp_yiaddr); - extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP); + extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP, NetOurEther); pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen; iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen;

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[U-Boot-Users] [PATCH] iopset implemented for mpc8xx
by Eisenhut, Daniel (GE Healthcare) 26 Sep '05

26 Sep '05

Wolfgang, See attached patch file (Outlook will wrap lines if I inline it). This implements the iopset command for the mpc8xx. Current u-boot gives you the "not implemented yet" message. I got tired of adding in ioport changes and recompiling each time. Written and tested using u-boot-1.1.1 on an mpc860, but no changes have been made to the edited files since that tag. I couldn't figure out a simple clean solution since the 4 ioports are not all together, not all have the same number of registers, and some are ushorts while others are uints. So I gave up and did the brute force approach. If anyone else has a better solution, be my guest. Also noticed that the iopinfo displays ports A, C, and D incorrectly on the mpc8xx. Ports 1-15 and displayed under 16-31 headers. But I'll save that fix for another day... CHANGELOG: Implemented iopset command on mpc8xx Dan Eisenhut

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[U-Boot-Users] [PATCH] mii support for eepro100
by Gleb Natapov 26 Sep '05

26 Sep '05

Hello, Attached patch adds support for mii commands in eepro100 driver. CHANGELOG: Add support for MII in eepro100. -- Gleb.

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[U-Boot-Users] [Patch] CFI flash for ARM supplied & supported development boards
by Peter Pearse 26 Sep '05

26 Sep '05

Apologies for previous broken & oversized patches. The attached patch has been tested with MAKEALL arm. It provides CFI support for all ARM supplied ARM supported development boards i.e. http://www.arm.com/products/DevTools/VPB926EJ-S.html http://www.arm.com/products/DevTools/Applicationbaseboard.html http://www.arm.com/products/DevTools/IntegratorCP.html This protects against possible future flash component changes. > CHANGELOG: > * Patch by Peter Pearse, 14 Mar 2005 > Changes all ARM supplied development boards, supported by ARM, to use CFI flash. > Adds CFI support for the Versatile/AB926EJ-S. ------------------------------------------------------------------------- Peter Pearse ARM Ltd ------------------------ Peter.Pearse(a)arm.com -------------------------

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