July 2005 - U-Boot

[U-Boot-Users] SDRAM initialization sequence!
by junping feng 19 Jul '05

19 Jul '05

Hi,I have a little problem with the uboot startup,the BDI2000 can program u-boot.bin into FLASH .My board is like the board MPC8260ADS.CPU is ppc8250. Board information can print through serial interface after the first initialization of board now. But when it run to the function relocate_code(in the /cpu/mpc8260/start.s),it don't run continually. Through LED on the board ,I find that it stops at the code below: in_ram: My SDRAM is samsang k4s643232f-tc60, total 16MBytes,two chips.Each is organzied as 4*512K*32bits. The link address is the SDRAM data sheet! http://www.samsung.com/Products/Semiconductor/DRAM/SDRAM/SDRAMcomponent/64M… Please check whether my SDRAM initialization sequence is correct! Thanks in advance! /* init sdram dimm */ printf("Now init 60x sdram dimm ...\n"); ramaddr = (uchar *)CFG_SDRAM_BASE; memctl->memc_mptpr = 0x1900; memctl->memc_psrt = 0x10; immap->im_memctl.memc_or2 = 0xFF003080; immap->im_memctl.memc_br2 = 0x00000041; memctl->memc_psdmr = 0x2869a452; *ramaddr = c; memctl->memc_psdmr = 0x0869a452; for (i = 0; i < 8; i++) *ramaddr = c; memctl->memc_psdmr = 0x1869a452; *ramaddr = c; memctl->memc_psdmr = 0x4069a452; *ramaddr = c; __________________________________________________ 赶快注册雅虎超大容量免费邮箱? http://cn.mail.yahoo.com

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[U-Boot-Users] Mac Address communication to Linux
by Stage Iup - Fabrice & Frederic 19 Jul '05

19 Jul '05

Hi all i'm wondering something, i don't understand how can U-Boot communicate to an Embedded Linux. Can someone explain it to me please? -- With regards Frédéric Kwiatkowski -- IFOTEC Tél : 04 76 67 53 53

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RE: [U-Boot-Users] 2.6.12 with u-boot-1.1.2 on versatile
by Shakthi Kannan 19 Jul '05

19 Jul '05

Hi, Thanks for your replies Peter Pearse and Catalin Marinas. 1. --- Peter Pearse <Peter.Pearse(a)arm.com> wrote: > I use > > <U-Boot dir>/tools/mkimage -A arm -O linux -T kernel > -C none -a 0x7fc0 > -e 0x8000 -n u-linux -d <Kernel dir>/arch/arm/Image > u-linux Worked like a charm! I then had to copy the kernel to SDRAM 0x7fc0 and boot it using: cp 0x36000000 0x7fc0 <kernel_size> bootm 0x7fc0 2. I then tried to use the base.cramfs filesystem provided in arm.com: http://www.arm.com/linux/linux_download.html I used mkimage to append a header and flashed it at 0x36200000. Copied the same to SDRAM, 0x04000000. I changed the bootargs values using setenv, but, was not sure as to what values I need to give. setenv bootargs root=/dev/mtdblock0 mtdparts=versatile:0x65d050@0x04000000(cramfs) ip=none mem=128M console=ttyAMA0 video=vc:1-2clcdfb: I then tried to boot the kernel with the ramdisk: bootm 0x7fc0 0x04000000 I got the following output: http://www.shakthimaan.com/downloads/session.log Why is it trying the floppy? Is it trying the external memory card? I did check the boot log to the 2.4.19-rmk6 kernel provided in the NOR flash, and it loaded ramdisk drivers etc. I have used the config-versatile-pb file as provided in arm.com site, which does not have support for ramdisk by default. I did try enabling ramdisk support, but, I ended up with the same output as above. The ramdisk by default is 4 MB in the kernel, but base.cramfs given in arm.com is 6 MB. I even tried changing the ramdisk size in kernel CONFIG to 8 MB, but, no change in the output. I'd appreciate any feedback for the above, and any help in getting the filesystem mounted, so I can start playing with the shell. Board: Versatile-PB-ARM926EJ-S Cross_compiler: 3.4.3 Kernel: 2.6.12 Thanks again for your help, K Shakthi -- proudly anti-micro$oft ------------------------------------------------------------ Shakthi Kannan, MS Software Engineer, Specsoft (Hexaware Technologies) [E]: shaks(a)shakthimaan.com [M]: (91) 98407-87007 [W]: http://www.shakthimaan.com [L]: Chennai, India ------------------------------------------------------------ ____________________________________________________ Start your day with Yahoo! - make it your home page http://www.yahoo.com/r/hs

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[U-Boot-Users] Undelivered Mail Returned to Sender
by MAILER-DAEMON＠glw.com 19 Jul '05

19 Jul '05

This is the Postfix program at host mail.glw.com. I'm sorry to have to inform you that the message returned below could not be delivered to one or more destinations. For further assistance, please send mail to <postmaster> If you do so, please include this problem report. You can delete your own text from the message returned below. The Postfix program <".aarons"@glw.com>: host public/lmtp[public/lmtp] said: 550-Mailbox unknown. Either there is no mailbox associated with this 550-name or you do not have authorization to see it. 550 5.1.1 User unknown

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[U-Boot-Users] flash erase problem for Intel TE28F640J3C
by me 19 Jul '05

19 Jul '05

Hi, I have a ATMEL AT91RM9200 board with u-boot 1.1.2 and Intel TE28F640J3C flash. I can burn u-boot image to flash when the board is booted from internal ROM. But I can't erase sector 1 of the flash when it is booted from external flash. Strangely, other sectors can be erased sucessfully expect the sector 1 which u-boot image will be located. I am sure that I unportect the sector 1 and I still get an erase timeout. BTW, I use CFI driver for Intel flash. Someone, can give me some light ?? Eric 憟單祥蝬脰楝餉店隞颱

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[U-Boot-Users] Boot Delay 0 !!!
by Bharathi Subramanian 18 Jul '05

18 Jul '05

Hello All, Recently one of our unit's flash is got corrupted. Bcoz of that, one module is not started. So watch dog is rebooting the unit with-in 2 Sec after booting up. We thought of booting that unit in NFS and mount the JFFS Data partition for recovering the data file, address book, from that flash. Fortunately the boot delay is Zero. So we coun't do anything. Is there any trick to get the prompt ?? Bye :) -- Bharathi S

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[U-Boot-Users] [id]cache_status looks at wrong bit for MPC8560
by Murray.Jensen＠csiro.au 18 Jul '05

18 Jul '05

Hi, the [id]cache_status functions in the MPC85xx start.S code look at the wrong bit in the L1CSRn registers for the MPC8560. I have a patch for it, but I was wondering if the code is wrong for all 85xx processors, or just the 8560. Rather than me downloading all the 85xx user manuals and checking the register bits (as I am only interested in 8560) I thought I would post here instead. If anyone knows for certain the code is correct or otherwise for other 85xx processors, please let me know. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

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[U-Boot-Users] Configuration of u-boot for DM270 board
by Vipul Dashora 18 Jul '05

18 Jul '05

Hi All i m configuring u-boot bootloader for dm270. for this i have to initialize all memory settings for this i have done following settings in header file /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00900000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x01800000 /* 24 MB */ #define PHYS_FLASH_1 0x00100000 /* Flash Bank #1 */ #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ #define CFG_FLASH_BASE PHYS_FLASH_1 /*----------------------------------------------------------------------- * FLASH and environment organization */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ /* timeout values are in ticks */ #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000)/* Addr of Environment Sector */ #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ what r the various registers of dm270 that i have to initialize to configure flash and SDRAM in memsetup.S any help will be highly appreciated Thanks and Regards Vipul Dashora

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[U-Boot-Users] Re: how can I boot u-boot from 0x40000 in flash instead
by Ray Zhao 15 Jul '05

15 Jul '05

Thanks for the answers. I apologize that I did not make it clear. My board is a PXA270, it will, of cause, boot from 0x0000. But our customer has a tiny tiny boot loader which just generates some special data and save it in flash. (So they reserved the flash blocks from the 0x0000 to 0x40000.) Then it make PXA270 jump to the 0x40000 and run the real boot loader from there. We used blob and it works fine with kernel 2.4. But I am porting the new Linux 2.6 to the board and I decide to switch to u-boot. My understanding is that after the u-boot get the control, ie, the CPU jump to the first instruct of the u-boot code. u-boot will do some initialization on the CPU's cache to build a simple C environment and then copy part of itself from the flash into the cache and run from there to initial the memory controller etc. The code then will copy all (or the rest) the u-boot from the flash to the memory. My question is, in default, u-boot will copy itself from the 0x0000 (right?). How could I let it know that the u-boot is actually locates in the 0x40000. thanks, Ray > Ray Zhao wrote: > My board need keep the first 0x40000 flash for special purpose. Is it > easy to modify the u-boot to load itself from 0x40000 instead from the > 0x0000? Any help is appreciated. > > Ray > If your hardware supports it, probably. Otherwise no. Perhaps you > could tell us what your hardware is? >gvb >It's not U-Boot code what determines the boot address, but your >processor. So your real question is if you can teach your CPU to >start from a different reset vector. But sorry, we cannot answer this >here. >Best regards, >Wolfgang Denk -- --------------------------------------------------------------- Everything that has a beginning has an end.

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[U-Boot-Users] 7xx/74xx cache question
by Richard Danter 15 Jul '05

15 Jul '05

Hi all, Further progress on my port. I can now write to flash! I noticed in lib_ppc/board.c board_init_r() that on e500 CPU's the unlock_ram_in_cache() function is called. The 7xx/74xx also locks the init RAM in the dcache, but nowhere is it unlocked. I tried calling unlock_ram_in_cache() from my board's misc_init_r() function, but this crashes U-Boot. As an experiment, I left the cache locked, but then ran the "dcache off" command from the shell. If I do printenv before turning the dcache off it is all OK, if I do it after then it crashes. With my debugger I can see that the gd data structure is garbage when env_get_char_memory() is called. But I thought all data was copied to the main sys RAM. Is there something else I need to do before/after calling unlock_ram_in_cache() so I can use the D-Cache as normal? Thanks Rich PS Calling icache_enable() from misc_init_r() seems to work fine.

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[U-Boot-Users] initialize non-transparent PCI-to-PCI bridge
by CuiYW 15 Jul '05

15 Jul '05

hi, all I am porting U-boot to custom cpci board (MPC8540 based). On the board, we use Intel non-transparent PCI-to-PCI bridge 21555 to isolate MPC8540 from system, and MPC8540 is connected to secondary pci bus of 21555. Because no srom is connected to 21555, we configure 21555 using mpc8540 (implemented in U-boot). After system starts up, mpc8540 can find and access 21555, but system card can not find and configure it(such as BAR0, BAR1). If we delay booting of system card(boot mpc8540 firstly), system card can find and configure 21555 successfully. How to fixthe problem? Could you please give me a hand? Best Regards, Cui

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[U-Boot-Users] AMD29LV800T in 16bit mode x4 devices (64bit bus)
by Richard Danter 15 Jul '05

15 Jul '05

Hi, Is there a driver that supports this flash within U-Boot? I can't see one, but want to make sure I didn't miss it before I reinvent the wheel! Thanks Rich

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[U-Boot-Users] 440SP
by Morten Ebbell Hestnes 15 Jul '05

15 Jul '05

Hi, I want to use U-Boot as bootloader for a board using AMCC 440SP. A similar question where asked 2004-09-09. See bellow. Is there anyone how have ported U-Boot from 440GX to 440SP? Is there anyone working with U-Boot for a board using the PPC440SP? Thanks in advance, Morten *********************************************************** From: Stefan Roese <stefan@es...> RE: 440SP evaluation board 2004-09-09 00:25 Hi Gary, > We have received an AMCC(IBM)440SP evaluation board > that has PIBS > as > the bootloader. We would like to use U-Boot. Is there anyone > working with U-Boot on this particular evaluation board? Sorry, we are not. But a port for the PPC440GP/GX exists and it should be pretty easy to generate a 440SP port from here (OCOTEA is the PPC440GX eval board from IBM/AMCC). Best regards, Stefan ***********************************************************

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[U-Boot-Users] U-Boot+CSB637
by subramanian mohankumar 15 Jul '05

15 Jul '05

Hi I am new entry to U-Boot users list. We are using CSB637 board for our project. We plan to use U-Boot as bootloader since it is easy to port for our custom made board in future. Has anybody used u-boot for CSB637. If so what changes i need to do in u-boot code.please help. We tried to download u-boot1.1.2 to CSB637 board but it is not responding after message "Downlaoding U-boot...". please reply. regards Mohan ___________________________________________________________ Yahoo! Messenger - NEW crystal clear PC to PC calling worldwide with voicemail http://uk.messenger.yahoo.com

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[U-Boot-Users] Console garbage
by Will Haines 14 Jul '05

14 Jul '05

The recent u-boot port to the EP88xC is getting closer and closer to working, but I am still having the problem that there is no coherent console output. The code to print to console is executing, but I either get no output or garbage. When I step through with the BDI, I get error messages like: serial_puts (s=0x1 <Address 0x1 out of bounds>) at serial.c:200 I have changed static struct serial_device *serial_devices = NULL; static struct serial_device *serial_current = NULL; to static struct serial_device *serial_devices __attribute__ ((section (".data"))) / = NULL; static struct serial_device *serial_current __attribute__ ((section (".data"))) / = NULL; in common/serial.c as suggested by Yuli Barcohen, but to no avail. Does anyone have any other ideas? Thank you, everyone. Will Haines

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[U-Boot-Users] how can I boot u-boot from 0x40000 in flash instead of 0x0000
by Ray Zhao 14 Jul '05

14 Jul '05

My board need keep the first 0x40000 flash for special purpose. Is it easy to modify the u-boot to load itself from 0x40000 instead from the 0x0000? Any help is appreciated. Ray -- --------------------------------------------------------------- Everything that has a beginning has an end.

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[U-Boot-Users] Activating hush shell
by Andreas Engel 14 Jul '05

14 Jul '05

Hi, I'm trying to switch from the old shell to hush on a custom ARM board with u-boot 1.1.2 by just defining CFG_HUSH_PARSER and CFG_PROMPT_HUSH_PS2 in the config file. However, u-boot now doesn't really wait for user input, but endlessly prints its console prompt. Before digging deeper into the problem with a debugger: do I need to do anything else beyond just enabling hush? Andreas

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[U-Boot-Users] gdb debug!
by junping feng 14 Jul '05

14 Jul '05

Hi,I have some question on gdb-debugger with BDI2000.My board is like MPC8260ADS,ppcboot version is 2.0.0. I have programed ppcboot.bin into flash with BDI2000. After power on board ,information printed is below: PPCBoot 2.0.0 (Jul 10 2005 - 11:54:35) Rewin Tech :fengjunping && huangjianzhong MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 5x, VCO Div 2, 60x Bus Freq 20-60 , Core Freq 100-300 - dfbrg 0, corecnf 0x0b, busdf 5, cpmdf 1, plldf 0, pllmf 2 - vco_out 199999998, scc_clk 49999999, brg_clk 49999999 - cpu_clk 166666665, cpm_clk 99999999, bus_clk 33333333 CPU: MPC8260 (Rev 14, Mask unknown [immr=0x0064,k=0x002d]) at 166.666 MHz Board: Motorola MPC8260ADS I2C: ready DRAM: 16 MB (stop here!) Then ,cpu hangs! When I debug source code with gdb,I am troubled with the problem below: I don't know where is wrong! [root@localhost root]# cd ./ppcboot [root@localhost ppcboot]# ppc-linux-gdb ppcboot GNU gdb Yellow Dog Linux (5.2.1-4b_4) Copyright 2002 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type "show copying" to see the conditions. There is absolutely no warranty for GDB. Type "show warranty" for details. This GDB was configured as "--host=i386-redhat-linux --target=ppc-linux"... (gdb) target remote 192.168.1.108:2001 Remote debugging using 192.168.1.108:2001 0xff812568 in crc32 (crc=1165264316, buf=0xff845760 '?' <repeats 200 times>..., len=239780) at crc32.c:166 166 DO8(buf); (gdb) b cpu_init_f Breakpoint 1 at 0xff803be8: file cpu_init.c, line 118. (gdb) cont Continuing. warning: Cannot insert breakpoint 1: Error accessing memory address 0xff803be8: Unknown error 4294967295. (gdb) run The program being debugged has been started already. Start it from the beginning? (y or n) n Program not restarted. (gdb) c Continuing. Program received signal SIGSTOP, Stopped (signal). 0x00000800 in ?? () (gdb) Below is the configure file for BDI2000. ; bdiGDB configuration file for myppc8250 board ; ---------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00000000;clear MSR WM32 0xF00101A8 0xF0000000 ;IMMR : internal space @ 0xF0000000 WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF0010C80 0x00000001 ;SCCR : normal operation WM32 0xF0010000 0x02600000 ;SIUMCR ; init memory controller WM32 0xF0010104 0xFF800836 ;OR0: Boot Rom 8 WM32 0xF0010100 0xFF801001 ;BR0: Flash @0xFF800000 WM32 0xF0010114 0xFF003080 ;OR2: SDRAM 16M,each chip organzied 512K*32bits*4banks,total two chips. WM32 0xF0010110 0x00000041 ;BR2: SDRAM @0x0000000 ; init SDRAM Init (PPC bus) WM16 0xF0010184 0x1900 ;MPTPR WM8 0xF001019C 0x10 ;PSRT WM32 0xF0010190 0x2869A452 ;PSDMR: Precharge all banks WM8 0x00000000 0xFF ;Access SDRAM WM32 0xF0010190 0x0869A452 ;PSDMR: CBR Refresh WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM32 0xF0010190 0x1869A452 ;PSDMR: Mode Set WM8 0x00000000 0xFF ;Access SDRAM WM32 0xF0010190 0x4069A452 ;PSDMR: enable refresh, normal [TARGET] CPUTYPE 8260 ;the CPU type (603EV,750,8240,8260) JTAGCLOCK 0 ;use 16 MHz JTAG clock BOOTADDR 0xFFF00100 ;boot address used for start-up break ;WORKSPACE 0x00000000 ;workspace in target RAM for fast download BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT | GATEWAY) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoints ;STEPMODE HWBP ;TRACE or HWBP, HWPB uses a hardware breakpoint VECTOR CATCH ;catch unhandled exceptions DCACHE NOFLUSH ;data cache flushing (FLUSH | NOFLUSH) ;MMU XLAT ;translate effective to physical addressa ;PTBASE 0x000000F0 ;here is the pointer to the page table pointers POWERUP 5000 ;start delay after power-up detected in ms [HOST] IP 192.168.1.10 FILE /tftpboot/ppcboot FORMAT ELF LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 PROMPT MPC8260> ;new prompt for Telnet [FLASH] CHIPTYPE STRATAX16 ;Flash type (Intel E28F128J3A120) CHIPSIZE 0x800000 ;The size of one flash chip in bytes(16MB) BUSWIDTH 16 ;The width of the flash memory bus in bits ;WORKSPACE 0x00000000 ;workspace in SDRAM FORMAT BIN 0x0 FILE /tftpboot/ppcboot.bin ERASE 0xFF800000 CHIP ;erase whole chip [REGS] DMM1 0xF0000000 ;Internal Memory Map Base Address FILE reg8260.def Now, many people are still using ppcboot, please help me! Thanks in advance!! ___________________________________________________________ 雅虎免费G邮箱－No.1的防毒防垃圾超大邮箱 http://cn.mail.yahoo.com/?id=77072

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[U-Boot-Users] PCI PNP
by C.Gillan＠ecit.qub.ac.uk 14 Jul '05

14 Jul '05

I am trying to understand the role of the the hash define CONFIG_PCI_PNP in the context of building a card (8540 based) with a PCI interface such that it will sit inside an Intel PCI runing Linux. I see several examples of PCI usage in the U-Boot source code but its not clear whether any of these correspond to my situation. Recently the PN62 was mentioned on this list - it is such a card ? Where can I find more documentation on it ? My guess is that the PNP code is only used when the 8540 is acting as a "master" and configuring devices that are an "extension" to it on the PCI bus. In my case, I am expecting the Intel PC's motherboard BIOS to configure the PCI controller on my 8540. So, all I need to do, I think, is configure the ATMUs to map PCI addresses into 8540 Ocean addresses ? Thanks in advance, Charles Gillan Inst. for Elect. Comms and Info. Technology (ECIT) Queen's University Belfast N. Ireland BT3 9DT

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[U-Boot-Users] 2.6.12 with u-boot-1.1.2 on versatile
by Shakthi Kannan 14 Jul '05

14 Jul '05

Greetings! System details: Board: Versatile-ARM926Ej-S Cross-toolchain: 3.4.3 Linux kernel: 2.6.12 u-boot: 1.1.2 I have been able to successfully cross-compile u-boot, program it to NOR flash, and run it from the SDRAM. I have also cross-compiled the kernel to create the vmlinux file. I have used the config file provided in arm.com site for this board: http://www.arm.com/linux/linux_download.html I then created uImage using: # arm-linux-objcopy -O binary -R .note -R .comment -S vmlinux linux.bin # gzip linux.bin # ./mkimage -A arm -O linux -T kernel -C gzip -a 0xc0008000 -e 0xc0008000 -n "Linux Kernel Image" -d linux.bin.gz uImage The uImage is programmed at 0x36000000 in NOR flash. But, When I try to run the kernel from u-boot it hangs at the following: ## Booting image at 36000000 ... Image Name: Linux kernel image Image Type: ARM Linux Kernel Image (gzip compressed) Data Size: 1112206 Bytes = 1.1 MB Load Address: c0008000 Entry Point: c0008000 Uncompressing Kernel Image ... OK Starting kernel ... When I looked through the debugger (Lauterbach), it hung at a virtual address inside panic.c. If anyone can tell me as to what I am doing wrong, and how I can get the kernel up and running on this board, it will be really helpful. Thanks, K Shakthi -- proudly anti-micro$oft ------------------------------------------------------------ Shakthi Kannan, MS Software Engineer, Specsoft (Hexaware Technologies) [E]: shaks(a)shakthimaan.com [M]: (91) 98407-87007 [W]: http://www.shakthimaan.com [L]: Chennai, India ------------------------------------------------------------ __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] [PATCH] sinclude board specific make fragment
by Murray.Jensen＠csiro.au 14 Jul '05

14 Jul '05

This patch "sinclude"s (i.e. it is allowed not to exist) a make fragment from the board specific subdirectory, to allow a port to have board or platform specific targets (which may or may not be added to ALL var - see previous patch). for example - install, or in the case of my 8560 based board, I build a separate file image of the "boot page". Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

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[U-Boot-Users] CF 5282 fec.c
by Jens Scharsig 13 Jul '05

13 Jul '05

Hello I'm new on U-Boot and work on a MCF5282 port. I have modify the cvs source and U-Boot runs on my own MCF5282 board (I get a promt on serial line). But i get "Tx not ready" and "Tx Timeout" messages for each ethernet access. I discover the fec.c, and find out that only 10MBit haft duplex is use. Is there in implementation for full 100MBit use? regards Jens Scharsig Internet: http://www.bus-elektronik.de

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[U-Boot-Users] Problem about sdram initialization！
by junping feng 13 Jul '05

13 Jul '05

Hi,I have a little problem with the ppcboot startup,the BDI2000 can program ppcboot.bin into FLASH .Board information can print through serial interface after the first initialization of board now. But when it run to the function relocate_code(in the /cpu/mpc8260/start.s),it don't run continually. Through LED on the board ,I find that it stops at the code below: addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET mtlr r0 blr in_ram: The size of SDRAM size is 16MB,flash is 8MB,CPU is MPC8250,and my costum board is like the board MPC8260ADS.Othe infomation with my board is below: CLKIN:33M MPTPR:0x10 PSRT:0x1900 BR2(control SDRAM): 0x0000 0041 OR2:0xFF80 3080 PSDMR: 0x2869 A452 0x0869 A452 0x1869 A452 0x4069 A452 SIUMCR：0x0A20 0000 Please give me a hand. Thanks in advance! __________________________________________________ 赶快注册雅虎超大容量免费邮箱? http://cn.mail.yahoo.com

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RE: [U-Boot-Users] Problem about sdram initialization!
by Nghiem, Tien 13 Jul '05

13 Jul '05

Hi, The ppcboot is a very old version of the bootloader. Why don't you use the lastest version of the u-boot: u-boot-1.1.2? Tien -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of junping feng Sent: Wednesday, July 13, 2005 7:47 AM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] Problem about sdram initialization! Hi,I have a little problem with the ppcboot startup,the BDI2000 can program ppcboot.bin into FLASH .Board information can print through serial interface after the first initialization of board now. But when it run to the function relocate_code(in the /cpu/mpc8260/start.s),it don't run continually. Through LED on the board ,I find that it stops at the code below: addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET mtlr r0 blr in_ram: The size of SDRAM size is 16MB,flash is 8MB,CPU is MPC8250,and my costum board is like the board MPC8260ADS.Othe infomation with my board is below: CLKIN:33M MPTPR:0x10 PSRT:0x1900 BR2(control SDRAM): 0x0000 0041 OR2:0xFF80 3080 PSDMR: 0x2869 A452 0x0869 A452 0x1869 A452 0x4069 A452 SIUMCR：0x0A20 0000 Please give me a hand. Thanks in advance! __________________________________________________ 赶快注册雅虎超大容量免费邮箱? http://cn.mail.yahoo.com

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[U-Boot-Users] Side-effects when adding debug output
by "Häpe, Sebastian, HRD/AB" 13 Jul '05

13 Jul '05

Hi everybody! I have a little problem with u-boot and I don't know if I am the reason for it. It's the following: I want to add some extra output to the functions do_bootm and do_bootm_linux because I have problems with the kernel parameters. So i added a few printf's to the functions mentioned above. The things that happen now, I do not understand: Parameters of called functions (e.g. like the "int argc" parameter) suddenly change to random values. How could that be caused? Has it something to do with the stack (overflow or undefined behaviour when using "printf")? Or should I use any other function for creating output? (instead of using the BDI2k) Greetings, Sebastian

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