June 2005 - U-Boot

[U-Boot-Users] [PATCH] BUGFIX: serial setting for kgdb
by HoJin 06 Aug '05

06 Aug '05

Hi, KGDB_SMC_INDEX must be used as the index for brg_map, but it is used direclty. (compared with function serial_init) So it does not work properly. I have tested it and it works fine. I noticed the same problem with 'serial_scc.c', but I could not test it yet. Patch for only for 'serial_smc.c' is attached. Index: cpu/mpc8260/serial_smc.c =================================================================== --- cpu/mpc8260/serial_smc.c (revision 65) +++ cpu/mpc8260/serial_smc.c (working copy) @@ -360,10 +360,10 @@ /* Set up the baud rate generator. */ #if defined(CONFIG_KGDB_USE_EXTC) - m8260_cpm_extcbrg(KGDB_SMC_INDEX, speed, + m8260_cpm_extcbrg(brg_map[KGDB_SMC_INDEX], speed, CONFIG_KGDB_EXTC_RATE, CONFIG_KGDB_EXTC_PINSEL); #else - m8260_cpm_setbrg(KGDB_SMC_INDEX, speed); + m8260_cpm_setbrg(brg_map[KGDB_SMC_INDEX], speed); #endif /* Make the first buffer the only buffer. -- Hojin

2 1

[U-Boot-Users] [PATCH] MII help text formatting fix
by Cory Tusar 06 Aug '05

06 Aug '05

Attached is a patch fixing a minor glitch in the 'mii help' text formatting. Picky, picky, I know... Patch was generated against current CVS sources. CHANGELOG: * Patch by Cory Tusar, 10 Dec 2004: Fixed 'mii help' text formatting. -Cory -- Cory T. Tusar Embedded Systems Engineer Videon Central, Inc. 2171 Sandy Drive State College, PA 16801 (814) 235-1111 x316 (814) 235-1118 fax "Debugging is twice as hard as writing the code in the first place. Therefore, if you write the code as cleverly as possible, you are, by definition, not smart enough to debug it." --Brian W. Kernighan Index: common/cmd_mii.c =================================================================== RCS file: /home/cvs/u-boot/common/cmd_mii.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -r1.1.1.1 -r1.2 --- common/cmd_mii.c 7 Dec 2004 14:49:03 -0000 1.1.1.1 +++ common/cmd_mii.c 8 Dec 2004 17:42:39 -0000 1.2 @@ -549,7 +549,7 @@ U_BOOT_CMD( mii, 5, 1, do_mii, "mii - MII utility commands\n", - "info <addr> - display MII PHY info\n" + "info <addr> - display MII PHY info\n" "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n" "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n" "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"

2 1

[U-Boot-Users] [Patch] bugfix:return value of NFS command
by Hiroshi Ito 06 Aug '05

06 Aug '05

Hello, 1.nfs command return code is depend on umount-all, but not state of downloading. 2.When fail to write flash, it doesn't change state to umount example1: ---nfs server--- [mldbox]# ls -l u-boot.bin ---------- 1 root root 204048 Dec 11 02:06 u-boot.bin --- u-boot --- # if nfs 80400000 192.168.3.98:/usr/src/mldbox/u-boot.bin; then echo ok; else echo error; fi Trying i82559#0 Using i82559#0 device File transfer via NFS from server 192.168.3.98; our IP address is 192.168.3.200 Filename '/usr/src/mldbox/u-boot.bin'. Load address: 0x80400000 Loading: * done ok <= Wrong!! example2: [root@tv mldbox]# rm u-boot.bin rm: remove regular file `u-boot.bin'? y [root@tv mldbox]# # if nfs 80400000 192.168.3.98:/usr/src/mldbox/u-boot.bin; then echo ok; else echo error; fi Trying i82559#0 Using i82559#0 device File transfer via NFS from server 192.168.3.98; our IP address is 192.168.3.200 Filename '/usr/src/mldbox/u-boot.bin'. Load address: 0x80400000 Loading: *** ERROR: File lookup fail done ok <= Wrong!! # attached patch fixes these problems. patch is for current CVS. -------- Hiroshi Ito Media Lab. Inc., URL http://www.mlb.co.jp ( Sorry, Japanese only. ) TEL +81-3-5294-7255 FAX +81-3-5294-7256

3 2

[U-Boot-Users] SCSI support for MIB405 board
by Wolfgang Denk 04 Aug '05

04 Aug '05

Dear Denis, can you tell me something about the SCSI support in the current versions of U-Boot? It seems the MIB405 board (maintained by you) has SCSI support enabled, but the whole code in common/cmd_scsi.c seemd to be unused - for example, there is no caller of do_scsi() or do_scsiboot() anywhere in the whole source tree? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de In general, they do what you want, unless you want consistency. - Larry Wall in the perl man page

2 4

[U-Boot-Users] [Patch] default filename of tftp and nfs
by Hiroshi Ito 04 Aug '05

04 Aug '05

Hello, default filename of tftp and nfs has different value between little endian machine and big one. This patch fixes endian problem. Patch is for current cvs. -------- Hiroshi Ito Media Lab. Inc., URL http://www.mlb.co.jp ( Sorry, Japanese only. ) TEL +81-3-5294-7255 FAX +81-3-5294-7256

2 2

[U-Boot-Users] u-boot 1.1.1 and USB mass storage devices
by Shannon Holland 03 Aug '05

03 Aug '05

Hello, We are using u-boot on a Samsung S3C2410 based board and have USB mostly working using the arm920t USB driver. I say mostly working as some mass storage devices work fine, but most do not. Typically the behavior we see when they don't work is a "usb reset" reports the correct number of devices, a "usb tree" will return the correct device tree but "usb scan" will typically return a lot of CLI:TIMEOUT errors and seemingly never return. Sometimes it is able to find the storage device, but reading from it (it has a FAT16 filesystem) will return similar errors. I'm curious if these are known problems or likely to be something in the way we have (or have not) set up usb? Might anyone have some recommendations as to where to start looking? Thanks for any help! Shannon

5 8

[U-Boot-Users] [PATCH] sinclude board specific make fragment
by Murray.Jensen＠csiro.au 14 Jul '05

14 Jul '05

This patch "sinclude"s (i.e. it is allowed not to exist) a make fragment from the board specific subdirectory, to allow a port to have board or platform specific targets (which may or may not be added to ALL var - see previous patch). for example - install, or in the case of my 8560 based board, I build a separate file image of the "boot page". Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 6

[U-Boot-Users] EMAC2 & EMAC3 operation on PPC 440GX
by David Grab 12 Jul '05

12 Jul '05

Hello, as mentioned before i´m using two Marvel 88E1111 PHY on my PPC440GX Board. They are configured as a RGMII to copper interface for use with EMAC 2 & 3. So now i´m in trouble with the configuration of the network. After booting i set with "setenv ethact ppc_440x_eth2" EMAC2 for networking. After that i try a "ping" to know if network is working. Reading the speed and duplex from PHY works, but after that i got in an endless loop. I figured out, that no interrupt is recognized and in 440gx_enet.c in ppc_440x_eth_init the default configuration of the interrupt handler is for ETH0: irq_install_handler (VECNUM_EWU0 + (hw_p->devnum * 2), (interrupt_handler_t *) enetInt, dev); irq_install_handler (VECNUM_ETH0 + (hw_p->devnum * 2), (interrupt_handler_t *) enetInt, dev); so i changed it as following... irq_install_handler (VECNUM_EWU2 + (hw_p->devnum * 2), (interrupt_handler_t *) enetInt, dev); irq_install_handler (VECNUM_ETH2 + (hw_p->devnum * 2), (interrupt_handler_t *) enetInt, dev); and added in vecnum.h these lines: #define VECNUM_ETH2 (64 + 0) /* Ethernet 0 interrupt status */ #define VECNUM_EWU2 (64 + 1) /* Ethernet 0 wakeup */ But this didn´t solve the problem. Actually i also couldn´t get the TxCLK work on my RGMII Bridge and i don´t know why. The devices are configured as 100 MBit RGMII and receiving packets from network seems to be functioning (EMAC_OCRX Register increments rapidly). I would be appreciated if someone could give me a tip, what i have forgot to do. Greets, David

4 5

[U-Boot-Users] cfi_flash is now working with 64 bit port width
by Yusuf Ibrahim Ozkok 02 Jul '05

02 Jul '05

Hi, I have resolved my problem with cfi_flash driver. I would like to share what I have learned during my struggle with cfi_flash driver. The posts for that problem; http://sourceforge.net/mailarchive/message.php?msg_id=11994639 http://sourceforge.net/mailarchive/message.php?msg_id=12058552 What caused the problem and how is it solved: Flash chips in my board are connected to 64 bit data bus. And the problem is simply about writing 64 bit data at once. cfi_flash driver used "unsigned long long" variables for 64 bit data and write them to the bus simply using long long pointers (For me that is a bug. And I would like to release a patch for it). Any integer definition (like int, long, long long etc.) makes gcc to use 32 bit registers of the cpu (for 32 bit ppc's). Long long is 64 bit on the memory that is true, but transfering a long long requires two cycles. To write a 64 bit data at once we have to use floating point registers. A way of using these registers in C is to define the variables as "double". But somehow defining double didn't work in u-boot or with my ppc_82xx-gcc compiler (eldk's compiler). An other way is to use assembly floating point instructions but double precision forms. Such as "lfd" and "strfd" commands for ppc have to be used. Jerry Van Baren had warned me previously but I couldn't make sense with his suggestions at the moment. What make me confused that writing flash commands from u-boot shell by using mw.l command was working for protect and erase operations. Since mw.l makes 32 bit bus transaction, for example a 0x60606060 command was beeing recognized by all the four flash chips. On the other way a 0x00600060 command is caused failure (I had expected that it will work two out of four flash chips). Now when I solved the problem by using floating point registers, I understood Jerry's suggestions exactly! You can reach his post by the link. (http://sourceforge.net/mailarchive/message.php?msg_id=11994640) But I still can not solve the magic that while sending 0x60606060 by mw.l command works but 0x00600060 not! Lessons: So lesson-1: if hardware people gives you a 64 bit bus, use double or directly asm floating point instructions. I think cfi_driver works with the boards that the flash chips are selected by chip select signals for each 32 bit portion of the data bus. In our board all the flash chips are connected to the same chip select signal that caused the problem. Lesson-2: first of all examine your hardware well and be aware of your hardware. Thanks for your help: Jerry Van Baren, Yuli Barcohen, Richard Woodruff. The patch (unformatted): 1. The following function is added. static void write_via_fpu (vu_long * addr, ulong * data) { __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data)); __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr)); } 2. in /drivers/cfi_flash.c line 850; - *addr.llp = cword.ll; + write_via_fpu((vu_long*)addr.llp, (ulong*)&cword.ll); line 1159; - cptr.llp[0] = cword.ll; + write_via_fpu((vu_long*)cptr.llp, (ulong*)&cword.ll); P.S. this function will work if fpu is enabled. If not it may be enabled by setting the fpu bit in msr as follows; unsigned long msr; msr = get_msr(); set_msr(msr | MSR_FP); *_msr functions may be found by grepping the uboot directory. 3. The patch is not tested when CFG_FLASH_USE_BUFFER_WRITE is defined. Same changes as in 2 should be done for that case. If those changes are accepted, I can arrange a formal patch. Finally, I would like to ask about the Tolunay Orkun's patch about tout in flash_status_check function. what is the last thought for that patch Is it planned to be released? Because it's really a bug! (Last post for the thread; http://sourceforge.net/mailarchive/message.php?msg_id=11936556) Best Wishes. Yusuf. ###################################################################### Dikkat: Bu elektronik posta mesaji kisisel ve ozeldir. Eger size gonderilmediyse lutfen gondericiyi bilgilendirip mesaji siliniz. Firmamiza gelen ve giden mesajlar virus taramasindan gecirilmekte, guvenlik nedeni ile kontrol edilerek saklanmaktadir. Mesajdaki gorusler ve bakis acisi gondericiye ait olup Aselsan A.S. resmi gorusu olmak zorunda degildir. ###################################################################### Attention: This e-mail message is privileged and confidential. If you are not the intended recipient please delete the message and notify the sender. E-mails to and from the company are monitored for operational reasons and in accordance with lawful business practices. Any views or opinions presented are solely those of the author and do not necessarily represent the views of the company. ######################################################################

5 8

RE: [U-Boot-Users] silent console, nulldev and CONFIG_AUTOBOOT_KEYED
by Dave Ellis 30 Jun '05

30 Jun '05

Ladislav Michl wrote: > If "silent" env variable is set GD_FLG_SILENT is added to gd->flags > (in console_init_f). That effectively causes all console output to be > suppresed. That flag also causes nulldev to become outputdev > (in console_init_r). Btw, shouldn't CONFIG_SILENT_CONSOLE depend on > CFG_DEVICE_NULLDEV in this case? The current implementation of CONFIG_SILENT_CONSOLE needs CFG_DEVICE_NULLDEV. I suppose a check could be added to flag the error at build time if CFG_DEVICE_NULLDEV is not defined. > Now we are entering into abortboot > (CONFIG_AUTOBOOT_KEYED) and because "silent" env variable is set and > also CONFIG_SILENT_CONSOLE defined console_assign (stdout, "serial"); is > called, doing basicaly nothing, because GD_FLG_SILENT which is still > set prevents any console output. In abortboot the "silent" operation is suspended by setting the console back to serial so you can use the console to abort the boot. If the boot is aborted GD_FLG_SILENT is cleared, and the serial console works. If the boot is not aborted the console is set back to "nulldev" and the boot continues silently. > There are various solutions from this situation, but I'd like first > understand what is CFG_DEVICE_NULLDEV good for when we have GD_FLG_SILENT? > Or better, how should all these three things in question behave? You can boot silently (if "silent" is set), you can decide to see the output (by removing "silent" from the environment) and in either case if you abort the boot the console works. Isn't that exactly what the feature should do? Dave Ellis ~~~~~~~~~~~~~~~~~~~~~~~~~~ SIXNET - "Leading the Industrial Ethernet Revolution" 331 Ushers Road, P.O. Box 767, Clifton Park, NY 12065 USA Tel +1 (518) 877-5173 Fax +1 (518) 877-8346 Email me at: dge(a)sixnetio.com Detailed product info: www.sixnetio.com ~~~~~~~~~~~~~~~~~~~~~~~~~~

3 2

[U-Boot-Users] Erase in UBoot
by Bharathi Subramanian 30 Jun '05

30 Jun '05

Hello All, We are using UBoot 1.0.0, During continuous 2nd erase operation, the no .of DOT is increased. I like to know whether this is something do with UBoot or flash chip or is it normal behavior ?? ROM # erase B0100000 B07FFFFF .............................................. done Erased 111 sectors ROM # erase B0100000 B07FFFFF ..................................................... done Erased 111 sectors ROM # Thanks, -- Bharathi S

3 2

[U-Boot-Users] [PATCH] - OMAP242x/ARM1136 + H4 board (30-Jun-2005)
by Woodruff, Richard 30 Jun '05

30 Jun '05

Hello Wolfgang, Hopefully, this is the last update for a while. As they are slow to enter the tree I've been refreshing the patch. Please discard previous ones and use this one. This patch is against a 30 Jun 05 CVS head. I look forward to you getting time to actually working some of the backlog. Additional updates in this patch include ability to run the DDR in lock or unlock mode, and a fix to make all newer 2422 chips work. * Patch by Richard Woodruff, 30 Jun 2005: OMAP242x H4 board update, 30 June 05 - fix for ES2(.05,.1) differences. - switch to using the cfi_flash driver. - fix SRAM build address - fix for GP device operation - unlock SRAM for GP devices. - display more device information at startup. - fix potential deadlock in omap24xx_i2c driver. - fix DLL load values to match dpllout*1 operation. - fix 2nd chip select init for combo DDR device. - fix for 2422 rev > ES2 mono DDR. - add conditional DDR lock/unlock usage. drivers/serial.c,ns16550.c - remove obsolete APTIX conditionals. cfi_flash.c - add support for CFI Intel 28F256L18 on H4 board. Regards, Richard W. > -----Original Message----- > From: Woodruff, Richard > Sent: Tuesday, May 31, 2005 3:56 PM > To: u-boot-users(a)lists.sourceforge.net; 'Wolfgang Denk' > Subject: [PATCH] - OMAP242x/ARM1136 + H4 board. > > Hello Wolfgang, > > Here is an updated patch for the OMAP242x against the CVS as of 31 May 05. > This code runs against all current versions of the OMAP242x chip on the H4 > reference platform. > > All updates are confined to 242x specific directories except for a small > change to the CFI driver. The CFI driver makes some small incorrect > assumptions when it comes to Intel parts which have partitioning in > addition to sectoring. > > I sent out a now somewhat stale patch a couple months back in which I have > _not_ heard any comment on. Please discard that one and apply this > instead. If there any problems with this please let me know. > > OMAP242x H4 board update, 31 May 05 > - fix for ES2(.05,.1) differences. > - switch to using the cfi_flash driver. > - fix SRAM build address > - fix for GP device operation > - unlock SRAM for GP devices. > - display more device information at startup. > - fix potential deadlock in omap24xx_i2c driver. > - fix DLL load values to match dpllout*1 operation. > - fix 2nd chip select init for combo DDR device. > cfi_flash.c > - add support for CFI Intel 28F256L18 on H4 board. > > Regards, > Richard W.

1 0

RE: RE: [U-Boot-Users] Does u-boot relocate absolute symbols?
by Rune Torgersen 30 Jun '05

30 Jun '05

Wow.... This surprises me... I have alwayts thought that *test and test[] would be the same thing. Only solutionI can see is to change the definition in common.c to be *test, this will still get the address of test[] defined elsewhere. (See attached files) > Sure, I've tried this. This is the point, where my problem > arose. Attached you find two > small files, you can easily compile under linux (gcc -o > arrtest -I ./ ./common.c > ./array.c). The file "common.c" represents the code I can't > (don't want to) touch. > "array.c" represents my project dependent code. If you run > arrtest it will show to you,

2 1

[U-Boot-Users] 8540 and L1 cache mapping
by Charles J Gillan 30 Jun '05

30 Jun '05

Recently I have been studying the boot sequence for the 8540 based boards in U-Boot. I have a question on the location of the initial C stack. As I understand it, cpu/mpc85xx/start.S uses L1 data cache as the location for the C stack prior to the relocation into RAM. CFG_INIT_RAM_ADDR is defined within the relevant config file for each 6540 based board. I see in the 8540 User Manual that there is a register which can be used to position L2 cache in physical address space but there does not appear to be a similar register for L1 cache. However, I see that in the init.S files, for each board, entries are placed into TLB0 for memory at address CFG_INIT_RAM_ADDR. This is declared as cacheable and non-garded. Am I correct in thinking that this is all that is required to position the C run-time stack in L1 D-cache ? Thanks, Charles. -------------------------------------------------------------------------- Dr Charles J Gillan The Institute of Electronics, Communications and Information Technology (ECIT), Queen's University Belfast, Titanic Quarter Queens Road, Queens Island, Belfast, BT3 9DT Northern Ireland, UK Tel: +44 (0) 2890 971847 Fax: +44 (0) 2890 971702 ---------------------------------------------------------------------------

2 1

[U-Boot-Users] [PATCH] expand macros in bootargs env var for bootm command
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

This patch expands $(...) macros present in the bootargs environment variable for the bootm command. Same code could be (and probably should be, for consistencies sake) used in other boot commands. Required exposing the "process_macros()" function in common/main.c. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 5

[U-Boot-Users] [PATCH] limit length of kernel command line in bootm
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

This patch limits the length of the command line that the bootm command will pass to the kernel. Note that as it stands, it uses CFG_BARGSIZE which must be <= the size of the command line array used in the kernel (most boards have this set to CFG_CBSIZE, which in turn is usually 256 - which is usually ok). I use 1024 for both, and have a kernel patch which increases the command line aray to 1024. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 4

[U-Boot-Users] [PATCH] allow flash "ranges" to default to end of flash
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

This patch modifies the flash "range" code slightly to allow a range to "default" to the "end of the bank". Currently, you must specify "<first>-<last>" where <first> and <last> are sector numbers (zero based) within the "bank". This code allows you to say "<first>-" and <last> will default to the sector number of the last sector in the "bank". I thought I needed this - but now I don't use it anymore. However, the code might still be useful to someone. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 4

[U-Boot-Users] [PATCH] fix build without CONFIG_NET_MULTI
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

This is an older patch which fixed building without CONFIG_NET_MULTI. I'm not sure if its still required or not, since I now use CONFIG_NET_MULTI when building for my boards. I guess it might help someone if they search the list after striking a similar problem. I would think this would need some testing before it gets applied to the central repository. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 2

RE: [U-Boot-Users] Does u-boot relocate absolute symbols?
by Rune Torgersen 30 Jun '05

30 Jun '05

I just have to comment on this. > It does not work (because it's simply wrong) to declare > fpgadata as follows in pf5200.c > (although looking good in the first place, if you think about > it, the compiler needs to > handle both declarations differently): > > const unsigned char *fpgadata = 0x400000; /* (with 0x400000 > being the address to store > the image with TFTP at) */ > Have you tried to do this? Because it should work (even if one is declared char [] and the other char *) I use something similar to access a FPGA binary image stored in flash (after U-Boot relocation) and it works.

4 7

[U-Boot-Users] EP8248 as a PCI card
by Nishant Galange 30 Jun '05

30 Jun '05

Thanks, Yuli Got the patch, u-boot 1.1.2 installed and running on my ep8248 board. In standalone mode. When I try to use the EP8248 (with u-boot 1.1.2) as a PCI card in my PC (desktop), the PC doesn't even power up. But when the same card, with PlanetCore bootloader (the bootloader that came with the card), is inserted in the same PCI slot, the PC powers on, Windows XP starts up and even detects the card as a "Other PCI bridge" device. What change(s) do I have to make in the u-boot code to make it work as a PCI card in my PC? I have already tried the following: #define CONFIG_PCI in include/configs/EP8248.h Because of the above #define, I had to write a pci_init_board() function in board/ep8248/ep8248.c This function simply creates a pci_controller 'hose' and calls pci_mpc8250_init(&hose); With all this, now my PC boots up with the EP8248 + u-boot, but Windows can't detect the card. How do I proceed? What changes should I make? Waiting, Nishant -----Original Message----- From: Yuli Barcohen <yuli(a)arabellasw.com> To: "Nishant Galange" <nishant.subs(a)myrealbox.com> Date: Wed, 29 Jun 2005 11:42:55 +0300 Subject: Re: where is the EP8248 patch? >>>>> Nishant Galange writes: Nishant> Hi Yuli On 12 Dec 2004, You posted a patch for the Embedded Nishant> Planet EP8248 board. How do I download this patch? >From the GMANE archive which was mentioned many times on this list. Nishant> Is it already included in u-boot 1.1.2? No AFAIK. It's probably on Wolfgang's list. Nishant> Once I have all the necessary source code (with the patch Nishant> incorporated), what command(s) do I give to compile u-boot Nishant> 1.1.2 for the EP8248 board? Nishant> Will the following work: Should be OK. Nishant> $ export CROSS_COMPILE=ppc_82xx- Nishant> $ export PATH=[path_to_ELDK]:$PATH Nishant> $ make EP8248_config Nishant> $ make -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

2 1

[U-Boot-Users] EP8248 as a PCI card
by Nishant Galange 30 Jun '05

30 Jun '05

Thanks, Yuli Got the patch, u-boot 1.1.2 installed and running on my ep8248 board. In standalone mode. When I try to use the EP8248 (with u-boot 1.1.2) as a PCI card in my PC (desktop), the PC doesn't even power up. But when the same card, with PlanetCore bootloader (the bootloader that came with the card), is inserted in the same PCI slot, the PC powers on, Windows XP starts up and even detects the card as a "Other PCI bridge" device. What change(s) do I have to make in the u-boot code to make it work as a PCI card in my PC? I have already tried the following: #define CONFIG_PCI in include/configs/EP8248.h Because of the above #define, I had to write a pci_init_board() function in board/ep8248/ep8248.c This function simply creates a pci_controller 'hose' and calls pci_mpc8250_init(&hose); With all this, now my PC boots up with the EP8248 + u-boot, but Windows can't detect the card. How do I proceed? What changes should I make? Waiting, Nishant -----Original Message----- From: Yuli Barcohen <yuli(a)arabellasw.com> To: "Nishant Galange" <nishant.subs(a)myrealbox.com> Date: Wed, 29 Jun 2005 11:42:55 +0300 Subject: Re: where is the EP8248 patch? >>>>> Nishant Galange writes: Nishant> Hi Yuli On 12 Dec 2004, You posted a patch for the Embedded Nishant> Planet EP8248 board. How do I download this patch? >From the GMANE archive which was mentioned many times on this list. Nishant> Is it already included in u-boot 1.1.2? No AFAIK. It's probably on Wolfgang's list. Nishant> Once I have all the necessary source code (with the patch Nishant> incorporated), what command(s) do I give to compile u-boot Nishant> 1.1.2 for the EP8248 board? Nishant> Will the following work: Should be OK. Nishant> $ export CROSS_COMPILE=ppc_82xx- Nishant> $ export PATH=[path_to_ELDK]:$PATH Nishant> $ make EP8248_config Nishant> $ make -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

2 1

[U-Boot-Users] [PATCH] Differing gcc version ARM options
by Peter Pearse 30 Jun '05

30 Jun '05

Hi Attached a patch to fix the problems with different ARM options in different gcc versions. Thanks to Catalin Marinas for suggesting use of the cc-option shell function from the kernel make files - makes it neater than my last try..... Patched against head 30th June 2005. Tested with MAKEALL arm. CHANGELOG: * Patch by Peter Pearse, 30th June 2005 - Import cc-option shell function from kernel - Use it to get the correct ARM gcc options - Supply recommended flags for ARM supplied & supported development boards. ------------------------------------------------------------------------- Peter Pearse ARM Ltd

2 1

[U-Boot-Users] Relocation of symbols?
by Andreas Block 30 Jun '05

30 Jun '05

Hi, I've posted another question regarding this topic on 14th June 2005. Since I haven't received any answers, I'm unsure, if I'm in the correct mailinglist or if my problem was that trivial. In case of the latter one, please, give me a hint, where to post my questions instead. So here's my new question: I've declared a global array: char *walter[] = { "ABC", "DEF" }; The u-boot boots from flash and relocates itself into RAM. After relocation the array is relocated into RAM and so is its content (the pointers to strings). But the actual strings are still located in flash. "walter" is a global symbol located in ".data" section of the compiled object. Is this the behaviour I should expect, or is it a problem with u-boots relocation code? Best regards, Andreas Block

4 18

[U-Boot-Users] [PATCH] fix read-only "include/bmp_logo.h" after cvs checkout
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

The file "include/bmp_logo.h" is automatically generated during u-boot build, but it is also present in the central CVS repository, and when this file gets checked-out it is read-only. When the build reaches the tools directory and trys to overwrite "include/bmp_logo.h" it fails, and you have to change the write permissions and restart the build. This patch removes any existing "include/bmp_logo.h" file before generating the new one. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

1 0

[U-Boot-Users] Error on u-boot-1.1.3 : Bus Fault
by daoudi＠fiupso.u-psud.fr 30 Jun '05

30 Jun '05

Hello! I've encountered a problem while downloading u-boot-1.1.3 into a FPGA Xilinx Virtex 2 Pro. I managed to download and use u-boot a week ago but suddenly this problem appeared. I haven't changed anything since the last downloading and the FPGA still does work. Here is an echo of the problem : U-Boot 1.1.3 (Jun 23 2005 - 16:12:29) ### No HW ID - assuming ML300 DRAM: 16 MB Bus Fault @ 0x00002b5c, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 00801d50 Unknown values in msr NIP: 00002B5C XER: 20000000 LR: 0000227C REGS: 00801d50 TRAP: 0200 DAR: 55552A23 MSR: 00001000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 00000000 00801E40 FFFF9308 00801E50 0000000A 0000000A 00000000 FFFFFFFF GPR08: FFFFFFFF FC02283C 0001BE85 04FBCB50 00000020 FFFF962C 00024400 00000000 GPR16: 00000000 00000000 00000000 00000000 00001000 00801E40 00000000 0000227C GPR24: 00002B5C 00000000 04FDD000 04FBD000 04FBCB90 00801F80 0002448C 04FBCB4C Call backtrace: machine check The compiling of u-boot was successful but I think that there is a problem with the address of TEXT_BASE or the sections. I've tried to find an answer to this problem on the forum but I didn't manage to. Can you please help me because I really don't know where the problem comes from. Here is the Address Map for Processor ppc405_0 (0x00000000-0x00ffffff) SDRAM_MT48LC4M32B2TG plb (0x16000000-0x17ffffff) FLASH_16MX16 plb->plb2opb->opb (0x24800000-0x24801fff) iocm_cntlr iocm (0x40000000-0x4000ffff) LEDs_2Bit plb->plb2opb->opb (0x40400000-0x4040ffff) RS232_Uart_1 plb->plb2opb->opb (0x40800000-0x4080ffff) IIC_Bus plb->plb2opb->opb (0x41200000-0x4120ffff) opb_intc_0 plb->plb2opb->opb (0x80400000-0x8040ffff) Ethernet_MAC plb (0xe4800000-0xe4801fff) docm_cntlr docm (0xfffe0000-0xffffffff) plb_bram_if_cntlr_1 plb Thank you in advance.

1 0

[U-Boot-Users] Re: [PATCH] Spartan3 family support
by Nicolas Colombain 30 Jun '05

30 Jun '05

Hi Ilandre and Kurt, I need to download my Spartan 3 by using uboot and I was wondering if someone had already written something for that. I found your mails but unfortunately not the patch. :( This patch will be added to the next uboot version ?? Where can I find it ? Thanks in advance. Best Regards Nicolas Colombain (Armadeus Project)

3 2

[U-Boot-Users] [PATCH] append to ALL var instead of assigning
by Murray.Jensen＠csiro.au 30 Jun '05

30 Jun '05

This patch appends values to the ALL make variable, rather than assigning them, so that earlier included make fragments can put values into it without them being overwritten. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

1 0

[U-Boot-Users] about use mkimage to create uImage?
by zhuzhenhua 30 Jun '05

30 Jun '05

if i mkimage without compressing, kernel can run correct, the command is as follow ./tools/mkimage -A arm -O linux -T kernel -C none-a 0x30000000 -e0x30008000 -n "Linux" -d vmlinux uImage but i want to create a compressed uImage,i use commands like these,it stop at "starting kernel..." arm-linux-objcopy -O binary -R.note -R.comment -S vmlinux linux.bin gzip -9 linux.bin ./tools/mkimage -A arm -O linux -T kernel -C gzip -a 0x30008000 -e0x30008000 -n "Linux" -d linux.bin.gz uImage i think the second method should run well,and i see the same example in the Readme of u-boot src. any hints are appreciate.

2 2

[U-Boot-Users] silent console, nulldev and CONFIG_AUTOBOOT_KEYED
by Ladislav Michl 29 Jun '05

29 Jun '05

Hi, If "silent" env variable is set GD_FLG_SILENT is added to gd->flags (in console_init_f). That effectively causes all console output to be suppresed. That flag also causes nulldev to become outputdev (in console_init_r). Btw, shouldn't CONFIG_SILENT_CONSOLE depend on CFG_DEVICE_NULLDEV in this case? Now we are entering into abortboot (CONFIG_AUTOBOOT_KEYED) and because "silent" env variable is set and also CONFIG_SILENT_CONSOLE defined console_assign (stdout, "serial"); is called, doing basicaly nothing, because GD_FLG_SILENT which is still set prevents any console output. There are various solutions from this situation, but I'd like first understand what is CFG_DEVICE_NULLDEV good for when we have GD_FLG_SILENT? Or better, how should all these three things in question behave? thanks, ladis

1 0

[U-Boot-Users] Linking problem on new port
by Richard Danter 29 Jun '05

29 Jun '05

Hi all, I have been using U-Boot for a while, but this is the first time I have tried to port it to a new board myself, so please consider me a newbie! I have a problem linking U-Boot for my new board. I know this is my fault, I have missed something in the setup, can anyone point out what it is that is missed? The compile stage works, this is what I see when I try to link: ---- ppc_74xx-ld -Bstatic -T /usr/home/wb231-le11/Workspace/u-boot/board/ppmc7xx/u-boot.lds -Ttext -n $UNDEF_SYM cpu/74xx_7xx/start.o \ --start-group lib_generic/libgeneric.a board/ppmc7xx/libppmc7xx.a cpu/74xx_7xx/lib74xx_7xx.a lib_ppc/libppc.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a net/libnet.a disk/libdisk.a rtc/librtc.a dtt/libdtt.a drivers/libdrivers.a drivers/sk98lin/libsk98lin.a post/libpost.a post/cpu/libcpu.a common/libcommon.a --end-group -L /opt/eldk3.1.1/usr/bin/../lib/gcc-lib/ppc-linux/3.3.3/m7400/pic -lgcc \ -Map u-boot.map -o u-boot ppc_74xx-ld: invalid hex number `-n' ---- The $UNDEF_SYM is obviously wrong (I think!). I am not surprised if I have missed things, so far I have written just a skeleton for the board support, even if it links it won't run yet. I have been adding things as needed, but I just can't find what is missing here. Any suggestions? I'd like to ask another question too whilst I'm here. I have a single bank of Flash running from 0xFFC00000 to 0xFFFFFFFF. I want U-Boot to be placed at 0xFFF00000 with the entry point at 0xFFF00100. Am I right to set the following? If not, how do I achieve this? #define CFG_FLASH_BASE 0xFFC00000 #define CFG_MONITOR_BASE 0xFFF00000 Is this related to the problem above? Many thanks! Rich

2 2

[U-Boot-Users] Fin Sock
by winnie 29 Jun '05

29 Jun '05

We are a manufacturer in China Our new Products:Fin Sock (see the attached) The price:USD2.00/pr The materials:1mm Neoprene Thanks, winnie

1 0

[U-Boot-Users] where is the EP8248 patch?
by Nishant Galange 29 Jun '05

29 Jun '05

Hi Yuli On 12 Dec 2004, You posted a patch for the Embedded Planet EP8248 board. How do I download this patch? Is it already included in u-boot 1.1.2? Once I have all the necessary source code (with the patch incorporated), what command(s) do I give to compile u-boot 1.1.2 for the EP8248 board? Will the following work: $ export CROSS_COMPILE=ppc_82xx- $ export PATH=[path_to_ELDK]:$PATH $ make EP8248_config $ make Waiting, Nishant

2 1

[U-Boot-Users] question : do uboot support downloading from USB ?
by Tomko 29 Jun '05

29 Jun '05

Hi all, Can i ask serveral question about u boot? 1. why uboot support downloading from Kermit rather than from minicom ? It is more convinent if uboot can download from minicom. 2.as topic , do uboot support downloading from USB ? Regards, TOM

2 1

Re: [U-Boot-Users] about use mkimage to create uImage?
by KokHow Teh 29 Jun '05

29 Jun '05

without compressing, you used "-a 0x30000000" and with compressing, you used "-a 0x30008000". zhuzhenhua <zzh.hust(a)gmail.com>@lists.sourceforge.net on 06/29/2005 08:39:03 AM Please respond to zhuzhenhua <zzh.hust(a)gmail.com> Sent by: u-boot-users-admin(a)lists.sourceforge.net To: u-boot-users(a)lists.sourceforge.net cc: Subject: [U-Boot-Users] about use mkimage to create uImage? if i mkimage without compressing, kernel can run correct, the command is as follow ./tools/mkimage -A arm -O linux -T kernel -C none-a 0x30000000 -e0x30008000 -n "Linux" -d vmlinux uImage but i want to create a compressed uImage,i use commands like these,it stop at "starting kernel..." arm-linux-objcopy -O binary -R.note -R.comment -S vmlinux linux.bin gzip -9 linux.bin ./tools/mkimage -A arm -O linux -T kernel -C gzip -a 0x30008000 -e0x30008000 -n "Linux" -d linux.bin.gz uImage i think the second method should run well,and i see the same example in the Readme of u-boot src. any hints are appreciate. ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_idt77&alloc_id492&oplick _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

[U-Boot-Users] `bootelf` pSOS application + kernel
by KokHow Teh 29 Jun '05

29 Jun '05

Hi; I have a pSOS application + kernel at load address 0x40000 and entry point 0x40004. I have no success booting it. Any insight is appreciated. u-boot> tftp 200000 hello Using FCC2 ETHERNET device TFTP from server 147.128.28.42; our IP address is 147.128.28.44 Filename 'hello'. Load address: 0x200000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# # done Bytes transferred = 1332052 (145354 hex) u-boot> bootelf 200000 Loading .text @ 0x00040000 (537156 bytes) Loading .sdata2 @ 0x000c3244 (5 bytes) Loading .utext @ 0x000c4000 (10520 bytes) Clearing .bss @ 0x000c8000 (33064 bytes) Loading .data @ 0x000c6920 (3128 bytes) Clearing .sbss @ 0x000d0d60 (20 bytes) Loading .udata @ 0x000c7558 (12 bytes) ## Starting application at U-Boot 1.1.2 (Jun 29 2005 - 10:51:12) >>> PSOS binary: <<< hello: file format elf32-powerpc Disassembly of section .DAE_exp: Disassembly of section .IAE_exp: Disassembly of section .RST_exp: Disassembly of section .text: 00040000 <_START-0x4>: 40000: 7c 63 1b 78 mr r3,r3 00040004 <_START>: 40004: 7c 63 1b 78 mr r3,r3 40008: 3c 40 00 0d lis r2,13 4000c: 38 42 b2 34 addi r2,r2,-19916 40010: 3d a0 00 0e lis r13,14 40014: 39 ad 8d 50 addi r13,r13,-29360 40018: 7c 60 00 a6 mfmsr r3 4001c: 54 63 04 5e rlwinm r3,r3,0,17,15 40020: 7c 60 01 24 mtmsr r3 40024: 48 00 64 3c b 46460 <HdwInit> <snip> Regards, TEH

1 0

[U-Boot-Users] Help! Low-16 bits of SDRAM can not work!
by zhao haijian 29 Jun '05

29 Jun '05

Hi,All I have been working on such a board we made: *************************************** CPU: PXA255A Flash: Intel StrataFlash 16MB x 2 SDRAM: Samsung K4S5616320 32MB x 2 Two 16bits SDRAM chips are connected by the same CE,OE,OW,ADDRESS signals,forming a 32bits-width memory structure. *************************************** Using a emulator,I see the high 16bits of sdram works well,while the low 16bits always fail,though I've try many combination of configuration. We also found no problem with the hardware by an oscilloscope. I want to know what could lead to this? (Maybe a FATAL bit in a mysterious configuration register?) Anybody ever met this? BTW,I work on the base of CERF250 board. Best Regards, Phililp Beijing P.R.China

1 0

[U-Boot-Users] Strange : Same 8248 image needs to be reprogrammed
by Sam Song 28 Jun '05

28 Jun '05

Hi all, After porting u-boot on a 8248 board, I was confused by a programming problem with WireTAP. For the sake of 8248/8260 HRCW theory, RSTCONF must pull up to connect 8248 target with a No-head config file when there is a blank FLASH on board or WireTAP cannot init the target correctly. The programming process is as follows: Pull up RSTCONF -> Connect WireTAP with No-head config file -> Program the image on 0xff000000 -> Disconnect WireTAP -> Pull down RSTCONF -> Power-on -> No serial output -> Power-down -> Connect WireTAP with head config file -> Reprogram the same image at 0xff000000 -> Disconnect WireTAP -> Power-on -> Work! We suspected sth wrong on first programmig. So we checked the FLASH content with WireTAP but found at least first and last three bytes had the right content. Should I need to check all FLASH content? The image I compiled first is about 100KByte!!! I wanna to blame it on config file we used or FLASH programming mechanism or 8248 itself. But I have no clear clue with them:-( Could anyone have similar experience on 8260 series target? How about BDI2000 on it? Any idea? Thanks in advance, Sam ___________________________________________________________ 雅虎免费G邮箱－中国最强免费防毒反垃圾超大邮箱 http://cn.mail.yahoo.com/?id=77072

2 7

[U-Boot-Users] Q: how about "closed" hardware platforms?
by Leif Lindholm 28 Jun '05

28 Jun '05

Hi Like I mentioned in my previous mail to the list, I no longer have access to a db1550 board, so I can no longer test/verify au1550 support. We use u-boot in our mood 100 and 300 set-top boxes, which are only sold to network operators and the like. Where I'm getting at is - would it be possible to get our u-boot patches integrated into mainstream CVS (or git?), even though probably noone outside this company will ever be actively using u-boot on these boards? / Leif

2 1

[U-Boot-Users] Anyone actively using U-Boot with AMD Alchemy Au15xx?
by Clem Taylor 28 Jun '05

28 Jun '05

Hi, I'm currently using yamon with our Au1550 based board and I am considering switching over to U-Boot. Looking over the mailing list, I only saw a few messages that refer to Alchemy processors and I am concerned that the Au1xxx port isn't actively used. Anyone using U-Boot with an Alchemy processor? Thanks, Clem

3 2

[U-Boot-Users] how litte dose the u-boot.bin size can be?
by zhuzhenhua 28 Jun '05

28 Jun '05

My teacher ask me about whether the u-boot.bin(only need to boot from rom, remove the other commands and unnecessary functions) can be minimized to 10K.Dose someone has done some work about it? or maybe just emulate the minimal size by your experience any answers is appricate.

2 1

[U-Boot-Users] mkimage
by KokHow Teh 28 Jun '05

28 Jun '05

Hi; I am new to mkimage. I have an image with an entry at 0x00100004. I `mkimage` it with the following details: [teh@ShrekII tftpboot 75]$ mkimage -l uImage Image Name: psos Created: Tue Jun 28 17:53:24 2005 Image Type: PowerPC pSOS Kernel Image (uncompressed) Data Size: 593268 Bytes = 579.36 kB = 0.57 MB Load Address: 0x00100000 Entry Point: 0x00100004 [teh@ShrekII tftpboot 76]$ Then I `tftp` it into my target, examine the memory contents. u-boot> tftp 100000 uImage Using FCC2 ETHERNET device TFTP from server 147.128.28.42; our IP address is 147.128.28.44 Filename 'uImage'. Load address: 0x100000 Loading: ################################################################# ################################################### done Bytes transferred = 593332 (90db4 hex) u-boot> md 100000 00100000: 27051956 ba54f4c3 42c11e14 00090d74 '..V.T..B......t 00100010: 00100000 00100004 040da48f 0f070200 ................ 00100020: 70736f73 00000000 00000000 00000000 psos............ 00100030: 00000000 00000000 00000000 00000000 ................ 00100040: 7c631b78 7c631b78 3c400019 3842b234 |c.x|c.x<@..8B.4 00100050: 3da0001a 39ad8d50 7c6000a6 5463045e =...9..P|`..Tc.^ 00100070: 3c400019 3842b234 3da0001a 39ad8d50 <@..8B.4=...9..P 00100080: 4e800020 80430000 81a30004 4e800020 N.. .C......N.. 00100090: 00100470 7d6802a6 91610004 44000002 ...p}h...a..D... 001000a0: 4e800020 28030000 40820008 48022c3c N.. (...@...H.,< 001000b0: 7d6324aa 7d635b78 48022c30 38000001 }c$.}c[xH.,08... 001000c0: 4bffffe4 38000002 4bffffdc 60842000 K...8...K...`. . 001000d0: 38000003 48022c14 38000004 48022c0c 8...H.,.8...H.,. 001000e0: 38000005 48022c04 38000006 48022bfc 8...H.,.8...H.+. 001000f0: 38000007 48022bf4 38000008 48022bec 8...H.+.8...H.+. u-boot> imi ## Checking Image at 00100000 ... Image Name: psos Image Type: PowerPC Unknown OS Kernel Image (uncompressed) Data Size: 593268 Bytes = 579.4 kB Load Address: 00100000 Entry Point: 00100004 Verifying Checksum ... OK u-boot> Content of my original executable image: hello: file format elf32-powerpc Disassembly of section .DAE_exp: Disassembly of section .IAE_exp: Disassembly of section .RST_exp: Disassembly of section .text: 00100000 <_START-0x4>: 100000: 7c 63 1b 78 mr r3,r3 00100004 <_START>: 100004: 7c 63 1b 78 mr r3,r3 100008: 3c 40 00 19 lis r2,25 10000c: 38 42 b2 34 addi r2,r2,-19916 100010: 3d a0 00 1a lis r13,26 100014: 39 ad 8d 50 addi r13,r13,-29360 100018: 7c 60 00 a6 mfmsr r3 10001c: 54 63 04 5e rlwinm r3,r3,0,17,15 100020: 7c 60 01 24 mtmsr r3 100024: 48 00 64 3c b 106460 <HdwInit> <snip> It crashes when I `bootm 100000`. Here is my question. The original ELF executable image has the entry point at 0x00100004. After `mkimage` and having examined the content of the memory, I find out that the content which were at the original entry point has been shifted to 0x00100040. Would that be the cause of the crash? I assume that the "-e" option to mkimage is the entry point of the original executable which is 0x00100004? Any comment is appreciated. Regards, TEH

2 1

[U-Boot-Users] question : difference between booting 2.4 and 2.6 kernel
by Tomko 28 Jun '05

28 Jun '05

Hi all, I would like to modify the uboot so that it could boot up 2.4 and 2.6 kernel without downloading the u boot again . what i know the difference is : 2.6 kernel know how to copy itself to memory but 2.4 do not and need bootloader to do it. Am i right ? How can i do this inorder to make it more convinent ? Regards, TOM

2 5

[U-Boot-Users] invalid option 'short-load-bytes'
by Shakthi Kannan 28 Jun '05

28 Jun '05

Greetings! I am trying to cross-compile u-boot-1.1.2 for ARM Versatile Board ARM926EJ-S using cross-toolchain 3.4.2. I am getting the following error: cc1: error: invalid option 'short-load-bytes' cc1: error: invalid option 'apcs-32' It compiles fine with cross-toolchain 2.95.3. Any suggestions? Since it is mentioned here, http://www.arm.com/linux/prebuilt_download.html, that 3.4.2 has been used to compile u-boot, we would like to use the same for cross-compilation. Also, the ethernet is not enabled or detected on power up on this board. I have compiled in support for the SMC ethernet in u-boot-1.1.1, but, u-boot doesn't seem to be able to detect it. I'd appreciate any suggestions for the above. Thanks, K Shakthi -- proudly anti-micro$oft ------------------------------------------------------------ Shakthi Kannan, MS Software Engineer, Specsoft (Hexaware Technologies) [E]: shaks(a)shakthimaan.com [M]: (91) 98407-87007 [W]: http://www.shakthimaan.com [L]: Chennai, India ------------------------------------------------------------ __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

2 2

[U-Boot-Users] fin sock
by winnie 28 Jun '05

28 Jun '05

Dea Sirs: We are a manufacturer in China Our new Products:Fin Sock (see the attached) The price:USD2.00/pr The materials:1mm Neoprene Thanks, winnie

1 0

[U-Boot-Users] [Newbie] MPC8280 FCC internal loopback test
by Srivatsan CR 27 Jun '05

27 Jun '05

Dear all, We are having a MPC8280 based Rattler board with ethernet configured on FCC1. We are writing some POST tests for the board. For Ethernet we thought of running an internal loopback test. We took the eth_loopback_test() in ether_fcc.c as the template and did the necessary modification(s) majorly it was to change the mode register. We are able to see that the initialization of FCC1 is happening properly. But the result printed always says that the transmitted packet is 0 and received packet is 0. Is there something we are missing ? Expecting your help. With Thanks and Best Regards, C.R.Srivatsan

1 0

[U-Boot-Users] AMCC 440EP support
by Philippe Villet 27 Jun '05

27 Jun '05

I've got some troubles to use dcache for stack initialisation in ppc4xx/start.S for 440EP (no On Chip Memory available) ; Does anyone succeded in modifying this file for 440EP . More generally, i'would like to know if someone whish to check in 440EP support in U-Boot tree. Thanks. Philippe.

1 0

[U-Boot-Users] the definition of CONFIG_NET_MULTI
by KingBBS 27 Jun '05

27 Jun '05

hi all, I'm a newbie of u-boot. Anyone please tell me a clear definition of CONFIG_NET_MULTI? I cant find it in README/CHANGELOG. Regards, KingBBS mailto:kingbbs@gmail.com

2 1

Re: [U-Boot-Users] generating a u-boot Linux image for PXA255
by Wolfgang Denk 24 Jun '05

24 Jun '05

In message <MPEAJFOFNNOAIMOHBACIGECIEBAA.gl4jalopi(a)earthlink.net> you wrote: > Sorry, I searched and didn't find any. I found a mkimage line added to a > ppc make file for the 'cray' development board, but nothing for an arm > target. Please learn to quote properly. Don't top-post/full-quote. What is so difficult about finding boards with PXA255? Trivial approach: -> grep PXA255 include/configs/* include/configs/pleb2.h:#define CONFIG_PXA250 1 /* This is an PXA255 CPU */ include/configs/xaeniax.h:#define CONFIG_PXA250 1 /* This is an PXA255 CPU */ There you go... Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de I mean, I . . . think to understand you, I just don't know what you are saying ... - Terry Pratchett, _Soul Music_

2 3

[U-Boot-Users] 440GX enet bridge init
by Neil Wilson 24 Jun '05

24 Jun '05

While getting one of our boards running I noticed that in u-boot/cpu/ppc4x/440gx_enet.c that the case 2 of ppc_440x_eth_setup_bridge resets the value of zmiifer each time, I believe this should be an OR as in the other cases. I would have provided a patch but am in mid flow of porting the code. Cheers. Neil -- Neil Wilson Principal Engineer, Embedded Software Airspan Communications Ltd. Cambridge House, Oxford Road, Uxbridge, Middx, UB8 1UN, UK. Tel: +44(0)1895-467265 neilwilson(a)airspan.com www.airspan.com

1 0

[U-Boot-Users] generating a u-boot Linux image for PXA255
by Greg Lindberg 24 Jun '05

24 Jun '05

Does anybody have a script that they'd be willing to share for running mkimage on a Linux kernel for an Intel PXA255. I'm just getting started with u-boot and I'm not sure of all of the parameters for mkimage for the PXA255. Any help would be appreciated. Greg Secrecy, being an instrument of conspiracy, ought never to be the system of a regular government. -Jeremy Bentham, jurist and philosopher (1748-1832)

2 1

[U-Boot-Users] Config file MPC8241
by Ricky 23 Jun '05

23 Jun '05

Hi list, Can You pl suggest me which config file I can use for mpc8541? Can I go for MPC8245 itself? Thanks & Regards, Ricky -- This message contains information from GDA Technologies LTD and affiliates, and is intended for the sole use of the individual and entity to whom it is addressed. It may contain information, including any attachments, that is privileged, confidential and exempt from disclosure under applicable law. If you are not the intended addressee, nor authorized to receive for the intended addressee, you are hereby notified that you may not use, copy, disclose or distribute to anyone the message or any information contained in the message. If you have received this electronic transmission in error, please notify the sender immediately by a "reply to sender only" message and destroy all electronic and hard copies of the communication, including attachments. This message was scanned for spam and viruses by BitDefender.

3 2

[U-Boot-Users] BDI2000-virgin board
by Ted Hill 23 Jun '05

23 Jun '05

Hi, I need a help with BDI2000(MPC8266) --which i think almost everyone here use--, can BDI2000 treat with a virgin board? a not erased Flash? assume a flash all programmed with zero , so all the first 256 bytes of flash are zero , and if cpu reads these configuration bytes it will be set incorrectly, is such flash programable by BDI2000? (We developed a custom board. My flash should get FF for all bytes if erased. , I have a BDIPro and when I dump the flash, it's all zero ,it could not be erased nor programmed. what could I do, and what's my problem?) Best regards, Ted. --------------------------------- Do you Yahoo!? Yahoo! Mail - You care about security. So do we.

2 1

[U-Boot-Users] Jump location
by Ricky 23 Jun '05

23 Jun '05

Hi List, I have a confusion with Jump address. In case of MPC processor, I have reset vector at 0xffffffc which is mention is "board/<board_name>/u-boot.lds" script file. If we edit the binary file we used to get Jump instruction ..in my case its "4b ff f0 04" what exactly it means how it will jump to the location FFFFF000...I have seen this address in u-boot.lds script file. Can anyone put some commnet on this. Thanks & Regards, Ricky -- This message contains information from GDA Technologies LTD and affiliates, and is intended for the sole use of the individual and entity to whom it is addressed. It may contain information, including any attachments, that is privileged, confidential and exempt from disclosure under applicable law. If you are not the intended addressee, nor authorized to receive for the intended addressee, you are hereby notified that you may not use, copy, disclose or distribute to anyone the message or any information contained in the message. If you have received this electronic transmission in error, please notify the sender immediately by a "reply to sender only" message and destroy all electronic and hard copies of the communication, including attachments. This message was scanned for spam and viruses by BitDefender.

2 1

RE: [U-Boot-Users] u-boot r1 machine type value to AT91RM9200 2.6 .12 kernel
by SDI. - Dikhoff, Sascha 23 Jun '05

23 Jun '05

-----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of Steven Scholz Sent: Thursday, June 23, 2005 11:12 AM To: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] u-boot r1 machine type value to AT91RM9200 2.6.12 kernel Sascha, > I tried to use the linux 2.6.12 release for AT91RM9200, but when I started > with u-boot 1.1.2 the Kernel stopped. It is a custom board? Did you register a MACH_NUMBER? > I can configure a working kernel with the option 'config NAKED_Boot= y ', > but > with this option it's not possible to pass any bootarguments to the kernel. > How can I pass the corret R1 value for the machine type ('0xfb') from u-boot > 1.1.2 to the kernel? In you board_init() do something like: /* arch number of AT91RM9200 */ /*gd->bd->bi_arch_number = 251;*/ gd->bd->bi_arch_number = MACH_TYPE_MULTIIO; /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; > The last working kernel in combination with u-boot was 2.6.12rc4. What > changes in the u-boot source do I have to maintain relating to these boot > options? Or is it possible to pass the r1 value in between the 'bootargs' of > the u-boot enviroment? No. Just make sure your board_init() sets the correct (TM) arch_number. See kernel sources linux-2.6.12/arch/arm/boot/compressed/head-at91rm9200.S -- Steven Hi Steven, #define MACH_TYPE_AT91RM9200EK 705 is the right choice for starting 2.6.12, but the old 2.612rcX kernels need 251 (0xfb) ;-) Thanks Sascha

2 1

[U-Boot-Users] u-boot r1 machine type value to AT91RM9200 2.6.12 kernel
by Dikhoff＠gmx.de 23 Jun '05

23 Jun '05

Hello, I tried to use the linux 2.6.12 release for AT91RM9200, but when I started with u-boot 1.1.2 the Kernel stopped. I can configure a working kernel with the option 'config NAKED_Boot= y ', but with this option it's not possible to pass any bootarguments to the kernel. How can I pass the corret R1 value for the machine type ('0xfb') from u-boot 1.1.2 to the kernel? The last working kernel in combination with u-boot was 2.6.12rc4. What changes in the u-boot source do I have to maintain relating to these boot options? Or is it possible to pass the r1 value in between the 'bootargs' of the u-boot enviroment? Any help would be appreciated Regards Sascha -- Weitersagen: GMX DSL-Flatrates mit Tempo-Garantie! Ab 4,99 Euro/Monat: http://www.gmx.net/de/go/dsl

2 1

Re: [U-Boot-Users] debug linux kernel hangs
by Alex shi 23 Jun '05

23 Jun '05

Hi Denk: I am sorry for pre unreadable mail. Hi All: My box is MPC8247 I use u-boot 1.1.1 to boot linux kernel 2.4.22, the bd_info are same in u-boot.h, and IMMR address also same at 0xf0000000. but after input bootm command the linux kernel hangs: ==================================== => setenv ipaddr 192.168.0.33 => setenv serverip 192.168.0.222 => tftp 0x100000 uImage Using FCC1 ETHERNET device TFTP from server 192.168.0.222; our IP address is 192.168.0.33 Filename "uImage". Load address: 0x100000 Loading: ################################################################# ################################################################# ##################################### done Bytes transferred = 853098 (d046a hex) => bootm 0x100000 ## Booting image at 00100000 ... Image Name: Linux Kernel Image Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 853034 Bytes = 833 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ============================================= and under the ppc_6xx-gdb : ========================== (gdb) 620 ppc_md.setup_arch(); (gdb) n <<<<< long time wait and then press ctl + c. ò Program received signal SIGSTOP, Stopped (signal). 0xc0007e4c in __delay () at time.c:427 427 } (gdb) where #0 0xc0007e4c in __delay () at time.c:427 #1 0xc0015ae4 in panic (fmt=0x2bbbd "\001") at delay.h:42 (gdb) ========================= It seems kernel breaken down at ppc_md.setup_arch() and panic a message to me, isn't it? Any hints will be appreciated! BRG Alexander

3 3

[U-Boot-Users] What specific modification need for booting 2.4 kernel ?
by Tomko 23 Jun '05

23 Jun '05

Hi all, as topic , do i need to make any change for booting 2.4 kernel ? Do i need to set the tag list like booting 2.6 kernel ? Regards, TOM

1 0

Re: [U-Boot-Users] debug linux kernel hangs
by Alex shi 23 Jun '05

23 Jun '05

Hi Denk: Sorry, I did not notice it.Hi all: My platform is MPC8247, u-boot verison is 1.1.1 and linux kernel version is 2.4.22 in the serial console I load the linux kernel and want to boot it under u-boot: >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> => setenv ethaddr 00:01:02:03:04:05 => setenv ipaddr 192.168.0.33 => setenv serverip 192.168.0.222 => tftp 0x100000 uImage Using FCC1 ETHERNET device TFTP from server 192.168.0.222; our IP address is 192.168.0.33 Filename "uImage". Load address: 0x100000 Loading: ################################################################# ################################################################# ##################################### done Bytes transferred = 853098 (d046a hex) => bootm 0x100000 ## Booting image at 00100000 ... Image Name: Linux Kernel Image Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 853034 Bytes = 833 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> but after print the "Uncompressing Kernel Image ... OK" msg, the kernel hangs. I use the same u-boot.h file under linux kernel and u-boot, and sure the bd_info in them are same. IMMR address also are same at 0xf0000000. My bdi2000 run and print below: ++++++++++++++++++++++++++++++++++ 8272>i Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : COP freeze (startup) Current PC : 0xfff00100 Current CR : 0x00000000 Current MSR : 0x00001042 Current LR : 0x00000000 8272>g 8272>h Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : COP halt Current PC : 0x07fe94c8 Current CR : 0x84002024 Current MSR : 0x0000b002 Current LR : 0x07fda464 8272>bi 0xc01554c8 (which is the start_kernel_address) Breakpoint identification is 1 8272>g - TARGET: stopped 8272>i Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : <reserved 0> Current PC : 0x001cbde4 Current CR : 0x24008084 Current MSR : 0x00003002 Current LR : 0x00000028 +++++++++++++++++++++++++++++++++++++++++++ Why the Current PC can not get the start_kernel address? How can i to debug the linux kernel? Any hits will be very appreciated! BRG Alexander

1 0

[U-Boot-Users] debug linux kernel hangs
by Alex shi 22 Jun '05

22 Jun '05

Hi all: My platform is MPC8247, u-boot verison is 1.1.1 and linux kernel version is 2.4.22 in the serial console I load the linux kernel and want to boot it under u-boot: >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> => setenv ethaddr 00:01:02:03:04:05 => setenv ipaddr 192.168.0.33 => setenv serverip 192.168.0.222 => tftp 0x100000 uImage Using FCC1 ETHERNET device TFTP from server 192.168.0.222; our IP address is 192.168.0.33 Filename 'uImage'. Load address: 0x100000 Loading: ################################################################# ################################################################# ##################################### done Bytes transferred = 853098 (d046a hex) => bootm 0x100000 ## Booting image at 00100000 ... Image Name: Linux Kernel Image Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 853034 Bytes = 833 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> but after print the "Uncompressing Kernel Image ... OK" msg, the kernel hangs. I use the same u-boot.h file under linux kernel and u-boot, and sure the bd_info in them are same. IMMR address also are same at 0xf0000000. My bdi2000 run and print below: ++++++++++++++++++++++++++++++++++ 8272>i Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : COP freeze (startup) Current PC : 0xfff00100 Current CR : 0x00000000 Current MSR : 0x00001042 Current LR : 0x00000000 8272>g 8272>h Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : COP halt Current PC : 0x07fe94c8 Current CR : 0x84002024 Current MSR : 0x0000b002 Current LR : 0x07fda464 8272>bi 0xc01554c8 (which is the start_kernel_address) Breakpoint identification is 1 8272>g - TARGET: stopped 8272>i Target CPU : MPC8280/8220/5200 (Zeppo) Target state : debug mode Debug entry cause : <reserved 0> Current PC : 0x001cbde4 Current CR : 0x24008084 Current MSR : 0x00003002 Current LR : 0x00000028 +++++++++++++++++++++++++++++++++++++++++++ Why the Current PC can not get the start_kernel address? How can i to debug the linux kernel? Any hits will be very appreciated! BRG Alexander

1 0

[U-Boot-Users] Question about MPC8272 HRCW
by raymond yang 22 Jun '05

22 Jun '05

Hello, I am confused about the followin fields in HRCW, MPC8272 CIP - 0 MSR[IP]=1 (default), Exceptions are vectored to the physical address 0xfffn_nnnn 1 MSR[IP]=0, Exceptions are vectored to the physical address 0x000n_nnnn BMS - Boot memory space. Defines the initial value for BR0[BA]. There are two possible bootmemory regions, HIMEM and LOMEM 0 0xFE00_0000 -- 0xFFFF_FFFF 1 0x0000_0000 -- 0x1FFF_FFFF My question: 1) Given BMS = 0 Does this mean, the FLASH(on CS0) are given the base address as 0xFE00_0000? 2) Given CIP = 0 Does this meman, the vector should be placed at 0xFFFn_nnnn? So With BMS=0, and CIP=0, my flash should be bigger than 0xFFFn_nnnn - 0xFE00_00000 >16M, right? 3) Given my flash is 8M byte, 16bit-bus-width, is it a valid HRCW word for 08_82_32_45 My image got the following configurations MONITOR_BASE=TEXT_ADDR=0xFFF00000 CFG_FLASH_BASE = 0XFE800000 I tried many times, with BDI plugged, u-boot works fine. However, without BDI and RSTCN pull-up, looks like the image never got run. Any ideas? Thanks ahead. Best Regards Raymond __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

5 16

[U-Boot-Users] mtest issue on MPC8272
by raymond yang 22 Jun '05

22 Jun '05

Hi All, My board got problems while running m_test, any idea, Looks like the high order two bytes mismatched, while low part correct. Does this mean we failed to configure the SDRAM or due to hardwarer issue? thanks! Best Regards Raymond => mtest Pattern 00000000 Writing... Reading... Mem error @ 0x00110000: found 00044000, expected 00004000 Mem error @ 0x00118000: found 40246000, expected 00006000 Mem error @ 0x001A0000: found 00268000, expected 00028000 Mem error @ 0x001B0000: found 0006C000, expected 0002C000 Mem error @ 0x001F8000: found 0427E000, expected 0003E000 Mem error @ 0x00200000: found CC320000, expected 00040000 Mem error @ 0x00208000: found C4322000, expected 00042000 __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

4 5

Re:[U-Boot-Users] linux kernel boot hangs with CONFIG_CMDLINE_TAG defined
by Terence Soh 22 Jun '05

22 Jun '05

>If I have CONFIG_CMDLINE_TAG defined, the last message I see on the >console is the "Starting Kernel" message. "Starting Kernel" is the last message by U-boot before the kernel is called. Supposing the kernel has not crashed, checked include/asm/arch/uncompress.h for putstr and verify that it matches your custom hardware. Terence.

1 0

[U-Boot-Users] linux kernel boot hangs with CONFIG_CMDLINE_TAG defined
by Tehn-Yit Chin 22 Jun '05

22 Jun '05

Hi all, I have strange problem with passing the boot arguments to the linux kernel on bootup. I have read the following entry at www.denx.de but am unable to come up with a suitable solution. http://www.denx.de/twiki/bin/view/DULG/LinuxKernelIgnoresMyBootargs I am booting a 2.6.11 kernel on a Samsung S3C2410 custom board. If I don't have CONFIG_CMDLINE_TAG defined in my platform specific header file, the kernel boots up fine as it grabs the default boot arguments from itself. If I have CONFIG_CMDLINE_TAG defined, the last message I see on the console is the "Starting Kernel" message. I have also tried the other CONFIG_SETUP_MEMORY_TAGS and CONFIG_INITRD_TAG as well and they did not improve the situation at all. Any pointers would be great. Many thanks. Tehn Yit Chin Software Engineer, Grey Innovation Pty. Ltd.

2 1

[U-Boot-Users] date for next release?
by Jonas Dietsche 21 Jun '05

21 Jun '05

Hi, is it possible to give an estimation when the next release will be done? Thank you. Jonas

2 1

[U-Boot-Users] question : How to get rid of compiling the network part
by Tomko 21 Jun '05

21 Jun '05

Hi all, I am porting the uboot and i want to get rid of the network component at this moment, there is a function cs8900_get_enetaddr () at the start_armboot() of lib_arm/board.c (my program often hangs inside), i have set in my board/xxx.c that #undef CONFIG_DRIVER_CS8900 but after all many error from net/net.c occur . I there therefore set : #define CONFIG_COMMANDS \ ( & ~CFG_CMD_NET \ ) in order to get rid of the comilation of the network part, but the compiler keep on compiling the network part and many errors occur, do anyone know how to solve this problem ? Regards, TOM

3 2

[U-Boot-Users] XPF_RESET pb
by Xavier Grave 21 Jun '05

21 Jun '05

Hi everybody, I have recompiled u-boot for our design based on a memec board. I load u-boot with xmd and when I try to bootp I have the following problem : Bus Fault @ 0x03ff4740, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 03fbe978 Data parity signal NIP: 03FF4740 XER: 00000000 LR: 03FF4734 REGS: 03fbe978 TRAP: 0200 DAR: 00000000MSR: 00029000 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 0000000A 03FBEA68 00000498 00000000 0000000D 00000010 FFFFFFFB 00000000 GPR08: 00000000 60002010 FFFFFFFF 03FBE818 00000000 00000790 04000D00 03FDF000 GPR16: 00000000 00000000 00000000 03FBEC68 00000001 00000000 00000000 00000000 GPR24: 00000000 03FFA488 03FBEF90 60002200 60002010 03FBEF60 04001800 03FFC464 Call backtrace: machine check I had a look at the code and I found that was the XPF_RESET in file packet_fifo_v1_00_b.h that crash... The base address is in the range of the ethernet_mac I gave so if anybody has any idea, that will be welcome :-) Thanks in advance, xavier

1 0

[U-Boot-Users] [PATCH] fix DataTLB exception handler configuration on 85xx
by Jon Loeliger 20 Jun '05

20 Jun '05

* Patch by Eugene Surovegin, 18-June-2005 Fixes a couple of typos in cpu/85xx/start.S, one of which caused DataTLB exception to be routed to the Watchdog handler Signed-off-by: Jon Loeliger <jdl(a)freescale.com> Signed-off-by: Eugene Surovegin <ebs(a)ebshome.net> Index: cpu/mpc85xx/start.S =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/mpc85xx/start.S,v retrieving revision 1.6 diff -u -r1.6 start.S --- cpu/mpc85xx/start.S 13 May 2005 22:49:36 -0000 1.6 +++ cpu/mpc85xx/start.S 18 Jun 2005 09:17:26 -0000 @@ -204,8 +204,8 @@ li r1,0x0b00 mtspr IVOR11,r1 /* 11: Interval timer */ li r1,0x0c00 - mtspr IVOR12,r1 /* 11: Watchdog timer */ - li r10,0x0d00 + mtspr IVOR12,r1 /* 12: Watchdog timer */ + li r1,0x0d00 mtspr IVOR13,r1 /* 13: Data TLB error */ li r1,0x0e00 mtspr IVOR14,r1 /* 14: Instruction TLB error */

1 0

[U-Boot-Users] Porting to PXA270
by Kalypso2 20 Jun '05

20 Jun '05

Hello members, I am new to u-boot and have to port it to PXA270 on a custom designed board. Can you give me pointers on where and how to start. Any information is appreciated. Thanks, Nikhil

2 1

[U-Boot-Users] PATCH: remove -mshort-load-bytes
by Andreas Engel 20 Jun '05

20 Jun '05

CHANGELOG entry: * Patch by Andreas Engel, 20 June 2005 Remove the ARM specific -mshort-load-bytes compiler option. This option is not supported on newer gcc releases (has been renamed to -malignment-traps) and has no effect on ARM architecture 4 or later.

1 0

[U-Boot-Users] how to boot a root.cramfs in ram
by zhuzhenhua 20 Jun '05

20 Jun '05

i use uboot loadb command to place kenerl on 0x32000000, root.cramfs on 0x30800000,and when i type bootm 32000000 30800000, it just boot as there is a ramdisk image.Does uboot support boot cramfs rootfs in ram? what's the command? thanks all zzh

3 4

Re: [U-Boot-Users] Compilation on cygwin
by Wolfgang Denk 19 Jun '05

19 Jun '05

Hello, in message <42B4A4D7.9060506(a)free.fr> you wrote: > > cygwin use an ash shell by default. I change it to the bash shell, > and i make a test: I have no more problem. Fine. [It would have been nice if you had posted such a summary to the mailing list. But ok, I do it hereby.] Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de This restaurant was advertising breakfast any time. So I ordered french toast in the renaissance. - Steven Wright, comedian

1 0

[U-Boot-Users] Compilation on cygwin
by bourgoin gilles 18 Jun '05

18 Jun '05

Hello, I'am trying u-boot (cvs version - 2005-06-04 - v1.1.3). I compile on cygwin 1.5.17(0.129/4/2) and i have to modify the mkconfig file at line 36 as this: I replace "if [ -z "$6" -o "$6" == "NULL" ] ; then" by "if [ -z "$6" ] ; then" Thanks for your work, wolfgang best regards, gilles bourgoin

2 1

[U-Boot-Users] Access global data from standalone application
by Shawn Jin 18 Jun '05

18 Jun '05

Hi, Is there any way to access global data defined in U-Boot from standalone applications? For example, hello_world wants to access flash_info[]. Regards, -Shawn.

2 3

[U-Boot-Users] RE: No taskfile registers for PCMCIA IDE ?
by Václavík Jakub 17 Jun '05

17 Jun '05

I using u-boot 1.1.2, configuration derived from Cerfboard and Xsengine. GPIO pins are configured according to engineering specification for the (Kontron B499 board). For the PCMCIA/IDE stuff I am using these defines: CONFIG_PXA_PCMCIA, CONFIG_PXA_IDE, CONFIG_IDE_8xx_PCCARD, CFG_MCMEM0_VAL 0x00004204 CFG_MCATT0_VAL 0x00010504 CFG_MCIO0_VAL 0x00008407 (I tried also different timings IO and common memory.) CFG_ATA_BASE_ADDR 0x20000000 CFG_ATA_DATA_OFFSET 0x01f0 /* complies with the CIS */ CFG_ATA_ALT_OFFSET 0x03f6 /* for the CF card */ CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) CFG_ATA_STRIDE 4 /* I tried also 1,2 */ Powering the PCMCIA is like EXADRON1. The log output is like this: Reset IDE: pcmcia_on pcmcia_on: programmed mem controller No PCMCIA card found! PCMCIA MEM: 28000000 ## Config_base = 0200 ### TOSHIBA THNCF128MBA ## Compare against "TOSHIBA THNCF128MBA" ## CARD FOUND ## Fixed Disk Card IDE interface [silicon] [unique] [single] [sleep] [standby] [idle] [low power] Bus 0: ide_outb (dev= 0, port= 0x208, val= 0xe0) : @ 0x20000208 ide_inb (dev= 0, port= 0x20c) : @ 0x2000020c -> 0xec ... ** Timeout ** The value read from the "ata status register" is sometimes different for individual builds of the bootloader, but otherwise the value always the same. The Configuration registers of the CF card are: Configuration Option register (200H): 0x01 Configuration and Status register (202H): 0x80 Pin Replacement register (204H): 0x2e Socket and Copy register (206H): 0x00 I tried different INDEXes in Configuration Option register, but the result is still the same. I can not find out, what I can not access the task file registers. I would appreciate any hint. Best regards, Jakub -----Original Message----- From: Grant Likely [mailto:glikely@gmail.com] Sent: Friday, June 17, 2005 7:21 PM To: Václavík Jakub Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] No taskfile registers for PCMCIA IDE ? On 6/17/05, Václavík Jakub <jakub.vaclavik(a)merz-sw.com> wrote: > > > > Hi all, > > > > I am working with PXA255 board (~Cerfboard) and I am trying to access PCMCIA > CF via IDE. > > But it goes like this: > > power PCMCIA - OK > get CIS information - OK > access CF's Configuration registers - OK > access Task File Registers - FAIL: task file registers seem not to be > present anywhere (!?) > Please, please, please include output logs when your asking for help. Also identify exactly what versions and configuration your using. g.

1 0

[U-Boot-Users] No taskfile registers for PCMCIA IDE ?
by Václavík Jakub 17 Jun '05

17 Jun '05

Hi all, I am working with PXA255 board (~Cerfboard) and I am trying to access PCMCIA CF via IDE. But it goes like this: 1. power PCMCIA - OK 2. get CIS information - OK 3. access CF's Configuration registers - OK 4. access Task File Registers - FAIL: task file registers seem not to be present anywhere (!?) Can anybody give me a hint, what do I miss? Thanks in advance, Jakub Václavík

2 1

RE: [U-Boot-Users] PPC 440EP Ethernet question
by Jacob Simu 17 Jun '05

17 Jun '05

Yes I have, GPIO(12-25 to alternative 1 INs and OOUTs). I also have set up SDR0_CUST0[MEN]. But I'll look over it again. Thanks for the tip. /Jacob > -----Original Message----- > From: Steven Blakeslee [mailto:BlakesleeS@embeddedplanet.com] > Sent: den 17 juni 2005 16:22 > To: Jacob Simu; u-boot-users(a)lists.sourceforge.net > Subject: RE: [U-Boot-Users] PPC 440EP Ethernet question > > > Do you have the pins setup properly. They default to > tri-state gpio and > need to be setup as ethernet pins. > > > -----Original Message----- > > From: u-boot-users-admin(a)lists.sourceforge.net > > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > > Of Jacob Simu > > Sent: Friday, June 17, 2005 10:21 AM > > To: u-boot-users(a)lists.sourceforge.net > > Subject: [U-Boot-Users] PPC 440EP Ethernet question > > > > Hello! > > > > I've managed to port U-boot for our board with a 440EP > > processor. But I have problem to get the ethernet working. We > > use a Altima AC104Z PHY. I can read out all PHY register and > > they seem to be correct. > > I have tried both RMII mode with the 405gp_enet.c and SMII > > mode with the 440gx_enet.c implementation. > > > > The PHY initiation looks fine. But when trying to ping or > > tftp I get no connection. > > > > I can see that I enter the eneInt interrupt handler. > > > > If anyone has a hint or tips on any diffrences on the 440EP > > regarding ethernet please let me know. > > > > Below I send the serial output from a SMII run. > > > > Best regards, > > > > Jacob. > > > > > > /*********************************************************/ > > > > U-Boot 1.1.2 (Jun 17 2005 - 16:09:33) > > > > IBM PowerPC 440 GUNKNOWN (PVR=422218d3) > > Board: IBM 440EP Board (OPVDR) > > VCO: 800 MHz > > CPU: 400 MHz > > PLB: 100 MHz > > OPB: 50 MHz > > EPB: 50 MHz > > I2C: ready > > DRAM: 128 MB > > Top of RAM usable for U-Boot at: 07fff000 Reserving 179k for > > U-Boot at: 07fd2000 Reserving 132k for malloc() at: 07fb1000 > > Reserving 144 Bytes for Board Info at: 07fb0f70 Reserving 48 > > Bytes for Global Data at: 07fb0f40 Stack Pointer at: 07fb0f28 > > New Stack Pointer is: 07fb0f28 Now running in RAM - U-Boot > > at: 07fd2000 > > FLASH: mfg_code 39 > > dev_code 79 > > FLASH ADDR: fff80000 > > FLASH MANUFACT: 1 > > > > FLASH DEVICEID: 4f > > 512 kB > > PCI: CPC0_STRP1[PISE] not set. > > PCI: Configuration aborted. > > In: serial > > Out: serial > > Err: serial > > U-Boot relocated to 07fd2000 > > Net: ppc_440x_eth0, ppc_440x_eth1 > > => ping xxx.xxx.xxx.xxx > > Trying ppc_440x_eth0 > > About preceeding transfer (eth0): > > - Sent packet number 0 > > - Received packet number 0 > > - Handled packet number 0 > > devnum:0 ZMII_FER:c0000000 > > Waiting for PHY auto negotiation to complete.. done TX_BUFF 0 > > @ 0x07fb24a8 RX_BUFF 0 @ 0x07ffce80 RX_BUFF 1 @ 0x07ffd480 > > RX_BUFF 2 @ 0x07ffda80 RX_BUFF 3 @ 0x07ffe080 Installing IRQ > > handlers //Own debug output Using ppc_440x_eth0 device > > > > > > ###########################################This message has > > been scanned by F-Secure Anti-Virus for Microsoft > > Exchange.Formore information, connect to http://www.f-secure.com/ > > > > > > ------------------------------------------------------- > > SF.Net email is sponsored by: Discover Easy Linux Migration > Strategies > > from IBM. Find simple to follow Roadmaps, straightforward articles, > > informative Webcasts and more! Get everything you need to get up to > > speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click > > _______________________________________________ > > U-Boot-Users mailing list > > U-Boot-Users(a)lists.sourceforge.net > > https://lists.sourceforge.net/lists/listinfo/u-boot-users > > > ###########################################This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange.Formore information, connect to http://www.f-secure.com/

1 0

RE: [U-Boot-Users] PPC 440EP Ethernet question
by Steven Blakeslee 17 Jun '05

17 Jun '05

Do you have the pins setup properly. They default to tri-state gpio and need to be setup as ethernet pins. > -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > Of Jacob Simu > Sent: Friday, June 17, 2005 10:21 AM > To: u-boot-users(a)lists.sourceforge.net > Subject: [U-Boot-Users] PPC 440EP Ethernet question > > Hello! > > I've managed to port U-boot for our board with a 440EP > processor. But I have problem to get the ethernet working. We > use a Altima AC104Z PHY. I can read out all PHY register and > they seem to be correct. > I have tried both RMII mode with the 405gp_enet.c and SMII > mode with the 440gx_enet.c implementation. > > The PHY initiation looks fine. But when trying to ping or > tftp I get no connection. > > I can see that I enter the eneInt interrupt handler. > > If anyone has a hint or tips on any diffrences on the 440EP > regarding ethernet please let me know. > > Below I send the serial output from a SMII run. > > Best regards, > > Jacob. > > > /*********************************************************/ > > U-Boot 1.1.2 (Jun 17 2005 - 16:09:33) > > IBM PowerPC 440 GUNKNOWN (PVR=422218d3) > Board: IBM 440EP Board (OPVDR) > VCO: 800 MHz > CPU: 400 MHz > PLB: 100 MHz > OPB: 50 MHz > EPB: 50 MHz > I2C: ready > DRAM: 128 MB > Top of RAM usable for U-Boot at: 07fff000 Reserving 179k for > U-Boot at: 07fd2000 Reserving 132k for malloc() at: 07fb1000 > Reserving 144 Bytes for Board Info at: 07fb0f70 Reserving 48 > Bytes for Global Data at: 07fb0f40 Stack Pointer at: 07fb0f28 > New Stack Pointer is: 07fb0f28 Now running in RAM - U-Boot > at: 07fd2000 > FLASH: mfg_code 39 > dev_code 79 > FLASH ADDR: fff80000 > FLASH MANUFACT: 1 > > FLASH DEVICEID: 4f > 512 kB > PCI: CPC0_STRP1[PISE] not set. > PCI: Configuration aborted. > In: serial > Out: serial > Err: serial > U-Boot relocated to 07fd2000 > Net: ppc_440x_eth0, ppc_440x_eth1 > => ping xxx.xxx.xxx.xxx > Trying ppc_440x_eth0 > About preceeding transfer (eth0): > - Sent packet number 0 > - Received packet number 0 > - Handled packet number 0 > devnum:0 ZMII_FER:c0000000 > Waiting for PHY auto negotiation to complete.. done TX_BUFF 0 > @ 0x07fb24a8 RX_BUFF 0 @ 0x07ffce80 RX_BUFF 1 @ 0x07ffd480 > RX_BUFF 2 @ 0x07ffda80 RX_BUFF 3 @ 0x07ffe080 Installing IRQ > handlers //Own debug output Using ppc_440x_eth0 device > > > ###########################################This message has > been scanned by F-Secure Anti-Virus for Microsoft > Exchange.Formore information, connect to http://www.f-secure.com/ > > > ------------------------------------------------------- > SF.Net email is sponsored by: Discover Easy Linux Migration Strategies > from IBM. Find simple to follow Roadmaps, straightforward articles, > informative Webcasts and more! Get everything you need to get up to > speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users >

1 0

[U-Boot-Users] PPC 440EP Ethernet question
by Jacob Simu 17 Jun '05

17 Jun '05

Hello! I've managed to port U-boot for our board with a 440EP processor. But I have problem to get the ethernet working. We use a Altima AC104Z PHY. I can read out all PHY register and they seem to be correct. I have tried both RMII mode with the 405gp_enet.c and SMII mode with the 440gx_enet.c implementation. The PHY initiation looks fine. But when trying to ping or tftp I get no connection. I can see that I enter the eneInt interrupt handler. If anyone has a hint or tips on any diffrences on the 440EP regarding ethernet please let me know. Below I send the serial output from a SMII run. Best regards, Jacob. /*********************************************************/ U-Boot 1.1.2 (Jun 17 2005 - 16:09:33) IBM PowerPC 440 GUNKNOWN (PVR=422218d3) Board: IBM 440EP Board (OPVDR) VCO: 800 MHz CPU: 400 MHz PLB: 100 MHz OPB: 50 MHz EPB: 50 MHz I2C: ready DRAM: 128 MB Top of RAM usable for U-Boot at: 07fff000 Reserving 179k for U-Boot at: 07fd2000 Reserving 132k for malloc() at: 07fb1000 Reserving 144 Bytes for Board Info at: 07fb0f70 Reserving 48 Bytes for Global Data at: 07fb0f40 Stack Pointer at: 07fb0f28 New Stack Pointer is: 07fb0f28 Now running in RAM - U-Boot at: 07fd2000 FLASH: mfg_code 39 dev_code 79 FLASH ADDR: fff80000 FLASH MANUFACT: 1 FLASH DEVICEID: 4f 512 kB PCI: CPC0_STRP1[PISE] not set. PCI: Configuration aborted. In: serial Out: serial Err: serial U-Boot relocated to 07fd2000 Net: ppc_440x_eth0, ppc_440x_eth1 => ping xxx.xxx.xxx.xxx Trying ppc_440x_eth0 About preceeding transfer (eth0): - Sent packet number 0 - Received packet number 0 - Handled packet number 0 devnum:0 ZMII_FER:c0000000 Waiting for PHY auto negotiation to complete.. done TX_BUFF 0 @ 0x07fb24a8 RX_BUFF 0 @ 0x07ffce80 RX_BUFF 1 @ 0x07ffd480 RX_BUFF 2 @ 0x07ffda80 RX_BUFF 3 @ 0x07ffe080 Installing IRQ handlers //Own debug output Using ppc_440x_eth0 device ###########################################This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange.Formore information, connect to http://www.f-secure.com/

1 0

[U-Boot-Users] Re: Trouble in cfi_flash, help please!
by Yuli Barcohen 17 Jun '05

17 Jun '05

>>>>> Yusuf Ibrahim Ozkok writes: Yusuf> Thanks for your reply. I'm also still working on, to find out Yusuf> the magic. And I'm getting crazy, since it's a very easy Yusuf> issue I couldn't over come it :-( Yusuf> I have downloaded the last version of cfi_flash.c from Yusuf> CVS. So now it includes all the accepted patches. Yusuf> Below you can find the debug output. I defined "DEBUG" in Yusuf> include/common.h. I couldn't see any other command (0xff as Yusuf> you said) between 0x60 and 0xd0. It was in your previous mail. Probably some lines were not printed so it looked like a 0xff in the middle. Yusuf> So there shouldn't be a command sequence error actually. Yusuf> An other thing, I couldn't understand why we need to re Yusuf> protect all other sectors again in "flash_real_protect()". Yusuf> There is a comment in the code /* Intel's unprotect Yusuf> unprotects all locking */ Yusuf> But I tried it and found that other sectors are not being Yusuf> unlocked! ... It depends on the chip. For some chips, all sectors are unprotected, for others (like the chip you're working with) only one sector is unprotected. What I see from the debug prints is what I suspected: unprotect works OK but protecting already protected sector results in time-out (though Intel's docs don't say it's a forbidden operation). Note: time-out appears after 0x60 0x01 sequence, not after 0x60 0xD0. If you try to write/erase the sector which you tried to unprotect, I think you'll succeed. All sectors (on this chip) are protected after power-up so `protect off' will try to re-protect them. Correct operation would be reading sector protection status (it's available after Read ID command) and comparing it to the flash info structure. If the flash info indicates that the sector should be protected but it's unprotected, only then should the driver issue protect command. As a "quick and dirty" workaround, just `protect off all'. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

2 1

Re: [U-Boot-Users] PQ2FADS-ZU: PCI IDE with IT8212F
by KokHow Teh 17 Jun '05

17 Jun '05

Hi; Has anybody got IT8212F ide controller to work with u-boot? Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 06:27:57 PM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: u-boot-users(a)lists.sourceforge.net cc: Subject: [U-Boot-Users] PQ2FADS-ZU: PCI IDE Hi; I have ITE PCI IDE plugin card on my PQ2FADS-ZU and there is a device timeout when u-boot boots and try to read from the IDE drive. Any insight is appreciated. <whole bunch of ide_inb debug messages...> .ide_inb (dev= 0, port= 0x1c) : @ 0x8400001c -> 0x84 ** Timeout ** Hit any key to stop autoboot: 0 ## Booting image at fff80000 ... Bad Magic Number u-boot> printenv bootargs=root=/dev/mtdblock2 bootcmd=bootm fff80000 bootdelay=10 baudrate=115200 ethaddr=08:00:3E:33:44:56 ipaddr=147.128.28.44 serverip=147.128.28.42 gatewayip=147.128.28.1 netmask=255.255.254.0 hostname=PQ2FADS-ZU stdin=serial stdout=serial stderr=serial ethact=FCC2 ETHERNET Environment size: 278/262140 bytes u-boot> ide Usage: ide - IDE sub-system u-boot> ? ide ide reset - reset IDE controller ide info - show available IDE devices ide device [dev] - show or set current device ide part [dev] - print partition table of one or all IDE devices ide read addr blk# cnt ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#' to/from memory address `addr' u-boot> ide info u-boot> ide device no IDE devices available u-boot> pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1057 0x18c0 Bridge device 0x00 00.16.00 0x1283 0x8212 Mass storage controller 0x04 u-boot> ide device 0 IDE device 0: not available u-boot> Regards, TEH ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

[U-Boot-Users] More dtc changes
by David Gibson 17 Jun '05

17 Jun '05

I now have a git tree for the device tree compiler up at http://www.ozlabs.org/~dgibson/dtc/dtc.git Notable changes since the last tarball release: - Elementary support for labels. Labels can go on nodes or properties in the source tree and are exported to assembler output as usable symbols - phandle reference support. Cell data (< .. >) can include references of the form &/path/to/some/node and will be replaced in the output tree with the output node's phandle. A phandle will be generated for the target node if it doesn't already have one. There's a tarball release as well http://www.ozlabs.org/~dgibson/dtc/dtc.tar.gz -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/people/dgibson

3 4

[U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 processor that when the localbus is put into PCI mode with LBPC = 01, all accesses to 60x bus SDRAM fails. Uboot failed in get_ram_size() routine. The selection of localbus operation mode is done by SW9. Switch the jumper back to localbus SDRAM mode, U-boot boots to the prompt and access to 60x SDRAM is fine. Does anybody have similar experience? Any insight is appreciated. Regards, TEH

3 3

[U-Boot-Users] Trouble in cfi_flash, help please!
by Yusuf Ibrahim Ozkok 16 Jun '05

16 Jun '05

Hi, I'm still in trouble with cfi_flash. My previous posts on the subject can be reached by the following links; 1. http://sourceforge.net/mailarchive/forum.php?thread_id=7456151&forum_id=128… 2. http://sourceforge.net/mailarchive/forum.php?thread_id=7463406&forum_id=128… Every thing works well if I use command prompt of u-boot ( using mw.l and md commands as Yuli suggested.) mw.l ff000000 60606060 mw.l ff000000 d0d0d0d0 md ff000000 But somehow protect command which calls flash_real_protect insists on not to work :-( (Actually everything seems to be alright, but why it doesn't work!!!) I have modified flash_real_protect() as follows, to see what is going on. I can read status register first of all by sending the cmd 0x70. But whenever I send the command to unprotect a block I get a status of 0xb0 which indicates a failure! Below in the modified function, after sending cmd_protect I send a reset and clear status commands, because after calling protect off command at the command prompt, sending a 0x60 results with b0 on the status register. Then sending cmd_protect and clear_status and 0x60 results with 0x80(which is expected to) on the status register (returns from failure condition). So I tried that sequence in flash_real_protect(). int flash_real_protect (flash_info_t * info, long sector, int prot) { int retcode = 0; /*yio: flash_print_StatusBits(info, sector);*/ flash_write_cmd (info, sector, 0, 0x70); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", 0x70, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_CLEAR_STATUS, info->start[sector], *(unsigned long *)(info->start[sector])); udelay(10000); /*not needed but maybe I need to wait*/ flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); udelay(10000); /*not needed but maybe I need to wait*/ printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_RESET); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_RESET, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_CLEAR_STATUS, info->start[sector], *(unsigned long *)(info->start[sector])); flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT, info->start[sector], *(unsigned long *)(info->start[sector])); if (prot) flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); else { flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); printf("yio: after 0x%x addr=0x%x databus: 0x%x\n", FLASH_CMD_PROTECT_CLEAR, info->start[sector], *(unsigned long *)(info->start[sector])); } if ((retcode = flash_full_status_check (info, sector, info->erase_blk_tout, prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; /* Intel's unprotect unprotects all locking *yio/ if (prot == 0) { flash_sect_t i; printf("yio: entering for loop in flash_real_protect\n"); for (i = 0; i < info->sector_count; i++) { if (info->protect[i]) flash_real_protect (info, i, 1); } } ~yio*/ } printf("yio: flash_real_protect retcode=%d\n", retcode); return retcode; } Debug messages are below; => protect off ff000000 ff03ffff fwrite addr ff000000 cmd 70 0070007000700070 64 bit x 16 bit yio: after 0x70 addr=0xff000000 databus: 0x800080 fwrite addr ff000000 cmd 50 0050005000500050 64 bit x 16 bit yio: after 0x50 addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 60 0060006000600060 64 bit x 16 bit yio: after 0x60 addr=0xff000000 databus: 0xb000b0 fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit yio: after 0xff addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 50 0050005000500050 64 bit x 16 bit yio: after 0x50 addr=0xff000000 databus: 0x27051956 fwrite addr ff000000 cmd 60 0060006000600060 64 bit x 16 bit yio: after 0x60 addr=0xff000000 databus: 0xb000b0 fwrite addr ff000000 cmd d0 00d000d000d000d0 64 bit x 16 bit yio: after 0xd0 addr=0xff000000 databus: 0x27051956 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 yio: in flash_isset flash_is_busy: 1 long addr is at ff000000 info->portwidth = 8 addr[0] = 0x27 addr[1] = 0x5 addr[2] = 0x19 addr[3] = 0x56 addr[4] = 0x55 addr[5] = 0x2d addr[6] = 0x42 addr[7] = 0x6f addr[8] = 0x6f addr[9] = 0x74 addr[a] = 0x20 addr[b] = 0x31 addr[c] = 0x2e addr[d] = 0x31 addr[e] = 0x2e addr[f] = 0x32 addr[10] = 0x20 addr[11] = 0x28 addr[12] = 0x4a addr[13] = 0x75 addr[14] = 0x6e addr[15] = 0x20 addr[16] = 0x20 addr[17] = 0x37 addr[18] = 0x20 addr[19] = 0x32 addr[1a] = 0x30 addr[1b] = 0x30 addr[1c] = 0x35 addr[1d] = 0x20 addr[1e] = 0x2d addr[1f] = 0x20 Flash unprotect timeout at address ff000000 data 326f2037 fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit is= cmd 80(?) addr ff000000 is= 27051956552d426f 0080008000800080 Flash unprotect error at address ff000000 yio: in flash_isset yio: in flash_isset yio: in flash_isset yio: in flash_isset yio: in flash_isset fwrite addr ff000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit yio: flash_real_protect retcode=8 .Un-Protected 1 sectors => Thank you very much Yusuf Ibrahim Ozkok. ###################################################################### Dikkat: Bu elektronik posta mesaji kisisel ve ozeldir. Eger size gonderilmediyse lutfen gondericiyi bilgilendirip mesaji siliniz. Firmamiza gelen ve giden mesajlar virus taramasindan gecirilmekte, guvenlik nedeni ile kontrol edilerek saklanmaktadir. Mesajdaki gorusler ve bakis acisi gondericiye ait olup Aselsan A.S. resmi gorusu olmak zorunda degildir. ###################################################################### Attention: This e-mail message is privileged and confidential. If you are not the intended recipient please delete the message and notify the sender. E-mails to and from the company are monitored for operational reasons and in accordance with lawful business practices. Any views or opinions presented are solely those of the author and do not necessarily represent the views of the company. ######################################################################

2 1

[U-Boot-Users] OT: Linux kernel booting problem (help me!!)
by eagle keeper 16 Jun '05

16 Jun '05

Hi all, i' m hanged with this problem since 2 weeks ago... i wonder if anyone of you have any idea for resolve this matter... This is the output I have: -------------- ## Booting image at 00100000 ... Image Name: mercurio --- 10001 - Thu Jun Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 490783 Bytes = 479.3 kB Load Address: 00200000 Entry Point: 00200000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Memory BAT mapping: BAT2=16Mb, BAT3=0Mb, residual: 0Mb Linux version 2.4.25 (root@mercurio) (gcc version 3.3.3 (DENX ELDK 3.1.1 3.3.3-9 )) #2 Thu Jun 16 11:49:57 CEST 2005 On node 0 totalpages: 4096 zone(0): 4096 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: root=/dev/nfs rw nfsroot=141.137.67.254:/provaFS ip=141.137 .67.253:141.137.67.254:141.137.67.100:255.255.255.0:priscilla::off Warning: real time clock seems stuck! Calibrating delay loop... 79.87 BogoMIPS Memory: 15012k available (848k kernel code, 280k data, 40k init, 0k highmem) Dentry cache hash table entries: 2048 (order: 2, 16384 bytes) Inode cache hash table entries: 1024 (order: 1, 8192 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 4096 (order: 2, 16384 bytes) POSIX conformance testing by UNIFIX Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd CPM UART driver version 0.01 ttyS0 on SCC1 at 0x8000, BRG7 ttyS1 on SCC2 at 0x8100, BRG1 Serial driver version 5.05c (2001-07-08) with no serial options enabled Oops: kernel access of bad area, sig: 11 NIP: C007150C XER: 00000000 LR: C0075CAC SP: C0173E90 REGS: c0173de0 TRAP: 0300 Not tainted MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11 DAR: 000003F9, DSISR: 20000000 TASK = c0172000[1] 'swapper' Last syscall: 120 last math 00000000 last altivec 00000000 GPR00: 00000000 C0173E90 C0172000 C0173EA0 00000001 00000008 C00D622C 000003F8 GPR08: 00000000 000003F8 00000000 10000000 0000000D 7FFFFFFF 00FF5000 007FFF7D GPR16: 00200000 007FFF00 00FF8A30 00000000 003FF000 00000001 00BC3588 00FFF25C GPR24: 00000000 00123238 C0100000 C0173EA0 00000001 C01137C4 00000000 C00EF414 Call backtrace: 00123238 C00FD5F8 C00F75CC C00039D0 C0007FD8 Kernel panic: Attempted to kill init! <0>Rebooting in 180 seconds..Machine check in kernel mode. sCaubed fy ( rom1SRR0=41:00) ------------- did you ever verified somewhat like this? Any help/suggestion will be appreciated. Thanks in advance, Lele

2 1

[U-Boot-Users] PQ2FADS-ZU: PCI IDE
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I have ITE PCI IDE plugin card on my PQ2FADS-ZU and there is a device timeout when u-boot boots and try to read from the IDE drive. Any insight is appreciated. <whole bunch of ide_inb debug messages...> .ide_inb (dev= 0, port= 0x1c) : @ 0x8400001c -> 0x84 ** Timeout ** Hit any key to stop autoboot: 0 ## Booting image at fff80000 ... Bad Magic Number u-boot> printenv bootargs=root=/dev/mtdblock2 bootcmd=bootm fff80000 bootdelay=10 baudrate=115200 ethaddr=08:00:3E:33:44:56 ipaddr=147.128.28.44 serverip=147.128.28.42 gatewayip=147.128.28.1 netmask=255.255.254.0 hostname=PQ2FADS-ZU stdin=serial stdout=serial stderr=serial ethact=FCC2 ETHERNET Environment size: 278/262140 bytes u-boot> ide Usage: ide - IDE sub-system u-boot> ? ide ide reset - reset IDE controller ide info - show available IDE devices ide device [dev] - show or set current device ide part [dev] - print partition table of one or all IDE devices ide read addr blk# cnt ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#' to/from memory address `addr' u-boot> ide info u-boot> ide device no IDE devices available u-boot> pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1057 0x18c0 Bridge device 0x00 00.16.00 0x1283 0x8212 Mass storage controller 0x04 u-boot> ide device 0 IDE device 0: not available u-boot> Regards, TEH

1 0

[U-Boot-Users] bootloader on s3c2410(boot from NAND)
by zhuzhenhua 16 Jun '05

16 Jun '05

I have a board of s3c2410, with a 64M nand flash(k9f1208uom-ycb0), two 32M sdram( hy57v561620ct-h). I want to port uboot on this board, and now i get a uboot modified by someone,it can run to the command line like SMDK2410#. And i want to it autoboot the linux and rootfs.I have the linux kernel and rootfs.cramfs which run well on vivi.So i only make uimage with mkimage and then modify boot args in /include/configs/s3c2410.h. the code is as follow, but it can't boot and also the memory content in 0x32000000 is not the uimage. so i hope someone having experiences in the situation be nice to give some info or advices. thanks all best regards ./include/configs/s3c2410.h ................ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTARGS "initrd=0x30800000,0x200000 root=/dev/ram init=/linuxrc console=ttyS0,115200" #define CONFIG_LOAD_BOOT_FILE_NAME "vmlinux" #define CFG_LOAD_ADDR 0x32000000 #define CONFIG_LOAD_INITRD_FILE_NAME "ramdisk" #define CONFIG_LOAD_INITRD_FILE_ADDR 0x30800000 #define CONFIG_BOOTCOMMAND "nand read 32000000 80000 120000; nand read 30800000 300000 200000" .......... it's the start info U-Boot 1.0.2 (Jun 16 2005 - 12:21:47) U-Boot code: 33F00000 -> 33F388B4 BSS: -> 33F7B104 RAM Configuration: Bank #0: 30000000 64 MB start....## Unknown FLASH on Bank 0: ID 0xffff, Size = 0x00000000 = 0 MB Flash: 0 kB NAND: 64 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 NAND read: device 0 offset 524288, size 1179648 ... 1179648 bytes read: OK NAND read: device 0 offset 3145728, size 2097152 ... 2097152 bytes read: OK ## Booting image at 32000000 ... Bad Magic Number SMDK2410 # zzh 2005/6/16

2 3

[U-Boot-Users] "need help in mkfs.jffs2"
by nreddy＠netenrich.com 16 Jun '05

16 Jun '05

Hi Friends, This question may not be suitable for this group ,but still i have some home to get some clue on this issue. I have four files : 1)uImage(Linux Kernel) 2)initrd(File system) 3)Application_1 (Custom Alllication binary) 4)Application_1 (Custom Alllication binary) I have used mkfs.jffs2 tool to create "runImg" which is being loaded into my embedded system. I have loaded this file and this is working fine. Here the size of the "runImg" is less than the sum of all above 4 files. Now we need to put some more applications into the system. To achieve this i have zipped "Application_1 binary" and then created "runImg". This file also working fine,but the size of "runImg" is bigger than the sum of all above 4 files now(here Application_1 is zipped one). So i could not save any space after zipping one of the application. Can anyone help me in finding: why the mkfs.jffs2 is increasing file size when there are any zipped files? I have tried all the options of mkfs.jffs2,but could not succeded.. Thanks in Advance, Nagi Reddy

2 1

Re: [U-Boot-Users] Patch to cpu/mpc8260/speed.c
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; Sorry it was the MPC8280RMAD document that I was referring to. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 02:46:21 PM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: u-boot-users(a)lists.sourceforge.net cc: Subject: [U-Boot-Users] Patch to cpu/mpc8260/speed.c Hi; I am using u-boot-1.1.2 and I am sending this minor patch to the cpu/mpc8260/speed.c file in view of MPC8280EC document which lays down how the PCIDF is calculated but not reflected correctly in the file. Index: cpu/mpc8260/speed.c =================================================================== RCS file: /usr/cvsroot/u-boot/cpu/mpc8260/speed.c,v retrieving revision 1.2 diff -u -b -B -r1.2 speed.c --- cpu/mpc8260/speed.c 28 Apr 2005 07:01:04 -0000 1.2 +++ cpu/mpc8260/speed.c 16 Jun 2005 04:35:12 -0000 @@ -202,11 +202,12 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; corecnf_t *cp; sccr = immap->im_clkrst.car_sccr; dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; + pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; scmr = immap->im_clkrst.car_scmr; corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; @@ -243,8 +244,8 @@ cp->vco_div, cp->freq_60x, cp->freq_core); printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, " - "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, - pllmf); + "plldf %ld, pllmf %ld, pcidf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, + pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", gd->vco_out, gd->scc_clk, gd->brg_clk); @@ -253,10 +254,18 @@ gd->cpu_clk, gd->cpm_clk, gd->bus_clk); if (sccr & SCCR_PCI_MODE) { - uint pci_div; + uint pci_div, pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) + pci_div *= 5; + else if (pcidf == 0xB) + pci_div *= 6; + else + pci_div *= (pcidf + 1); + } else + pci_div = pcidf + 1; printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); } Regards, TEH ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Oops, sorry it should be "0" PCI_MODCK = 0 : PCICLK = MODCK PCI_MODCK = 1: PCICLK = MODCK / 2 "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 01:01:43 PM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have got the PCI interface of the board to run at 66.7 MHz by setting PCIMODCK to "1" at SW6. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 11:43:25 AM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks. /* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> /* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> Regards, TEH Yuli Barcohen <yuli(a)arabellasw.com> on 06/15/2005 11:18:46 PM To: "KokHow Teh" <KokHow.Teh(a)marconi.com> cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? >>>>> KokHow Teh writes: Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated. Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I have got the PCI interface of the board to run at 66.7 MHz by setting PCIMODCK to "1" at SW6. Regards, TEH "KokHow Teh" <KokHow.Teh(a)marconi.com>@lists.sourceforge.net on 06/16/2005 11:43:25 AM Sent by: u-boot-users-admin(a)lists.sourceforge.net To: "Yuli Barcohen <yuli" <yuli(a)arabellasw.com>, u-boot-users(a)lists.sourceforge.net cc: Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks. /* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> /* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> Regards, TEH Yuli Barcohen <yuli(a)arabellasw.com> on 06/15/2005 11:18:46 PM To: "KokHow Teh" <KokHow.Teh(a)marconi.com> cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? >>>>> KokHow Teh writes: Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated. Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
by KokHow Teh 16 Jun '05

16 Jun '05

Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks. /* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> /* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10) MPC8260 Reset Status: External Soft, External Hard MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000 CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot> Regards, TEH Yuli Barcohen <yuli(a)arabellasw.com> on 06/15/2005 11:18:46 PM To: "KokHow Teh" <KokHow.Teh(a)marconi.com> cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode? >>>>> KokHow Teh writes: Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated. Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

1 0

[U-Boot-Users] PATCH: arm gcc options && GCC version for Linux kernel?
by Peter Pearse 15 Jun '05

15 Jun '05

Hi ARM board users may be interested in the attached patch which patches mkconfig to detect which arm specific options are available & converts gcc calls in all config.mk files accordingly. It has been running happily with my nightly MAKEALL arm on the U-Boot CVS head for a couple of months. ------------------------- Peter.Pearse(a)arm.com ------------------------

2 1

[U-Boot-Users] problem on installing
by zhonglei 15 Jun '05

15 Jun '05

When I tried to install ELDK on my computer, the following things happened: [root@RD8linux u-boot]# /opt/ppc-2004-02-16/install -d /opt/eldk ppc_82xx Do you really want to install into /opt/eldk directory[y/n]?: y Creating directories /opt/eldk/bin/rpm: error while loading shared libraries: libbz2.so.1: cannot open shared object file: No such file or directory What's the problem?

3 2

[U-Boot-Users] [Newbie] Question on U-Boot POST
by Srivatsan CR 15 Jun '05

15 Jun '05

Hi all, My configuration is a U-Boot-1.1.2 working on MPC8280 based Rattler board. When I am trying to run Watchdog test on the card, it fails always. In the config file. Rattler.h, I have the following related to watchdog: #define CONFIG_WATCHDOG #define CONFIG_POST (CFG_POST_CPU | \ CFG_POST_WATCHDOG ) Is there anything else that is missed out? Thanks for all the help provided. With Regards, C.R.Srivatsan

2 1

[U-Boot-Users] Marvell 88E1111 PHY
by David Grab 15 Jun '05

15 Jun '05

Hello, my u-boot is now booting from flash. Big thanks to everyone helped me. ;-) But now i am configuring ethernet in u-boot for my 440GX Board. It uses Marvel 88E1111 PHY´s. Did someone worked with this PHY and u-boot or knows if it is supported? config file definitions: #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x5 /* PHY address, See schematics */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_NETMASK 255.255.252.0 #define CONFIG_IPADDR 192.168.0.116 #define CONFIG_ETHADDR 00:04:AC:E3:28:8A #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_IRQ | \ CFG_CMD_I2C | \ CFG_CMD_BEDBUG | \ CFG_CMD_ENV | \ CFG_CMD_MII | \ CFG_CMD_DIAG | \ CFG_CMD_PING | \ CFG_CMD_NET | \ CFG_CMD_ELF ) Thanks for any help, David

3 2

[U-Boot-Users] GCC version for Linux kernel?
by Allen Curtis 15 Jun '05

15 Jun '05

I am using GCC 3.4.2 for PowerPC. When you compile the Linux 2.4 PPC kernel you get lots of "deprecated" warning messages from the compiler. What is the recommended GCC version? TIA

6 14

RE: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x busSDRAMfailed when localbus is in PCI mode?
by Rune Torgersen 15 Jun '05

15 Jun '05

Because 826x doesn't use upm for SDRAM. It has its own SDRAM machine. > -----Original Message----- > From: Jason McMullan [mailto:jason.mcmullan@gmail.com] > Sent: Wednesday, June 15, 2005 10:12 > To: Rune Torgersen > Cc: KokHow Teh; U-Boot List > Subject: RE: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x > busSDRAMfailed when localbus is in PCI mode? > > On Wed, 2005-06-15 at 09:56 -0500, Rune Torgersen wrote: > > Make sure U-Boot doesn't try to initialize the SDRAM on the > localbus. > > > > Had that excact problem when I ported 8260ADS to 8266ADS. > > Current CVS head doesn't initialize it, (verified with appropriate > printk()s), but doesn't seem to disable it either. > > Oddly enough, 'upmconfig()' is never called in board/mpc8260ads/*.c > > -- > Jason McMullan <jason.mcmullan(a)gmail.com> > "Sure, send me the latest Knoppix DVD as an attachment..." >

2 1

RE: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAMfailed when localbus is in PCI mode?
by Rune Torgersen 15 Jun '05

15 Jun '05

Make sure U-Boot doesn't try to initialize the SDRAM on the localbus. Had that excact problem when I ported 8260ADS to 8266ADS. > -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > Of Jason McMullan > Sent: Wednesday, June 15, 2005 09:13 > To: KokHow Teh > Cc: U-Boot List > Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x > bus SDRAMfailed when localbus is in PCI mode? > > On Wed, 2005-06-15 at 17:42 +0800, KokHow Teh wrote: > > Hi; > > I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 > > processor that when the localbus is put into PCI mode with > LBPC = 01, all > > accesses to 60x bus SDRAM fails. Uboot failed in > get_ram_size() routine. > > The selection of localbus operation mode is done by SW9. > Switch the jumper > > back to localbus SDRAM mode, U-boot boots to the prompt and > access to 60x > > SDRAM is fine. Does anybody have similar experience? Any insight is > > appreciated. > > Me me! I'm in the same boat, and have exactly the same issues! > > I have an outstanding support request to Freescale, but if > get an answer > before I do, please post it here! > > -- > Jason McMullan <jason.mcmullan(a)gmail.com> > "Sure, send me the latest Knoppix DVD as an attachment..." >

2 1

[U-Boot-Users] How can I get board information(u-boot saved) from linux kernel
by jie han 15 Jun '05

15 Jun '05

I am new to U-Boot, I checked file:\include\asm\u-boot.h,it's defined struct bd_info,this struct store board information passed to linux kernel.How can I get this struct from linux kernel? If anyone knows of a way to get U-Boot saved board information from linux kernel,give me a hint,thanks advance. Sincerely, Jie __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

2 1

[U-Boot-Users] U-Boot Support for EP885C
by Will Haines 15 Jun '05

15 Jun '05

I am new to U-Boot, and I was wondering if anyone here knows of U-Boot support for the Embedded Planet EP885C board. I don't yet have the knowledge required to port the bootloader, but I know that my board is similar to some that U-Boot already supports. If anyone knows of a way to get U-Boot running on the EP885C, I would greatly appreciate some pointers. Much Thanks, Will Haines

2 3