December 2005 - U-Boot

[U-Boot-Users] uboot on an ipengine
by Charles Lockhart 15 Dec '05

15 Dec '05

I'm trying to get u-boot to run on an ipengine (mpc823 based device). BSE (company that makes the ipengine) told me to use the binary generated from the RPXLite configuration. I tried this, it didn't work, but I think I'm doing it wrong. I'm building everything with the ELDK. I was able to successfully build a zImage Linux kernel image (ELF), and I can get that to run by placing it at memory location 0x200000 and then telling the ipengine internal boot loader to jump to 0x210000. This bypasses the ELF header and jumps into the code, and it works great. I was thinking that maybe I have to do something like that for the u-boot image (also an ELF), but it didn't work. I was also successful using "ppc_8xx-objcopy -O binary zImage zImage.bin" to create a kernel image that booted directly (I place it at 0x200000 and have the internal bootloader jump directly to 0x200000), but when I tried this with the RPXLite u-boot image, it also didn't work. ELDK version is 3.1.1 (build 2005-06-07). U-boot version is off the cvs source tree from last week. The kernel that I built successfully was the linuxppc 2.4 also off the cvs source tree from last week. The other time I used u-boot (for an ml300 board) it came up pretty easily. This time I'm just not seeing something, but haven't figured out what yet. Thanks for your time, -Charles

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[U-Boot-Users] [PATCH] CFG_UNCOMPRESSED_LEN
by Rodolfo Giometti 14 Dec '05

14 Dec '05

Hello. Here a simple patch who adds a new configuration parameter. I found it useful, hope the same for you. :) Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] Disabling all ethernet initialisation stuff?
by Martin Egholm Nielsen 13 Dec '05

13 Dec '05

Hi there, If I disable the ethernet command from U-boot as specified in the README: #define CONFIG_COMMANDS (CFG_CMD_ALL & ~CFG_CMD_NET) will this make all ethernet initialisation stuff disappear? I'm kinda suspecting a bad PHY for being responsible for my u-boot not starting sometimes (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19759)... BR, Martin Egholm

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[U-Boot-Users] More info on porting required
by batsayan.das＠tcs.com 13 Dec '05

13 Dec '05

Hello, Is there any reference book/study material (other than U-boot/Linux documentation; mailing list ) available to port U-Boot/Linux on a PPC based customs board? Thanks Batsayan Das Tata Consultancy Services Limited Mailto: batsayan.das(a)tcs.com Website: http://www.tcs.com Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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RE: [U-Boot-Users] NAND driver issue
by Dave Ellis 12 Dec '05

12 Dec '05

December 10, 2005 Aubrey wrote: > On 12/10/05, Dave Ellis <DGE(a)sixnetio.com> wrote: > > I think the ECC code used to be broken unless CONFIG_MTD_NAND_ECC_JFFS2 > > is set in your board config file. > > > The macro CONFIG_MTD_NAND_ECC_JFFS2 is there black and white in the > file "common/cmd_nand.c". Should I add it again to my board config > file? It used to be commented out. I didn't realize it was fixed a long time ago since somehow the fix didn't make it into my local copy. Sorry for the noise. > On the other hand, If I don't want to work on the JFFS2 system, the > macro should be disabled. I mean this macro shouldn't affect the > direct read/write operation of the nand driver. It was broken when I worked on it (several years ago). The non-JFFS2 implementation conflicted with the bad block position set by the NAND manufacturers, so I just made the JFFS2 option work. Richard Woodruff fixed the conflict, but I don't think the present code will use the ECC for non-JFFS2 since eccvalid_pos is -1. I guess nobody cares, otherwise CONFIG_MTD_NAND_ECC_JFFS2 would be defined in the config files, not in cmd_nand.c. Anyhow, the ST NAND128W3 worked for me (with JFFS2 ECC) when I added the ids to the header files. Dave Ellis

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[U-Boot-Users] Question about porting u-boot
by Joe Culler 12 Dec '05

12 Dec '05

Hello there, I got a customized board, which is based on S3C2410. a 2MB NOR flash SST 39xF1601 and a 64M NAND flash K9F1208. In the file include/configs/smd2410.h: ... #ifdef CONFIG_AMD_LV800 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) #ifdef CONFIG_AMD_LV400 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) I don't know how to determine CFG_ENV_ADDR. Why does it add 0x0F0000 or 0x070000? Another question is If I save u-boot in NOR flash, can my kernel boot from NAND? or should I save u-boot in NAND? Thank you very much. Regards, Joe.

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Re: [U-Boot-Users] Booting IDE
by KokHow Teh 12 Dec '05

12 Dec '05

>To boot Linux from IDE, do i need to disk dump an image created by >u-boot mkimage at the beginning of a partition? if not, how am i >suppose to use bootdisk? >-- >Jesse M. Sacayanan http://www.denx.de/wiki/view/DULG/UsingPCCard

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[U-Boot-Users] Booting IDE
by jescythe 12 Dec '05

12 Dec '05

To boot Linux from IDE, do i need to disk dump an image created by u-boot mkimage at the beginning of a partition? if not, how am i suppose to use bootdisk? -- Jesse M. Sacayanan

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[U-Boot-Users] U-Boot CFI Flash driver incompleteness
by Nikita V. Youshchenko 11 Dec '05

11 Dec '05

Hello. While porting U-Boot to a custom board, I faced a situation when U-Boot failed to write of erase to the board flash chip. Flash chip is SG29GL32M10FAIR4 from Spansion, http://www.spansion.com/products/S29GL032A.html This is CFI-compatible NOR flash chip, that could be used both with 8-bit and 16-bit data bus, selected by hardware setup. In my case, it's in 8-bit mode. With linux MTD subsystem, write and erase work as expected. Here is what Linux drivers print about the chip when in verbose mode: physmap flash device: 400000 at 18000000 Number of erase regions: 2 Primary Vendor Command Set: 0002 (AMD/Fujitsu Standard) Primary Algorithm Table at 0040 Alternative Vendor Command Set: 0000 (None) No Alternate Algorithm Table Vcc Minimum: 2.7 V Vcc Maximum: 3.6 V No Vpp line Typical byte/word write timeout: 128 ╣s Maximum byte/word write timeout: 256 ╣s Typical full buffer write timeout: 128 ╣s Maximum full buffer write timeout: 4096 ╣s Typical block erase timeout: 1024 ms Maximum block erase timeout: 16384 ms Chip erase not supported Device size: 0x400000 bytes (4 MiB) Flash Device Interface description: 0x0002 - supports x8 and x16 via BYTE# with asynchronous interface Max. bytes in buffer write: 0x20 Number of Erase Block Regions: 2 Erase Region #0: BlockSize 0x2000 bytes, 8 blocks Erase Region #1: BlockSize 0x10000 bytes, 63 blocks phys_mapped_flash: Found 1 x16 devices at 0x0 in 8-bit bank Amd/Fujitsu Extended Query Table at 0x0040 number of CFI chips: 1 cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness. I examined u-boot CFI flash driver code, and the chip datasheet. Looks like u-boot driver defines offsets at which commands are written to the flash as constants, while flash datasheet states the addresses are different in 8bit and 16bit modes. I was able to make write and erase work by applying the following patch: diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index 4b7a110..292bda7 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -107,9 +107,15 @@ #define AMD_STATUS_TOGGLE 0x40 #define AMD_STATUS_ERROR 0x20 +#ifndef CONFIG_AMD_8BIT_FLASH #define AMD_ADDR_ERASE_START 0x555 #define AMD_ADDR_START 0x555 #define AMD_ADDR_ACK 0x2AA +#else +#define AMD_ADDR_ERASE_START 0xAAA +#define AMD_ADDR_START 0xAAA +#define AMD_ADDR_ACK 0x555 +#endif #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 and defining CONFIG_AMD_8BIT_FLASH in my board config file. I don't know if this is specific to the chip used, or for all chips with AMD command set that work in 8bit mode. If later, maybe it's better to fix the driver to automatically use valid addresses depending on width of the data bus. Nikita

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[U-Boot-Users] ramdisk image for arm kernel 2.6.10
by tharma＠e-consystems.com 11 Dec '05

11 Dec '05

I have ported the kernel image 2.6.10 amd ramdisk image . On booting the kernel i can't get the shell prompt . bootargs = console=ttySA0 mem=64M root=/dev/mtdblock2 rw how can i get the shell prompt ?

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[U-Boot-Users] [PATCH] Correct register for pci async mode on PPC440EP
by Youngchul Bang 10 Dec '05

10 Dec '05

Hi, Stefan This patch fixes the register for PCI async mode configuration information. Best regards, Youngchul Bang diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a463053..a26533c 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -57,7 +57,7 @@ int pci_async_enabled(void) #if defined(CONFIG_440EP) || defined(CONFIG_440GR) unsigned long val; - mfsdr(cpc0_strp1, val); + mfsdr(sdr_sdstp1, val); return (val & SDR0_SDSTP1_PAME_MASK); #endif }

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RE: [U-Boot-Users] NAND driver issue
by Dave Ellis 10 Dec '05

10 Dec '05

Thursday, December 08, 2005 11:33 AM Aubrey wrote: > But "nand read" and "nand write" failed because of ECC. So I try to > remove the macro "CONFIG_MTD_NAND_ECC" from the file > "common/cmd_nand.c", now it works. I can run "nand read" and "nand > write" successfully. The data wrote into the NAND flash and read back > is the same. I think the ECC code used to be broken unless CONFIG_MTD_NAND_ECC_JFFS2 is set in your board config file. Dave Ellis ~~~~~~~~~~~~~~~~~~~~~~~~~~ SIXNET - "Leading the Industrial Ethernet Revolution" 331 Ushers Road, P.O. Box 767, Clifton Park, NY 12065 USA Tel +1 (518) 877-5173 Fax +1 (518) 877-8346 Email me at: dge(a)sixnetio.com Detailed product info: www.sixnetio.com ~~~~~~~~~~~~~~~~~~~~~~~~~~

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[U-Boot-Users] [PATCH] Enabled time handling on 83xx
by Kumar Gala 09 Dec '05

09 Dec '05

Enabled time handling on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Enable time handling on 83xx Patch by Kumar Gala 09 Dec 2005 --- commit 0e1dbe02634177d369921208bd36cd8c875bc4a6 tree ee3e5b5a6b2e14280509a5f5d1eb4c137e6c73b3 parent 113d17d798e5770ff90bcfd9f7b21e080b91a8c9 author Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:22:03 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:22:03 -0600 cpu/mpc83xx/interrupts.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c index 53474f6..729de2a 100644 --- a/cpu/mpc83xx/interrupts.c +++ b/cpu/mpc83xx/interrupts.c @@ -43,6 +43,16 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { + DECLARE_GLOBAL_DATA_PTR; + + volatile immap_t *immr = (immap_t *) CFG_IMMR; + + *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; + + /* Enable e300 time base */ + + immr->sysconf.spcr |= 0x00400000; + return 0; }

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[U-Boot-Users] u-boot debug failure with BDI2000 on MPC8540ads and eval8540 (gdatech's 8540 board)
by emre kara 09 Dec '05

09 Dec '05

Dear All; I have bought a BDI2000 with BDIGDB-85xx s/w. I'll use it for freescale's mpc8540eval board (know as GDA8540) and freescale's MPC8560ads. I can succesfully program the flash, but I can't debug neither linux kernel (2.6.15) nor u-boot(version 1.1.3). We have already running systems included u-boot and linux,so I could (try) to debug both of them. There is a strange behavior while debugging u-boot. Target boots at (loop) state, a few steps later (with ti command or step on gdb),bdi2000 gives a error message "Core status is 0x0041 *** Core is stopped, no restart possible bdi2000" loses control over target and then it reads all the register zero, every time on the same address(0xfffff154) it happes again,any breakpoint greater then this address doesnt work. I have tried it 3 different versions of u-boot (1.1.2-1.1.3-and latest with CVS) programmed on flash, and 2 different hardwares, nothing has changed. Normally, all this u-boot images succcesfully can boot up the target(with reset run command) and all of them are fully functional. Can you please examine the log below? ------------------------------------------------ - TARGET: waiting for target Vcc - TARGET: processing power-up delay - TARGET: processing user reset request - BDI asserts HRESET - Reset JTAG controller passed - JTAG exists check passed - IDCODE is 0x1007001D - SVR is 0x80700020 - PVR is 0x80200020 - Core status is 0x0001 - Platform status is 0x0005 - SAP status is 0x0005 - CCSRBAR is 0x0_ff700000 - BDI scans platform HALT command - Core status is 0x0001 - Platform status is 0x0005 - SAP status is 0x0005 - BDI removes HRESET - BDI writes boot loop to L2SRAM - BDI scans platform RESUME command - TARGET: Target PVR is 0x80200020 - TARGET: resetting target passed - TARGET: processing target startup .... - TARGET: processing target startup passed BDI>conf BDI MAC : 00-0c-01-97-95-07 BDI IP : 192.168.11.101 BDI Subnet : 255.255.255.255 BDI Gateway : 255.255.255.255 Config IP : 192.168.11.1 Config File : ads8560.cfg BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP halt Current PC : 0xfffffffc Current CR : 0x00000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>bi 0xfffff14c Breakpoint identification is 0 BDI>go - TARGET: stopped BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : instruction breakpoint Current PC : 0xfffff14c Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : single step Current PC : 0xfffff150 Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : single step Current PC : 0xfffff154 Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti - Core status is 0x0041 *** Core is stopped, no restart possible # PPC: timeout while waiting for halt BDI> Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP freeze Current PC : 0x00000000 Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 # Step timeout detected BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP freeze Current PC : 0x00000000 Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI> and system craches until a "reset run" command --------------------------------------------------------------------- What can be cause this problem?. The configuration file of eval8540 is below (taken from ultsol web site). Abatron Model:BDI2000/C SerNo: 97950725 Loader: V1.05 Firmware:V1.04 bdiGDB for MPC85xx Logic:V1.05 PPC6xx/PPC7xx ;bdiGDB configuration file for Metrowerks eval board MPC8540 ;----------------------------------------------------------- ; ; The boot flash data bus is connected with swapped bytes. ; ; CPU D0 D1 ... D6 D7 | D8 D9 ... D14 D15 ; | | ... | | | | ... | | ; | | ... | | | | ... | | ; FLASH D7 D6 ... D1 D0 | D15 D14 ... D9 D8 ; ; ; [INIT] ; init core register ; ; define maximal transfer size ;TSZ4 0x00000000 0xffffffff ; ; Move the L2SRAM to the initial MMU page WM32 0xFF720000 0x68010000 ;L2CTL WM32 0xFF720100 0xFFFC0000 ;L2SRBAR0 WM32 0xFF720000 0xA8010000 ;L2CTL ; ; Clear l2 sram with dma (needed if STARTUP HALT) ;WM32 0xff721110 0x00040000 ;SATR0 SREADTTYPE=Read, don't snoop ;WM32 0xff721114 0xff700004 ;SAR0 Dummy source register ;WM32 0xff721118 0x00050000 ;DATR0 DWRITETTTYPE=Write, snoop local processor ;WM32 0xff721120 0x00040000 ;BCR0 Size ;WM32 0xff721100 0x0f009404 ;MR0 BWC=f,SAHTS=2(4 bytes),SAHE=1,SWSM=Dest,SRW=1,CTM=1,CS=0 ;WM32 0xff72111c 0xfffc0000 ;DAR0 which sets CS=1 ;DELAY 200 ;let DMA complete ; ; load and execute boot code (needed if STARTUP HALT) ;WM32 0xfffffffc 0x48000000 ;loop ;EXEC 0xfffffffc 1000 ; ; load TLB entries, helper code @ 0xfffff000 WM32 0xfffff000 0x7c0007a4 ;tlbwe WM32 0xfffff004 0x7c0004ac ;msync WM32 0xfffff008 0x48000000 ;loop ; ; 1MB TLB1 #1 0x40000000 - 0x400fffff WSPR 624 0x10010000 ;MAS0: WSPR 625 0x80000500 ;MAS1: WSPR 626 0x4000000a ;MAS2: WSPR 627 0x40000015 ;MAS3: WSPR 628 0x00000000 ;MAS4: EXEC 0xfffff000 ; ; 64 MB TLB1 #2 0xc0000000 - 0xc3ffffff WSPR 624 0x10020000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0xc0000008 ;MAS2: WSPR 627 0xc0000015 ;MAS3: EXEC 0xfffff000 ; ; 64 MB TLB1 #3 0x00000000 - 0x03ffffff WSPR 624 0x10030000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0x00000008 ;MAS2: WSPR 627 0x00000015 ;MAS3: EXEC 0xfffff000 ; ; 64 MB TLB1 #4 0x04000000 - 0x07ffffff WSPR 624 0x10040000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0x04000008 ;MAS2: WSPR 627 0x04000015 ;MAS3: EXEC 0xfffff000 ; ; 16 MB TLB1 #5 0xff000000 - 0xffffffff WSPR 624 0x10050000 ;MAS0: WSPR 625 0x80000700 ;MAS1: WSPR 626 0xff80000a ;MAS2: changed WSPR 627 0xff800015 ;MAS3: changed EXEC 0xfffff000 ; ; 16 MB TLB1 #0 0xf0000000 - 0xf0ffffff WSPR 624 0x10000000 ;MAS0: WSPR 625 0x80000700 ;MAS1: WSPR 626 0xf0000008 ;MAS2: WSPR 627 0xf0000015 ;MAS3: EXEC 0xfffff000 ; ; Remove the L2SRAM from the initial MMU page WM32 0xFF720000 0x28010000 ;L2CTL WM32 0xFF720000 0x28000000 ;L2CTL ; ; Move CCSRBAR to 0xfdf00000 WM32 0xff700000 0x000fdf00 ;CCSRBAR to 0xfdf00000 ; ; Initialize LAWBAR's WM32 0xfdf00C08 0x00000000 ;LAWBAR0 : @0x00000000 WM32 0xfdf00C10 0x80f0001b ;LAWAR0 : DDR/SDRAM 256MB ;WM32 0xfdf00C28 0x000c0000 ;LAWBAR1 : @0xc0000000 ;WM32 0xfdf00C30 0x8040001d ;LAWAR1 : Local Bus 1GB ; ; Setup DDR (Metrowerks eval board, 256MB DDR) WM32 0xfdf02000 0x00000007 ;CS0_BNDS WM32 0xfdf02080 0x80000101 ;CS0_CONFIG WM32 0xfdf02108 0x36342321 ;TIMING_CFG_1 WM32 0xfdf0210C 0x00000800 ;TIMING_CFG_2 WM32 0xfdf02110 0x02000000 ;DDR_SDRAM_CFG WM32 0xfdf02118 0x00000062 ;DDR_SDRAM_MODE WM32 0xfdf02124 0x03d00100 ;DDR_SDRAM_IVAL DELAY 200 WM32 0xfdf02110 0xc2000000 ;DDR_SDRAM_CFG ; ; Setup Flash chip select WM32 0xfdf05000 0xff801001 ;BR0 WM32 0xfdf05004 0xff806f67 ;OR0 ; ; Setup flash programming workspace in L2SRAM ;WM32 0x40020000 0x68010000 ;L2CTL ;WM32 0x40020100 0xf0000000 ;L2SRBAR0 ;WM32 0x40020000 0xA8010000 ;L2CTL ;WSPR 63 0xf0000000 ;IVPR to workspace ;WSPR 415 0x0001500 ;IVOR15 : Debug exception ;WM32 0xf0001500 0x48000000 ;write valid instruction ; ; Setup for program execution WM32 0xfdf20000 0x28010000 ;L2CTL WM32 0xfdf20000 0x28000000 ;L2CTL WSPR 63 0x00000000 ;IVPR to workspace WSPR 406 0x0000700 ;IVOR6 : Program exception WSPR 415 0x0001500 ;IVOR15 : Debug exception WM32 0x00000700 0x48000000 ;write valid instruction WM32 0x00001500 0x48000000 ;write valid instruction ; ; Clear flash Lock-Bits WM16 0xFF800000 0x6000 ;clear Lock-Bits command WM16 0xFF800000 0xD000 DELAY 1000 ;needs up to 0.7 sec WM16 0xFF800000 0xFFFF ;set flash to read mode ; [TARGET] ;***DONE*** MMU XLAT CPUTYPE 8540 ;the CPU type JTAGCLOCK 3 ;use 4 MHz JTAG clock STARTUP LOOP ;use boot loop in L2SRAM ;STARTUP HALT ;halt core while HRESET is asserted BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoint STEPMODE JTAG ;JTAG or HWBP, HWBP uses a hardware breakpoint WAKEUP 200 ;give reset time to complete ;POWERUP 5000 ;start delay after power-up detected in ms POWERUP 100 ;start delay after power-up detected in ms MEMACCESS SAP ;use SAP or CORE for JTAG memory accesses [HOST] IP 192.168.11.1 ;emreFILE E:\cygwin\home\demo\e500\fibo.elf ;emreFORMAT ELF ;emreLOAD MANUAL ;load code MANUAL or AUTO after reset ;emreDUMP D:\SCORE_PRO\BRIDGE_CARD\BDI2000\DUMP\e500.bin [FLASH] CHIPTYPE STRATAX16 CHIPSIZE 0x800000 ;The size of one flash chip in bytes BUSWIDTH 16 SWAP ;The bytes are swapped !!! WORKSPACE 0x00000000 ;workspace in system RAM ;WORKSPACE 0xf0000000 ;workspace in L2SRAM ;FILE E:\cygwin\home\bdidemo\e500\ads8560.cfg ;FORMAT BIN 0xFF800000 ;ERASE 0xFF800000 ;erase sector 0 ;ERASE 0xFF840000 ;erase sector 1 ;ERASE 0xFF880000 ;erase sector 2 ;ERASE 0xFF8C0000 ;erase sector 3 [REGS] FILE $reg8560.def Best Regards Emre KARA ___________________________________________________________ To help you stay safe and secure online, we've developed the all new Yahoo! Security Centre. http://uk.security.yahoo.com

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[U-Boot-Users] NAND driver issue
by Aubrey 09 Dec '05

09 Dec '05

Hi all, I'm trying to enable NAND driver in uboot for my target board. It's a ST nand chip, the part number is nand128w3a(small page, 16M*8bit). After add its data info into the matrix nand_flash_ids[] in the file "include/linux/mtd/nand_ids.h" and add the nand driver interface macros in my board head file, u-boot can find my NAND flash chip. And I can run the command "nand bad" successfully. But "nand read" and "nand write" failed because of ECC. So I try to remove the macro "CONFIG_MTD_NAND_ECC" from the file "common/cmd_nand.c", now it works. I can run "nand read" and "nand write" successfully. The data wrote into the NAND flash and read back is the same. I can make sure that the hardware is no problem. I know ECC is very important and can't be disabled. So, Is it a bug of NAND driver? Or did I miss something? Thanks for your any suggestions and comments. Regards, -Aubrey

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[U-Boot-Users] About SMDK2410 in uboot
by 周宇 08 Dec '05

08 Dec '05

We all know that there two nor flash (AM29LV800BB-90EC (1MB) and E28F128J3A150 (16MB,Unload),)in smdk2410 board. But we only see the init function for AM29LV800BB-90EC chipset. I don't know why the E28F128J3A150 don't want to be initialized. Who can tell why _________________________________________________________________ 与联机的朋友进行交流，请使用 MSN Messenger: http://messenger.msn.com/cn

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RE: [U-Boot-Users] IVPR on E500
by Nuno João (Ext_NBS) 08 Dec '05

08 Dec '05

Hello Kylo, Thank you for the answer. After the relocation done by your patch, IVPR is relocated again, to 0x0, when trap_init() (start.S) is called inside board_init_r(). trap_init() relocates the exception handlers to 0x0. This means that, when you get to the linux kernel boot, IVPR is at the same place as it was before your patch (this init_trap() code is earlier than your patch)... or am I missing something? Thank you and Best Regards On 12/8/05, Kylo Ginsberg <kylo.ginsberg(a)gmail.com> wrote: > That was my patch, but I need to work from memory as I'm at a > different job w/o an E500 at hand. As I recall, the problem was this: > --there is a window during very early linux startup when it has > removed the TLB entries setup by u-boot and is building its own > --using a BDI2000 trying to set breakpoints in this part of the linux code > --the E500 part wants to fetch the debug vector before passing control > to the BDI > --if this fetch goes to an unmapped region of address space, the E500 > is off in the weeds and stops responding to the BDI > Relocating the IVPR to ram at the same time that the rest of the image > is moved to ram addressed this problem. > I don't recall the third piece of code that you mention, so I don't > know how that interacts. (And my attempt to cg-clone u-boot.git gave > me a 404 error for one of the pack files part way through the > download; I'll try again later.) On 12/7/05, Nuno João (Ext_NBS) <nuno.joao-ext_nbs(a)siemens.com> wrote: > I've noticed some E500 related files (start.S and lib-ppc/board.c, > I don't know if others) have been changed with comment > "E500 update: repoint IVPR to RAM when code is relocated". > I don't understand the need for this change. Traps start in flash, > with IVPR set to TEXT_BASE in start.S. Later, this recent patch > relocates them to the same code but now in ram, after u-boot's > relocation. Later in lib_ppc/board.c:board_init_r() they are > then relocated to the beggining of ram (IVPR = 0). > Why do we need this "IVPR dance"? What does the "repoint IVPR do > RAM" patch fixes?

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[U-Boot-Users] Debugging U-boot
by Bashier Machmur 08 Dec '05

08 Dec '05

Hello, I'm using my custom board (PPC 440GX) and working with U-boot1.1.2 and Linux kernel 2.6.12. Now I have problems with debugging. When I start U-boot from Flash, it's working fine. But when I try debugging U-boot with BDI2000, it always hangs on PC: 0x00001300. ppc>go ppc>halt Core number :0 Core state :debug mode Debug entry cause :JTAG stop request Current PC :0x00001300 Current CR :0x22004022 Current MSR :0x00000000 Current LR :0xfffff144 ppc> Thanks for any help, Bashier

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[U-Boot-Users] IVPR on E500
by Nuno João (Ext_NBS) 08 Dec '05

08 Dec '05

Hello All, I've noticed some E500 related files (start.S and lib-ppc/board.c, I don't know if others) have been changed with comment "E500 update: repoint IVPR to RAM when code is relocated". I don't understand the need for this change. Traps start in flash, with IVPR set to TEXT_BASE in start.S. Later, this recent patch relocates them to the same code but now in ram, after u-boot's relocation. Later in lib_ppc/board.c:board_init_r() they are then relocated to the beggining of ram (IVPR = 0). Why do we need this "IVPR dance"? What does the "repoint IVPR do RAM" patch fixes? Thank you All and Best Regards, Nuno

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[U-Boot-Users] troubles
by Alexandr Kuleschov 07 Dec '05

07 Dec '05

Hi people! I work with based on AT91RM9200 board. (SDRAM 16Mbitx16) When i use "#define CONFIG_SKIP_LOWLEVEL_INIT" and "#define CONFIG_SKIP_RELOCATE_UBOOT" then U-BOOT does not work. But if to change a lines in file "/cpu/arm920t/at91rm9200/lowlevel_init.S" : ldr r0, =SMRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #32 //this number valid for me and ldr r0, =SMRDATA1 ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #160 //this number valid for me to a line ldr r0, =SMRDATA add r2, r0, #32 //this number valid for me and ldr r0, =SMRDATA1 add r2, r0, #160 //this number valid for me works correctly How to solve a problem? Thank Alexandr ------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Do you grep through log files for problems? Stop! Download the new AJAX search engine that makes searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] RE: U-Boot-Users digest, Vol 1 #1593 - 11 msgs
by atul.sabharwal＠exgate.tek.com 06 Dec '05

06 Dec '05

For the 870 PPC processors, there is a check get_immr(0xFFFF) > 0x800 to decide if it's a 866 and above processors. We are using IMMR at offset 0? The comment says that these processors have IMMR lower half at a higher address? The PLL's I am setting were working before. Any idea what might Be the problem with this check ? What does get_immr() return ? Value of IMMR or value of a register at an offset n from value of IMMR ? I am assuming the latter. -- Atul -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of u-boot-users-request(a)lists.sourceforge.net Sent: Wednesday, November 02, 2005 5:53 AM To: u-boot-users(a)lists.sourceforge.net Subject: U-Boot-Users digest, Vol 1 #1593 - 11 msgs Send U-Boot-Users mailing list submissions to u-boot-users(a)lists.sourceforge.net To subscribe or unsubscribe via the World Wide Web, visit https://lists.sourceforge.net/lists/listinfo/u-boot-users or, via email, send a message with subject or body 'help' to u-boot-users-request(a)lists.sourceforge.net You can reach the person managing the list at u-boot-users-admin(a)lists.sourceforge.net When replying, please edit your Subject line so it is more specific than "Re: Contents of U-Boot-Users digest..." Today's Topics: 1. Re: NetConsole tstc problems (Stefan Roese) 2. Re: NetConsole tstc problems (Wolfgang Denk) 3. Re: Low-boot configuration for MPC8272ADS (Bastos Fernandez Alexandre) 4. Re: Low-boot configuration for MPC8272ADS (Yuli Barcohen) 5. custom mpc83xx based board support (Boris) 6. Re: Low-boot configuration for MPC8272ADS (Dmytro Bablinyuk) 7. RE: custom mpc83xx based board support (Chu hanjin-r52514) 8. Re: custom mpc83xx based board support (Wolfgang Denk) 9. Re: Help about tftp download (Jerry Van Baren) 10. Re: NAND flash support (Ladislav Michl) 11. [PATCH] Add ECC check to MIP405 specific Memtest (Denis Peter) --__--__-- Message: 1 From: Stefan Roese <sr(a)denx.de> To: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] NetConsole tstc problems Date: Wed, 2 Nov 2005 08:51:57 +0100 Cc: Brian Prodoehl <bjprodoehl(a)uwalumni.com> Hi Brian, On Tuesday 01 November 2005 22:19, Brian Prodoehl wrote: > Has anyone else experienced problems with NetConsole's tstc? In > particular, defining CONFIG_BOOT_RETRY_TIME makes NetConsole almost > unusable for me, because then readline() in main.c blocks on tstc and the > result (for me, at least) is that NetConsole accepts a character every > second or so. Depending on your network driver, tstc() can take pretty long. I experienced a similar problem in sleep() using tstc() via ctrlc(). I solved this problem using a "better" timeout mechanism with get_timer(). This could probably help here too. > For everything that doesn't depend on tstc, NetConsole works > beautifully for me. I'm just wondering if anyone else has seen problems, or > if anyone has suggestions on how to make tstc less of a show-stopper > (something I haven't been able to accomplish). Take a look at the sleep() fix: http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=c4c13df284 cb06156c16ee6aef49b8d23be3fadd Best regards, Stefan --__--__-- Message: 2 To: Brian Prodoehl <bjprodoehl(a)uwalumni.com> Cc: u-boot-users(a)lists.sourceforge.net From: Wolfgang Denk <wd(a)denx.de> Subject: Re: [U-Boot-Users] NetConsole tstc problems Date: Wed, 02 Nov 2005 08:59:28 +0100 In message <20051101151924.c9ww4408kw8ososc(a)secure.uwalumni.com> you wrot= e: > Has anyone else experienced problems with NetConsole's tstc? In partic= ular, > defining CONFIG_BOOT_RETRY_TIME makes NetConsole almost unusable for me= , > because then readline() in main.c blocks on tstc and the result (for me= , at > least) is that NetConsole accepts a character every second or so. For > everything that doesn't depend on tstc, NetConsole works beautifully fo= r me.=20 > I'm just wondering if anyone else has seen problems, or if anyone has > suggestions on how to make tstc less of a show-stopper (something I hav= en't > been able to accomplish). Please use current code. A fix inthis area has been checked in a couple of days ago. Best regards, Wolfgang Denk --=20 Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Of course there's no reason for it, it's just our policy. --__--__-- Message: 3 From: Bastos Fernandez Alexandre <ALEBAS(a)televes.com> To: "'u-boot-users(a)lists.sourceforge.net'" <u-boot-users(a)lists.sourceforge.net> Cc: "'DmytroBablinyuk<dmytro.bablinyuk(a)rftechnology.com.au>'" <DmytroBablinyuk<dmytro.bablinyuk(a)rftechnology.com.au>> Date: Wed, 2 Nov 2005 09:28:17 +0100 Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS Dmytro, Please apply my patch with Flash HRCW for MPC8272ADS and try then the MPC8272ADS_lowboot_config. This worked fine for me http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19395 Best regards Alex BASTOS > -----Original Message----- > To: u-boot-users(a)lists.sourceforge.net > From: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> > Date: Wed, 02 Nov 2005 16:39:12 +1100 > Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS > > > > 1. I have updated (latest snapshot) u-boot: > > > > include/configs/MPC8260ADS.h > > > > #define CFG_HRCW_MASTER 0x0e72b605 > > > > board/mpc8260ads/config.mk > > > > TEXT_BASE = 0xff800000 > > 1. I tried 'make MPC8272ADS_lowboot_config' but it keeps resetting with > or without BDI attached (JP9 in position MEMORY, SW2 is FLASH ON). > > 2. Burn (to burn I need to move JP9 in position BCSR, otherwise it's > just resetting) > 8272>load > 8272>unlock 0xff800000 0x40000 32 > 8272>erase 0xFF800000 BLOCK > 8272>prog 0xFF800000 u-boot.bin BIN > > 3. Move JP9 in position MEMORY > > 4. Power cycle > > 5. Board keeps resetting with or without BDI. > > Can anybody help, please? > Thank you > > > > --__--__-- Message: 4 From: Yuli Barcohen <yuli(a)arabellasw.com> Date: Wed, 2 Nov 2005 11:46:39 +0200 To: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> CC: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Low-boot configuration for MPC8272ADS >>>>> Dmytro Bablinyuk writes: Dmytro> I've seen one thread on this subject Dmytro> http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/19224 Dmytro> and tried to repeat the same trick. Dmytro> 1. I have updated (latest snapshot) u-boot: Dmytro> include/configs/MPC8260ADS.h Dmytro> #define CFG_HRCW_MASTER 0x0e72b605 IMHO this HRCW value is incompatible with MPC8272 (reserved fields are not cleared, for example). Read the chip's manual to find correct values (or copy them from BCSR-supplied HRCW). Dmytro> board/mpc8260ads/config.mk Dmytro> TEXT_BASE = 0xff800000 This is unnecessary because lowboot_config takes care of TEXT_BASE. Dmytro> 2. Using BDI2000 (MPC8272ADS JP9 is configured to take Hard Dmytro> Reset Configuration source from BCSR - otherwise board Dmytro> keep reseting) Probably because your BDI configuration file tries to use default IMMR 0x0F000000 while in fact the IMMR is 0xF0000000 due to the HRCW. Dmytro> load Dmytro> unlock 0xff800000 0x40000 32 Dmytro> erase 0xFF800000 BLOCK Dmytro> prog 0xFF800000 u-boot.bin BIN Dmytro> 3. Change JP9 to take Hard Reset Configuration from FLASH Dmytro> (SW2 Boot Source is FLASH) Dmytro> After power cycling BDI and board - the board keep reseting Dmytro> (BDI is attached to the board). See above. Dmytro> Yes, 0xFFF00100 is not valid breakpoint anymore - I guess it Dmytro> should be something like 0x00000100. But I suspect even I Dmytro> got u-boot wrong BDI still should "freeze" the board instead Dmytro> of reseting. Is anyone got BDI and u-boot working on Dmytro> MPC8272ADS in low boot mode? Any help is really Dmytro> appreciated. Below is output of BDI while reseting and BDI Dmytro> init from config file. [...deleted...] -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== --__--__-- Message: 5 Date: Wed, 2 Nov 2005 01:54:54 -0800 (PST) From: Boris <br_sing(a)yahoo.com> To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] custom mpc83xx based board support Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com --__--__-- Message: 6 To: u-boot-users(a)lists.sourceforge.net From: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> Date: Wed, 02 Nov 2005 20:56:13 +1100 Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS > > Please apply my patch with Flash HRCW for MPC8272ADS and try > then the MPC8272ADS_lowboot_config. This worked fine for me > > http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19395 > Thank you very much Alex, As I understand, there is a patch that is not included in current u-boot snapshot. Sorry, could you please attach that patch or post a link (the link above is a link to my original message). Do you know why BDI keeps resetting - is it because HRCW couldn't be read? What about if flash is blank? Thank you --__--__-- Message: 7 From: Chu hanjin-r52514 <Hanjin.Chu(a)freescale.com> To: "'Boris'" <br_sing(a)yahoo.com>, u-boot-users(a)lists.sourceforge.net Subject: RE: [U-Boot-Users] custom mpc83xx based board support Date: Wed, 2 Nov 2005 18:09:07 +0800 You can take 8349ADS code as reference by make MPC8349ADS_config under u-boot. This code has worked on MPC8349E Processor Card made by Freescale. The 2.6 kernel also support this board. I think most of the code dont need to be modified. You can compare the hardware between your board and Freescale reference board. Best Regards Neil Chu -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of Boris Sent: Wednesday, November 02, 2005 5:55 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] custom mpc83xx based board support Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com ------------------------------------------------------- SF.Net email is sponsored by: Tame your development challenges with Apache's Geronimo App Server. Download it for free - -and be entered to win a 42" plasma tv or your very own Sony(tm)PSP. Click here to play: http://sourceforge.net/geronimo.php _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users --__--__-- Message: 8 To: Boris <br_sing(a)yahoo.com> Cc: u-boot-users(a)lists.sourceforge.net From: Wolfgang Denk <wd(a)denx.de> Subject: Re: [U-Boot-Users] custom mpc83xx based board support Date: Wed, 02 Nov 2005 11:58:17 +0100 In message <20051102095455.97277.qmail(a)web36315.mail.mud.yahoo.com> you w= rote: >=20 > I'm planning to prepare embedded Linux installation > on custom made board using mpc83xx CPU. As much as I > understand, to support it I'll need to write support=20 > code in boards directory and header file in=20 > include/configs. What are the chances that existing > code for mpc8349ads will work ? and if not can I cook It will not work. You will hav e to port U-Boot to your hardware. There is no way around this. > something based on this code with minimal changes ? > Another question is whether 2.6.* kernel configured > and built for mpc83xx family should work with any > board > based on this CPU or some board specific changes=20 > must be done in the kernel ?=20 Yes. See for example the TQM834x support in U-Boot and Linux 2.6 (patches submitted on the mailing list, checked in on our GIT repo). Best regards, Wolfgang Denk --=20 Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Gods don't like people not doing much work. People who aren't busy all the time might start to _think_. - Terry Pratchett, _Small Gods_ --__--__-- Message: 9 Date: Wed, 02 Nov 2005 07:58:32 -0500 From: Jerry Van Baren <gerald.vanbaren(a)smiths-aerospace.com> To: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Help about tftp download Li Weichen wrote: >>Another suggestion: from a (linux) box command line, tftp to your server >>and verify that it works. Your message is indicating that your server >>is 192.168.4.1 and the file you are trying to get is >>/tftpboot/u-boot.bin so do the following (I'm typing this from memory, >>so it may not be quite right)... >> >>$ tftp 192.168.4.1 >>tftp> get /tftpboot/u-boot.bin > > Sorry but after I typed tftp 192.168.4.1, it came up with message looks like > get uImage froam tftp server automatically. > >>Getting TFTP to work (i.e. properly configured) usually solves the >>problem in my experience. >> >>gvb Hi Li, You result description ment nothing to me. Please cut & paste real messages. Are you typing "tftp 192.168.4.1" from your _host_ (linux server) command line? OK, I ran a real instance on my home box (Debian 3.1 x86) vanbaren@dellserver:~$ uname -a Linux dellserver.lan 2.4.27-050821 #17 SMP Sun Aug 21 22:46:01 EDT 2005 i686 GNU/Linux vanbaren@dellserver:~$ dpkg-query -l "*tftp*" Desired=Unknown/Install/Remove/Purge/Hold | Status=Not/Installed/Config-files/Unpacked/Failed-config/Half-installed |/ Err?=(none)/Hold/Reinst-required/X=both-problems (Status,Err: uppercase=bad) ||/ Name Version Description +++-==============-==============-====================================== ====== ii tftp 0.17-13 Trivial file transfer protocol client ii tftpd 0.17-13 Trivial file transfer protocol server vanbaren@dellserver:~$ ls /tftpboot/hello_world hello_world vanbaren@dellserver:~$ tftp localhost tftp> get hello_world Received 101214 bytes in 0.1 seconds tftp> get /tftpboot/hello_world Received 101214 bytes in 0.0 seconds tftp> quit vanbaren@dellserver:~$ grep tftp /etc/inetd.conf tftp dgram udp wait nobody /usr/sbin/tcpd /usr/sbin/in.tftpd /tftpboot I was a little surprised that the tftp "get" worked with the /tftpboot full path. On a different box that I used (RH), it is configured as "-s /tftpboot" for the option (rather than "/tftpboot") so tftpd treats paths as relative to /tftpboot and thus the get "/tftpboot/foo" won't work because there is no /tftpboot/tftpboot/foo on the server. This should not be your problem since your configuration matches mine. HTH, gvb --__--__-- Message: 10 Date: Wed, 2 Nov 2005 14:18:53 +0100 To: Mike Rapoport <mike.rapoport(a)gmail.com> Cc: Wolfgang Denk <wd(a)denx.de>, Terence Soh <Terence.Soh(a)appliedbiosystems.com>, u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] NAND flash support From: Ladislav Michl <ladis(a)linux-mips.org> On Tue, Nov 01, 2005 at 04:22:28PM +0200, Mike Rapoport wrote: > I've tried to make it as clean as possible, but there still may be > some junk I used for debugging. Thanks a lot. Updated version (with timeout handling) follows - generated against testing-NAND branch. Wolfgang, could you apply? I also got another board with NAND chip for testing and I was able to reproduce your problem with with bus error. I'll look at it as soon as I get some spare time. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG: * Add hook to NAND erase and implement nand_wait function. Patch by Mike Rapoport, 1 Nov 2005 diff --git a/common/Makefile b/common/Makefile --- a/common/Makefile +++ b/common/Makefile @@ -37,7 +37,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug. cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ - cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_nand.o cmd_nand_new.o cmd_net.o cmd_nvedit.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o devices.o dlmalloc.o docecc.o \ diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c --- a/drivers/nand/nand_base.c +++ b/drivers/nand/nand_base.c @@ -189,7 +189,11 @@ static void nand_release_device (struct spin_unlock (&this->chip_lock); } #else -#define nand_release_device(mtd) do {} while(0) +static void nand_release_device (struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + this->select_chip(mtd, -1); /* De-select the NAND device */ +} #endif /** @@ -831,8 +835,34 @@ static int nand_wait(struct mtd_info *mt #else static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) { - /* TODO */ - return 0; + unsigned long timeo; + + if (state == FL_ERASING) + timeo = CFG_HZ * 400; + else + timeo = CFG_HZ * 20; + + if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) + this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); + else + this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + + reset_timer_masked(); + + while (1) { + if (get_timer_masked() > timeo) + return 0; + + if (this->dev_ready) { + if (this->dev_ready(mtd)) + break; + } else { + if (this->read_byte(mtd) & NAND_STATUS_READY) + break; + } + } + + return this->read_byte(mtd); } #endif diff --git a/include/bmp_logo.h b/include/bmp_logo.h diff --git a/include/nand.h b/include/nand.h --- a/include/nand.h +++ b/include/nand.h @@ -50,7 +50,14 @@ static inline int nand_block_isbad(nand_ static inline int nand_erase(nand_info_t *info, ulong off, ulong size) { - return 0; /* FIXME */ + struct erase_info instr; + + instr.mtd = info; + instr.addr = off; + instr.len = size; + instr.callback = 0; + + return info->erase(info, &instr); } #endif --__--__-- Message: 11 Date: Wed, 02 Nov 2005 13:49:03 +0100 To: wd(a)denx.de From: Denis Peter <d.peter(a)mpl.ch> Cc: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] [PATCH] Add ECC check to MIP405 specific Memtest --=====================_20085110==_ Content-Type: text/plain; charset="us-ascii"; format=flowed Dear Wolfgang, the attached patch against the current CVS adds ECC check to the MIP405 specific Memtest. CHANGELOG: * Patch by Denis Peter, 2. Nov 2005 add ECC Check to MIP405 specific Memtest With best regards, Denis ---------------------------------------------- MPL AG CH-5405 Daettwil Switzerland http://www.mpl.ch Tel. ++41 (0)56 483 34 34 Fax ++41 (0)56 493 30 20 --=====================_20085110==_ Content-Type: application/octet-stream; name="checkecc.patch" Content-Disposition: attachment; filename="checkecc.patch" Content-Transfer-Encoding: base64 ZGlmZiAtcHVyTiB1LWJvb3Qtb3JpZy9ib2FyZC9tcGwvY29tbW9uL21lbXRzdC5jIHUtYm9v dC9i b2FyZC9tcGwvY29tbW9uL21lbXRzdC5jCi0tLSB1LWJvb3Qtb3JpZy9ib2FyZC9tcGwvY29t bW9u L21lbXRzdC5jCTIwMDUtMTEtMDEgMTE6MjI6MzguMDAwMDAwMDAwICswMTAwCisrKyB1LWJv b3Qv Ym9hcmQvbXBsL2NvbW1vbi9tZW10c3QuYwkyMDA1LTExLTAxIDExOjMxOjE1LjAwMDAwMDAw MCAr MDEwMApAQCAtMjIsMjggKzIyLDYgQEAKICAqCiAgKi8KIAotLyogTk9UIFVzZWQgeWV0Li4u Ci0g IGFkZCBmb2xsb3dpbmcgY29kZSB0byBQSVA0MDUuYyA6Ci1pbnQgdGVzdGRyYW0gKHZvaWQp Ci17 Ci0JdW5zaWduZWQgY2hhciBzWzMyXTsKLQlpbnQgaTsKLQotCWkgPSBnZXRlbnZfciAoInRl c3Rt ZW0iLCBzLCAzMik7Ci0JaWYgKGkgIT0gMCkgewotCQlpID0gKGludCkgc2ltcGxlX3N0cnRv dWwg KHMsIE5VTEwsIDEwKTsKLQkJaWYgKChpID4gMCkgJiYgKGkgPCAweGYpKSB7Ci0JCQlwcmlu dGYg KCJ0ZXN0aW5nICIpOwotCQkJaSA9IG1lbV90ZXN0ICgwLCByYW1zaXplLCBpKTsKLQkJCWlm IChp ID4gMCkKLQkJCQlwcmludGYgKCJFUlJPUiAiKTsKLQkJCWVsc2UKLQkJCQlwcmludGYgKCJP ayAi KTsKLQkJfQotCX0KLQlyZXR1cm4gKDEpOwotfQotKi8KIAogCiAjaW5jbHVkZSA8Y29tbW9u Lmg+ CkBAIC01ODIsNiArNTYwLDUyIEBAIGludCBtZW1fdGVzdCAodW5zaWduZWQgbG9uZyBzdGFy dCwg dW5zaWcKIAkJd2hpbGUgKHByb2ctLSA+IDApCiAJCQlwcmludGYgKCJcYiBcYiIpOwogCX0K KyNp ZmRlZiBDT05GSUdfNDA1R1AKKwkvKiBDaGVjayBFQ0MgKi8KKwltdGRjciAobWVtY2ZnYSwg bWVt X2VjY2NmKTsKKwlpID0gbWZkY3IgKG1lbWNmZ2QpOworCWlmIChpKSB7IC8qIGVjYyBlbmFi bGVk ICovCisJCW10ZGNyIChtZW1jZmdhLCBtZW1fZWNjZXJyKTsKKwkJaSA9IG1mZGNyIChtZW1j Zmdk KTsKKwkJaSAmPSAweEZGRjBGMDAwOyAvKiBtYXNrIHVudXNlZCBiaXRzICovCisJCWlmIChp KSB7 CisJCQlwdXRzICgiXG5FUlJPUiBpbiBFQ0M6XG4iKTsKKwkJCWlmIChpICYgMHhGMDAwMDAw MCkg eworCQkJCWZvciAocHJvZyA9IDA7IHByb2cgPCA0O3Byb2crKykgeworCQkJCQkvKiB0aGlz IG1h eSBiZSBkb2N1bWVudGVkIHRoZSB3cm9uZyB3YXk6CisJCQkJCSAqIEFuIGVycm9yIG9uIEQ2 IGNh dXNlcyB0byBzZXQgdGhlIEVycm9yIGluIGxhbmUgMworCQkJCQkgKiBpbnN0ZWFkIG9mIGxh bmUg MAorCQkJCQkgKiBpZigoaSYweEYwMDAwMDAwKSAmICgweDEwMDAwMDAwIDw8IHByb2cpKQor CQkJ CQkgKi8KKwkJCQkJaWYgKChpICYgMHhGMDAwMDAwMCkgJiAoMHg4MDAwMDAwMCA+PiBwcm9n KSkK KwkJCQkJCXByaW50ZiAoIiAgLSBFdmVuIFdvcmQgTGFuZSAlZFxuIixwcm9nKTsKKwkJCQl9 CisJ CQl9CisJCQlpZiAoaSAmIDB4MEYwMDAwMDApIHsKKwkJCQlmb3IgKHByb2cgPSAwOyBwcm9n IDwg NDsgcHJvZysrKSB7CisJCQkJCS8qIHNlZSBhYm92ZSAqLworCQkJCQlpZiAoKGkgJiAweDBG MDAw MDAwKSAmICgweDA4MDAwMDAwID4+IHByb2cpKQorCQkJCQkJcHJpbnRmICgiICAtIE9kZCBX b3Jk IExhbmUgJWRcbiIscHJvZyk7CisJCQkJfQorCQkJfQorCQkJaWYgKGkgJiAweDAwQzAwMDAw KSB7 CisJCQkJcHJpbnRmICgiIC0gRUNDIEVycm9yIGluICVzJXNDaGVjayBCaXRzXG4iLAorCQkJ CQko aSAmIDB4MDA4MDAwMDApID8gImxvd2VyICIgOiAiIiwKKwkJCQkJKGkgJiAweDAwNDAwMDAw KSA/ ICJ1cHBlciAiIDogIiIpOworCQkJfQorCQkJaWYgKGkgJiAweDAwMDBGMDAwKSB7CisJCQkJ Zm9y IChwcm9nID0gMDsgcHJvZyA8IDQ7IHByb2crKykgeworCQkJCQlpZiAoKGkgJiAweDAwMDBG MDAw KSAmICgweDAwMDA4MDAwID4+IHByb2cpKQorCQkJCQkJcHJpbnRmICgiICAtIGluIEJhbmsg JWRc biIscHJvZyk7CisJCQkJfQorCQkJfQorCQkJc3RhdHVzPVRFU1RfRkFJTEVEOworCQl9CisJ CWVs c2UgeworCQkJcHV0cyAoIlxuRUNDIEJpdCdzIE9rXG4iKTsKKwkJfQorCX0KKyNlbmRpZgog CiAJ aWYgKHN0YXR1cyA9PSBURVNUX0ZBSUxFRCkKIAkJZXJyb3JzKys7Cg== --=====================_20085110==_-- --__--__-- _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users End of U-Boot-Users Digest

2 1

RE: [U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix
by Jate Sujjavanich 06 Dec '05

06 Dec '05

This patch is properly formatted. Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 18:16:22 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) +AFLAGS_DEBUG := -Wa,-gstabs,-S +endif +else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of Jate Sujjavanich Sent: Tuesday, December 06, 2005 12:08 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 16:57:10 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) AFLAGS_DEBUG := +-Wa,-gstabs,-S endif else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)

1 0

[U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix
by Jate Sujjavanich 06 Dec '05

06 Dec '05

I have been searching the archives for the solution to this problem when compiling u-boot for the M5282EVB with GCC 3.4.0: /home/jate/tim-firmware/u-boot/cpu/mcf52x2/start.S:345: Fatal error: Tried to convert PC relative conditional branch to absolute jump Turning on the -S option fixes this. This led to this error: flash.c: In function `flash_print_info': flash.c:69: error: label at end of compound statement This is also fixed below. I do not have an M5282EVB board, so I cannot test the binaries generated. Can anyone help test? - Jate S. Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 16:57:10 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) +AFLAGS_DEBUG := -Wa,-gstabs,-S +endif +else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) Index: flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/board/m5282evb/flash.c,v retrieving revision 1.1 diff -u -r1.1 flash.c --- flash.c 8 Dec 2003 01:34:37 -0000 1.1 +++ flash.c 6 Dec 2005 16:30:08 -0000 @@ -65,6 +65,7 @@ printf ("\n"); Done: + ; /* for gcc3.4.0 compiling */ }

1 0

[U-Boot-Users] PPC405EP CPC0_PCI init vs. update
by Scott McNutt 06 Dec '05

06 Dec '05

Hi All, In cpu/ppc4xx/start.S, the CPC0_PCI register is _initialized_, rather than being simply _updated_. This clears bits that are set during bootstrap from a serial eeprom. E.g. for the PerWE/PCI_INT mux, CPC0_PCI[SPE] always gets cleared. I'm proposing a simple change and would like some feedback ... it's not clear to me if this will cause problems for existing boards. Comments welcome :-) Regards, --Scott =============================================================== --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1539,7 +1539,8 @@ ppc405ep_init: mtdcr ebccfgd,r3 #endif - addi r3,0,CPC0_PCI_HOST_CFG_EN + mfdcr r3, CPC0_PCI + ori r3,r3,CPC0_PCI_HOST_CFG_EN #ifdef CONFIG_BUBINGA /* !-----------------------------------------------------------------------

2 1

RE: [U-Boot-Users] mpc85xx FCC ethernet
by Nuno João (Ext_NBS) 06 Dec '05

06 Dec '05

Hello All, The problem has been solved. The only change necessary to put current u-boot's mpc85xx FCC code to work on MPC8541E is the one that I mentioned in my first email in this thread. The other one was a typical case of "problem between the monitor and the chair", discovered by my collegue Steffen: I was doing tftp to ram address 0x0 :|. Thank you and Best Regards > My main question is: has anyone ever used FCC as ethernet on u-boot > for mpc85xx, and with what success?

1 0

[U-Boot-Users] troubles
by Alexandr Kuleschov 06 Dec '05

06 Dec '05

Hi people! I work with based on AT91RM9200 board. (SDRAM 16Mbitx16) When i use "mtest" then U-BOOT does not work But if to change a line #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 to a line #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 2000000 works correctly How to solve a problem? Thank Alexandr

2 1

RE: [U-Boot-Users] mpc85xx FCC ethernet
by Ho Jeffrey-r26191 06 Dec '05

06 Dec '05

MPC8541/55 have CPM lite compare to CPM for MPC8560. The dport ram size is different. To make the FCC code work for CPM lite, the dport RAM pointers (various pointers used by the RISC) need to be adjusted. Regards, Jeffrey Ho > -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > Of Wolfgang Denk > Sent: Tuesday, December 06, 2005 4:12 AM > To: Nuno Joao (Ext_NBS) > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: [U-Boot-Users] mpc85xx FCC ethernet > > In message > <0248B0F35AF7B8418CA72E88AC00BF1F8884A9(a)lisi053a.siemens.pt> > you wrote: > > > > My main question is: has anyone ever used FCC as ethernet on u-boot > > for mpc85xx, and with what success? > > It works well for us on MPC8560, and also the FEC on the > MPC8540 works fine. But the same code on the basicly the > same hardware (just different CPU) fails for MPC8541 and MPC8555. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: > wd(a)denx.de Some people march to the beat of a different > drummer. And some people tango! > > > ------------------------------------------------------- > This SF.net email is sponsored by: Splunk Inc. Do you grep > through log files > for problems? Stop! Download the new AJAX search engine that makes > searching your log files as easy as surfing the web. > DOWNLOAD SPLUNK! > http://ads.osdn.com/?ad_idv37&alloc_id865&op=click > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users >

1 0

[U-Boot-Users] mpc85xx FCC ethernet
by Nuno João (Ext_NBS) 05 Dec '05

05 Dec '05

Hello All, I'm trying to use ethernet FCC on an board using MPC8541E, and I'm having some problems. First of all, current code on u-boot has a "known issue" that prevents it from working, which makes me wonder if someone out there has ever used this code. You can find further details at http://ozlabs.org/pipermail/linuxppc-embedded/2004-November/016050.html but, basically, there was a parameter set to use a reserved area in DPRAM. I changed CPM_FCC_SPECIAL_BASE fro 0xb000 to 0x9000 on include/asm-ppc/cpm_85xx.h. However, even with this change, I can only do tftp of small files (a 1 to 3 tftp packets), otherwise u-boot hangs. If I stop it afterward with a debugger, the CPU is executing in "no man's land". My main question is: has anyone ever used FCC as ethernet on u-boot for mpc85xx, and with what success? Thanks and Best Regards, Nuno

2 1

[U-Boot-Users] build error probably due to include file paths problem
by Surinder 05 Dec '05

05 Dec '05

Hi, I downloaded u-boot-1.1.3.tar from and untarred as u-boot-1.1.3 sh-3.00$ uname -a Linux linux 2.6.13-15-default #1 Tue Sep 13 14:56:15 UTC 2005 i686 i686 i386 GNU/Linux sh-3.00$ cat /etc/issue Welcome to SUSE LINUX 10.0 (i586) - Kernel \r (\l). # echo $PATH /export/em/gnuarm/gnuarm-3.4.3/libexec/gcc/arm-elf/3.4.3:/export/em/gnuarm/gnuarm-3.4.3/arm-elf/bin:/export/em/gnuarm/gnuarm-3.4.3/bin:/home/surinder/bin:/usr/local/bin:/usr/bin:/usr/X11R6/bin:/bin:/usr/games:/opt/gnome/bin:/opt/kde3/bin:/usr/lib/mit/bin:/usr/lib/mit/sbin I got the gnuarm from gnuarm.org # arm-elf-gcc -v Reading specs from /export/em/gnuarm/gnuarm-3.4.3/bin/../lib/gcc/arm-elf/3.4.3/specs Configured with: ../gcc-3.4.3/configure --target=arm-elf --prefix=/srv/shared/gnuarm/gnuarm-3.4.3 --enable-interwork --enable-multilib --with-newlib --with-headers=../newlib-1.12.0/newlib/libc/include --enable-languages=c,c++,java --disable-libgcj Thread model: single gcc version 3.4.3 # arm-elf-gcc -dumpmachine arm-elf changed the CROSS_COMPILE in file u-boot-1.1.3/Makefile CROSS_COMPILE = arm-elf- # make distclean # make omap5912osk_config Configuring for omap5912osk board... # make ( it gives a lot of short-load-bytes errors ) cc1: error: invalid option `short-load-bytes' in README I saw using 'make all' too so tried that It appears to be unable to find some header files but I could not figure out the best way to specify that. I was looking for some INCLUDES kind of variable. # make all sh-3.00$ make all make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/tools' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/tools' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/examples' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/examples' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/post' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/post' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/post/cpu' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/post/cpu' make -C tools all make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/tools' gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c -o img2srec.o img2srec.c img2srec.c:55:20: stddef.h: No such file or directory img2srec.c:56:19: stdio.h: No such file or directory img2srec.c:57:20: stdlib.h: No such file or directory img2srec.c:58:19: ctype.h: No such file or directory img2srec.c:59:20: string.h: No such file or directory In file included from img2srec.c:60: ../include/elf.h:58: error: parse error before "Elf32_Addr" ../include/elf.h:58: error: ISO C forbids data definition with no type or storage class ../include/elf.h:59: error: parse error before "Elf32_Off" ../include/elf.h:59: error: ISO C forbids data definition with no type or storage class ../include/elf.h:60: error: parse error before "Elf32_Sword" ../include/elf.h:60: error: ISO C forbids data definition with no type or storage class ../include/elf.h:61: error: parse error before "Elf32_Word" ../include/elf.h:61: error: ISO C forbids data definition with no type or storage class ../include/elf.h:62: error: parse error before "Elf32_Half" ../include/elf.h:62: error: ISO C forbids data definition with no type or storage class ../include/elf.h:123: error: parse error before "Elf32_Half" ../include/elf.h:124: error: ISO C forbids data definition with no type or storage class ../include/elf.h:125: error: parse error before "e_version" ../include/elf.h:125: error: ISO C forbids data definition with no type or storage class ../include/elf.h:126: error: parse error before "e_entry" ../include/elf.h:126: error: ISO C forbids data definition with no type or storage class ../include/elf.h:127: error: parse error before "e_phoff" ../include/elf.h:127: error: ISO C forbids data definition with no type or storage class ../include/elf.h:128: error: parse error before "e_shoff" ../include/elf.h:128: error: ISO C forbids data definition with no type or storage class ../include/elf.h:129: error: parse error before "e_flags" ../include/elf.h:129: error: ISO C forbids data definition with no type or storage class ../include/elf.h:130: error: parse error before "e_ehsize" ../include/elf.h:130: error: ISO C forbids data definition with no type or storage class ../include/elf.h:131: error: parse error before "e_phentsize" ../include/elf.h:131: error: ISO C forbids data definition with no type or storage class ../include/elf.h:132: error: parse error before "e_phnum" ../include/elf.h:132: error: ISO C forbids data definition with no type or storage class ../include/elf.h:133: error: parse error before "e_shentsize" ../include/elf.h:133: error: ISO C forbids data definition with no type or storage class ../include/elf.h:134: error: parse error before "e_shnum" ../include/elf.h:134: error: ISO C forbids data definition with no type or storage class ../include/elf.h:135: error: parse error before "e_shstrndx" ../include/elf.h:135: error: ISO C forbids data definition with no type or storage class ../include/elf.h:137: error: ISO C forbids data definition with no type or storage class ../include/elf.h:243: error: parse error before "Elf32_Word" ../include/elf.h:245: error: ISO C forbids data definition with no type or storage class ../include/elf.h:246: error: parse error before "sh_flags" ../include/elf.h:246: error: ISO C forbids data definition with no type or storage class ../include/elf.h:247: error: parse error before "sh_addr" ../include/elf.h:247: error: ISO C forbids data definition with no type or storage class ../include/elf.h:248: error: parse error before "sh_offset" ../include/elf.h:248: error: ISO C forbids data definition with no type or storage class ../include/elf.h:249: error: parse error before "sh_size" ../include/elf.h:249: error: ISO C forbids data definition with no type or storage class ../include/elf.h:250: error: parse error before "sh_link" ../include/elf.h:250: error: ISO C forbids data definition with no type or storage class ../include/elf.h:251: error: parse error before "sh_info" ../include/elf.h:251: error: ISO C forbids data definition with no type or storage class ../include/elf.h:252: error: parse error before "sh_addralign" ../include/elf.h:252: error: ISO C forbids data definition with no type or storage class ../include/elf.h:253: error: parse error before "sh_entsize" ../include/elf.h:253: error: ISO C forbids data definition with no type or storage class ../include/elf.h:254: error: ISO C forbids data definition with no type or storage class ../include/elf.h:353: error: parse error before "Elf32_Word" ../include/elf.h:354: error: ISO C forbids data definition with no type or storage class ../include/elf.h:355: error: parse error before "st_size" ../include/elf.h:355: error: ISO C forbids data definition with no type or storage class ../include/elf.h:358: error: parse error before "st_shndx" ../include/elf.h:358: error: ISO C forbids data definition with no type or storage class ../include/elf.h:359: error: ISO C forbids data definition with no type or storage class ../include/elf.h:403: error: parse error before "Elf32_Addr" ../include/elf.h:404: error: ISO C forbids data definition with no type or storage class ../include/elf.h:405: error: ISO C forbids data definition with no type or storage class ../include/elf.h:410: error: parse error before "Elf32_Addr" ../include/elf.h:411: error: ISO C forbids data definition with no type or storage class ../include/elf.h:412: error: parse error before "r_addend" ../include/elf.h:412: error: ISO C forbids data definition with no type or storage class ../include/elf.h:413: error: ISO C forbids data definition with no type or storage class ../include/elf.h:422: error: parse error before "Elf32_Word" ../include/elf.h:423: error: ISO C forbids data definition with no type or storage class ../include/elf.h:424: error: parse error before "p_vaddr" ../include/elf.h:424: error: ISO C forbids data definition with no type or storage class ../include/elf.h:425: error: parse error before "p_paddr" ../include/elf.h:425: error: ISO C forbids data definition with no type or storage class ../include/elf.h:426: error: parse error before "p_filesz" ../include/elf.h:426: error: ISO C forbids data definition with no type or storage class ../include/elf.h:427: error: parse error before "p_memsz" ../include/elf.h:427: error: ISO C forbids data definition with no type or storage class ../include/elf.h:428: error: parse error before "p_flags" ../include/elf.h:428: error: ISO C forbids data definition with no type or storage class ../include/elf.h:429: error: parse error before "p_align" ../include/elf.h:429: error: ISO C forbids data definition with no type or storage class ../include/elf.h:430: error: ISO C forbids data definition with no type or storage class ../include/elf.h:457: error: parse error before "Elf32_Sword" ../include/elf.h:460: error: parse error before "Elf32_Word" ../include/elf.h:461: error: ISO C forbids data definition with no type or storage class ../include/elf.h:462: error: ISO C forbids data definition with no type or storage class ../include/elf.h:463: error: parse error before '}' token ../include/elf.h:463: error: ISO C forbids data definition with no type or storage class ../include/elf.h:465: error: parse error before "_DYNAMIC" ../include/elf.h:465: error: ISO C forbids data definition with no type or storage class img2srec.c:61:20: unistd.h: No such file or directory img2srec.c:62:19: errno.h: No such file or directory img2srec.c:81: error: parse error before "CHAR" img2srec.c:81: warning: type defaults to `int' in declaration of `CHAR' img2srec.c:81: error: ISO C forbids data definition with no type or storage class img2srec.c:82: error: parse error before "BYTE" img2srec.c:82: warning: type defaults to `int' in declaration of `BYTE' img2srec.c:82: error: ISO C forbids data definition with no type or storage class img2srec.c:83: error: parse error before "WORD" img2srec.c:83: warning: type defaults to `int' in declaration of `WORD' img2srec.c:83: error: ISO C forbids data definition with no type or storage class img2srec.c:84: error: parse error before "DWORD" img2srec.c:84: warning: type defaults to `int' in declaration of `DWORD' img2srec.c:84: error: ISO C forbids data definition with no type or storage class img2srec.c:95: error: parse error before '*' token img2srec.c:96: error: parse error before '*' token img2srec.c:97: error: parse error before '*' token img2srec.c:98: error: parse error before '*' token img2srec.c:98: error: parse error before '*' token img2srec.c:98: warning: type defaults to `int' in declaration of `ExtractWord' img2srec.c:98: error: ISO C forbids data definition with no type or storage class img2srec.c:99: error: parse error before '*' token img2srec.c:99: error: parse error before '*' token img2srec.c:99: warning: type defaults to `int' in declaration of `ExtractLong' img2srec.c:99: error: ISO C forbids data definition with no type or storage class img2srec.c:100: error: parse error before '*' token img2srec.c:100: error: parse error before "count" img2srec.c:100: warning: type defaults to `int' in declaration of `ExtractBlock'img2srec.c:100: error: ISO C forbids data definition with no type or storage class img2srec.c:101: error: parse error before "BYTE" img2srec.c:102: error: parse error before "WORD" img2srec.c:104: error: parse error before "DWORD" img2srec.c:111: error: parse error before '*' token img2srec.c: In function `ExtractHex': img2srec.c:113: error: parse error before "num" img2srec.c:117: error: `getPtr' undeclared (first use in this function) img2srec.c:117: error: (Each undeclared identifier is reported only once img2srec.c:117: error: for each function it appears in.) img2srec.c:118: error: `num' undeclared (first use in this function) img2srec.c:120: error: `c' undeclared (first use in this function) img2srec.c:121: error: `digit' undeclared (first use in this function) img2srec.c:121: error: called object is not a function img2srec.c:122: error: called object is not a function img2srec.c:123: error: called object is not a function img2srec.c:129: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:133: error: parse error before '*' token img2srec.c: In function `ExtractDecimal': img2srec.c:135: error: parse error before "num" img2srec.c:139: error: `getPtr' undeclared (first use in this function) img2srec.c:140: error: `num' undeclared (first use in this function) img2srec.c:142: error: `c' undeclared (first use in this function) img2srec.c:143: error: `digit' undeclared (first use in this function) img2srec.c:143: error: called object is not a function img2srec.c:149: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:154: error: parse error before '*' token img2srec.c: In function `ExtractNumber': img2srec.c:158: error: `getPtr' undeclared (first use in this function) img2srec.c:165: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:174: error: parse error before '*' token img2srec.c:174: error: parse error before '*' token img2srec.c:175: warning: return type defaults to `int' img2srec.c: In function `ExtractWord': img2srec.c:176: error: parse error before "x" img2srec.c:177: error: `x' undeclared (first use in this function) img2srec.c:177: error: `buffer' undeclared (first use in this function) img2srec.c:179: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:184: error: parse error before '*' token img2srec.c:184: error: parse error before '*' token img2srec.c:185: warning: return type defaults to `int' img2srec.c: In function `ExtractLong': img2srec.c:186: error: parse error before "x" img2srec.c:187: error: `x' undeclared (first use in this function) img2srec.c:187: error: `buffer' undeclared (first use in this function) img2srec.c:191: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:196: error: parse error before '*' token img2srec.c:196: error: parse error before "count" img2srec.c:197: warning: return type defaults to `int' img2srec.c: In function `ExtractBlock': img2srec.c:198: error: `count' undeclared (first use in this function) img2srec.c:198: error: `data' undeclared (first use in this function) img2srec.c:198: error: `buffer' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:203: error: parse error before "BYTE" img2srec.c: In function `WriteHex': img2srec.c:205: error: parse error before "temp" img2srec.c:209: error: `pCheckSum' undeclared (first use in this function) img2srec.c:209: error: `value' undeclared (first use in this function) img2srec.c:210: error: `temp' undeclared (first use in this function) img2srec.c:211: error: `pa' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:218: error: parse error before "WORD" img2srec.c: In function `BuildSRecord': img2srec.c:221: error: parse error before "addrLen" img2srec.c:226: error: `sType' undeclared (first use in this function) img2srec.c:230: error: `addrLen' undeclared (first use in this function) img2srec.c:241: error: `pa' undeclared (first use in this function) img2srec.c:246: error: `sRLen' undeclared (first use in this function) img2srec.c:246: error: `nCount' undeclared (first use in this function) img2srec.c:247: error: `checkSum' undeclared (first use in this function) img2srec.c:248: error: parse error before "sRLen" img2srec.c:251: error: `i' undeclared (first use in this function) img2srec.c:252: error: `addr' undeclared (first use in this function) img2srec.c:252: error: called object is not a function img2srec.c:257: error: `data' undeclared (first use in this function) img2srec.c:262: error: parse error before "checkSum" img2srec.c: At top level: img2srec.c:268: error: parse error before "DWORD" img2srec.c: In function `ConvertELF': img2srec.c:270: error: `FILE' undeclared (first use in this function) img2srec.c:270: error: `file' undeclared (first use in this function) img2srec.c:271: warning: ISO C90 forbids mixed declarations and code img2srec.c:273: error: parse error before "rxBlock" img2srec.c:280: error: `getPtr' undeclared (first use in this function) img2srec.c:281: warning: ISO C90 forbids mixed declarations and code img2srec.c:286: warning: implicit declaration of function `fopen' img2srec.c:286: error: `fileName' undeclared (first use in this function) img2srec.c:286: error: `NULL' undeclared (first use in this function) img2srec.c:287: warning: implicit declaration of function `fprintf' img2srec.c:287: error: `stderr' undeclared (first use in this function) img2srec.c:287: warning: implicit declaration of function `strerror' img2srec.c:287: warning: format argument is not a pointer (arg 4) img2srec.c:292: warning: implicit declaration of function `fread' img2srec.c:292: error: `rxBlock' undeclared (first use in this function) img2srec.c:292: error: `elfHeader' undeclared (first use in this function) img2srec.c:296: error: parse error before ')' token img2srec.c:297: error: parse error before ')' token img2srec.c:298: error: parse error before ')' token img2srec.c:299: error: parse error before ')' token img2srec.c:300: error: parse error before ')' token img2srec.c:314: warning: implicit declaration of function `fclose' img2srec.c:320: warning: implicit declaration of function `fseek' img2srec.c:320: error: `SEEK_SET' undeclared (first use in this function) img2srec.c:322: error: `sectHeader' undeclared (first use in this function) img2srec.c:323: error: parse error before ')' token img2srec.c:324: error: parse error before ')' token img2srec.c:325: error: parse error before ')' token img2srec.c:326: error: parse error before ')' token img2srec.c:327: error: parse error before ')' token img2srec.c:328: error: parse error before ')' token img2srec.c:329: error: parse error before ')' token img2srec.c:330: error: parse error before ')' token img2srec.c:331: error: parse error before ')' token img2srec.c:332: error: parse error before ')' token img2srec.c:340: warning: implicit declaration of function `strrchr' img2srec.c:346: error: parse error before ')' token img2srec.c:347: warning: implicit declaration of function `printf' img2srec.c:350: error: `firstAddr' undeclared (first use in this function) img2srec.c:351: error: `loadAddr' undeclared (first use in this function) img2srec.c:356: error: `loadSize' undeclared (first use in this function) img2srec.c:359: error: `loadDiff' undeclared (first use in this function) img2srec.c:378: error: `loadOffset' undeclared (first use in this function) img2srec.c: In function `main': img2srec.c:399: error: parse error before "offset" img2srec.c:404: warning: implicit declaration of function `strcmp' img2srec.c:405: error: `offset' undeclared (first use in this function) img2srec.c:409: error: `stderr' undeclared (first use in this function) img2srec.c: At top level: ../include/elf.h:465: warning: array '_DYNAMIC' assumed to have one element make[1]: *** [img2srec.o] Error 1 make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/tools' make: *** [tools] Error 2 sh-3.00$

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[U-Boot-Users] [PATCH] I2C bus speed on the MPC85xx
by Pavel Bartusek 05 Dec '05

05 Dec '05

The attached patch will fix the settings of I2C clock on the MPC85xx CPUs according to the speed parameter in the i2c_init() -- S přátelským pozdravem / Best regards / Mit freundlichen Grüßen Ing. Pavel Bartůšek SYSGO s.r.o. Hřbitovní 359/10 CZ-14800 Praha 4 Phone/Fax: +420 244911174 GSM: +420 777 760728 pavel.bartusek(a)sysgo.com http://www.sysgo.com | http://www.elinos.com | http://www.pikeos.com

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[U-Boot-Users] Add some diag programs in u-boot
by boku 05 Dec '05

05 Dec '05

Dear all, I'm attempting to add some diag programs into u-boot for a specific audio codec in ARM IntegratorCP-like platform so that during each u-booting, the device will be diagnosed to make sure it's fine. Could you please tell me how to do this task? Thanks a lot! Best Wishes, Boku

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[U-Boot-Users] are there tarred archives for this u-boot ist
by satluj＠runbox.com 05 Dec '05

05 Dec '05

Hi, I am new to u-boot and trying to build it for a LPC2294 board from olimax. I am wondering if there are tarred archives for monthly/annual span so that I can get them downloaded and go through them before posting my problems here. Thanks - Surinder

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[U-Boot-Users] Support for AM29LV320D flash in UBOOT
by Yogesh Patel 02 Dec '05

02 Dec '05

Is there a support for AM29LV320DT flash using CFI ? Thanks YP __________________________________ Start your day with Yahoo! - Make it your home page! http://www.yahoo.com/r/hs

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[U-Boot-Users] [PATCH] Add text color handling in cfb_console.c
by Pierre AUBERT 02 Dec '05

02 Dec '05

The attached patch adds text color handling on console frambuffer. It adds the functions video_set_bg_color and video_set_fg_color. The function video_drawchars allows to draw text anywhere on the screen. It has been tested in 8, 15, 16 and 24 bpp modes. CHANGELOG: * Text color handling on video framebuffer Patch by Pierre Aubert Dec. 2 2005 Best regards -- ------------------------------------------------------------------------------ Pierre Aubert | Phone: +33 4 50 65 62 88 | Fax: +33 4 50 65 62 08 STÄUBLI Faverges | Place Robert STÄUBLI | Mailto:p.aubert@staubli.com 74210 Faverges FRANCE | http://www.staubli.com ------------------------------------------------------------------------------

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[U-Boot-Users] 83xx TSEC
by David Updegraff 02 Dec '05

02 Dec '05

Hi. Anyone know of any registers to look at in the TSEC stuff that might tell a guy why a frame is not moving? Our PHY looks fine; 'mii dump' is fine, link up, etc. but in tsec_send() the buffer of a ping is loaded up, and simply never goes anywhere. ->tstat remains clear (no halt bit), but rtx.txbd[txIdx].status never changes from assigned value. Stats claim no frames; which is correct. I need some help in understanding why TSEC feels it cannot feed anything out the inerface. Thanx. -dbu.

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[U-Boot-Users] sometimes u-boot hang in the gunzip of kernel image when bootm
by zhuzhenhua 02 Dec '05

02 Dec '05

i used the uboot bootm to boot the kernel in sdram, sometimes it gunzip correctly and run into kernel_entry,sometimes it hang at gunzip the kernel, does someone has this situation? what may cause this ? Best regards zhuzhenhua

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[U-Boot-Users] [PATCH] support MXIC NOR flash part on AMCC 440EP bamboo eval board
by Kevin Vigor 01 Dec '05

01 Dec '05

My AMCC "bamboo" 440EP eval board arrived stuffed with a MXIC flash part instead of the AMD part called for on the schematic. This part was not recognized by u-boot. The following trivial patch gets it working. Kevin Index: board/amcc/common/flash.c =================================================================== --- board/amcc/common/flash.c (revision 1) +++ board/amcc/common/flash.c (working copy) @@ -76,6 +76,9 @@ case FLASH_MAN_SST: printf("SST "); break; + case FLASH_MAN_MX: + printf("MXIC "); + break; default: printf("Unknown Vendor "); break; @@ -648,6 +651,9 @@ case (CFG_FLASH_WORD_SIZE) STM_MANUFACT: info->flash_id = FLASH_MAN_STM; break; + case (CFG_FLASH_WORD_SIZE) MX_MANUFACT: + info->flash_id = FLASH_MAN_MX; + break; default: info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; @@ -665,6 +671,11 @@ info->flash_id += FLASH_AM320T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ + + case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T: + info->flash_id += FLASH_AM320T; /* compatible with AMD part. */ + info->sector_count = 67; + info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: info->flash_id += FLASH_AM320B;

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[U-Boot-Users] a question about uboot cost
by eagle keeper 01 Dec '05

01 Dec '05

Hi all, Since i couldn't find this info on the web I only would like to know if Uboot is free (meaning cost zero) even for using it in commercial products. Thanks in advance for answer. I apologize if such info is available on the web and I didn't search eenought for it Lele

2 1

[U-Boot-Users] MIPS problems compiling with ELDK 3.1
by Lars Wolf 01 Dec '05

01 Dec '05

Hello, I am not familiar with U-Boot but I would like to compile U-Boot-1.1.3 for a MIPS processor (using the dbau1550 board). The big problem I have is the occuring error while compiling. Unfortunatly, I couldn't find some working advice in your mailing list. I have used the AMD recommended cross compiler toolchain from MontaVista and the from Wolfgang Denk recommended ELDK 3.1 toolchain, neighter works. The error which occurs is: /cpu/mips/start.S /cpu/mips/start.S: Assembler messages: /cpu/mips/start.S:246: Error: Cannot branch to undefined symbol. /cpu/mips/start.S:251: Error: Cannot branch to undefined symbol. /cpu/cpu/mips/start.S:263: Error: Cannot branch to undefined symbol. make: *** [cpu/mips/start.o] Error 1 Could anybody give some hints or advices? Lars

2 1

Re: [U-Boot-Users] how to mkimage for mips ?
by 蔡栋 01 Dec '05

01 Dec '05

zhuzhenhua,您好！ you can try to add option -C gzip ======= 2005-12-01 13:40:43 您在来信中写道：======= >for example, if for pb1100, can we use zImage.pb1100 to make uImage? >how to set the -a -e in mkimage? > > >Best regards >zhuzhenhua > > >------------------------------------------------------- >This SF.net email is sponsored by: Splunk Inc. Do you grep through log files >for problems? Stop! Download the new AJAX search engine that makes >searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! >http://ads.osdn.com/?ad_idv37&alloc_id865&op=click >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users = = = = = = = = = = = = = = = = = = = = 　　　　　　　　致礼！　　　　　　　　蔡栋　　　　　　　　caidong(a)kedacom.com 　　　　　　　　　　2005-12-01

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Re: [U-Boot-Users] how to mkimage for mips ?
by 蔡栋 01 Dec '05

01 Dec '05

zhuzhenhua,您好！ the option -e is to set the first execute instruction address of your linux image and option -a is to set the address which uboot will copy image to when user invoke bootm ======= 2005-12-01 13:40:43 您在来信中写道：======= >for example, if for pb1100, can we use zImage.pb1100 to make uImage? >how to set the -a -e in mkimage? > > >Best regards >zhuzhenhua > > >------------------------------------------------------- >This SF.net email is sponsored by: Splunk Inc. Do you grep through log files >for problems? Stop! Download the new AJAX search engine that makes >searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! >http://ads.osdn.com/?ad_idv37&alloc_id865&op=click >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users = = = = = = = = = = = = = = = = = = = = 　　　　　　　　致礼！　　　　　　　　蔡栋　　　　　　　　caidong(a)kedacom.com 　　　　　　　　　　2005-12-01

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[U-Boot-Users] how to mkimage for mips ?
by zhuzhenhua 01 Dec '05

01 Dec '05

for example, if for pb1100, can we use zImage.pb1100 to make uImage? how to set the -a -e in mkimage? Best regards zhuzhenhua

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