December 2005 - U-Boot

[U-Boot-Users] U boot modification...
by Kiran Jammula 23 May '12

23 May '12

Hi, I am using U boot for my project. I need to configure the console while booting by prompting the user from target board LCD and Keypad. So please let me know which file of the U-boot I have to modify to achieve this. Kiran _________________________________________________________________ Special offer for NRIs! http://creative.mediaturf.net/creatives/citibankrca/rca_msntagofline.htm Get a zero balance account for next 20 years. From Citibank

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[U-Boot-Users] Ethernet loopback command
by Thomas Schäfer 17 Apr '12

17 Apr '12

Hi, The patch attached provides a command called 'ethloop' which allows to perform loopback testing on the current eth device. To achieve this, a new ethernet packet type (PROT_TEST, 0x0808, AFAIK this is not used otherwise) is introduced in net/net.c. The patch is against SF CVS from 20050307. The functions EthLoopStart, EthLoopSend and EthLoopHandler generate a simple ethernet frame with NetOurEther as destination address and packet type PROT_TEST. The looped back package is compared with the original one and a message is displayed. It is necessary to set the ethernet line into loopback mode either by programming the PHY or using a loopback plug. I've tested this on our PPC405 custom board, but it should also work on all other systems because packet generation is independent of the underlying ethernet hardware. Example usage: => mii w 0 0 7100 <-- sets PHY into loopback mode => ethloop Using ppc_405x_eth0 device Got ethernet loopback frame, len=64 loopback test successfully completed => mii w 0 0 8000 <-- PHY reset after test is completed Maybe this is also useful for others.. Best regards, Thomas Schäfer ____________________________________ Kontron Modular Computers GmbH Konrad-Zuse-Str. 9 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: thomas.schaefer(a)kontron.com

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[U-Boot-Users] Add a new command to U-Boot
by Carlos Filipe Silva 20 May '09

20 May '09

Hi all! I have one doubt. How can I add a new command to U-Boot? Do I have to use only the macro U_BOOT_CMD() like files .../common/cmd_* or do I have to do more things, like defines, etc.? And after this is compliled with no error, if I type help in U-Boot's shell, do I see this command like the others? Best regards, Carlos Silva

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[U-Boot-Users] how to support usbtty
by zhuzhenhua 31 Aug '08

31 Aug '08

becides set CONFIG_USB_TTY, what other modification need to do for the usbtty support? thanks for any hints

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[U-Boot-Users] u-boot for MPC8548
by Rupesh S 07 Jun '07

07 Jun '07

Hi Does u-boot support any evaluation boards based on the MPC8548 processor ? Thanks in advance -- Rupesh S

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[U-Boot-Users] mtdparts
by Ladislav Michl 29 Oct '06

29 Oct '06

Hi there. I'm just trying to sync with U-Boot development and found a little regresion in new mtdparts code. Previously I was using custom partition function, which let me do precisely what I wanted. mtd0 - U-Boot mtd1 - env mtd2 - r_env mtd3 - rootfs0 mtd4 - rootfs1 ... etc In above scheme my custom part function allowed only chpart [34], so it was not even possible to change partition to evn sector for example. Moreover it was pretty easy to construct kernel command line this way: setenv bootargs '$bootargs root=/dev/mtdblock$partition ro rootfstype=jffs2' And everything worked nicely. That is no longer case and it's real pain with both NOR and NAND devices used in system. Prefered solution for me is to fix kernel to be able to mount root filesystem from MTD device given by name (root=mtd:rootfs0) unless someone has better idea :-). Something which would work also with 2.4 kernels would be appreciated. ladis

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[U-Boot-Users] ssi.h file missing - UBoot1.1.2 on p4
by p.karthik＠purplevisiontech.com 18 Aug '06

18 Aug '06

Hi, I tried to compile UBoot -1.1.2 on Pentium4 with linuxKernel 2.4.21-4.EL. But it gives the error mg says that "ssi.h: No such file or directory". Please help me to solve this problem. # make distclean ......... # make sc520_cdp_config ......... #make ......... error msg: ------------- a - vsprintf.o a - zlib.o make[1]: Leaving directory `/home/karthik/i386-uboot/src/u-boot-1.1.2/lib_generic' make -C `dirname board/sc520_spunk/libsc520_spunk.a` make[1]: Entering directory `/home/karthik/i386-uboot/src/u-boot-1.1.2/board/sc520_spunk' gcc -M -g -Os -D__KERNEL__ -DTEXT_BASE=0x387c0000 -I/home/karthik/i386-uboot/src/u-boot-1.1.2/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/lib/gcc-lib/i386-redhat-linux/3.2.3/include -pipe -DCONFIG_I386 -D__I386__ -march=i386 -Werror sc520_spunk_asm.S sc520_spunk_asm16.S sc520_spunk.c flash.c > .depend sc520_spunk.c:27:17: ssi.h: No such file or directory make[1]: *** [.depend] Error 1 make[1]: Leaving directory `/home/karthik/i386-uboot/src/u-boot-1.1.2/board/sc520_spunk' make: *** [board/sc520_spunk/libsc520_spunk.a] Error 2

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[U-Boot-Users] [PATCH] common.h spelling fix
by Cory T. Tusar 18 Aug '06

18 Aug '06

Attached is a patch fixing a minor spelling goof in common.h. Picky, picky, I know... Patch was generated against a 2005.11.29 CVS pull. CHANGELOG: * Patch by Cory Tusar, 30 Nov 2005: Fixed common.h spelling error. -Cory -- Cory T. Tusar Embedded Systems Engineer Videon Central, Inc. 2171 Sandy Drive State College, PA 16801 (814) 235-1111 x316 (814) 235-1118 fax "Debugging is twice as hard as writing the code in the first place. Therefore, if you write the code as cleverly as possible, you are, by definition, not smart enough to debug it." --Brian W. Kernighan

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[U-Boot-Users] [PATCH] trivial typo fix
by Andreas Engel 18 Aug '06

18 Aug '06

this is not worth mentioning anywhere... Regards, Andreas Engel

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[U-Boot-Users] [PATCH] add-support-for-ps2-keyboard-on-tqm8540-board.patch
by Martin Krause 18 Aug '06

18 Aug '06

Add support for PS/2 keyboard on TQM8540 board Patch by Martin Krause, 07 Nov 2005 This is tested on a STK85XX baseboard. Make sure the PS/2 controller is programmed. Jumper Settings: X66 1-2, 9-10; X61 2-3 Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Add support for PS/2 keyboard on TQM8540 board Patch by Martin Krause, 07 Nov 2005

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Re: [U-Boot-Users] Bug in StrataFlash drivers
by llandre 18 Aug '06

18 Aug '06

>>>Do you have a spoecific test case that shows the presence of the bug? >> >>I experience the problem when trying to store in Flash my ramdisk image >>that is 1502693 bytes. > > > This will probably also happen with smaller size? Yes, I think it will happen with any odd-sized files. >>>And can you please provide a proper patch, with CHANGELOG entry, >>>Signed-off-by line and everything? See attached file. ChangeLog: * Patch by Andrea Marson, 11 November 2005: Fixed odd-sized images writing in Zefeer StrataFlash driver. Signed-off-by: Andrea Marson <r&d2(a)dave-tech.it> Best regards, llandre DAVE Electronics System House - R&D Department web: http://www.dave-tech.it email: r&d2(a)dave-tech.it diff --git a/board/dave/ZefeerEVB/flashmem.c b/board/dave/ZefeerEVB/flashmem.c --- a/board/dave/ZefeerEVB/flashmem.c +++ b/board/dave/ZefeerEVB/flashmem.c @@ -810,12 +810,14 @@ static int flash_write_cfibuffer(flash_i "write to buffer")) == ERR_OK) { switch(info->portwidth) { case FLASH_CFI_8BIT: cnt = len; break; - case FLASH_CFI_16BIT: + case FLASH_CFI_16BIT: cnt = len >> 1; + if (len % 2) + cnt += 1; break; case FLASH_CFI_32BIT: cnt = len >> 2; break; default:

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[U-Boot-Users] Fix 32bits compilation error in dm9000.c
by Eric BENARD / Free 18 Aug '06

18 Aug '06

Hi, the attached patch fix a compilation error in dm9000.c when configured in 32 bits mode. Eric

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[U-Boot-Users] New NAND code
by Stefan Roese 10 Aug '06

10 Aug '06

Hi! I was just wondering about state of the NAND code. When I remember correctly a pretty big rewrite was done but not commited yet. Is the last patch sent to this list from Pantelis Antoniou on 5th May still the latest version? Best regards, Stefan

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[U-Boot-Users] [PATCH] HEAD cmd_falsh.c for m68k tool chain
by Jens Scharsig 31 Jul '06

31 Jul '06

CHANGELOG entry: * Patch by Jens Scharsig, 28 July 2005 - fix some compiler/parser error, if using m68k tool chain - optical fix for protect on/off all messages, if using more then one bank Best regards, Jens Scharsig Index: common/cmd_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/common/cmd_flash.c,v retrieving revision 1.13 diff -p -u -r1.13 cmd_flash.c --- common/cmd_flash.c 15 Jul 2005 22:47:24 -0000 1.13 +++ common/cmd_flash.c 28 Jul 2005 12:32:00 -0000 @@ -117,11 +117,15 @@ static int addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last) { char *ep; + char len_used; /* indicates if the "start +length" form used */ + char found; + ulong bank; + *addr_first = simple_strtoul(arg1, &ep, 16); if (ep == arg1 || *ep != '\0') - return -1; - - char len_used = 0; /* indicates if the "start +length" form used */ + return -1; + + len_used = 0; /* indicates if the "start +length" form used */ if (arg2 && *arg2 == '+'){ len_used = 1; ++arg2; @@ -146,8 +150,7 @@ addr_spec(char *arg1, char *arg2, ulong */ /* find the end addr of the sector where the *addr_last is */ - char found = 0; - ulong bank; + found = 0; for (bank = 0; bank < CFG_MAX_FLASH_BANKS && !found; ++bank){ int i; flash_info_t *info = &flash_info[bank]; @@ -453,12 +456,10 @@ int do_protect (cmd_tbl_t *cmdtp, int fl info->protect[i] = p; #endif /* CFG_FLASH_PROTECTION */ } - } - #if defined(CFG_FLASH_PROTECTION) - if (!rcode) puts (" done\n"); + if (!rcode) puts (" done\n"); #endif /* CFG_FLASH_PROTECTION */ - + } return rcode; }

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[U-Boot-Users] MIPS: AMD Alchemy au1x00 ethernet problems
by geoff cleary 23 Jul '06

23 Jul '06

Hi I am seeing a problem with network support on the AMD dbau1550 eval board (and our own board based on Au1550). It seems that after one network command, no further packets can be sent. The minimal case that shows the problem is to include the ping command. The first ping will succeed; any other network commands time out. I have successfully loaded large files using tftpboot command and confirmed the image loaded correctly. Trying the command again fails with TX timeout. Has anyone seen this problem or have any suggestions as to what is going on? We are building little endian. I have tried Joseph Chiu's buffer 0 patch. Thanks Geoff __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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[U-Boot-Users] [PATCH] Update MTD NAND to Linux-2.6.14
by Ladislav Michl 22 Jul '06

22 Jul '06

Generated against testing-NAND branch. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG: * Update NAND code to be based on what is in Linux-2.6.14 Patch by Ladislav Michl, 3 Nov 2005 diff -Naurw a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h --- a/include/linux/mtd/nand.h 2005-11-03 12:48:27.000000000 +0100 +++ b/include/linux/mtd/nand.h 2005-11-03 12:49:41.000000000 +0100 @@ -5,7 +5,7 @@ * Steven J. Hill <sjhill(a)realitydiluted.com> * Thomas Gleixner <tglx(a)linutronix.de> * - * $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $ + * $Id: nand.h,v 1.73 2005/05/31 19:39:17 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -48,12 +48,15 @@ * 02-08-2004 tglx added option field to nand structure for chip anomalities * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id * update of nand_chip structure description + * 01-17-2005 dmarlin added extended commands for AG-AND device and added option + * for BBT_AUTO_REFRESH. + * 01-20-2005 dmarlin added optional pointer to hardware specific callback for + * extra error status checks. */ #ifndef __LINUX_MTD_NAND_H #define __LINUX_MTD_NAND_H #include <linux/mtd/compat.h> -#include <linux/mtd/mtd.h> struct mtd_info; /* Scan and identify a NAND device */ @@ -113,6 +116,25 @@ #define NAND_CMD_READSTART 0x30 #define NAND_CMD_CACHEDPROG 0x15 +/* Extended commands for AG-AND device */ +/* + * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but + * there is no way to distinguish that from NAND_CMD_READ0 + * until the remaining sequence of commands has been completed + * so add a high order bit and mask it off in the command. + */ +#define NAND_CMD_DEPLETE1 0x100 +#define NAND_CMD_DEPLETE2 0x38 +#define NAND_CMD_STATUS_MULTI 0x71 +#define NAND_CMD_STATUS_ERROR 0x72 +/* multi-bank error status (banks 0-3) */ +#define NAND_CMD_STATUS_ERROR0 0x73 +#define NAND_CMD_STATUS_ERROR1 0x74 +#define NAND_CMD_STATUS_ERROR2 0x75 +#define NAND_CMD_STATUS_ERROR3 0x76 +#define NAND_CMD_STATUS_RESET 0x7f +#define NAND_CMD_STATUS_CLEAR 0xff + /* Status bits */ #define NAND_STATUS_FAIL 0x01 #define NAND_STATUS_FAIL_N1 0x02 @@ -149,6 +171,10 @@ /* Enable Hardware ECC before syndrom is read back from flash */ #define NAND_ECC_READSYN 2 +/* Bit mask for flags passed to do_nand_read_ecc */ +#define NAND_GET_DEVICE 0x80 + + /* Option constants for bizarre disfunctionality and real * features */ @@ -168,6 +194,10 @@ /* Chip has a array of 4 pages which can be read without * additional ready /busy waits */ #define NAND_4PAGE_ARRAY 0x00000040 +/* Chip requires that BBT is periodically rewritten to prevent + * bits from adjacent blocks from 'leaking' in altering data. + * This happens with the Renesas AG-AND chips, possibly others. */ +#define BBT_AUTO_REFRESH 0x00000080 /* Options valid for Samsung large page devices */ #define NAND_SAMSUNG_LP_OPTIONS \ @@ -190,7 +220,8 @@ * This can only work if we have the ecc bytes directly behind the * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */ #define NAND_HWECC_SYNDROME 0x00020000 - +/* This option skips the bbt scan during initialization. */ +#define NAND_SKIP_BBTSCAN 0x00040000 /* Options set by nand scan */ /* Nand scan has allocated oob_buf */ @@ -215,15 +246,18 @@ /* Keep gcc happy */ struct nand_chip; -#if 0 /** * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices * @lock: protection lock * @active: the mtd device which holds the controller currently + * @wq: wait queue to sleep on if a NAND operation is in progress + * used instead of the per chip wait queue when a hw controller is available */ +#if 0 struct nand_hw_control { spinlock_t lock; struct nand_chip *active; + wait_queue_head_t wq; }; #endif @@ -283,6 +317,8 @@ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan * @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices * @priv: [OPTIONAL] pointer to private chip date + * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks + * (determine if errors are correctable) */ struct nand_chip { @@ -338,8 +374,9 @@ struct nand_bbt_descr *bbt_td; struct nand_bbt_descr *bbt_md; struct nand_bbt_descr *badblock_pattern; - struct nand_hw_control *controller; +/* struct nand_hw_control *controller; */ void *priv; + int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); }; /* @@ -351,6 +388,7 @@ #define NAND_MFR_NATIONAL 0x8f #define NAND_MFR_RENESAS 0x07 #define NAND_MFR_STMICRO 0x20 +#define NAND_MFR_HYNIX 0xad /** * struct nand_flash_dev - NAND Flash Device ID Structure @@ -461,6 +499,9 @@ extern int nand_default_bbt (struct mtd_info *mtd); extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt); extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt); +extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf, u_char * oob_buf, + struct nand_oobinfo *oobsel, int flags); /* * Constants for oob configuration diff -Naurw drivers/nand/diskonchip.c drivers/nand.orig/diskonchip.c --- a/drivers/nand/diskonchip.c 2005-11-03 12:42:45.000000000 +0100 +++ b/drivers/nand/diskonchip.c 2005-11-03 10:04:07.000000000 +0100 @@ -16,7 +16,7 @@ * * Interface to generic NAND code for M-Systems DiskOnChip devices * - * $Id: diskonchip.c,v 1.45 2005/01/05 18:05:14 dwmw2 Exp $ + * $Id: diskonchip.c,v 1.54 2005/04/07 14:22:55 dbrown Exp $ */ #include <linux/kernel.h> @@ -35,13 +35,13 @@ #include <linux/mtd/inftl.h> /* Where to look for the devices? */ -#ifndef CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS -#define CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS 0 +#ifndef CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS +#define CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS 0 #endif static unsigned long __initdata doc_locations[] = { #if defined (__alpha__) || defined(__i386__) || defined(__x86_64__) -#ifdef CONFIG_MTD_DISKONCHIP_PROBE_HIGH +#ifdef CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000, 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000, 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000, @@ -81,11 +81,6 @@ struct mtd_info *nextdoc; }; -/* Max number of eraseblocks to scan (from start of device) for the (I)NFTL - MediaHeader. The spec says to just keep going, I think, but that's just - silly. */ -#define MAX_MEDIAHEADER_SCAN 8 - /* This is the syndrome computed by the HW ecc generator upon reading an empty page, one with all 0xff for data and stored ecc code. */ static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a }; @@ -111,10 +106,11 @@ static int no_ecc_failures=0; module_param(no_ecc_failures, int, 0); -#ifdef CONFIG_MTD_PARTITIONS static int no_autopart=0; module_param(no_autopart, int, 0); -#endif + +static int show_firmware_partition=0; +module_param(show_firmware_partition, int, 0); #ifdef MTD_NAND_DISKONCHIP_BBTWRITE static int inftl_bbt_write=1; @@ -123,7 +119,7 @@ #endif module_param(inftl_bbt_write, int, 0); -static unsigned long doc_config_location = CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS; +static unsigned long doc_config_location = CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS; module_param(doc_config_location, ulong, 0); MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip"); @@ -411,6 +407,11 @@ this->write_byte(mtd, 0); doc200x_hwcontrol(mtd, NAND_CTL_CLRALE); + /* We cant' use dev_ready here, but at least we wait for the + * command to complete + */ + udelay(50); + ret = this->read_byte(mtd) << 8; ret |= this->read_byte(mtd); @@ -429,6 +430,8 @@ doc2000_write_byte(mtd, 0); doc200x_hwcontrol(mtd, NAND_CTL_CLRALE); + udelay(50); + ident.dword = readl(docptr + DoC_2k_CDSN_IO); if (((ident.byte[0] << 8) | ident.byte[1]) == ret) { printk(KERN_INFO "DiskOnChip 2000 responds to DWORD access\n"); @@ -492,11 +495,11 @@ struct doc_priv *doc = this->priv; void __iomem *docptr = doc->virtadr; - /*ReadDOC(docptr, CDSNSlowIO); */ + //ReadDOC(docptr, CDSNSlowIO); /* 11.4.5 -- delay twice to allow extended length cycle */ DoC_Delay(doc, 2); ReadDOC(docptr, ReadPipeInit); - /*return ReadDOC(docptr, Mil_CDSN_IO); */ + //return ReadDOC(docptr, Mil_CDSN_IO); return ReadDOC(docptr, LastDataRead); } @@ -1044,13 +1047,23 @@ return ret; } -/*u_char mydatabuf[528]; */ +//u_char mydatabuf[528]; +/* The strange out-of-order .oobfree list below is a (possibly unneeded) + * attempt to retain compatibility. It used to read: + * .oobfree = { {8, 8} } + * Since that leaves two bytes unusable, it was changed. But the following + * scheme might affect existing jffs2 installs by moving the cleanmarker: + * .oobfree = { {6, 10} } + * jffs2 seems to handle the above gracefully, but the current scheme seems + * safer. The only problem with it is that any code that parses oobfree must + * be able to handle out-of-order segments. + */ static struct nand_oobinfo doc200x_oobinfo = { .useecc = MTD_NANDECC_AUTOPLACE, .eccbytes = 6, .eccpos = {0, 1, 2, 3, 4, 5}, - .oobfree = { {8, 8} } + .oobfree = { {8, 8}, {6, 2} } }; /* Find the (I)NFTL Media Header, and optionally also the mirror media header. @@ -1064,12 +1077,11 @@ { struct nand_chip *this = mtd->priv; struct doc_priv *doc = this->priv; - unsigned offs, end = (MAX_MEDIAHEADER_SCAN << this->phys_erase_shift); + unsigned offs; int ret; size_t retlen; - end = min(end, mtd->size); /* paranoia */ - for (offs = 0; offs < end; offs += mtd->erasesize) { + for (offs = 0; offs < mtd->size; offs += mtd->erasesize) { ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf); if (retlen != mtd->oobblock) continue; if (ret) { @@ -1111,6 +1123,7 @@ u_char *buf; struct NFTLMediaHeader *mh; const unsigned psize = 1 << this->page_shift; + int numparts = 0; unsigned blocks, maxblocks; int offs, numheaders; @@ -1122,8 +1135,10 @@ if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out; mh = (struct NFTLMediaHeader *) buf; -/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */ -/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */ + mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits); + mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN); + mh->FormattedSize = le32_to_cpu(mh->FormattedSize); + printk(KERN_INFO " DataOrgID = %s\n" " NumEraseUnits = %d\n" " FirstPhysicalEUN = %d\n" @@ -1132,7 +1147,6 @@ mh->DataOrgID, mh->NumEraseUnits, mh->FirstPhysicalEUN, mh->FormattedSize, mh->UnitSizeFactor); -/*#endif */ blocks = mtd->size >> this->phys_erase_shift; maxblocks = min(32768U, mtd->erasesize - psize); @@ -1175,23 +1189,28 @@ offs <<= this->page_shift; offs += mtd->erasesize; - /*parts[0].name = " DiskOnChip Boot / Media Header partition"; */ - /*parts[0].offset = 0; */ - /*parts[0].size = offs; */ - - parts[0].name = " DiskOnChip BDTL partition"; - parts[0].offset = offs; - parts[0].size = (mh->NumEraseUnits - numheaders) << this->bbt_erase_shift; + if (show_firmware_partition == 1) { + parts[0].name = " DiskOnChip Firmware / Media Header partition"; + parts[0].offset = 0; + parts[0].size = offs; + numparts = 1; + } + + parts[numparts].name = " DiskOnChip BDTL partition"; + parts[numparts].offset = offs; + parts[numparts].size = (mh->NumEraseUnits - numheaders) << this->bbt_erase_shift; + + offs += parts[numparts].size; + numparts++; - offs += parts[0].size; if (offs < mtd->size) { - parts[1].name = " DiskOnChip Remainder partition"; - parts[1].offset = offs; - parts[1].size = mtd->size - offs; - ret = 2; - goto out; + parts[numparts].name = " DiskOnChip Remainder partition"; + parts[numparts].offset = offs; + parts[numparts].size = mtd->size - offs; + numparts++; } - ret = 1; + + ret = numparts; out: kfree(buf); return ret; @@ -1233,8 +1252,6 @@ mh->FormatFlags = le32_to_cpu(mh->FormatFlags); mh->PercentUsed = le32_to_cpu(mh->PercentUsed); -/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */ -/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */ printk(KERN_INFO " bootRecordID = %s\n" " NoOfBootImageBlocks = %d\n" " NoOfBinaryPartitions = %d\n" @@ -1252,7 +1269,6 @@ ((unsigned char *) &mh->OsakVersion)[2] & 0xf, ((unsigned char *) &mh->OsakVersion)[3] & 0xf, mh->PercentUsed); -/*#endif */ vshift = this->phys_erase_shift + mh->BlockMultiplierBits; @@ -1278,8 +1294,6 @@ ip->spareUnits = le32_to_cpu(ip->spareUnits); ip->Reserved0 = le32_to_cpu(ip->Reserved0); -/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */ -/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */ printk(KERN_INFO " PARTITION[%d] ->\n" " virtualUnits = %d\n" " firstUnit = %d\n" @@ -1289,16 +1303,14 @@ i, ip->virtualUnits, ip->firstUnit, ip->lastUnit, ip->flags, ip->spareUnits); -/*#endif */ -/* - if ((i == 0) && (ip->firstUnit > 0)) { + if ((show_firmware_partition == 1) && + (i == 0) && (ip->firstUnit > 0)) { parts[0].name = " DiskOnChip IPL / Media Header partition"; parts[0].offset = 0; parts[0].size = mtd->erasesize * ip->firstUnit; numparts = 1; } -*/ if (ip->flags & INFTL_BINARY) parts[numparts].name = " DiskOnChip BDK partition"; @@ -1614,11 +1626,11 @@ if (ChipID == DOC_ChipID_DocMilPlus16) { WriteDOC(~newval, virtadr, Mplus_AliasResolution); oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution); - WriteDOC(newval, virtadr, Mplus_AliasResolution); /* restore it */ + WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it } else { WriteDOC(~newval, virtadr, AliasResolution); oldval = ReadDOC(doc->virtadr, AliasResolution); - WriteDOC(newval, virtadr, AliasResolution); /* restore it */ + WriteDOC(newval, virtadr, AliasResolution); // restore it } newval = ~newval; if (oldval == newval) { diff -Naurw drivers/nand/nand_base.c drivers/nand.orig/nand_base.c --- a/drivers/nand/nand_base.c 2005-11-03 12:42:45.000000000 +0100 +++ b/drivers/nand/nand_base.c 2005-11-03 10:43:21.000000000 +0100 @@ -28,6 +28,24 @@ * among multiple independend devices. Suggestions and initial patch * from Ben Dooks <ben-mtd(a)fluff.org> * + * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue. + * Basically, any block not rewritten may lose data when surrounding blocks + * are rewritten many times. JFFS2 ensures this doesn't happen for blocks + * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they + * do not lose data, force them to be rewritten when some of the surrounding + * blocks are erased. Rather than tracking a specific nearby block (which + * could itself go bad), use a page address 'mask' to select several blocks + * in the same area, and rewrite the BBT when any of them are erased. + * + * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas + * AG-AND chips. If there was a sudden loss of power during an erase operation, + * a "device recovery" operation must be performed when power is restored + * to ensure correct operation. + * + * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to + * perform extra error status checks on erase and write failures. This required + * adding a wrapper function for nand_read_ecc. + * * Credits: * David Woodhouse for adding multichip support * @@ -41,7 +59,7 @@ * The AG-AND chips have nice features for speed improvement, * which are not supported yet. Read / program 4 pages in one go. * - * $Id: nand_base.c,v 1.126 2004/12/13 11:22:25 lavinen Exp $ + * $Id: nand_base.c,v 1.147 2005/07/15 07:18:06 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -176,18 +194,22 @@ /* De-select the NAND device */ this->select_chip(mtd, -1); - /* Do we have a hardware controller ? */ + if (this->controller) { + /* Release the controller and the chip */ spin_lock(&this->controller->lock); this->controller->active = NULL; + this->state = FL_READY; + wake_up(&this->controller->wq); spin_unlock(&this->controller->lock); - } + } else { /* Release the chip */ spin_lock (&this->chip_lock); this->state = FL_READY; wake_up (&this->wq); spin_unlock (&this->chip_lock); } +} #else static void nand_release_device (struct mtd_info *mtd) { @@ -477,6 +499,7 @@ /* Get block number */ block = ((int) ofs) >> this->bbt_erase_shift; + if (this->bbt) this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); /* Do we have a flash based bad block table ? */ @@ -500,7 +523,7 @@ struct nand_chip *this = mtd->priv; /* Check the WP bit */ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1); - return (this->read_byte(mtd) & 0x80) ? 0 : 1; + return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; } /** @@ -524,6 +547,39 @@ return nand_isbad_bbt (mtd, ofs, allowbbt); } +/* + * Wait for the ready pin, after a command + * The timeout is catched later. + */ +/* XXX U-BOOT XXX */ +#if 0 +static void nand_wait_ready(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + unsigned long timeo = jiffies + 2; + + /* wait until command is processed or timeout occures */ + do { + if (this->dev_ready(mtd)) + return; + touch_softlockup_watchdog(); + } while (time_before(jiffies, timeo)); +} +#else +static void nand_wait_ready(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + + reset_timer_masked(); + + /* wait until command is processed or timeout occures */ + do { + if (this->dev_ready(mtd)) + return; + } while (get_timer_masked() < CFG_HZ * 1); +} +#endif + /** * nand_command - [DEFAULT] Send command to NAND device * @mtd: MTD device structure @@ -605,7 +661,7 @@ this->hwcontrol(mtd, NAND_CTL_SETCLE); this->write_byte(mtd, NAND_CMD_STATUS); this->hwcontrol(mtd, NAND_CTL_CLRCLE); - while ( !(this->read_byte(mtd) & 0x40)); + while ( !(this->read_byte(mtd) & NAND_STATUS_READY)); return; /* This applies to read commands */ @@ -619,12 +675,11 @@ return; } } - /* Apply this short delay always to ensure that we do wait tWB in * any case on any machine. */ ndelay (100); - /* wait until command is processed */ - while (!this->dev_ready(mtd)); + + nand_wait_ready(mtd); } /** @@ -653,7 +708,7 @@ /* Begin command latch cycle */ this->hwcontrol(mtd, NAND_CTL_SETCLE); /* Write out the command to the device. */ - this->write_byte(mtd, command); + this->write_byte(mtd, (command & 0xff)); /* End command latch cycle */ this->hwcontrol(mtd, NAND_CTL_CLRCLE); @@ -681,7 +736,7 @@ /* * program and erase have their own busy handlers - * status and sequential in needs no delay + * status, sequential in, and deplete1 need no delay */ switch (command) { @@ -691,8 +746,19 @@ case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: + case NAND_CMD_DEPLETE1: return; + /* + * read error status commands require only a short delay + */ + case NAND_CMD_STATUS_ERROR: + case NAND_CMD_STATUS_ERROR0: + case NAND_CMD_STATUS_ERROR1: + case NAND_CMD_STATUS_ERROR2: + case NAND_CMD_STATUS_ERROR3: + udelay(this->chip_delay); + return; case NAND_CMD_RESET: if (this->dev_ready) @@ -701,7 +767,7 @@ this->hwcontrol(mtd, NAND_CTL_SETCLE); this->write_byte(mtd, NAND_CMD_STATUS); this->hwcontrol(mtd, NAND_CTL_CLRCLE); - while ( !(this->read_byte(mtd) & 0x40)); + while ( !(this->read_byte(mtd) & NAND_STATUS_READY)); return; case NAND_CMD_READ0: @@ -728,8 +794,8 @@ /* Apply this short delay always to ensure that we do wait tWB in * any case on any machine. */ ndelay (100); - /* wait until command is processed */ - while (!this->dev_ready(mtd)); + + nand_wait_ready(mtd); } /** @@ -744,37 +810,34 @@ #if 0 static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state) { - struct nand_chip *active = this; - + struct nand_chip *active; + spinlock_t *lock; + wait_queue_head_t *wq; DECLARE_WAITQUEUE (wait, current); - /* - * Grab the lock and see if the device is available - */ + lock = (this->controller) ? &this->controller->lock : &this->chip_lock; + wq = (this->controller) ? &this->controller->wq : &this->wq; retry: + active = this; + spin_lock(lock); + /* Hardware controller shared among independend devices */ if (this->controller) { - spin_lock (&this->controller->lock); if (this->controller->active) active = this->controller->active; else this->controller->active = this; - spin_unlock (&this->controller->lock); } - - if (active == this) { - spin_lock (&this->chip_lock); - if (this->state == FL_READY) { + if (active == this && this->state == FL_READY) { this->state = new_state; - spin_unlock (&this->chip_lock); + spin_unlock(lock); return; } - } set_current_state (TASK_UNINTERRUPTIBLE); - add_wait_queue (&active->wq, &wait); - spin_unlock (&active->chip_lock); + add_wait_queue(wq, &wait); + spin_unlock(lock); schedule (); - remove_wait_queue (&active->wq, &wait); + remove_wait_queue(wq, &wait); goto retry; } #else @@ -825,7 +888,7 @@ if (this->read_byte(mtd) & NAND_STATUS_READY) break; } - yield (); + cond_resched(); } status = (int) this->read_byte(mtd); return status; @@ -946,15 +1009,21 @@ if (!cached) { /* call wait ready function */ status = this->waitfunc (mtd, this, FL_WRITING); + + /* See if operation failed and additional status checks are available */ + if ((status & NAND_STATUS_FAIL) && (this->errstat)) { + status = this->errstat(mtd, this, FL_WRITING, status, page); + } + /* See if device thinks it succeeded */ - if (status & 0x01) { + if (status & NAND_STATUS_FAIL) { DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page); return -EIO; } } else { /* FIXME: Implement cached programming ! */ /* wait until cache is ready*/ - /* status = this->waitfunc (mtd, this, FL_CACHEDRPG); */ + // status = this->waitfunc (mtd, this, FL_CACHEDRPG); } return 0; } @@ -1050,7 +1119,7 @@ if (!this->dev_ready) udelay (this->chip_delay); else - while (!this->dev_ready(mtd)); + nand_wait_ready(mtd); /* All done, return happy */ if (!numpages) @@ -1072,23 +1141,24 @@ #endif /** - * nand_read - [MTD Interface] MTD compability function for nand_read_ecc + * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc * @mtd: MTD device structure * @from: offset to read from * @len: number of bytes to read * @retlen: pointer to variable to store the number of read bytes * @buf: the databuffer to put data * - * This function simply calls nand_read_ecc with oob buffer and oobsel = NULL + * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL + * and flags = 0xff */ static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf) { - return nand_read_ecc (mtd, from, len, retlen, buf, NULL, NULL); + return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff); } /** - * nand_read_ecc - [MTD Interface] Read data with ECC + * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc * @mtd: MTD device structure * @from: offset to read from * @len: number of bytes to read @@ -1097,11 +1167,39 @@ * @oob_buf: filesystem supplied oob data buffer * @oobsel: oob selection structure * - * NAND read with ECC + * This function simply calls nand_do_read_ecc with flags = 0xff */ static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel) { + /* use userspace supplied oobinfo, if zero */ + if (oobsel == NULL) + oobsel = &mtd->oobinfo; + return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff); +} + + +/** + * nand_do_read_ecc - [MTD Interface] Read data with ECC + * @mtd: MTD device structure + * @from: offset to read from + * @len: number of bytes to read + * @retlen: pointer to variable to store the number of read bytes + * @buf: the databuffer to put data + * @oob_buf: filesystem supplied oob data buffer (can be NULL) + * @oobsel: oob selection structure + * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed + * and how many corrected error bits are acceptable: + * bits 0..7 - number of tolerable errors + * bit 8 - 0 == do not get/release chip, 1 == get/release chip + * + * NAND read with ECC + */ +int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf, u_char * oob_buf, + struct nand_oobinfo *oobsel, int flags) +{ + int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; struct nand_chip *this = mtd->priv; @@ -1126,12 +1224,9 @@ } /* Grab the lock and see if the device is available */ + if (flags & NAND_GET_DEVICE) nand_get_device (this, mtd ,FL_READING); - /* use userspace supplied oobinfo, if zero */ - if (oobsel == NULL) - oobsel = &mtd->oobinfo; - /* Autoplace of oob data ? Use the default placement scheme */ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) oobsel = this->autooob; @@ -1208,10 +1303,10 @@ printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n"); lastwhinge = jiffies; } + this->read_buf(mtd, data_poi, end); #else puts("Reading data from NAND FLASH without ECC is not recommended\n"); #endif - this->read_buf(mtd, data_poi, end); break; } @@ -1236,7 +1331,8 @@ /* We calc error correction directly, it checks the hw * generator for an error, reads back the syndrome and * does the error correction on the fly */ - if (this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]) == -1) { + ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]); + if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr); ecc_failed++; @@ -1275,7 +1371,7 @@ p[i] = ecc_status; } - if (ecc_status == -1) { + if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) { DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page); ecc_failed++; } @@ -1289,13 +1385,12 @@ case MTD_NANDECC_AUTOPLACE: case MTD_NANDECC_AUTOPL_USR: /* Walk through the autoplace chunks */ - for (i = 0, j = 0; j < mtd->oobavail; i++) { + for (i = 0; oobsel->oobfree[i][1]; i++) { int from = oobsel->oobfree[i][0]; int num = oobsel->oobfree[i][1]; memcpy(&oob_buf[oob], &oob_data[from], num); - j+= num; + oob += num; } - oob += mtd->oobavail; break; case MTD_NANDECC_PLACE: /* YAFFS1 legacy mode */ @@ -1321,7 +1416,7 @@ if (!this->dev_ready) udelay (this->chip_delay); else - while (!this->dev_ready(mtd)); + nand_wait_ready(mtd); if (read == len) break; @@ -1346,6 +1441,7 @@ } /* Deselect and wake up anyone waiting on the device */ + if (flags & NAND_GET_DEVICE) nand_release_device(mtd); /* @@ -1411,16 +1507,6 @@ this->read_buf(mtd, &buf[i], thislen); i += thislen; - /* Apply delay or wait for ready/busy pin - * Do this before the AUTOINCR check, so no problems - * arise if a chip which does auto increment - * is marked as NOAUTOINCR by the board driver. - */ - if (!this->dev_ready) - udelay (this->chip_delay); - else - while (!this->dev_ready(mtd)); - /* Read more ? */ if (i < len) { page++; @@ -1433,6 +1519,16 @@ this->select_chip(mtd, chipnr); } + /* Apply delay or wait for ready/busy pin + * Do this before the AUTOINCR check, so no problems + * arise if a chip which does auto increment + * is marked as NOAUTOINCR by the board driver. + */ + if (!this->dev_ready) + udelay (this->chip_delay); + else + nand_wait_ready(mtd); + /* Check, if the chip supports auto page increment * or if we have hit a block boundary. */ @@ -1499,7 +1595,7 @@ if (!this->dev_ready) udelay (this->chip_delay); else - while (!this->dev_ready(mtd)); + nand_wait_ready(mtd); /* Check, if the chip supports auto page increment */ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) @@ -1817,7 +1913,7 @@ status = this->waitfunc (mtd, this, FL_WRITING); /* See if device thinks it succeeded */ - if (status & 0x01) { + if (status & NAND_STATUS_FAIL) { DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page); ret = -EIO; goto out; @@ -2075,6 +2171,7 @@ return nand_erase_nand (mtd, instr, 0); } +#define BBT_PAGE_MASK 0xffffff3f /** * nand_erase_intern - [NAND Interface] erase block(s) * @mtd: MTD device structure @@ -2087,6 +2184,10 @@ { int page, len, status, pages_per_block, ret, chipnr; struct nand_chip *this = mtd->priv; + int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */ + unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */ + /* It is used to see if the current page is in the same */ + /* 256 block group and the same bank as the bbt. */ DEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len); @@ -2132,6 +2233,13 @@ goto erase_exit; } + /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */ + if (this->options & BBT_AUTO_REFRESH) { + bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; + } else { + bbt_masked_page = 0xffffffff; /* should not match anything */ + } + /* Loop through the pages */ len = instr->len; @@ -2154,14 +2262,27 @@ status = this->waitfunc (mtd, this, FL_ERASING); + /* See if operation failed and additional status checks are available */ + if ((status & NAND_STATUS_FAIL) && (this->errstat)) { + status = this->errstat(mtd, this, FL_ERASING, status, page); + } + /* See if block erase succeeded */ - if (status & 0x01) { + if (status & NAND_STATUS_FAIL) { DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page); instr->state = MTD_ERASE_FAILED; instr->fail_addr = (page << this->page_shift); goto erase_exit; } + /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */ + if (this->options & BBT_AUTO_REFRESH) { + if (((page & BBT_PAGE_MASK) == bbt_masked_page) && + (page != this->bbt_td->pages[chipnr])) { + rewrite_bbt[chipnr] = (page << this->page_shift); + } + } + /* Increment page address and decrement length */ len -= (1 << this->phys_erase_shift); page += pages_per_block; @@ -2171,6 +2292,13 @@ chipnr++; this->select_chip(mtd, -1); this->select_chip(mtd, chipnr); + + /* if BBT requires refresh and BBT-PERCHIP, + * set the BBT page mask to see if this BBT should be rewritten */ + if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) { + bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK; + } + } } instr->state = MTD_ERASE_DONE; @@ -2185,6 +2313,18 @@ /* Deselect and wake up anyone waiting on the device */ nand_release_device(mtd); + /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */ + if ((this->options & BBT_AUTO_REFRESH) && (!ret)) { + for (chipnr = 0; chipnr < this->numchips; chipnr++) { + if (rewrite_bbt[chipnr]) { + /* update the BBT for chip */ + DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n", + chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]); + nand_update_bbt (mtd, rewrite_bbt[chipnr]); + } + } + } + /* Return more or less happy */ return ret; } @@ -2256,7 +2396,7 @@ */ int nand_scan (struct mtd_info *mtd, int maxchips) { - int i, j, nand_maf_id, nand_dev_id, busw; + int i, nand_maf_id, nand_dev_id, busw, maf_id; struct nand_chip *this = mtd->priv; /* Get buswidth to select the correct functions*/ @@ -2344,12 +2484,18 @@ busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16; } + /* Try to identify manufacturer */ + for (maf_id = 0; nand_manuf_ids[maf_id].id != 0x0; maf_id++) { + if (nand_manuf_ids[maf_id].id == nand_maf_id) + break; + } + /* Check, if buswidth is correct. Hardware drivers should set * this correct ! */ if (busw != (this->options & NAND_BUSWIDTH_16)) { printk (KERN_INFO "NAND device: Manufacturer ID:" " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, - nand_manuf_ids[i].name , mtd->name); + nand_manuf_ids[maf_id].name , mtd->name); printk (KERN_WARNING "NAND bus width %d instead %d bit\n", (this->options & NAND_BUSWIDTH_16) ? 16 : 8, @@ -2388,14 +2534,9 @@ if (mtd->oobblock > 512 && this->cmdfunc == nand_command) this->cmdfunc = nand_command_lp; - /* Try to identify manufacturer */ - for (j = 0; nand_manuf_ids[j].id != 0x0; j++) { - if (nand_manuf_ids[j].id == nand_maf_id) - break; - } printk (KERN_INFO "NAND device: Manufacturer ID:" " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id, - nand_manuf_ids[j].name , nand_flash_ids[i].name); + nand_manuf_ids[maf_id].name , nand_flash_ids[i].name); break; } @@ -2470,18 +2611,15 @@ default: printk (KERN_WARNING "No oob scheme defined for oobsize %d\n", mtd->oobsize); -/* BUG(); */ + BUG(); } } /* The number of bytes available for the filesystem to place fs dependend * oob data */ - if (this->options & NAND_BUSWIDTH_16) { - mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 2); - if (this->autooob->eccbytes & 0x01) - mtd->oobavail--; - } else - mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 1); + mtd->oobavail = 0; + for (i = 0; this->autooob->oobfree[i][1]; i++) + mtd->oobavail += this->autooob->oobfree[i][1]; /* * check ECC mode, default to software @@ -2530,7 +2668,7 @@ default: printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode); -/* BUG(); */ + BUG(); } /* Check hardware ecc function availability and adjust number of ecc bytes per @@ -2548,7 +2686,7 @@ if (this->calculate_ecc && this->correct_data && this->enable_hwecc) break; printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n"); -/* BUG(); */ + BUG(); } mtd->eccsize = this->eccsize; @@ -2623,14 +2761,21 @@ #if 0 mtd->owner = THIS_MODULE; #endif + /* Check, if we should skip the bad block table scan */ + if (this->options & NAND_SKIP_BBTSCAN) + return 0; + /* Build bad block table */ return this->scan_bbt (mtd); } + /** * nand_release - [NAND Interface] Free resources held by the NAND device * @mtd: MTD device structure */ +/* XXX U-BOOT XXX */ +#if 0 void nand_release (struct mtd_info *mtd) { struct nand_chip *this = mtd->priv; @@ -2640,10 +2785,8 @@ del_mtd_partitions (mtd); #endif /* Deregister the device */ -/* XXX U-BOOT XXX */ -#if 0 del_mtd_device (mtd); -#endif + /* Free bad block table memory, if allocated */ if (this->bbt) kfree (this->bbt); @@ -2655,4 +2798,12 @@ kfree (this->data_buf); } +EXPORT_SYMBOL_GPL (nand_scan); +EXPORT_SYMBOL_GPL (nand_release); + +MODULE_LICENSE ("GPL"); +MODULE_AUTHOR ("Steven J. Hill <sjhill(a)realitydiluted.com>, Thomas Gleixner <tglx(a)linutronix.de>"); +MODULE_DESCRIPTION ("Generic NAND flash driver code"); #endif + +#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */ diff -Naurw drivers/nand/nand_bbt.c drivers/nand.orig/nand_bbt.c --- a/drivers/nand/nand_bbt.c 2005-11-03 12:42:45.000000000 +0100 +++ b/drivers/nand/nand_bbt.c 2005-11-03 10:27:04.000000000 +0100 @@ -6,7 +6,7 @@ * * Copyright (C) 2004 Thomas Gleixner (tglx(a)linutronix.de) * - * $Id: nand_bbt.c,v 1.28 2004/11/13 10:19:09 gleixner Exp $ + * $Id: nand_bbt.c,v 1.35 2005/07/15 13:53:47 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -78,7 +78,7 @@ */ static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td) { - int i, end; + int i, end = 0; uint8_t *p = buf; end = paglen + td->offs; @@ -96,9 +96,9 @@ return -1; } + if (td->options & NAND_BBT_SCANEMPTY) { p += td->len; end += td->len; - if (td->options & NAND_BBT_SCANEMPTY) { for (i = end; i < len; i++) { if (*p++ != 0xff) return -1; @@ -108,6 +108,29 @@ } /** + * check_short_pattern - [GENERIC] check if a pattern is in the buffer + * @buf: the buffer to search + * @td: search pattern descriptor + * + * Check for a pattern at the given place. Used to search bad block + * tables and good / bad block identifiers. Same as check_pattern, but + * no optional empty check + * +*/ +static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td) +{ + int i; + uint8_t *p = buf; + + /* Compare the pattern */ + for (i = 0; i < td->len; i++) { + if (p[td->offs + i] != td->pattern[i]) + return -1; + } + return 0; +} + +/** * read_bbt - [GENERIC] Read the bad block table starting from page * @mtd: MTD device structure * @buf: temporary buffer @@ -253,7 +276,7 @@ * Create a bad block table by scanning the device * for the given good/bad block identify pattern */ -static void create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip) +static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip) { struct nand_chip *this = mtd->priv; int i, j, numblocks, len, scanlen; @@ -271,9 +294,17 @@ else len = 1; } + + if (!(bd->options & NAND_BBT_SCANEMPTY)) { + /* We need only read few bytes from the OOB area */ + scanlen = ooblen = 0; + readlen = bd->len; + } else { + /* Full page content should be read */ scanlen = mtd->oobblock + mtd->oobsize; readlen = len * mtd->oobblock; ooblen = len * mtd->oobsize; + } if (chip == -1) { /* Note that numblocks is 2 * (real numblocks) here, see i+=2 below as it @@ -285,7 +316,7 @@ if (chip >= this->numchips) { printk (KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n", chip + 1, this->numchips); - return; + return -EINVAL; } numblocks = this->chipsize >> (this->bbt_erase_shift - 1); startblock = chip * numblocks; @@ -294,8 +325,30 @@ } for (i = startblock; i < numblocks;) { - nand_read_raw (mtd, buf, from, readlen, ooblen); + int ret; + + if (bd->options & NAND_BBT_SCANEMPTY) + if ((ret = nand_read_raw (mtd, buf, from, readlen, ooblen))) + return ret; + for (j = 0; j < len; j++) { + if (!(bd->options & NAND_BBT_SCANEMPTY)) { + size_t retlen; + + /* Read the full oob until read_oob is fixed to + * handle single byte reads for 16 bit buswidth */ + ret = mtd->read_oob(mtd, from + j * mtd->oobblock, + mtd->oobsize, &retlen, buf); + if (ret) + return ret; + + if (check_short_pattern (buf, bd)) { + this->bbt[i >> 3] |= 0x03 << (i & 0x6); + printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n", + i >> 1, (unsigned int) from); + break; + } + } else { if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) { this->bbt[i >> 3] |= 0x03 << (i & 0x6); printk (KERN_WARNING "Bad eraseblock %d at 0x%08x\n", @@ -303,9 +356,11 @@ break; } } + } i += 2; from += (1 << this->bbt_erase_shift); } + return 0; } /** @@ -590,14 +645,12 @@ * The function creates a memory based bbt by scanning the device * for manufacturer / software marked good / bad blocks */ -static int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd) +static inline int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd) { struct nand_chip *this = mtd->priv; - /* Ensure that we only scan for the pattern and nothing else */ - bd->options = 0; - create_bbt (mtd, this->data_buf, bd, -1); - return 0; + bd->options &= ~NAND_BBT_SCANEMPTY; + return create_bbt (mtd, this->data_buf, bd, -1); } /** @@ -809,8 +862,14 @@ /* If no primary table decriptor is given, scan the device * to build a memory based bad block table */ - if (!td) - return nand_memory_bbt(mtd, bd); + if (!td) { + if ((res = nand_memory_bbt(mtd, bd))) { + printk (KERN_ERR "nand_bbt: Can't scan flash and build the RAM-based BBT\n"); + kfree (this->bbt); + this->bbt = NULL; + } + return res; + } /* Allocate a temporary buffer for one eraseblock incl. oob */ len = (1 << this->bbt_erase_shift); @@ -905,14 +964,11 @@ } /* Define some generic bad / good block scan pattern which are used - * while scanning a device for factory marked good / bad blocks - * - * The memory based patterns just - */ + * while scanning a device for factory marked good / bad blocks. */ static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; static struct nand_bbt_descr smallpage_memorybased = { - .options = 0, + .options = NAND_BBT_SCAN2NDPAGE, .offs = 5, .len = 1, .pattern = scan_ff_pattern @@ -1043,7 +1099,7 @@ res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03; DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n", - (unsigned int)offs, res, block >> 1); + (unsigned int)offs, block >> 1, res); switch ((int)res) { case 0x00: return 0; diff -Naurw drivers/nand/nand_ecc.c drivers/nand.orig/nand_ecc.c --- a/drivers/nand/nand_ecc.c 2005-11-03 12:42:45.000000000 +0100 +++ b/drivers/nand/nand_ecc.c 2005-11-03 10:42:35.000000000 +0100 @@ -39,6 +39,8 @@ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#include <linux/mtd/nand_ecc.h> + /* * Pre-calculated 256-way 1 byte column parity */ @@ -205,7 +207,8 @@ a ^= (b << bit); dat[add] = a; return 1; - } else { + } + else { i = 0; while (d1) { if (d1 & 0x01) @@ -241,3 +244,4 @@ } #endif /* CONFIG_COMMANDS & CFG_CMD_NAND */ + diff -Naurw drivers/nand/nand_ids.c drivers/nand.orig/nand_ids.c --- a/drivers/nand/nand_ids.c 2005-11-03 12:42:45.000000000 +0100 +++ b/drivers/nand/nand_ids.c 2005-11-03 10:46:38.000000000 +0100 @@ -3,13 +3,14 @@ * * Copyright (C) 2002 Thomas Gleixner (tglx(a)linutronix.de) * - * $Id: nand_ids.c,v 1.10 2004/05/26 13:40:12 gleixner Exp $ + * $Id: nand_ids.c,v 1.14 2005/06/23 09:38:50 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ + #include <common.h> #if (CONFIG_COMMANDS & CFG_CMD_NAND) @@ -60,17 +61,24 @@ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16}, {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0}, + {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0}, {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0}, {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16}, + {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16}, {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16}, + {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16}, {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0}, - {"NAND 512MiB 3,3V 8-bit", 0xDC, 512, 512, 0x4000, 0}, - /* These are the new chips with large page size. The pagesize * and the erasesize is determined from the extended id bytes */ + /*512 Megabit */ + {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, + {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, + {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR}, + {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR}, + /* 1 Gigabit */ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, @@ -107,7 +115,7 @@ * Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go * There are more speed improvements for reads and writes possible, but not implemented now */ - {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY}, + {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH}, {NULL,} }; @@ -122,6 +130,9 @@ {NAND_MFR_NATIONAL, "National"}, {NAND_MFR_RENESAS, "Renesas"}, {NAND_MFR_STMICRO, "ST Micro"}, + {NAND_MFR_HYNIX, "Hynix"}, {0x0, "Unknown"} }; -#endif + +#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */ +

2 1

[U-Boot-Users] [PATCH] Update board NetStar
by Ladislav Michl 22 Jul '06

22 Jul '06

Just to sync my local tree with public one. Generated against testing-NAND branch. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG: * Update board NetStar Patch by Ladislav Michl, 3 Nov 2005 diff --git a/board/netstar/crcek.S b/board/netstar/crcek.S --- a/board/netstar/crcek.S +++ b/board/netstar/crcek.S @@ -13,6 +13,7 @@ * u32 - crc32 */ +#include <config.h> #include "crcek.h" /** @@ -39,7 +40,7 @@ .macro crcuj, offset, size mov r0, #0 ldr r1, \offset - ldr r2, [r1] + ldr r2, [r1], #4 cmp r2, r0 @ no data, no problem beq 2f tst r2, #3 @ unaligned size @@ -47,7 +48,6 @@ ldr r3, \size cmp r2, r3 @ bogus size bhi 2f - add r1, r1, #4 do_crc32 ldr r1, [r1] 2: @@ -55,16 +55,71 @@ .endm .macro wait, reg - mov \reg, #0x1000 + mov \reg, #0x100000 3: subs \reg, \reg, #0x1 bne 3b - .endm + .text .globl crcek crcek: - b crc2_bad + /* Enable I-cache */ + mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register + mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register + mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register + orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000 + mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register + mov r1, #0x00 + mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache + nop + nop + nop + nop + + /* Setup clocking mode */ + ldr r0, MPU_CLKM_BASE @ base of CLOCK unit + ldrh r1, [r0, #0x18] @ ARM_SYST - get reset status + bic r1, r1, #(7 << 11) @ clear clock select + orr r1, r1, #(2 << 11) @ set synchronous scalable + mov r2, #0 +loop: + cmp r2, #1 @ this loop will wait for at least 100 cycles + streqh r1, [r0, #0x18] @ before issuing next request from MPU + add r2, r2, #1 @ on the 1st run code is loaded into I-cache + cmp r2, #16 @ and second run will set clocking mode + bne loop + nop + + /* Setup clock dividers */ + ldr r1, CKCTL_VAL + orr r1, r1, #0x2000 @ enable DSP clock + strh r1, [r0] @ setup clock divisors + + /* Setup DPLL to generate requested freq */ + ldr r0, DPLL1_BASE @ base of DPLL1 register + mov r1, #0x0010 @ set PLL_ENABLE + orr r1, r1, #0x2000 @ set IOB to new locking + orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF + orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF + strh r1, [r0] @ write + +locking: + ldrh r1, [r0] @ get DPLL value + tst r1, #0x01 + beq locking @ while LOCK not set + + /* Enable clock */ + ldr r0, MPU_CLKM_BASE @ base of CLOCK unit + mov r1, #(1 << 10) @ disable idle mode do not check + @ nWAKEUP pin, other remain active + strh r1, [r0, #0x04] + ldr r1, EN_CLK_VAL + strh r1, [r0, #0x08] + mov r1, #0x003f @ FLASH.RP not enabled in idle and + strh r1, [r0, #0x0c] @ max delayed ( 32 x CLKIN ) + + mov r6, #0 crcuj _LOADER1_OFFSET, _LOADER_SIZE bne crc1_bad @@ -76,9 +131,8 @@ crc1_bad: crc2_bad: ldr r3, _LOADER1_OFFSET ldr r4, _LOADER2_OFFSET - b boot_2nd - tst r6, #3 - beq one_is_bad @ one of them (or both) has bad crc + teq r6, #3 + bne one_is_bad @ one of them (or both) has bad crc ldr r1, [r3, #4] ldr r2, [r4, #4] cmp r1, r2 @ boot 2nd loader if versions differ @@ -90,6 +144,7 @@ one_is_bad: tst r6, #2 bne boot_2nd @ We are doomed, so let user know. +hell: ldr r0, GPIO_BASE @ configure GPIO pins ldr r1, GPIO_DIRECTION strh r1, [r0, #0x08] @@ -171,6 +226,15 @@ CRC32_TABLE: GPIO_BASE: .word 0xfffce000 +MPU_CLKM_BASE: + .word 0xfffece00 +DPLL1_BASE: + .word 0xfffecf00 + +CKCTL_VAL: + .word OMAP5910_ARM_CKCTL +EN_CLK_VAL: + .word OMAP5910_ARM_EN_CLK GPIO_DIRECTION: .word 0x0000ffe7 diff --git a/board/netstar/crcek.h b/board/netstar/crcek.h diff --git a/board/netstar/crcit.c b/board/netstar/crcit.c --- a/board/netstar/crcit.c +++ b/board/netstar/crcit.c @@ -77,7 +77,7 @@ int main(int argc, char **argv) } else if ((argc == 4) && (strcmp(argv[1], "-v") == 0)) { char *endptr, *nptr = argv[2]; unsigned ver = strtoul(nptr, &endptr, 0); - if (nptr != '\0' && endptr == '\0') + if (*nptr != '\0' && *endptr == '\0') return doit(argv[3], ver); } fprintf(stderr, "Usage: crcit [-v version] <image>\n"); diff --git a/board/netstar/eeprom.c b/board/netstar/eeprom.c --- a/board/netstar/eeprom.c +++ b/board/netstar/eeprom.c @@ -213,3 +213,4 @@ int eeprom(int argc, char *argv[]) return 0; } + diff --git a/board/netstar/nand.c b/board/netstar/nand.c --- a/board/netstar/nand.c +++ b/board/netstar/nand.c @@ -55,10 +55,11 @@ static int netstar_nand_ready(struct mtd void board_nand_init(struct nand_chip *nand) { - nand->options = NAND_SAMSUNG_LP_OPTIONS; + nand->options = NAND_SAMSUNG_LP_OPTIONS; nand->eccmode = NAND_ECC_SOFT; - nand->hwcontrol = netstar_nand_hwcontrol; + nand->hwcontrol = netstar_nand_hwcontrol; /* nand->dev_ready = netstar_nand_ready; */ nand->chip_delay = 18; } #endif + diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c --- a/board/netstar/netstar.c +++ b/board/netstar/netstar.c @@ -27,7 +27,6 @@ int board_init(void) DECLARE_GLOBAL_DATA_PTR; /* arch number of NetStar board */ - /* TODO: use define from asm/mach-types.h */ gd->bd->bi_arch_number = 692; /* adress of boot parameters */ @@ -53,16 +52,13 @@ int dram_init(void) return 0; } -extern void partition_flash(void); - int misc_init_r(void) { return 0; } -extern void nand_init(void); - int board_late_init(void) { return 0; } + diff --git a/board/netstar/setup.S b/board/netstar/setup.S --- a/board/netstar/setup.S +++ b/board/netstar/setup.S @@ -58,10 +58,10 @@ VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xd << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27)) #endif -VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003 +VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003 VAL_EMIFF_MRS: .word 0x00000037 -/* +/* * GPIO04 - Green LED (Red LED is connected to LED Pulse Generator) * GPIO07 - LAN91C111 reset */ @@ -106,7 +106,7 @@ MUX_CONFIG_OFFSETS: .align 1 .byte 0x00 @ FUNC_MUX_CTRL_0 .byte 0x04 @ FUNC_MUX_CTRL_1 - .byte 0x08 @ FUNC_MUX_CTRL_2 + .byte 0x08 @ FUNC_MUX_CTRL_2 .byte 0x10 @ FUNC_MUX_CTRL_3 .byte 0x14 @ FUNC_MUX_CTRL_4 .byte 0x18 @ FUNC_MUX_CTRL_5 @@ -145,25 +145,23 @@ platformsetup: nop /* Setup clocking mode */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ prepare base of CLOCK unit - ldrh r1, [r0, #0x18] @ get reset status + ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit + ldrh r1, [r0, #0x18] @ ARM_SYST - get reset status bic r1, r1, #(7 << 11) @ clear clock select orr r1, r1, #(2 << 11) @ set synchronous scalable - mov r2, #0 @ set wait counter to 100 clock cycles - -icache_loop: - cmp r2, #0x01 - streqh r1, [r0, #0x18] - add r2, r2, #0x01 - cmp r2, #0x10 - bne icache_loop + mov r2, #0 +loop: + cmp r2, #1 @ this loop will wait for at least 100 cycles + streqh r1, [r0, #0x18] @ before issuing next request from MPU + add r2, r2, #1 @ on the 1st run code is loaded into I-cache + cmp r2, #16 @ and second run will set clocking mode + bne loop nop - /* Setup clock divisors */ - ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit + /* Setup clock dividers */ ldr r1, _OMAP5910_ARM_CKCTL orr r1, r1, #0x2000 @ enable DSP clock - strh r1, [r0, #0x00] @ setup clock divisors + strh r1, [r0] @ setup clock divisors /* Setup DPLL to generate requested freq */ ldr r0, OMAP5910_DPLL1_BASE @ base of DPLL1 register @@ -182,18 +180,17 @@ locking: ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit mov r1, #(1 << 10) @ disable idle mode do not check @ nWAKEUP pin, other remain active - strh r1, [r0, #0x04] + strh r1, [r0, #0x04] ldr r1, _OMAP5910_ARM_EN_CLK strh r1, [r0, #0x08] mov r1, #0x003f @ FLASH.RP not enabled in idle and - @ max delayed ( 32 x CLKIN ) - strh r1, [r0, #0x0c] + strh r1, [r0, #0x0c] @ max delayed ( 32 x CLKIN ) /* Configure 5910 pins functions to match our board. */ ldr r0, MUX_CONFIG_BASE adr r1, MUX_CONFIG_VALUES adr r2, MUX_CONFIG_OFFSETS -next_mux_cfg: +next_mux_cfg: ldrb r3, [r2], #1 ldr r4, [r1], #4 cmp r3, #0xff @@ -240,15 +237,15 @@ next_mux_cfg: strh r1, [r0, #0x34] /* Setup clock divisors */ - ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register + ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register mov r1, #0x0010 @ set PLL_ENABLE - orr r1, r1, #0x2000 @ set IOB to new locking - strh r1, [r0] @ write + orr r1, r1, #0x2000 @ set IOB to new locking + strh r1, [r0] @ write ulocking: ldrh r1, [r0] @ get DPLL value - tst r1, #1 + tst r1, #1 beq ulocking @ while LOCK not set /* EMIF init */ @@ -257,7 +254,7 @@ ulocking: bic r1, r1, #0x0c @ pwr down disabled, flash WP orr r1, r1, #0x01 str r1, [r0, #0x0c] - + ldr r1, VAL_EMIFS_CS0_CONFIG str r1, [r0, #0x10] @ EMIFS_CS0_CONFIG ldr r1, VAL_EMIFS_CS1_CONFIG

2 1

[U-Boot-Users] PATCH for cmd_mem.c:do_mem_mtest()
by Andrew Dyer 22 Jul '06

22 Jul '06

Sorry the patch below isn't from git - I hope it's still acceptable. I've put a copy in the body and attached it incase gmail decides to line wrap the text. ChangeLog: * Patch by Andrew Dyer, 13 September 2005: if CFG_ALT_MEMTEST is defined without CFG_MEMTEST_SCRATCH, cmd_mem.c code will dereference a null pointer. Change the code to use the last word of the memory test area as the scratch location in this case. Print the scratch memory location used. Signed-off-by: Andrew Dyer <amdyer(a)gmail.com> Index: common/cmd_mem.c =================================================================== RCS file: /home/cvsroot/Projects/u-boot/common/cmd_mem.c,v retrieving revision 1.1.1.1 diff -p -u -r1.1.1.1 cmd_mem.c --- common/cmd_mem.c 28 Jun 2005 17:32:26 -0000 1.1.1.1 +++ common/cmd_mem.c 13 Sep 2005 10:40:26 -0000 @@ -707,7 +707,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int #if defined(CFG_MEMTEST_SCRATCH) vu_long *dummy = (vu_long*)CFG_MEMTEST_SCRATCH; #else - vu_long *dummy = NULL; + vu_long *dummy; #endif int j; int iterations = 1; @@ -747,7 +747,17 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int } #if defined(CFG_ALT_MEMTEST) + +#if !defined(CFG_MEMTEST_SCRATCH) + /* if no fixed scratch area is defined use + * the last location of the test area + */ + end--; + dummy = end; +#endif + printf ("Testing %08x ... %08x:\n", (uint)start, (uint)end); + printf ("using address %08x as scratch\n",dummy); PRINTF("%s:%d: start 0x%p end 0x%p\n", __FUNCTION__, __LINE__, start, end); -- Hardware, n.: The parts of a computer system that can be kicked.

6 16

[U-Boot-Users] My 3 patches
by luo.jinhua 22 Jul '06

22 Jul '06

Hi. Here is my 3 patches. sbc2410x.patch is for the new board -- SBC-2410X. I write this new hardware-specific configurations refer to smdk2410 configurations in U-Boot. File list: MAKEALL Makefile board/sbc2410x/Makefile board/sbc2410x/config.mk board/sbc2410x/flash.c board/sbc2410x/lowlevel_init.S board/sbc2410x/sbc2410x.c board/sbc2410x/u-boot.lds cpu/arm920t/s3c24x0/interrupts.c include/configs/sbc2410x.h This patch adds a new configuration option -- CONFIG_SBC2410X. cmdline_editing.patch implements cmdline-editing extension of readline. I pick codes heavily borrowed from vivi bootloader and integrate them into U-Boot. File list: common/main.c This patch adds a new configuration option -- CONFIG_CMDLINE_EDITING. nand_for_sbc2410x.patch adds nand support for SBC-2410X board. It do that by taking nand controller specific codes (from VCMA9 board) in place. File list: common/cmd_nand.c include/linux/mtd/nand.h include/linux/mtd/nand_ids.h more detail please review: http://sourceforge.net/mailarchive/forum.php?thread_id=8089177&forum_id=128… CHANGELOG item: * Add support for friendly-arm SBC-2410X board Patch by JinHua Luo, 1 Sep 2005 * Add to readline cmdline-editing extension Patch by JinHua Luo, 1 Sep 2005 * Add nand support for SBC-2410X Patch by JinHua Luo, 1 Sep 2005 CREDIT item (if proper): N: JinHua Luo E: luo.jinhua(a)gd-linux.com home_king(a)163.com D: Support for friendly-arm SBC-2410X board D: Add to readline cmdline-editing extension D: Add nand support for SBC-2410X W: www.gd-linux.com Best regards, luo.jinhua -- JinHua Luo, GuangDong Linux Center, <luo.jinhua(a)gd-linux.com>

3 3

[U-Boot-Users] i386 multi_image.
by David Updegraff 22 Jul '06

22 Jul '06

Hi. I think this is needed to correctly boot multi-part images if you are unfortuanate enough to be working on an i386 platform. -dbu. diff --git a/lib_i386/i386_linux.c b/lib_i386/i386_linux.c --- a/lib_i386/i386_linux.c +++ b/lib_i386/i386_linux.c @@ -150,6 +150,11 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, in initrd_start = 0; initrd_end = 0; } + /* <dave(a)cray.com> : if multi-part img. need to advance base ptr */ + if ((hdr->ih_type==IH_TYPE_MULTI) && (len_ptr[1])) { + int i; + for (i=0, addr+=sizeof(int); len_ptr[i++]; addr+=sizeof(int)); + } base_ptr = load_zimage((void*)addr + sizeof(image_header_t), ntohl(hdr->ih_size), initrd_start, initrd_end-initrd_start, 0);

2 1

[U-Boot-Users] [Patch] KVME080 Support
by Sangmoon Kim 22 Jul '06

22 Jul '06

Hi, This patch adds support for KVME080 board. KVME080 is a VME board with MPC8245 CPU. It also patches drivers/cfi_flash.c. First, it adds CFG_FLASH_PROTECT_CLEAR because for some flash memories(such as 28F320C3) all banks are protected after reset. Second, it makes write_buff not to call flash_write_cfibuffer if buffer_size is1. Because for flash memories with buffer_size 1, buffer write is not supported. Third, it makes 64 bit writes to use FLASH_WRITE64 if FLASH_WRITE64 is defined. Because KVME080 needs it. Fourth, it makes flash_detect_cfi call FLASH_PORTWIDTH when changing portwidth if FLASH_PORTWIDTH is defined. Because on some CPUs (such as MPC8245), port width should be changed. Regards, Sangmoon Kim

2 3

[U-Boot-Users] MIPS LE build problems
by Wolfgang Denk 22 Jul '06

22 Jul '06

Dear Thomas, I always wondered what exactly was the reason why I was not able to build the dbau1x00 targets (especially the little endian dbau1550_el target using the ELDK toolchain). Also, I always wondered about the reference to a non-exitent cpu/mips/little/liblittle.a library. Is ther ea special reason for the current settings of build options for the dbau1x00 targets? Attached below is a patch which makes all dbau1x00 targets build fine with the current ELDK, and I believe these settings are more correct than the previous ones. If you don't protest I would like to merge this patch into the public source tree? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Remember, there's a big difference between kneeling down and bending over. - Frank Zappa

6 31

[U-Boot-Users] parse bug in cmd_mii.c
by Andrew Dyer 22 Jul '06

22 Jul '06

I noticed that in do_mii() the code is dereferencing argv[1] without checking what value argc has. This leads to an exception if a command line like 'mii ' is given where argv[1] is NULL. I have a patch, but my cmd_mii.c is carrying around some other patches (some submitted to the list, some local). Is there a good way to separate out the patches I want to submit by themselves? -- Hardware, n.: The parts of a computer system that can be kicked.

2 4

[U-Boot-Users] PATCH: Add PLEB 2 to top-level makefile
by David Snowdon 20 Jun '06

20 Jun '06

Please find attached a patch to the top level Makefile and associated documentation to add support for the PLEB 2 board (which somehow got left out of the last patch). Modifies: Makefile README MAKEALL Regards, Dave.

2 1

[U-Boot-Users] NOTE: New MTD flash partitioning methods
by Wolfgang Denk 20 Jun '06

20 Jun '06

Hello everybody, especially board maintainers! I just comitted a bigger patch that implements a new "mtdparts" command and a common partition scheme that allows U-Boot and Linux to share the same idea about flash partitioning.. Old, obsolete and duplicated code was cleaned up and replaced by the new partitioning method. There are two possible approaches now: The first one is to define a single, static partition: #undef CONFIG_JFFS2_CMDLINE #define CONFIG_JFFS2_DEV "nor0" #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */ #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */ #define CONFIG_JFFS2_PART_OFFSET 0x00000000 The second method is to use the "mtdparts" command line and dynamic partitioning: /* mtdparts command line support */ #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2" #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)" Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. The code was tested on the following targets: Alaska8220, CPCI4052, NC650, PPChamelion, incaip. Besides the above targets, there were several other targets affected, where necessary changes were made. However, no testing was done for those targets, only compilation was verified (for PPC, MIPS and ARM targets). Due to the lack of tool chain for NICOS and i386 I was not able to compile the following targets: ADNPESC1, DK1C20, DK1S10, sc520_cdp, sc520_spunk. Among the modified and not tested targets there is a group of targets which were implementing their custom multi-partition scheme. This was mostly duplicating jffs2_part_info() routine code. Introducing the new common scheme required removing this duplicated code, so those targets should be especially carefully tested by the board main- tainers. Target list that require special attention: xsengine, voiceblue, mx1fs2, MPC8260ADS, innokom and VoVPN-GW (JFFS2 is by default not compiled in) and especially SXNI855T where the jffs2_part_info() routine was doing some custom NAND read caching. Thanks. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de If there was anything that depressed him more than his own cynicism, it was that quite often it still wasn't as cynical as real life. - Terry Pratchett, _Guards! Guards!_

2 2

[U-Boot-Users] PATCH - Add support for wrPPMC7xx/74xx boards
by Richard Danter 20 Jun '06

20 Jun '06

Please find attached my patch for the Wind River PPMC 7xx/74xx boards. It has been tested with an MPC750 (66MHz bus) and MPC7400 (100MHz bus). It adds ppmc7xx to the board directory. The following common files have been modified: cpu/74xx_7xx/cpu.c cpu/74xx_7xx/start.S CREDITS drivers/pci.c include/ns16550.h MAKEALL Makefile This is my first patch so please let me know if I have missed anything. Thanks Rich

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[U-Boot-Users] [PATCH] Support for new board, gth2
by Thomas Lange 19 Jun '06

19 Jun '06

* Patch by Thomas Lange Aug 11 2005 - Add support for gth2 board Changes to common files: * common/cmd_ide.c Swap input data if GTH2 and Big endian * cpu/mips/au1x00_serial.c Call GTH2 log functions. Make sure watchdog is kicked * cpu/mips/cpu.c If gth2, hang during reset until hardware watchdog kicks in * include/asm-mips/au1x00.h Add GPIO definitions /Thomas

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[U-Boot-Users] [PATCH] dbau1x00 corrections
by Thomas Lange 19 Jun '06

19 Jun '06

* Patch by Thomas Lange Aug 10 2005 - Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. /Thomas Index: board/dbau1x00/lowlevel_init.S =================================================================== RCS file: /cvsroot/u-boot/u-boot/board/dbau1x00/lowlevel_init.S,v retrieving revision 1.1 diff -p -u -r1.1 lowlevel_init.S --- board/dbau1x00/lowlevel_init.S 2 Apr 2005 23:52:28 -0000 1.1 +++ board/dbau1x00/lowlevel_init.S 10 Aug 2005 13:07:23 -0000 @@ -185,6 +185,8 @@ tlbloop: bne t0, t2, tlbloop nop +#endif /* CONFIG_DBAU1550 */ + /* First setup pll:s to make serial work ok */ /* We have a 12 MHz crystal */ li t0, SYS_CPUPLL @@ -205,6 +207,7 @@ tlbloop: sw t1, 0(t0) /* aux pll */ sync +#ifdef CONFIG_DBAU1550 /* Static memory controller */ /* RCE0 - can not change while fetching, do so from icache */ move t2, ra /* Store return address */ @@ -237,7 +240,7 @@ noCacheJump: sw t1, 0(t0) #else /* CONFIG_DBAU1550 */ li t0, MEM_STTIME0 - li t1, 0x00014C0F + li t1, 0x040181D7 sw t1, 0(t0) /* RCE0 AMD 29LV640M MirrorBit Flash */ Index: include/configs/dbau1x00.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/dbau1x00.h,v retrieving revision 1.4 diff -p -u -r1.4 dbau1x00.h --- include/configs/dbau1x00.h 9 Jan 2005 22:29:00 -0000 1.4 +++ include/configs/dbau1x00.h 10 Aug 2005 13:07:24 -0000 @@ -81,8 +81,7 @@ CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \ CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C)) #else /* CONFIG_DBAU1550 */ -/* Boot from Compact flash partition 2 as default */ -#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm" +#define CONFIG_BOOTCOMMAND "bootp;bootm" #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \ ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \ @@ -133,8 +132,6 @@ #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */ -#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} - #else /* CONFIG_DBAU1550 */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ @@ -145,6 +142,8 @@ #endif /* CONFIG_DBAU1550 */ +#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} + #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1

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RE: [U-Boot-Users] [PATCH] update-configuration-for-cmc-pu2-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

wd(a)denx.de wrote on Wednesday, November 16, 2005 3:28 PM: > In message > <47F3F98010FF784EBEE6526EAAB078D1C05E9B(a)tq-mailsrv.tq-net.de> you > wrote: > > > > Update configuration for CMC-PU2 board > > Patch by Martin Krause, 16 Nov 2005 > > > > This configuration is in usage some time now. Only the patch hasn't > > been send since now.=20 > > I reject this patch. Please remove dead / unused code instead of > using "#if 0"; if you want it back you get it from the git / CVS > history. OK. Attached a cleaned version. Update configuration for CMC-PU2 board Patch by Martin Krause, 17 Nov 2005 This configuration is in usage some time now. Only the patch hasn't been send since now. Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Update configuration for CMC-PU2 board Patch by Martin Krause, 17 Nov 2005

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[U-Boot-Users] [PATCH] Adjust TQM5200 make targets
by Martin Krause 19 Jun '06

19 Jun '06

Adjust TQM5200 make targets Patch by Martin Krause, 07 Nov 2005 Make the automatic CS configuration the default. The dedicated configurations CONFIG_TQM5200_AA, CONFIG_TQM5200_AB and CONFIG_TQM5200_AC are removed. "TQM5200_config" is now the default for STK52XX.200 base boards. On a STK52XX.100 base board "TQM5200_STK100_config" should be used. Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Adjust TQM5200 make targets Patch by Martin Krause 07 Nov 2005 ---

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[U-Boot-Users] [PATCH] 08-change-boot-delay-message-on-trab-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

Change boot delay message on trab board Patch by Martin Krause, 27 Oct 2005 In series production versions of trab u-boot, this patch allways was applied - but had been forgotten to push it up into denx U-Boot tree, since now. Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Change boot delay message on trab board Patch by Martin Krause, 27 Oct 2005

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[U-Boot-Users] [PATCH] 07-fix-setting-of-environment-variable-ver-on-trab-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

Fix setting of environment variable "ver" on trab board Patch by Martin Krause, 27 Oct 2005 The environment variable "ver" is now set before do_auto_update() is called, so that "ver" could be used in USB update scripts. Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Fix setting of environment variable "ver" on trab board Patch by Martin Krause, 27 Oct 2005

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[U-Boot-Users] [PATCH] 06-fix-wrong-usage-of-udelay-in-led-blink-on-trab-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

Fix wrong usage of udelay() in led_blink() on trab board Patch by Martin Krause, 27 Oct 2005 Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Fix wrong usage of udelay() in led_blink() on trab board Patch by Martin Krause, 27 Oct 2005

2 1

[U-Boot-Users] [PATCH] 05-fix-conflicting-types-flash-write-in-trab-auto-update-c.patch
by Martin Krause 19 Jun '06

19 Jun '06

Fix conflicting types (flash_write()) in trab auto_update.c Patch by Martin Krause, 25 Oct 2005 Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Fix conflicting types (flash_write()) in trab auto_update.c Patch by Martin Krause, 25 Oct 2005

2 1

[U-Boot-Users] [PATCH] 04-fix-udelay-bug-in-vfd-c-for-trab-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

Fix udelay bug in vfd.c for trab board Patch by Martin Krause, 27 Oct 2005 Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Fix udelay bug in vfd.c for trab board Patch by Martin Krause, 27 Oct 2005

2 1

[U-Boot-Users] [PATCH] 03-disable-jffs2-support-for-trab-board.patch
by Martin Krause 19 Jun '06

19 Jun '06

Disable JFFS2 support for trab board Patch by Martin Krause, 27 Oct 2005 This feature isn't used yet in the trab series U-Boot version. Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Disable JFFS2 support for trab board Patch by Martin Krause, 27 Oct 2005

2 1

[U-Boot-Users] [PATCH] change-mtdparts-definition-on-trab-board-to-match-current-flash-map
by Martin Krause 19 Jun '06

19 Jun '06

Change mtdparts definition on trab board to match current flash map Patch by Martin Krause, 27 Oct 2005 Regards, Martin Signed-off-by: Martin Krause <martin.krause(a)tqs.de> CHANGELOG: * Change mtdparts definition on trab board to match current flash map Patch by Martin Krause, 27 Oct 2005

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[U-Boot-Users] [Patch] MCF5282 without preloader
by Jens Scharsig 12 Jun '06

12 Jun '06

This patch adds the MCF5282 support and includes the Zachary P. Landau fec and immap fixes as patch. CHANGELOG: * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add MCF5282 support (without preloader) relocate ichache_State to ram u-boot can run from internal flash THX to Zachary P. Landau and Wolfgang Denk for help and inspirations. Best regards Jens Scharsig * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add MCF5282 support (without preloader) relocate ichache_State to ram u-boot can run from internal flash

3 2

[U-Boot-Users] [Patch] New Board (EB+MCF-EV123 based on Frescale MCF5282)
by Jens Scharsig 12 Jun '06

12 Jun '06

This patch adds the BuS EB+MCF-EV123 Board. Board characteristics: CPU: Frescale MCF5282 RAM: 16MB SDRAM (16 Bit) FLASH: 2MB 16bit external PHY: Inter LXF972 These board is a reference design for future BuS Elektronik consumer boards. I think this patch is helpful for all other MCF528x users. CHANGELOG: * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add EB+MCF-EV123 board support. includes "[Patch] MCF5282 without preloader" Add m68k Boards to MAKEALL THX to Zachary P. Landau and Wolfgang Denk for help. Best regards, Jens Scharsig * Patch by Jens Scharsig (BuS Elektronik GmbH & Co. KG), 08 Aug. 2005: Add EB+MCF-EV123 board support. includes [Patch] MCF5282 without preloader Add m68k Boards to MAKEALL

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[U-Boot-Users] patch: Nios-II boards EP1C20, EP1S10 and EP1S40 part 2
by Scott McNutt 10 Jun '06

10 Jun '06

Part 2: Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 Regards, --Scott diff -Naurb u-boot-current/board/altera/ep1s40/Makefile u-boot-new/board/altera/ep1s40/Makefile --- u-boot-current/board/altera/ep1s40/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1s40/config.mk u-boot-new/board/altera/ep1s40/config.mk --- u-boot-current/board/altera/ep1s40/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1s40/ep1s40.c u-boot-new/board/altera/ep1s40/ep1s40.c --- u-boot-current/board/altera/ep1s40/ep1s40.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/ep1s40.c 2005-08-11 13:16:53.000000000 -0400 @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1S40\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1s40/u-boot.lds u-boot-new/board/altera/ep1s40/u-boot.lds --- u-boot-current/board/altera/ep1s40/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s40/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff -Naurb u-boot-current/include/configs/EP1C20.h u-boot-new/include/configs/EP1C20.h --- u-boot-current/include/configs/EP1C20.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1C20.h 2005-08-11 12:18:18.000000000 -0400 @@ -0,0 +1,199 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1C20 1 /* EP1C20 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ +#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_RESET_ADDR, since we assume the monitor is stored at the + * reset address, no? This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for + * epcs device access is enabled. The base address is the epcs + * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK. + * The register base is currently at offset 0x600 from the memory base. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */ + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- leds are, after all, + * board-specific, no? + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ diff -Naurb u-boot-current/include/configs/EP1S10.h u-boot-new/include/configs/EP1S10.h --- u-boot-current/include/configs/EP1S10.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1S10.h 2005-08-11 13:36:23.000000000 -0400 @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1S10 1 /* EP1S10 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */ + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom + * of flash memory. This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- None for stratix. + *----------------------------------------------------------------------*/ +#undef CFG_NIOS_EPCSBASE + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- since leds are board-specific. + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ diff -Naurb u-boot-current/include/configs/EP1S40.h u-boot-new/include/configs/EP1S40.h --- u-boot-current/include/configs/EP1S40.h 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/include/configs/EP1S40.h 2005-08-11 13:28:35.000000000 -0400 @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*------------------------------------------------------------------------ + * BOARD/CPU + *----------------------------------------------------------------------*/ +#define CONFIG_EP1S40 1 /* EP1S40 board */ +#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ + +#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ +#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ + +/*------------------------------------------------------------------------ + * CACHE -- the following will support II/s and II/f. The II/s does not + * have dcache, so the cache instructions will behave as NOPs. + *----------------------------------------------------------------------*/ +#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */ +#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */ +#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ +#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ + +/*------------------------------------------------------------------------ + * MEMORY BASE ADDRESSES + *----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */ +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ +#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ +#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */ + +/*------------------------------------------------------------------------ + * MEMORY ORGANIZATION + * -Monitor at top. + * -The heap is placed below the monitor. + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + *----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */ +#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */ + +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP CFG_GBL_DATA_OFFSET + +/*------------------------------------------------------------------------ + * FLASH (AM29LV065D) + *----------------------------------------------------------------------*/ +#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */ +#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */ +#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ +#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ + +/*------------------------------------------------------------------------ + * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above + * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom + * of flash memory. This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + *----------------------------------------------------------------------*/ +#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */ +#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) + +/*------------------------------------------------------------------------ + * CONSOLE + *----------------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ +#else +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ +#endif + +#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ +#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ +#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ + +#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ + +/*------------------------------------------------------------------------ + * EPCS Device -- None for stratix. + *----------------------------------------------------------------------*/ +#undef CFG_NIOS_EPCSBASE + +/*------------------------------------------------------------------------ + * DEBUG + *----------------------------------------------------------------------*/ +#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ + +/*------------------------------------------------------------------------ + * TIMEBASE -- + * + * The high res timer defaults to 1 msec. Since it includes the period + * registers, we can slow it down to 10 msec using TMRCNT. If the default + * period is acceptable, TMRCNT can be left undefined. + *----------------------------------------------------------------------*/ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ +#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ +#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) +#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1)) + +/*------------------------------------------------------------------------ + * STATUS LED -- Provides a simple blinking led. For Nios2 each board + * must implement its own led routines -- since leds are board-specific. + *----------------------------------------------------------------------*/ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ +#define CONFIG_STATUS_LED /* Enable status driver */ + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */ + +/*------------------------------------------------------------------------ + * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... + * and really doesn't need any additional clutter. So I choose the lazy + * way out to avoid changes there -- define the base address to ensure + * cache bypass so there's no need to monkey with inx/outx macros. + *----------------------------------------------------------------------*/ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ +#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ +#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ +#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ + +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.2.21 +#define CONFIG_SERVERIP 192.168.2.16 + +/*------------------------------------------------------------------------ + * COMMANDS + *----------------------------------------------------------------------*/ +#define CONFIG_COMMANDS (CFG_CMD_BDI | \ + CFG_CMD_DHCP | \ + CFG_CMD_ECHO | \ + CFG_CMD_ENV | \ + CFG_CMD_FLASH | \ + CFG_CMD_IMI | \ + CFG_CMD_IRQ | \ + CFG_CMD_LOADS | \ + CFG_CMD_LOADB | \ + CFG_CMD_MEMORY | \ + CFG_CMD_MISC | \ + CFG_CMD_NET | \ + CFG_CMD_PING | \ + CFG_CMD_RUN | \ + CFG_CMD_SAVES ) +#include <cmd_confdefs.h> + +/*------------------------------------------------------------------------ + * MISC + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* Provide extended help*/ +#define CFG_PROMPT "==> " /* Command prompt */ +#define CFG_CBSIZE 256 /* Console I/O buf size */ +#define CFG_MAXARGS 16 /* Max command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */ +#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */ +#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */ +#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000 + +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */

2 1

[U-Boot-Users] patch: Nios-II boards EP1C20, EP1S10 and EP1S40 part 1
by Scott McNutt 10 Jun '06

10 Jun '06

Part 1: Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-11 10:49:01.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 12:16:00.000000000 -0400 @@ -26,6 +26,9 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Add Altera Nios-II boards EP1C20, EP1S10 and EP1S40 + Patch by Scott McNutt + * Add EPCS Controller bootrom work-around for Nios-II Patch by Scott McNutt -When booting from an epcs controller, the epcs bootrom may leave the diff -Naurb u-boot-current/MAINTAINERS u-boot-new/MAINTAINERS --- u-boot-current/MAINTAINERS 2005-08-05 19:46:25.000000000 -0400 +++ u-boot-new/MAINTAINERS 2005-08-11 12:30:16.000000000 -0400 @@ -484,6 +484,9 @@ PCI5441 Nios-II PK1C20 Nios-II + EP1C20 Nios-II + EP1S10 Nios-II + EP1S40 Nios-II ######################################################################### # MicroBlaze Systems: # diff -Naurb u-boot-current/MAKEALL u-boot-new/MAKEALL --- u-boot-current/MAKEALL 2005-08-05 19:46:26.000000000 -0400 +++ u-boot-new/MAKEALL 2005-08-11 12:30:52.000000000 -0400 @@ -230,7 +230,7 @@ ## Nios-II Systems ######################################################################### -LIST_nios2="PCI5441 PK1C20" +LIST_nios2="PCI5441 PK1C20 EP1C20 EP1S10 EP1S40" ######################################################################### ## MicroBlaze Systems diff -Naurb u-boot-current/Makefile u-boot-new/Makefile --- u-boot-current/Makefile 2005-08-09 13:22:31.000000000 -0400 +++ u-boot-new/Makefile 2005-08-11 12:29:52.000000000 -0400 @@ -1693,6 +1693,15 @@ ## Nios-II ######################################################################### +EP1C20_config : unconfig + @./mkconfig EP1C20 nios2 nios2 ep1c20 altera + +EP1S10_config : unconfig + @./mkconfig EP1S10 nios2 nios2 ep1s10 altera + +EP1S40_config : unconfig + @./mkconfig EP1S40 nios2 nios2 ep1s40 altera + PK1C20_config : unconfig @./mkconfig PK1C20 nios2 nios2 pk1c20 psyent diff -Naurb u-boot-current/README u-boot-new/README --- u-boot-current/README 2005-08-05 14:10:04.000000000 -0400 +++ u-boot-new/README 2005-08-11 12:31:48.000000000 -0400 @@ -319,6 +319,7 @@ ------------------------ CONFIG_PCI5441 CONFIG_PK1C20 + CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40 - CPU Module Type: (if CONFIG_COGENT is defined) diff -Naurb u-boot-current/board/altera/common/AMDLV065D.c u-boot-new/board/altera/common/AMDLV065D.c --- u-boot-current/board/altera/common/AMDLV065D.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/common/AMDLV065D.c 2005-08-10 14:01:24.000000000 -0400 @@ -0,0 +1,190 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <common.h> +#if defined(CONFIG_NIOS) +#include <nios.h> +#else +#include <asm/io.h> +#endif + +#define SECTSZ (64 * 1024) +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/*----------------------------------------------------------------------*/ +unsigned long flash_init (void) +{ + int i; + unsigned long addr; + flash_info_t *fli = &flash_info[0]; + + fli->size = CFG_FLASH_SIZE; + fli->sector_count = CFG_MAX_FLASH_SECT; + fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D; + + addr = CFG_FLASH_BASE; + for (i = 0; i < fli->sector_count; ++i) { + fli->start[i] = addr; + addr += SECTSZ; + fli->protect[i] = 1; + } + + return (CFG_FLASH_SIZE); +} +/*--------------------------------------------------------------------*/ +void flash_print_info (flash_info_t * info) +{ + int i, k; + int erased; + unsigned long *addr; + + printf (" Size: %ld KB in %d Sectors\n", + info->size >> 10, info->sector_count); + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + + /* Check if whole sector is erased */ + erased = 1; + addr = (unsigned long *) info->start[i]; + for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) { + if ( readl(addr++) != (unsigned long)-1) { + erased = 0; + break; + } + } + + /* Print the info */ + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " "); + } + printf ("\n"); +} + +/*-------------------------------------------------------------------*/ + + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + unsigned char *addr = (unsigned char *) info->start[0]; + unsigned char *addr2; + int prot, sect; + ulong start; + + /* Some sanity checking */ + if ((s_first < 0) || (s_first > s_last)) { + printf ("- no sectors to erase\n"); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + /* It's ok to erase multiple sectors provided we don't delay more + * than 50 usec between cmds ... at which point the erase time-out + * occurs. So don't go and put printf() calls in the loop ... it + * won't be very helpful ;-) + */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr2 = (unsigned char *) info->start[sect]; + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr, 0x80); + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr2, 0x30); + /* Now just wait for 0xff & provide some user + * feedback while we wait. + */ + start = get_timer (0); + while ( readb (addr2) != 0xff) { + udelay (1000 * 1000); + putc ('.'); + if (get_timer (start) > CFG_FLASH_ERASE_TOUT) { + printf ("timeout\n"); + return 1; + } + } + } + } + printf ("\n"); + return 0; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + + vu_char *cmd = (vu_char *) info->start[0]; + vu_char *dst = (vu_char *) addr; + unsigned char b; + ulong start; + + while (cnt) { + /* Check for sufficient erase */ + b = *src; + if ((readb (dst) & b) != b) { + printf ("%02x : %02x\n", readb (dst), b); + return (2); + } + + writeb (cmd, 0xaa); + writeb (cmd, 0x55); + writeb (cmd, 0xa0); + writeb (dst, b); + + /* Verify write */ + start = get_timer (0); + while (readb (dst) != b) { + if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + return 1; + } + } + dst++; + src++; + cnt--; + } + + return (0); +} diff -Naurb u-boot-current/board/altera/common/epled.c u-boot-new/board/altera/common/epled.c --- u-boot-current/board/altera/common/epled.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/common/epled.c 2005-08-09 11:33:38.000000000 -0400 @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <nios2-io.h> +#include <status_led.h> + +/* The LED port is configured as output only, so we + * must track the state manually. + */ +static led_id_t val = 0; + +void __led_init (led_id_t mask, int state) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + if (state == STATUS_LED_ON) + val &= ~mask; + else + val |= mask; + writel (&pio->data, val); +} + +void __led_set (led_id_t mask, int state) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + if (state == STATUS_LED_ON) + val &= ~mask; + else + val |= mask; + writel (&pio->data, val); +} + +void __led_toggle (led_id_t mask) +{ + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; + + val ^= mask; + writel (&pio->data, val); +} diff -Naurb u-boot-current/board/altera/ep1c20/Makefile u-boot-new/board/altera/ep1c20/Makefile --- u-boot-current/board/altera/ep1c20/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1c20/config.mk u-boot-new/board/altera/ep1c20/config.mk --- u-boot-current/board/altera/ep1c20/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1c20/ep1c20.c u-boot-new/board/altera/ep1c20/ep1c20.c --- u-boot-current/board/altera/ep1c20/ep1c20.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/ep1c20.c 2005-08-11 12:11:38.000000000 -0400 @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int board_early_init_f (void) +{ + return 0; +} + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1C20\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1c20/u-boot.lds u-boot-new/board/altera/ep1c20/u-boot.lds --- u-boot-current/board/altera/ep1c20/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1c20/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff -Naurb u-boot-current/board/altera/ep1s10/Makefile u-boot-new/board/altera/ep1s10/Makefile --- u-boot-current/board/altera/ep1s10/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/Makefile 2005-08-11 12:10:57.000000000 -0400 @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2004 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COMOBJS := ../common/AMDLV065D.o ../common/epled.o + +OBJS := $(BOARD).o $(COMOBJS) + +SOBJS = + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naurb u-boot-current/board/altera/ep1s10/config.mk u-boot-new/board/altera/ep1s10/config.mk --- u-boot-current/board/altera/ep1s10/config.mk 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/config.mk 2005-08-11 12:09:47.000000000 -0400 @@ -0,0 +1,31 @@ +# +# (C) Copyright 2005, Psyent Corporation <www.psyent.com> +# Scott McNutt <smcnutt(a)psyent.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x01fc0000 + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff -Naurb u-boot-current/board/altera/ep1s10/ep1s10.c u-boot-new/board/altera/ep1s10/ep1s10.c --- u-boot-current/board/altera/ep1s10/ep1s10.c 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/ep1s10.c 2005-08-11 12:28:03.000000000 -0400 @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int board_early_init_f (void) +{ + return 0; +} + +int checkboard (void) +{ + puts ("BOARD : Altera EP-1S10\n"); + return 0; +} + +long int initdram (int board_type) +{ + return (0); +} diff -Naurb u-boot-current/board/altera/ep1s10/u-boot.lds u-boot-new/board/altera/ep1s10/u-boot.lds --- u-boot-current/board/altera/ep1s10/u-boot.lds 1969-12-31 19:00:00.000000000 -0500 +++ u-boot-new/board/altera/ep1s10/u-boot.lds 2004-10-10 17:27:32.000000000 -0400 @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt(a)psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + .text : + { + cpu/nios2/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +}

2 1

[U-Boot-Users] patch:
by Scott McNutt 10 Jun '06

10 Jun '06

Add EPCS Controller bootrom work-around for Nios-II -When booting from an epcs controller, the epcs bootrom may leave the slave select in an asserted state causing soft reset hang. This patch ensures slave select is negated at reset. Regards, --Scott --- u-boot-current/CHANGELOG 2005-08-11 10:41:00.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:45:49.000000000 -0400 @@ -26,6 +26,12 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Add EPCS Controller bootrom work-around for Nios-II + Patch by Scott McNutt + -When booting from an epcs controller, the epcs bootrom may leave the + slave select in an asserted state causing soft reset hang. This + patch ensures slave select is negated at reset. + * Update PK1C20 board for Nios-II 5.0 Patch by Scott McNutt -Update base addresses for standard configuration diff -Naurb u-boot-current/cpu/nios2/epcs.c u-boot-new/cpu/nios2/epcs.c --- u-boot-current/cpu/nios2/epcs.c 2005-08-09 13:24:21.000000000 -0400 +++ u-boot-new/cpu/nios2/epcs.c 2005-08-10 10:18:31.000000000 -0400 @@ -210,6 +210,21 @@ { 0, 0, 0, 0, 0, 0 } }; +int epcs_reset (void) +{ + /* When booting from an epcs controller, the epcs bootrom + * code may leave the slave select in an asserted state. + * This causes two problems: (1) The initial epcs access + * will fail -- not a big deal, and (2) a software reset + * will cause the bootrom code to hang since it does not + * ensure the select is negated prior to first access -- a + * big deal. Here we just negate chip select and everything + * gets better :-) + */ + epcs_cs (0); /* Negate chip select */ + return (0); +} + epcs_devinfo_t *epcs_dev_find (void) { unsigned char buf[4]; diff -Naurb u-boot-current/include/nios2-epcs.h u-boot-new/include/nios2-epcs.h --- u-boot-current/include/nios2-epcs.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/nios2-epcs.h 2005-08-10 10:15:40.000000000 -0400 @@ -38,6 +38,11 @@ unsigned char prot_mask; /* Protection mask */ }epcs_devinfo_t; +/* Resets the epcs controller -- to prevent (potential) soft-reset + * problems when booting from the epcs controller + */ +extern int epcs_reset (void); + /* Returns the devinfo struct if EPCS device is found; * NULL otherwise. */ diff -Naurb u-boot-current/lib_nios2/board.c u-boot-new/lib_nios2/board.c --- u-boot-current/lib_nios2/board.c 2004-10-10 17:27:35.000000000 -0400 +++ u-boot-new/lib_nios2/board.c 2005-08-10 10:15:55.000000000 -0400 @@ -31,6 +31,9 @@ #ifdef CONFIG_STATUS_LED #include <status_led.h> #endif +#if defined(CFG_NIOS_EPCSBASE) +#include <nios2-epcs.h> +#endif /* @@ -92,6 +95,9 @@ #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, /* Call board-specific init code early.*/ #endif +#if defined(CFG_NIOS_EPCSBASE) + epcs_reset, +#endif env_init, serial_init, @@ -166,6 +172,10 @@ WATCHDOG_RESET (); interrupt_init (); +#if defined(CONFIG_BOARD_LATE_INIT) + board_late_init (); +#endif + /* main_loop */ for (;;) { WATCHDOG_RESET ();

2 1

[U-Boot-Users] patch: PK1C20 for Nios-II 5.0
by Scott McNutt 10 Jun '06

10 Jun '06

Update PK1C20 board for Nios-II 5.0 -Update base addresses for standard configuration -Eliminate use of CACHE_BYPASS in board code Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-11 10:31:52.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:38:07.000000000 -0400 @@ -26,6 +26,11 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Update PK1C20 board for Nios-II 5.0 + Patch by Scott McNutt + -Update base addresses for standard configuration + -Eliminate use of CACHE_BYPASS in board code + * Fix I/O Macros and mini-app stubs for Nios-II Patch by Scott McNutt -Fix asm/io.h macros diff -Naurb u-boot-current/board/psyent/pk1c20/config.mk u-boot-new/board/psyent/pk1c20/config.mk --- u-boot-current/board/psyent/pk1c20/config.mk 2004-10-10 17:27:32.000000000 -0400 +++ u-boot-new/board/psyent/pk1c20/config.mk 2005-08-09 17:34:46.000000000 -0400 @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x018e0000 +TEXT_BASE = 0x01fc0000 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include diff -Naurb u-boot-current/board/psyent/pk1c20/led.c u-boot-new/board/psyent/pk1c20/led.c --- u-boot-current/board/psyent/pk1c20/led.c 2004-10-10 17:27:32.000000000 -0400 +++ u-boot-new/board/psyent/pk1c20/led.c 2005-08-09 11:33:38.000000000 -0400 @@ -22,7 +22,7 @@ */ #include <common.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <status_led.h> @@ -33,30 +33,30 @@ void __led_init (led_id_t mask, int state) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; if (state == STATUS_LED_ON) val &= ~mask; else val |= mask; - pio->data = val; + writel (&pio->data, val); } void __led_set (led_id_t mask, int state) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; if (state == STATUS_LED_ON) val &= ~mask; else val |= mask; - pio->data = val; + writel (&pio->data, val); } void __led_toggle (led_id_t mask) { - nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR); + nios_pio_t *pio = (nios_pio_t *)CFG_LEDPIO_ADDR; val ^= mask; - pio->data = val; + writel (&pio->data, val); } diff -Naurb u-boot-current/include/configs/PK1C20.h u-boot-new/include/configs/PK1C20.h --- u-boot-current/include/configs/PK1C20.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/configs/PK1C20.h 2005-08-09 18:04:01.000000000 -0400 @@ -32,7 +32,7 @@ #define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */ #define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ -#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */ +#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ @@ -51,7 +51,7 @@ #define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ #define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */ #define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */ -#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */ +#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */ #define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/ /*------------------------------------------------------------------------ @@ -61,7 +61,7 @@ * -Global data is placed below the heap. * -The stack is placed below global data (&grows down). *----------------------------------------------------------------------*/ -#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */ #define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) @@ -95,9 +95,9 @@ * CONSOLE *----------------------------------------------------------------------*/ #if defined(CONFIG_CONSOLE_JTAG) -#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */ +#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ #else -#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */ +#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */ #endif #define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ @@ -110,9 +110,9 @@ * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for * epcs device access is enabled. The base address is the epcs * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK. - * The register base is currently at offset 0x400 from the memory base. + * The register base is currently at offset 0x600 from the memory base. *----------------------------------------------------------------------*/ -#define CFG_NIOS_EPCSBASE 0x00900400 /* EPCS register base */ +#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */ /*------------------------------------------------------------------------ * DEBUG @@ -126,7 +126,7 @@ * registers, we can slow it down to 10 msec using TMRCNT. If the default * period is acceptable, TMRCNT can be left undefined. *----------------------------------------------------------------------*/ -#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ +#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ #define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */ #define CFG_NIOS_TMRMS 10 /* 10 msec per tick */ #define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) @@ -137,7 +137,7 @@ * must implement its own led routines -- leds are, after all, * board-specific, no? *----------------------------------------------------------------------*/ -#define CFG_LEDPIO_ADDR 0x00920840 /* LED PIO base addr */ +#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ #define CONFIG_STATUS_LED /* Enable status driver */ #define STATUS_LED_BIT 1 /* Bit-0 on PIO */ @@ -150,7 +150,7 @@ * way out to avoid changes there -- define the base address to ensure * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ -#define CONFIG_SMC91111_BASE 0x80910300 /* Base addr (bypass) */ +#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ #define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff -Naurb u-boot-current/board/psyent/common/AMDLV065D.c u-boot-new/board/psyent/common/AMDLV065D.c --- u-boot-current/board/psyent/common/AMDLV065D.c 2004-10-10 17:27:31.000000000 -0400 +++ u-boot-new/board/psyent/common/AMDLV065D.c 2005-08-10 14:01:24.000000000 -0400 @@ -26,7 +26,7 @@ #if defined(CONFIG_NIOS) #include <nios.h> #else -#include <nios2.h> +#include <asm/io.h> #endif #define SECTSZ (64 * 1024) @@ -56,9 +56,8 @@ void flash_print_info (flash_info_t * info) { int i, k; - unsigned long size; int erased; - volatile unsigned char *flash; + unsigned long *addr; printf (" Size: %ld KB in %d Sectors\n", info->size >> 10, info->sector_count); @@ -66,14 +65,10 @@ for (i = 0; i < info->sector_count; ++i) { /* Check if whole sector is erased */ - if (i != (info->sector_count - 1)) - size = info->start[i + 1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; erased = 1; - flash = (volatile unsigned char *) CACHE_BYPASS(info->start[i]); - for (k = 0; k < size; k++) { - if (*flash++ != 0xff) { + addr = (unsigned long *) info->start[i]; + for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) { + if ( readl(addr++) != (unsigned long)-1) { erased = 0; break; } @@ -83,7 +78,7 @@ if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s%s", - CACHE_NO_BYPASS(info->start[i]), + info->start[i], erased ? " E" : " ", info->protect[i] ? "RO " : " "); } @@ -95,9 +90,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { - volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) - CACHE_BYPASS(info->start[0]); - volatile CFG_FLASH_WORD_SIZE *addr2; + unsigned char *addr = (unsigned char *) info->start[0]; + unsigned char *addr2; int prot, sect; ulong start; @@ -127,19 +121,18 @@ */ for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CFG_FLASH_WORD_SIZE *) - CACHE_BYPASS((info->start[sect])); - *addr = 0xaa; - *addr = 0x55; - *addr = 0x80; - *addr = 0xaa; - *addr = 0x55; - *addr2 = 0x30; + addr2 = (unsigned char *) info->start[sect]; + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr, 0x80); + writeb (addr, 0xaa); + writeb (addr, 0x55); + writeb (addr2, 0x30); /* Now just wait for 0xff & provide some user * feedback while we wait. */ start = get_timer (0); - while (*addr2 != 0xff) { + while ( readb (addr2) != 0xff) { udelay (1000 * 1000); putc ('.'); if (get_timer (start) > CFG_FLASH_ERASE_TOUT) { @@ -163,27 +156,27 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { - vu_char *cmd = (vu_char *) CACHE_BYPASS(info->start[0]); - vu_char *dst = (vu_char *) CACHE_BYPASS(addr); + vu_char *cmd = (vu_char *) info->start[0]; + vu_char *dst = (vu_char *) addr; unsigned char b; ulong start; while (cnt) { /* Check for sufficient erase */ b = *src; - if ((*dst & b) != b) { - printf ("%02x : %02x\n", *dst, b); + if ((readb (dst) & b) != b) { + printf ("%02x : %02x\n", readb (dst), b); return (2); } - *cmd = 0xaa; - *cmd = 0x55; - *cmd = 0xa0; - *dst = b; + writeb (cmd, 0xaa); + writeb (cmd, 0x55); + writeb (cmd, 0xa0); + writeb (dst, b); /* Verify write */ start = get_timer (0); - while (*dst != b) { + while (readb (dst) != b) { if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { return 1; }

2 1

[U-Boot-Users] patch: Nios-II mini-app and I/O macros
by Scott McNutt 10 Jun '06

10 Jun '06

Fix I/O Macros and mini-app stubs for Nios-II -Fix asm/io.h macros -Eliminate use of CACHE_BYPASS in cpu code -Eliminate assembler warnings -Fix mini-app stubs and force no small data Regards, --Scott diff -Naurb u-boot-current/CHANGELOG u-boot-new/CHANGELOG --- u-boot-current/CHANGELOG 2005-08-07 19:06:32.000000000 -0400 +++ u-boot-new/CHANGELOG 2005-08-11 10:30:51.000000000 -0400 @@ -26,6 +26,13 @@ Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. +* Fix I/O Macros and mini-app stubs for Nios-II + Patch by Scott McNutt + -Fix asm/io.h macros + -Eliminate use of CACHE_BYPASS in cpu code + -Eliminate assembler warnings + -Fix mini-app stubs and force no small data + * Fix build problems for PM856 Board * Fix sign extension bug in 'fpga loadb' command; diff -Naurb u-boot-20050809/cpu/nios2/epcs.c u-boot-new/cpu/nios2/epcs.c --- u-boot-20050809/cpu/nios2/epcs.c 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/cpu/nios2/epcs.c 2005-08-09 11:05:32.781250000 -0400 @@ -25,7 +25,7 @@ #if defined(CFG_NIOS_EPCSBASE) #include <command.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <nios2-epcs.h> @@ -72,8 +72,7 @@ */ #define EPCS_TIMEOUT 100 /* 100 msec timeout */ -static nios_spi_t *epcs = - (nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE); +static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE; /*********************************************************************** * Device access @@ -81,16 +80,20 @@ static int epcs_cs (int assert) { ulong start; + unsigned tmp; + if (assert) { - epcs->control |= NIOS_SPI_SSO; + tmp = readl (&epcs->control); + writel (&epcs->control, tmp | NIOS_SPI_SSO); } else { /* Let all bits shift out */ start = get_timer (0); - while ((epcs->status & NIOS_SPI_TMT) == 0) + while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - epcs->control &= ~NIOS_SPI_SSO; + tmp = readl (&epcs->control); + writel (&epcs->control, tmp & ~NIOS_SPI_SSO); } return (0); } @@ -100,10 +103,10 @@ ulong start; start = get_timer (0); - while ((epcs->status & NIOS_SPI_TRDY) == 0) + while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - epcs->txdata = c; + writel (&epcs->txdata, c); return (0); } @@ -112,10 +115,10 @@ ulong start; start = get_timer (0); - while ((epcs->status & NIOS_SPI_RRDY) == 0) + while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0) if (get_timer (start) > EPCS_TIMEOUT) return (-1); - return (epcs->rxdata); + return (readl (&epcs->rxdata)); } static unsigned char bitrev[] = { diff -Naurb u-boot-20050809/cpu/nios2/interrupts.c u-boot-new/cpu/nios2/interrupts.c --- u-boot-20050809/cpu/nios2/interrupts.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/interrupts.c 2005-08-09 11:27:39.515625000 -0400 @@ -27,6 +27,7 @@ #include <nios2.h> #include <nios2-io.h> +#include <asm/io.h> #include <asm/ptrace.h> #include <common.h> #include <command.h> @@ -79,7 +80,7 @@ /* Interrupt is cleared by writing anything to the * status register. */ - tmr->status = 0; + writel (&tmr->status, 0); timestamp += CFG_NIOS_TMRMS; #ifdef CONFIG_STATUS_LED status_led_tick(timestamp); @@ -88,16 +89,17 @@ static void tmr_init (void) { - nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE); + nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE; + + writel (&tmr->status, 0); + writel (&tmr->control, 0); + writel (&tmr->control, NIOS_TIMER_STOP); - tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO); - tmr->control |= NIOS_TIMER_STOP; #if defined(CFG_NIOS_TMRCNT) - tmr->periodl = CFG_NIOS_TMRCNT & 0xffff; - tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff; + writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff); + writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff); #endif - tmr->control |= ( NIOS_TIMER_ITO | - NIOS_TIMER_CONT | + writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START ); irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr); } diff -Naurb u-boot-20050809/cpu/nios2/serial.c u-boot-new/cpu/nios2/serial.c --- u-boot-20050809/cpu/nios2/serial.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/serial.c 2005-08-09 10:49:40.203125000 -0400 @@ -24,7 +24,7 @@ #include <common.h> #include <watchdog.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> /*------------------------------------------------------------------ @@ -32,8 +32,7 @@ *-----------------------------------------------------------------*/ #if defined(CONFIG_CONSOLE_JTAG) -static nios_jtag_t *jtag = - (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE); +static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE; void serial_setbrg( void ){ return; } int serial_init( void ) { return(0);} @@ -42,9 +41,9 @@ { unsigned val; - while (NIOS_JTAG_WSPACE (jtag->control) == 0) + while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0) WATCHDOG_RESET (); - jtag->data = (unsigned char)c; + writel (&jtag->data, (unsigned char)c); } void serial_puts (const char *s) @@ -55,7 +54,7 @@ int serial_tstc (void) { - return (jtag->control & NIOS_JTAG_RRDY); + return ( readl (&jtag->control) & NIOS_JTAG_RRDY); } int serial_getc (void) @@ -65,7 +64,7 @@ while (1) { WATCHDOG_RESET (); - val = jtag->data; + val = readl (&jtag->data); if (val & NIOS_JTAG_RVALID) break; } @@ -78,8 +77,7 @@ *-----------------------------------------------------------------*/ #else -static nios_uart_t *uart = (nios_uart_t *) - CACHE_BYPASS(CFG_NIOS_CONSOLE); +static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE; #if defined(CFG_NIOS_FIXEDBAUD) @@ -97,7 +95,7 @@ unsigned div; div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; - uart->divisor = div; + writel (&uart->divisor,div); return; } @@ -117,9 +115,9 @@ { if (c == '\n') serial_putc ('\r'); - while ((uart->status & NIOS_UART_TRDY) == 0) + while ((readl (&uart->status) & NIOS_UART_TRDY) == 0) WATCHDOG_RESET (); - uart->txdata = (unsigned char)c; + writel (&uart->txdata,(unsigned char)c); } void serial_puts (const char *s) @@ -131,14 +129,14 @@ int serial_tstc (void) { - return (uart->status & NIOS_UART_RRDY); + return (readl (&uart->status) & NIOS_UART_RRDY); } int serial_getc (void) { while (serial_tstc () == 0) WATCHDOG_RESET (); - return( uart->rxdata & 0x00ff ); + return (readl (&uart->rxdata) & 0x00ff ); } #endif /* CONFIG_JTAG_CONSOLE */ diff -Naurb u-boot-20050809/cpu/nios2/sysid.c u-boot-new/cpu/nios2/sysid.c --- u-boot-20050809/cpu/nios2/sysid.c 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/cpu/nios2/sysid.c 2005-08-09 10:55:19.234375000 -0400 @@ -26,20 +26,21 @@ #if defined (CFG_NIOS_SYSID_BASE) #include <command.h> -#include <nios2.h> +#include <asm/io.h> #include <nios2-io.h> #include <linux/time.h> void display_sysid (void) { - struct nios_sysid_t *sysid = - (struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE); + struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE; struct tm t; char asc[32]; + time_t stamp; - localtime_r ((time_t *)&sysid->timestamp, &t); + stamp = readl (&sysid->timestamp); + localtime_r (&stamp, &t); asctime_r (&t, asc); - printf ("SYSID : %08x, %s", sysid->id, asc); + printf ("SYSID : %08x, %s", readl (&sysid->id), asc); } diff -Naurb u-boot-20050809/include/asm-nios2/io.h u-boot-new/include/asm-nios2/io.h --- u-boot-20050809/include/asm-nios2/io.h 2005-03-30 18:28:19.000000000 -0500 +++ u-boot-new/include/asm-nios2/io.h 2005-05-26 14:50:50.421875000 -0400 @@ -39,12 +39,13 @@ #define readl(addr)\ ({unsigned long val;\ asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) + #define writeb(addr,val)\ - asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val)) #define writew(addr,val)\ - asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val)) #define writel(addr,val)\ - asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val)) + asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val)) #define inb(addr) readb(addr) #define inw(addr) readw(addr) diff -Naurb u-boot-current/cpu/nios2/exceptions.S u-boot-new/cpu/nios2/exceptions.S --- u-boot-current/cpu/nios2/exceptions.S 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/cpu/nios2/exceptions.S 2005-08-09 14:04:34.000000000 -0400 @@ -30,6 +30,9 @@ .global _exception + .set noat + .set nobreak + _exception: /* SAVE ALL REGS -- this allows trap and unimplemented * instruction handlers to be coded conveniently in C diff -Naurb u-boot-current/examples/Makefile u-boot-new/examples/Makefile --- u-boot-current/examples/Makefile 2005-05-16 10:19:50.000000000 -0400 +++ u-boot-new/examples/Makefile 2005-08-09 17:43:17.000000000 -0400 @@ -42,7 +42,7 @@ endif ifeq ($(ARCH),nios2) -LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds +LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds endif ifeq ($(ARCH),m68k) diff -Naurb u-boot-current/examples/stubs.c u-boot-new/examples/stubs.c --- u-boot-current/examples/stubs.c 2004-10-10 17:27:33.000000000 -0400 +++ u-boot-new/examples/stubs.c 2005-08-09 16:59:16.000000000 -0400 @@ -92,7 +92,7 @@ #x ":\n" \ " movhi r8, %%hi(%0)\n" \ " ori r8, r0, %%lo(%0)\n" \ -" add r8, r0, r15\n" \ +" add r8, r8, r15\n" \ " ldw r8, 0(r8)\n" \ " ldw r8, %1(r8)\n" \ " jmp r8\n" \ diff -Naurb u-boot-current/nios2_config.mk u-boot-new/nios2_config.mk --- u-boot-current/nios2_config.mk 2004-10-10 17:27:30.000000000 -0400 +++ u-boot-new/nios2_config.mk 2005-08-09 16:02:12.000000000 -0400 @@ -23,4 +23,4 @@ # PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ -PLATFORM_CPPFLAGS += -ffixed-r15 +PLATFORM_CPPFLAGS += -ffixed-r15 -G0

2 1

[U-Boot-Users] [PATCH] cleanup duplicated ARM interrupt code
by Andreas Engel 24 May '06

24 May '06

CHANGELOG: Cleaned up duplicated code: moved common ARM interrupt handling code from cpu specific interrupts.c files into lib_arm/interrupts.c. Patch by Andreas Engel, 21 Nov 2005 Signed-off-by: Andreas Engel Note: there were two cases (cpu/arm720t/ and cpu/sa1100/) where the disable_interrupts function only disabled IRQ, but not FIQ. I just ignored this in the generic function in lib_arm/, which disables both IRQ and FIQ. Perhaps someone with more knowledge of ARM cores can check whether or not this is ok. Regards, Andreas Engel

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[U-Boot-Users] Kernel XIP
by shivappa.kushtagi＠wipro.com 19 May '06

19 May '06

Hello, I configured for kernel XIP and created xipImage. When I tried to load it through u-boot, it complained about invalid magic number. Later I added a 64 byte header required for u-boot with the following mkimage command: mkimage -A arm -O linux -T kernel -C none -a 0x00080000 -e 0x00080040 -d xipImage XIPImage. Actually some of the document found at CELF wiki specifies that we need to give "-x" option to mkimage. With -x option, mkimage fails with the following error message : mkimage: Bad file: "xipImage" has invalid buffer for XIP. After looking into the mkimage source code, found that it expects 0xFF for the first 64 bytes of xipImage. Which is missing in the xipImage I have built. There must be some in-consistency between the way xipImage is built or mkimage command. Also, I didn't find any significance of the code for "-x" if we specify the "entry point" correctly (load address + 0x40). After the mkimage, I flashed the XIPImage at address 0x00080000. After resetting the board, I got the following boot messages : ## Booting image at 00080000 ... Image Name: Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 2009016 Bytes = 1.9 MB Load Address: 00080000 Entry Point: 00080040 Verifying Checksum ... OK XIP Kernel Image ... OK Starting kernel ... And it stops here.... Any idea what is going wrong here ? My configuration: Processor : ARM926EJ-Sid(wb) rev 3 (v5l) Kernel : 2.6.10 Regards Shivappa

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[U-Boot-Users] PATCH: apply SoC concept on arm926 cpus
by Andreas Engel 03 Apr '06

03 Apr '06

CHANGELOG entry: * Patch by Andreas Engel, 20 June 2005 applied the SoC concept to arm926ejs cpus, i.e. moved the SoC specific timer and cpu_reset code from the ./cpu/$(CPU) directory into new ./cpu/$(CPU)/$(SOC) directories

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[U-Boot-Users] [PATCH] fix building of tools/env programs
by Murray.Jensen＠csiro.au 23 Mar '06

23 Mar '06

This patch shows what I had to do to get the programs in the tools/env directory to build (i.e. fw_printenv/fw_setenv). Your mileage may vary. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix building of programs in the tools/env directory Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 3

[U-Boot-Users] Re: compile u-boot with recent toolchain : symbols problem
by Anton Wöllert 22 Mar '06

22 Mar '06

I've got the same problem with binutils 2.16 and gcc 3.4.4. also binutils 2.16.91.0.1 doesn't work right. > > > > I used to compile U-Boot with ELDK, but I currently need to work with > > newer toolchain : > > - binutils-2.16 > > - gcc-3.4.3 > > This looks line a binutils problem, then. May I ask why you have to > use binutils-2.16 ? May I ask you why it should not be used? How to recover bugs, if people just use older software? > > And which exact board are we talking about? > > > The "__u_boot_cmd_start" symbol value, generated with this new > > toolchain, is wrong (U-Boot crashes when relocating the command > > table). > > Can you please provide exact data, like the differences between the > System.map and the u-boot.map files when using binutils-2.16 and > another, working version of binutils? [Please use the _same_ version > of GCC for this comparison.] > > > There are two new sections between "__u_boot_cmd_start" and > > ".u_boot_cmd" address : > > - .data.rel.local > > - .data.rel > > Can you please show exactly what happens? The above, i couldn't acknowledge, but u-boot definitly hangs _after_ relocating to memory. it will dump 'Now running in RAM at .....'. But then it hangs. After relocating, it tries to manually relocate the command table. But that doesn't work. Don't know why, but with the patch it works. Obviously __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; and __u_boot_cmd_start = ADDR(.u_boot_cmd); .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; should be the same. However, this should be a binutils bug or the linker script voodoo that is done with the first script above isn't really valid. Maybe .u_boot_cmd gets misalligned. Maybe i should try to DEBUG(& __u_boot_cmd_start) in both (the patched and unpatched) versions to see, where it points, or maybe objdump show more. Btw. this happens on the tqm8xx board. Thanks to Vincent for recovering that, that saved me a lot of time... kind regards Anton Wöllert

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[U-Boot-Users] Bug in DTT for temperatures below zero degress !!!
by Steven Scholz 14 Mar '06

14 Mar '06

Hi there, there's a terrible bug in the current U-Boot CVS concerning DDT: For temperature below zero the function dtt_get_temp() (at least for lm75) returns wrong values! ... DTT: 1 is 235 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (235°C) WDT: disabled This is because of the use of an "int" although the lm75 only returns two byte ("signed short"). This trivial fix is needed: Index: u-boot/dtt/lm75.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/dtt/lm75.c,v retrieving revision 1.2 diff -u -r1.2 lm75.c --- u-boot/dtt/lm75.c 27 Jun 2003 21:32:38 -0000 1.2 +++ u-boot/dtt/lm75.c 15 Jun 2005 08:44:21 -0000 @@ -174,7 +170,7 @@ int dtt_get_temp(int sensor) { - return (dtt_read(sensor, DTT_READ_TEMP) / 256); + return ( ((signed short) dtt_read(sensor, DTT_READ_TEMP)) / 256); } /* dtt_get_temp() */ #endif /* CONFIG_DTT_LM75 */ Then the output is correct: ... DTT: 1 is -28 C LCD: Hitachi TX14D11 5,7" 320x240 TFT (-28°C) CCFL: disabled (too cold!) WDT: disabled I am afraid this is an issues on all DTT in U-Boot. Some even only use "uchar". Comments? -- Steven

2 2

[U-Boot-Users] gunzip question about large uImages
by Robin Getz 13 Mar '06

13 Mar '06

Quick Question: It looks to me that the max uncompressed image size is hard coded to 4Meg (0x400000 bytes). Any thoughts why? Long question: We were having some problems booting large uImages (reported here ~ month ago). It seemed as if the were not being decompressed properly. When we had someone (Aubrey Li) dig into it he found/pointed out that in the latest cvs, u-boot/common/cmd_bootm.c the function do_bootm defines what looks to be a uncompressed max length as: uint unc_len = 0x400000; This is passed to gunzip if the image needs to be uncompressed. --snip-- case IH_COMP_GZIP: printf (" Uncompressing %s ... ", name); if (gunzip ((void *)ntohl(hdr->ih_load), unc_len, (uchar *)data, &len) != 0) { puts ("GUNZIP ERROR - must RESET board to recover\n"); SHOW_BOOT_PROGRESS (-6); do_reset (cmdtp, flag, argc, argv); } break; --snip-- gunzip takes this as the second parameter and sets it to dstlen. int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) This is passed to the inflation routine as s.avail_out = dstlen; where inflate from u-boot/lib_generic/zlib.c uses this to halt decompression if the image size can not fit. -- snip -- from int inflate(z, f) -- if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0) r = inflate_packet_flush(z->state->blocks); --snip -- from local int inflate_flush(s, z, r)-- /* compute number of bytes to copy as far as end of window */ n = (uInt)((q <= s->write ? s->write : s->end) - q); if (n > z->avail_out) n = z->avail_out; if (n && r == Z_BUF_ERROR) r = Z_OK; /* update counters */ z->avail_out -= n; z->total_out += n; -- When unc_len is increased - our problem goes away... So: two questions: - what is the best way to manage the size of unc_len? in include/configs/platform.h? Or just make it really_really big? - do you want a patch in u-boot/common/cmd_bootm.c/gunzip to check to see if the image was completely decompressed? OR - do you want a patch in u-boot/lib_generic/zlib.c to return an error if it runs out of room? Thanks -Robin

2 1

[U-Boot-Users] Why exceptions are enabled before exception vector code is copied
by Cedric VINCENT 13 Mar '06

13 Mar '06

Dear Wolfgang. Can I ask you why exceptions are enabled before exception vector code is copied to the low RAM pages ? (I am talking about U-Boot/PPC) On my board, U-Boot crashes before relocation (when debugging) since Xilinx Microprocessor Debugger (XMD) makes a spurious "Machine Check Exception". For other reasons, such an exception could arrived before u-boot starts. Finally, it is a bug or a very strange coding behaviour... Cedric VINCENT.

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[U-Boot-Users] [PATCH] I2C2 support for MPC8548CDS
by Zajac Adam-AAZ004 13 Mar '06

13 Mar '06

The attached patch adds I2C2 support for the MPC8548CDS board. I've performed a limited testing on our MPC8548CDS board and everything seems to be working fine. Since this processor is brand new, I may need to revise the changes when we build our real system based on '8548. Thanks, Adam Zajac <<mpc8548cds_i2c2.patch.gz>>

2 1

[U-Boot-Users] malloc with no return check?
by Andrew Dyer 13 Mar '06

13 Mar '06

I noticed the au1xxx ethernet driver has a malloc where the return value isn't checked. I did some more looking while waiting for a slow flash programmer and at least these files seem to do the same thing: ./drivers/ns8382x.c ./drivers/bcm570x.c ./drivers/rtl8139.c ./drivers/eepro100.c ./drivers/dc2114x.c ./drivers/e1000.c ./drivers/sk98lin/skge.c ./drivers/cfb_console.c ./drivers/natsemi.c ./drivers/inca-ip_sw.c ./drivers/rtl8169.c ./drivers/pcnet.c ./cpu/mips/au1x00_eth.c ./cpu/ppc4xx/serial.c ./cpu/ppc4xx/405gp_enet.c ./cpu/ppc4xx/440gx_enet.c ./cpu/i386/serial.c ./cpu/mpc8xx/scc.c ./common/hush.c ./cpu/mpc8xx/spi.c ?maybe ./cpu/mpc8260/spi.c ?maybe ./cpu/mpc85xx/ether_fcc.c ./cpu/mpc8260/ether_fcc.c ./cpu/mpc5xxx/fec.c ./cpu/mpc8220/fec.c ./tools/easylogo/easylogo.c I didn't look under the board directory or check all varieties of alloc :-) I will submit patches for the mips stuff hopefully next week. -- Hardware, n.: The parts of a computer system that can be kicked.

3 4

[U-Boot-Users] [PATCH] in tftp client, recover from lost ACKs
by Brenda J. Butler 13 Mar '06

13 Mar '06

CHANGELOG entry: * Patch by John McCarthy and Brenda J. Butler, 8 July 2005 When the tftp client sends an ack but it gets lost, the server will resend the block. The client was now expecting the next block and ignored this block, the server never got an ack, and they got stuck. Now the tftp client will ack the block the second (and subsequent) time(s) allowing the tftp session to proceed. This little fix assumes that the server will resend exactly the same contents (same size from same offset). Here is the patch for you to look at; it is also in an attachment where the tabs and lines are preserved better. Apply to top of head checkout with patch -p0 < uboot2.patch Index: net/tftp.c =================================================================== RCS file: /u00/cvs/u-boot3/net/tftp.c,v retrieving revision 1.1 retrieving revision 1.3 diff -u -r1.1 -r1.3 --- net/tftp.c 15 Mar 2005 17:53:28 -0000 1.1 +++ net/tftp.c 5 Jul 2005 19:48:46 -0000 1.3 @@ -246,17 +246,17 @@ } } - if (TftpBlock == TftpLastBlock) { - /* - * Same block again; ignore it. - */ - break; - } - TftpLastBlock = TftpBlock; NetSetTimeout (TIMEOUT * CFG_HZ, TftpTimeout); - store_block (TftpBlock - 1, pkt + 2, len); + if (TftpBlock != TftpLastBlock) { + /* + * Same block again; do everything again + * except store it. Hope the server sent + * exactly the same length/contents. + */ + store_block (TftpBlock - 1, pkt + 2, len); + } /* * Acknoledge the block just received, which will prompt

2 1

[U-Boot-Users] [PATCH] fix [id]cache_status for MPC85xx processors
by Murray.Jensen＠csiro.au 13 Mar '06

13 Mar '06

The existing code for the [id]cache_status commands on MPC85xx processors looks at the wrong bit to determine if the L1 cache is enabled. It looks at the most significant bit when it should look at the least significant bit. This patch corrects this bug. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 19, 2005: - fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix fw_setenv with uninitialised environment
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

In tools/env/fw_env.c when the environment is uninitialised, and the default_environment[] array is used instead, if a setenv is done there is a good chance that the array bounds will be exceeded. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 15, 2005: - fix array overflow with fw_setenv on uninitialised environment Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] PATCH: Add support for EmbeddedPlanet EP88x boards
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch adds support for EmbeddedPlanet EP88x boards. It was tested on EP88xC board with MPC885 processor, 64MB RAM, and 16MB flash. CHANGELOG Add support for EmbeddedPlanet EP88x boards -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

3 5

[U-Boot-Users] extra headers in xilinx ml300 board
by Michael Libeskind 12 Mar '06

12 Mar '06

/board/xilinx/xilinx_enet/emac_adapter.c and /board/xilinx/xilinx_iic/iic_adapter.c both have a #include <configs/ml300.h> which I believe prevents users from making other board configs under the /board/xilinx directory based on the ML300 that use the xilinx_enet and xilinx_iic adapaters. Can this be removed?

2 3

[U-Boot-Users] [PATCH] board support for the mpc8540eval board
by Ron Alder 12 Mar '06

12 Mar '06

The attached patch adds support for the MPC8540 EVAL board. The patch is based on the top of the cvs tree as of 11 July 2005. CHANGELOG entry: * Patch by Ron Alder, 11 July 2005 Add Xianghua Xiao and Lunsheng Wang's support for the GDA MPC8540 EVAL board.

2 1

[U-Boot-Users] [PATCH] add support for Nat Semi DP83865 PHY to MPC85xx TSEC driver
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the National Semiconductor DP83865 gigabit ethernet PHY to the MPC85xx TSEC ethernet driver. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add Nat Semi DP83865 PHY support to MPC85xx TSEC driver Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] add (some) definitions for MPC85xx local bus controller
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds (some) definitions for the MPC85xx local bus controller register bits, in a similar vein to the MPC8260 memory controller, which is almost identical. Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add (some) definitions for the MPC85xx local bus controller Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] CPM I/O port pin functions for MPC85xx
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds the file "include/asm-ppc/iopin_85xx.h" which mirrors the functions in "include/asm-ppc/iopin_8260.h" for manipulating the CPM2 I/O pins for MPC85xx processors (that have a CPM). Cheers! Murray... CHANGELOG entry: * Patch by Murray Jensen <Murray.Jensen(a)csiro.au>, July 8, 2005: - add CPM2 I/O pin functions for MPC85xx processors Copyright: This patch is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] fix conditional for including ks8695eth driver
by Greg Ungerer 12 Mar '06

12 Mar '06

Move the c-preprocessor conditional check for compiling the ks8695eth driver code to after including the headers. Otherwise it can never be compiled in. Index: drivers/ks8695eth.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/ks8695eth.c,v retrieving revision 1.2 diff -u -r1.2 ks8695eth.c --- drivers/ks8695eth.c 23 May 2005 10:49:51 -0000 1.2 +++ drivers/ks8695eth.c 3 Jun 2005 14:13:54 -0000 @@ -18,8 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifdef CONFIG_DRIVER_KS8695ETH - /****************************************************************************/ #include <common.h> @@ -28,6 +26,7 @@ #include <asm/io.h> #include <asm/arch/platform.h> +#ifdef CONFIG_DRIVER_KS8695ETH /****************************************************************************/ /*

3 3

[U-Boot-Users] RFC: PCI table based cfg change?
by Kumar Gala 12 Mar '06

12 Mar '06

I was hoping to get some feedback on the following patch. It is intended to deal with the case if we are configuring a PCI bridge via the pci_config_table, we need some way of reporting back the fact that the bus number has changed. - kumar --- a/drivers/pci.c +++ b/drivers/pci.c @@ -459,6 +459,7 @@ int pci_hose_scan_bus(struct pci_control PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); if (cfg) { cfg->config_device(hose, dev, cfg); + sub_bus = max(sub_bus, hose->current_busno); #ifdef CONFIG_PCI_PNP } else { int n = pciauto_config_device(hose, dev);

3 2

[U-Boot-Users] [PATCH] Only disable the MPC83xx watchdog if its enabled out of reset
by Kumar Gala 12 Mar '06

12 Mar '06

Only disable the MPC83xx watchdog if its enabled out of reset Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Only disable the MPC83xx watchdog if its enabled out of reset. If its disabled out of reset SW can later enable it if so desired Patch by Kumar Gala 21 Dec 2005 --- commit 660737c7f106a7c7817375ed29e52fbf28c5838f tree d2448e66f669ed2a5464535eab5a747aafe14eb1 parent ae907acc35249e178692e74a6f76df6eb217cf6b author Kumar Gala <galak(a)kernel.crashing.org> Wed, 21 Dec 2005 17:39:01 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 21 Dec 2005 17:39:01 -0600 cpu/mpc83xx/start.S | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index fb001a6..0e1a5fd 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -426,8 +426,14 @@ init_e300_core: /* time t 10 */ #else /* Disable Wathcdog */ /*-------------------*/ + lwz r4, SWCRR(r3) + /* Check to see if its enabled for disabling + once disabled by SW you can't re-enable */ + andi. r4, r4, 0x4 + beq 1f xor r4, r4, r4 stw r4, SWCRR(r3) +1: #endif /* CONFIG_WATCHDOG */ /* Initialize the Hardware Implementation-dependent Registers */

2 1

[U-Boot-Users] [PATCH] Report back PCI bus when doing table based device config
by Kumar Gala 12 Mar '06

12 Mar '06

Report back PCI bus when doing table based device config Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Report back PCI bus when doing table based device config Patch by Kumar Gala 14 Dec 2005 --- commit 837f814f04849814fd95710796e8e107b01c9121 tree d8f0e663f827d5fb4deb9b5e20841cd9ddcc2807 parent d7b4ec6d89455f45e3c0e6d48daaba4d917c26a7 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:59:49 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:59:49 -0600 drivers/pci.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/pci.c b/drivers/pci.c index 5360030..3c24b99 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -459,6 +459,7 @@ int pci_hose_scan_bus(struct pci_control PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); if (cfg) { cfg->config_device(hose, dev, cfg); + sub_bus = max(sub_bus, hose->current_busno); #ifdef CONFIG_PCI_PNP } else { int n = pciauto_config_device(hose, dev);

2 1

[U-Boot-Users] [PATCH] Allow config of GPIO direction & data registers at boot on 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Allow config of GPIO direction & data registers at boot on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Allow config of GPIO direction & data registers at boot on 83xx Patch by Kumar Gala 14 Dec 2005 Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- commit 318fab58c6c6cd81b407edd2a06a35f4778f9bc9 tree 4c59954eab46500b5b75f2201cc1a9c631c0d23c parent 08dac06850e30a256df62803e8ca22c86f92c7cb author Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:53:19 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 14 Dec 2005 17:53:19 -0600 cpu/mpc83xx/cpu_init.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index e75b8b7..db28a6a 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -154,6 +154,14 @@ void cpu_init_f (volatile immap_t * im) im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM; im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM; #endif +#ifdef CFG_GPIO1_PRELIM + im->pgio[0].dir = CFG_GPIO1_DIR; + im->pgio[0].dat = CFG_GPIO1_DAT; +#endif +#ifdef CFG_GPIO2_PRELIM + im->pgio[1].dir = CFG_GPIO2_DIR; + im->pgio[1].dat = CFG_GPIO2_DAT; +#endif }

2 1

[U-Boot-Users] [PATCH] Add helper function for generic flat device tree fixups for 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Add helper function for generic flat device tree fixups for 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Add helper function for generic flat device tree fixups for 83xx Patch by Kumar Gala 13 Dec 2005 --- commit b0ffe0fd03bdd3118a2261e183387110c7f98b62 tree 7e533ce44581532f5aefc00a7fbc805690e6815d parent dbd0923389252c41a48ed9827b2359af9d52567e author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:17:24 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:17:24 -0600 cpu/mpc83xx/cpu.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 8c9b515..f20d584 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -151,3 +151,36 @@ void watchdog_reset (void) hang(); /* FIXME: implement watchdog_reset()? */ } #endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_OF_FLAT_TREE) +void +ft_cpu_setup(void *blob, bd_t *bd) +{ + u32 *p; + int len; + ulong clock; + + clock = bd->bi_busfreq; + p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + +#ifdef CONFIG_MPC83XX_TSEC1 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len); + memcpy(p, bd->bi_enetaddr, 6); +#endif + +#ifdef CONFIG_MPC83XX_TSEC2 + p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len); + memcpy(p, bd->bi_enet1addr, 6); +#endif +} +#endif

2 1

[U-Boot-Users] [PATCH] Allow board code to fixup the OF flat device tree before booting a kernel
by Kumar Gala 12 Mar '06

12 Mar '06

Allow board code to fixup the OF flat device tree before booting a kernel Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Allow board code to fixup the OF flat device tree before booting a kernel Patch by Kumar Gala 13 Dec 2005 --- commit 943fd6f23661331e7ab70f9ab190387f5e0ca1ff tree 182dedeba4351f5c4e1cfd1c12a7870fad50b76a parent 7abb967b49b86994aca615acc60cbc322efb9b98 author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:09:21 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 11:09:21 -0600 README | 6 ++++++ common/ft_build.c | 5 ++++- 2 files changed, 10 insertions(+), 1 deletions(-) diff --git a/README b/README index 21f5bf0..ea37dac 100644 --- a/README +++ b/README @@ -411,6 +411,7 @@ The following options need to be configu The maximum size of the constructed OF tree. OF_CPU - The proper name of the cpus node. + OF_SOC - The proper name of the soc node. OF_TBCLK - The timebase frequency. CONFIG_OF_HAS_BD_T @@ -423,6 +424,11 @@ The following options need to be configu The resulting flat device tree will have a copy of u-boot's environment variables + CONFIG_OF_BOARD_SETUP + + Board code has addition modification that it wants to make + to the flat device tree before handing it off to the kernel + - Serial Ports: CFG_PL010_SERIAL diff --git a/common/ft_build.c b/common/ft_build.c index c67af6f..bebee30 100644 --- a/common/ft_build.c +++ b/common/ft_build.c @@ -690,9 +690,12 @@ void ft_setup(void *blob, int size, bd_t if (p != NULL) *p = cpu_to_be32(clock); #endif - #endif /* __powerpc__ */ +#ifdef CONFIG_OF_BOARD_SETUP + ft_board_setup(blob, bd); +#endif + /* printf("final OF-tree\n"); ft_dump_blob(blob);

2 1

[U-Boot-Users] [PATCH] Added a toplevel .gitignore
by Kumar Gala 12 Mar '06

12 Mar '06

Added a toplevel .gitignore Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- commit 7abb967b49b86994aca615acc60cbc322efb9b98 tree 194dbd93ef25c38a5e3c4c34c70c06ef7f5d93f8 parent 559cd2d2afac76082f41b648a83d846482c41a5c author Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 10:57:13 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 13 Dec 2005 10:57:13 -0600 .gitignore | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..c7e95a4 --- /dev/null +++ b/.gitignore @@ -0,0 +1,24 @@ +# +# NOTE! Don't add files that are generated in specific +# subdirectories here. Add them in the ".gitignore" file +# in that subdirectory instead. +# +# Normal rules +# +.* +*.o +*.a + +# +# Top-level generic files +# +u-boot* +System.map + +# +# Generated include files +# +include/asm +include/asm-*/arch +include/config.h +include/config.mk

2 1

[U-Boot-Users] [PATCH][UPDATE] Enabled time handling on 83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Enabled time handling on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Enable time handling on 83xx Patch by Kumar Gala 09 Dec 2005 --- commit 559cd2d2afac76082f41b648a83d846482c41a5c tree 59a0714c366cc6774bb52ba7a9bc9219bb0bba6e parent 4d09dc8e4240955641b03aa3351a83eb308d9efb author Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:44:09 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:44:09 -0600 cpu/mpc83xx/interrupts.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c index 53474f6..dfd51c1 100644 --- a/cpu/mpc83xx/interrupts.c +++ b/cpu/mpc83xx/interrupts.c @@ -43,6 +43,16 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { + DECLARE_GLOBAL_DATA_PTR; + + volatile immap_t *immr = (immap_t *) CFG_IMMRBAR; + + *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; + + /* Enable e300 time base */ + + immr->sysconf.spcr |= 0x00400000; + return 0; }

2 1

[U-Boot-Users] [PATCH] Added CONFIG_ options for bd_t and env in flat dev tree
by Kumar Gala 12 Mar '06

12 Mar '06

Added CONFIG_ options for bd_t and env in flat dev tree Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added CONFIG_ options for bd_t and env in flat dev tree CONFIG_OF_HAS_BD_T will put a copy of the bd_t into the resulting flat device tree. CONFIG_OF_HAS_UBOOT_ENV will copy the environment variables from u-boot into the flat device tree Patch by Kumar Gala 30 Nov 2005 --- commit 993a33b3ee2ab8b6ba7babfc3cb79b85c5ad9080 tree 8f0bf1a80e077cf490fad35cf8b3f101cc2ee567 parent 9eaf17bb9619be82f24c1ec88829ffe487e67ea8 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 13:16:36 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 13:16:36 -0600 README | 10 ++++++++++ common/ft_build.c | 10 +++++++++- include/configs/stxxtc.h | 2 ++ 3 files changed, 21 insertions(+), 1 deletions(-) diff --git a/README b/README index 6f61008..21f5bf0 100644 --- a/README +++ b/README @@ -413,6 +413,16 @@ The following options need to be configu OF_CPU - The proper name of the cpus node. OF_TBCLK - The timebase frequency. + CONFIG_OF_HAS_BD_T + + The resulting flat device tree will have a copy of the bd_t. + Space should be pre-allocated in the dts for the bd_t. + + CONFIG_OF_HAS_UBOOT_ENV + + The resulting flat device tree will have a copy of u-boot's + environment variables + - Serial Ports: CFG_PL010_SERIAL diff --git a/common/ft_build.c b/common/ft_build.c index 65a274f..c67af6f 100644 --- a/common/ft_build.c +++ b/common/ft_build.c @@ -529,6 +529,7 @@ extern uchar(*env_get_char) (int); #define BDM(x) { .name = #x, .offset = offsetof(bd_t, bi_ ##x ) } +#ifdef CONFIG_OF_HAS_BD_T static const struct { const char *name; int offset; @@ -574,6 +575,7 @@ static const struct { #endif BDM(baudrate), }; +#endif void ft_setup(void *blob, int size, bd_t * bd) { @@ -610,6 +612,7 @@ void ft_setup(void *blob, int size, bd_t /* back into root */ ft_backtrack_node(&cxt); +#ifdef CONFIG_OF_HAS_UBOOT_ENV ft_begin_node(&cxt, "u-boot-env"); for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { @@ -629,6 +632,7 @@ void ft_setup(void *blob, int size, bd_t } ft_end_node(&cxt); +#endif ft_begin_node(&cxt, "chosen"); @@ -647,13 +651,16 @@ void ft_setup(void *blob, int size, bd_t ft_dump_blob(blob); */ +#ifdef CONFIG_OF_HAS_BD_T /* paste the bd_t at the end of the flat tree */ end = (char *)blob + be32_to_cpu(((struct boot_param_header *)blob)->totalsize); memcpy(end, bd, sizeof(*bd)); +#endif #ifdef CONFIG_PPC +#ifdef CONFIG_OF_HAS_BD_T for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) { sprintf(tmpenv, "/bd_t/%s", bd_map[i].name); v = *(uint32_t *)((char *)bd + bd_map[i].offset); @@ -670,6 +677,7 @@ void ft_setup(void *blob, int size, bd_t p = ft_get_prop(blob, "/bd_t/ethspeed", &len); if (p != NULL) *p = cpu_to_be32((uint32_t) bd->bi_ethspeed); +#endif clock = bd->bi_intfreq; p = ft_get_prop(blob, "/cpus/" OF_CPU "/clock-frequency", &len); @@ -680,7 +688,7 @@ void ft_setup(void *blob, int size, bd_t clock = OF_TBCLK; p = ft_get_prop(blob, "/cpus/" OF_CPU "/timebase-frequency", &len); if (p != NULL) - *p = cpu_to_be32(OF_TBCLK); + *p = cpu_to_be32(clock); #endif #endif /* __powerpc__ */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 3ffe6b2..be6c36c 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -584,5 +584,7 @@ typedef unsigned int led_id_t; #define OF_CPU "PowerPC,MPC870@0" #define OF_TBCLK (MPC8XX_HZ / 16) +#define CONFIG_OF_HAS_BD_T 1 +#define CONFIG_OF_HAS_UBOOT_ENV 1 #endif /* __CONFIG_H */

2 1

[U-Boot-Users] [PATCH] Fix PCI prefetch region support for PCI bridges
by Kumar Gala 12 Mar '06

12 Mar '06

Fix PCI prefetch region support for PCI bridges Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Fixed PCI prefetch region support for PCI bridges. Since bridges can support separate BARs for Prefetch windows we should set them up if we support a prefetch region Patch by Kumar Gala 30 Nov 2005 --- commit 9eaf17bb9619be82f24c1ec88829ffe487e67ea8 tree b08f701087b021e21170ff3a74ed034ae4d0c989 parent c087756e1f8aae91b05ae5b5207ba992ef32c238 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 12:48:28 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 30 Nov 2005 12:48:28 -0600 drivers/pci_auto.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index b70bacc..15f7432 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -179,10 +179,14 @@ static void pciauto_prescan_setup_bridge pciauto_region_align(pci_prefetch, 0x100000); /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE, + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, (pci_prefetch->bus_lower & 0xfff00000) >> 16); cmdstat |= PCI_COMMAND_MEMORY; + } else { + /* We don't support prefetchable memory for now, so disable */ + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000); } if (pci_io) { @@ -197,10 +201,6 @@ static void pciauto_prescan_setup_bridge cmdstat |= PCI_COMMAND_IO; } - /* We don't support prefetchable memory for now, so disable */ - pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); - pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000); - /* Enable memory and I/O accesses, enable bus master */ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER); } @@ -227,7 +227,7 @@ static void pciauto_postscan_setup_bridg /* Round memory allocator to 1MB boundary */ pciauto_region_align(pci_prefetch, 0x100000); - pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, + pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, (pci_prefetch->bus_lower-1) >> 16); }

2 1

[U-Boot-Users] [PATCH] Make System IO Config Registers board configurable on MPC83xx
by Kumar Gala 12 Mar '06

12 Mar '06

Make System IO Config Registers board configurable on MPC83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Make System IO Config Registers board configurable on MPC83xx Patch by Kumar Gala 23 Nov 2005 --- commit 01b445b70c5e296c115b93a894ff3c7ffc1586d5 tree 2a2398b1bd34aa9b79e7ba34b4ccf7c28c932734 parent f6a259d086597f691d821a5ac2181ce249fad987 author Kumar Gala <galak(a)kernel.crashing.org> Wed, 23 Nov 2005 14:31:37 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Wed, 23 Nov 2005 14:31:37 -0600 cpu/mpc83xx/cpu_init.c | 8 ++++++-- include/configs/MPC8349ADS.h | 4 ++++ include/configs/TQM834x.h | 4 ++++ 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index dcb3445..e75b8b7 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -63,8 +63,12 @@ void cpu_init_f (volatile immap_t * im) im->sysconf.spcr |= SPCR_TBEN; /* System General Purpose Register */ - im->sysconf.sicrh = SICRH_TSOBI1; - im->sysconf.sicrl = SICRL_LDP_A; +#ifdef CFG_SICRH + im->sysconf.sicrh = CFG_SICRH; +#endif +#ifdef CFG_SICRL + im->sysconf.sicrl = CFG_SICRL; +#endif /* * Memory Controller: diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index 41309ac..7197e0f 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -504,6 +504,10 @@ HRCWH_TSEC2M_IN_GMII ) #endif +/* System IO Config */ +#define CFG_SICRH SICRH_TSOBI1 +#define CFG_SICRL SICRL_LDP_A + #define CFG_HID0_INIT 0x000000000 #define CFG_HID0_FINAL CFG_HID0_INIT diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index c25a777..a2184ee 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -417,6 +417,10 @@ extern int tqm834x_num_flash_banks; HRCWH_TSEC2M_IN_GMII ) #endif +/* System IO Config */ +#define CFG_SICRH SICRH_TSOBI1 +#define CFG_SICRL SICRL_LDP_A + /* i-cache and d-cache disabled */ #define CFG_HID0_INIT 0x000000000 #define CFG_HID0_FINAL CFG_HID0_INIT

3 3

[U-Boot-Users] [PATCH] Added support for PCI prefetchable region and BARs
by Kumar Gala 12 Mar '06

12 Mar '06

Added support for PCI prefetchable region and BARs Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added support for PCI prefetchable region and BARs If a host controller sets up a region as prefetchable and a device's BAR denotes it as prefetchable, allocate the BAR into the prefetch region. If a BAR is prefetchable and no prefetchable region has been setup by the controller we fall back to allocating the BAR into the normally memory region. Patch by Kumar Gala 22 Nov 2005 --- commit f6a259d086597f691d821a5ac2181ce249fad987 tree 455dc92391d7b33119acd175595a2778ea6bcaa5 parent 680def7ecaabea707792ff987cd9baa9b4e18b38 author Kumar Gala <galak(a)kernel.crashing.org> Tue, 22 Nov 2005 13:29:25 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Tue, 22 Nov 2005 13:29:25 -0600 drivers/pci_auto.c | 50 ++++++++++++++++++++++++++++++++++++++++++++------ include/pci.h | 4 +++- 2 files changed, 47 insertions(+), 7 deletions(-) diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index 3302457..b70bacc 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -77,6 +77,7 @@ int pciauto_region_allocate(struct pci_r void pciauto_setup_device(struct pci_controller *hose, pci_dev_t dev, int bars_num, struct pci_region *mem, + struct pci_region *prefetch, struct pci_region *io) { unsigned int bar_value, bar_response, bar_size; @@ -111,7 +112,10 @@ void pciauto_setup_device(struct pci_con found_mem64 = 1; bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; - bar_res = mem; + if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH)) + bar_res = prefetch; + else + bar_res = mem; DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%x, ", bar_nr, bar_size); } @@ -148,6 +152,7 @@ static void pciauto_prescan_setup_bridge pci_dev_t dev, int sub_bus) { struct pci_region *pci_mem = hose->pci_mem; + struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; unsigned int cmdstat; @@ -169,6 +174,17 @@ static void pciauto_prescan_setup_bridge cmdstat |= PCI_COMMAND_MEMORY; } + if (pci_prefetch) { + /* Round memory allocator to 1MB boundary */ + pciauto_region_align(pci_prefetch, 0x100000); + + /* Set up memory and I/O filter limits, assume 32-bit I/O space */ + pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE, + (pci_prefetch->bus_lower & 0xfff00000) >> 16); + + cmdstat |= PCI_COMMAND_MEMORY; + } + if (pci_io) { /* Round I/O allocator to 4KB boundary */ pciauto_region_align(pci_io, 0x1000); @@ -193,6 +209,7 @@ static void pciauto_postscan_setup_bridg pci_dev_t dev, int sub_bus) { struct pci_region *pci_mem = hose->pci_mem; + struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; /* Configure bus number registers */ @@ -206,6 +223,14 @@ static void pciauto_postscan_setup_bridg (pci_mem->bus_lower-1) >> 16); } + if (pci_prefetch) { + /* Round memory allocator to 1MB boundary */ + pciauto_region_align(pci_prefetch, 0x100000); + + pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, + (pci_prefetch->bus_lower-1) >> 16); + } + if (pci_io) { /* Round I/O allocator to 4KB boundary */ pciauto_region_align(pci_io, 0x1000); @@ -239,6 +264,11 @@ void pciauto_config_init(struct pci_cont hose->pci_mem->size < hose->regions[i].size) hose->pci_mem = hose->regions + i; break; + case (PCI_REGION_MEM | PCI_REGION_PREFETCH): + if (!hose->pci_prefetch || + hose->pci_prefetch->size < hose->regions[i].size) + hose->pci_prefetch = hose->regions + i; + break; } } @@ -251,6 +281,14 @@ void pciauto_config_init(struct pci_cont hose->pci_mem->bus_start + hose->pci_mem->size - 1); } + if (hose->pci_prefetch) { + pciauto_region_init(hose->pci_prefetch); + + DEBUGF("PCI Autoconfig: Prefetchable Memory region: [%lx-%lx]\n", + hose->pci_prefetch->bus_start, + hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1); + } + if (hose->pci_io) { pciauto_region_init(hose->pci_io); @@ -275,7 +313,7 @@ int pciauto_config_device(struct pci_con switch(class) { case PCI_CLASS_BRIDGE_PCI: hose->current_busno++; - pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io); DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev)); @@ -301,12 +339,12 @@ int pciauto_config_device(struct pci_con return sub_bus; } - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; case PCI_CLASS_BRIDGE_CARDBUS: /* just do a minimal setup of the bridge, let the OS take care of the rest */ - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev)); @@ -328,11 +366,11 @@ int pciauto_config_device(struct pci_con * the PIMMR window to be allocated (BAR0 - 1MB size) */ DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n"); - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; #endif default: - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); break; } diff --git a/include/pci.h b/include/pci.h index 8f19997..f78a769 100644 --- a/include/pci.h +++ b/include/pci.h @@ -309,6 +309,7 @@ struct pci_region { #define PCI_REGION_MEM 0x00000000 /* PCI memory space */ #define PCI_REGION_IO 0x00000001 /* PCI IO space */ #define PCI_REGION_TYPE 0x00000001 +#define PCI_REGION_PREFETCH 0x00000008 /* prefetchable PCI memory */ #define PCI_REGION_MEMORY 0x00000100 /* System memory */ #define PCI_REGION_RO 0x00000200 /* Read-only memory */ @@ -386,7 +387,7 @@ struct pci_controller { int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32); /* Used by auto config */ - struct pci_region *pci_mem, *pci_io; + struct pci_region *pci_mem, *pci_io, *pci_prefetch; /* Used by ppc405 autoconfig*/ struct pci_region *pci_fb; @@ -472,6 +473,7 @@ extern int pciauto_region_allocate(struc extern void pciauto_setup_device(struct pci_controller *hose, pci_dev_t dev, int bars_num, struct pci_region *mem, + struct pci_region *prefetch, struct pci_region *io); int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);

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[U-Boot-Users] [PATCH] Added PCI support for MPC8349ADS board
by Kumar Gala 12 Mar '06

12 Mar '06

Added PCI support for MPC8349ADS board Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Added PCI support for MPC8349ADS board Patch by Kumar Gala 10 Nov 2005 --- commit 17bdd79e9b7151c511b9e5c94cd850ab4d74b1a4 tree ef96e01f333e94ea6d9267fceec9b8b3a0d7553b parent d47f4a474e3ca12a373ac849f2941da29ee487a0 author Kumar Gala <galak(a)kernel.crashing.org> Thu, 10 Nov 2005 15:50:57 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Thu, 10 Nov 2005 15:50:57 -0600 board/mpc8349ads/Makefile | 2 board/mpc8349ads/mpc8349ads.c | 41 ------ board/mpc8349ads/pci.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/configs/MPC8349ADS.h | 4 - 4 files changed, 262 insertions(+), 45 deletions(-) diff --git a/board/mpc8349ads/Makefile b/board/mpc8349ads/Makefile index 4327b0d..f865f9c 100644 --- a/board/mpc8349ads/Makefile +++ b/board/mpc8349ads/Makefile @@ -24,7 +24,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := $(BOARD).o +OBJS := $(BOARD).o pci.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c index da8d3d7..505acbc 100644 --- a/board/mpc8349ads/mpc8349ads.c +++ b/board/mpc8349ads/mpc8349ads.c @@ -147,47 +147,6 @@ int checkboard (void) return 0; } -#if defined(CONFIG_PCI) -/* - * Initialize PCI Devices, report devices found - */ -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_mpc83xxads_config_table[] = { - {PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID, - pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMON_MEMORY | PCI_COMMAND_MASTER - } }, - {} -} -#endif - - -volatile static struct pci_controller hose[] = { - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - }, - { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc83xxads_config_table, -#endif - } -}; -#endif /* CONFIG_PCI */ - - -void -pci_init_board(void) -{ -#ifdef CONFIG_PCI - extern void pci_mpc83xx_init(volatile struct pci_controller *hose); - - pci_mpc83xx_init(hose); -#endif /* CONFIG_PCI */ -} - /* * if MPC8349ADS is soldered with SDRAM */ diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c new file mode 100644 index 0000000..4c37984 --- /dev/null +++ b/board/mpc8349ads/pci.c @@ -0,0 +1,260 @@ +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <asm/mmu.h> +#include <common.h> +#include <asm/global_data.h> +#include <pci.h> +#include <i2c.h> + +#ifdef CONFIG_PCI + +/* System RAM mapped to PCI space */ +#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE + +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_mpc83xxads_config_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_IDSEL_NUMBER, PCI_ANY_ID, + pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER + } + }, + {} +}; +#endif + +static struct pci_controller pci_hose[] = { + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + }, + { +#ifndef CONFIG_PCI_PNP + config_table:pci_mpc83xxads_config_table, +#endif + } +}; + +/************************************************************************** + * + * pib_init() -- initialize the PCA9555PW IO expander on the PIB board + * + */ +void +pib_init(void) +{ + u8 val8; + /* + * Assign PIB PMC slot to desired PCI bus + */ + mpc8349_i2c = (i2c_t*)(CFG_IMMRBAR + CFG_I2C2_OFFSET); + i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); + + val8 = 0; + i2c_write(0x23, 0x6, 1, &val8, 1); + i2c_write(0x23, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x23, 0x2, 1, &val8, 1); + i2c_write(0x23, 0x3, 1, &val8, 1); + + val8 = 0; + i2c_write(0x26, 0x6, 1, &val8, 1); + val8 = 0x34; + i2c_write(0x26, 0x7, 1, &val8, 1); +#if defined(PCI_64BIT) + val8 = 0xf4; /* PMC2:PCI1/64-bit */ +#elif defined(PCI_ALL_PCI1) + val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */ +#elif defined(PCI_ONE_PCI1) + val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */ +#else + val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */ +#endif + i2c_write(0x26, 0x2, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x26, 0x3, 1, &val8, 1); + val8 = 0; + i2c_write(0x27, 0x6, 1, &val8, 1); + i2c_write(0x27, 0x7, 1, &val8, 1); + val8 = 0xff; + i2c_write(0x27, 0x2, 1, &val8, 1); + val8 = 0xef; + i2c_write(0x27, 0x3, 1, &val8, 1); + asm("eieio"); + +#if defined(PCI_64BIT) + printf("PCI1: 64-bit on PMC2\n"); +#elif defined(PCI_ALL_PCI1) + printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n"); +#elif defined(PCI_ONE_PCI1) + printf("PCI1: 32-bit on PMC1\n"); + printf("PCI2: 32-bit on PMC2, PMC3\n"); +#else + printf("PCI1: 32-bit on PMC1, PMC2\n"); + printf("PCI2: 32-bit on PMC3\n"); +#endif +} + +/************************************************************************** + * pci_init_board() + * + * NOTICE: PCI2 is not currently supported + * + */ +void +pci_init_board(void) +{ + DECLARE_GLOBAL_DATA_PTR; + volatile immap_t * immr; + volatile clk8349_t * clk; + volatile law8349_t * pci_law; + volatile pot8349_t * pci_pot; + volatile pcictrl8349_t * pci_ctrl; + volatile pciconf8349_t * pci_conf; + u16 reg16; + u32 reg32; + struct pci_controller * hose; + + immr = (immap_t *)CFG_IMMRBAR; + clk = (clk8349_t *)&immr->clk; + pci_law = immr->sysconf.pcilaw; + pci_pot = immr->ios.pot; + pci_ctrl = immr->pci_ctrl; + pci_conf = immr->pci_conf; + + hose = &pci_hose[0]; + + pib_init(); + + /* + * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode + */ + + reg32 = clk->occr; + udelay(2000); + clk->occr = 0xff000000; + udelay(2000); + + /* + * Release PCI RST Output signal + */ + pci_ctrl[0].gcr = 0; + udelay(2000); + pci_ctrl[0].gcr = 1; + udelay(2000); + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M; + + /* + * Configure PCI Outbound Translation Windows + */ + + /* PCI1 mem space */ + pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK); + + /* PCI1 IO space */ + pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK); + + /* + * Configure PCI Inbound Translation Windows + */ + + /* we need RAM mapped to PCI space for the devices to + * access main memory */ + pci_ctrl[0].pitar1 = 0x0; + pci_ctrl[0].pibar1 = 0x0; + pci_ctrl[0].piebar1 = 0x0; + pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G; + + hose->first_busno = 0; + hose->last_busno = 0xff; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CFG_PCI1_MEM_BASE, + CFG_PCI1_MEM_PHYS, + CFG_PCI1_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CFG_PCI1_IO_BASE, + CFG_PCI1_IO_PHYS, + CFG_PCI1_IO_SIZE, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(hose->regions + 2, + CONFIG_PCI_SYS_MEM_BUS, + CONFIG_PCI_SYS_MEM_PHYS, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + hose->region_count = 3; + + pci_setup_indirect(hose, + (CFG_IMMRBAR+0x8300), + (CFG_IMMRBAR+0x8304)); + + pci_register_hose(hose); + + /* + * Write to Command register + */ + reg16 = 0xff; + pci_hose_read_config_word (hose, PCI_BDF(0,0,0), PCI_COMMAND, + &reg16); + reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, + reg16); + + /* + * Clear non-reserved bits in status register. + */ + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_STATUS, + 0xffff); + pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER, + 0x80); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf("PCI: Bus Dev VenId DevId Class Int\n"); +#endif + /* + * Hose scan. + */ + hose->last_busno = pci_hose_scan(hose); +} +#endif /* CONFIG_PCI */ diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index d6d2fab..41309ac 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -41,9 +41,7 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */ -/* FIXME: Real PCI support will come in a follow-up update. */ -#undef CONFIG_PCI - +#define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE

2 1

[U-Boot-Users] [PATCH] dhcp vendor fields - support opt bootfile, ignore tftp server
by Murray.Jensen＠csiro.au 12 Mar '06

12 Mar '06

This patch adds support for the dhcp vendor optional bootfile (#67). It also ignores the vendor tftp server name option (#66). Both of these are supplied by the DEC Tru64 Unix dhcp server (called "join"), and in the case of the bootfile, it is the only place the boot file name is supplied. There is a perfectly good, 128 byte, field in the main bootp/dhcp packet where the boot file name could have been stored, but it wasn't used - go figure. Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen(a)csiro.au To the extent permitted by law, CSIRO does not represent, warrant and/or guarantee that the integrity of this communication has been maintained or that the communication is free of errors, virus, interception or interference. The information contained in this e-mail may be confidential or privileged. Any unauthorised use or disclosure is prohibited. If you have received this e-mail in error, please delete it immediately and notify Murray Jensen on +61 3 9662 7763. Thank you.

2 1

[U-Boot-Users] [PATCH] Fix RGMII support in 8548 CDS
by Andy Fleming 12 Mar '06

12 Mar '06

This patch fixes a hw timing issue on 8548 CDS for eTSEC 3 in RGMII mode: Index: tsec.h =================================================================== RCS file: /cm/vault/u-boot/u-boot/cpu/mpc85xx/tsec.h,v retrieving revision 1.1.1.1.4.6 diff -r1.1.1.1.4.6 tsec.h 111c111 < #define MIIM_CIS8204_EPHYCON_RGMII 0x1000 --- > #define MIIM_CIS8204_EPHYCON_RGMII 0x1100

2 1

[U-Boot-Users] LXT971A PHY debugging on MPC8540 Custom Board
by Shirasat Girish-ags032 12 Mar '06

12 Mar '06

Hi , I have partially ported Uboot on one of our MPC8540 based custom boards. I am currently facing problems in bringing up the 10/100Mbps FEC interface. We are using the LXT971A PHY for the FEC interface. Well the problem is that , the MAC is putting out the data but the PHY is failing to put the data on the line. The PHY is successfully able to auto- negotiate. The MAC putting out data was confirmed by the MAC debug registers and by probing the Tx_EN,clock and TX_D lines. I carried out the MAC loop back test which passed . Then went on for the PHY internal loop back test. Well, when the loop back is enabled the MAC fails to transmit the frame successfully. The thing confusing me is that why the MAC frame transmission is getting affected when i enable the PHY loopback test. Any pointers will be very helpful. Regards, Girish

3 3

[U-Boot-Users] [Patch][CVS] Updating for RPXlite_DW---20050619
by Sam Song 12 Mar '06

12 Mar '06

Hi list, To make things better on RPXlite DW board with more flexible functions, a small patch added and tested. I change ifdef to make this patch work online this time. Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Add netconsole and several useful commands. ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/configs/RPXlite_DW.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXlite_DW.h,v retrieving revision 1.6 diff -p -u -r1.6 RPXlite_DW.h --- include/configs/RPXlite_DW.h 22 Jan 2005 18:13:06 -0000 1.6 +++ include/configs/RPXlite_DW.h 19 Jun 2005 13:44:10 -0000 @@ -45,7 +45,7 @@ */ /* #define DEBUG 1 */ -/* #ifdef DEPLOYMENT 1 */ +/* #define DEPLOYMENT 1 */ #undef CONFIG_MPC860 #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ @@ -117,6 +117,36 @@ #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) +#if 1 /* Enable this staff could make image enlarge about 25KB. Mask it if you + don't want the advanced function */ + +#ifdef CONFIG_SPLASH_SCREEN +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_BMP | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#else +#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_PING | \ + CFG_CMD_ELF | \ + CFG_CMD_REGINFO | \ + CFG_CMD_DHCP ) +#endif /* CONFIG_SPLASH_SCREEN */ + +/* test-only */ +#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ +#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ + +#define CONFIG_NETCONSOLE + +#endif /* 1 */ + /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> @@ -446,5 +476,6 @@ #define CONFIG_SERVERIP 172.16.115.6 #define CONFIG_ROOTPATH /workspace/myfilesystem/target/ #define CONFIG_BOOTFILE uImage.rpxusb +#define CONFIG_HOSTNAME LITE_H1_DW #endif /* __CONFIG_H */

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[U-Boot-Users] [Patch][CVS] Fix a dummy pci prototype declaration
by Sam Song 12 Mar '06

12 Mar '06

Hi list, I happened to find the mistaken declaration on pci_cfgfunc_nothing in include/pci.h. Thanks for Wolfgang help me confirm that:-) Best regards, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Fix the mistaken declaration on pci_cfgfunc_nothing Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: include/pci.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/pci.h,v retrieving revision 1.3 diff -p -u -r1.3 pci.h --- include/pci.h 31 May 2003 18:35:28 -0000 1.3 +++ include/pci.h 19 Jun 2005 12:57:39 -0000 @@ -336,8 +336,8 @@ struct pci_config_table { unsigned long priv[3]; }; -extern void pci_cfgfunc_nothing(struct pci_controller* hose, pci_dev_t dev, - struct pci_config_table *); +extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev, + struct pci_config_table *); extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *);

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[U-Boot-Users] [Patch][CVS] Adjust CFG_CMD_ECHO as default ENV setting
by Sam Song 12 Mar '06

12 Mar '06

Hi list, Attached patch makes up a fix on CFG_CMD_ECHO. To avoid breaking exists boards, I adjust "echo" as a default command with aggreement of Wolfgang. For the sake of it's effect on all boards, pls check this one more carefully. About 12 boards related was fixed as well. Fix policy is that if CONFIG_CMD_DFL is used, CFG_CMD_ECHO shouldn't be redefined. Did I fix too much or not enough? Ideas pls... Sorry for the late. I just made my PC get CVS tree:-( CVS hasn't supported proxy. It brings me some troubles more or less. Thanks for all your concern, Sam CHANGELOG: * Patch by Sam Song, 19 June 2005: - Adjust echo as a defalut command. Best regards, Sam ___________________________________________________________ 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com/?id=77071 Index: README =================================================================== RCS file: /cvsroot/u-boot/u-boot/README,v retrieving revision 1.126 diff -p -u -r1.126 README --- README 3 May 2005 14:12:25 -0000 1.126 +++ README 19 Jun 2005 12:27:42 -0000 @@ -590,7 +590,7 @@ The following options need to be configu CFG_CMD_DIAG * Diagnostics CFG_CMD_DOC * Disk-On-Chip Support CFG_CMD_DTT * Digital Therm and Thermostat - CFG_CMD_ECHO * echo arguments + CFG_CMD_ECHO echo arguments CFG_CMD_EEPROM * EEPROM read/write support CFG_CMD_ELF * bootelf, bootvx CFG_CMD_ENV saveenv Index: common/command.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/common/command.c,v retrieving revision 1.18 diff -p -u -r1.18 command.c --- common/command.c 6 Apr 2005 00:04:17 -0000 1.18 +++ common/command.c 19 Jun 2005 12:27:51 -0000 @@ -42,6 +42,8 @@ U_BOOT_CMD( NULL ); +#if (CONFIG_COMMANDS & CFG_CMD_ECHO) + int do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -74,6 +76,8 @@ U_BOOT_CMD( " - echo args to console; \\c suppresses newline\n" ); +#endif /* CFG_CMD_ECHO */ + #ifdef CFG_HUSH_PARSER int Index: include/cmd_confdefs.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/cmd_confdefs.h,v retrieving revision 1.22 diff -p -u -r1.22 cmd_confdefs.h --- include/cmd_confdefs.h 1 Apr 2005 00:25:45 -0000 1.22 +++ include/cmd_confdefs.h 19 Jun 2005 12:27:53 -0000 @@ -110,7 +110,6 @@ CFG_CMD_DIAG | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_EXT2 | \ Index: include/configs/ISPAN.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ISPAN.h,v retrieving revision 1.2 diff -p -u -r1.2 ISPAN.h --- include/configs/ISPAN.h 31 Dec 2004 09:32:53 -0000 1.2 +++ include/configs/ISPAN.h 19 Jun 2005 12:27:55 -0000 @@ -108,7 +108,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/MIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/MIP405.h,v retrieving revision 1.10 diff -p -u -r1.10 MIP405.h --- include/configs/MIP405.h 23 Feb 2004 22:22:33 -0000 1.10 +++ include/configs/MIP405.h 19 Jun 2005 12:27:56 -0000 @@ -58,7 +58,6 @@ CFG_CMD_CACHE | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FAT | \ Index: include/configs/PIP405.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/PIP405.h,v retrieving revision 1.8 diff -p -u -r1.8 PIP405.h --- include/configs/PIP405.h 20 Jan 2004 23:12:34 -0000 1.8 +++ include/configs/PIP405.h 19 Jun 2005 12:27:57 -0000 @@ -50,7 +50,6 @@ CFG_CMD_PCI | \ CFG_CMD_CACHE | \ CFG_CMD_IRQ | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO | \ Index: include/configs/RPXsuper.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/RPXsuper.h,v retrieving revision 1.3 diff -p -u -r1.3 RPXsuper.h --- include/configs/RPXsuper.h 20 Jan 2004 23:12:34 -0000 1.3 +++ include/configs/RPXsuper.h 19 Jun 2005 12:27:58 -0000 @@ -154,7 +154,6 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_IMMAP | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_REGINFO & \ ~CFG_CMD_KGDB ) Index: include/configs/Rattler.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/Rattler.h,v retrieving revision 1.2 diff -p -u -r1.2 Rattler.h --- include/configs/Rattler.h 5 May 2005 09:13:21 -0000 1.2 +++ include/configs/Rattler.h 19 Jun 2005 12:27:59 -0000 @@ -125,7 +125,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_JFFS2 \ | CFG_CMD_MII \ Index: include/configs/TQM5200.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/TQM5200.h,v retrieving revision 1.12 diff -p -u -r1.12 TQM5200.h --- include/configs/TQM5200.h 2 Apr 2005 22:37:55 -0000 1.12 +++ include/configs/TQM5200.h 19 Jun 2005 12:28:00 -0000 @@ -161,7 +161,6 @@ CFG_CMD_ASKENV | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ - CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_MII | \ Index: include/configs/ZPC1900.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ZPC1900.h,v retrieving revision 1.5 diff -p -u -r1.5 ZPC1900.h --- include/configs/ZPC1900.h 9 Oct 2004 23:33:43 -0000 1.5 +++ include/configs/ZPC1900.h 19 Jun 2005 12:28:01 -0000 @@ -112,7 +112,6 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_ASKENV \ | CFG_CMD_DHCP \ - | CFG_CMD_ECHO \ | CFG_CMD_IMMAP \ | CFG_CMD_MII \ | CFG_CMD_PING \ Index: include/configs/gw8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/gw8260.h,v retrieving revision 1.2 diff -p -u -r1.2 gw8260.h --- include/configs/gw8260.h 27 Jun 2003 21:32:46 -0000 1.2 +++ include/configs/gw8260.h 19 Jun 2005 12:28:02 -0000 @@ -305,7 +305,6 @@ CFG_CMD_BEDBUG | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_IMMAP | \ CFG_CMD_MII) Index: include/configs/ppmc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/ppmc8260.h,v retrieving revision 1.4 diff -p -u -r1.4 ppmc8260.h --- include/configs/ppmc8260.h 25 Mar 2004 15:14:45 -0000 1.4 +++ include/configs/ppmc8260.h 19 Jun 2005 12:28:04 -0000 @@ -279,7 +279,6 @@ #define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_REGINFO | \ CFG_CMD_MEMTEST | \ CFG_CMD_MII | \ Index: include/configs/sacsng.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sacsng.h,v retrieving revision 1.7 diff -p -u -r1.7 sacsng.h --- include/configs/sacsng.h 25 Mar 2004 15:14:45 -0000 1.7 +++ include/configs/sacsng.h 19 Jun 2005 12:28:07 -0000 @@ -507,7 +507,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ @@ -520,7 +519,6 @@ # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ELF | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_I2C | \ CFG_CMD_SPI | \ CFG_CMD_SDRAM | \ Index: include/configs/sbc8260.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/sbc8260.h,v retrieving revision 1.11 diff -p -u -r1.11 sbc8260.h --- include/configs/sbc8260.h 11 Jul 2004 21:49:43 -0000 1.11 +++ include/configs/sbc8260.h 19 Jun 2005 12:28:09 -0000 @@ -448,7 +448,6 @@ #ifdef CONFIG_ETHER_ON_FCC # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ @@ -459,7 +458,6 @@ #else # define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ CFG_CMD_ELF | \ CFG_CMD_I2C | \ CFG_CMD_IMMAP | \ Index: include/configs/utx8245.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/configs/utx8245.h,v retrieving revision 1.3 diff -p -u -r1.3 utx8245.h --- include/configs/utx8245.h 5 Jun 2003 15:40:53 -0000 1.3 +++ include/configs/utx8245.h 19 Jun 2005 12:28:10 -0000 @@ -91,7 +91,6 @@ protect on $(u-boot_startaddr) $(u-boot_ | CFG_CMD_ENV | CFG_CMD_CONSOLE \ | CFG_CMD_LOADS | CFG_CMD_LOADB \ | CFG_CMD_IMI | CFG_CMD_CACHE \ - | CFG_CMD_RUN | CFG_CMD_ECHO \ | CFG_CMD_REGINFO | CFG_CMD_NET\ | CFG_CMD_DHCP | CFG_CMD_I2C \ | CFG_CMD_DATE)

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[U-Boot-Users] Patch to cpu/mpc8260/speed.c
by KokHow Teh 12 Mar '06

12 Mar '06

Hi; I am using u-boot-1.1.2 and I am sending this minor patch to the cpu/mpc8260/speed.c file in view of MPC8280EC document which lays down how the PCIDF is calculated but not reflected correctly in the file. Index: cpu/mpc8260/speed.c =================================================================== RCS file: /usr/cvsroot/u-boot/cpu/mpc8260/speed.c,v retrieving revision 1.2 diff -u -b -B -r1.2 speed.c --- cpu/mpc8260/speed.c 28 Apr 2005 07:01:04 -0000 1.2 +++ cpu/mpc8260/speed.c 16 Jun 2005 04:35:12 -0000 @@ -202,11 +202,12 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; - ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf; + ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; corecnf_t *cp; sccr = immap->im_clkrst.car_sccr; dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; + pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; scmr = immap->im_clkrst.car_scmr; corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT; @@ -243,8 +244,8 @@ cp->vco_div, cp->freq_60x, cp->freq_core); printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, " - "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, - pllmf); + "plldf %ld, pllmf %ld, pcidf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf, + pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", gd->vco_out, gd->scc_clk, gd->brg_clk); @@ -253,10 +254,18 @@ gd->cpu_clk, gd->cpm_clk, gd->bus_clk); if (sccr & SCCR_PCI_MODE) { - uint pci_div; + uint pci_div, pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) + pci_div *= 5; + else if (pcidf == 0xB) + pci_div *= 6; + else + pci_div *= (pcidf + 1); + } else + pci_div = pcidf + 1; printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); } Regards, TEH

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[U-Boot-Users] Patch to fix jffs2's lack of "data crc".
by Rick Bronson 12 Mar '06

12 Mar '06

1. A description of the bug: When jffs2 reads files it crc's the header but not the data. If the data is corrupt it can cause jffs2 to accept a chunk when it shouldn't. My patch adds in code to crc the data. 2. A CHANGELOG entry Add crc of data to jffs2 (in jffs2_1pass_build_lists()).

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[U-Boot-Users] parser problem?
by Andrew Dyer 12 Mar '06

12 Mar '06

I noticed on my board that if I enter a space and then return at the u-boot command line I get an exception. I using u-boot from cvs and the standard (not hush) parser on a mips platform. Does anybody else see this behaviour? -- Hardware, n.: The parts of a computer system that can be kicked.

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[U-Boot-Users] byteorder of image_header_t members?
by Steven Scholz 12 Mar '06

12 Mar '06

Hi there, if uint32_t members of image_header_t are stored in network byteorder, then all references of these members should use ntohl(), right? So should we fix this for instance: #~> grep "\->ih_magic" * cmd_autoscript.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { >>> cmd_bootm.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_bootm.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_bootm.c: (ntohl(hdr->ih_magic) != IH_MAGIC)) >>> cmd_doc.c: if (hdr->ih_magic == IH_MAGIC) { <<< >>> cmd_fdc.c: if (hdr->ih_magic != IH_MAGIC) { <<< cmd_fpga.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_ide.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { cmd_nand.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_scsi.c: if (ntohl(hdr->ih_magic) == IH_MAGIC) { cmd_usb.c: if (ntohl(hdr->ih_magic) != IH_MAGIC) { -- Steven

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[U-Boot-Users] PATCH: Switch FADS family boards to new clock mechanism
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch switches MPC86xADS and MPC885ADS boards (FADS family) to new clock control mechanism (clocks are controlled by environment variable). Also, board revision detection is fixed. CHANGELOG - Switch MPC86xADS and MPC885ADS boards to use cpuclk environment variable to set clock -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: RPXlite configuration fixes
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes several bugs in and adds some features to long orphaned RPXlite port. CHANGELOG Fix RPXlite board configuration. - Use correct flash sector size - Use correct memory test end address - Add support for bzip2 compression - Various small fixes -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: Numerous fixes for ZPC.1900 port
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch fixes memory configuration for Zephyr Engineering ZPC.1900 board. CHANGELOG Memory configuration changes for ZPC.1900 board - Fix SDRAM timing on both local bus and 60x bus - Add support for second flash bank (SIMM) - Change boot flash base -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] PATCH: Add support for Adder boards with 16MB SDRAM
by Yuli Barcohen 12 Mar '06

12 Mar '06

The attached patch adds support for Analogue&Micro Adder boards with 16MB SDRAM (current configuration supports 8MB only). Also, added support for second FEC on Adder87x board. CHANGELOG - Add support for Adder boards with 16MB SDRAM - Add support for second FEC on Adder87x board -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================

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[U-Boot-Users] [PATCH] include top config.mk only after CROSS_COMPILE is defined
by Friedrich Lobenstock 12 Mar '06

12 Mar '06

Hi Wolfgang! During compiling I just spotted the fact that gccincdir := $(shell $(CC) -print-file-name=include) in the top config.mk does execute "gcc -print-file-name=include" instead of "m68k-elf-gcc ..." which I would expect as i compile for m68k. I think that this does not make much difference as the includes should mostly be the same, but for the sake of completeness I want to bring the attached patch to your attention. Description of the patch: * CROSS_COMPILE is referenced in the top 'config.mk' file therefore we need to include it in the main Makefile only after CROSS_COMPILE is defined This patch is against the u-boot-1.1.2. -- MfG / Regards Friedrich Lobenstock --- u-boot-1.1.2-org/Makefile 2004-12-19 10:58:11.000000000 +0100 +++ u-boot-1.1.2/Makefile 2005-06-01 18:35:44.000000000 +0200 @@ -46,9 +46,6 @@ # load ARCH, BOARD, and CPU configuration include include/config.mk export ARCH CPU BOARD VENDOR SOC -# load other configuration -include $(TOPDIR)/config.mk - ifndef CROSS_COMPILE ifeq ($(HOSTARCH),ppc) CROSS_COMPILE = @@ -86,6 +83,10 @@ export CROSS_COMPILE +# load other configuration +include $(TOPDIR)/config.mk + + ######################################################################### # U-Boot objects....order is important (i.e. start must be first)

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[U-Boot-Users] [PATCH] soft_i2c/i2c_probe(): Perform reads instead of writes
by Peter Korsgaard 12 Mar '06

12 Mar '06

Hi, The following little patch makes the i2c_probe function use reads instead of writes to match the comment (broken in r1.2). * Patch by Peter Korsgaard, 26 May 2005: Use reads instead of writes for probe in soft_i2c. -- Bye, Peter Korsgaard

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[U-Boot-Users] [PATCH] add OpenGear CM4008 board support
by Greg Ungerer 12 Mar '06

12 Mar '06

Hi All, Attached is a patch that adds support to u-boot for the OpenGear CM4008 8 port console manager board. It is built around the KS8695P CPU, with 8 serial ports, 16MB RAM, and 8MB NOR flash. This patch was originally generated against u-boot 1.1.1. Regards Greg diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/cm4008.c u-boot/board/cm4008/cm4008.c --- u-boot-1.1.1/board/cm4008/cm4008.c 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/cm4008.c 2005-05-04 22:47:00.021931928 +1000 @@ -0,0 +1,101 @@ +/* + * (C) Copyright 2005 + * Greg Ungerer, OpenGear Inc, <greg.ungerer(a)opengear.com> + * + * (C) Copyright 2002 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/platform.h> + +/* ------------------------------------------------------------------------- */ + +#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) +#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b) + +/* ------------------------------------------------------------------------- */ + + +/* + * Miscelaneous platform dependent initialisations + */ +int env_flash_cmdline (void) +{ + unsigned char *sp = (unsigned char *) 0x0201c020; + unsigned char *ep; + int len; + + /* Check if "erase" push button is depressed */ + if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) { + printf("### Entering network recovery mode...\n"); + setenv("bootargs", "console=ttyAM0,115200 mem=16M initrd=0x400000,6M root=/dev/ram0"); + setenv("bootcmd", "bootp 0x400000; gofsk 0x400000"); + setenv("bootdelay", "2"); + return 0; + } + + /* Check for flash based kernel boot args to use as default */ + for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++) + ; + + if ((len > 0) && (len <1024)) + setenv("bootargs", sp); + + return 0; +} + +int board_late_init (void) +{ + return 0; +} + + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* arch number of CM4008 */ + gd->bd->bi_arch_number = 624; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x00000100; + + /* power down all but port 0 on the switch */ + ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005); + ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005); + + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return (0); +} diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/config.mk u-boot/board/cm4008/config.mk --- u-boot-1.1.1/board/cm4008/config.mk 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/config.mk 2005-01-11 00:56:42.000000000 +1000 @@ -0,0 +1 @@ +TEXT_BASE = 0x00f00000 diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/flash.c u-boot/board/cm4008/flash.c --- u-boot-1.1.1/board/cm4008/flash.c 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/flash.c 2005-01-17 00:55:13.000000000 +1000 @@ -0,0 +1,409 @@ +/* + * (C) Copyright 2005 + * Greg Ungerer, OpenGear Inc, greg.ungerer(a)opengear.com + * + * (C) Copyright 2001 + * Kyle Harris, Nexus Technologies, Inc. kharris(a)nexus-tech.net + * + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <linux/byteorder/swab.h> + + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +#define mb() __asm__ __volatile__ ("" : : : "memory") + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (unsigned char * addr, flash_info_t * info); +static int write_data (flash_info_t * info, ulong dest, unsigned char data); +static void flash_get_offsets (ulong base, flash_info_t * info); +void inline spin_wheel (void); + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + int i; + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + switch (i) { + case 0: + flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]); + flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); + break; + case 1: + /* ignore for now */ + flash_info[i].flash_id = FLASH_UNKNOWN; + break; + default: + panic ("configured too many flash banks!\n"); + break; + } + size += flash_info[i].size; + } + + /* Protect monitor and environment sectors + */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + _bss_start - _armboot_start, + &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t * info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) + return; + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + for (i = 0; i < info->sector_count; i++) { + info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); + info->protect[i] = 0; + } + } +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_INTEL: + printf ("INTEL "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_28F128J3A: + printf ("28F128J3A\n"); + break; + default: + printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", + info->start[i], info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + return; +} + +/* + * The following code cannot be run from FLASH! + */ +static ulong flash_get_size (unsigned char * addr, flash_info_t * info) +{ + volatile unsigned char value; + + /* Write auto select command: read Manufacturer ID */ + addr[0x5555] = 0xAA; + addr[0x2AAA] = 0x55; + addr[0x5555] = 0x90; + + mb (); + value = addr[0]; + + switch (value) { + + case (unsigned char)INTEL_MANUFACT: + info->flash_id = FLASH_MAN_INTEL; + break; + + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + addr[0] = 0xFF; /* restore read mode */ + return (0); /* no or unknown flash */ + } + + mb (); + value = addr[2]; /* device ID */ + + switch (value) { + + case (unsigned char)INTEL_ID_28F640J3A: + info->flash_id += FLASH_28F640J3A; + info->sector_count = 64; + info->size = 0x00800000; + break; /* => 8 MB */ + + case (unsigned char)INTEL_ID_28F128J3A: + info->flash_id += FLASH_28F128J3A; + info->sector_count = 128; + info->size = 0x01000000; + break; /* => 16 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + break; + } + + if (info->sector_count > CFG_MAX_FLASH_SECT) { + printf ("** ERROR: sector count %d > max (%d) **\n", + info->sector_count, CFG_MAX_FLASH_SECT); + info->sector_count = CFG_MAX_FLASH_SECT; + } + + addr[0] = 0xFF; /* restore read mode */ + + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + int flag, prot, sect; + ulong type; + int rcode = 0; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + type = (info->flash_id & FLASH_VENDMASK); + if ((type != FLASH_MAN_INTEL)) { + printf ("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) + printf ("- Warning: %d protected sectors will not be erased!\n", prot); + else + printf ("\n"); + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + volatile unsigned char *addr; + unsigned char status; + + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + addr = (volatile unsigned char *) (info->start[sect]); + *addr = 0x50; /* clear status register */ + *addr = 0x20; /* erase setup */ + *addr = 0xD0; /* erase confirm */ + + while (((status = *addr) & 0x80) != 0x80) { + if (get_timer_masked () > + CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + *addr = 0xB0; /* suspend erase */ + *addr = 0xFF; /* reset to read mode */ + rcode = 1; + break; + } + } + + *addr = 0x50; /* clear status register cmd */ + *addr = 0xFF; /* resest to read mode */ + + printf (" done\n"); + } + } + return rcode; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + * 4 - Flash not identified + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong cp, wp; + unsigned char data; + int count, i, l, rc, port_width; + + if (info->flash_id == FLASH_UNKNOWN) + return 4; + + wp = addr; + port_width = 1; + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + for (; i < port_width && cnt > 0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt == 0 && i < port_width; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + if ((rc = write_data (info, wp, data)) != 0) { + return (rc); + } + wp += port_width; + } + + /* + * handle word aligned part + */ + count = 0; + while (cnt >= port_width) { + data = 0; + for (i = 0; i < port_width; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_data (info, wp, data)) != 0) { + return (rc); + } + wp += port_width; + cnt -= port_width; + if (count++ > 0x800) { + spin_wheel (); + count = 0; + } + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i < port_width; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + return (write_data (info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word or halfword to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_data (flash_info_t * info, ulong dest, unsigned char data) +{ + volatile unsigned char *addr = (volatile unsigned char *) dest; + ulong status; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*addr & data) != data) { + printf ("not erased at %08lx (%lx)\n", (ulong) addr, + (ulong) * addr); + return (2); + } + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + *addr = 0x40; /* write setup */ + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait while polling the status register */ + while (((status = *addr) & 0x80) != 0x80) { + if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { + *addr = 0xFF; /* restore read mode */ + return (1); + } + } + + *addr = 0xFF; /* restore read mode */ + + return (0); +} + +void inline spin_wheel (void) +{ + static int p = 0; + static char w[] = "\\/-"; + + printf ("\010%c", w[p]); + (++p == 3) ? (p = 0) : 0; +} diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/Makefile u-boot/board/cm4008/Makefile --- u-boot-1.1.1/board/cm4008/Makefile 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/Makefile 2004-11-02 00:38:51.000000000 +1000 @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := cm4008.o flash.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff -Naur --exclude=CVS u-boot-1.1.1/board/cm4008/u-boot.lds u-boot/board/cm4008/u-boot.lds --- u-boot-1.1.1/board/cm4008/u-boot.lds 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/board/cm4008/u-boot.lds 2004-11-05 00:27:11.000000000 +1000 @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/ks8695/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -Naur --exclude=CVS u-boot-1.1.1/include/configs/cm4008.h u-boot/include/configs/cm4008.h --- u-boot-1.1.1/include/configs/cm4008.h 1970-01-01 10:00:00.000000000 +1000 +++ u-boot/include/configs/cm4008.h 2005-03-20 22:31:27.000000000 +1000 @@ -0,0 +1,127 @@ +/* + * (C) Copyright 2004 + * Greg Ungerer <greg.ungerer(a)opengear.com>. + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +#define CONFIG_INIT_CRITICAL /* undef for developing */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_KS8695 1 /* it is a KS8695 CPU */ +#define CONFIG_CM4008 1 /* it is an OpenGear CM4008 boad */ + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ + +/* + * select serial console configuration + */ +#define CFG_ENV_IS_NOWHERE +#define CONFIG_SERIAL1 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> +#undef CONFIG_COMMANDS +#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~(CFG_CMD_NONSTD | CFG_CMD_ENV)) + +#define CONFIG_BOOTDELAY 0 +#define CONFIG_BOOTARGS "mem=16M console=ttyAM0,115200" +#define CONFIG_BOOTCOMMAND "gofsk 0x02200000" + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x00800000 /* memtest works on */ +#define CFG_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x00008000 /* default load address */ + +#define CFG_HZ (1000) /* 1ms resolution ticks */ + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ + +#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment */ + +#endif /* __CONFIG_H */ diff -Naur --exclude=CVS u-boot-1.1.1/Makefile u-boot/Makefile --- u-boot-1.1.1/Makefile 2004-04-25 09:23:30.000000000 +1000 +++ u-boot/Makefile 2005-03-12 23:06:59.000000000 +1000 @@ -1040,6 +1040,11 @@ VCMA9_config : unconfig @./mkconfig $(@:_config=) arm arm920t vcma9 mpl +cm4008_config : unconfig + @./mkconfig $(@:_config=) arm ks8695 cm4008 + +cm41xx_config : unconfig + @./mkconfig $(@:_config=) arm ks8695 cm41xx ######################################################################### ## S3C44B0 Systems

2 16

[U-Boot-Users] [PATCH] revised word alignment fixes for word aligned NS16550 UART
by jean-paul.saman＠philips.com 12 Mar '06

12 Mar '06

The patch is created against current CVS 2005 march 1st and fixes problems for boards that only have word access to the NS16550 UART. OBSOLETES: From: Jean-Paul Saman Date: 23-02-2005 Subject: [PATCH] word alignment fixes for word aligned NS16550 UART peripheral CHANGELOG: * Patch by Jean-Paul Saman, 23 Feb 2005 - include/ns16550.h Fixes alignement bug with UART that only supports word aligned access: removed "__attribute__ ((packed));" for "(CFG_NS16550_REG_SIZE == 4)" GCC generates bytes access when it encounters the packed attribute regardless if the struct is already word aligned for a platform. Peripherals that can only handle word aligned access won't work properly when accessed with byte access. The struct NS16550 is already word aligned for REG_SIZE = 4, so there is no need to packed the struct in that case. Kind greetings, Jean-Paul Saman Philips Semiconductors CTO/RTG Philips HighTech Campus, building WDB 3.29 Professor van den Holstlaan 4 5655 AA Eindhoven tel: +31 (0)40 27 45131

2 1

[U-Boot-Users] Suspect behaiviour if gatewayip not set
by Robin Gilks 12 Mar '06

12 Mar '06

Greetings Having played with netconsole a bit, I've observed that the current behaiviour of warning if gatewayip is not set and then using its value of zero when talking to outside the current subnet is somewhat suspect. The particular case of netconsole means that no error message is evident - it is trying to be sent the error down the ethernet connection that is being initiated with an arp(0.0.0.0)! I propose that the warning message stay but the target address is put into the arp so that a proxying router can reply to it rather then send out a nonsense arp request. CHANGELOGg: * Patch by Robin Gilks 23 December 2004 net.c - if gatewayip not set send arp request for destination IP not zero --- net.c.old 2004-10-26 12:46:58.000000000 +1300 +++ net.c 2004-12-23 09:42:46.000000000 +1300 @@ -207,8 +207,10 @@ (NetOurIP & NetOurSubnetMask)) { if (NetOurGatewayIP == 0) { puts ("## Warning: gatewayip needed but not set\n"); + NetArpWaitReplyIP = NetArpWaitPacketIP; + } else { + NetArpWaitReplyIP = NetOurGatewayIP; } - NetArpWaitReplyIP = NetOurGatewayIP; } else { NetArpWaitReplyIP = NetArpWaitPacketIP; } -- Robin Gilks Senior Design Engineer Phone: (+64)(3) 357 1569 Tait Electronics Fax : (+64)(3) 359 4632 PO Box 1645 Christchurch Email : robin.gilks(a)tait.co.nz New Zealand ======================================================================= This email, including any attachments, is only for the intended addressee. It is subject to copyright, is confidential and may be the subject of legal or other privilege, none of which is waived or lost by reason of this transmission. If the receiver is not the intended addressee, please accept our apologies, notify us by return, delete all copies and perform no other act on the email. Unfortunately, we cannot warrant that the email has not been altered or corrupted during transmission. =======================================================================

2 1

[U-Boot-Users] maybe just one more bug left in building the examples directory in 1.1.2
by John Davis 08 Mar '06

08 Mar '06

Hello I am getting closer to getting the examples code to build. I have added a bunch of object files and library files to the link command in the examples Makefile. However, I have gotten to the last bug and I don't know how to solve it. Below, it complains about __got2_entries. I found this defined in our board directories linker script. The current command line and results: make[1]: Entering directory `/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2 /examples' ppc-linux-ld -g -Ttext 0x40000 \ -o hello_world -e hello_world hello_world.o libstubs.a \ /home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/cpu/ppc4xx/start.o \ /home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/board/fsp1/fsp1_pra.o \ /home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/board/fsp1/eddr2.o \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/common -lcommon \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/lib_generic -lgeneric \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/net -lnet \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/rtc -lrtc \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/board/fsp1 -lfsp1 \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/cpu/ppc4xx -lppc4xx \ -L/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2/lib_ppc -lppc \ -L/opt/fld_fakeroot/opt/mcp/ppc/bin/../lib/gcc-lib/ppc-linux/3.3.3 -lgcc /home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2 /cpu/ppc4xx/start.o(.text+0x25ae):/home/davis/cvs/mcp4/uboot/mine/u- boot-1.1.2/cpu/ppc4xx/start.S:1374: undefined reference to `__got2_entries' ppc-linux-ld: BFD 2.15.90.0.1.1 20040303 (SuSE Linux) assertion fail ../../bfd/elf32-ppc.c:5645 make[1]: *** [hello_world] Segmentation fault make[1]: *** Deleting file `hello_world' make[1]: Leaving directory `/home/davis/cvs/mcp4/uboot/mine/u-boot-1.1.2 /examples' make: *** [examples] Error 2 [davis@dyn-9-152-249-44 u-boot-1.1.2]$ The relevant portion of the linker script which defines the __got2_entries variable. board/fsp1/u-boot.lds: ... stuff snipped __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; ... stuff snipped Any advice on how to apply this to my makefile is appreciated. JD

4 10

[U-Boot-Users] [PATCH] CFI support for Versatile & Integrator/CP boards
by Peter Pearse 28 Feb '06

28 Feb '06

The attached gzipped patch was made against the U-Boot GIT head of Oct 31 2005. It is my patch number 012. The patch is independent of patches 009 & 010, but dependent on patch 011. The patch updates the versatile and integrator/CP boards code to use CFI flash, rather than having a hardware dependent flash.c. CHANGELOG: Versatile & Integrator/CP to use CFI flash.. Patch by Peter Pearse, 31st Oct 2005

6 11

[U-Boot-Users] Patch for drivers/cfi_flash.c; properly detect write errors.
by Marcus Hall 28 Feb '06

28 Feb '06

Hello.. It seems that there is a minor problem in cfi_flash.c that prevents it from detecting that a flash write error has occurred. The first change in the attached patch is trivial, it just makes the strings output for a protected and a non-protected sector have the same length so the output looks prettier.. The second change is in flash_full_status_check(). We have just called flash_status_check() and then did a switch() on the vendor. For intel, we *should* check if there are any error bits if the previous call returned ERR_OK (Otherwise we will have output an error message in flash_status_check() already.) The original code would only check for error bits if flash_status_check() returns ERR_TIMEOUT. -- Marcus Hall marcushall(a)lucent.com *** ../u-boot-1.1.3/drivers/cfi_flash.c Sat Aug 13 17:53:35 2005 --- u-boot-1.1.3/drivers/cfi_flash.c Tue Aug 23 14:47:06 2005 *************** *** 502,508 **** if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", ! info->start[i], info->protect[i] ? " (RO) " : " "); #endif } putc ('\n'); --- 502,508 ---- if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", ! info->start[i], info->protect[i] ? " (RO)" : " "); #endif } putc ('\n'); *************** *** 718,724 **** switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: ! if ((retcode != ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, --- 718,724 ---- switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: ! if ((retcode == ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt,

2 1

[U-Boot-Users] [PATCH] cfi_flash.c patches
by Sangmoon Kim 28 Feb '06

28 Feb '06

Hi, The two patches attached are for drivers/cfi_flash.c. cfi_flash-protect.patch adds CFG_FLASH_PROTECT_CLEAR because for some flash memories(such as 28F320C3) all banks are protected after reset. cfi_flash-buffer.patch makes write_buff not to call flash_write_cfibuffer if buffer_size is1. Because for flash memories with buffer_size 1, buffer write is not supported. Regards, Sangmoon Kim

7 28

[U-Boot-Users] PATCH for drivers/cfi_flash.c
by Tolunay Orkun 28 Feb '06

28 Feb '06

This patch reworks the patch submitted on May 6, 2005: Ref: http://sourceforge.net/mailarchive/message.php?msg_id=11674386 This patch (cfi_flash.patch.tolunay) is prepared against current CVS version + Peter Pearse Patch dated March 15, 2005. Ref: http://sourceforge.net/mailarchive/message.php?msg_id=11164812 CHANGELOG: * Patch by Tolunay Orkun, 02 July 2005: Fixes for drivers/cfi_flash.c: - Fix wrong timeout value usage in flash_status_check() - Round write_tout up when converting to msec in flash_get_size() - Remove clearing flash status at the end of flash_write_cfibuffer() which sets Intel 28F640J3 flash back to command mode on CSB472 ~~~ In case Peter's Patch is rejected for some reason please apply the alternate patch (cfi_flash.patch.tolunay2) instead. It makes one additional fix that I had submitted in my original patch. CHANGELOG (Alternate) * Patch by Tolunay Orkun, 02 July 2005: Fixes for drivers/cfi_flash.c: - Fix wrong timeout value usage in flash_status_check() - Round write_tout up when converting to msec in flash_get_size() - Remove clearing flash status at the end of flash_write_cfibuffer() which sets Intel 28F640J3 flash back to command mode on CSB472 - Fix incorrect if condition in flash_full_status_check() Best regards, Tolunay Orkun Index: drivers/cfi_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/cfi_flash.c,v retrieving revision 1.18 diff -p -u -r1.18 cfi_flash.c --- drivers/cfi_flash.c 16 May 2005 15:23:24 -0000 1.18 +++ drivers/cfi_flash.c 2 Jul 2005 23:45:50 -0000 @@ -694,7 +694,7 @@ static int flash_status_check (flash_inf /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); @@ -1113,8 +1113,9 @@ static ulong flash_get_size (ulong base, info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ @@ -1281,7 +1282,6 @@ static int flash_write_cfibuffer (flash_ info->buffer_write_tout, "buffer write"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */ Index: drivers/cfi_flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/drivers/cfi_flash.c,v retrieving revision 1.18 diff -p -u -r1.18 cfi_flash.c --- drivers/cfi_flash.c 16 May 2005 15:23:24 -0000 1.18 +++ drivers/cfi_flash.c 2 Jul 2005 23:52:15 -0000 @@ -694,7 +694,7 @@ static int flash_status_check (flash_inf /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); @@ -719,7 +719,7 @@ static int flash_full_status_check (flas case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: if ((retcode != ERR_OK) - && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { + || !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, info->start[sector]); @@ -1113,8 +1113,9 @@ static ulong flash_get_size (ulong base, info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ @@ -1281,7 +1282,6 @@ static int flash_write_cfibuffer (flash_ info->buffer_write_tout, "buffer write"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */

2 1

[U-Boot-Users] cfi_flash.c patch
by richard＠uclinux.net 28 Feb '06

28 Feb '06

Afternoon... Adding 2 spaces in cfi_flash.c makes the output of "flinfo" much more readable if there are protected and unprotected sectors: rick ---------------------------------------------------------------------------- CHANGELOG: * Patch by Richard Klingler, 09 Apr 2005: correct column layout of flinfo output. --- u-boot.orig/drivers/cfi_flash.c 2005-01-09 19:12:33.000000000 +0200 +++ u-boot/drivers/cfi_flash.c 2005-04-09 16:35:04.000000000 +0300 @@ -483,7 +483,7 @@ void flash_print_info (flash_info_t * in if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + info->start[i], info->protect[i] ? " (RO) " : " "); #endif } putc ('\n');

3 3

[U-Boot-Users] PATCH: minor bugs fix in cfi_driver.c
by Pierre AUBERT 28 Feb '06

28 Feb '06

Please find attached a little patch against current CVS. CHANGELOG: * Patch by Pierre Aubert 09 Dec 2004 - Fix flash information strings alignement in cfi_driver.c - Fix monitor size for flash protection in cfi_driver.c Best regards diff -pur u-boot/drivers/cfi_flash.c u-boot-paub/drivers/cfi_flash.c --- u-boot/drivers/cfi_flash.c 2004-10-11 01:27:35.000000000 +0200 +++ u-boot-paub/drivers/cfi_flash.c 2004-12-09 10:11:31.000000000 +0100 @@ -334,7 +334,7 @@ unsigned long flash_init (void) #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE, - CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, + CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]); #endif @@ -477,7 +477,7 @@ void flash_print_info (flash_info_t * in if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + info->start[i], info->protect[i] ? " (RO)" : " "); #endif } putc ('\n');

2 1

[U-Boot-Users] [PATCH] Two System ACE CF fixes
by Peter Ryser 25 Jan '06

25 Jan '06

Attached a patch that adds support for the 16-bit wide bus of System ACE CF besides the existing support for the 8-bit wide bus. The patch also sets the FORCECFGMODE bit in the control register when the System ACE CF configuration controller is reset before reading a sector. Without this bit set System ACE CF reconfigures an FPGA if the CFGMODE pin is active whenever a sector is read. The third hunk fixes a typo. - Peter --- u-boot.orig/common/cmd_ace.c 2005-09-22 23:53:00.000000000 -0700 +++ u-boot/common/cmd_ace.c 2005-09-26 07:40:41.000000000 -0700 @@ -22,8 +22,9 @@ /* * The Xilinx SystemACE chip support is activated by defining * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE - * to set the base address of the device. This code currently - * assumes that the chip is connected via a byte-wide bus. + * to set the base address of the device. CFG_SYSTEMACE_WIDTH + * selects the bus width the chip is connected with. Valid + * settings are 8 or 16. * * The CONFIG_SYSTEMACE also adds to fat support the device class * "ace" that allows the user to execute "fatls ace 0" and the @@ -137,6 +138,11 @@ block_dev_desc_t * systemace_get_dev(in systemace_dev.removable = 1; systemace_dev.block_read = systemace_read; + if(CFG_SYSTEMACE_WIDTH == 8) + ace_writew(0, 0); + else + ace_writew(1, 0); + init_part(&systemace_dev); } @@ -227,7 +233,7 @@ static unsigned long systemace_read(int /* Reset the configruation controller */ val = ace_readw(0x18); - val|=0x0080; + val|=0x0088; ace_writew(val, 0x18); retry = trans * 16; @@ -249,7 +255,7 @@ static unsigned long systemace_read(int retry -= 1; } - /* Clear the configruation controller reset */ + /* Clear the configuration controller reset */ val = ace_readw(0x18); val&=~0x0080; ace_writew(val, 0x18); * Add System ACE CF support for 16-bit bus width Add fix to ignore CFGMODE pin when resetting the System ACE CF configuration controller to avoid reconfiguration of FPGAs when reading sectors. Patch by Peter Ryser, 26 Sep 2005

2 2

[U-Boot-Users] EP852 : Kernel not booting ( Hangs after uncompressing)
by gautam borad 20 Jan '06

20 Jan '06

Hi, I'm trying to port u-boot-1.1.3 to EP852 board with mpc852T processor.The kernel im using is linuxppc 2.4.21. The board is working fine with u-boot , the problem is that kernel is not starting. I've made sure that the bd_info structure is same in kernel and u-boot. The clocks_in_mhz variable is not set and the IMMR value in kernel and u-boot matches. I run the test_burst program in u-boot and it worked fine.( so no prob with RAM) What else am i doing wrong?? The dump is : U-Boot 1.1.3 (Oct 28 2005 - 12:54:07) EP852 CPU: MPC852TxxZPnn at 50 MHz [25.0...125.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present Board: EP852 (Rev. e4). CPLD Rev: 00 DIP Switch: 1111 DRAM: 16 MB Top of RAM usable for U-Boot at: 01000000 Reserving 354k for U-Boot at: 00fa7000 Reserving 128k for malloc() at: 00f87000 Reserving 60 Bytes for Board Info at: 00f86fc4 Reserving 56 Bytes for Global Data at: 00f86f8c Stack Pointer at: 00f86f68 New Stack Pointer is: 00f86f68 Now running in RAM - U-Boot at: 00fa7000 FLASH: Flash addr:ff800000 AMD_ID_LV320B selected. before print_size 8 MB In: serial Out: serial Err: serial U-Boot relocated to 00fa7000 Net: FEC ETHERNET ### main_loop entered: bootdelay=8 ### main_loop: bootcmd="<UNDEFINED>" => printenv bootargs bootargs=console=ttyS0,9600 root=/dev/ram => tftp 0x00200000 pImage Using FEC ETHERNET device TFTP from server 10.129.87.5; our IP address is 10.129.87.250 Filename 'pImage'. Load address: 0x200000 Loading: ################################################################# ########################################################### done Bytes transferred = 631143 (9a167 hex) => bootm 0x00200000 ## Booting image at 00200000 ... Image Name: Linux-2.4.21 Created: 2005-10-27 13:15:01 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 631079 Bytes = 616.3 kB Load Address: 00100000 Entry Point: 00100000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK before do_bootm_linux() argv = 16722772 addr = 16282928 ## Current stack ends at 0x00F86CA8 => set upper limit to 0x00800000 ## cmdline at 0x007FFF00 ... 0x007FFF20 No initrd ## Transferring control to Linux (at address 00100000) ... bi_memstart = 0 bi_memsize = 16777216 bi_flashstart = 4286578688 bi_flashsize = 8388608 bi_flashoffset = 343040 bi_sramstart = 0 bi_sramsize = 0 bi_immr_base = 4196401152 bi_bootflags = 1 bi_ip_addr = 176248826 bi_enetaddr[6] = bi_ethspeed = 114 bi_intfreq = 50000000 bi_busfreq = 50000000 bi_baudrate = 38400 // see the problem below The image was created with the following in arc/ppc/boot/Makefile : $(MKIMAGE) -A ppc -O linux -T kernel -C gzip -a 0x00100000 -e 0x00100000 \ -n 'Linux-$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)' \ -d $< images/vmlinux.PPCBoot ln -sf vmlinux.PPCBoot images/pImage The same kernel was working fine before with the epbootloader. the partitions i made in kernel MTD are: ff80_0000 ------- ff82_0000 -> boot ff82_0000 ------- ff8c_0000 -> zImage ff8c_0000 ------- ff2c_0000 -> ramdisk ff2c_0000 ------- ffff_ffff -> UserFS (JFFS2) Some of the #defines in EP852 configs are : #define CFG_SDRAM_SIZE (16 * MB) #define CFG_FLASH_BASE 0xFF800000 #define CFG_FLASH_SIZE (8 * MB) #define CFG_BSCR_BASE 0xFA400000 #define CFG_IMMR 0xFA200000 #define CFG_JFFS2_FIRST_SECTOR 56 what should i give here? #define CFG_PRELIM_OR_AM 0xFF800000 #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_BR0_PRELIM 0xFF800001 #define CFG_OR1_PRELIM 0xFF000600 #define CFG_BR1_PRELIM ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V ) #define CFG_BR3_PRELIM 0xFA400001 /* BCSR */ #define CFG_OR3_PRELIM 0xFF7F8970 #define CFG_BR4_PRELIM 0xFA000401 /* NVRAM&SRAM */ #define CFG_OR4_PRELIM 0xFFF80970 There is other minor(??) problem. When i set the value of CFG_SCCR to SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | SCCR_DFALCD00 u-boot works at CONFIG_BAUDRATE / 4 speed i.e if CONFIG_BAUDRATE = 9600 i've to set minicom/kermit to 2400 . Now when i set CFG_SCCR to 0x03020800 ( the value given by embedded planet config file) the baud rate works fine but the FEC doesnt work properly. It works __VERY__ slowly, i get errors in fec_recv() ( enabling ET_DEBUG) How do I make both ( FEC and baudrate ) work fine and also is this related to kernel not booting? Thanks in advance. ----------- We would change the world..... But GOD wont give the source code.

4 6

[U-Boot-Users] Suggestion on flash init
by Wang Jian 05 Jan '06

05 Jan '06

Hi, After reading many board/*/flash.c and writing customer board driver for one of my customer, I think the current flash interface can be improved. I suggest adding a subdir $(TOPDIR)/include/flash/ and putting flash chip information here. When you use some kinds of flash chips, just include relevant header files. If we go further, many information in $(TOPDIR)/include/flash.h can be put into these header files. And, even flash operation (non-CFI) sample code can be put into $(TOPDIR)/contrib/flash/. The following is an example of AMD Spansion S29AL016M chip. --snip-- #ifndef _FLASH_S29AL016M_H_ #define _FLASH_S29AL016M_H_ #define FLASH_S29AL016M_T_SECTORS 35 #define FLASH_S29AL016M_B_SECTORS 35 #define FLASH_S29AL016M_T_SIZE 0x00200000 #define FLASH_S29AL016M_B_SIZE 0x00200000 int FLASH_S29AL016M_T_BYTE_SA[] = { 0x000000, 0x010000, 0x020000, 0x030000, 0x040000, 0x050000, 0x060000, 0x070000, 0x080000, 0x090000, 0x0A0000, 0x0B0000, 0x0C0000, 0x0D0000, 0x0E0000, 0x0F0000, 0x100000, 0x110000, 0x120000, 0x130000, 0x140000, 0x150000, 0x160000, 0x170000, 0x180000, 0x190000, 0x1A0000, 0x1B0000, 0x1C0000, 0x1D0000, 0x1E0000, 0x1F0000, 0x1F8000, 0x1FA000, 0x1C0000 }; int FLASH_S29AL016M_T_WORD_SA[] = { 0x000000, 0x008000, 0x010000, 0x018000, 0x020000, 0x028000, 0x030000, 0x038000, 0x040000, 0x048000, 0x050000, 0x058000, 0x060000, 0x068000, 0x070000, 0x078000, 0x080000, 0x088000, 0x090000, 0x098000, 0x0A0000, 0x0A8000, 0x0B0000, 0x0B8000, 0x0C0000, 0x0C8000, 0x0D0000, 0x0D8000, 0x0E0000, 0x0E8000, 0x0F0000, 0x0F8000, 0x0FC000, 0x0FD000, 0x0FE000 }; int FLASH_S29AL016M_B_BYTE_SA[] = { 0x000000, 0x004000, 0x006000, 0x008000, 0x010000, 0x020000, 0x030000, 0x040000, 0x050000, 0x060000, 0x070000, 0x080000, 0x090000, 0x0A0000, 0x0B0000, 0x0C0000, 0x0D0000, 0x0E0000, 0x0F0000, 0x100000, 0x110000, 0x120000, 0x130000, 0x140000, 0x150000, 0x160000, 0x170000, 0x180000, 0x190000, 0x1A0000, 0x1B0000, 0x1C0000, 0x1D0000, 0x1E0000, 0x1F0000 }; int FLASH_S29AL016M_B_WORD_SA[] = { 0x000000, 0x002000, 0x003000, 0x004000, 0x008000, 0x010000, 0x018000, 0x020000, 0x028000, 0x030000, 0x038000, 0x040000, 0x048000, 0x050000, 0x058000, 0x060000, 0x068000, 0x070000, 0x078000, 0x080000, 0x088000, 0x090000, 0x098000, 0x0A0000, 0x0A8000, 0x0B0000, 0x0B8000, 0x0C0000, 0x0C8000, 0x0D0000, 0x0D8000, 0x0E0000, 0x0E8000, 0x0F0000, 0x0F8000 }; #endif --snip-- In flash_get_size() --snip-- switch (device) { case BYTEME(AMD_ID_S29AL016M_T): info->flash_id += FLASH_S29AL016M_T; info->sector_count = FLASH_S29AL016M_T_SECTORS; info->size = FLASH_S29AL016M_T_SIZE; break; case BYTEME(AMD_ID_S29AL016M_B): info->flash_id += FLASH_S29AL016M_B; info->sector_count = FLASH_S29AL016M_B_SECTORS; info->size = FLASH_S29AL016M_B_SIZE; break; --snip-- In flash_get_offset() --snip-- switch (info->flash_id & FLASH_TYPEMASK) { case FLASH_S29AL016M_T: for (i = 0; i < info->sector_count; i++) { info->start[i] = base + FLASH_S29AL016M_T_BYTE_SA[i]; } break; case FLASH_S29AL016M_B: for (i = 0; i < info->sector_count; i++) { info->start[i] = base + FLASH_S29AL016M_B_BYTE_SA[i]; } break; --snip-- -- lark

3 10

[U-Boot-Users] [PATCH] add support for DS1339 RTC
by Wang Jian 03 Jan '06

03 Jan '06

Hi, The attached patch add support for DS1339, which directly uses rtc/ds1337.c. CHANGELOG: * Add support for DS1339 RTC which uses rtc/ds1337.c -- lark

2 2

[U-Boot-Users] Re: stokehold councilman
by Nova Garett 31 Dec '05

31 Dec '05

VA CI VI XA LIU ALI AG NA M S RA X from $1.21 from $3.75 from $3.33 http://www.maanvare.com

1 0

[U-Boot-Users] about DS1339
by Wang Jian 30 Dec '05

30 Dec '05

Hi Wolfgang Denk, Since only difference between ds1339 and ds1337 is Trickle Charge register from software view, and currently u-boot doesn't use this register, can I send a doc & code patch which adds support for CONFIG_RTC_DS1339, or send a doc patch which states that CONFIG_RTC_DS1337 is for DS1337/1339? Regards -- lark

2 1

[U-Boot-Users] Error when updating local git repo
by llandre 30 Dec '05

30 Dec '05

Hi Wolfgang, I'm working with a local U-Boot repository that periodically is updated with your public one. I encountered the following error when trying to update it: [llandre@linuxserver u-boot-denx-dave]$ cg-update Recovering from a previously interrupted fetch... WARNING: The rsync access method is DEPRECATED and will be REMOVED in the future! Fetching head... receiving file list ... done .git/refs/heads/.origin-fetching sent 94 bytes received 144 bytes 158.67 bytes/sec total size is 41 speedup is 0.17 Fetching objects... receiving file list ... done sent 79 bytes received 47423 bytes 13572.00 bytes/sec total size is 23238354 speedup is 489.21 Fetching tags... receiving file list ... done sent 81 bytes received 1797 bytes 1252.00 bytes/sec total size is 5002 speedup is 2.66 Applying changes... Merging 0a69b26ed6fe3184cab86872589c27b076e6cb8e -> e6b6d16de73de6a76e2ec4338291e828b860f040 to 50ecf0766fb61883a94c4e703990cb3b5bc1bec1... ... Auto-merging CHANGELOG merge: warning: conflicts during merge ... Auto-merging MAINTAINERS ... Auto-merging MAKEALL ... Auto-merging Makefile ... Auto-merging board/amcc/bamboo/bamboo.c MERGE ERROR: File board/amcc/luan/u-boot.lds added in both branches, but different in each! MERGE ERROR: Conflicting versions saved as 'board/amcc/luan/u-boot.lds~master' and 'board/amcc/luan/u-boot.lds~origin'. ... Auto-merging board/amcc/yellowstone/yellowstone.c ... Auto-merging board/amcc/yosemite/yosemite.c MERGE ERROR: File board/esd/cms700/u-boot.lds removed in one branch but modified in the other! MERGE ERROR: The original version saved as 'board/esd/cms700/u-boot.lds~merge~base', the modified one as 'board/esd/cms700/u-boot.lds~origin'. MERGE ERROR: File board/prodrive/p3p440/u-boot.lds removed in one branch but modified in the other! MERGE ERROR: The original version saved as 'board/prodrive/p3p440/u-boot.lds~merge~base', the modified one as 'board/prodrive/p3p440/u-boot.lds~origin'. ... Auto-merging board/tqm834x/pci.c MERGE ERROR: File board/tqm85xx/u-boot.lds added in both branches, but different in each! MERGE ERROR: Conflicting versions saved as 'board/tqm85xx/u-boot.lds~master' and 'board/tqm85xx/u-boot.lds~origin'. ... Auto-merging cpu/ppc4xx/405gp_pci.c merge: warning: conflicts during merge ... Auto-merging cpu/ppc4xx/cpu.c merge: warning: conflicts during merge ... Auto-merging cpu/ppc4xx/spd_sdram.c ... Auto-merging cpu/ppc4xx/start.S ... Auto-merging include/configs/TQM5200.h ... Auto-merging include/configs/TQM834x.h ... Auto-merging include/configs/bamboo.h ... Auto-merging include/configs/o2dnt.h ... Auto-merging include/ppc440.h Conflicts during merge. Do cg-commit after resolving them. cg-reset will cancel the merge. What the following error messages mean? MERGE ERROR: File board/amcc/luan/u-boot.lds added in both branches, but different in each! MERGE ERROR: Conflicting versions saved as 'board/amcc/luan/u-boot.lds~master' and 'board/amcc/luan/u-boot.lds~origin'. MERGE ERROR: File board/esd/cms700/u-boot.lds removed in one branch but modified in the other! MERGE ERROR: The original version saved as 'board/esd/cms700/u-boot.lds~merge~base', the modified one as 'board/esd/cms700/u-boot.lds~origin'. Best regards, llandre DAVE Electronics System House - R&D Department web: http://www.dave-tech.it email: r&d2(a)dave-tech.it

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[U-Boot-Users] how to set env in u-boot to boot ramdisk?
by zhuzhenhua 30 Dec '05

30 Dec '05

i can run the kernel and ramdisk correct when i embedded ramdisk in kernel,and i use bootm can bootm them correctly. but if i make vmlinux and ramdisk as two image to bootm it get VFS panic can't find root device as follow is my use of mkimage mips_fp_le-objcopy -O binary -R .note -R.comment -S vmlinux linux.bin gzip -9 linux.bin ./mkimage -A mips -O linux -T kernel -C gzip -a 0x80008000 -e 0x80170040 -n "Linux" -d linux.bin.gz uImage ./mkimage -n 'Simple Initrd Image' -A mips -O linux -T ramdisk -C gzip -d initrd.bin initrd and i set bootargs root=/dev/ram0 and load uImage to 0x80600000, ramdisk.gz to 0x80700000 and then bootm 0x80600000 0x80700000 Best regards zhuzhenhua

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RE: [U-Boot-Users] mpc85xx FCC ethernet
by Ho Jeffrey-r26191 30 Dec '05

30 Dec '05

> My main question is: has anyone ever used FCC as ethernet on > u-boot for mpc85xx, and with what success? We do have FCC code running on u-boot with MPC8541E/55E. However at the moment they look really messy. If you want I can sent that to you in another email for a try. Regards, Jeffrey Ho

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[U-Boot-Users] [PATCH] Get rid of warnings in 48bit LBA support
by Rune Torgersen 29 Dec '05

29 Dec '05

CHANGELOG: * Remove some compiler warnings when using 32 bit blocknumbers in 48bit LBA mode (CONFIG_LBA48 set and CFG_64BIT_LBA not set) Patch by Rune Torgersen 29 Dec 2005

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[U-Boot-Users] Erros when building u-boot-1.1.4...
by James Chen (ꐏ┩�) 29 Dec '05

29 Dec '05

My host compiler is gcc-3.3.6, cross-compiler is arm-linux-gcc 3.4.1. Before I build u-boot for SMDK2410, I apply this patch: --- cpu/arm920t/config.mk (revision 4) +++ cpu/arm920t/config.mk (working copy) @@ -30,5 +30,5 @@ # Supply options according to compiler version # # ========================================================================= -PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,$(call cc-option,-mabi=apcs-gnu,)) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) Then, make distclean; make smdk2410_config; make all But I got this error message: arm-linux-gcc -g -Os -fno-strict-aliasing -fno-common -ffixed-r8 -msoft-float -malignment-traps -D__KERNEL__ -DTEXT_BASE=0x33F80000 -I/home/cyt/svnwork/u-boot/u-boot-1.1.4/trunk/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/local/arm/3.4.1/lib/gcc/arm-linux/3.4.1/include -pipe -DCONFIG_ARM -D__ARM__ -march=armv4 -mapcs-32 -Wall -Wstrict-prototypes -c -o stubs.o stubs.c arm-linux-ar crv libstubs.a stubs.o a - stubs.o make[1]: *** No rule to make target `hello_world.srec', needed by `all'. Stop. make[1]: Leaving directory `/home/cyt/svnwork/u-boot/u-boot-1.1.4/trunk/examples' make: *** [examples] Error 2 Any suggestions? Best Regards.

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RE: [U-Boot-Users] Timeout in ping and tftp
by Nuno João (Ext_NBS) 28 Dec '05

28 Dec '05

Are you sure that your board's MAC and IP addresses are unique? -----Original Message----- (...) I am testing my first u-boot and all went well until i tried to test ping and tftp network commands. When using these commands, i get timeout when receiving (all traffic is confirmed by ethereal). In tftp i have the same thing, but if i change the code so to ignore timeout it begins the file transfer. Within this transfer, at some point in time, the board sends a packet with strange IP and MAC addresses. From this point on the transfer speed decreases until there is a connection error. (...)

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[U-Boot-Users] Patch for ext2fs bug...
by Reinhard Arlt 28 Dec '05

28 Dec '05

Hallo, on 09/29/2005 John Roberts submits a warning on a bug in "ext2fs.c". Here is the patch as proposed by John Roberts. Reinhard diff -purN u-boot-1.1.4/fs/ext2/ext2fs.c u-boot_20051228/fs/ext2/ext2fs.c --- u-boot-1.1.4/fs/ext2/ext2fs.c 2005-12-16 17:39:27.000000000 +0100 +++ u-boot_20051228/fs/ext2/ext2fs.c 2005-12-28 11:28:40.000000000 +0100 @@ -389,7 +389,7 @@ int ext2fs_read_file int blockcnt; int log2blocksize = LOG2_EXT2_BLOCK_SIZE (node->data); int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS); - unsigned int filesize = node->inode.size; + unsigned int filesize = __le32_to_cpu(node->inode.size); /* Adjust len so it we can't read past the end of the file. */ if (len > filesize) { * Insert missing __le32_to_cpu() for filesize in ext2fs_read_file(). Patch by Reinhard Arlt, 28 Dec 2005.

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[U-Boot-Users] Error 139(TQM860L)
by 秦宇伟 28 Dec '05

28 Dec '05

Dear all: I am trying to build U-BOOT for TQM860L board.I entered the following command in sequence: $make TQM860L_config $make CROSS_COMPILE=powerpc-860-linux-gnu- ( The host PC I using is X86:Linux 2.6.11.2 The CROSS-TOOL was built by gcc 3.4.4 and glibc 2.3.5. ) The error message is /bin/sh: line 1: 16701 segment error; make: ***[u-boot] error 139 I want to know what's the matter? Thank you very much! Yours Sincerely, Yuwei Qin 　　　　　　　　yuwei_qin(a)photontec.com 　　　　　　　　　　2005-12-28

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[U-Boot-Users] How is the "ba 0xfff80000" located at 0xfffffffc ?
by 腾飞龙 28 Dec '05

28 Dec '05

As in Embedded Planet EP405 board, ppc405GPr processor support high boot only, when Power On or reset, the processor starts at 0xfffffffc and the code is executed from flash/rom. There is usually a branch instruction(such as: ba target) in 0xfffffffc so that it can jump to the target. For example, if i set TEXT_BASE=0xfff80000 in u-boot,it means the instruction "ba 0xfff80000" is in 0xfffffffc. My questions are follow: 1 where can i find the branch instruction "ba 0xfff80000" in u-boot-1.1.3 code? it seems it is not in start.s 2 As we know, before u-boot is written to flash the first time, there is nothing in flash. when we write u-boot in flash from addr 0xfff80000, how is the branch instruction written to addr 0xfffffffc which is not neigbour to u-boot code body? Thank you and best wishes!

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[U-Boot-Users] Timeout in ping and tftp
by Jose França (Ext_GTBC) 28 Dec '05

28 Dec '05

Hello! I am testing my first u-boot and all went well until i tried to test ping and tftp network commands. When using these commands, i get timeout when receiving (all traffic is confirmed by ethereal). In tftp i have the same thing, but if i change the code so to ignore timeout it begins the file transfer. Within this transfer, at some point in time, the board sends a packet with strange IP and MAC addresses. From this point on the transfer speed decreases until there is a connection error. Anyone have an idea of it might be? The board is based on a mpc8247, running at 100MHz (i have configured CFG_HZ 1000). My guess is that it might be something with my timers configuration. Thanks in advance! Filipe.

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[U-Boot-Users] which board supported by u-boot-1.1.3 is most similar to Embedded Planet EP405 ?
by 腾飞龙 27 Dec '05

27 Dec '05

I am porting u-boot-1.1.3 to Embedded Planet EP405 board(with ppc405GPr processor, 32M flash, 64M SDRAM) . The existed board AMCC walnut with ppc405GP processer seems simillar to Embedded Planet EP405 . However, is there another board supported by u-boot-1.1.3 is more similar to Embedded Planet EP405 ? Thank you in advance and happy new year !

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[U-Boot-Users] u-Boot 1.1.1 and 1.1.4 suspends
by Zhukov 26 Dec '05

26 Dec '05

Hello everybody, merry Christmas! ELDK 3.1 with u-Boot 1.1.1/1.1.4 (target - at91rm9200) give bad result (bin-file). The result suspends after the message: "Set PLLA to 180 MHz and Master CLock to 60 MHz and Start U-BOOT *' (The SAME compiler for u-boot 0.3.0/1.1.2 gives good results, and 1.1.2 proceeds after the start message)

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[U-Boot-Users] question
by Tyler Dillard 25 Dec '05

25 Dec '05

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[U-Boot-Users] [PATCH] Use ${CROSS_COMPILE} iso mips-linux- as cross-compile prefix
by Jean-Paul Saman 22 Dec '05

22 Dec '05

CHANGELOG * Building mips with a different cross-compiler (eg: mipsel-unknown-linux- from crosstools) then mips-linux- fails. The solution is to use the environment variable ${CROSS_COMPILE} instead of fixed cross-compiler "mips-linux-" prefix. Patch by Jean-Paul Saman, 21 Dec 2005. Kind greetings, Jean-Paul Saman Philips Semiconductors CTO/RTG Philips HighTech Campus, building WDA 3.29 Professor van den Holstlaan 4 5655 AA Eindhoven tel: +31 (0)40 27 45131

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[U-Boot-Users] Compiler version (continued)
by Zhukov 22 Dec '05

22 Dec '05

(See "Compiler Version" subject.) I've found the option (-mabi=apcs-gnu) in /cpu/arm920t/config.mk and removed it. The result line is #PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32) Now 'make all' with v3.1 cross compiler is OK, but... what does the option mean? Is it important?

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[U-Boot-Users] Compiler version
by Zhukov 22 Dec '05

22 Dec '05

Hello, dear colleages! Does arm-linux-gcc 3.1 fit to make u-Boot 1.1.4? I tried to build it for at91ar9200. While 'make all' arm-linux-gcc stoped at "unknown option -mabi=apcs-gnu", within /lib_generic subfolder. (This option looks like one for assembler, but not literally - 3.1 offers other options...) Who defines this option? Does redefinition make sense?

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[U-Boot-Users] help reqd
by prabha.j＠tcs.com 22 Dec '05

22 Dec '05

Hi all, I am having M29W040B flash. Is any driver is avaialble for this flash. I am using mpc8260 custom board. Thanks in advance. best regards Prabha J. Tata Consultancy Services Limited Mailto: prabha.j(a)tcs.com Website: http://www.tcs.com Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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[U-Boot-Users] LAN chip dead on ARM Integrator/CP board
by Umar Qureshey 22 Dec '05

22 Dec '05

Hi, I am using an ARM Integrator/CP board with u-boot 1.1.3. It's working well except that the ethernet interface never comes up. I don't see the link lights and a "dhcp" command results in: SMC91111: PHY auto-negotiate timed out *** ERROR: ethaddr is not set properly!! I compiled u-boot using the integrator cp config file. I have modified it somewhat to include some extra commands but the network portion remains the same. Also, the docs for the board state that the board has a LAN91C111 ethernet chip. Anyone encontered this issue? I did not find anything in list archives. Regards, umar

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[U-Boot-Users] Enable proper ramdisk support in OMAP5912OSK defconfig
by George G. Davis 21 Dec '05

21 Dec '05

Greetings, Please apply: Index: u-boot/include/configs/omap5912osk.h =================================================================== --- u-boot.orig/include/configs/omap5912osk.h +++ u-boot/include/configs/omap5912osk.h @@ -52,6 +52,7 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */ /* * Size of malloc() pool TIA! -- Regards, George

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[U-Boot-Users] [PATCH]Fix cc-option macro in config.mk
by Paolo Broggini 21 Dec '05

21 Dec '05

The following patch fix the compilation problem discussed in thread "Problem building U-Boot for ARM target" Best regards -P.Broggini Signed-off-by: Paolo Broggini <pbroggini(a)softool.ch> CHANGELOG: Fix cc-option macro in config.mk, $(CFLAGS) dropped. Patch by Paolo Broggini, 12 Oct 2005 diff --git a/config.mk b/config.mk --- a/config.mk +++ b/config.mk @@ -90,7 +90,7 @@ HOSTSTRIP = strip # Option checker (courtesy linux kernel) to ensure # only supported compiler options are used # -cc-option = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \ +cc-option = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null \ > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;) #

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[U-Boot-Users] [PATCH] Fix Integrator/AP support
by Jean-Paul Saman 21 Dec '05

21 Dec '05

CHANGELOG: * FIx Integrator/AP support - include/armcoremodule.h: Automatic detection of SDRAM sizes (CONFIG_CM_SPD_DETECT) doesn't work on ARM Integrator/AP, so make sure it is undef'ed for CONFIG_ARCH_INTEGRATOR. - include/configs/integratorap.h: The rootfilesystem is typically placed as 2nd image in the flash. Therefor CONFIG_BOOTARGS is by default set to: root=/dev/mtdblock2 rootfstype=jffs2 instead of root=/dev/mtdblock0 - include/configs/integratorap.h: All defines also present in armcoremodule.h are removed from integratorap.h. Patch by Jean-Paul Saman, 21 Dec 2005. Kind greetings, Jean-Paul Saman Philips Semiconductors CTO/RTG Philips HighTech Campus, building WDA 3.29 Professor van den Holstlaan 4 5655 AA Eindhoven tel: +31 (0)40 27 45131

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[U-Boot-Users] Disable internal PCI arbiter
by Martin Egholm Nielsen 21 Dec '05

21 Dec '05

Hi, How do I disable the internal PCI arbiter: --- 8< 8< 8< --- PCI async ext clock used, internal PCI arbiter enabled --- 8< 8< 8< --- I hoped disabling CFG_CMD_PCI would do it, but no?! BR, Martin Egholm

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[U-Boot-Users] question about ep7312 boot
by xiaojun chen 21 Dec '05

21 Dec '05

hi, below is the code segment from /u-boot-1.1.3/cpu/arm720t/start.s if i can add these code and compile , i can not boot my board and after my delete these code, My board boot successfully. what's meaning about these code? are there some bug in it ? .... #if TEXT_BASE ldr r2, =0x0 /* Relocate the exception vectors */ cmp r1, r2 /* and associated data to address */ ldmneia r0!, {r3-r10} /* 0x0. Do nothing if TEXT_BASE is */ stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */ ldmneia r0, {r3-r9} stmneia r2, {r3-r9} adrne r0, _start /* restore r0 */ #endif ... _________________________________________________________________ FREE pop-up blocking with the new MSN Toolbar - get it now! http://toolbar.msn.click-url.com/go/onm00200415ave/direct/01/

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[U-Boot-Users] New Yosemite (ppc440ep) sdram initiation.
by André Berggren 20 Dec '05

20 Dec '05

Hello! I have seen that the sdram initiation on Yosemite board has been changed lately. We have some memory problems on our custom board based on Bamboo. We are using the Yosemite initdram function but added a call to spd_sdram(). This helped a bit, but not all the way. What are the benefits of using the sdram_tr1_set() instead of the alredy existing spd_sdram()? Regards, Andre ########################################### This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange. For more information, connect to http://www.f-secure.com/

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[U-Boot-Users] U-boot FAT file system
by Robert Yu 20 Dec '05

20 Dec '05

Hi Wolfgang I want to build a FAT16 file system on flash of pxa255 idp. The partition map is as follow: -------------------------------------- | u-boot | FAT fs | unused | -------------------------------------- What procedure and what tools should be used for FAT. I have a procedure example for jffs using mkfs.jffs. May I use mkfs.vfat for FAT16 with u-boot on flash? Do I need some special tools? I checked the u-boot v1.1.3 source code. The FAT file system code is there. But how do I to use it? Thanks Robert Yu

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[U-Boot-Users] Order for U-boot-users
by Esteban Mercer 20 Dec '05

20 Dec '05

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[U-Boot-Users] subscribe
by Levy, Ronen 19 Dec '05

19 Dec '05

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[U-Boot-Users] [Patch] Fix CONFIG_SKIP_LOWLEVEL_INIT build for at91rm9200dk
by Frank Mandarino 19 Dec '05

19 Dec '05

Hi, I just finished upgrading our AT91RM9200-EK to U-Boot 1.1.4. I defined CONFIG_SKIP_LOWLEVEL_INIT since I was only upgrading the second stage of Atmel's two-stage bootloader process. I had to make changes to two files as shown in the attached patch. The first was to #ifndef out the cpu_init_critical function in cpu/arm920t/start.S to avoid a undefined reference to lowlevel_init. The second was to change two #ifdef statements to #ifndef in include/configs/at91rm9200dk.h as in both cases the else-part matches the configuration used by Atmel. Regards, ../fam -- Frank Mandarino Endrelia Technologies Inc. Toronto, Ontario, Canada

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[U-Boot-Users] Information about Uboot porting
by eagle keeper 19 Dec '05

19 Dec '05

Hi all, I'd like to ask for a guide-line. I have to port u-boot to a ppc board based on mpc860p, but this board has not bcsr. I have seen in the code that Uboot enables ethernet rs232 and sdram using bcsr. How can I enable RS232, ethernet and sdram without bcsr? Is there a somehow standard way to procede? Thanks in advance Emanuele PS: Of course I am not asking for the implementation, but only for a procedure.

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[U-Boot-Users] U-Boot-1.1.4 released
by Wolfgang Denk 19 Dec '05

19 Dec '05

FYI: I just released U-Boot version 1.1.4. Please see below for the list of changes since the previous "official" release (U-Boot 1.1.3). NOTE: this is the last release of U-Boot with full support of the CVS repository at SourceForge. U-Boot development has been switched from CVS to git as primary SCM system. CVS support may be dropped in the near future (at the moment the CVS repository still gets updated for backup purposes). For details hot to access the git repository please see http://www.denx.de/en/Software/GIT or browse it online at http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git Major changes in U-Boot 1.1.4: * Support for new CPUs: AMCC 440SP ARM 946E NetSilicon NS7520 * Support for new boards: AMCC Luan 440SP AMD Pb1x00 AP1000 Armadillo HT1070 Barco SCN Barco SVC Cogent csb637 esd CMS700 esd CPCI2DP esd cpci5200 esd pf5200 IFM o2dnt KwikByte KB920x MP2USB Sandburst Karef Sandburst Metrobox Silicon Turnkey eXpress XTc TQ Components TQM834x TQ Components TQM8541 TQ Components TQM8555 Vibren PXA255 IDP * Support for GCC-4.x * Support for multiple PHYs * Support for passing Open Firmware flat trees to the Linux kernel * Generic 4xx_enet.c driver for all 4xx CPUs * Uniform support for all AMCC eval boards * Xilinx Spartan3 family FPGA support * Major cleanup ARM Integrator boards * Changed all '$(...)' variable references into '${...}' ====================================================================== Changes for U-Boot 1.1.4: ====================================================================== * Changes to Yellowstone & Yosemite 440EP/GR eval boards: - Changed GPIO setup to enable another address line in order to address 64M of FLASH. - Added function sdram_tr1_set to auto calculate the tr1 value for the DDR. Patch by Steven Blakeslee, 12 Dec 2005 * MPC5200: Set PCI retry counter to 0 = infinite retry; The default of 255 is too short for slow devices. Patch by Martin Nykodym, 12 Dec 2005 * Change port configuration for O2DNT (CODEC1 on PSC1). * Fix register for PCI async mode on PPC440EP Patch by Youngchul Bang, 08 Dec 2005 * Fix U-Boot linking problems (add .eh_frame segment to linker script) This segment may be required by some libgcc.a functions (like _udivdi3). * Fix DPRAM offset/size for MPC8541/8555. Simplify TQM85xx Makefile handling. * Fix data overflow (typo?) in rtc/ds1302.c * Fix U-Boot compilation for MIPS boards using ELDK 4.0 * Add support for TQM8541/8555 boards, TQM85xx support reworked: - Support for TQM8541/8555 boards added. - Complete rework of TQM8540/8560 support. - Common TQM85xx code now supports all current TQM85xx platforms (TQM8540/8541/8555/8560). - DDR SDRAM size detection added. - CAS latency default values can be overwritten by setting "serial#" to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used. If problems are detected with this non default CAS latency, the default values will be used instead. - Flash size detection added. - Moved FCC ethernet driver initialization behind TSEC driver init -> TSEC is first device. Patch by Stefan Roese, 30 Nov 2005 * Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board. Patch by John Otken, 23 Nov 2005 * Changed PPC44x startup message (cpu info, speed...) to common style: On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional information like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005 * Adjust TQM834x PHY addresses for latest hardware revision. * Increase malloc arena on TQM5200 board to 256 kB. With 64 kb uniform flash sector size the old value of 128 kB was too small. * Fix miiphy global data initialization (problem on 4xx boards when no ethaddr is assigned). Initialization moved from miiphy_register() to eth_initialize(). Based on initial patch for 4xx platform by Matthias Fuchs. * Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.h * Allow use of include/image.h and include/asm-*/u-boot.h in proprietary code. The COPYING file was extended to make clear that these files can be used in non-GPL code, too. Also, a corresponding note was placed in the headers of the affected files. * Add support for Prodrive P3P440 board: - Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c - CFG_FLASH_QUIET_TEST added to use the common CFI driver for bank autodetection Patch by Stefan Roese, 22 Nov 2005 * Change all '$(...)' variable references into '${...}' which makes the environment compatible with the hush shell. WARNING: Support for the old '$(...)' syntax will be discontinued in a later version. * Minor changes to init flags in TQM834x PCI. * Fix Bamboo DDR SDRAM initialization (problem with onboard SDRAM) Patch by Stefan Roese, 15 Nov 2005 * New PPC 405EP board added: CMS700 Added CONFIG_NET_MULTI for VOM405 board. Added reset_phy() for VOM405 board. Patch by Matthias Fuchs, 09 Nov 2005 * Updated PCI mapping for esd CPCI2DP board. Add support for error LED. Patch by Matthias Fuchs, 07 Nov 2005 * Fix MPC85xx PCI support (pci_register_hose() before pci config access) Patch by Stefan Roese, 07 Nov 2005 * Correct PPC Timebase register definitions (SPRN_TBRL...) Patch by Stefan Roese, 07 Nov 2005 * Adjust bd->bi_flashstart on Yellowstone & Yosemite to correct size Patch by Stefan Roese, 05 Nov 2005 * Additional fix for external IRQ config on Yellowstone & Yosemite Patch by Stefan Roese, 03 Nov 2005 * Add support for Ocotea pass 3 with 440GX Rev. F Patch by Stefan Roese, 01 Nov 2005 * Fix external IRQ configuration on Yellowstone & Yosemite Patch by Stefan Roese, 28 Oct 2005 * Add support for multiple PHYs. Tested on the following boards: cmcpu2 (at91rm9200/ether.c) PPChameleon (ppc4xx/4xx_enet.c) yukon (mpc8220/fec.c) uc100 (mpc8xx/fec.c) tqm834x (mpc834x/tsec.c) with EEPRO100 lite5200 (mpc5xxx/fec.c) with EEPRO100 card (drivers/eepro100.c) Main changes include: common/miiphyutil.c - miiphy_register routine was added to allow multiple PHYs to be registered - miiphy_read and miiphy_write are now defined in this file, and require additional argument (char *devname) - other miiphy_* routines also require additional device name argument ../lib_i386/board.c ../lib_ppc/board.c Calling reset_phy() was moved to be executed *after* eth_initialize(). This is necessary as now some of the implementations of reset_phy() may need to use miiphy_reset() which is not allowed before eth_initialize() as eth_initialize registers all required miiphy_* routines. Tested on IP860 and PHY initializes properly after this change. * Correct includes for flat tree builder. * Fix conflicting types (flash_write()) in trab auto_update.c. * Add PCI support for the TQM834x board. * Add missing 4xx board to MAKEALL Patch by Stefan Roese, 20 Oct 2005 * Fix conflicting types (flash_write()) in esd auto_update.c Patch by Stefan Roese, 20 Oct 2005 * Fix problem with sleep in NetConsole (use get_timer()) Patch by Stefan Roese, 20 Oct 2005 * Add NetConsole Support for AMCC eval boards Patch by Stefan Roese, 20 Oct 2005 * Fix NetConsole support on 4xx (only print eth link on 1st transfer) Patch by Stefan Roese, 18 Oct 2005 * Add fat & ext2 support to AMCC 440EP boards Yosemite & Bamboo. Fix identation on ext2ls help entry. Patch by Stefan Roese, 14 Oct 2005 * Add support for TQM834x boards. Cleanup. * Cleanup for GCC-4.x * Add documentation for Open Firmware Flat Tree and usage. Patch by Pantelis Antoniou, 13 Oct 2005 * Add missing files for Pantelis Antoniou's patch Patch by Pantelis Antoniou, 04 Sep 2005 * Fix problem in ppc4xx eth-driver without ethaddr (only without CONFIG_NET_MULTI set) Patch by Stefan Roese, 10 Oct 2005 * Fix gzip bmp support (test if malloc fails, warning when truncated). Increase CFG_VIDEO_LOGO_MAX_SIZE on HH405 board. Patch by Stefan Roese, 07 Oct 2005 * Add support for OF flat tree for the STXtc board. Patch by Pantelis Antoniou, 04 Sep 2005 * Support passing of OF flat trees to the kernel. Patch by Pantelis Antoniou, 04 Sep 2005 * Cleanup * Add support for NetSilicon NS7520 processor. Patch by Art Shipkowski, 12 May 2005 * Add support for AP1000 board. Patch by James MacAulay, 07 Oct 2005 * Eliminate hard-coded address of Ethernet transfer buffer on at91rm9200 Patch by Anders Larsen, 07 Oct 2005 The Atmel errata #11 states that the transfer buffer descriptor table must be aligned on a 16-word boundary. As it turned out, this is insufficient - it seems the table must be aligned on a boundary at least as large as the table itself (in Linux this is not an issue - the table is aligned on a PAGE_SIZE (4096) boundary). * Fixed compilation for ARM when using a (standard) hard-FP toolchain Patch by Anders Larsen, 07 Oct 2005 * Cleanup warnings for cpu/arm720t & cpu/arm1136 files. sed the linker scripts, rather than pre-process them. Patch by Peter Pearse, 07 Oct 2005 * Update make target for ARM supported boards. Use lowlevel_init() instead of platformsetup() [rename]. Patch by Peter Pearse, 06 Oct 2005 * Fix booting from serial dataflash on AT91RM9200 Patch by Peter Menzebach, 29 Aug 2005 * Add JFFS2 support for TRAB board Patch by Martin Krause, 25 Aug 2005 * Remove unnecessary dependency of netconsole on CONFIG_NET_MULTI Patch by Marcus Hall, 24 Aug 2005 * Fix the machine-id of the Cogent csb637 board Patch by Anders Larsen, 05 Oct 2005 * Complete support for the KwikByte KB920x boards Patch by Anders Larsen, 05 Oct 2005 * Set the AT91RM9200 clock to asynchronous mode Patch by Anders Larsen, 03 May 2005 * Set the AT91RM9200 clock to synchronous mode Patch by Anders Larsen, 29 Apr 2005 * Add support for Cogent csb637 Patch by Anders Larsen, 29 Apr 2005 * Fix dm9161.c initialization Patch by Anders Larsen, 29 Apr 2005 * Fix problems introduced by Patch by Steven Scholz, 02 Mar 2005 (8e2be51de8dd03c1ce4d06cbb18ad06133d47cd5) * Move dm9161.c and lxt972.c into cpu/arm920t/at91rm9200 Patch by Anders Larsen, 29 Apr 2005 * Fix device partition intialization for SystemACE disks. Patch by Stephen Williams, 28 Apr 2005 * Added support for KwikByte KB920x boards (based on AT91RM9200) Patch by Matt ?? <kb9200_dev(a)kwikbyte.com>, 27 Apr 2005 * Add support for S29GL064M-R3 flash chip on xsengine board Patch by Kurt Stremerch, 18 Apr 2005 * E500 update: repoint IVPR to RAM when code is relocated Patch by Kylo Ginsberg, 13 Apr 2005 * Fix loop end test in lib_generic/string.c:strswab() Patch by Andrew Dyer, October 10, 2005 Signed-off-by: Andrew Dyer <amdyer(a)gmail.com> * Cleanup * Update ARM Integrator boards: Correct addessing errors in platform files. Split off common core module data from Integrator header files to include/armcoremodule.h. Patch by Peter Pearse, 04 Oct 2005 * Make sure only supported compiler options are used Import "cc-option" shell function from kernel and use it to get the correct ARM GCC options for individual CPUs Patch by Peter Pearse, 30 Jun 2005 * Fix 440GR to print correct cpu revision Patch by Stefan Roese, 04 Oct 2005 * Change board message on AMCC Yosemite & Yellowstone to common style Patch by Stefan Roese, 03 Oct 2005 * Fix compiler warning * Fix FEC PHY addresses for TQM85xx boards * Fix uninitialized variable problem in hush shell Patch by Lars Rostock, 26 Sep 2005 * Undo change of f6e20fc6ca... to include/configs/trab.h (Must have been an accident?) * Add support for AT91RM9200 OHCI Controller. Patch by Eric Benard, 07 Apr 2005 * Update ARM mach-types.h Patch by Eric Benard, 07 Apr 2005 * Add support for MP2USB board. Patch by Eric Benard, 07 Apr 2005 * Add board support for armadillo HT1070 Patch by Rowel Atienza, 06 Apr 2005 * Second Ethernet address enabled for MPC885ADS and MPC8272ADS. Patch by Vitaly Bordug, 30 Mar 2005 * Add iopset command on mpc8xx Patch by Daniel Eisenhut, 25 Mar 2005 * Add support for MII in eepro100 driver. Patch by Gleb Natapov, 21 Mar 2005 * Fixes to the Lubbock (PXA 25x) support: - Resolve the FIXME with respect to saving the u-boot environment. - Make the default load address land in real memory. - Fix lan91c96 SMC_{in,out}{b,w,l}() macros Patch by David Brownell, 10 Mar 2005 * Add Barco Streaming Video Card (SVC) and Sample Compress Network (SCN) board Patch by Marc Leeman, 04 Mar 2005 * OMAP242x H4 board update - fix for ES2 differences. - switch to using the cfi_flash driver. - fix SRAM build address. - fix for GP device operation. - unlock SRAM for GP devices. - display more device information. - fix potential deadlock in omap24xx_i2c driver. - fix DLL load values to match dpllout*1 operation. - fix 2nd chip select init for combo DDR device. - add support for CFI Intel 28F256L18 on H4 board. Patch by Richard Woodruff, 03 Mar 2005 * Fix formating in include/asm-arm/arch-at91rm9200/AT91RM9200.h Patch by Steven Scholz, 02 Mar 2005 * Fix typo in eth.c Patch by Ara Avanesyan, 24 Feb 2005 * Remove unneeded #include <malloc.h> Patch by Ladislav Michl, 22 Feb 2005 * Add cramfs support for m68k Patch by Zachary Landau, 21 Feb 2005 * Update ep8260: Fix flash timeouts; improve clock resolution for faster UARTs Patch by Jeff Angielski, 21 Feb 2005 * Fix au1x00_serial baud rate calculation: remove hardcoded cpu clock divisor and use register instead; round up instead of truncate Patch by Andrew Dyer, 15 Feb 2005 * Add Xilinx Spartan3 family FPGA support Patch by Kurt Stremerch, 14 Feb 2005 * Fix drivers/cfi_flash.c: use info->reset_cmd instead of FLASH_CMD_RESET Patch by Zachary Landau, 11 Feb 2005 * Fix VOH405 Support Patch by Matthias Fuchs, 25 Sep 2005 * Added support for PCI bridge on MPC8272ADS Patch by Vitaly Bordug, Feb 09 2005 * Update multicore CM9XX support for Integrator AP to allow booting from flash Patch by Jean-Paul Saman, 8 Feb 2005 * Fix strswab() to reliably find end of string Patch by Andrew Dyer, 08 Feb 2005 * Fix typos in include/ppc440.h Patch by Andrew E Mileski, 04 Feb 2005 * Add Vibren (was Accelent) PXA255 IDP Support Patch by Cliff Brake, 04 Feb 2005 * Fix tools/bmp_logo.c using incorrect offset to pixel data Patch by Andrew Dyer, 31 Jan 2005 * Add ARM946E cpu and core module targets; remap memory to 0x00000000 Patch by Peter Pearse, 2 Feb 2005 * Fix error handling in tools/env/fw_env.c Patch by Ara Avanesyan, 01 Feb 2005 * Fix MGT5100 PSC baudrate calculation Patch by Sebastian Schau, 27 Jan 2005 * OMAP242x fix for GP device booting - Add SRAM unlock for GP devices. - Change DDR DLL unlock value to allow DPLLout*1 operation. Patches by Richard Woodruff, 21 Jan 2005: * Add support for AMD's Pb1x00 eval board; add MII routines to the au1x00 ethernet driver; add USB ohci driver (work in progress) Patch by Thomas Sailer, 20 Jan 2005 * Update omap5912osk board Use drivers/cfi_flash.c instead of private flash driver; Remove hardcoded personalized settings from omap5912osk.h; Fix spacing with (RO) marks in 'flinfo' output. Patch by Michael Bendzick, 14 Jan 2005 * Fix warnings for PCI code on ixp Patch by Joe <lgxue(a)yahoo.com>, 13 Jan 2005 * virtex2 fix for bogus download error messages The virtex2 FPGA download code watches for init going active during a download of config data as an error condition. init also goes active after a configuration is finished in concert with the done signal. So far, the code does not check for done active until all of the configuration data is sent. If configuration data has a few extra pad bytes at the end, this would cause an error message even though the download had suceeded. NOTE: virtex2 slave serial and spartan2 versions may still have the same problem. Patch by Andrew Dyer, 12 Jan 2005 * Optimize flash_make_cmd in drivers/cfi_flash.c for little endian Fix "WARNING: flash_make_cmd: unsuppported LittleEndian mode" message when probing for nonexistent flash in little endian mode. As a side effect more efficient and smaller code is generated, which is always a Good Thing (TM). Patch by Ladislav Michl, 24 Sep 2005 * Update for TFTP using a fixed UDP port Use the approved environment variable names. Added "tftpdstp" to allow ports other than 69 per Tolunay Orkun's recommendation. Patch by Jerry Van Baren, 12 Jan 2005 * Allow to force TFTP to use a fixed UDP port (Add a configuration option CONFIG_TFTP_PORT and optional env variable tftpport) Patch by Jerry Van Baren, 10 Jan 2005 * Fix ethernet timeouts on dbau1550 and other au1x00 systems Patch by Leif Lindholm, 29 Dec 2004 * Cleanup: fix broken builds * Fix PHY address argument passing with mii info command Patch by Andrew Dyer, 28 Dec 2004 * Cleanup (PPC4xx is AMCC now) * esd CPCI2DP board added Patch by Matthias Fuchs, 22 Sep 2005 * esd PMC405 board updated Patch by Matthias Fuchs, 22 Sep 2005 * Add SM501 support to HH405 board. Add support for gzip compressed bmp's (CONFIG_VIDEO_BMP_GZIP). Add support for eeprom write-enable (CFG_EEPROM_WREN). Patch by Stefan Roese, 22 Sep 2005 * Fix autonegotiation in tsec ethernet driver Patch by Stefan Roese, 21 Sep 2005 * Fix bug in auto_update (trab board) Patch by Martin Krause, 16 Sep 2005 * Fix computation of framebuffer palette for 8bpp LCD bitmaps Patch by Francesco Mandracci, 16 Sep 2005 * Update configuration for INKA4x0 board * Update configuration for PM854 board Based on patch by R. Loeffl, 20 Jul 2005 * Add PCI support to TQM8540 and TQM8560 boards Patch by Stefan Roese, 15 Sep 2005 * Update AMCC Yosemite to get a consistent setup for all AMCC eval boards (baudrate, environment...). Flash driver fixed. Patch by Stefan Roese, 15 Sep 2005 * Fix problem in 440GP ethernet driver (ebony). Add support for 2nd ethernet port on ebony. Patch by Stefan Roese, 7 Sep 2005 * Added support for mtddevnum and mtddevname variables (mtdparts command) * Change default console baud rate for stxxtc board * Add I2C support to TQM8540 and TQM8560 boards (EEPROM, RTC, LM75-DTT). Patch by Stefan Roese, 31 Aug 2005 * Fix default command set (don't include CFG_CMD_DISPLAY command) Patch by Pantelis Antoniou, 02 Sep 2005 * Cleanup * Enable SM712 driver support for HMI1001 board. * Fix problems with ld version 2.16 (dot outside sections problem) Pointed out by Gerhard Jaeger, 31 Aug 2005; cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html * Prepare U-Boot for gcc-4.x: fix global data pointer initialization * Adjust CS3 timings on HMI1001 board for dot matrix display under Linux * Add keyboard and dot matrix display support for HMI1001 board. * Prepare U-Boot for gcc-4.x * Fixed Bamboo port to enable running without DDR-DIMM (Bamboo has also 64MB onboard DDR) Patch by Stefan Roese, 24 Aug 2005 * Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c now handling all 4xx cpu's Patch by Stefan Roese, 16 Aug 2005 * Fix make dependencies for at91rm9200 and ks8695 cpus Patch by Steven Scholz, 23 Aug 2005 * Add JFFS2 support for TQM5200 board * Add esd cpci5200 and pf5200 boards Patch by Reinhard Arlt, 22 Aug 2005 * Fix sysclock for TQM8540 and TQM8560 boards Patch by Martin Krause, 25 Jul 2005 * Initialize serial# and ethaddr from manufacturer data in EEPROM on CMC-PU2 Patch by Martin Krause, 08 Jun 2005 * Add new board specific commands for TQM5200/STK52XX - Sound commands (beep, wav, sound) - Test commands (led, can, backlight, rs232) Patch by Martin Krause, 02 May 2005 * Change main clock on CMC-PU2 board from 207 MHz to 179 MHz because of a bug in the AT91RM9200 CPU PLL Patch by Martin Krause, 22 Apr 2005 * Add automatic HW detection for another CMC_PU2 variant Patch by Martin Krause, 20 Apr 2005 * Remove CONFIG_AT91RM9200DK in CMC-PU2 configuration Patch by Martin Krause, 19 Apr 2005 * Fix initialization problem on TQM5200 without SM501 Patch by Martin Krause, 08 Apr 2005 * Add RTC support for STK52XX.200 Patch by Martin Krause, 07 Apr 2005 * Add support for IFM o2dnt board * Enable PCI on hmi1001 board * Fix return values of the jffs2 commands ls/fsload/fsinfo, so we can use them to, e.g., check the existence of a file with "if ls foo; then this; else that; fi" in the hush shell Patch by Andreas Engel, 16 August 2005 * Coding style cleanup * Add support for Silicon Turnkey eXpress XTc (mpc87x/88x) board. Patch by Dan Malek and Pantelis Antoniou, 15 Aug 2005 * Check return value of malloc in 440gx_enet.c Patch by Travis B. Sawyer, 18 Jul 2005 * Add Sandburst Metrobox and Sandburst Karef board support packages. Second serial port on 440GX now defined as a system device. Add 'Short Etch' code for Cicada PHY within 440gx_enet.c Patch by Travis B. Sawyer, 12 Jul 2005 Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de No, I'm not going to explain it. If you can't figure it out, you didn't want to know anyway... :-) - Larry Wall in <1991Aug7.180856.2854(a)netlabs.com>

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RES: [U-Boot-Users] Help with PCI using NPe405H
by Sugeno, Otavio Isamu 19 Dec '05

19 Dec '05

Hi Stefan. Thanks for your answer. I though NPe405H was supported by u-boot. Anyway. Yes, I enable the pci debug, I saw the Pci Autoconfig messages (Mem and I/O adrresses), but when u-boot scan the bus, to find any device, it stops in those functions. I am using BDI2000, but unfortunatelly I do not have the bdiGDB package. We will buy it as soon as possible. So I have no way to configure PCI interface by hand. Could you explain me how it is made PCI bus scan? Basically the function pci_hose_read_config_byte(). How it is read the HEADER_TYPE for example, is it made by I2C or data bus, acessing direct processor registers? Regards. Otavio I. Sugeno Information & Communication Com EN PSY DA Phone: +55 41 341-5883 Fax: +55 41 341-5594 email: otavio.sugeno(a)siemens.com Siemens Brasil 2005 * 100 ANOS -----Mensagem original----- De: Stefan Roese [mailto:sr@denx.de] Enviada em: sexta-feira, 16 de dezembro de 2005 15:58 Para: u-boot-users(a)lists.sourceforge.net Cc: Sugeno, Otavio Isamu Assunto: Re: [U-Boot-Users] Help with PCI using NPe405H Hi Otavio, On Friday 16 December 2005 16:30, Sugeno, Otavio Isamu wrote: > I am having some problems to configure PCI interfcace in the NPe405H > processor. Have anyone already ported u-boot to it? Not that I am aware of. No NPe405x support has been published officially. > Basically, the problem happens when u-boot tries to scan the bus. > Function pci_hose_scan_bus tries to read a byte (Header Type) and a word > (Vendor ID) but it does not return anymore from this function. > Can anyone help me. Not easy with that amount of information. Did you enable the debug output in the pci code? Did you try to do a pci config cycle by hand? Best regards, Stefan

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[U-Boot-Users] Banned file: document.pif in mail from you
by MAILER DAEMON 19 Dec '05

19 Dec '05

BANNED FILENAME ALERT Your message to: jean-philippe.moreno(a)rfo.atmel.com was blocked by our Spam Firewall. The email you sent with the following subject has NOT BEEN DELIVERED: Subject: Error An attachment in that mail was of a file type that the Spam Firewall is set to block.

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[U-Boot-Users] Help with PCI using NPe405H
by Sugeno, Otavio Isamu 16 Dec '05

16 Dec '05

Hi everybody. I am having some problems to configure PCI interfcace in the NPe405H processor. Have anyone already ported u-boot to it? Basically, the problem happens when u-boot tries to scan the bus. Function pci_hose_scan_bus tries to read a byte (Header Type) and a word (Vendor ID) but it does not return anymore from this function. Can anyone help me. Regards Otavio I. Sugeno

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[U-Boot-Users] Freezing & Unfreezing the au11000
by Rodolfo Giometti 16 Dec '05

16 Dec '05

I'm just trying to support the save_and_sleep() support into u-boot for an au1100 based board. Into u-boot I added the following code: Index: cpu/mips/start.S =================================================================== RCS file: /home/develop/cvs_private/uboot-mips-exadron/cpu/mips/start.S,v retrieving revision 1.2 diff -u -r1.2 start.S --- cpu/mips/start.S 12 Oct 2005 12:55:54 -0000 1.2 +++ cpu/mips/start.S 16 Dec 2005 15:29:22 -0000 @@ -26,6 +26,7 @@ #include <config.h> #include <version.h> #include <asm/regdef.h> +#include <asm/au1x00.h> #include <asm/mipsregs.h> @@ -273,6 +274,33 @@ li t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG + /* Now check the wakeup cause + */ + li t0, SYS_WAKESRC + lw t1, 0(t0) + andi t1, t1, 0x00000002 /* check the SW bit */ + beq zero, t1, 1f + nop + + li t0, SYS_SCRATCH0 + lw t1, 0(t0) + move sp, t1 + li t0, SYS_SCRATCH1 + lw t1, 0(t0) + j t1 /* this cause a jump into already + nop frozen Linux (brr! :) */ + + /* If we reach this point we come from a normal system power up, + so just clear the wakeup cause registers + */ + +1: li t0, SYS_WAKEMSK + li t1, 0x00000000 + sw t1, 0(t0) + + li t0, SYS_WAKESRC + li t1, 0x00000000 + sw t1, 0(t0) /* Set up temporary stack. */ in order to restore the scratch registers contents as descibed into file "linux/arch/mips/au1000/common/sleeper.S": /* Now set up the scratch registers so the boot rom will * return to this point upon wakeup. */ la k0, 1f lui k1, 0xb190 ori k1, 0x18 sw sp, 0(k1) ori k1, 0x1c sw k0, 0(k1) However it seems something is wrong since the system at the end of save_and_sleep() does not correctly continue its execution... Unlikely my JTAG do not allow me to follow the code after the save_and_sleep()'s return (I definitely have to buy a better one), however I noticed that when the system tryes to resume the register 29 (the sp) doing: lw $29, PT_R29(sp) something goes wrong! Suggestions? :) Thanks in advance, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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Re: [U-Boot-Users] About a make error: "too many `l's in integer constant"
by James Chen (ꐏ┩�) 16 Dec '05

16 Dec '05

I tried the ELDK toolchain (version arm-2005-03-06.iso), but this error still occurs. Best Regards. On 12/14/05, Wolfgang Denk <wd(a)denx.de> wrote: > In message <eca8910f0512140716l197e80f6o388a987ab9d9ecf(a)mail.gmail.com> you wrote: > > > > 1. Is there any website providing workable toolchain for u-boot? > > You can use the ELDK; see http://www.denx.de/wiki/view/DULG/ELDKAvailability > > > 2. The following patch solves my problem, but I am not sure why this works? > > Neither am I. But your toolchain must be badly misconfigured or > otherwise broken, so who knows. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de > It may be that your whole purpose in life is simply to serve as a > warning to others. >

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[U-Boot-Users] About a make error: "too many `l's in integer constant"
by James Chen (ꐏ┩�) 16 Dec '05

16 Dec '05

Dear all, I want to build a image for SMDK2410, so I do the following: $ make smdk2410_config $ make all But I got this error message: make -C tools all make[1]: Entering directory `/home/cyt/svnwork/u-boot/u-boot-1.1.3/trunk/tools' gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -c -o img2srec.o img2srec.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -o img2srec img2srec.o strip img2srec gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -c mkimage.c gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -c crc32.c gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -o mkimage mkimage.o crc32.o strip mkimage gcc -g -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x33F80000 -DUSE_HOSTCC -O -c envcrc.c In file included from ../include/config.h:2, from envcrc.c:32: ../include/configs/smdk2410.h:101: too many `l's in integer constant make[1]: *** [envcrc.o] Error 1 make[1]: Leaving directory `/home/cyt/svnwork/u-boot/u-boot-1.1.3/trunk/tools' make: *** [tools] Error 2 My arm-linux-gcc is 3.2. I cannot figure out what this message means? Any suggestions? Thanks.

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[U-Boot-Users] Help required to bring up kernel from U-Boot
by batsayan.das＠tcs.com 16 Dec '05

16 Dec '05

Hello, I am using MPC8260ADS based customs board. I have configured the memory map in U-Boot as follows SDRAM : 0x00000000 (size=128 MB) FLASH : 0x30000000 (size= 1MB) SRAM : 0xFFF00000 (size 4MB) There are also other components in the board, like FRAMER , DSP, etc. I have not initialized the memory map of those components in U-Boot. I am able to get the U-Boot prompt when run by TRACE23. I have build a default MPC8260ADS kernel, the only changes I have made is in the variable IMAP_ADDR , BCSR_ADDR in arch/ppc/platforms/ads8260.h. I have put those values from the already running U-Boot code. Our TEXT_BASE=0xFFF00000 HRCW value= "0E A2 82 05" I copied uImage to location 0x04000000 and the Load Address=0x00000000 and Entry point=0x00000000. The bootm 0x04000000 gives the o/p "Transferring Control to Linux" and then nothing comes. Where is the wrong? My question is 1. What are the minimum information Linux needs from U-Boot to come up properly? In the Linux source tree we have put some printk statement and found that base address of SDRAM, size, etc are passed correctly to Linux by U-Boot. 2. Is the info passed from U-Boot is sufficient enough to make the kernel up? 3. If not, where should I concentrate in Linux tree? Pls help. Thanks, Batsayan Das Tata Consultancy Services Limited Mailto: batsayan.das(a)tcs.com Website: http://www.tcs.com Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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[U-Boot-Users] [PATCH] STXXTC Nand support.
by Pantelis Antoniou 15 Dec '05

15 Dec '05

Hi Wolfgang. The following patch supports the NAND present on the Silicon Turnkey's XTc board. The patch is against the testing-NAND branch of u-boot. ----------8< CHANGELOG 8<------------------ * Support NAND on STXXTC ----------8< patch 8<---------------------- --- a/board/stxxtc/Makefile +++ b/board/stxxtc/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o oftree.o +OBJS = $(BOARD).o oftree.o nand.o $(LIB): .depend $(OBJS) $(AR) crv $@ $(OBJS) --- /dev/null +++ b/board/stxxtc/nand.c @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2000-2004 + * Pantelis Antoniou, pantelis.antoniou(a)gmail.com + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. + * (C) Copyright 2005 + * Dan Malek, Embedded Edge, LLC, dan(a)embeddededge.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +static void stxxtc_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + volatile immap_t *imap = (volatile immap_t *)CFG_IMMR; + + switch (cmd) { + case NAND_CTL_SETNCE: + imap->im_ioport.iop_padat &= ~(1 << (15 - 7)); + break; + case NAND_CTL_CLRNCE: + imap->im_ioport.iop_padat |= (1 << (15 - 7)); + break; + case NAND_CTL_SETALE: + imap->im_ioport.iop_pcdat |= (1 << (15 - 15)); + break; + case NAND_CTL_CLRALE: + imap->im_ioport.iop_pcdat &= ~(1 << (15 - 15)); + break; + case NAND_CTL_SETCLE: + imap->im_cpm.cp_pbdat |= (1 << (31 - 23)); + break; + case NAND_CTL_CLRCLE: + imap->im_cpm.cp_pbdat &= ~(1 << (31 - 23)); + break; + } +} + +/* + * chip R/B detection + */ +static int stxxtc_nand_ready(struct mtd_info *mtd) +{ + volatile immap_t *imap = (volatile immap_t *)CFG_IMMR; + return !!(imap->im_ioport.iop_padat & (1 << (15 - 6))); +} + +void board_nand_init(struct nand_chip *nand) +{ + nand->options = NAND_SAMSUNG_LP_OPTIONS; + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = stxxtc_nand_hwcontrol; + nand->dev_ready = stxxtc_nand_ready; + nand->chip_delay = 18; +} +#endif --- a/board/stxxtc/stxxtc.c +++ b/board/stxxtc/stxxtc.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2000-2004 - * Pantelis Antoniou, Intracom S.A., panto(a)intracom.gr + * Pantelis Antoniou, Intracom S.A., pantelis.antoniou(a)gmail.com * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. * (C) Copyright 2005 * Dan Malek, Embedded Edge, LLC, dan(a)embeddededge.com @@ -574,22 +574,6 @@ int board_early_init_f(void) return 0; } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) - -#include <linux/mtd/nand.h> - -extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - unsigned long totlen; - - totlen = nand_probe(CFG_NAND_BASE); - printf ("%4lu MB\n", totlen >> 20); -} -#endif - #ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -435,88 +435,11 @@ /****************************************************************/ -/* NAND */ -#define CFG_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CFG_MAX_NAND_DEVICE 1 -#undef NAND_NO_RB - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_BASE NAND_BASE +#define CONFIG_NEW_NAND_CODE -/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_padat) |= (1 << (15 - 7)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) |= (1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) |= (1 << (31 - 23)); \ - } while(0) - -#ifndef NAND_NO_RB -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CFG_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#else -#define NAND_WAIT_READY(nand) udelay(12) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -/*****************************************************************************/ - -#define CFG_DIRECT_FLASH_TFTP -#define CFG_DIRECT_NAND_TFTP +#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ /*****************************************************************************/

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[U-Boot-Users] How to bulid a GDB-STUB for AT91RM9200?
by peike 15 Dec '05

15 Dec '05

Hi,Members Merry Christmas! Now,I'm do some thing at Atmel AT92RM9200 target with u-boot-0.4.8,and I want to add a gdb-stub for target into the kernel or u-boot.0.4.8.My u-boot and target OS information is: boot 1.0 (Jun 4 2004 - 17:42:12) U-Boot 0.4.8 (Oct 13 2005 - 16:29:32) U-Boot code: 21F00000 -> 21F13C20 BSS: -> 21F1F9A0 DRAM Configuration: Bank #0: 20000000 64 MB Atmel: AT49BV1614 (16Mbit) Flash: 16 MB In: serial Out: serial Err: serial start linux now(y/n): loading kernel to ram... done loading ramdisk to ram... done start linux... ## Starting application at 0x23000000 ... Uncompressing Linux.............................................................Linux version 2.4.19-rmk7 (root(a)localhost.localdomain) (gcc version 2.95.3 20015CPU: Arm920Tid(wb) revision 0 Machine: ATMEL AT91RM9200 ......................................... BusyBox v1.00-pre10 (2004.06.15-14:16+0000) Built-in shell (ash) Enter 'help' for a list of built-in commands. ~ # How can i do? Would you like to give me some supports! Thank you! yours sincerely peike

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[U-Boot-Users] How can I add a gdb-stub into U-boot-0.4.8 for AT91RM9200-DK ?
by peike 15 Dec '05

15 Dec '05

Hello,Wolfgang I'm using u-boot-0.4.8 at Atmel's AT91RM9200-DK machine.Following is information: U-Boot 0.4.8 (Oct 13 2005 - 16:29:32) U-Boot code: 21F00000 -> 21F13C20 BSS: -> 21F1F9A0 DRAM Configuration: Bank #0: 20000000 64 MB Atmel: AT49BV1614 (16Mbit) Flash: 16 MB In: serial Out: serial Err: serial start linux now(y/n): Uboot>tftp 23000000 zImage Uboot> tftp 20800000 ramdisk.image.gz Uboot> go 23000000 *****I download a image by tftp into board's SDRAM and then start it,just like an old friend say"Now, I wonder if it is possible to start the image under control of gdb. As I understand it, there can run a small 'gdb-stub' on the target which talks by serial line or by ethernet with the gdb on the development host. In common/kgdb.c there seems to be something like this small 'gdb-stub'? Does it work for ARM? How can it be used?" *********My question is:If I want to add a debugging stub(at91rm9200dk-stub.c or gdbserver)into u-boot-0.4.8,how to do it? Isn't it a difficult task? ************ The following is my U-boot starting linux process infomormation: start linux... ## Starting application at 0x23000000 ... Uncompressing Linux.............................................................Linux version 2.4.19-rmk7 (root(a)localhost.localdomain) (gcc version 2.95.3 20015CPU: Arm920Tid(wb) revision 0 Machine: ATMEL AT91RM9200 On node 0 totalpages: 16384 zone(0): 16384 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: initrd=0x20800000,32M root=/dev/ram init=/linuxrc console0Console: colour dummy device 80x30 Calibrating delay loop... 89.90 BogoMIPS Memory: 64MB = 64MB total Memory: 29796KB available (1804K code, 346K data, 76K init) Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) Inode cache hash table entries: 4096 (order: 3, 32768 bytes) Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) POSIX conformance testing by UNIFIX Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd Journalled Block Device driver loaded devfs: v1.12a (20020514) Richard Gooch (rgooch(a)atnf.csiro.au) devfs: boot_options: 0x1 JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications AB. S1D13XXX: Phys address:C480F000 Phys Reg address:C480D000 Console: switching to colour frame buffer device 30x20 fb0: s1d13xxx frame buffer device Display 240 x 320 16Bpp pty: 256 Unix98 ptys configured Keyboard(PS/2): initiate successfully! *********************keybd_init************** Uniform Multi-Platform E-IDE driver Revision: 6.31 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx ioremap:c4a10000 ide0: CPCI405 IDE interface IDE: waiting for drives to settle... IDE: waiting for drives to settle... IDE: waiting for drives to settle... hdb: probing with STATUS(0x28) instead of ALTSTATUS(0x0e) SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256). CSLIP: code copyright 1989 Regents of the University of California. RAMDISK driver initialized: 16 RAM disks of 15360K size 1024 blocksize PPP generic driver version 2.4.2 SCSI subsystem driver Revision: 1.00 kmod: failed to exec /sbin/modprobe -s -k scsi_hostadapter, errno = 2 kmod: failed to exec /sbin/modprobe -s -k scsi_hostadapter, errno = 2 AT91ARM9200 flash device: 1000000 at 10000000 Search for id:(89 18) interleave(1) type(2) Search for id:(89 18) interleave(1) type(2) Search for id:(89 18) interleave(1) type(2) Search for id:(89 18) interleave(2) type(1) Search for id:(89 18) interleave(2) type(1) Search for id:(89 18) interleave(2) type(1) Search for id:(89 00) interleave(2) type(2) Search for id:(89 00) interleave(2) type(2) Search for id:(89 00) interleave(2) type(2) JEDEC: Found no AT91ARM9200 flash device device at location zero Using buffer write method Creating 4 MTD partitions on "AT91ARM9200 flash device": 0x00000000-0x00040000 : "reserved for bootloader" mtd: Giving out device 0 to reserved for bootloader 0x00040000-0x00140000 : "reserved for kernel" mtd: Giving out device 1 to reserved for kernel 0x00140000-0x00540000 : "reserved for ramdisk" mtd: Giving out device 2 to reserved for ramdisk 0x00540000-0x00d40000 : "jffs2(8M)" mtd: Giving out device 3 to jffs2(8M) physmap flash device: 800000 at 10540000 Using buffer write method mtd: Giving out device 4 to Physically mapped flash usb.c: registered new driver usbdevfs usb.c: registered new driver hub usb.c: registered new driver usb_mouse usbmouse.c: v1.6:USB HID Boot Protocol mouse driver usb.c: registered new driver keyboard usbkbd.c: :USB HID Boot Protocol keyboard driver Initializing USB Mass Storage driver... usb.c: registered new driver usb-storage USB Mass Storage support registered. mice: PS/2 mouse device common for all mice ttyS%d0 at MEM 0xfefff200 (irq = 1) is a AT91_SERIAL ttyS%d1 at MEM 0xfefc0000 (irq = 6) is a AT91_SERIAL ttyS%d2 at MEM 0xfefc4000 (irq = 7) is a AT91_SERIAL ttyS%d3 at MEM 0xfefc8000 (irq = 8) is a AT91_SERIAL ttyS%d4 at MEM 0xfefcc000 (irq = 9) is a AT91_SERIAL eth0: Link now 100-FullDuplex eth0: AT91 ethernet at 0xfefbc000 int=24 100-FullDuplex (00:01:02:03:04:05) usb-ohci.c: USB OHCI at membase 0xc6219000, IRQ 23 usb.c: new USB bus registered, assigned bus number 1 Product: USB OHCI Root Hub SerialNumber: c6219000 hub.c: USB hub found hub.c: 2 ports detected NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 4096 bind 4096) NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. NetWinder Floating Point Emulator V0.95 (c) 1998-1999 Rebel.com RAMDISK: Compressed image found at block 0 Freeing initrd memory: 32768K EXT2-fs warning: mounting unchecked fs, running e2fsck is recommended VFS: Mounted root (ext2 filesystem). Mounted devfs on /dev Freeing init memory: 76K mount /etc as ramfs re-create the /etc/mtab entries eth0: Link now 100-FullDuplex mtdblock_open ok jffs2_read_inode(): No data nodes found for ino #85 jffs2_read_inode(): But it has children so we fake some modes for it exec: 5: /jffs2/etc/ipset: Permission denied Please press Enter to activate this console. BusyBox v1.00-pre10 (2004.06.15-14:16+0000) Built-in shell (ash) Enter 'help' for a list of built-in commands. ~ # ls application dev jffs2 linuxrc qt usr bin etc lib mnt sbin var bitmap font linuette proc tmp Please! Thank you very much! yours peike

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[U-Boot-Users] Make can't make a-files
by Zhukov 15 Dec '05

15 Dec '05

Hello, community of u-boot-users! After "make at91rm9200dk_config" I try "make -n". Maker shows a lot, but at the end it complaints "no rule for making *.a" - like this. What is "a" extension about and how to tune the maker? Best regards, Andrew Zhukov mailto:zhukov@tst.spb.su

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[U-Boot-Users] uboot on an ipengine
by Charles Lockhart 15 Dec '05

15 Dec '05

I'm trying to get u-boot to run on an ipengine (mpc823 based device). BSE (company that makes the ipengine) told me to use the binary generated from the RPXLite configuration. I tried this, it didn't work, but I think I'm doing it wrong. I'm building everything with the ELDK. I was able to successfully build a zImage Linux kernel image (ELF), and I can get that to run by placing it at memory location 0x200000 and then telling the ipengine internal boot loader to jump to 0x210000. This bypasses the ELF header and jumps into the code, and it works great. I was thinking that maybe I have to do something like that for the u-boot image (also an ELF), but it didn't work. I was also successful using "ppc_8xx-objcopy -O binary zImage zImage.bin" to create a kernel image that booted directly (I place it at 0x200000 and have the internal bootloader jump directly to 0x200000), but when I tried this with the RPXLite u-boot image, it also didn't work. ELDK version is 3.1.1 (build 2005-06-07). U-boot version is off the cvs source tree from last week. The kernel that I built successfully was the linuxppc 2.4 also off the cvs source tree from last week. The other time I used u-boot (for an ml300 board) it came up pretty easily. This time I'm just not seeing something, but haven't figured out what yet. Thanks for your time, -Charles

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[U-Boot-Users] [PATCH] CFG_UNCOMPRESSED_LEN
by Rodolfo Giometti 14 Dec '05

14 Dec '05

Hello. Here a simple patch who adds a new configuration parameter. I found it useful, hope the same for you. :) Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)enneenne.com Linux Device Driver giometti(a)gnudd.com Embedded Systems giometti(a)linux.it UNIX programming phone: +39 349 2432127

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[U-Boot-Users] Disabling all ethernet initialisation stuff?
by Martin Egholm Nielsen 13 Dec '05

13 Dec '05

Hi there, If I disable the ethernet command from U-boot as specified in the README: #define CONFIG_COMMANDS (CFG_CMD_ALL & ~CFG_CMD_NET) will this make all ethernet initialisation stuff disappear? I'm kinda suspecting a bad PHY for being responsible for my u-boot not starting sometimes (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19759)... BR, Martin Egholm

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[U-Boot-Users] More info on porting required
by batsayan.das＠tcs.com 13 Dec '05

13 Dec '05

Hello, Is there any reference book/study material (other than U-boot/Linux documentation; mailing list ) available to port U-Boot/Linux on a PPC based customs board? Thanks Batsayan Das Tata Consultancy Services Limited Mailto: batsayan.das(a)tcs.com Website: http://www.tcs.com Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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RE: [U-Boot-Users] NAND driver issue
by Dave Ellis 12 Dec '05

12 Dec '05

December 10, 2005 Aubrey wrote: > On 12/10/05, Dave Ellis <DGE(a)sixnetio.com> wrote: > > I think the ECC code used to be broken unless CONFIG_MTD_NAND_ECC_JFFS2 > > is set in your board config file. > > > The macro CONFIG_MTD_NAND_ECC_JFFS2 is there black and white in the > file "common/cmd_nand.c". Should I add it again to my board config > file? It used to be commented out. I didn't realize it was fixed a long time ago since somehow the fix didn't make it into my local copy. Sorry for the noise. > On the other hand, If I don't want to work on the JFFS2 system, the > macro should be disabled. I mean this macro shouldn't affect the > direct read/write operation of the nand driver. It was broken when I worked on it (several years ago). The non-JFFS2 implementation conflicted with the bad block position set by the NAND manufacturers, so I just made the JFFS2 option work. Richard Woodruff fixed the conflict, but I don't think the present code will use the ECC for non-JFFS2 since eccvalid_pos is -1. I guess nobody cares, otherwise CONFIG_MTD_NAND_ECC_JFFS2 would be defined in the config files, not in cmd_nand.c. Anyhow, the ST NAND128W3 worked for me (with JFFS2 ECC) when I added the ids to the header files. Dave Ellis

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[U-Boot-Users] Question about porting u-boot
by Joe Culler 12 Dec '05

12 Dec '05

Hello there, I got a customized board, which is based on S3C2410. a 2MB NOR flash SST 39xF1601 and a 64M NAND flash K9F1208. In the file include/configs/smd2410.h: ... #ifdef CONFIG_AMD_LV800 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) #ifdef CONFIG_AMD_LV400 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) I don't know how to determine CFG_ENV_ADDR. Why does it add 0x0F0000 or 0x070000? Another question is If I save u-boot in NOR flash, can my kernel boot from NAND? or should I save u-boot in NAND? Thank you very much. Regards, Joe.

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Re: [U-Boot-Users] Booting IDE
by KokHow Teh 12 Dec '05

12 Dec '05

>To boot Linux from IDE, do i need to disk dump an image created by >u-boot mkimage at the beginning of a partition? if not, how am i >suppose to use bootdisk? >-- >Jesse M. Sacayanan http://www.denx.de/wiki/view/DULG/UsingPCCard

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[U-Boot-Users] Booting IDE
by jescythe 12 Dec '05

12 Dec '05

To boot Linux from IDE, do i need to disk dump an image created by u-boot mkimage at the beginning of a partition? if not, how am i suppose to use bootdisk? -- Jesse M. Sacayanan

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[U-Boot-Users] U-Boot CFI Flash driver incompleteness
by Nikita V. Youshchenko 11 Dec '05

11 Dec '05

Hello. While porting U-Boot to a custom board, I faced a situation when U-Boot failed to write of erase to the board flash chip. Flash chip is SG29GL32M10FAIR4 from Spansion, http://www.spansion.com/products/S29GL032A.html This is CFI-compatible NOR flash chip, that could be used both with 8-bit and 16-bit data bus, selected by hardware setup. In my case, it's in 8-bit mode. With linux MTD subsystem, write and erase work as expected. Here is what Linux drivers print about the chip when in verbose mode: physmap flash device: 400000 at 18000000 Number of erase regions: 2 Primary Vendor Command Set: 0002 (AMD/Fujitsu Standard) Primary Algorithm Table at 0040 Alternative Vendor Command Set: 0000 (None) No Alternate Algorithm Table Vcc Minimum: 2.7 V Vcc Maximum: 3.6 V No Vpp line Typical byte/word write timeout: 128 ╣s Maximum byte/word write timeout: 256 ╣s Typical full buffer write timeout: 128 ╣s Maximum full buffer write timeout: 4096 ╣s Typical block erase timeout: 1024 ms Maximum block erase timeout: 16384 ms Chip erase not supported Device size: 0x400000 bytes (4 MiB) Flash Device Interface description: 0x0002 - supports x8 and x16 via BYTE# with asynchronous interface Max. bytes in buffer write: 0x20 Number of Erase Block Regions: 2 Erase Region #0: BlockSize 0x2000 bytes, 8 blocks Erase Region #1: BlockSize 0x10000 bytes, 63 blocks phys_mapped_flash: Found 1 x16 devices at 0x0 in 8-bit bank Amd/Fujitsu Extended Query Table at 0x0040 number of CFI chips: 1 cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness. I examined u-boot CFI flash driver code, and the chip datasheet. Looks like u-boot driver defines offsets at which commands are written to the flash as constants, while flash datasheet states the addresses are different in 8bit and 16bit modes. I was able to make write and erase work by applying the following patch: diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index 4b7a110..292bda7 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -107,9 +107,15 @@ #define AMD_STATUS_TOGGLE 0x40 #define AMD_STATUS_ERROR 0x20 +#ifndef CONFIG_AMD_8BIT_FLASH #define AMD_ADDR_ERASE_START 0x555 #define AMD_ADDR_START 0x555 #define AMD_ADDR_ACK 0x2AA +#else +#define AMD_ADDR_ERASE_START 0xAAA +#define AMD_ADDR_START 0xAAA +#define AMD_ADDR_ACK 0x555 +#endif #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 and defining CONFIG_AMD_8BIT_FLASH in my board config file. I don't know if this is specific to the chip used, or for all chips with AMD command set that work in 8bit mode. If later, maybe it's better to fix the driver to automatically use valid addresses depending on width of the data bus. Nikita

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[U-Boot-Users] ramdisk image for arm kernel 2.6.10
by tharma＠e-consystems.com 11 Dec '05

11 Dec '05

I have ported the kernel image 2.6.10 amd ramdisk image . On booting the kernel i can't get the shell prompt . bootargs = console=ttySA0 mem=64M root=/dev/mtdblock2 rw how can i get the shell prompt ?

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[U-Boot-Users] [PATCH] Correct register for pci async mode on PPC440EP
by Youngchul Bang 10 Dec '05

10 Dec '05

Hi, Stefan This patch fixes the register for PCI async mode configuration information. Best regards, Youngchul Bang diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a463053..a26533c 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -57,7 +57,7 @@ int pci_async_enabled(void) #if defined(CONFIG_440EP) || defined(CONFIG_440GR) unsigned long val; - mfsdr(cpc0_strp1, val); + mfsdr(sdr_sdstp1, val); return (val & SDR0_SDSTP1_PAME_MASK); #endif }

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RE: [U-Boot-Users] NAND driver issue
by Dave Ellis 10 Dec '05

10 Dec '05

Thursday, December 08, 2005 11:33 AM Aubrey wrote: > But "nand read" and "nand write" failed because of ECC. So I try to > remove the macro "CONFIG_MTD_NAND_ECC" from the file > "common/cmd_nand.c", now it works. I can run "nand read" and "nand > write" successfully. The data wrote into the NAND flash and read back > is the same. I think the ECC code used to be broken unless CONFIG_MTD_NAND_ECC_JFFS2 is set in your board config file. Dave Ellis ~~~~~~~~~~~~~~~~~~~~~~~~~~ SIXNET - "Leading the Industrial Ethernet Revolution" 331 Ushers Road, P.O. Box 767, Clifton Park, NY 12065 USA Tel +1 (518) 877-5173 Fax +1 (518) 877-8346 Email me at: dge(a)sixnetio.com Detailed product info: www.sixnetio.com ~~~~~~~~~~~~~~~~~~~~~~~~~~

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[U-Boot-Users] [PATCH] Enabled time handling on 83xx
by Kumar Gala 09 Dec '05

09 Dec '05

Enabled time handling on 83xx Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> CHANGELOG: * Enable time handling on 83xx Patch by Kumar Gala 09 Dec 2005 --- commit 0e1dbe02634177d369921208bd36cd8c875bc4a6 tree ee3e5b5a6b2e14280509a5f5d1eb4c137e6c73b3 parent 113d17d798e5770ff90bcfd9f7b21e080b91a8c9 author Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:22:03 -0600 committer Kumar Gala <galak(a)kernel.crashing.org> Fri, 09 Dec 2005 13:22:03 -0600 cpu/mpc83xx/interrupts.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c index 53474f6..729de2a 100644 --- a/cpu/mpc83xx/interrupts.c +++ b/cpu/mpc83xx/interrupts.c @@ -43,6 +43,16 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { + DECLARE_GLOBAL_DATA_PTR; + + volatile immap_t *immr = (immap_t *) CFG_IMMR; + + *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; + + /* Enable e300 time base */ + + immr->sysconf.spcr |= 0x00400000; + return 0; }

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[U-Boot-Users] u-boot debug failure with BDI2000 on MPC8540ads and eval8540 (gdatech's 8540 board)
by emre kara 09 Dec '05

09 Dec '05

Dear All; I have bought a BDI2000 with BDIGDB-85xx s/w. I'll use it for freescale's mpc8540eval board (know as GDA8540) and freescale's MPC8560ads. I can succesfully program the flash, but I can't debug neither linux kernel (2.6.15) nor u-boot(version 1.1.3). We have already running systems included u-boot and linux,so I could (try) to debug both of them. There is a strange behavior while debugging u-boot. Target boots at (loop) state, a few steps later (with ti command or step on gdb),bdi2000 gives a error message "Core status is 0x0041 *** Core is stopped, no restart possible bdi2000" loses control over target and then it reads all the register zero, every time on the same address(0xfffff154) it happes again,any breakpoint greater then this address doesnt work. I have tried it 3 different versions of u-boot (1.1.2-1.1.3-and latest with CVS) programmed on flash, and 2 different hardwares, nothing has changed. Normally, all this u-boot images succcesfully can boot up the target(with reset run command) and all of them are fully functional. Can you please examine the log below? ------------------------------------------------ - TARGET: waiting for target Vcc - TARGET: processing power-up delay - TARGET: processing user reset request - BDI asserts HRESET - Reset JTAG controller passed - JTAG exists check passed - IDCODE is 0x1007001D - SVR is 0x80700020 - PVR is 0x80200020 - Core status is 0x0001 - Platform status is 0x0005 - SAP status is 0x0005 - CCSRBAR is 0x0_ff700000 - BDI scans platform HALT command - Core status is 0x0001 - Platform status is 0x0005 - SAP status is 0x0005 - BDI removes HRESET - BDI writes boot loop to L2SRAM - BDI scans platform RESUME command - TARGET: Target PVR is 0x80200020 - TARGET: resetting target passed - TARGET: processing target startup .... - TARGET: processing target startup passed BDI>conf BDI MAC : 00-0c-01-97-95-07 BDI IP : 192.168.11.101 BDI Subnet : 255.255.255.255 BDI Gateway : 255.255.255.255 Config IP : 192.168.11.1 Config File : ads8560.cfg BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP halt Current PC : 0xfffffffc Current CR : 0x00000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>bi 0xfffff14c Breakpoint identification is 0 BDI>go - TARGET: stopped BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : instruction breakpoint Current PC : 0xfffff14c Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : single step Current PC : 0xfffff150 Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : single step Current PC : 0xfffff154 Current CR : 0x40000000 Current MSR : 0x00000200 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI>ti - Core status is 0x0041 *** Core is stopped, no restart possible # PPC: timeout while waiting for halt BDI> Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP freeze Current PC : 0x00000000 Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 # Step timeout detected BDI>i Target CPU : MPC8560/8540 Rev.2 Target state : halted Debug entry cause : COP freeze Current PC : 0x00000000 Current CR : 0x00000000 Current MSR : 0x00000000 Current LR : 0x00000000 Current CCSRBAR : 0x0_40000000 BDI> and system craches until a "reset run" command --------------------------------------------------------------------- What can be cause this problem?. The configuration file of eval8540 is below (taken from ultsol web site). Abatron Model:BDI2000/C SerNo: 97950725 Loader: V1.05 Firmware:V1.04 bdiGDB for MPC85xx Logic:V1.05 PPC6xx/PPC7xx ;bdiGDB configuration file for Metrowerks eval board MPC8540 ;----------------------------------------------------------- ; ; The boot flash data bus is connected with swapped bytes. ; ; CPU D0 D1 ... D6 D7 | D8 D9 ... D14 D15 ; | | ... | | | | ... | | ; | | ... | | | | ... | | ; FLASH D7 D6 ... D1 D0 | D15 D14 ... D9 D8 ; ; ; [INIT] ; init core register ; ; define maximal transfer size ;TSZ4 0x00000000 0xffffffff ; ; Move the L2SRAM to the initial MMU page WM32 0xFF720000 0x68010000 ;L2CTL WM32 0xFF720100 0xFFFC0000 ;L2SRBAR0 WM32 0xFF720000 0xA8010000 ;L2CTL ; ; Clear l2 sram with dma (needed if STARTUP HALT) ;WM32 0xff721110 0x00040000 ;SATR0 SREADTTYPE=Read, don't snoop ;WM32 0xff721114 0xff700004 ;SAR0 Dummy source register ;WM32 0xff721118 0x00050000 ;DATR0 DWRITETTTYPE=Write, snoop local processor ;WM32 0xff721120 0x00040000 ;BCR0 Size ;WM32 0xff721100 0x0f009404 ;MR0 BWC=f,SAHTS=2(4 bytes),SAHE=1,SWSM=Dest,SRW=1,CTM=1,CS=0 ;WM32 0xff72111c 0xfffc0000 ;DAR0 which sets CS=1 ;DELAY 200 ;let DMA complete ; ; load and execute boot code (needed if STARTUP HALT) ;WM32 0xfffffffc 0x48000000 ;loop ;EXEC 0xfffffffc 1000 ; ; load TLB entries, helper code @ 0xfffff000 WM32 0xfffff000 0x7c0007a4 ;tlbwe WM32 0xfffff004 0x7c0004ac ;msync WM32 0xfffff008 0x48000000 ;loop ; ; 1MB TLB1 #1 0x40000000 - 0x400fffff WSPR 624 0x10010000 ;MAS0: WSPR 625 0x80000500 ;MAS1: WSPR 626 0x4000000a ;MAS2: WSPR 627 0x40000015 ;MAS3: WSPR 628 0x00000000 ;MAS4: EXEC 0xfffff000 ; ; 64 MB TLB1 #2 0xc0000000 - 0xc3ffffff WSPR 624 0x10020000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0xc0000008 ;MAS2: WSPR 627 0xc0000015 ;MAS3: EXEC 0xfffff000 ; ; 64 MB TLB1 #3 0x00000000 - 0x03ffffff WSPR 624 0x10030000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0x00000008 ;MAS2: WSPR 627 0x00000015 ;MAS3: EXEC 0xfffff000 ; ; 64 MB TLB1 #4 0x04000000 - 0x07ffffff WSPR 624 0x10040000 ;MAS0: WSPR 625 0x80000800 ;MAS1: WSPR 626 0x04000008 ;MAS2: WSPR 627 0x04000015 ;MAS3: EXEC 0xfffff000 ; ; 16 MB TLB1 #5 0xff000000 - 0xffffffff WSPR 624 0x10050000 ;MAS0: WSPR 625 0x80000700 ;MAS1: WSPR 626 0xff80000a ;MAS2: changed WSPR 627 0xff800015 ;MAS3: changed EXEC 0xfffff000 ; ; 16 MB TLB1 #0 0xf0000000 - 0xf0ffffff WSPR 624 0x10000000 ;MAS0: WSPR 625 0x80000700 ;MAS1: WSPR 626 0xf0000008 ;MAS2: WSPR 627 0xf0000015 ;MAS3: EXEC 0xfffff000 ; ; Remove the L2SRAM from the initial MMU page WM32 0xFF720000 0x28010000 ;L2CTL WM32 0xFF720000 0x28000000 ;L2CTL ; ; Move CCSRBAR to 0xfdf00000 WM32 0xff700000 0x000fdf00 ;CCSRBAR to 0xfdf00000 ; ; Initialize LAWBAR's WM32 0xfdf00C08 0x00000000 ;LAWBAR0 : @0x00000000 WM32 0xfdf00C10 0x80f0001b ;LAWAR0 : DDR/SDRAM 256MB ;WM32 0xfdf00C28 0x000c0000 ;LAWBAR1 : @0xc0000000 ;WM32 0xfdf00C30 0x8040001d ;LAWAR1 : Local Bus 1GB ; ; Setup DDR (Metrowerks eval board, 256MB DDR) WM32 0xfdf02000 0x00000007 ;CS0_BNDS WM32 0xfdf02080 0x80000101 ;CS0_CONFIG WM32 0xfdf02108 0x36342321 ;TIMING_CFG_1 WM32 0xfdf0210C 0x00000800 ;TIMING_CFG_2 WM32 0xfdf02110 0x02000000 ;DDR_SDRAM_CFG WM32 0xfdf02118 0x00000062 ;DDR_SDRAM_MODE WM32 0xfdf02124 0x03d00100 ;DDR_SDRAM_IVAL DELAY 200 WM32 0xfdf02110 0xc2000000 ;DDR_SDRAM_CFG ; ; Setup Flash chip select WM32 0xfdf05000 0xff801001 ;BR0 WM32 0xfdf05004 0xff806f67 ;OR0 ; ; Setup flash programming workspace in L2SRAM ;WM32 0x40020000 0x68010000 ;L2CTL ;WM32 0x40020100 0xf0000000 ;L2SRBAR0 ;WM32 0x40020000 0xA8010000 ;L2CTL ;WSPR 63 0xf0000000 ;IVPR to workspace ;WSPR 415 0x0001500 ;IVOR15 : Debug exception ;WM32 0xf0001500 0x48000000 ;write valid instruction ; ; Setup for program execution WM32 0xfdf20000 0x28010000 ;L2CTL WM32 0xfdf20000 0x28000000 ;L2CTL WSPR 63 0x00000000 ;IVPR to workspace WSPR 406 0x0000700 ;IVOR6 : Program exception WSPR 415 0x0001500 ;IVOR15 : Debug exception WM32 0x00000700 0x48000000 ;write valid instruction WM32 0x00001500 0x48000000 ;write valid instruction ; ; Clear flash Lock-Bits WM16 0xFF800000 0x6000 ;clear Lock-Bits command WM16 0xFF800000 0xD000 DELAY 1000 ;needs up to 0.7 sec WM16 0xFF800000 0xFFFF ;set flash to read mode ; [TARGET] ;***DONE*** MMU XLAT CPUTYPE 8540 ;the CPU type JTAGCLOCK 3 ;use 4 MHz JTAG clock STARTUP LOOP ;use boot loop in L2SRAM ;STARTUP HALT ;halt core while HRESET is asserted BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoint STEPMODE JTAG ;JTAG or HWBP, HWBP uses a hardware breakpoint WAKEUP 200 ;give reset time to complete ;POWERUP 5000 ;start delay after power-up detected in ms POWERUP 100 ;start delay after power-up detected in ms MEMACCESS SAP ;use SAP or CORE for JTAG memory accesses [HOST] IP 192.168.11.1 ;emreFILE E:\cygwin\home\demo\e500\fibo.elf ;emreFORMAT ELF ;emreLOAD MANUAL ;load code MANUAL or AUTO after reset ;emreDUMP D:\SCORE_PRO\BRIDGE_CARD\BDI2000\DUMP\e500.bin [FLASH] CHIPTYPE STRATAX16 CHIPSIZE 0x800000 ;The size of one flash chip in bytes BUSWIDTH 16 SWAP ;The bytes are swapped !!! WORKSPACE 0x00000000 ;workspace in system RAM ;WORKSPACE 0xf0000000 ;workspace in L2SRAM ;FILE E:\cygwin\home\bdidemo\e500\ads8560.cfg ;FORMAT BIN 0xFF800000 ;ERASE 0xFF800000 ;erase sector 0 ;ERASE 0xFF840000 ;erase sector 1 ;ERASE 0xFF880000 ;erase sector 2 ;ERASE 0xFF8C0000 ;erase sector 3 [REGS] FILE $reg8560.def Best Regards Emre KARA ___________________________________________________________ To help you stay safe and secure online, we've developed the all new Yahoo! Security Centre. http://uk.security.yahoo.com

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[U-Boot-Users] NAND driver issue
by Aubrey 09 Dec '05

09 Dec '05

Hi all, I'm trying to enable NAND driver in uboot for my target board. It's a ST nand chip, the part number is nand128w3a(small page, 16M*8bit). After add its data info into the matrix nand_flash_ids[] in the file "include/linux/mtd/nand_ids.h" and add the nand driver interface macros in my board head file, u-boot can find my NAND flash chip. And I can run the command "nand bad" successfully. But "nand read" and "nand write" failed because of ECC. So I try to remove the macro "CONFIG_MTD_NAND_ECC" from the file "common/cmd_nand.c", now it works. I can run "nand read" and "nand write" successfully. The data wrote into the NAND flash and read back is the same. I can make sure that the hardware is no problem. I know ECC is very important and can't be disabled. So, Is it a bug of NAND driver? Or did I miss something? Thanks for your any suggestions and comments. Regards, -Aubrey

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[U-Boot-Users] About SMDK2410 in uboot
by 周宇 08 Dec '05

08 Dec '05

We all know that there two nor flash (AM29LV800BB-90EC (1MB) and E28F128J3A150 (16MB,Unload),)in smdk2410 board. But we only see the init function for AM29LV800BB-90EC chipset. I don't know why the E28F128J3A150 don't want to be initialized. Who can tell why _________________________________________________________________ 与联机的朋友进行交流，请使用 MSN Messenger: http://messenger.msn.com/cn

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RE: [U-Boot-Users] IVPR on E500
by Nuno João (Ext_NBS) 08 Dec '05

08 Dec '05

Hello Kylo, Thank you for the answer. After the relocation done by your patch, IVPR is relocated again, to 0x0, when trap_init() (start.S) is called inside board_init_r(). trap_init() relocates the exception handlers to 0x0. This means that, when you get to the linux kernel boot, IVPR is at the same place as it was before your patch (this init_trap() code is earlier than your patch)... or am I missing something? Thank you and Best Regards On 12/8/05, Kylo Ginsberg <kylo.ginsberg(a)gmail.com> wrote: > That was my patch, but I need to work from memory as I'm at a > different job w/o an E500 at hand. As I recall, the problem was this: > --there is a window during very early linux startup when it has > removed the TLB entries setup by u-boot and is building its own > --using a BDI2000 trying to set breakpoints in this part of the linux code > --the E500 part wants to fetch the debug vector before passing control > to the BDI > --if this fetch goes to an unmapped region of address space, the E500 > is off in the weeds and stops responding to the BDI > Relocating the IVPR to ram at the same time that the rest of the image > is moved to ram addressed this problem. > I don't recall the third piece of code that you mention, so I don't > know how that interacts. (And my attempt to cg-clone u-boot.git gave > me a 404 error for one of the pack files part way through the > download; I'll try again later.) On 12/7/05, Nuno João (Ext_NBS) <nuno.joao-ext_nbs(a)siemens.com> wrote: > I've noticed some E500 related files (start.S and lib-ppc/board.c, > I don't know if others) have been changed with comment > "E500 update: repoint IVPR to RAM when code is relocated". > I don't understand the need for this change. Traps start in flash, > with IVPR set to TEXT_BASE in start.S. Later, this recent patch > relocates them to the same code but now in ram, after u-boot's > relocation. Later in lib_ppc/board.c:board_init_r() they are > then relocated to the beggining of ram (IVPR = 0). > Why do we need this "IVPR dance"? What does the "repoint IVPR do > RAM" patch fixes?

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[U-Boot-Users] Debugging U-boot
by Bashier Machmur 08 Dec '05

08 Dec '05

Hello, I'm using my custom board (PPC 440GX) and working with U-boot1.1.2 and Linux kernel 2.6.12. Now I have problems with debugging. When I start U-boot from Flash, it's working fine. But when I try debugging U-boot with BDI2000, it always hangs on PC: 0x00001300. ppc>go ppc>halt Core number :0 Core state :debug mode Debug entry cause :JTAG stop request Current PC :0x00001300 Current CR :0x22004022 Current MSR :0x00000000 Current LR :0xfffff144 ppc> Thanks for any help, Bashier

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[U-Boot-Users] IVPR on E500
by Nuno João (Ext_NBS) 08 Dec '05

08 Dec '05

Hello All, I've noticed some E500 related files (start.S and lib-ppc/board.c, I don't know if others) have been changed with comment "E500 update: repoint IVPR to RAM when code is relocated". I don't understand the need for this change. Traps start in flash, with IVPR set to TEXT_BASE in start.S. Later, this recent patch relocates them to the same code but now in ram, after u-boot's relocation. Later in lib_ppc/board.c:board_init_r() they are then relocated to the beggining of ram (IVPR = 0). Why do we need this "IVPR dance"? What does the "repoint IVPR do RAM" patch fixes? Thank you All and Best Regards, Nuno

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[U-Boot-Users] troubles
by Alexandr Kuleschov 07 Dec '05

07 Dec '05

Hi people! I work with based on AT91RM9200 board. (SDRAM 16Mbitx16) When i use "#define CONFIG_SKIP_LOWLEVEL_INIT" and "#define CONFIG_SKIP_RELOCATE_UBOOT" then U-BOOT does not work. But if to change a lines in file "/cpu/arm920t/at91rm9200/lowlevel_init.S" : ldr r0, =SMRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #32 //this number valid for me and ldr r0, =SMRDATA1 ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #160 //this number valid for me to a line ldr r0, =SMRDATA add r2, r0, #32 //this number valid for me and ldr r0, =SMRDATA1 add r2, r0, #160 //this number valid for me works correctly How to solve a problem? Thank Alexandr ------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Do you grep through log files for problems? Stop! Download the new AJAX search engine that makes searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] RE: U-Boot-Users digest, Vol 1 #1593 - 11 msgs
by atul.sabharwal＠exgate.tek.com 06 Dec '05

06 Dec '05

For the 870 PPC processors, there is a check get_immr(0xFFFF) > 0x800 to decide if it's a 866 and above processors. We are using IMMR at offset 0? The comment says that these processors have IMMR lower half at a higher address? The PLL's I am setting were working before. Any idea what might Be the problem with this check ? What does get_immr() return ? Value of IMMR or value of a register at an offset n from value of IMMR ? I am assuming the latter. -- Atul -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of u-boot-users-request(a)lists.sourceforge.net Sent: Wednesday, November 02, 2005 5:53 AM To: u-boot-users(a)lists.sourceforge.net Subject: U-Boot-Users digest, Vol 1 #1593 - 11 msgs Send U-Boot-Users mailing list submissions to u-boot-users(a)lists.sourceforge.net To subscribe or unsubscribe via the World Wide Web, visit https://lists.sourceforge.net/lists/listinfo/u-boot-users or, via email, send a message with subject or body 'help' to u-boot-users-request(a)lists.sourceforge.net You can reach the person managing the list at u-boot-users-admin(a)lists.sourceforge.net When replying, please edit your Subject line so it is more specific than "Re: Contents of U-Boot-Users digest..." Today's Topics: 1. Re: NetConsole tstc problems (Stefan Roese) 2. Re: NetConsole tstc problems (Wolfgang Denk) 3. Re: Low-boot configuration for MPC8272ADS (Bastos Fernandez Alexandre) 4. Re: Low-boot configuration for MPC8272ADS (Yuli Barcohen) 5. custom mpc83xx based board support (Boris) 6. Re: Low-boot configuration for MPC8272ADS (Dmytro Bablinyuk) 7. RE: custom mpc83xx based board support (Chu hanjin-r52514) 8. Re: custom mpc83xx based board support (Wolfgang Denk) 9. Re: Help about tftp download (Jerry Van Baren) 10. Re: NAND flash support (Ladislav Michl) 11. [PATCH] Add ECC check to MIP405 specific Memtest (Denis Peter) --__--__-- Message: 1 From: Stefan Roese <sr(a)denx.de> To: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] NetConsole tstc problems Date: Wed, 2 Nov 2005 08:51:57 +0100 Cc: Brian Prodoehl <bjprodoehl(a)uwalumni.com> Hi Brian, On Tuesday 01 November 2005 22:19, Brian Prodoehl wrote: > Has anyone else experienced problems with NetConsole's tstc? In > particular, defining CONFIG_BOOT_RETRY_TIME makes NetConsole almost > unusable for me, because then readline() in main.c blocks on tstc and the > result (for me, at least) is that NetConsole accepts a character every > second or so. Depending on your network driver, tstc() can take pretty long. I experienced a similar problem in sleep() using tstc() via ctrlc(). I solved this problem using a "better" timeout mechanism with get_timer(). This could probably help here too. > For everything that doesn't depend on tstc, NetConsole works > beautifully for me. I'm just wondering if anyone else has seen problems, or > if anyone has suggestions on how to make tstc less of a show-stopper > (something I haven't been able to accomplish). Take a look at the sleep() fix: http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=c4c13df284 cb06156c16ee6aef49b8d23be3fadd Best regards, Stefan --__--__-- Message: 2 To: Brian Prodoehl <bjprodoehl(a)uwalumni.com> Cc: u-boot-users(a)lists.sourceforge.net From: Wolfgang Denk <wd(a)denx.de> Subject: Re: [U-Boot-Users] NetConsole tstc problems Date: Wed, 02 Nov 2005 08:59:28 +0100 In message <20051101151924.c9ww4408kw8ososc(a)secure.uwalumni.com> you wrot= e: > Has anyone else experienced problems with NetConsole's tstc? In partic= ular, > defining CONFIG_BOOT_RETRY_TIME makes NetConsole almost unusable for me= , > because then readline() in main.c blocks on tstc and the result (for me= , at > least) is that NetConsole accepts a character every second or so. For > everything that doesn't depend on tstc, NetConsole works beautifully fo= r me.=20 > I'm just wondering if anyone else has seen problems, or if anyone has > suggestions on how to make tstc less of a show-stopper (something I hav= en't > been able to accomplish). Please use current code. A fix inthis area has been checked in a couple of days ago. Best regards, Wolfgang Denk --=20 Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Of course there's no reason for it, it's just our policy. --__--__-- Message: 3 From: Bastos Fernandez Alexandre <ALEBAS(a)televes.com> To: "'u-boot-users(a)lists.sourceforge.net'" <u-boot-users(a)lists.sourceforge.net> Cc: "'DmytroBablinyuk<dmytro.bablinyuk(a)rftechnology.com.au>'" <DmytroBablinyuk<dmytro.bablinyuk(a)rftechnology.com.au>> Date: Wed, 2 Nov 2005 09:28:17 +0100 Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS Dmytro, Please apply my patch with Flash HRCW for MPC8272ADS and try then the MPC8272ADS_lowboot_config. This worked fine for me http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19395 Best regards Alex BASTOS > -----Original Message----- > To: u-boot-users(a)lists.sourceforge.net > From: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> > Date: Wed, 02 Nov 2005 16:39:12 +1100 > Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS > > > > 1. I have updated (latest snapshot) u-boot: > > > > include/configs/MPC8260ADS.h > > > > #define CFG_HRCW_MASTER 0x0e72b605 > > > > board/mpc8260ads/config.mk > > > > TEXT_BASE = 0xff800000 > > 1. I tried 'make MPC8272ADS_lowboot_config' but it keeps resetting with > or without BDI attached (JP9 in position MEMORY, SW2 is FLASH ON). > > 2. Burn (to burn I need to move JP9 in position BCSR, otherwise it's > just resetting) > 8272>load > 8272>unlock 0xff800000 0x40000 32 > 8272>erase 0xFF800000 BLOCK > 8272>prog 0xFF800000 u-boot.bin BIN > > 3. Move JP9 in position MEMORY > > 4. Power cycle > > 5. Board keeps resetting with or without BDI. > > Can anybody help, please? > Thank you > > > > --__--__-- Message: 4 From: Yuli Barcohen <yuli(a)arabellasw.com> Date: Wed, 2 Nov 2005 11:46:39 +0200 To: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> CC: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Low-boot configuration for MPC8272ADS >>>>> Dmytro Bablinyuk writes: Dmytro> I've seen one thread on this subject Dmytro> http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/19224 Dmytro> and tried to repeat the same trick. Dmytro> 1. I have updated (latest snapshot) u-boot: Dmytro> include/configs/MPC8260ADS.h Dmytro> #define CFG_HRCW_MASTER 0x0e72b605 IMHO this HRCW value is incompatible with MPC8272 (reserved fields are not cleared, for example). Read the chip's manual to find correct values (or copy them from BCSR-supplied HRCW). Dmytro> board/mpc8260ads/config.mk Dmytro> TEXT_BASE = 0xff800000 This is unnecessary because lowboot_config takes care of TEXT_BASE. Dmytro> 2. Using BDI2000 (MPC8272ADS JP9 is configured to take Hard Dmytro> Reset Configuration source from BCSR - otherwise board Dmytro> keep reseting) Probably because your BDI configuration file tries to use default IMMR 0x0F000000 while in fact the IMMR is 0xF0000000 due to the HRCW. Dmytro> load Dmytro> unlock 0xff800000 0x40000 32 Dmytro> erase 0xFF800000 BLOCK Dmytro> prog 0xFF800000 u-boot.bin BIN Dmytro> 3. Change JP9 to take Hard Reset Configuration from FLASH Dmytro> (SW2 Boot Source is FLASH) Dmytro> After power cycling BDI and board - the board keep reseting Dmytro> (BDI is attached to the board). See above. Dmytro> Yes, 0xFFF00100 is not valid breakpoint anymore - I guess it Dmytro> should be something like 0x00000100. But I suspect even I Dmytro> got u-boot wrong BDI still should "freeze" the board instead Dmytro> of reseting. Is anyone got BDI and u-boot working on Dmytro> MPC8272ADS in low boot mode? Any help is really Dmytro> appreciated. Below is output of BDI while reseting and BDI Dmytro> init from config file. [...deleted...] -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== --__--__-- Message: 5 Date: Wed, 2 Nov 2005 01:54:54 -0800 (PST) From: Boris <br_sing(a)yahoo.com> To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] custom mpc83xx based board support Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com --__--__-- Message: 6 To: u-boot-users(a)lists.sourceforge.net From: Dmytro Bablinyuk <dmytro.bablinyuk(a)rftechnology.com.au> Date: Wed, 02 Nov 2005 20:56:13 +1100 Subject: [U-Boot-Users] Re: Low-boot configuration for MPC8272ADS > > Please apply my patch with Flash HRCW for MPC8272ADS and try > then the MPC8272ADS_lowboot_config. This worked fine for me > > http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19395 > Thank you very much Alex, As I understand, there is a patch that is not included in current u-boot snapshot. Sorry, could you please attach that patch or post a link (the link above is a link to my original message). Do you know why BDI keeps resetting - is it because HRCW couldn't be read? What about if flash is blank? Thank you --__--__-- Message: 7 From: Chu hanjin-r52514 <Hanjin.Chu(a)freescale.com> To: "'Boris'" <br_sing(a)yahoo.com>, u-boot-users(a)lists.sourceforge.net Subject: RE: [U-Boot-Users] custom mpc83xx based board support Date: Wed, 2 Nov 2005 18:09:07 +0800 You can take 8349ADS code as reference by make MPC8349ADS_config under u-boot. This code has worked on MPC8349E Processor Card made by Freescale. The 2.6 kernel also support this board. I think most of the code dont need to be modified. You can compare the hardware between your board and Freescale reference board. Best Regards Neil Chu -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of Boris Sent: Wednesday, November 02, 2005 5:55 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] custom mpc83xx based board support Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com ------------------------------------------------------- SF.Net email is sponsored by: Tame your development challenges with Apache's Geronimo App Server. Download it for free - -and be entered to win a 42" plasma tv or your very own Sony(tm)PSP. Click here to play: http://sourceforge.net/geronimo.php _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users --__--__-- Message: 8 To: Boris <br_sing(a)yahoo.com> Cc: u-boot-users(a)lists.sourceforge.net From: Wolfgang Denk <wd(a)denx.de> Subject: Re: [U-Boot-Users] custom mpc83xx based board support Date: Wed, 02 Nov 2005 11:58:17 +0100 In message <20051102095455.97277.qmail(a)web36315.mail.mud.yahoo.com> you w= rote: >=20 > I'm planning to prepare embedded Linux installation > on custom made board using mpc83xx CPU. As much as I > understand, to support it I'll need to write support=20 > code in boards directory and header file in=20 > include/configs. What are the chances that existing > code for mpc8349ads will work ? and if not can I cook It will not work. You will hav e to port U-Boot to your hardware. There is no way around this. > something based on this code with minimal changes ? > Another question is whether 2.6.* kernel configured > and built for mpc83xx family should work with any > board > based on this CPU or some board specific changes=20 > must be done in the kernel ?=20 Yes. See for example the TQM834x support in U-Boot and Linux 2.6 (patches submitted on the mailing list, checked in on our GIT repo). Best regards, Wolfgang Denk --=20 Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Gods don't like people not doing much work. People who aren't busy all the time might start to _think_. - Terry Pratchett, _Small Gods_ --__--__-- Message: 9 Date: Wed, 02 Nov 2005 07:58:32 -0500 From: Jerry Van Baren <gerald.vanbaren(a)smiths-aerospace.com> To: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Help about tftp download Li Weichen wrote: >>Another suggestion: from a (linux) box command line, tftp to your server >>and verify that it works. Your message is indicating that your server >>is 192.168.4.1 and the file you are trying to get is >>/tftpboot/u-boot.bin so do the following (I'm typing this from memory, >>so it may not be quite right)... >> >>$ tftp 192.168.4.1 >>tftp> get /tftpboot/u-boot.bin > > Sorry but after I typed tftp 192.168.4.1, it came up with message looks like > get uImage froam tftp server automatically. > >>Getting TFTP to work (i.e. properly configured) usually solves the >>problem in my experience. >> >>gvb Hi Li, You result description ment nothing to me. Please cut & paste real messages. Are you typing "tftp 192.168.4.1" from your _host_ (linux server) command line? OK, I ran a real instance on my home box (Debian 3.1 x86) vanbaren@dellserver:~$ uname -a Linux dellserver.lan 2.4.27-050821 #17 SMP Sun Aug 21 22:46:01 EDT 2005 i686 GNU/Linux vanbaren@dellserver:~$ dpkg-query -l "*tftp*" Desired=Unknown/Install/Remove/Purge/Hold | Status=Not/Installed/Config-files/Unpacked/Failed-config/Half-installed |/ Err?=(none)/Hold/Reinst-required/X=both-problems (Status,Err: uppercase=bad) ||/ Name Version Description +++-==============-==============-====================================== ====== ii tftp 0.17-13 Trivial file transfer protocol client ii tftpd 0.17-13 Trivial file transfer protocol server vanbaren@dellserver:~$ ls /tftpboot/hello_world hello_world vanbaren@dellserver:~$ tftp localhost tftp> get hello_world Received 101214 bytes in 0.1 seconds tftp> get /tftpboot/hello_world Received 101214 bytes in 0.0 seconds tftp> quit vanbaren@dellserver:~$ grep tftp /etc/inetd.conf tftp dgram udp wait nobody /usr/sbin/tcpd /usr/sbin/in.tftpd /tftpboot I was a little surprised that the tftp "get" worked with the /tftpboot full path. On a different box that I used (RH), it is configured as "-s /tftpboot" for the option (rather than "/tftpboot") so tftpd treats paths as relative to /tftpboot and thus the get "/tftpboot/foo" won't work because there is no /tftpboot/tftpboot/foo on the server. This should not be your problem since your configuration matches mine. HTH, gvb --__--__-- Message: 10 Date: Wed, 2 Nov 2005 14:18:53 +0100 To: Mike Rapoport <mike.rapoport(a)gmail.com> Cc: Wolfgang Denk <wd(a)denx.de>, Terence Soh <Terence.Soh(a)appliedbiosystems.com>, u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] NAND flash support From: Ladislav Michl <ladis(a)linux-mips.org> On Tue, Nov 01, 2005 at 04:22:28PM +0200, Mike Rapoport wrote: > I've tried to make it as clean as possible, but there still may be > some junk I used for debugging. Thanks a lot. Updated version (with timeout handling) follows - generated against testing-NAND branch. Wolfgang, could you apply? I also got another board with NAND chip for testing and I was able to reproduce your problem with with bus error. I'll look at it as soon as I get some spare time. Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> CHANGELOG: * Add hook to NAND erase and implement nand_wait function. Patch by Mike Rapoport, 1 Nov 2005 diff --git a/common/Makefile b/common/Makefile --- a/common/Makefile +++ b/common/Makefile @@ -37,7 +37,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug. cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ - cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_nand.o cmd_nand_new.o cmd_net.o cmd_nvedit.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o devices.o dlmalloc.o docecc.o \ diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c --- a/drivers/nand/nand_base.c +++ b/drivers/nand/nand_base.c @@ -189,7 +189,11 @@ static void nand_release_device (struct spin_unlock (&this->chip_lock); } #else -#define nand_release_device(mtd) do {} while(0) +static void nand_release_device (struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + this->select_chip(mtd, -1); /* De-select the NAND device */ +} #endif /** @@ -831,8 +835,34 @@ static int nand_wait(struct mtd_info *mt #else static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) { - /* TODO */ - return 0; + unsigned long timeo; + + if (state == FL_ERASING) + timeo = CFG_HZ * 400; + else + timeo = CFG_HZ * 20; + + if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) + this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); + else + this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + + reset_timer_masked(); + + while (1) { + if (get_timer_masked() > timeo) + return 0; + + if (this->dev_ready) { + if (this->dev_ready(mtd)) + break; + } else { + if (this->read_byte(mtd) & NAND_STATUS_READY) + break; + } + } + + return this->read_byte(mtd); } #endif diff --git a/include/bmp_logo.h b/include/bmp_logo.h diff --git a/include/nand.h b/include/nand.h --- a/include/nand.h +++ b/include/nand.h @@ -50,7 +50,14 @@ static inline int nand_block_isbad(nand_ static inline int nand_erase(nand_info_t *info, ulong off, ulong size) { - return 0; /* FIXME */ + struct erase_info instr; + + instr.mtd = info; + instr.addr = off; + instr.len = size; + instr.callback = 0; + + return info->erase(info, &instr); } #endif --__--__-- Message: 11 Date: Wed, 02 Nov 2005 13:49:03 +0100 To: wd(a)denx.de From: Denis Peter <d.peter(a)mpl.ch> Cc: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] [PATCH] Add ECC check to MIP405 specific Memtest --=====================_20085110==_ Content-Type: text/plain; charset="us-ascii"; format=flowed Dear Wolfgang, the attached patch against the current CVS adds ECC check to the MIP405 specific Memtest. CHANGELOG: * Patch by Denis Peter, 2. Nov 2005 add ECC Check to MIP405 specific Memtest With best regards, Denis ---------------------------------------------- MPL AG CH-5405 Daettwil Switzerland http://www.mpl.ch Tel. ++41 (0)56 483 34 34 Fax ++41 (0)56 493 30 20 --=====================_20085110==_ Content-Type: application/octet-stream; name="checkecc.patch" Content-Disposition: attachment; filename="checkecc.patch" Content-Transfer-Encoding: base64 ZGlmZiAtcHVyTiB1LWJvb3Qtb3JpZy9ib2FyZC9tcGwvY29tbW9uL21lbXRzdC5jIHUtYm9v dC9i b2FyZC9tcGwvY29tbW9uL21lbXRzdC5jCi0tLSB1LWJvb3Qtb3JpZy9ib2FyZC9tcGwvY29t bW9u L21lbXRzdC5jCTIwMDUtMTEtMDEgMTE6MjI6MzguMDAwMDAwMDAwICswMTAwCisrKyB1LWJv b3Qv Ym9hcmQvbXBsL2NvbW1vbi9tZW10c3QuYwkyMDA1LTExLTAxIDExOjMxOjE1LjAwMDAwMDAw MCAr MDEwMApAQCAtMjIsMjggKzIyLDYgQEAKICAqCiAgKi8KIAotLyogTk9UIFVzZWQgeWV0Li4u Ci0g IGFkZCBmb2xsb3dpbmcgY29kZSB0byBQSVA0MDUuYyA6Ci1pbnQgdGVzdGRyYW0gKHZvaWQp Ci17 Ci0JdW5zaWduZWQgY2hhciBzWzMyXTsKLQlpbnQgaTsKLQotCWkgPSBnZXRlbnZfciAoInRl c3Rt ZW0iLCBzLCAzMik7Ci0JaWYgKGkgIT0gMCkgewotCQlpID0gKGludCkgc2ltcGxlX3N0cnRv dWwg KHMsIE5VTEwsIDEwKTsKLQkJaWYgKChpID4gMCkgJiYgKGkgPCAweGYpKSB7Ci0JCQlwcmlu dGYg KCJ0ZXN0aW5nICIpOwotCQkJaSA9IG1lbV90ZXN0ICgwLCByYW1zaXplLCBpKTsKLQkJCWlm IChp ID4gMCkKLQkJCQlwcmludGYgKCJFUlJPUiAiKTsKLQkJCWVsc2UKLQkJCQlwcmludGYgKCJP ayAi KTsKLQkJfQotCX0KLQlyZXR1cm4gKDEpOwotfQotKi8KIAogCiAjaW5jbHVkZSA8Y29tbW9u Lmg+ CkBAIC01ODIsNiArNTYwLDUyIEBAIGludCBtZW1fdGVzdCAodW5zaWduZWQgbG9uZyBzdGFy dCwg dW5zaWcKIAkJd2hpbGUgKHByb2ctLSA+IDApCiAJCQlwcmludGYgKCJcYiBcYiIpOwogCX0K KyNp ZmRlZiBDT05GSUdfNDA1R1AKKwkvKiBDaGVjayBFQ0MgKi8KKwltdGRjciAobWVtY2ZnYSwg bWVt X2VjY2NmKTsKKwlpID0gbWZkY3IgKG1lbWNmZ2QpOworCWlmIChpKSB7IC8qIGVjYyBlbmFi bGVk ICovCisJCW10ZGNyIChtZW1jZmdhLCBtZW1fZWNjZXJyKTsKKwkJaSA9IG1mZGNyIChtZW1j Zmdk KTsKKwkJaSAmPSAweEZGRjBGMDAwOyAvKiBtYXNrIHVudXNlZCBiaXRzICovCisJCWlmIChp KSB7 CisJCQlwdXRzICgiXG5FUlJPUiBpbiBFQ0M6XG4iKTsKKwkJCWlmIChpICYgMHhGMDAwMDAw MCkg eworCQkJCWZvciAocHJvZyA9IDA7IHByb2cgPCA0O3Byb2crKykgeworCQkJCQkvKiB0aGlz IG1h eSBiZSBkb2N1bWVudGVkIHRoZSB3cm9uZyB3YXk6CisJCQkJCSAqIEFuIGVycm9yIG9uIEQ2 IGNh dXNlcyB0byBzZXQgdGhlIEVycm9yIGluIGxhbmUgMworCQkJCQkgKiBpbnN0ZWFkIG9mIGxh bmUg MAorCQkJCQkgKiBpZigoaSYweEYwMDAwMDAwKSAmICgweDEwMDAwMDAwIDw8IHByb2cpKQor CQkJ CQkgKi8KKwkJCQkJaWYgKChpICYgMHhGMDAwMDAwMCkgJiAoMHg4MDAwMDAwMCA+PiBwcm9n KSkK KwkJCQkJCXByaW50ZiAoIiAgLSBFdmVuIFdvcmQgTGFuZSAlZFxuIixwcm9nKTsKKwkJCQl9 CisJ CQl9CisJCQlpZiAoaSAmIDB4MEYwMDAwMDApIHsKKwkJCQlmb3IgKHByb2cgPSAwOyBwcm9n IDwg NDsgcHJvZysrKSB7CisJCQkJCS8qIHNlZSBhYm92ZSAqLworCQkJCQlpZiAoKGkgJiAweDBG MDAw MDAwKSAmICgweDA4MDAwMDAwID4+IHByb2cpKQorCQkJCQkJcHJpbnRmICgiICAtIE9kZCBX b3Jk IExhbmUgJWRcbiIscHJvZyk7CisJCQkJfQorCQkJfQorCQkJaWYgKGkgJiAweDAwQzAwMDAw KSB7 CisJCQkJcHJpbnRmICgiIC0gRUNDIEVycm9yIGluICVzJXNDaGVjayBCaXRzXG4iLAorCQkJ CQko aSAmIDB4MDA4MDAwMDApID8gImxvd2VyICIgOiAiIiwKKwkJCQkJKGkgJiAweDAwNDAwMDAw KSA/ ICJ1cHBlciAiIDogIiIpOworCQkJfQorCQkJaWYgKGkgJiAweDAwMDBGMDAwKSB7CisJCQkJ Zm9y IChwcm9nID0gMDsgcHJvZyA8IDQ7IHByb2crKykgeworCQkJCQlpZiAoKGkgJiAweDAwMDBG MDAw KSAmICgweDAwMDA4MDAwID4+IHByb2cpKQorCQkJCQkJcHJpbnRmICgiICAtIGluIEJhbmsg JWRc biIscHJvZyk7CisJCQkJfQorCQkJfQorCQkJc3RhdHVzPVRFU1RfRkFJTEVEOworCQl9CisJ CWVs c2UgeworCQkJcHV0cyAoIlxuRUNDIEJpdCdzIE9rXG4iKTsKKwkJfQorCX0KKyNlbmRpZgog CiAJ aWYgKHN0YXR1cyA9PSBURVNUX0ZBSUxFRCkKIAkJZXJyb3JzKys7Cg== --=====================_20085110==_-- --__--__-- _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users End of U-Boot-Users Digest

2 1

RE: [U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix
by Jate Sujjavanich 06 Dec '05

06 Dec '05

This patch is properly formatted. Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 18:16:22 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) +AFLAGS_DEBUG := -Wa,-gstabs,-S +endif +else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of Jate Sujjavanich Sent: Tuesday, December 06, 2005 12:08 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 16:57:10 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) AFLAGS_DEBUG := +-Wa,-gstabs,-S endif else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)

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[U-Boot-Users] PATCH - Coldfire gcc3.4 compiling fix
by Jate Sujjavanich 06 Dec '05

06 Dec '05

I have been searching the archives for the solution to this problem when compiling u-boot for the M5282EVB with GCC 3.4.0: /home/jate/tim-firmware/u-boot/cpu/mcf52x2/start.S:345: Fatal error: Tried to convert PC relative conditional branch to absolute jump Turning on the -S option fixes this. This led to this error: flash.c: In function `flash_print_info': flash.c:69: error: label at end of compound statement This is also fixed below. I do not have an M5282EVB board, so I cannot test the binaries generated. Can anyone help test? - Jate S. Index: config.mk =================================================================== RCS file: /cvsroot/u-boot/u-boot/config.mk,v retrieving revision 1.14 diff -u -r1.14 config.mk --- config.mk 4 Oct 2005 21:11:34 -0000 1.14 +++ config.mk 6 Dec 2005 16:57:10 -0000 @@ -139,7 +139,14 @@ endif endif +# turn jbsr into jsr for m68k +ifeq ($(ARCH),m68k) +ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4) +AFLAGS_DEBUG := -Wa,-gstabs,-S +endif +else AFLAGS_DEBUG := -Wa,-gstabs +endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) Index: flash.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/board/m5282evb/flash.c,v retrieving revision 1.1 diff -u -r1.1 flash.c --- flash.c 8 Dec 2003 01:34:37 -0000 1.1 +++ flash.c 6 Dec 2005 16:30:08 -0000 @@ -65,6 +65,7 @@ printf ("\n"); Done: + ; /* for gcc3.4.0 compiling */ }

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[U-Boot-Users] PPC405EP CPC0_PCI init vs. update
by Scott McNutt 06 Dec '05

06 Dec '05

Hi All, In cpu/ppc4xx/start.S, the CPC0_PCI register is _initialized_, rather than being simply _updated_. This clears bits that are set during bootstrap from a serial eeprom. E.g. for the PerWE/PCI_INT mux, CPC0_PCI[SPE] always gets cleared. I'm proposing a simple change and would like some feedback ... it's not clear to me if this will cause problems for existing boards. Comments welcome :-) Regards, --Scott =============================================================== --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1539,7 +1539,8 @@ ppc405ep_init: mtdcr ebccfgd,r3 #endif - addi r3,0,CPC0_PCI_HOST_CFG_EN + mfdcr r3, CPC0_PCI + ori r3,r3,CPC0_PCI_HOST_CFG_EN #ifdef CONFIG_BUBINGA /* !-----------------------------------------------------------------------

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RE: [U-Boot-Users] mpc85xx FCC ethernet
by Nuno João (Ext_NBS) 06 Dec '05

06 Dec '05

Hello All, The problem has been solved. The only change necessary to put current u-boot's mpc85xx FCC code to work on MPC8541E is the one that I mentioned in my first email in this thread. The other one was a typical case of "problem between the monitor and the chair", discovered by my collegue Steffen: I was doing tftp to ram address 0x0 :|. Thank you and Best Regards > My main question is: has anyone ever used FCC as ethernet on u-boot > for mpc85xx, and with what success?

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[U-Boot-Users] troubles
by Alexandr Kuleschov 06 Dec '05

06 Dec '05

Hi people! I work with based on AT91RM9200 board. (SDRAM 16Mbitx16) When i use "mtest" then U-BOOT does not work But if to change a line #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 to a line #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 2000000 works correctly How to solve a problem? Thank Alexandr

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RE: [U-Boot-Users] mpc85xx FCC ethernet
by Ho Jeffrey-r26191 06 Dec '05

06 Dec '05

MPC8541/55 have CPM lite compare to CPM for MPC8560. The dport ram size is different. To make the FCC code work for CPM lite, the dport RAM pointers (various pointers used by the RISC) need to be adjusted. Regards, Jeffrey Ho > -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net > [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf > Of Wolfgang Denk > Sent: Tuesday, December 06, 2005 4:12 AM > To: Nuno Joao (Ext_NBS) > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: [U-Boot-Users] mpc85xx FCC ethernet > > In message > <0248B0F35AF7B8418CA72E88AC00BF1F8884A9(a)lisi053a.siemens.pt> > you wrote: > > > > My main question is: has anyone ever used FCC as ethernet on u-boot > > for mpc85xx, and with what success? > > It works well for us on MPC8560, and also the FEC on the > MPC8540 works fine. But the same code on the basicly the > same hardware (just different CPU) fails for MPC8541 and MPC8555. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: > wd(a)denx.de Some people march to the beat of a different > drummer. And some people tango! > > > ------------------------------------------------------- > This SF.net email is sponsored by: Splunk Inc. Do you grep > through log files > for problems? Stop! Download the new AJAX search engine that makes > searching your log files as easy as surfing the web. > DOWNLOAD SPLUNK! > http://ads.osdn.com/?ad_idv37&alloc_id865&op=click > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users >

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[U-Boot-Users] mpc85xx FCC ethernet
by Nuno João (Ext_NBS) 05 Dec '05

05 Dec '05

Hello All, I'm trying to use ethernet FCC on an board using MPC8541E, and I'm having some problems. First of all, current code on u-boot has a "known issue" that prevents it from working, which makes me wonder if someone out there has ever used this code. You can find further details at http://ozlabs.org/pipermail/linuxppc-embedded/2004-November/016050.html but, basically, there was a parameter set to use a reserved area in DPRAM. I changed CPM_FCC_SPECIAL_BASE fro 0xb000 to 0x9000 on include/asm-ppc/cpm_85xx.h. However, even with this change, I can only do tftp of small files (a 1 to 3 tftp packets), otherwise u-boot hangs. If I stop it afterward with a debugger, the CPU is executing in "no man's land". My main question is: has anyone ever used FCC as ethernet on u-boot for mpc85xx, and with what success? Thanks and Best Regards, Nuno

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[U-Boot-Users] build error probably due to include file paths problem
by Surinder 05 Dec '05

05 Dec '05

Hi, I downloaded u-boot-1.1.3.tar from and untarred as u-boot-1.1.3 sh-3.00$ uname -a Linux linux 2.6.13-15-default #1 Tue Sep 13 14:56:15 UTC 2005 i686 i686 i386 GNU/Linux sh-3.00$ cat /etc/issue Welcome to SUSE LINUX 10.0 (i586) - Kernel \r (\l). # echo $PATH /export/em/gnuarm/gnuarm-3.4.3/libexec/gcc/arm-elf/3.4.3:/export/em/gnuarm/gnuarm-3.4.3/arm-elf/bin:/export/em/gnuarm/gnuarm-3.4.3/bin:/home/surinder/bin:/usr/local/bin:/usr/bin:/usr/X11R6/bin:/bin:/usr/games:/opt/gnome/bin:/opt/kde3/bin:/usr/lib/mit/bin:/usr/lib/mit/sbin I got the gnuarm from gnuarm.org # arm-elf-gcc -v Reading specs from /export/em/gnuarm/gnuarm-3.4.3/bin/../lib/gcc/arm-elf/3.4.3/specs Configured with: ../gcc-3.4.3/configure --target=arm-elf --prefix=/srv/shared/gnuarm/gnuarm-3.4.3 --enable-interwork --enable-multilib --with-newlib --with-headers=../newlib-1.12.0/newlib/libc/include --enable-languages=c,c++,java --disable-libgcj Thread model: single gcc version 3.4.3 # arm-elf-gcc -dumpmachine arm-elf changed the CROSS_COMPILE in file u-boot-1.1.3/Makefile CROSS_COMPILE = arm-elf- # make distclean # make omap5912osk_config Configuring for omap5912osk board... # make ( it gives a lot of short-load-bytes errors ) cc1: error: invalid option `short-load-bytes' in README I saw using 'make all' too so tried that It appears to be unable to find some header files but I could not figure out the best way to specify that. I was looking for some INCLUDES kind of variable. # make all sh-3.00$ make all make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/tools' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/tools' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/examples' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/examples' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/post' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/post' make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/post/cpu' make[1]: `.depend' is up to date. make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/post/cpu' make -C tools all make[1]: Entering directory `/export/em/u-boot/u-boot-1.1.3/tools' gcc -Wall -pedantic -idirafter ../include -DTEXT_BASE=0x11080000 -DUSE_HOSTCC -O -c -o img2srec.o img2srec.c img2srec.c:55:20: stddef.h: No such file or directory img2srec.c:56:19: stdio.h: No such file or directory img2srec.c:57:20: stdlib.h: No such file or directory img2srec.c:58:19: ctype.h: No such file or directory img2srec.c:59:20: string.h: No such file or directory In file included from img2srec.c:60: ../include/elf.h:58: error: parse error before "Elf32_Addr" ../include/elf.h:58: error: ISO C forbids data definition with no type or storage class ../include/elf.h:59: error: parse error before "Elf32_Off" ../include/elf.h:59: error: ISO C forbids data definition with no type or storage class ../include/elf.h:60: error: parse error before "Elf32_Sword" ../include/elf.h:60: error: ISO C forbids data definition with no type or storage class ../include/elf.h:61: error: parse error before "Elf32_Word" ../include/elf.h:61: error: ISO C forbids data definition with no type or storage class ../include/elf.h:62: error: parse error before "Elf32_Half" ../include/elf.h:62: error: ISO C forbids data definition with no type or storage class ../include/elf.h:123: error: parse error before "Elf32_Half" ../include/elf.h:124: error: ISO C forbids data definition with no type or storage class ../include/elf.h:125: error: parse error before "e_version" ../include/elf.h:125: error: ISO C forbids data definition with no type or storage class ../include/elf.h:126: error: parse error before "e_entry" ../include/elf.h:126: error: ISO C forbids data definition with no type or storage class ../include/elf.h:127: error: parse error before "e_phoff" ../include/elf.h:127: error: ISO C forbids data definition with no type or storage class ../include/elf.h:128: error: parse error before "e_shoff" ../include/elf.h:128: error: ISO C forbids data definition with no type or storage class ../include/elf.h:129: error: parse error before "e_flags" ../include/elf.h:129: error: ISO C forbids data definition with no type or storage class ../include/elf.h:130: error: parse error before "e_ehsize" ../include/elf.h:130: error: ISO C forbids data definition with no type or storage class ../include/elf.h:131: error: parse error before "e_phentsize" ../include/elf.h:131: error: ISO C forbids data definition with no type or storage class ../include/elf.h:132: error: parse error before "e_phnum" ../include/elf.h:132: error: ISO C forbids data definition with no type or storage class ../include/elf.h:133: error: parse error before "e_shentsize" ../include/elf.h:133: error: ISO C forbids data definition with no type or storage class ../include/elf.h:134: error: parse error before "e_shnum" ../include/elf.h:134: error: ISO C forbids data definition with no type or storage class ../include/elf.h:135: error: parse error before "e_shstrndx" ../include/elf.h:135: error: ISO C forbids data definition with no type or storage class ../include/elf.h:137: error: ISO C forbids data definition with no type or storage class ../include/elf.h:243: error: parse error before "Elf32_Word" ../include/elf.h:245: error: ISO C forbids data definition with no type or storage class ../include/elf.h:246: error: parse error before "sh_flags" ../include/elf.h:246: error: ISO C forbids data definition with no type or storage class ../include/elf.h:247: error: parse error before "sh_addr" ../include/elf.h:247: error: ISO C forbids data definition with no type or storage class ../include/elf.h:248: error: parse error before "sh_offset" ../include/elf.h:248: error: ISO C forbids data definition with no type or storage class ../include/elf.h:249: error: parse error before "sh_size" ../include/elf.h:249: error: ISO C forbids data definition with no type or storage class ../include/elf.h:250: error: parse error before "sh_link" ../include/elf.h:250: error: ISO C forbids data definition with no type or storage class ../include/elf.h:251: error: parse error before "sh_info" ../include/elf.h:251: error: ISO C forbids data definition with no type or storage class ../include/elf.h:252: error: parse error before "sh_addralign" ../include/elf.h:252: error: ISO C forbids data definition with no type or storage class ../include/elf.h:253: error: parse error before "sh_entsize" ../include/elf.h:253: error: ISO C forbids data definition with no type or storage class ../include/elf.h:254: error: ISO C forbids data definition with no type or storage class ../include/elf.h:353: error: parse error before "Elf32_Word" ../include/elf.h:354: error: ISO C forbids data definition with no type or storage class ../include/elf.h:355: error: parse error before "st_size" ../include/elf.h:355: error: ISO C forbids data definition with no type or storage class ../include/elf.h:358: error: parse error before "st_shndx" ../include/elf.h:358: error: ISO C forbids data definition with no type or storage class ../include/elf.h:359: error: ISO C forbids data definition with no type or storage class ../include/elf.h:403: error: parse error before "Elf32_Addr" ../include/elf.h:404: error: ISO C forbids data definition with no type or storage class ../include/elf.h:405: error: ISO C forbids data definition with no type or storage class ../include/elf.h:410: error: parse error before "Elf32_Addr" ../include/elf.h:411: error: ISO C forbids data definition with no type or storage class ../include/elf.h:412: error: parse error before "r_addend" ../include/elf.h:412: error: ISO C forbids data definition with no type or storage class ../include/elf.h:413: error: ISO C forbids data definition with no type or storage class ../include/elf.h:422: error: parse error before "Elf32_Word" ../include/elf.h:423: error: ISO C forbids data definition with no type or storage class ../include/elf.h:424: error: parse error before "p_vaddr" ../include/elf.h:424: error: ISO C forbids data definition with no type or storage class ../include/elf.h:425: error: parse error before "p_paddr" ../include/elf.h:425: error: ISO C forbids data definition with no type or storage class ../include/elf.h:426: error: parse error before "p_filesz" ../include/elf.h:426: error: ISO C forbids data definition with no type or storage class ../include/elf.h:427: error: parse error before "p_memsz" ../include/elf.h:427: error: ISO C forbids data definition with no type or storage class ../include/elf.h:428: error: parse error before "p_flags" ../include/elf.h:428: error: ISO C forbids data definition with no type or storage class ../include/elf.h:429: error: parse error before "p_align" ../include/elf.h:429: error: ISO C forbids data definition with no type or storage class ../include/elf.h:430: error: ISO C forbids data definition with no type or storage class ../include/elf.h:457: error: parse error before "Elf32_Sword" ../include/elf.h:460: error: parse error before "Elf32_Word" ../include/elf.h:461: error: ISO C forbids data definition with no type or storage class ../include/elf.h:462: error: ISO C forbids data definition with no type or storage class ../include/elf.h:463: error: parse error before '}' token ../include/elf.h:463: error: ISO C forbids data definition with no type or storage class ../include/elf.h:465: error: parse error before "_DYNAMIC" ../include/elf.h:465: error: ISO C forbids data definition with no type or storage class img2srec.c:61:20: unistd.h: No such file or directory img2srec.c:62:19: errno.h: No such file or directory img2srec.c:81: error: parse error before "CHAR" img2srec.c:81: warning: type defaults to `int' in declaration of `CHAR' img2srec.c:81: error: ISO C forbids data definition with no type or storage class img2srec.c:82: error: parse error before "BYTE" img2srec.c:82: warning: type defaults to `int' in declaration of `BYTE' img2srec.c:82: error: ISO C forbids data definition with no type or storage class img2srec.c:83: error: parse error before "WORD" img2srec.c:83: warning: type defaults to `int' in declaration of `WORD' img2srec.c:83: error: ISO C forbids data definition with no type or storage class img2srec.c:84: error: parse error before "DWORD" img2srec.c:84: warning: type defaults to `int' in declaration of `DWORD' img2srec.c:84: error: ISO C forbids data definition with no type or storage class img2srec.c:95: error: parse error before '*' token img2srec.c:96: error: parse error before '*' token img2srec.c:97: error: parse error before '*' token img2srec.c:98: error: parse error before '*' token img2srec.c:98: error: parse error before '*' token img2srec.c:98: warning: type defaults to `int' in declaration of `ExtractWord' img2srec.c:98: error: ISO C forbids data definition with no type or storage class img2srec.c:99: error: parse error before '*' token img2srec.c:99: error: parse error before '*' token img2srec.c:99: warning: type defaults to `int' in declaration of `ExtractLong' img2srec.c:99: error: ISO C forbids data definition with no type or storage class img2srec.c:100: error: parse error before '*' token img2srec.c:100: error: parse error before "count" img2srec.c:100: warning: type defaults to `int' in declaration of `ExtractBlock'img2srec.c:100: error: ISO C forbids data definition with no type or storage class img2srec.c:101: error: parse error before "BYTE" img2srec.c:102: error: parse error before "WORD" img2srec.c:104: error: parse error before "DWORD" img2srec.c:111: error: parse error before '*' token img2srec.c: In function `ExtractHex': img2srec.c:113: error: parse error before "num" img2srec.c:117: error: `getPtr' undeclared (first use in this function) img2srec.c:117: error: (Each undeclared identifier is reported only once img2srec.c:117: error: for each function it appears in.) img2srec.c:118: error: `num' undeclared (first use in this function) img2srec.c:120: error: `c' undeclared (first use in this function) img2srec.c:121: error: `digit' undeclared (first use in this function) img2srec.c:121: error: called object is not a function img2srec.c:122: error: called object is not a function img2srec.c:123: error: called object is not a function img2srec.c:129: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:133: error: parse error before '*' token img2srec.c: In function `ExtractDecimal': img2srec.c:135: error: parse error before "num" img2srec.c:139: error: `getPtr' undeclared (first use in this function) img2srec.c:140: error: `num' undeclared (first use in this function) img2srec.c:142: error: `c' undeclared (first use in this function) img2srec.c:143: error: `digit' undeclared (first use in this function) img2srec.c:143: error: called object is not a function img2srec.c:149: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:154: error: parse error before '*' token img2srec.c: In function `ExtractNumber': img2srec.c:158: error: `getPtr' undeclared (first use in this function) img2srec.c:165: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:174: error: parse error before '*' token img2srec.c:174: error: parse error before '*' token img2srec.c:175: warning: return type defaults to `int' img2srec.c: In function `ExtractWord': img2srec.c:176: error: parse error before "x" img2srec.c:177: error: `x' undeclared (first use in this function) img2srec.c:177: error: `buffer' undeclared (first use in this function) img2srec.c:179: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:184: error: parse error before '*' token img2srec.c:184: error: parse error before '*' token img2srec.c:185: warning: return type defaults to `int' img2srec.c: In function `ExtractLong': img2srec.c:186: error: parse error before "x" img2srec.c:187: error: `x' undeclared (first use in this function) img2srec.c:187: error: `buffer' undeclared (first use in this function) img2srec.c:191: error: `value' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:196: error: parse error before '*' token img2srec.c:196: error: parse error before "count" img2srec.c:197: warning: return type defaults to `int' img2srec.c: In function `ExtractBlock': img2srec.c:198: error: `count' undeclared (first use in this function) img2srec.c:198: error: `data' undeclared (first use in this function) img2srec.c:198: error: `buffer' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:203: error: parse error before "BYTE" img2srec.c: In function `WriteHex': img2srec.c:205: error: parse error before "temp" img2srec.c:209: error: `pCheckSum' undeclared (first use in this function) img2srec.c:209: error: `value' undeclared (first use in this function) img2srec.c:210: error: `temp' undeclared (first use in this function) img2srec.c:211: error: `pa' undeclared (first use in this function) img2srec.c: At top level: img2srec.c:218: error: parse error before "WORD" img2srec.c: In function `BuildSRecord': img2srec.c:221: error: parse error before "addrLen" img2srec.c:226: error: `sType' undeclared (first use in this function) img2srec.c:230: error: `addrLen' undeclared (first use in this function) img2srec.c:241: error: `pa' undeclared (first use in this function) img2srec.c:246: error: `sRLen' undeclared (first use in this function) img2srec.c:246: error: `nCount' undeclared (first use in this function) img2srec.c:247: error: `checkSum' undeclared (first use in this function) img2srec.c:248: error: parse error before "sRLen" img2srec.c:251: error: `i' undeclared (first use in this function) img2srec.c:252: error: `addr' undeclared (first use in this function) img2srec.c:252: error: called object is not a function img2srec.c:257: error: `data' undeclared (first use in this function) img2srec.c:262: error: parse error before "checkSum" img2srec.c: At top level: img2srec.c:268: error: parse error before "DWORD" img2srec.c: In function `ConvertELF': img2srec.c:270: error: `FILE' undeclared (first use in this function) img2srec.c:270: error: `file' undeclared (first use in this function) img2srec.c:271: warning: ISO C90 forbids mixed declarations and code img2srec.c:273: error: parse error before "rxBlock" img2srec.c:280: error: `getPtr' undeclared (first use in this function) img2srec.c:281: warning: ISO C90 forbids mixed declarations and code img2srec.c:286: warning: implicit declaration of function `fopen' img2srec.c:286: error: `fileName' undeclared (first use in this function) img2srec.c:286: error: `NULL' undeclared (first use in this function) img2srec.c:287: warning: implicit declaration of function `fprintf' img2srec.c:287: error: `stderr' undeclared (first use in this function) img2srec.c:287: warning: implicit declaration of function `strerror' img2srec.c:287: warning: format argument is not a pointer (arg 4) img2srec.c:292: warning: implicit declaration of function `fread' img2srec.c:292: error: `rxBlock' undeclared (first use in this function) img2srec.c:292: error: `elfHeader' undeclared (first use in this function) img2srec.c:296: error: parse error before ')' token img2srec.c:297: error: parse error before ')' token img2srec.c:298: error: parse error before ')' token img2srec.c:299: error: parse error before ')' token img2srec.c:300: error: parse error before ')' token img2srec.c:314: warning: implicit declaration of function `fclose' img2srec.c:320: warning: implicit declaration of function `fseek' img2srec.c:320: error: `SEEK_SET' undeclared (first use in this function) img2srec.c:322: error: `sectHeader' undeclared (first use in this function) img2srec.c:323: error: parse error before ')' token img2srec.c:324: error: parse error before ')' token img2srec.c:325: error: parse error before ')' token img2srec.c:326: error: parse error before ')' token img2srec.c:327: error: parse error before ')' token img2srec.c:328: error: parse error before ')' token img2srec.c:329: error: parse error before ')' token img2srec.c:330: error: parse error before ')' token img2srec.c:331: error: parse error before ')' token img2srec.c:332: error: parse error before ')' token img2srec.c:340: warning: implicit declaration of function `strrchr' img2srec.c:346: error: parse error before ')' token img2srec.c:347: warning: implicit declaration of function `printf' img2srec.c:350: error: `firstAddr' undeclared (first use in this function) img2srec.c:351: error: `loadAddr' undeclared (first use in this function) img2srec.c:356: error: `loadSize' undeclared (first use in this function) img2srec.c:359: error: `loadDiff' undeclared (first use in this function) img2srec.c:378: error: `loadOffset' undeclared (first use in this function) img2srec.c: In function `main': img2srec.c:399: error: parse error before "offset" img2srec.c:404: warning: implicit declaration of function `strcmp' img2srec.c:405: error: `offset' undeclared (first use in this function) img2srec.c:409: error: `stderr' undeclared (first use in this function) img2srec.c: At top level: ../include/elf.h:465: warning: array '_DYNAMIC' assumed to have one element make[1]: *** [img2srec.o] Error 1 make[1]: Leaving directory `/export/em/u-boot/u-boot-1.1.3/tools' make: *** [tools] Error 2 sh-3.00$

2 1

[U-Boot-Users] [PATCH] I2C bus speed on the MPC85xx
by Pavel Bartusek 05 Dec '05

05 Dec '05

The attached patch will fix the settings of I2C clock on the MPC85xx CPUs according to the speed parameter in the i2c_init() -- S přátelským pozdravem / Best regards / Mit freundlichen Grüßen Ing. Pavel Bartůšek SYSGO s.r.o. Hřbitovní 359/10 CZ-14800 Praha 4 Phone/Fax: +420 244911174 GSM: +420 777 760728 pavel.bartusek(a)sysgo.com http://www.sysgo.com | http://www.elinos.com | http://www.pikeos.com

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[U-Boot-Users] Add some diag programs in u-boot
by boku 05 Dec '05

05 Dec '05

Dear all, I'm attempting to add some diag programs into u-boot for a specific audio codec in ARM IntegratorCP-like platform so that during each u-booting, the device will be diagnosed to make sure it's fine. Could you please tell me how to do this task? Thanks a lot! Best Wishes, Boku

2 1

[U-Boot-Users] are there tarred archives for this u-boot ist
by satluj＠runbox.com 05 Dec '05

05 Dec '05

Hi, I am new to u-boot and trying to build it for a LPC2294 board from olimax. I am wondering if there are tarred archives for monthly/annual span so that I can get them downloaded and go through them before posting my problems here. Thanks - Surinder

2 1

[U-Boot-Users] Support for AM29LV320D flash in UBOOT
by Yogesh Patel 02 Dec '05

02 Dec '05

Is there a support for AM29LV320DT flash using CFI ? Thanks YP __________________________________ Start your day with Yahoo! - Make it your home page! http://www.yahoo.com/r/hs

2 1

[U-Boot-Users] [PATCH] Add text color handling in cfb_console.c
by Pierre AUBERT 02 Dec '05

02 Dec '05

The attached patch adds text color handling on console frambuffer. It adds the functions video_set_bg_color and video_set_fg_color. The function video_drawchars allows to draw text anywhere on the screen. It has been tested in 8, 15, 16 and 24 bpp modes. CHANGELOG: * Text color handling on video framebuffer Patch by Pierre Aubert Dec. 2 2005 Best regards -- ------------------------------------------------------------------------------ Pierre Aubert | Phone: +33 4 50 65 62 88 | Fax: +33 4 50 65 62 08 STÄUBLI Faverges | Place Robert STÄUBLI | Mailto:p.aubert@staubli.com 74210 Faverges FRANCE | http://www.staubli.com ------------------------------------------------------------------------------

1 0

[U-Boot-Users] 83xx TSEC
by David Updegraff 02 Dec '05

02 Dec '05

Hi. Anyone know of any registers to look at in the TSEC stuff that might tell a guy why a frame is not moving? Our PHY looks fine; 'mii dump' is fine, link up, etc. but in tsec_send() the buffer of a ping is loaded up, and simply never goes anywhere. ->tstat remains clear (no halt bit), but rtx.txbd[txIdx].status never changes from assigned value. Stats claim no frames; which is correct. I need some help in understanding why TSEC feels it cannot feed anything out the inerface. Thanx. -dbu.

2 2

[U-Boot-Users] sometimes u-boot hang in the gunzip of kernel image when bootm
by zhuzhenhua 02 Dec '05

02 Dec '05

i used the uboot bootm to boot the kernel in sdram, sometimes it gunzip correctly and run into kernel_entry,sometimes it hang at gunzip the kernel, does someone has this situation? what may cause this ? Best regards zhuzhenhua

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[U-Boot-Users] [PATCH] support MXIC NOR flash part on AMCC 440EP bamboo eval board
by Kevin Vigor 01 Dec '05

01 Dec '05

My AMCC "bamboo" 440EP eval board arrived stuffed with a MXIC flash part instead of the AMD part called for on the schematic. This part was not recognized by u-boot. The following trivial patch gets it working. Kevin Index: board/amcc/common/flash.c =================================================================== --- board/amcc/common/flash.c (revision 1) +++ board/amcc/common/flash.c (working copy) @@ -76,6 +76,9 @@ case FLASH_MAN_SST: printf("SST "); break; + case FLASH_MAN_MX: + printf("MXIC "); + break; default: printf("Unknown Vendor "); break; @@ -648,6 +651,9 @@ case (CFG_FLASH_WORD_SIZE) STM_MANUFACT: info->flash_id = FLASH_MAN_STM; break; + case (CFG_FLASH_WORD_SIZE) MX_MANUFACT: + info->flash_id = FLASH_MAN_MX; + break; default: info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; @@ -665,6 +671,11 @@ info->flash_id += FLASH_AM320T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ + + case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T: + info->flash_id += FLASH_AM320T; /* compatible with AMD part. */ + info->sector_count = 67; + info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: info->flash_id += FLASH_AM320B;

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[U-Boot-Users] a question about uboot cost
by eagle keeper 01 Dec '05

01 Dec '05

Hi all, Since i couldn't find this info on the web I only would like to know if Uboot is free (meaning cost zero) even for using it in commercial products. Thanks in advance for answer. I apologize if such info is available on the web and I didn't search eenought for it Lele

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[U-Boot-Users] MIPS problems compiling with ELDK 3.1
by Lars Wolf 01 Dec '05

01 Dec '05

Hello, I am not familiar with U-Boot but I would like to compile U-Boot-1.1.3 for a MIPS processor (using the dbau1550 board). The big problem I have is the occuring error while compiling. Unfortunatly, I couldn't find some working advice in your mailing list. I have used the AMD recommended cross compiler toolchain from MontaVista and the from Wolfgang Denk recommended ELDK 3.1 toolchain, neighter works. The error which occurs is: /cpu/mips/start.S /cpu/mips/start.S: Assembler messages: /cpu/mips/start.S:246: Error: Cannot branch to undefined symbol. /cpu/mips/start.S:251: Error: Cannot branch to undefined symbol. /cpu/cpu/mips/start.S:263: Error: Cannot branch to undefined symbol. make: *** [cpu/mips/start.o] Error 1 Could anybody give some hints or advices? Lars

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Re: [U-Boot-Users] how to mkimage for mips ?
by 蔡栋 01 Dec '05

01 Dec '05

zhuzhenhua,您好！ you can try to add option -C gzip ======= 2005-12-01 13:40:43 您在来信中写道：======= >for example, if for pb1100, can we use zImage.pb1100 to make uImage? >how to set the -a -e in mkimage? > > >Best regards >zhuzhenhua > > >------------------------------------------------------- >This SF.net email is sponsored by: Splunk Inc. Do you grep through log files >for problems? Stop! Download the new AJAX search engine that makes >searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! >http://ads.osdn.com/?ad_idv37&alloc_id865&op=click >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users = = = = = = = = = = = = = = = = = = = = 　　　　　　　　致礼！　　　　　　　　蔡栋　　　　　　　　caidong(a)kedacom.com 　　　　　　　　　　2005-12-01

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Re: [U-Boot-Users] how to mkimage for mips ?
by 蔡栋 01 Dec '05

01 Dec '05

zhuzhenhua,您好！ the option -e is to set the first execute instruction address of your linux image and option -a is to set the address which uboot will copy image to when user invoke bootm ======= 2005-12-01 13:40:43 您在来信中写道：======= >for example, if for pb1100, can we use zImage.pb1100 to make uImage? >how to set the -a -e in mkimage? > > >Best regards >zhuzhenhua > > >------------------------------------------------------- >This SF.net email is sponsored by: Splunk Inc. Do you grep through log files >for problems? Stop! Download the new AJAX search engine that makes >searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! >http://ads.osdn.com/?ad_idv37&alloc_id865&op=click >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users = = = = = = = = = = = = = = = = = = = = 　　　　　　　　致礼！　　　　　　　　蔡栋　　　　　　　　caidong(a)kedacom.com 　　　　　　　　　　2005-12-01

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[U-Boot-Users] how to mkimage for mips ?
by zhuzhenhua 01 Dec '05

01 Dec '05

for example, if for pb1100, can we use zImage.pb1100 to make uImage? how to set the -a -e in mkimage? Best regards zhuzhenhua

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