November 2005 - U-Boot

[U-Boot-Users] custom mpc83xx based board support
by Boris 02 Nov '05

02 Nov '05

Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com

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RE: [U-Boot-Users] custom mpc83xx based board support
by Chu hanjin-r52514 02 Nov '05

02 Nov '05

You can take 8349ADS code as reference by make MPC8349ADS_config under u-boot. This code has worked on MPC8349E Processor Card made by Freescale. The 2.6 kernel also support this board. I think most of the code dont need to be modified. You can compare the hardware between your board and Freescale reference board. Best Regards Neil Chu -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of Boris Sent: Wednesday, November 02, 2005 5:55 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] custom mpc83xx based board support Hello I'm planning to prepare embedded Linux installation on custom made board using mpc83xx CPU. As much as I understand, to support it I'll need to write support code in boards directory and header file in include/configs. What are the chances that existing code for mpc8349ads will work ? and if not can I cook something based on this code with minimal changes ? Another question is whether 2.6.* kernel configured and built for mpc83xx family should work with any board based on this CPU or some board specific changes must be done in the kernel ? thanks, Boris __________________________________ Yahoo! FareChase: Search multiple travel sites in one click. http://farechase.yahoo.com ------------------------------------------------------- SF.Net email is sponsored by: Tame your development challenges with Apache's Geronimo App Server. Download it for free - -and be entered to win a 42" plasma tv or your very own Sony(tm)PSP. Click here to play: http://sourceforge.net/geronimo.php _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] Low-boot configuration for MPC8272ADS
by Dmytro Bablinyuk 02 Nov '05

02 Nov '05

I've seen one thread on this subject http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/19224 and tried to repeat the same trick. 1. I have updated (latest snapshot) u-boot: include/configs/MPC8260ADS.h #define CFG_HRCW_MASTER 0x0e72b605 board/mpc8260ads/config.mk TEXT_BASE = 0xff800000 2. Using BDI2000 (MPC8272ADS JP9 is configured to take Hard Reset Configuration source from BCSR - otherwise board keep reseting) 8272>load 8272>unlock 0xff800000 0x40000 32 8272>erase 0xFF800000 BLOCK 8272>prog 0xFF800000 u-boot.bin BIN 3. Change JP9 to take Hard Reset Configuration from FLASH (SW2 Boot Source is FLASH) After power cycling BDI and board - the board keep reseting (BDI is attached to the board). Yes, 0xFFF00100 is not valid breakpoint anymore - I guess it should be something like 0x00000100. But I suspect even I got u-boot wrong BDI still should "freeze" the board instead of reseting. Is anyone got BDI and u-boot working on MPC8272ADS in low boot mode? Any help is really appreciated. Below is output of BDI while reseting and BDI init from config file. ... *** TARGET: reset detected, restarting target - BDI asserts HRESET - Reset JTAG controller passed - Bypass check: 0x00000001 => 0x00000001 - JTAG exists check passed - COP status is 0x01 - Check running state passed - BDI scans COP freeze command - BDI removes HRESET - Target PVR is 0x80822014 - Target SVR is 0x00000000 - COP status is 0x05 - Check stopped state passed - Check LSRL length passed - BDI sets breakpoint at 0xFFF00100 - BDI resumes program execution - Waiting for target stop passed - TARGET: Target PVR is 0x80822014 - TARGET: resetting target passed - TARGET: processing target startup .... - TARGET: processing target startup passed Here is the init core from BDI config: [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0x0F010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0x0F0101A8 0x04700000 ;IMMR : internal space @ 0x04700000 WM32 0x04710024 0x100C0000 ;BCR : Single PQ2, .. WM32 0x04710c94 0x00000001 ;RMR : checkstop reset enable ; ; init memory controller WM32 0x04710104 0xFF800876 ;OR0: Flash 8MB, CS early negate, 11 w.s., Timing relax WM32 0x04710100 0xFF801801 ;BR0: Flash @0xFF800000, 32bit, no parity WM32 0x0471010C 0xFFFF8010 ;OR1: BCSR 32KB, all types access, 1 w.s. WM32 0x04710108 0x04501801 ;BR1: BCSR @0x04500000, 32bit, no parity WM32 0x04710124 0xFFFF8866 ;OR4: EEPROM 32KB, all types access, 6 w.s. WM32 0x04710120 0xC2000801 ;BR4: EEPROM @0xC2000000, 8bit, no parity ; ; init SDRAM Init (PPC bus) WM16 0x04710184 0x2800 ;MPTPR: Divide Bus clock by 41 WM8 0x0471019C 0x13 ;PSRT : Divide MPTPR output by 20 WM32 0x04710114 0xfe002ec0 ;OR2 : 32MB, 2 banks, row start at A9, 11 rows WM32 0x04710110 0x00000041 ;BR2 : SDRAM @0x00000000, 64bit, no parity WM32 0x04710190 0x824b36a3 ;PSDMR: Precharge all banks WM32 0x04710190 0xaa4b36a3 WM8 0x00000000 0x00 ;Access SDRAM WM32 0x04710190 0x8a4b36a3 ;PSDMR: CBR Refresh WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM32 0x04710190 0x9a4b36a3 ;PSDMR: Mode Set WM8 0x00000190 0x00 ;Access SDRAM WM32 0x04710190 0xc24b36a3 ;PSDMR: enable refresh, normal operation

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[U-Boot-Users] mpc83xx flash remapping
by David Updegraff 01 Nov '05

01 Nov '05

Hi. I found that if the 'generic' cpu/mpc83xx/start.S is changed to comply with pre-existing configuration values for flash mapping registers, then it is no longer hard-wired to just 8m flash size. This way, each implementor does not have to go munging the start.S file, but just has to set up correct values for: CFG_LBLAWAR0_PRELIM CFG_OR0_PRELIM and things get re-mapped ok. Plz consider attached. -dbu.

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[U-Boot-Users] i had some problem in uboot1.1.1
by 刘会田 01 Nov '05

01 Nov '05

i was a freshman in developing sbc8260 board. i got a led_light program for testing boot ,and set some register right in cpu_init_f. Why the uboot could not boot successed? another questions:what purpose about env_init? Thanks! static int led_light(void) { int i,j; char *k=0x21000000; char ki[8]={0,4,2,6,1,5,3,7}; int l=0; for(i=0;i<=7;i++) { for(j=1;j<100;j++) { l++; } *(k+ki[i])=0x80; for(j=1;j<5000000;j++) { l--; } *(k+ki[i])=0x0; return(0); } } nit_fnc_t *init_sequence[] = { #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif #if !defined(CONFIG_TQM866M) get_clocks, /* get CPU and bus clocks (etc.) */ #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) adjust_sdram_tbs_8xx, #endif init_timebase, #endif #ifdef CFG_ALLOC_DPRAM #if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560)) dpram_init, #endif #endif #if defined(CONFIG_BOARD_POSTCLK_INIT) board_postclk_init, #endif led_light, //if i placed this program here, the led of board flashed. env_init, led_light, //if i placed this program here, the led of board didn't flash #if defined(CONFIG_TQM866M) get_clocks_866, /* get CPU and bus clocks according to the environment variable */ sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ init_timebase, #endif init_baudrate, serial_init, console_init_f, display_options, #if defined(CONFIG_8260) prt_8260_rsr, prt_8260_clks, #endif /* CONFIG_8260 */ checkcpu, #if defined(CONFIG_MPC5xxx) prt_mpc5xxx_clks, #endif /* CONFIG_MPC5xxx */ checkboard, INIT_FUNC_WATCHDOG_INIT #if defined(CONFIG_MISC_INIT_F) misc_init_f, #endif INIT_FUNC_WATCHDOG_RESET #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) init_func_i2c, #endif #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ dtt_init, #endif #ifdef CONFIG_POST post_init_f, #endif INIT_FUNC_WATCHDOG_RESET init_func_ram, #if defined(CFG_DRAM_TEST) testdram, #endif /* CFG_DRAM_TEST */ INIT_FUNC_WATCHDOG_RESET NULL, /* Terminate this list */ };

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RE: [U-Boot-Users] Freescale MPC8540 QUICCstart board
by Anderson, Rachel E 01 Nov '05

01 Nov '05

>Reply-To: "Ing.Gianfranco Morandi" <gianfranco.morandi(a)euro-studio.it> >From: "Ing.Gianfranco Morandi" <gianfranco.morandi(a)euro-studio.it> >To: "u-boot users" <u-boot-users(a)lists.sourceforge.net> >Date: Tue, 1 Nov 2005 10:27:17 +0100 >Organization: Eurostudio s.r.l. >Subject: [U-Boot-Users] Freescale MPC8540 QUICCstart board > >Hi to all, > >It's almost one year that I'm far from u-boot community and I did not follow >the last upgrade of such project. >Now I'm evaluating the MPC85xx processor family to start with a new >activity >and I found the QUICCstart board which is being sold by freescale with an >u-boot image pre-loaded. > >Could anybody indicate me the name of the board which identifies the >MPC8540-CWH-PPC-8540N-VX freescale part number into the u-boot tree? > The board name is MPC8540EVAL in the include/configs directory. Support for it is included in U-Boot 1.1.3. >And (even though this is out of topic here, please forgive me) anybody knows >if this board has been enclosed into the ELDK? > It uses a standard MPC8540 processor. We've been successfully compiling and running U-Boot on the MPC8540EVAL board using the current ELDK. Rachel Anderson >many thanks > >Gianfranco

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[U-Boot-Users] What's going on here: global offset table
by ming lei 01 Nov '05

01 Nov '05

I am a newbie to u-boot. I found some macros in file u-boot-1.1.3\include\ppc_asm.tmpl #define START_GOT \ .section ".got2","aw"; \ .LCTOC1 = .+32768 #define END_GOT \ .text #define GET_GOT \ bl 1f ; \ .text 2 ; \ 0: .long .LCTOC1-1f ; \ .text ; \ 1: mflr r14 ; \ lwz r0,0b-1b(r14) ; \ add r14,r0,r14 ; #define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME #define GOT(NAME) .L_ ## NAME (r14) in file u-boot-1.1.3\cpu\mpc8260\start.S, I found some statements as follows START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) GOT_ENTRY(_start) GOT_ENTRY(_start_of_vectors) GOT_ENTRY(_end_of_vectors) GOT_ENTRY(transfer_to_handler) GOT_ENTRY(__init_end) GOT_ENTRY(_end) GOT_ENTRY(__bss_start) #if defined(CONFIG_HYMOD) GOT_ENTRY(environment) #endif END_GOT I thougt that these statement will be something as follows after preprocessed by gasp .section ".got2","aw"; .LCTOC1 = .+32768 .L___GOT2_TABLE _= . - .LCTOC1; .long _GOT2_TABLE_ ................ ............... My questions are: (1) what is the meaning of the "LCT0C1"? is ".LCTOC1" a symbol or a directive ? if ".LCTOC1" is a symbol ,why I can not see it using nm or objdump? (2) what is the meaning of the ".L__GOT2_TABLE_". what is the relation between ".L__GOT2_TABLE_" and "_GOT2_TABLE_" defined in u-boot.lds? THANKS!

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[U-Boot-Users] Freescale MPC8540 QUICCstart board
by Ing.Gianfranco Morandi 01 Nov '05

01 Nov '05

Hi to all, It's almost one year that I'm far from u-boot community and I did not follow the last upgrade of such project. Now I'm evaluating the MPC85xx processor family to start with a new activity and I found the QUICCstart board which is being sold by freescale with an u-boot image pre-loaded. Could anybody indicate me the name of the board which identifies the MPC8540-CWH-PPC-8540N-VX freescale part number into the u-boot tree? And (even though this is out of topic here, please forgive me) anybody knows if this board has been enclosed into the ELDK? many thanks Gianfranco

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[U-Boot-Users] [PATCH] Replacement for 014-tidy.patch
by Peter Pearse 01 Nov '05

01 Nov '05

The attached gzipped file contains my patch number 015 against the GIT head of Nov 1st 22005. This patch depends on all my outstanding previous patches 009 - 013 and REPLACES my patch 014 which contained an error. Thanks to ladis for spotting it. It removes some warnings, and adds to the clean target. CHANGELOG: Remove warnings, add to clean target. Patch by Peter Pearse, 1st Nov.

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[U-Boot-Users] [PATCH] Remove warnings & clean better
by Peter Pearse 01 Nov '05

01 Nov '05

The attached gzipped file contains my patch number 014 against the GIT head of Nov 1st 22005. This patch depends on all my outstanding previous patches 009 - 013. It removes some warnings, and adds to the clean target. CHANGELOG: Remove warnings, add to clean target. Patch by Peter Pearse, 1st Nov.

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