October 2005 - U-Boot

RE: [U-Boot-Users] Running test code from RAM while having GOT po inting to flash
by atul.sabharwal＠exgate.tek.com 25 Oct '05

25 Oct '05

I am using DDR2 memory abstracted from me by a FPGA based memory controller. Hopefully, the hardware engineer is configuring it correctly. All register accesses are GPCM based. I build a version of u-boot with I-Cache turned off and it still failed. The Burst inhibit flag is turned on. I am able To do block copies with the assembly routines (memcpy, strcpy) which are faster than a C based for loop. I am thinking of using the JTAG and copy some PPC code into RAM in a Infinite loop and run it manually. Basically, some test to run some code from flash without relocation. -- Atul -----Original Message----- From: wd(a)denx.de [mailto:wd@denx.de] Sent: Monday, October 24, 2005 11:51 PM To: Sabharwal, Atul Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Running test code from RAM while having GOT pointing to flash In message <4A062D477D842B4C8FC48EA5AF2D41F20152806A(a)us-bv-m23.global.tektronix.net> you wrote: > My code seems to be crashing in the relocate_code routine while switching > from flash to RAM. There was an address_probe fixup which was not enabled > And I enabled it. So, the relocation table (GOT) gets copied successfully > From flash to RAM but the code dies seomewhere between coping the fixups I think you misunderstand the function of the GOT. > And the in_ram label. Somehow, on my BDI, it sees an exception and goes > to the reset vector i.e 0x100. See the FAQ at http://www.denx.de/wiki/view/DULG/UBootCrashAfterRelocation > My approach is to avoid the GOT stuff and write a test routine which is The "GOT stuff" is known to work just fine. I suggest you focus on the remaining stuff, i. e. your SDRAM init sequence. Again, see the FAQ. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de I often quote myself; it adds spice to my conversation. - G. B. Shaw

2 1

[U-Boot-Users] FEC not working : ep852
by gautam borad 25 Oct '05

25 Oct '05

Hi, I'm having problem bringing up FEC on ep852 board with LXT971A transceiver.I get the "Unable to discover phy!" "No PHY device found" message, and then "TX not ready" and "TX timeout". The dump displays "Net: FEC ETHERNET" . I'm using u-boot 1.1.2. Some of the #defines from the config file : #define CONFIG_SERIAL_MULTI #define CONFIG_FEC_ENET 1 #define CONFIG_NET_MULTI 1 #define CONFIG_ETHER_ON_FEC1 #if defined(CONFIG_ETHER_ON_FEC1) # define FEC_ENET 1 # define CONFIG_MII 1 # define CONFIG_FEC1_PHY (-1) /* Detect PHY ID */ #endif /* CONFIG_ETHER_ON_FEC1 */ #undef CONFIG_SCC3_ENET #if defined(CONFIG_MII) # define CFG_ADD_MII_CMD CFG_CMD_MII #else # define CFG_ADD_MII_CMD 0 #endif #define CFG_DISCOVER_PHY /* FEC Ethernet */ #define CONFIG_8xx_CONS_SMC1 Do I need to modify u-boot.lds file?( I dont thinks so).Is something wrong with the clks if so where do i modify them? The eth_init() function also fails. It says " Trying FEC ETHERNET" and then "FAIL" I'm enabling fec in board_early_init_f() like this: #if defined(FEC_ENET) *((volatile uchar *) BCSR2) |= BCSR2_MIIRST | BCSR2_MIIPWRDWN | BCSR2_FIRQ_EN; where: BCSR2 = 0xFA400002 BCSR2_MIIRST = 0x80 BCSR2_MIIPWRDWN = 0x40 BCSR2_FIRQ_EN = 0x20 I dont see any problem in the above #defines but still fec is not working. Plz help. Thanks in advance.

1 0

[U-Boot-Users] RE: Patch to build csope database in the makefile for u-boot-1.1. 3
by atul.sabharwal＠exgate.tek.com 25 Oct '05

25 Oct '05

The clean option just needs to remove the files cscope.in.out & cscope.po.out as I am using the indexed search option which makes the lookup quicker. With non-indexed searches, the file is cscope.out. Try it out, its pretty quick. So, does not become a bottleneck. Having an option in the makefile is better than not having anything. People may not trigger it if they don't like it. And the clean operation Is harmless. As for me, I don't know ctags nor etags so using emacs Is difficult. Very cryptic commands. So, ctags or scope is the option. The problem I have not been able to figure out is backward search. I find this useful for two things : 1. Code tracing. 2. Bug fixing when tracking errors by using make. This way, the user does not have to switch directories, make code change And re-compile. Option#1 only works from top level directory. i.e. if I am in directory three level deep and want to see a function prototype in A directory at 1st level, it does not pick it up. Apart from that, its really a good thing to integrate for people who work In text mode. -- Atul -----Original Message----- From: Detlev Zundel [mailto:dzu@denx.de] Sent: Monday, October 24, 2005 2:17 AM To: Sabharwal, Atul Cc: frannk_m1(a)yahoo.com; u-boot-users(a)lists.sourceforge.net Subject: Re: Patch to build csope database in the makefile for u-boot-1.1.3 Hi, > Re-submit. Accessing the file over a Samba share even after UNIX to DOS > conversion corrupted the file. Patch tested against latest cscope from > Sourceforge. (had some problem with clipboard or file transfer over > SAMBA. Ftp transfer worked. Also, cut-N-paste between edit and Outlook > Did not work. Opening file with notepad and past worked.). > > --- u-boot-1.1.3/Makefile 2005-10-19 18:04:22.000000000 -0700 > +++ Makefile 2005-10-21 09:51:53.000000000 -0700 > @@ -193,6 +193,10 @@ > net disk rtc dtt drivers drivers/sk98lin > common \ > $ -name CVS -prune $ -o $ -name '*.[ch]' -print > $` > > +cscope: > + find . -name "*.[cCsSh]" -print > cscope.files > + cscope -b -R -u -q > + > System.map: u-boot > $(NM) -A -l $< | \ > grep -v '$compiled$\|$\.o$$$\|$ [aUw] > $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ As stated in my other mail, I do not like that target picking up every source file - think of the function "checkboard" for example. But apart from this the "clobber" rule of the Makefile should at least be extended to also clean up the cscope files. Cheers Detlev -- I had nothing to do with implementing Gosmacs. It was inspired by the original Emacs, but that's all. I would never have agreed to use a language like Mocklisp. -- Richard Stallman in <E1CUySS-00048D-RN(a)fencepost.gnu.org>

2 1

[U-Boot-Users] Running test code from RAM while having GOT pointing to flash
by atul.sabharwal＠exgate.tek.com 25 Oct '05

25 Oct '05

I am a newbie at PowerPC assembly. In my last patch, I submitted a series of test as part of my work in bringing up the memory controller. My code seems to be crashing in the relocate_code routine while switching from flash to RAM. There was an address_probe fixup which was not enabled And I enabled it. So, the relocation table (GOT) gets copied successfully >From flash to RAM but the code dies seomewhere between coping the fixups And the in_ram label. Somehow, on my BDI, it sees an exception and goes to the reset vector i.e 0x100. My approach is to avoid the GOT stuff and write a test routine which is Position dependant and copy the function to address 0x0 in RAM. After Executing the code in RAM, jump back to flash. People over here think That since the I-cache is enabled, the processor may burst but we are Fixing some bugs with that. The CS has BI flag set. Does someone have some sample code for putting embedded C/assembly code ? My approach was to copy the memset routine from flash to RAM at address 0x0. Then do a memset from address 0x0 + sizeof(memset) to user given input of End of RAM. This way, I run memset from RAM and verify that it actually works with my peek/poke routine from flash. My first cut at it is here but it is complaining about GOT. Not enough experience with ld... Help/tips ?? __asm__ __volatile__( \ " lis r10, 0x0@h\n" \ " eieio\n" \ " lis r3, address@l\n" \ " ori r3, r3, address@h\n" \ " lis r4, fillpattern@l\n" \ " ori r4, r4, fillpattern@h\n" \ " lis r5, bytecount@l\n" \ " ori r5, r5, bytecount@h\n" \ " b 0x0\n" \ ); Thanks, Atul

3 2

[U-Boot-Users] when kernel image has uncompressed itself ,it stops.
by yanjie feng 25 Oct '05

25 Oct '05

hi, my uboot has loaded the kernel image(kernel version is 2.4.19),and kernel image has successfully uncompressing itself,it shows "Uncompressing Linux.................................done, booting the kernel",then stops.when my uboot loads my primary kernel image(2.4.18),it goes well. my uboot has passed the same parameters to the 2.4.18 version kernel and the 2.4.19 version kernel . i don't know why. micro_arm --------------------------------- 雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱雅虎助手¨D搜索、杀毒、防骚扰

2 1

[U-Boot-Users] PATCH cmd_net.c check ethernet availability
by Andrew Dyer 24 Oct '05

24 Oct '05

We have a board where the ethernet is on a plugin module and may or may not be present at boot time. If eth_initialize() doesn't detect the network and a net command is run the system crashes. This patch adds a function to cmd_net.c to check the availability of the ethernet device before trying to access it. If the net device is not found it will print a message and return -1. * Add check to cmd_net functions to make sure ethernet device is valid before calling Net_Loop() Patch by Andrew Dyer, 24 Oct 2005 Signed-off-by: Andrew Dyer <amdyer(a)gmail.com> -- Hardware, n.: The parts of a computer system that can be kicked.

1 0

[U-Boot-Users] [PATCH] AT91RM9200 Ethernet initialization
by Anders Larsen 24 Oct '05

24 Oct '05

Hi, the AT91RM9200 on-chip Ethernet interface is explicitly initialized to use promiscuous mode. This is probably due to a bug in line 183 of cpu/arm920t/at91rm9200/ether.c which was supposed to clear the statistics counters but instead erroneously disabled reception of broadcast packets - so the driver later enables promiscuous mode in order to receive such broadcasts, like e.g. DHCP responses. The patch below fixes the original bug and lets the interface run in normal (non-promiscuous) mode, which should improve performance on networks with heavy traffic. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Fix the initialization of the AT91RM9200 ethernet interface to use non-promiscuous mode Patch by Lars Munch, 24 Oct 2005 --- cpu/arm920t/at91rm9200/ether.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/cpu/arm920t/at91rm9200/ether.c b/cpu/arm920t/at91rm9200/ether.c index ca5b7d1..eb9dd76 100644 --- a/cpu/arm920t/at91rm9200/ether.c +++ b/cpu/arm920t/at91rm9200/ether.c @@ -180,7 +180,7 @@ int eth_init (bd_t * bd) *AT91C_PMC_PCER = 1 << AT91C_ID_EMAC; /* Peripheral Clock Enable Register */ - p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */ + p_mac->EMAC_CTL |= AT91C_EMAC_CSR; /* Clear statistics */ /* Init Ehternet buffers */ for (i = 0; i < RBF_FRAMEMAX; i++) { @@ -197,8 +197,7 @@ int eth_init (bd_t * bd) p_mac->EMAC_RBQP = (long) (&rbfdt[0]); p_mac->EMAC_RSR &= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA); - p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC) - & ~AT91C_EMAC_CLK; + p_mac->EMAC_CFG &= ~AT91C_EMAC_CLK; #ifdef CONFIG_AT91C_USE_RMII p_mac->EMAC_CFG |= AT91C_EMAC_RMII;

1 0

[U-Boot-Users] Patch to build csope database in the makefile for u-boot-1.1.3
by atul.sabharwal＠exgate.tek.com 24 Oct '05

24 Oct '05

Re-submit. Accessing the file over a Samba share even after UNIX to DOS conversion corrupted the file. Patch tested against latest cscope from Sourceforge. (had some problem with clipboard or file transfer over SAMBA. Ftp transfer worked. Also, cut-N-paste between edit and Outlook Did not work. Opening file with notepad and past worked.). --- u-boot-1.1.3/Makefile 2005-10-19 18:04:22.000000000 -0700 +++ Makefile 2005-10-21 09:51:53.000000000 -0700 @@ -193,6 +193,10 @@ net disk rtc dtt drivers drivers/sk98lin common \ $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` +cscope: + find . -name "*.[cCsSh]" -print > cscope.files + cscope -b -R -u -q + System.map: u-boot $(NM) -A -l $< | \ grep -v '$compiled$\|$\.o$$$\|$ [aUw] $\|$\.\.ng$$$\|$LASH[RL]DI$' | \

2 1

[U-Boot-Users] Patch to show address definition based on file/line number with e xtra flags in the nm command
by atul.sabharwal＠exgate.tek.com 24 Oct '05

24 Oct '05

This is a nit but instead of tracing code using cscope/ctags or fgrep, this method Makes code tracing lot quicker. Unless you have an IDE :) I have used cscope but have not been able to search symbols at a top level Directory from a directory N level deep. Any tips appreciated. --- /login/asabharw/lxhome/u-boot-1.1.3/Makefile 2005-08-13 16:53:35.000000000 -0700 +++ Makefile 2005-10-17 18:59:37.000000000 -0700 @@ -194,7 +194,7 @@ $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` System.map: u-boot - @$(NM) $< | \ + $(NM) -A -l $< | \ grep -v '$compiled$\|$\.o$$$\|$ [aUw] $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ sort > System.map

3 5

[U-Boot-Users] ft_build.c #include asm/errno.h breaks build on MIPS
by Andrew Dyer 22 Oct '05

22 Oct '05

I updated from git today and building on MIPS is broken like so: ft_build.c:9:23: asm/errno.h: No such file or directory make[1]: *** [.depend] Error 1 make[1]: Leaving directory `/home/adyer/Projects/u-boot/common' make: *** [common/libcommon.a] Error 2 There is currently no include/asm-mips/errno.h (only for ppc and arm). I assume this will hit the other archs, too. Copying the include/asm-ppc/errno.h file over to asm-mips and changing the _PPC_ERRNO_H to _MIPS_ERRNO_H makes the build work. -- Hardware, n.: The parts of a computer system that can be kicked.

1 0

[U-Boot-Users] Sleep doesn't work in NetConsole mode?
by André Berggren 22 Oct '05

22 Oct '05

Hi all! I started using NetConsole today and it's working almost as expected. When I run sleep 2 in u-boot with serial connected u-boot sleeps for 2 s, but when I do the same when connected with NetConsole sleep never returns. I have to abort it with Ctrl + C. Why? //André ########################################### This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange. For more information, connect to http://www.f-secure.com/

3 2

[U-Boot-Users] Patch to build csope database in the makefile for u-boot-1.1.3
by atul.sabharwal＠exgate.tek.com 21 Oct '05

21 Oct '05

Enabled the fast index database build option in cscope. Tested against Latest version of cscope from sourceforge. --- /login/asabharw/lxhome/u-boot-1.1.3/Makefile 2005-08-13 16:53:35.000000000 -0700 +++ Makefile 2005-10-17 18:59:37.000000000 -0700 @@ -194,7 +194,7 @@ $ -name CVS -prune $ -o $ -name '*.[ch]' -print $` System.map: u-boot - @$(NM) $< | \ + $(NM) -A -l $< | \ grep -v '$compiled$\|$\.o$$$\|$ [aUw] $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ sort > System.map

2 1

[U-Boot-Users] [PATCH] support for new board (BC3450)
by Stefan Strobl 21 Oct '05

21 Oct '05

attached new files to support BC3450 board, based on a TQM5200 module, with a MPC5200 CPU. CHANGELOG: * Patch by Stefan Strobl, 21 Oct 2005: Add support for BC3450 board Best regards Stefan Strobl Index: Makefile =================================================================== RCS file: /cvsroot/u-boot/u-boot/Makefile,v retrieving revision 1.212 diff -p -u -p -u -r1.212 Makefile --- Makefile 15 Oct 2005 17:08:09 -0000 1.212 +++ Makefile 21 Oct 2005 18:07:15 -0000 @@ -234,6 +234,9 @@ PATI_config: unconfig aev_config: unconfig @./mkconfig -a aev ppc mpc5xxx tqm5200 +BC3450_config: unconfig + @./mkconfig -a BC3450 ppc mpc5xxx bc3450 + cpci5200_config: unconfig @./mkconfig -a cpci5200 ppc mpc5xxx cpci5200 esd Index: MAKEALL =================================================================== RCS file: /cvsroot/u-boot/u-boot/MAKEALL,v retrieving revision 1.127 diff -p -u -p -u -r1.127 MAKEALL --- MAKEALL 15 Oct 2005 17:08:09 -0000 1.127 +++ MAKEALL 21 Oct 2005 18:07:15 -0000 @@ -25,9 +25,9 @@ LIST_5xx=" \ ######################################################################### LIST_5xxx=" \ - cpci5200 icecube_5100 icecube_5200 EVAL5200 \ - pf5200 PM520 Total5100 Total5200 \ - Total5200_Rev2 TQM5200_auto o2dnt \ + BC3450 cpci5200 icecube_5100 icecube_5200 \ + EVAL5200 pf5200 PM520 Total5100 \ + Total5200 Total5200_Rev2 TQM5200_auto o2dnt \ " ######################################################################### Index: README =================================================================== RCS file: /cvsroot/u-boot/u-boot/README,v retrieving revision 1.138 diff -p -u -p -u -r1.138 README --- README 12 Oct 2005 23:47:18 -0000 1.138 +++ README 21 Oct 2005 18:07:18 -0000 @@ -267,38 +267,39 @@ The following options need to be configu CONFIG_AP1000 CONFIG_gw8260 CONFIG_PIP405 CONFIG_AR405 CONFIG_hermes CONFIG_PM826 CONFIG_BAB7xx CONFIG_hymod CONFIG_ppmc8260 - CONFIG_c2mon CONFIG_IAD210 CONFIG_QS823 - CONFIG_CANBT CONFIG_ICU862 CONFIG_QS850 - CONFIG_CCM CONFIG_IP860 CONFIG_QS860T - CONFIG_CMI CONFIG_IPHASE4539 CONFIG_RBC823 - CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RPXClassic - CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXlite - CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXsuper - CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_rsdproto - CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_sacsng - CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_Sandpoint8240 - CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8245 - CONFIG_CSB272 CONFIG_LANTEC CONFIG_sbc8260 - CONFIG_CU824 CONFIG_lwmon CONFIG_sbc8560 - CONFIG_DASA_SIM CONFIG_MBX CONFIG_SM850 - CONFIG_DB64360 CONFIG_MBX860T CONFIG_SPD823TS - CONFIG_DB64460 CONFIG_MHPC CONFIG_STXGP3 - CONFIG_DU405 CONFIG_MIP405 CONFIG_SXNI855T - CONFIG_DUET_ADS CONFIG_MOUSSE CONFIG_TQM823L - CONFIG_EBONY CONFIG_MPC8260ADS CONFIG_TQM8260 - CONFIG_ELPPC CONFIG_MPC8540ADS CONFIG_TQM850L - CONFIG_ELPT860 CONFIG_MPC8540EVAL CONFIG_TQM855L - CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM860L - CONFIG_ERIC CONFIG_MUSENKI CONFIG_TTTech - CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_UTX8245 - CONFIG_ETX094 CONFIG_NETPHONE CONFIG_V37 - CONFIG_EVB64260 CONFIG_NETTA CONFIG_W7OLMC - CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMG - CONFIG_FADS850SAR CONFIG_NX823 CONFIG_WALNUT - CONFIG_FADS860T CONFIG_OCRTC CONFIG_ZPC1900 - CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZUMA - CONFIG_FPS850L CONFIG_OXC - CONFIG_FPS860L CONFIG_PCI405 + CONFIG_BC3450 CONFIG_IAD210 CONFIG_QS823 + CONFIG_c2mon CONFIG_ICU862 CONFIG_QS850 + CONFIG_CANBT CONFIG_IP860 CONFIG_QS860T + CONFIG_CCM CONFIG_IPHASE4539 CONFIG_RBC823 + CONFIG_CMI CONFIG_IVML24 CONFIG_RPXClassic + CONFIG_cogent_mpc8260 CONFIG_IVML24_128 CONFIG_RPXlite + CONFIG_cogent_mpc8xx CONFIG_IVML24_256 CONFIG_RPXsuper + CONFIG_CPCI405 CONFIG_IVMS8 CONFIG_rsdproto + CONFIG_CPCI4052 CONFIG_IVMS8_128 CONFIG_sacsng + CONFIG_CPCIISER4 CONFIG_IVMS8_256 CONFIG_Sandpoint8240 + CONFIG_CPU86 CONFIG_JSE CONFIG_Sandpoint8245 + CONFIG_CRAYL1 CONFIG_LANTEC CONFIG_sbc8260 + CONFIG_CSB272 CONFIG_lwmon CONFIG_sbc8560 + CONFIG_CU824 CONFIG_MBX CONFIG_SM850 + CONFIG_DASA_SIM CONFIG_MBX860T CONFIG_SPD823TS + CONFIG_DB64360 CONFIG_MHPC CONFIG_STXGP3 + CONFIG_DB64460 CONFIG_MIP405 CONFIG_SXNI855T + CONFIG_DU405 CONFIG_MOUSSE CONFIG_TQM823L + CONFIG_DUET_ADS CONFIG_MPC8260ADS CONFIG_TQM8260 + CONFIG_EBONY CONFIG_MPC8540ADS CONFIG_TQM850L + CONFIG_ELPPC CONFIG_MPC8540EVAL CONFIG_TQM855L + CONFIG_ELPT860 CONFIG_MPC8560ADS CONFIG_TQM860L + CONFIG_ep8260 CONFIG_MUSENKI CONFIG_TTTech + CONFIG_ERIC CONFIG_MVS1 CONFIG_UTX8245 + CONFIG_ESTEEM192E CONFIG_NETPHONE CONFIG_V37 + CONFIG_ETX094 CONFIG_NETTA CONFIG_W7OLMC + CONFIG_EVB64260 CONFIG_NETVIA CONFIG_W7OLMG + CONFIG_FADS823 CONFIG_WALN CONFIG_WALNUT + CONFIG_FADS850SAR CONFIG_OCRTC CONFIG_ZPC1900 + CONFIG_FADS860T CONFIG_ORSG CONFIG_ZUMA + CONFIG_FLAGADM CONFIG_OXC + CONFIG_FPS850L CONFIG_PCI405 + CONFIG_FPS860L ARM based boards: -----------------

1 0

[U-Boot-Users] Minor patch to 'pxa-regs.h'
by Paul Schulz 21 Oct '05

21 Oct '05

Greetings, A small typo change in include/asm-arm/arch-pxa/pxa-regs.h See: http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=3023/1 (How often do the include files get updated?) Cheers, Paul Schulz <paul(a)mawsonlakes.org>

2 2

[U-Boot-Users] uboot for arm922T based platform
by suresh.venkatachalam＠wipro.com 21 Oct '05

21 Oct '05

hi, Is there any arm922T based platforms supported by u-boot? I tried cm4008 in uboot 1.1.3 but it is giving some errors while building like... net/libnet.a(net.o): In function `ArpRequest': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:232: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetStartAgain': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:584: undefined reference to `eth_halt' net/libnet.a(net.o): In function `NetSendPacket': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:637: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetSendUDPPacket': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:686: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetReceive': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:1284: undefined reference to `eth_send' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:1313: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetLoop': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:302: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:306: undefined reference to `eth_init' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:388: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:494: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:488: undefined reference to `eth_rx' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:548: undefined reference to `eth_halt' Even if i fix it some other problems are coming.Is there anything i am missing ... I want a readily working one for any 922T based platform... Please send any pointers reg it... Thanks in advance. suresh

1 0

RE: [U-Boot-Users] Patch to show address definition based on file /line number with e xtra flags in the nm command
by atul.sabharwal＠exgate.tek.com 20 Oct '05

20 Oct '05

I did that. Then I did cscope -b -R -u -q to enable a fast recursive index file generation in the top directory. Now I go to cpu/mpc8xx and search For the typedef bd_t from that directory & cannot find it. There Are some environment varibles e.g. $HOME or $SOURCEDIRS and it does not work. Even define a CSCOPE_DIR variable in the main.c to change cwd to this Directory but no quick solution. Unless its some user error on my part:) -----Original Message----- From: Frank [mailto:frannk_m1@yahoo.com] Sent: Wednesday, October 19, 2005 7:54 PM To: Sabharwal, Atul; u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Patch to show address definition based on file/line number with e xtra flags in the nm command at the top level directory: find . -name "*.[sSch]" -print >cscope.files --- atul.sabharwal(a)exgate.tek.com wrote: > This is a nit but instead of tracing code using cscope/ctags > or fgrep, this > method > Makes code tracing lot quicker. Unless you have an IDE :) > > I have used cscope but have not been able to search symbols at > a top level > Directory from a directory N level deep. Any tips > appreciated. > > > --- /login/asabharw/lxhome/u-boot-1.1.3/Makefile 2005-08-13 > 16:53:35.000000000 -0700 > +++ Makefile 2005-10-17 18:59:37.000000000 -0700 > @@ -194,7 +194,7 @@ > $ -name CVS -prune $ -o $ -name '*.[ch]' -print > $` > > System.map: u-boot > - @$(NM) $< | \ > + $(NM) -A -l $< | \ > grep -v '$compiled$\|$\.o$$$\|$ [aUw] > $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ > sort > System.map > > > > ------------------------------------------------------- > This SF.Net email is sponsored by: > Power Architecture Resource Center: Free content, downloads, > discussions, > and more. http://solutions.newsforge.com/ibmarch.tmpl > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users > __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

2 1

[U-Boot-Users] Boot loader on PC (i386) with flash memory
by Martin Kajdas 20 Oct '05

20 Oct '05

Hello, My situation is: I have a custom designed flash memory PCI card in a standard PC motherboard (i386) (no floppy, no hard disk, no CD-ROM). Everything else is standard (serial, parallel, USB, VGA, network, BIOS). The PC does the standard boot and eventually jumps to expansion ROM on my PCI card which does the rest. At this point, I trap the INT 19 and when BIOS is finished, I get to boot my code from flash memory on my card. My code consists of a Linux kernel with RTAI (real time) extensions, busybox and my application program. I tried booting my code from a hard disk (temporarily) and it works well. Then, I tried it with BlueCat (LynuxWorks) demo software running from the flash memory and it also worked well. But when I found out that LynuxWorks wants $8000 for the privilege of using their software, I decided against it. It does too much and I do not need all of their functionality. All I need is to create bootable root file system (image), have it in flash and then copy it to RAM and boot from it. After finding U-Boot, I believe that it will work form me, with some customizations on my part which I will release back to U-Boot. Of course, I do not need all of the power up initialization of the CPU as this is already done by the motherboard's BIOS but the booting of the Linux from flash should be the same. My questions: - is my thinking correct? - was this ever done (I would be surprised if it was not) and is there an easier way (another project)? - would this be useful to U-Boot community? - any ideas on how to proceed? - is anybody interested in such a scenario (PC i386 setup)? I appreciate any feedback, Martin

2 1

RE: [U-Boot-Users] Patch to show address definition based on file /line number with e xtra flags in the nm command
by atul.sabharwal＠exgate.tek.com 20 Oct '05

20 Oct '05

I did that to setup C scope database from u-boot-1.1.2. Now I go to cpu/mpc860 and in fec.c a global typedef bd_t is passed as a parameter. Now I do cscope to find the definition of this symbol and it cannot find the symbol. I don't find a global CSCOPE_DB environment variable definition in the man page which tells to where to start the csope search. This is RH 9.0. If you can tell me about some workaround or I should ask cscope mailing List. I just downloaded cscope a few days back. Thanks, Atul -----Original Message----- From: Frank [mailto:frannk_m1@yahoo.com] Sent: Wednesday, October 19, 2005 7:54 PM To: Sabharwal, Atul; u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Patch to show address definition based on file/line number with e xtra flags in the nm command at the top level directory: find . -name "*.[sSch]" -print >cscope.files --- atul.sabharwal(a)exgate.tek.com wrote: > This is a nit but instead of tracing code using cscope/ctags > or fgrep, this > method > Makes code tracing lot quicker. Unless you have an IDE :) > > I have used cscope but have not been able to search symbols at > a top level > Directory from a directory N level deep. Any tips > appreciated. > > > --- /login/asabharw/lxhome/u-boot-1.1.3/Makefile 2005-08-13 > 16:53:35.000000000 -0700 > +++ Makefile 2005-10-17 18:59:37.000000000 -0700 > @@ -194,7 +194,7 @@ > $ -name CVS -prune $ -o $ -name '*.[ch]' -print > $` > > System.map: u-boot > - @$(NM) $< | \ > + $(NM) -A -l $< | \ > grep -v '$compiled$\|$\.o$$$\|$ [aUw] > $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ > sort > System.map > > > > ------------------------------------------------------- > This SF.Net email is sponsored by: > Power Architecture Resource Center: Free content, downloads, > discussions, > and more. http://solutions.newsforge.com/ibmarch.tmpl > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users > __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

1 0

[U-Boot-Users] uboot for arm922T based platform
by suresh.venkatachalam＠wipro.com 20 Oct '05

20 Oct '05

hi, Is there any arm922T based platforms supported by u-boot? I tried cm4008 in uboot 1.1.3 but it is giving some errors while building like... net/libnet.a(net.o): In function `ArpRequest': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:232: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetStartAgain': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:584: undefined reference to `eth_halt' net/libnet.a(net.o): In function `NetSendPacket': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:637: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetSendUDPPacket': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:686: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetReceive': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:1284: undefined reference to `eth_send' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:1313: undefined reference to `eth_send' net/libnet.a(net.o): In function `NetLoop': /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:302: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:306: undefined reference to `eth_init' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:388: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:494: undefined reference to `eth_halt' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:488: undefined reference to `eth_rx' /home/ucluser/user/suresh/u-boot/u-boot-1.1.3/net/net.c:548: undefined reference to `eth_halt' Even if we fix it some other problems are coming.Is there anything to be done... I want a readily working one for any 922T based platform... Please send any pointers reg it... Thanks in advance. suresh

1 0

[U-Boot-Users] Jffs2 filesystem image
by Swapnil Ashok Narkhede 20 Oct '05

20 Oct '05

I have to build jffs2 filesystem image. I read the DULG manual and build the jffs2.img image. As per manual when we use the mkfs.jffs2 tool to create the jffs2.img we have to specify rootfs_devices.tab, but i couldnt find it in eldk kit. Where is this file supposed to be.? I created a jffs2.img without specifying the rootfs_devices.tab option,but the size of this file is about 3.55 MB. Is this jffs2 filesystem image supposed to be that big. When i use mkimage -l jffs2.img, it says Bad Magic Number. So i cannot even transfer this file on the flash since U-boot would complain as Bad Magic Number. So how do i create the jffs2 filesystem image and load it in flash so that i can issue bootm <load address of kernel> <load address of jffs2 image> Regards, Swapnil Narkhede Mob:- 0432025023 Email:- s3092131(a)student.rmit.edu.au School of Computer Science and Information Technology RMIT University, Melbourne

2 1

[U-Boot-Users] u-boot 1.1.2 on mpc852t : decrementer exception in interrupt_init()
by gautam borad 20 Oct '05

20 Oct '05

Hi, I'm trying to port u-boot-1.1.2 to mpc852t on ep852 board (from embedded planet). I'm using RPXClassic as reference. I only changed the config file rest all is RPXClassic stuff.I've put the config file in the end of the post. First of all the console works only on 2400 even if i set baud rate to 9600 in my config.h . If i use any other baud rate i get junk on the screen. The board gives a "decrementer exception" in interrupt_init() in set_msr() in lib_ppc/interrupts.c which takes the code to timer_interrupt() and then to timer_interrupt_cpu(). I get all the messages till "Hit any key to stop autoboot: 5 " at this point it just hangs. When run through debugger (code warrior) , I accept the message (decrementer exception) and continue the execution and all works fine(I get the prompt). The following is the dump ( i sprinkled the code with *many* printfs) ------------------------------------------------------------------------------------------------------------------------------------------------------------- U-Boot 1.1.2 (Oct 19 2005 - 18:40:16) CPU: MPC852TxxZPnn at 50 MHz [40.0...50.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present Board: EP852 DRAM: 16 MB cpu_clk= 50000000 bus_clk = 50000000 FLASH: Flash addr:ff800000 Device ID :227e227e 16 MB *** Warning - bad CRC, using default environment Displaying devices : In: serial Out: serial Err: serial console_init_r done decrementer_count = 3125 in hex 0xc35 entering cpm_interrupt_init entering irq_install_handler with CPMVEC_ERROR irq_install_handler done entering irq_install_handler with INTERRUPT irq_install_handler done cpm_interrupt_init done entering set_dec set_dec done entering set_msr *** Timer Interrupt *** // timer_interrupt_cpu() in cpu/mpc8xx/interrupts immr->im_clkrst.car_plprcr = 39a5000 immr->im_clkrst.car_plprcr = 39a0000 get_dec() = 4294514023l 0xfff91567 Inside timer_interrupt. decrementer_count = 3125 in hex 0xc35 interrupt init passed. setting timer entering initialization from env initialization from env done. entering bootfile stuff bootfile stuff done Net: FEC ETHERNET Entering main_loop### main_loop entered: bootdelay=5 ### main_loop: bootcmd="tftpboot; setenv bootargs root=/dev/nfs rw nfsroot=$(ser verip):$(rootpath) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname): :off; bootm" Hit any key to stop autoboot: 5 -------------------------------------------------------------------------------------------------------------------------------------------------- Why is immr->im_clkrst.car_plprcr = 39a5000 when in config.h i define PLPRCR as 0x000A4000 ? Does it matter? Some of the defines in config.h #define RPXClassic_50MHz#define CONFIG_MPC860 1 #define CONFIG_RPXCLASSIC 1 #define CONFIG_MPC852T 1 #define CONFIG_8xx_OSCLK 10000000 #define CONFIG_8xx_CPUCLK_DEFAULT 50000000 // 50 MHz #define CFG_8xx_CPUCLK_MIN 40000000 // 40 MHz #define CFG_8xx_CPUCLK_MAX 50000000 #define CFG_LOAD_ADDR CFG_SDRAM_BASE #define CFG_IMMR 0xFA200000 #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0xFF800000 #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_SYPCR 0xFFFFFF89 #define CFG_SIUMCR 0x01000800 #define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTE) #define CFG_PISCR (PISCR_PS | PISCR_PITF | PISCR_PTE) #define CFG_PLPRCR 0x000A4000 // is this OK?? #define CFG_SCCR 0x03020800 #define CFG_DER 0x73E67C0F #define CFG_OR1_PRELIM 0xFF000600 #define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64)) #define CFG_MAMR_PTA 58 #define CFG_MPTPR MPTPR_PTP_DIV2 #define CFG_MAMR_10COL 0x58803000 All the hard coded values are from the configuration file I got along with the board to be used with code warrior and the board works fine with that, so they are right. Thanks in advance.

2 3

[U-Boot-Users] Make
by Raghu 20 Oct '05

20 Oct '05

Dear All, I am compiling u-boot source in cygwin shell, but if I do am "make" in the u-boot directory it loops around to continously generate .depend file make[1]: Entering directory `/cygdrive/c/cg6060/NMSProjects/mfgtest/cg606x/target/u-boot-1.1.2/tools' gcc -M -Wall -pedantic -idirafter ../include -DTEXT_BASE=0xfffc0000 -DUSE_HOSTCC environment.c img2srec.c mkimage.c crc32.c envcrc.c gen_eth_addr.c bmp_logo.c > .depend make[1]: Leaving directory `/cygdrive/c/cg6060/NMSProjects/mfgtest/cg606x/target/u-boot-1.1.2/tools' make[1]: Entering directory `/cygdrive/c/cg6060/NMSProjects/mfgtest/cg606x/target/u-boot-1.1.2/tools' gcc -M -Wall -pedantic -idirafter ../include -DTEXT_BASE=0xfffc0000 -DUSE_HOSTCC environment.c img2srec.c mkimage.c crc32.c envcrc.c gen_eth_addr.c bmp_logo.c > .depend make[1]: Leaving directory `/cygdrive/c/cg6060/NMSProjects/mfgtest/cg606x/target/u-boot-1.1.2/tools' Any clues please, TIA Raghu. __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

2 1

[U-Boot-Users] New Source
by Matias Sundman (AS/EAB) 19 Oct '05

19 Oct '05

Hello Wolfgang, I have Uboot source code to 5 boards named ExB1, ExB2, MxB1, MxB2 and MxB3 that we have developed at Ericsson AB. The common name for the above boards is XxB. New boards are in the design pipe and will be called e.g. ExB3. The boards features the following ( new? ) functionality, o Two separate flash areas, one for loadmodules that can be exchanged in a live system and one for fallback purposes if the exchangeable area has been corrupted ... o Automatic detection of Bootp or Flash usage at boot time ... o IDE support ( PIO / DMA ) through UPM on our PowerQuicc2 8270 CPU ... o IPMI ( ATCA standard ) Interface ... o Password protection ... Now, How do I publish the above source code in the best way to the Uboot community? Best Regards // Matias Matias Sundman Senior SW Designer Ericssonl IS Ethernet Switch, DIPN Ericsson AB Box 1505 Office: +46 8 719 86 83 SE-125 25 ÄLVSJÖ ECN: 850 98683 SWEDEN Mobile: +46 70 267 2405 Visiting address: E-mail: Matias.Sundman(a)ericsson.com Armborstvägen 14 Web: http://www.ericsson.com Älvsjö, STOCKHOLM

1 0

[U-Boot-Users] pb jffs2 under uboot
by Flament Assystem 19 Oct '05

19 Oct '05

hi all, I create a mtdblock partition from linux on mtdblock0 I flash partition with this procedure : #linux > flash_eraseall /dev/mtdchar0 > nandwrite /dev/mtdchar0 jffs2.img > mount -t jffs2 /dev/mtdblock0 /mnt/mtd > cd /mnt/mtd > ls > toto /opt > umount /mnt/mtd > reboot the partition jffs2 running correctly under linux but when I try this in u-boot, there are problem #u-boot >ls warnig block writes should be last 20487 bytes and start on a 2048 byte boundry... If you have a suggest about this problem ? Maybe must be set partition offset and size partition ? thanks for your answer ... and your help ... With kind regards/ Cordialement, David Flament SySol9100 System Integration Engineer --------------------------------------------------------------------------------------------------------- Philips Semiconductors - BL Cellular Systems - MST System Solutions Route d'Angers 72081 Le Mans Cedex 9 France Phone :+33 (0) 2 19 18 43 11 Mobile : +33 (0)6 23 05 12 18 mail : flament.assystem(a)philips.com

1 0

[U-Boot-Users] BSS section in PPC405 Targets
by Raghu 19 Oct '05

19 Oct '05

Hello All, I am working on a PPC405EP based target and hist upon this issue w.r.t the "struct flash_info_t flash_info[]" variable declared globally in the board/flash.c directory. My target has 128Mbyte SDRAM i.e. 0x08000000. In the function "flash_init", for( i = 0; i < CFG_MAX_FLASH_BANKS; ++i ) { flash_info[i].flash_id = FLASH_UNKNOWN; } I get a Bus Fault exception. My map file shows the following ... **************************************************** COMMON 0xffff8bb0 0x50c board/nms/CG6060/libCG6060.a(flash.o) 0x0 (size before relaxing) 0xffff8bb0 flash_info 0xffff8000 . = 0xffff8000 **************************************************** And after relocation to RAM the address shown is I2C: Enabled DRAM: 128 MB Top of RAM usable for U-Boot at: 08000000 New Stack Pointer is: 07f87f38 Now running in RAM - U-Boot at: 07fc8000 FLASH: [flash_init, 56] Entering ... [flash_init, 57] flash_info = 0x08000BB0 ... Bus Fault @ 0x07fe5f0c, fixup 0x00000000 Machine check in kernel mode. ************************************************** The flash_info is @ 0x08000BB0, which seeme out of SRAM limit. Have I messed up somewhere, or any clues where to look for the linker script information please ?? Warm Regards, Raghu. __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

1 0

Re: RE: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E
by Florian Behrens 19 Oct '05

19 Oct '05

Yep, that's right. Florian. Chu hanjin-r52514 <Hanjin.Chu(a)freescale.com> schrieb am 19.10.2005 09:30:07: > I am not clear of your DIP setting. Seems you bootup your u-boot > from reading HRCW from flash seeing below your log. Anyway, it has bootup. > > Best Regards > > ============================ > Neil Chu > > Developer Technology Organization > Freescale Semiconductor Inc. > Email: hanjin.chu(a)freescale.com > ============================ > > > > -----Original Message----- > From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users- > admin(a)lists.sourceforge.net]On Behalf Of Florian Behrens > Sent: Wednesday, October 19, 2005 3:23 PM > To: McClintock Matthew-R56630 > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E > > > I didn't change the flash address but rather the text segment start > address from 0xFE700000 to 0xFE000000 in board/mpc8349ads/config.mk > (see also my message from 2005-10-11 08:25). > > I used the commands as described in the README: > > tftp 10000 u-boot.bin > protect off fe000000 fe09ffff > erase fe000000 fe09ffff > cp.b 10000 fe000000 a0000 > > Servus, > Florian. > > Matthew McClintock <msm(a)freescale.com> schrieb am 19.10.2005 09:00:50: > > > Did you find a solution to your problem? Neil Chu just sent a patch in > > today that corrects values in the MPC8349 readme. Can you give a listing > > of the commands you used to program the new u-boot onto your board? > > > > -Matthew > > > > > > On Mon, 2005-10-10 at 18:15 +0200, flobe01(a)arcor.de wrote: > > > Has anybody tried to bring up U-Boot 1.1.3 together with a (Power > > Quicc II Pro) MPC8349E MDS Processor Board (silicon rev 1.0)? The > > board comes with a (probably patched) 1.1.2 version installed. I > > want to update it to 1.1.3 in order to be able to use a current > > Linux kernel (2.6.13 - U-Boot 1.1.2 seems to be incompatible due to > > differences in the bd_info structures, right?). > > > > > > After building U-Boot and writing to the flash according to the > > README, the board does show no more signs of life (apart from the > > reset sequence leds) after hard reset. > > > > > > I used crosstool 0.38 for building the tool chain with a standard > > ppc target (-mcpu=powerpc) and gcc 3.4.1. > > > > > > Are there any board settings necessary other than those defaults > > in the Getting Started guide? > > > > > > Thanks and regards, > > > Florian. Machen Sie aus 14 Cent spielend bis zu 100 Euro! Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. http://www.arcor.de/rd/emf-gaming-1

1 0

RE: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E
by Chu hanjin-r52514 19 Oct '05

19 Oct '05

I am not clear of your DIP setting. Seems you bootup your u-boot from reading HRCW from flash seeing below your log. Anyway, it has bootup. Best Regards ============================ Neil Chu Developer Technology Organization Freescale Semiconductor Inc. Email: hanjin.chu(a)freescale.com ============================ -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of Florian Behrens Sent: Wednesday, October 19, 2005 3:23 PM To: McClintock Matthew-R56630 Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E I didn't change the flash address but rather the text segment start address from 0xFE700000 to 0xFE000000 in board/mpc8349ads/config.mk (see also my message from 2005-10-11 08:25). I used the commands as described in the README: tftp 10000 u-boot.bin protect off fe000000 fe09ffff erase fe000000 fe09ffff cp.b 10000 fe000000 a0000 Servus, Florian. Matthew McClintock <msm(a)freescale.com> schrieb am 19.10.2005 09:00:50: > Did you find a solution to your problem? Neil Chu just sent a patch in > today that corrects values in the MPC8349 readme. Can you give a listing > of the commands you used to program the new u-boot onto your board? > > -Matthew > > > On Mon, 2005-10-10 at 18:15 +0200, flobe01(a)arcor.de wrote: > > Has anybody tried to bring up U-Boot 1.1.3 together with a (Power > Quicc II Pro) MPC8349E MDS Processor Board (silicon rev 1.0)? The > board comes with a (probably patched) 1.1.2 version installed. I > want to update it to 1.1.3 in order to be able to use a current > Linux kernel (2.6.13 - U-Boot 1.1.2 seems to be incompatible due to > differences in the bd_info structures, right?). > > > > After building U-Boot and writing to the flash according to the > README, the board does show no more signs of life (apart from the > reset sequence leds) after hard reset. > > > > I used crosstool 0.38 for building the tool chain with a standard > ppc target (-mcpu=powerpc) and gcc 3.4.1. > > > > Are there any board settings necessary other than those defaults > in the Getting Started guide? > > > > Thanks and regards, > > Florian. Machen Sie aus 14 Cent spielend bis zu 100 Euro! Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. http://www.arcor.de/rd/emf-gaming-1 ------------------------------------------------------- This SF.Net email is sponsored by: Power Architecture Resource Center: Free content, downloads, discussions, and more. http://solutions.newsforge.com/ibmarch.tmpl _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

Re: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E
by Florian Behrens 19 Oct '05

19 Oct '05

I didn't change the flash address but rather the text segment start address from 0xFE700000 to 0xFE000000 in board/mpc8349ads/config.mk (see also my message from 2005-10-11 08:25). I used the commands as described in the README: tftp 10000 u-boot.bin protect off fe000000 fe09ffff erase fe000000 fe09ffff cp.b 10000 fe000000 a0000 Servus, Florian. Matthew McClintock <msm(a)freescale.com> schrieb am 19.10.2005 09:00:50: > Did you find a solution to your problem? Neil Chu just sent a patch in > today that corrects values in the MPC8349 readme. Can you give a listing > of the commands you used to program the new u-boot onto your board? > > -Matthew > > > On Mon, 2005-10-10 at 18:15 +0200, flobe01(a)arcor.de wrote: > > Has anybody tried to bring up U-Boot 1.1.3 together with a (Power > Quicc II Pro) MPC8349E MDS Processor Board (silicon rev 1.0)? The > board comes with a (probably patched) 1.1.2 version installed. I > want to update it to 1.1.3 in order to be able to use a current > Linux kernel (2.6.13 - U-Boot 1.1.2 seems to be incompatible due to > differences in the bd_info structures, right?). > > > > After building U-Boot and writing to the flash according to the > README, the board does show no more signs of life (apart from the > reset sequence leds) after hard reset. > > > > I used crosstool 0.38 for building the tool chain with a standard > ppc target (-mcpu=powerpc) and gcc 3.4.1. > > > > Are there any board settings necessary other than those defaults > in the Getting Started guide? > > > > Thanks and regards, > > Florian. Machen Sie aus 14 Cent spielend bis zu 100 Euro! Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. http://www.arcor.de/rd/emf-gaming-1

1 0

RE: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E
by Chu hanjin-r52514 19 Oct '05

19 Oct '05

What is your on board switch setting for u-boot 1.1.2, what is your oscillator frequency? Knowing the u-boot 1.1.3 defaulty bootup by reading Hardware Reset Configuration Word from BCSR. Best Regards ============================ Neil Chu Freescale Semiconductor Inc. ============================ -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net]On Behalf Of McClintock Matthew-R56630 Sent: Wednesday, October 19, 2005 3:01 PM To: flobe01(a)arcor.de Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E Did you find a solution to your problem? Neil Chu just sent a patch in today that corrects values in the MPC8349 readme. Can you give a listing of the commands you used to program the new u-boot onto your board? -Matthew On Mon, 2005-10-10 at 18:15 +0200, flobe01(a)arcor.de wrote: > Has anybody tried to bring up U-Boot 1.1.3 together with a (Power Quicc II Pro) MPC8349E MDS Processor Board (silicon rev 1.0)? The board comes with a (probably patched) 1.1.2 version installed. I want to update it to 1.1.3 in order to be able to use a current Linux kernel (2.6.13 - U-Boot 1.1.2 seems to be incompatible due to differences in the bd_info structures, right?). > > After building U-Boot and writing to the flash according to the README, the board does show no more signs of life (apart from the reset sequence leds) after hard reset. > > I used crosstool 0.38 for building the tool chain with a standard ppc target (-mcpu=powerpc) and gcc 3.4.1. > > Are there any board settings necessary other than those defaults in the Getting Started guide? > > Thanks and regards, > Florian. > > > Machen Sie aus 14 Cent spielend bis zu 100 Euro! > Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. > http://www.arcor.de/rd/emf-gaming-1 > > > ------------------------------------------------------- > This SF.Net email is sponsored by: > Power Architecture Resource Center: Free content, downloads, discussions, > and more. http://solutions.newsforge.com/ibmarch.tmpl > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users ------------------------------------------------------- This SF.Net email is sponsored by: Power Architecture Resource Center: Free content, downloads, discussions, and more. http://solutions.newsforge.com/ibmarch.tmpl _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

[U-Boot-Users] U-Boot 1.1.3 does not boot with MPC8349E
by flobe01＠arcor.de 19 Oct '05

19 Oct '05

Has anybody tried to bring up U-Boot 1.1.3 together with a (Power Quicc II Pro) MPC8349E MDS Processor Board (silicon rev 1.0)? The board comes with a (probably patched) 1.1.2 version installed. I want to update it to 1.1.3 in order to be able to use a current Linux kernel (2.6.13 - U-Boot 1.1.2 seems to be incompatible due to differences in the bd_info structures, right?). After building U-Boot and writing to the flash according to the README, the board does show no more signs of life (apart from the reset sequence leds) after hard reset. I used crosstool 0.38 for building the tool chain with a standard ppc target (-mcpu=powerpc) and gcc 3.4.1. Are there any board settings necessary other than those defaults in the Getting Started guide? Thanks and regards, Florian. Machen Sie aus 14 Cent spielend bis zu 100 Euro! Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. http://www.arcor.de/rd/emf-gaming-1

5 5

[U-Boot-Users] Interactive Memory test patch & new tests
by atul.sabharwal＠exgate.tek.com 19 Oct '05

19 Oct '05

Description: Enclosed is a patch to run memory tests using an interactive menu over the serial port in U-Boot. The patch includes 1. serial_gets() routine 2. New memory tests 1. address/complement address test 2. pattern/complement pattern test 3. peek/poke routines 4. infinite memory test 5. Flash/Ram copy test The tests are useful to have an interactive Bring Up Diagnostics for a system. --- /login/asabharw/lxhome/u-boot-1.1.3/common/serial.c 2005-08-13 16:53:35.000000000 -0700 +++ u-boot-1.1.2/common/serial.c 2005-09-26 17:58:06.000000000 -0700 @@ -38,9 +38,6 @@ #elif defined(CONFIG_8xx_CONS_SCC1) || defined(CONFIG_8xx_CONS_SCC2) \ || defined(CONFIG_8xx_CONS_SCC3) || defined(CONFIG_8xx_CONS_SCC4) return &serial_scc_device; -#elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ - || defined(CONFIG_405EP) - return &serial0_device; #else #error No default console #endif @@ -74,12 +71,6 @@ serial_register (&serial_scc_device); #endif -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ - || defined(CONFIG_405EP) - serial_register(&serial0_device); - serial_register(&serial1_device); -#endif - serial_assign (default_serial_console ()->name); } @@ -210,4 +201,17 @@ serial_current->puts (s); } +void serial_gets (char *s) +{ + unsigned int c; + + c = serial_getc(); + /* Typically <enter> key is lf on linux systems. under minicom it is <cr>. maybe terminal settings ?? */ + while(( c != '\r') && (c != '\n')) + { + *s++ = (char)c; + c = serial_getc(); + } + return; +} #endif /* CONFIG_SERIAL_MULTI */ --- /login/asabharw/lxhome/u-boot-1.1.3/post/memory.c 2005-08-13 16:53:35.000000000 -0700 +++ u-boot-1.1.2/post/memory.c 2005-10-18 14:53:36.000000000 -0700 @@ -173,6 +173,28 @@ #endif +#ifdef CFG_POST_MEMORY_INTERACTIVE +const static unsigned char testpattern[]= +{ + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2F, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, + 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, + 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, + 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F, + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F, + 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F, + 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF, + 0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF, + 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, + 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF, + 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, + 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF +}; +#endif + /* * This function performs a double word move from the data at * the source pointer to the location at the destination pointer. @@ -222,6 +244,9 @@ const unsigned long long otherpattern = 0x0123456789abcdefULL; +int pattern_copy_test(unsigned long address, unsigned long bytecount, unsigned char type); +int inverse_pattern_copy_test(unsigned long address, unsigned long bytecount, unsigned char type); + static int memory_post_dataline(unsigned long long * pmem) { unsigned long long temp64; @@ -413,6 +438,115 @@ return ret; } + + +/* This is a thorough address/data line test by writting the address value as * + * data value on the memory part. */ +int memory_combined_address_data_line_test(const unsigned long start, const unsigned long end) +{ + volatile unsigned long * startptr; + unsigned long data; + + printf("Write cycle\n"); + for( startptr = (unsigned long *) start; startptr < (unsigned long *) end; startptr++ ) + { + *startptr = (unsigned long) startptr; + } + + printf("Verify cycle\n"); + for( startptr = (unsigned long *) start; startptr < (unsigned long *) end; startptr++ ) + { + /* Need to read once from the memory location as subsequent read maybe fine */ + data = *startptr; + if(data != (unsigned long) startptr) + { + printf("Data mismatch at address %p Expected 0x%08x. Value 0x%08x\n\n", (unsigned long) startptr, + (unsigned long)startptr, data); + return -1; + } + } + printf("Test Passed\n"); + return 0; +} + +/* This is a thorough address/data line test by writting the inverse of address value as * + * data value on the memory part. */ +int memory_combined_inverse_address_data_line_test(const unsigned long start, const unsigned long end) +{ + volatile unsigned long * startptr; + unsigned long data; + + printf("Write cycle\n"); + for( startptr = (unsigned long *) start; startptr < (unsigned long *) end; startptr++ ) + { + *startptr = ~((unsigned long) startptr); + } + + printf("Verify cycle\n"); + for( startptr = (unsigned long *) start; startptr < (unsigned long *) end; startptr++ ) + { + /* Need to read once from the memory location as subsequent read maybe fine */ + data = *startptr; + if(data != (~(unsigned long) startptr)) + { + printf("Data mismatch at address %p Expected 0x%08x. Value 0x%08x\n\n", (unsigned long) startptr, + (~(unsigned long)startptr), data); + return -1; + } + } + printf("Test Passed\n"); + return 0; +} +static void memory_read(unsigned long location) +{ + int subchoice; + + + printf("Read mode [ b : byte, h : half word , w : word , d : double word ] : "); + subchoice = serial_getc(); + printf("\n\n"); + + switch(subchoice) + { + /* Byte Read */ + case 'b' : + { + unsigned char * ptr = (unsigned char *) location; + printf("\n\nByte Value at location %p is 0x%02x \n\n", location, *ptr ); + } + break; + + /* Half word Read */ + case 'h' : + { + unsigned short * ptr = (unsigned short *) location; + printf("\n\n16 bit Value at location %p is 0x%04x \n\n", location, *ptr); + } + break; + + /* Word Read */ + case 'w' : + { + unsigned long * ptr = (unsigned long *) location; + printf("\n32 bit Value at location %p is 0x%08x \n\n", location, *ptr); + } + break; + + /* Double Word Read */ + case 'd' : + { + unsigned long long * ptr = (unsigned long long *) location; + printf("\n64 bit Value at location %p is 0x%08x%08x \n\n", location, + *(unsigned long *)ptr, *(((unsigned long *) ptr)+1)); + } + break; + + default: + printf("\nInvalid Choice\n"); + } + return; +} + static int memory_post_tests (unsigned long start, unsigned long size) { int ret = 0; @@ -447,7 +581,30 @@ WATCHDOG_RESET (); if (ret == 0) ret = memory_post_test4 (start, size); + WATCHDOG_RESET (); + if (ret == 0) + ret = pattern_copy_test(start, size, 'm'); + WATCHDOG_RESET (); + if (ret == 0) + ret = memory_combined_address_data_line_test(start, (start + (size & 0xFFFFFFFC))); + WATCHDOG_RESET (); + if (ret == 0) + ret = memory_combined_inverse_address_data_line_test(start, (start + (size & 0xFFFFFFFC))); + WATCHDOG_RESET (); + if (ret == 0) + ret = pattern_copy_test(start, size, 'b'); + WATCHDOG_RESET (); + if (ret == 0) + ret = inverse_pattern_copy_test(start, size, 'h'); WATCHDOG_RESET (); + if (ret == 0) + ret = pattern_copy_test(start, size, 'w'); + WATCHDOG_RESET (); + if (ret == 0) + ret = inverse_pattern_copy_test(start, size, 'd'); + WATCHDOG_RESET (); + if (ret == 0) + ret = pattern_copy_test(start, size, 's'); return ret; } @@ -478,5 +635,589 @@ return ret; } +#warning "printf prints junk when we have a parameter in format string but no argument" + +static void memory_write(const unsigned long location) +{ + int subchoice; + unsigned char input[32]; + unsigned long long data; + + + memset(input, 0, strlen(input)); + printf("Write mode [ b : byte, h : half word , w : word , d : double word ] : "); + subchoice = serial_getc(); + printf("\n\n"); + + switch(subchoice) + { + /* Byte write */ + case 'b' : + { + unsigned char * ptr = (unsigned char *) location; + + printf("Enter Data : 0x "); + serial_gets(input); + data = simple_strtoul(input, NULL, 16); + + /* Write Data */ + *ptr = (unsigned char) data; + printf("\n\nByte Value at location %p is 0x%02x \n\n", location, *ptr); + } + break; + + /* Half Word Write */ + case 'h' : + { + unsigned short * ptr = (unsigned short *) location; + + printf("Enter Data : 0x "); + serial_gets(input); + data = simple_strtoul(input, NULL, 16); + + /* Write Data */ + *ptr = (unsigned short) data; + printf("\n\n16 bit Value at location %p is 0x%04x \n\n", location, *ptr); + } + break; + + /* Single word write */ + case 'w' : + { + unsigned long * ptr = (unsigned long *) location; + + printf("Enter Data : 0x "); + serial_gets(input); + data = simple_strtoul(input, NULL, 16); + + /* Write Data */ + *ptr = (unsigned long) data; + printf("\n32 bit Value at location %p is 0x%08x \n\n", location, *ptr); + } + break; + + /* Double word write */ + case 'd' : + { + unsigned long long * ptr = (unsigned long long *) location; + + printf("Enter Data : 0x "); + serial_gets(input); + data = simple_strtoul(input, NULL, 16); + + /* Write Data */ + *ptr = (unsigned long long) data; + printf("\nByte Value at location %p is 0x%08x%08x \n\n", location, + *(unsigned long *)ptr, *(((unsigned long *) ptr)+1)); + } + break; + + + default: + printf("\nInvalid Choice\n"); + } + return; +} + +#define MAX_BLOCKS 16 + +int flash_block_copy_test(unsigned long RamAddress, unsigned long bytecount, unsigned long blockSize) +{ + // break test region into max 16 equal sized blocks + /* We copy U-Boot code around as we can compare/verify with JTAG & network dump's*/ + const unsigned long flashBase = CFG_FLASH_BASE; + unsigned long blockStart[MAX_BLOCKS]; + unsigned long blockEnd[MAX_BLOCKS]; + unsigned int numBlocks = ((bytecount / blockSize ) % MAX_BLOCKS); + int index; + + blockStart[0] = RamAddress; + + //Setup start & end address for each block + for( index = 0; index < numBlocks ; index++ ) + { + blockEnd[index] = (blockStart[index] + blockSize) - 1; + blockStart[index + 1] = blockEnd[index] + 1; + } + blockEnd[index] = (blockStart[index] + blockSize) - 1; + + printf("\n"); + for( index = 0; index < numBlocks; index++ ) + { + printf( "block %d: %08x - %08x\n", index, blockStart[index], blockEnd[index] ); + } + + /* initialize block 0 with contents from the flash ROM. Duplicate remaining */ + /* 15 blocks. COPY CYCLE. */ + printf("Copy cycle\n"); + memcpy((void *)blockStart[0], (void *)flashBase, blockSize); + for (index = 1; index < numBlocks; index++) + { + memcpy((void *)blockStart[index], (void *)blockStart[index - 1], blockSize); + } + + /* Verify CYCLE. */ + printf("Verify cycle\n"); + for( index = 1; index < numBlocks; index++ ) + { + if(memcmp((void *) blockStart[index], (void *) blockStart[0], blockSize) != 0) + { + printf("Verification error at block %d\n", index); + return -1; + } + } + return 0; +} + +int pattern_copy_test(unsigned long address, unsigned long bytecount, unsigned char type) +{ + unsigned int i = 0; + + switch(type) + { + /* Byte Copy Test */ + case 'b': + { + /* Write Cycle */ + printf("\n%u byte copy test starting at address %p\n", sizeof(unsigned char), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned char)) + *((unsigned char *) (address + i) ) = (unsigned char) *(testpattern + (i % sizeof(testpattern))); + + printf("read cycle\n"); + /* Read Cycle */ + for( i = 0; i < bytecount; i += sizeof(unsigned char)) + if(*((unsigned char *) (address + i) ) != (unsigned char) *(testpattern + (i % sizeof(testpattern)))) + { + printf("Data mismatch at address %p Value : 0x%02x Expected : 0x%02x\n\n", + address + i, *((unsigned char *)(address + i)), + (unsigned char) *(testpattern + ( i % sizeof(testpattern)))); + return -1; + } + + } + break; + + /* 16 bit Copy Test */ + case 'h': + { + /* Write Cycle */ + printf("\n%u byte copy test starting at address %p\n", sizeof(unsigned short), address); + printf("write cycle\n"); + for( i = 0; i < bytecount ; i += sizeof(unsigned short)) + *((unsigned short *) (address + i) ) = + *(unsigned short *)(testpattern + (i % sizeof(testpattern))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount ; i += sizeof(unsigned short)) + if(*((unsigned short *) (address + i) ) != + *(unsigned short *)(testpattern + (i % sizeof(testpattern)))) + { + printf("Data mismatch at address %p Value : 0x%04x Expected : 0x%04x\n\n", + (address + i), *((unsigned short *)address + i), + *(unsigned short *)(testpattern + ( i % sizeof(testpattern)))); + return -1; + } + } + break; + + /* 32 bit Copy Test */ + case 'w': + { + /* Write Cycle */ + printf("\n%u byte copy test starting at address %p\n\n", sizeof(unsigned int), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned int)) + *((unsigned int *) (address + i) ) = + *(unsigned int *)(testpattern + (i % sizeof(testpattern))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned int)) + if(*((unsigned int *) (address + i) ) != + *(unsigned int *)(testpattern + (i % sizeof(testpattern)))) + { + printf("Data mismatch at address %p Value : 0x%08x Expected : 0x%08x\n", + address + i, *(unsigned int *)(address + i), + *(unsigned int *)(testpattern + ( i % sizeof(testpattern)))); + return -1; + } + } + break; + + /* 64 bit copy test */ + case 'd': + { + /* Write Cycle */ + printf("\n%u byte copy test starting at address %p\n\n", sizeof(unsigned long long), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned long long)) + *((unsigned long long *) (address + i) ) = + *(unsigned long long *)(testpattern + (i % sizeof(testpattern))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned long long)) + if(*((unsigned long long *) (address + i) ) != + *(unsigned long long *)(testpattern + (i % sizeof(testpattern)))) + { + printf("Data mismatch at address %p Value : 0x%08x%08x Expected : 0x%08x%08x\n", + address + i, *(unsigned long *)(address + i), + *(unsigned long *)(address + i + sizeof(unsigned long)), + *(unsigned long *)(testpattern + ( i % sizeof(testpattern))), + *(unsigned long *)(testpattern + ( (i + sizeof(unsigned long)) % sizeof(testpattern)))); + return -1; + } + } + break; + + /* strncpy based block copy */ + case 's': + { + unsigned short pattern_length = sizeof(testpattern); + unsigned long blockcount = 0; + + /* Write Cycle */ + printf("\nstrncpy test starting at address %p\n\n", address); + printf("write cycle with pattern size of %u\n", pattern_length); + for( i = 0; i < bytecount; i += pattern_length, blockcount+=1) + strncpy(address + i, testpattern, pattern_length); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; (i < bytecount) && (blockcount); i += pattern_length) + { + if(strncmp(address + i, testpattern, pattern_length) != 0) + { + printf("Data mismatch on block %u\n", blockcount); + return -1; + } + } + printf("strcpy based Block Copy Test Passed\n"); + return 0; + } + break; + + /* bcopy/memcpy based block copy */ + /* Note: In ppc_String.S, the strncpy code is less computation intensive. Hence, * + * two different versions of the test as different timing behavior. */ + case 'm': + { + unsigned short pattern_length = sizeof(testpattern); + unsigned long blockcount = 0; + + /* Write Cycle */ + printf("\nmemcpy test starting at address %p\n\n", address); + printf("write cycle with pattern size of %u\n", pattern_length); + for( i = 0; i < bytecount; i += pattern_length, blockcount+=1) + memcpy(address + i, testpattern, pattern_length); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; (i < bytecount) && (blockcount); i += pattern_length) + { + if(memcmp(address + i, testpattern, pattern_length) != 0) + { + printf("Data mismatch on block %u\n", blockcount); + return -1; + } + } + printf("memcpy based Block Copy Test Passed\n"); + return 0; + } + } + + if (i >= bytecount) + printf("Test Passed.\n"); + return 0; +} + +/* The inverse of pattern copy is a seperate test to keep the memory load at a higher rate */ +int inverse_pattern_copy_test(unsigned long address, unsigned long bytecount, unsigned char type) +{ + unsigned int i; + + switch(type) + { + /* Byte Copy Test */ + case 'b': + { + /* Write Cycle */ + printf("\n%u inverse byte copy test starting at address %p\n", sizeof(unsigned char), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned char)) + *((unsigned char *) (address + i) ) = (unsigned char) ~(*(testpattern + (i % sizeof(testpattern)))); + + printf("read cycle\n"); + /* Read Cycle */ + for( i = 0; i < bytecount; i += sizeof(unsigned char)) + if(*((unsigned char *) (address + i) ) != (unsigned char)(~(*(testpattern + (i % sizeof(testpattern)))))) + { + printf("Data mismatch at address %p Value : 0x%02x Expected : 0x%02x\n\n", + address + i, *((unsigned char *)(address + i)), + (unsigned char)~(*(testpattern + ( i % sizeof(testpattern))))); + return -1; + } + + } + break; + + /* 16 bit Copy Test */ + case 'h': + { + /* Write Cycle */ + printf("\n%u inverse byte copy test starting at address %p\n", sizeof(unsigned short), address); + printf("write cycle\n"); + for( i = 0; i < bytecount ; i += sizeof(unsigned short)) + *((unsigned short *) (address + i) ) = + (unsigned short)~(*(unsigned short *)(testpattern + (i % sizeof(testpattern)))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount ; i += sizeof(unsigned short)) + if(*((unsigned short *) (address + i) ) != + ((unsigned short)~(*(unsigned short *)(testpattern + (i % sizeof(testpattern)))))) + { + printf("Data mismatch at address %p Value : 0x%04x Expected : 0x%04x\n\n", + (address + i), *((unsigned short *)address + i), + (unsigned short)~(*(unsigned short *)(testpattern + ( i % sizeof(testpattern))))); + return -1; + } + } + break; + + /* 32 bit Copy Test */ + case 'w': + { + /* Write Cycle */ + printf("\n%u inverse byte copy test starting at address %p\n\n", sizeof(unsigned int), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned int)) + *((unsigned int *) (address + i) ) = + (unsigned int)(~(*(unsigned int *)(testpattern + (i % sizeof(testpattern))))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned int)) + if(*((unsigned int *) (address + i) ) != + (~(*(unsigned int *)(testpattern + (i % sizeof(testpattern)))))) + { + printf("Data mismatch at address %p Value : 0x%08x Expected : 0x%08x\n", + address + i, *(unsigned int *)(address + i), + (unsigned int)(~(*(unsigned int *)(testpattern + ( i % sizeof(testpattern)))))); + return -1; + } + } + break; + + /* 64 bit copy test */ + case 'd': + { + /* Write Cycle */ + printf("\n%u inverse byte copy test starting at address %p\n\n", sizeof(unsigned long long), address); + printf("write cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned long long)) + *((unsigned long long *) (address + i) ) = + (unsigned long long) (~(*(unsigned long long *)(testpattern + (i % sizeof(testpattern))))); + + /* Read Cycle */ + printf("read cycle\n"); + for( i = 0; i < bytecount; i += sizeof(unsigned long long)) + if(*((unsigned long long *) (address + i) ) != + (unsigned long long)(~(*(unsigned long long *)(testpattern + (i % sizeof(testpattern)))))) + { + printf("Data mismatch at address %p Value : 0x%08x%08x Expected : 0x%08x%08x\n", + address + i, *(unsigned long *)(address + i), + *(unsigned long *)(address + i + sizeof(unsigned long)), + (unsigned long)~(*(unsigned long *)(testpattern + ( i % sizeof(testpattern)))), + (unsigned long)~(*(unsigned long *)(testpattern + ( (i + sizeof(unsigned long)) % sizeof(testpattern))))); + return -1; + } + } + break; + } + + if (i >= bytecount) + printf("Test Passed.\n"); + return 0; +} + +#ifdef CFG_POST_MEMORY_INTERACTIVE +int memory_test_interactive(void) +{ + + int choice, subchoice; + unsigned long address = 0; + unsigned long bytecount = 0; + unsigned char input[32]; + unsigned int j = 0; + int i; + + for(;;) + { + memset(input, 0, strlen(input)); + + printf("0 memory post dataline test\n"); + printf("1 memory post addrline test\n"); + printf("2 memory_post_test1\n"); + printf("3 memory_post_test2\n"); + printf("4 memory_post_test3\n"); + printf("5 memory_post_test4\n"); + printf("6 pattern copy test\n"); + printf("7 inverse pattern copy test\n"); + printf("a combined address/data line test\n"); + printf("b Inverse combined address/data line test\n"); + printf("c memory peek test\n"); + printf("d memory poke test\n"); + printf("i Infinite memory tests over entire 64MB\n"); + printf("j Flash/Ram Block Copy Test\n"); + printf("e exit & proceed to normal execution\n\n\n"); + + printf("Test to perform ? "); + choice = serial_getc(); + + if(choice == 'e') + break; + + /* Start address to test memory. Could be on a odd/even boundary */ + printf("\n\nTest Selected %c\n", choice); + printf("\n\nMemory Address to verify : 0x "); + serial_gets(input); + address = simple_strtoul(input, NULL, 16); + + /* We do not test length size for simple address/data line test to memory read operation */ + if (( choice != '0' ) && (choice != '1') && (choice != 'c') && (choice != 'd')) + { + /* Amount of test pattern to write & verify */ + printf("\n\nLength of test : 0x"); + serial_gets(input); + bytecount = simple_strtoul(input, NULL, 16); + } + + switch(choice) + { + + case '0': + printf("\nDoing simplified Data Line test at address %p.\n", address); + if(memory_post_dataline((unsigned long long *) address) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '1': + printf("\nDoing simplified Address Line test at address %p.\n", address); + if( memory_post_addrline((unsigned long *) address, (unsigned long *) address, bytecount) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '2': + printf("\nDoing POST Test1 at address %p. Bytecount 0x%08x\n", address, bytecount); + if( memory_post_test1((unsigned long ) address, bytecount, 0xCC55AAFF) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '3': + printf("\nDoing POST Test2 at address %p. Bytecount 0x%08x\n", address, bytecount); + if( memory_post_test2((unsigned long ) address, bytecount) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '4': + printf("\nDoing POST Test3 at address %p. Bytecount 0x%08x\n", address, bytecount); + if( memory_post_test3((unsigned long ) address, bytecount) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '5': + printf("\nDoing POST Test4 at address %p. Bytecount 0x%08x\n", address, bytecount); + if( memory_post_test4((unsigned long )address, bytecount) != 0) + printf("Test Failed\n\n"); + else + printf("Test Passed\n\n"); + break; + + case '6': + printf("Test mode [ b : byte, h : half word , w : word , d : double word," \ + " s : strncpy, m : memcpy ] : "); + subchoice = serial_getc(); + printf("\n\n"); + pattern_copy_test(address, bytecount, subchoice); + break; + + case '7': + printf("Test mode [ b : byte, h : half word , w : word , d : double word ] : "); + subchoice = serial_getc(); + printf("\n\n"); + inverse_pattern_copy_test(address, bytecount, subchoice); + break; + + case 'a': + case 'b': + { + if(choice == 'a') + { + memory_combined_address_data_line_test(address, (address + bytecount )); + } + else + { + memory_combined_inverse_address_data_line_test(address, (address + bytecount )); + } + } + break; + + case 'c': + memory_read(address); + break; + + case 'd': + memory_write(address); + break; + + case 'i': + j = 0; + while(1) + { + + printf("ITN:%u\n", j ); + if(memory_post_tests(address, bytecount) != 0) + break; + //Wait for 2000 ticks. Based on Timebase register + wait_ticks(20000); + j++; + } + break; + + case 'j': + { + unsigned short blockSize; + + printf("\n\nBlock Size : 0x "); + serial_gets(input); + blockSize = simple_strtoul(input, NULL, 16); + if(blockSize > 512*1024 ) + { + printf("We have a 8MB flash. So, max block size is 512KB\n"); + } + flash_block_copy_test(address, bytecount, blockSize); + } + break; + + default: + printf("Invalid Choice\n"); + } + } + return 0; +} +#endif #endif /* CONFIG_POST & CFG_POST_MEMORY */ #endif /* CONFIG_POST */ --- /login/asabharw/lxhome/u-boot-1.1.3/post/tests.c 2005-08-13 16:53:35.000000000 -0700 +++ u-boot-1.1.2/post/tests.c 2005-10-10 14:30:11.000000000 -0700 @@ -45,6 +45,7 @@ extern int sysmon_post_test (int flags); extern int dsp_post_test (int flags); extern int codec_post_test (int flags); +extern int memory_test_interactive(void); extern int sysmon_init_f (void); @@ -58,7 +59,7 @@ "Cache test", "cache", "This test verifies the CPU cache operation.", - POST_RAM | POST_ALWAYS, + POST_POWERON | POST_RAM | POST_ALWAYS, &cache_post_test, NULL, NULL, @@ -113,6 +114,18 @@ CFG_POST_MEMORY }, #endif +#if CONFIG_POST & CFG_POST_MEMORY_INTERACTIVE + { + "Memory test interactive", + "memory controller", + "This test checks external memory controller.", + POST_ROM | POST_POWERON | POST_ALWAYS | POST_SLOWTEST | POST_PREREL, + &memory_test_interactive, + NULL, + NULL, + CFG_POST_MEMORY_INTERACTIVE + }, +#endif #if CONFIG_POST & CFG_POST_CPU { "CPU test", --- /login/asabharw/lxhome/u-boot-1.1.3/include/post.h 2005-08-13 16:53:35.000000000 -0700 +++ u-boot-1.1.2/include/post.h 2005-10-06 11:58:47.000000000 -0700 @@ -77,20 +77,21 @@ #endif /* __ASSEMBLY__ */ -#define CFG_POST_RTC 0x00000001 -#define CFG_POST_WATCHDOG 0x00000002 -#define CFG_POST_MEMORY 0x00000004 -#define CFG_POST_CPU 0x00000008 -#define CFG_POST_I2C 0x00000010 -#define CFG_POST_CACHE 0x00000020 -#define CFG_POST_UART 0x00000040 -#define CFG_POST_ETHER 0x00000080 -#define CFG_POST_SPI 0x00000100 -#define CFG_POST_USB 0x00000200 -#define CFG_POST_SPR 0x00000400 -#define CFG_POST_SYSMON 0x00000800 -#define CFG_POST_DSP 0x00001000 -#define CFG_POST_CODEC 0x00002000 +#define CFG_POST_RTC 0x00000001 +#define CFG_POST_WATCHDOG 0x00000002 +#define CFG_POST_MEMORY 0x00000004 +#define CFG_POST_CPU 0x00000008 +#define CFG_POST_I2C 0x00000010 +#define CFG_POST_CACHE 0x00000020 +#define CFG_POST_UART 0x00000040 +#define CFG_POST_ETHER 0x00000080 +#define CFG_POST_SPI 0x00000100 +#define CFG_POST_USB 0x00000200 +#define CFG_POST_SPR 0x00000400 +#define CFG_POST_SYSMON 0x00000800 +#define CFG_POST_DSP 0x00001000 +#define CFG_POST_CODEC 0x00002000 +#define CFG_POST_MEMORY_INTERACTIVE 0x00004000 #endif /* CONFIG_POST */

1 0

RE: [U-Boot-Users] bug in cfi_flash error detection
by Martin Krause 18 Oct '05

18 Oct '05

Hi Tolunay, thank you for your reply! Tolunay Orkun wrote on Monday, October 17, 2005 8:24 PM: > Martin Krause wrote: > Some of the issues you are fixing are also fixed my earlier patch in > the pipeline (from July). See my patch below for items 1,3,4 in your > list. > > http://sourceforge.net/mailarchive/message.php?msg_id=12234135 OK, I missed this :( > I think, in flash_status_check() your patch timeout check is not > correct. get_timer() returns in msec as well as tout is in msecs. So, > they are directly comparable without involving CFG_HZ. I think this is only true for boards where CFG_HZ is 1000. > I think the full status check needs to be applied to sector 0 > irrespective of what sector you are operating with because this is > where the flash status register resides. I think some flash ignore > the sector address while others require sector 0. I would be careful > in changing this without verifying for a wide range of flash chips. It seems that during flash commands other than for writing (flash erase, flash protect, ...), the sector address has not to be 0 while checking status register. Is this correct? Do you know a flash device, where the sector address has to bee 0 during DQ6 toggle bit staus checking? I only ask to avoid such flash devices in new designs ;-) > Yes, the sector number will be wrong in error if you activate debug > outputs but it is only cosmetic as far as I can see. Also, finding > the sector number each time from address is a time consuming search > that will slow the flash write operation unnecessarily. I am more > willing to take the wrong sector number in debug output (if enabled) As far as I can see, the error message in flash_status_check() is printed always, not only if debug output is enabled. > than slowed down status check which is used in a number of places. Maybe it is better then to print no details about the sector or address where the error occours, than to print wrong values? Regards, Martin

2 1

[U-Boot-Users] Question on U-BOOT
by Krishnan 18 Oct '05

18 Oct '05

BlankDear Users, I am using an EP8260 board with 8MB flash and 32MB DRAM. I have a resident bootloader that sits at 0xFF000000 and don't want to spoil the contents by loading U-BOOT at the same address (I don't have a BDI today with me). I have loaded U-BOOT bin into 0xFE000000 and did a go with 0xFE000100 but it seems to fail at relocate_code (established via. print statements to the terminal and dumping ram content). Can anyone let me know if there is a limitation with U-BOOT that prevents it from running fully except if loaded at 0xFF000000? Thanks, -Krishnan

2 1

[U-Boot-Users] RE: Interactive Memory test patch & new tests
by atul.sabharwal＠exgate.tek.com 18 Oct '05

18 Oct '05

Add on to original patch in post/tests.c and include/post.h to run the interactive memory test as part of post_run. Controlled by CFG_MEMTEST_INTERACTIVE As part of CONFIG_POST.

1 0

[U-Boot-Users] AM29LV160DT (top boot block and CFI)
by Cliff Brake 18 Oct '05

18 Oct '05

Hello. I'm using the AM29LV160DT (top boot block) with the u-boot CFI flash driver. It seems that U-boot thinks this is a bottom boot block device: flinfo: Bank # 1: CFI conformant FLASH (16 x 16) Size: 2 MB in 35 Sectors Erase timeout 16384 ms, write timeout 0 ms, buffer write timeout 1 ms, buffer size 1 Sector Start Addresses: B8000000 B8004000 B8006000 B8008000 B8010000 B8020000 B8030000 B8040000 B8050000 B8060000 B8070000 B8080000 B8090000 B80A0000 B80B0000 B80C0000 B80D0000 B80E0000 B80F0000 B8100000 B8110000 B8120000 B8130000 B8140000 B8150000 B8160000 B8170000 B8180000 B8190000 B81A0000 B81B0000 B81C0000 B81D0000 B81E0000 B81F0000 Note the boot sectors are appearing at the bottom of the device instead of the top. There is a note in the CFI specification that states: 1. Erase Blocks always start at address 0 of the Bottom Boot or Uniform Low Version of the Flash Device So I assume, the CFI information in the device is correct and it must be swapped if you have a top boot block device. If this is true, the sector information needs to be reversed after the device is scanned. Unfortunately, the CFI data for this device does not include top/bottom boot info. The only other information I have found to key off of is the device ID. Has anyone else run into this problem and is there a better solution than keying off the device ID and then reversing the sector info? Thanks, Cliff -- ======================= Cliff Brake http://bec-systems.com

2 1

Re: [U-Boot-Users] Booting MPC8272ADS from flash base
by Alex Zeffertt 18 Oct '05

18 Oct '05

On Mon, 17 Oct 2005 12:29:45 +0200 alebas(a)televes.com wrote: > Alex, > > Again at work. I have some comment over those changes > > > For the record here is the change I needed to make to > > u-boot-1.1.3. > > > > Index: board/mpc8260ads/config.mk > > ================================================================= > > == RCS file: /newcvs/pq2-linux/u-boot/board/mpc8260ads/config.mk,v > > retrieving revision 1.1.1.1 > > diff -u -r1.1.1.1 config.mk > > --- board/mpc8260ads/config.mk 24 Aug 2005 12:16:55 -0000 1.1.1.1 > > +++ board/mpc8260ads/config.mk 14 Oct 2005 08:36:46 -0000 > > @@ -29,4 +29,4 @@ > > # MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards > > # > > > > -TEXT_BASE = 0xfff00000 > > +TEXT_BASE = 0xff800000 > > Are you sure you are using u-boot-1.1.3? > Patch from Jerry Van Baren already made some changes to this file > to allow the use of a different TEXT__BASE for lowboot in MPC8272ADS > selecting it from Makefile config target. > I have this changes already applied in 1.1.3. > I am using u-boot-1.1.3 from Denx ELDK 3.1.1. There is lowboot support in the top level Makefile - but not for any of the 82xx ADS platforms. > > Index: include/configs/MPC8260ADS.h > > ================================================================= > > == RCS file: > > /newcvs/pq2-linux/u-boot/include/configs/MPC8260ADS.h,v retrieving > > revision 1.1.1.1 diff -u -r1.1.1.1 MPC8260ADS.h > > --- include/configs/MPC8260ADS.h 24 Aug 2005 12:17:01 -0000 > > 1.1.1.1+++ include/configs/MPC8260ADS.h 14 Oct 2005 08:36:46 -0000 > > @@ -294,13 +294,8 @@ > > #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) > > #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET > > > > +#define CFG_HRCW_MASTER 0x0e72b605 /* like BCSR version, but > > with CIP=1, BMS=1 */ > > > In order lowboot patch from Jerry to work (which has been applied to > u-boot source, so I recommned you to use) in MPC8272ADS, ISB must > also be ISB=100, not ISB=010 as in BCSR. > I think either are fine, as they result in an internal register space that doesn't conflict with the boot code (which is initially mapped by the CPU to 0x0...0x01ffffff). The startup assembly code remaps it anyway. > Also, from MPC8272RM, bits 20-21 are reserved and should be cleared. > So, LBPC=00, although 01 works. I used 01 because this is what the MPC8272ADS User Manual says the BCSR delivers in this field. But you are right - this does seem to contradict MPC8272RM. I've changed this now to 00. > > And finally a question. You use MODCK_H = 0101 whereas I use in my > patch MODCK_H=1010, while trying to set MODCK to 1010_100. > Am I mis-understanding something? > You are right. I was overclocking my MPC8272. It has max ratings of 400/200/100 and I had it going at 450/200/100. My new HRCW is: 0x0e72b20a > > Best regards, > > Alex Bastos Thanks, Alex Zeffertt

2 1

[U-Boot-Users] Memory tests with u-boot v1.1.2
by atul.sabharwal＠exgate.tek.com 18 Oct '05

18 Oct '05

I have a board with a memory controller where I am doing a pattern copy test. Basically, write the address to the location. Problem I run into is that at times the read back operation gets data which is 2, 4 or 8 bytes before the current location. If I peek at the memory location, the data is correct. Also, if I have the BDI JTAG connected the problem does not show up. But if I do a halt/go from BDI it shows up. Similarly, With not JTAG connected, the problem happens. Could this be related to the ICTRL register? The recommended value is 0x7, i.e. serialization & no show cycles. I assume Serialization means instruction prefetch. I am trying a v1.1.3 port but any suggestion/debug tips would be helpful. Thanks, Atul

1 0

[U-Boot-Users] SPI interface on MPC8555CDS ...
by Rahmat M 18 Oct '05

18 Oct '05

Hi, I am kind of new to uboot and was wondering if there were some sample code done in uboot to configure a device using the SPI interface on the CPM block. I am using a custom board leveraged from the freescale 8555CDS board. The ref-manual is not very clear on how to generate the CLK. we have our 4 SPI signals routed out of portC. Any help on this manner would be great. Regards, Rahmat __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

1 0

[U-Boot-Users] bug in cfi_flash error detection
by Martin Krause 17 Oct '05

17 Oct '05

Hi all, recently I got back a board from our customer, where some bits in the (nor) flash could not be programmed due to an error in the flash chip (-> very rare error). I tought, this would be a good reason, to test the common cfi_flash driver with this board (so far we used a board specific flash driver on this board). But the cfi_flash driver does not detect the error as I expected. I took a closer look to the driver and found some bugs (at least in my opinion). I added a patch wich tries to fix it, but I'm not sure if this is the proper way it should be done (e. g. because it adds bytes to cfi_flash.o). Here a brief description of what the patch tries to fix: - Timeout calculation in flash_status_check(): The function calculates seconds instead of miliseconds. And on some boards the range of ulong is exceeded in the calculation (because CFG_HZ is very big on some boards). - In flash_status_check() a bogus error message is printed (secotor number is always 0 and the printed data value is not from the address where the error occours). - flash_status_check() uses always the erase block timeout, regardles if eraseing flash or writing flash. - If the write timeout of the flash device is below 1 ms it is erroneously calculated to zero. Any comment would be welcome. Regards, Martin TQ-Systems GmbH Mühlstraße 2, Gut Delling, 82229 Seefeld Tel. +49 (8153) 93 08-157, Fax +49 (8153) 93 08-7157 martin.krause(a)tqs.de www.tq-group.com

3 2

SV: [U-Boot-Users] Sleep doesn't work in NetConsole mode?
by André Berggren 17 Oct '05

17 Oct '05

Hi! It´s a AMCC 440ep and a cusom board based on yosemite config. Don´t know the exact version now. I´ll check that tomorrow. Any ide whats happening and where to search to solve this one? //André ________________________________ Från: Wolfgang Denk [mailto:wd@denx.de] Skickat: må 2005-10-17 17:14 Till: André Berggren Kopia: u-boot-users(a)lists.sourceforge.net Ämne: Re: [U-Boot-Users] Sleep doesn't work in NetConsole mode? In message <518B77BB6246D54D9E88FC49AFB0389D2F1C2B(a)seskoptronicmsx.optronic.local> you wrote: > > I started using NetConsole today and it's working almost as expected. > > When I run sleep 2 in u-boot with serial connected u-boot sleeps for 2 > s, but when I do the same when connected with NetConsole sleep never > returns. I have to abort it with Ctrl + C. > Why? Because of a bug? Which processor and board is this, and which exact version of U-Boot (which commit id) ? > ------_=_NextPart_001_01C5D32B.DB2B36DF > Content-Type: text/html; > charset="iso-8859-1" > Content-Transfer-Encoding: quoted-printable > > <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN"> > <HTML> And please: do NOT post HTML here. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "Don't try to outweird me, three-eyes. I get stranger things than you free with my breakfast cereal." - Zaphod Beeblebrox in "Hitchhiker's Guide to the Galaxy" ########################################### This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange. For more information, connect to http://www.f-secure.com/

2 1

[U-Boot-Users] PHY driver??
by Jose França (Ext_GTBC) 17 Oct '05

17 Oct '05

Hello u-booters! I have a LXT973 ethernet PHY chip connected to FCC#2 and FCC#1. I've already provided a reset_phy() function in the $BOARD/$BOARD.c file. Also, i've configured CONFIG_BITBANGMII, MDIO_PIN, MDC_PIN and MDIO(bit), MDC(bit), MDIO_ACTIVE, MDIO_TRISCTATE and MDIO_READ macros in include/configs/$BOARD.c. Is this all i have to do? Or am i missing something? Somewhere there is a comment that states that i have to provide a PHY driver to do negociation, does this apply to my case? There are two MII header files include/miiphy.h and include/mii_phy.h, what is the point of this? I'm using miiphy.h in my $BOARD.c file. Thanks in advance & best regards, Filipe.

1 0

RE: [U-Boot-Users] Booting MPC8272ADS from flash base
by alebas＠televes.com 17 Oct '05

17 Oct '05

Alex, Again at work. I have some comment over those changes > For the record here is the change I needed to make to u-boot-1.1.3. > > Index: board/mpc8260ads/config.mk > =================================================================== > RCS file: /newcvs/pq2-linux/u-boot/board/mpc8260ads/config.mk,v > retrieving revision 1.1.1.1 > diff -u -r1.1.1.1 config.mk > --- board/mpc8260ads/config.mk 24 Aug 2005 12:16:55 -0000 1.1.1.1 > +++ board/mpc8260ads/config.mk 14 Oct 2005 08:36:46 -0000 > @@ -29,4 +29,4 @@ > # MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards > # > > -TEXT_BASE = 0xfff00000 > +TEXT_BASE = 0xff800000 Are you sure you are using u-boot-1.1.3? Patch from Jerry Van Baren already made some changes to this file to allow the use of a different TEXT__BASE for lowboot in MPC8272ADS selecting it from Makefile config target. I have this changes already applied in 1.1.3. > Index: include/configs/MPC8260ADS.h > =================================================================== > RCS file: /newcvs/pq2-linux/u-boot/include/configs/MPC8260ADS.h,v > retrieving revision 1.1.1.1 > diff -u -r1.1.1.1 MPC8260ADS.h > --- include/configs/MPC8260ADS.h 24 Aug 2005 12:17:01 -0000 1.1.1.1 > +++ include/configs/MPC8260ADS.h 14 Oct 2005 08:36:46 -0000 > @@ -294,13 +294,8 @@ > #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) > #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET > > +#define CFG_HRCW_MASTER 0x0e72b605 /* like BCSR version, but with CIP=1, > BMS=1 */ In order lowboot patch from Jerry to work (which has been applied to u-boot source, so I recommned you to use) in MPC8272ADS, ISB must also be ISB=100, not ISB=010 as in BCSR. Also, from MPC8272RM, bits 20-21 are reserved and should be cleared. So, LBPC=00, although 01 works. And finally a question. You use MODCK_H = 0101 whereas I use in my patch MODCK_H=1010, while trying to set MODCK to 1010_100. Am I mis-understanding something? Best regards, Alex Bastos

1 0

[U-Boot-Users] Resend: [PATCH]:correct flash base address in README.mpc83xx to be the same as that in source code
by neil chu 17 Oct '05

17 Oct '05

Hi, Sorry, have to resend, the patch missed some lines. Here it is. Please ignore the previous one. Sorry for inconvenience. ********************************************************************************** This is a patch for MPC8349E ADS board readme in README.mpc83xxads. This patch corrects u-boot base address described in the README.mpc83xxads to be the same as text base set in the source code. Log Entry: * Patched by Neil Chu, Oct 2005 Correct the flash base address in README.mpc83xx so that it is the same as TEXT base address setting in u-boot source code. *********************************************************************************** --- diff -Nur u-boot-1.1.3/doc/README.mpc83xxads u-boot-1.1.3- after/doc/README.mpc83xxads --- u-boot-1.1.3/doc/README.mpc83xxads 2005-08-14 07:53:35.000000000 +0800 +++ u-boot-1.1.3-after/doc/README.mpc83xxads 2005-10-14 10:34:19.871711464 +0800 @@ -83,15 +83,15 @@ 5.1 Reflash U-boot Image using U-boot tftp 10000 u-boot.bin - protect off fe000000 fe09ffff - erase fe000000 fe09ffff + protect off all + erase fe700000 fe73ffff - cp.b 10000 fe000000 xxxx + cp.b 10000 fe700000 xxxx or - cp.b 10000 fe000000 a0000 + cp.b 10000 fe700000 40000 -You might have to supply the correct byte count for 'xxxx' from -the TFTP. Maybe a0000 will work too, that corresponds to the +You might have to supply the correct byte count in hex for 'xxxx' from +the TFTP. Maybe 40000 will work too, that corresponds to the erased sectors.

1 0

[U-Boot-Users] [PATCH]:correct flash base address in README.mpc83xx to be the same as that in source code
by neil chu 17 Oct '05

17 Oct '05

Hi, ********************************************************************************** This is a patch for MPC8349E ADS board readme in README.mpc83xxads. This patch corrects u-boot base address described in the README.mpc83xxads to be the same as text base set in the source code. Log Entry: * Patched by Neil Chu, Oct 2005 Correct the flash base address in README.mpc83xx so that it is the same as TEXT base address setting in u-boot source code. *********************************************************************************** --- diff -Nur u-boot-1.1.3/doc/README.mpc83xxads u-boot-1.1.3- after/doc/README.mpc83xxads --- u-boot-1.1.3/doc/README.mpc83xxads 2005-08-14 07:53:35.000000000 +0800 +++ u-boot-1.1.3-after/doc/README.mpc83xxads 2005-10-14 10:34:19.871711464 +0800 @@ -83,15 +83,15 @@ 5.1 Reflash U-boot Image using U-boot tftp 10000 u-boot.bin - protect off fe000000 fe09ffff - erase fe000000 fe09ffff + protect off all + erase fe700000 fe73ffff - cp.b 10000 fe000000 xxxx + cp.b 10000 fe700000 xxxx or - cp.b 10000 fe000000 a0000 + cp.b 10000 fe700000 40000 -You might have to supply the correct byte count for 'xxxx' from -the TFTP. Maybe a0000 will work too, that corresponds to the +You might have to supply the correct byte count in hex for 'xxxx' from

1 0

[U-Boot-Users] IBM Buckeye (750GX) board.
by fishy x 14 Oct '05

14 Oct '05

Hello Has or is anyone working on a U-Boot port to the IBM Buckeye (750GX) board? Yes I know the board comes with PIBS. Thanks Michael

1 0

[U-Boot-Users] resume from sleeping for au1x00
by Rodolfo Giometti 14 Oct '05

14 Oct '05

Hello, someone are using u-boot to resume from sleeping with au1x00 MIPS processor? I'm just looking at linux code into file arch/mips/au1000/common/sleeper.S. The function save_and_sleep() does: /* Now set up the scratch registers so the boot rom will * return to this point upon wakeup. */ la k0, 1f lui k1, 0xb190 ori k1, 0x18 sw sp, 0(k1) ori k1, 0x1c sw k0, 0(k1) so I suppose that, at wake up, these «scratch registers» can be used by u-boot to restart at correct location... is that right? :-o Thanks in advance, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)linux.it Linux Device Driver giometti(a)enneenne.com Embedded Systems home page: giometti.enneenne.com UNIX programming phone: +39 349 2432127

1 0

[U-Boot-Users] USB-storage or NAND-flash on AMCC 440ep (bamboo)
by André Berggren 14 Oct '05

14 Oct '05

Hi all! Are there any known bugs for USB-storage on this CPU in u-boot? We have a custom board based on bamboo and thinking on booting from USB instead of NAND because of the long initiation time for jffs2 on NAND-flash. At the moment JFFS2 initiation takes about 35s, and loading kernel, root-image and a fpga-image to ram take another 1m 40s. Will it be faster if we use USB-storage instead? We are currently using USB-storage in Linux with ext3 fs. I'll tried "usb start" command in u-boot but get the following output: => usb start (Re)start USB... USB: USB 1.1 Device init scanning bus for devices... 2 USB Device(s) found scanning bus for storage devices... ERROR: CTL:TIMEOUT ERROR: CTL:TIMEOUT ERROR: CTL:TIMEOUT . . . ERROR: CTL:TIMEOUT Device NOT ready Request Sense returned 00 00 00 0 blocks read: ERROR If I then do "usb tree" I can se that the USB-storage is actually found. => usb tree Device Tree: 1 Hub (12MBit/s, 0mA) | OHCI Root Hub | +-2 Mass Storage (12MBit/s, 100mA) SanDisk Corporation Cruzer Mini SNDK319F2529C8108706 "usb info" shows even more info, but "usb storage" reports no storage device. => usb storage No storage devices, perhaps not 'usb start'ed..? Is USB-storage the way to go or is there a way to speed up jffs2? Regards, André ########################################### This message has been scanned by F-Secure Anti-Virus for Microsoft Exchange. For more information, connect to http://www.f-secure.com/

2 2

Re: [U-Boot-Users] Question on pre-loader to U-Boot
by Anders Larsen 14 Oct '05

14 Oct '05

"Zhang, Chris (Ex CH01)" <Chris.Zhang(a)honeywell.com> schrieb am Freitag, 14. Oktober 2005 um 10:18 +0100: >my problem To make U-Boot a 2nd stage boot loader, I mean a seperate boot >loader (stage #1) loader U-Boot from flash into SDRAM. Well, in your first posting you said you were using the Atmel AT91RM9200DK board, and that it already boots the way you described? What is it that you want to change? > >Since it mainly concerns with the linker, no source code need modification >if it use no linker script defined staff. In this case, if U-Boot do not use >the TEXT_BASE in source code, there will be no change to the source code. >That's my idea. TEXT_BASE is used in several places in the source tree; for starters, see cpu/arm920t/at91rm9200/lowlevel_init.S and cpu/arm920t/start.S Cheers Anders

1 0

[U-Boot-Users] Error: start address not on sector boundary
by HS8JCV 14 Oct '05

14 Oct '05

Hi all I complie new u-boot for Flash SST39VF3201. It complete and can boot with u-boot. Follow that. boot 1.0 (Nov 25 2003 - 23:08:05) Uncompressing image... U-Boot 1.1.2 (Jun 25 2005 - 22:30:04) U-Boot code: 21F00000 -> 21F16F88 BSS: -> 21F1B640 RAM Configuration: Bank #0: 20000000 32 MB SST: SST39VF3201 (32Mbit) Flash: 4 MB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial U-Boot> after I setenv and saveenv It reponse "Error: start address not on sector boundary". U-Boot> setenv ethaddr 12:34:56:78:99:22 U-Boot> saveenv Saving Environment to Flash... Error: start address not on sector boundary and Flash Organizations follow this code. OrgDef OrgSST39VF3201[] = { { 1,16*1024 }, /* 1 * 16 kBytes sectors */ { 2,8*1024 }, /* 2 * 8 kBytes sectors */ { 1,32*1024 }, /* 1 * 32 kBytes sectors */ { 63,64*1024 }, /* 31 * 64 kBytes sectors */ }; Why it show error.? How to resolve this error.? Best Regard Supparerk

3 2

[U-Boot-Users] Booting MPC8272ADS from flash base
by Alex Zeffertt 14 Oct '05

14 Oct '05

Hi list, I would like to boot my MPC8272ADS board from the base of flash memory. By default the BCSR delivers a fixed HRCW which tells the CPU to boot from 0xff700000. But there is a jumper on the board which allows you to specify that the CPU should retrieve the HRCW from flash. In an attempt to get it to boot from 0x0 I tried the following: 1. Moved jumper JP9 from "BCSR" to "MEMORY" to tell the CPU to get its HRCW from flash rather than the BCSR. 2. Set TEXT_BASE in config.mk to 0x0 3. define CFG_HRCW_MASTER in MPC8260ADS.h to be the value normally delivered by the BCSR or'd with (HRCW_CIP | HRCW_BMS). This should move the reset vector from 0xfff00100 to 0x100 and cause the flash to be mapped from 0x0 to 0x01ffffff. Unfortunately this didn't work. Has anybody else managed to get the MPC8272ADS to boot WITHOUT using the BCSR to deliver the HRCW? Regards, Alex

3 4

[U-Boot-Users] Question about u-boot relocation
by Aitor Garcia 14 Oct '05

14 Oct '05

Hello everybody, I am using mx1fs2 board based on an arm920t core. I am new to u-boot and I have read the faq and now I am reading very carefully start.S initialization code to understand the relocation process. This is what I don't understand: Theoretically, when u-boot starts executing from flash, it configures some basic registers, configures the sdram controller, relocates itself to sdram and continues executing code from sdram. But in practice, I don't understand how it is possible that u-boot can run from flash because analyzing the binary it looks that it is only linked to run from sdram. vma=lma=sdram address. arm-unknown-linux-gnu-objdump -h u-boot u-boot: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 000138a4 08f00000 08f00000 00008000 2**5 Correct me if I'm wrong but I think that lma should be flash address. I would be very grateful if someone could give me any pointer. Best Regards, Aitor __________________________________ Yahoo! Music Unlimited Access over 1 million songs. Try it free. http://music.yahoo.com/unlimited/

1 0

RE: [U-Boot-Users] Question on pre-loader to U-Boot
by Zhang, Chris (Ex CH01) 14 Oct '05

14 Oct '05

Thank you very much! So no source code need change, isn't it? THX and regards, zl -----Original Message----- From: Anders Larsen [mailto:alarsen@rea.de] Sent: 2005 10 14 15:34 To: Zhang, Chris (Ex CH01) Cc: u-boot-users(a)lists.sourceforge.net Subject: Re: [U-Boot-Users] Question on pre-loader to U-Boot "Zhang, Chris (Ex CH01)" <Chris.Zhang(a)honeywell.com> schrieb am Freitag, 14. Oktober 2005 um 03:28 +0100: >So the . = 0x0000 0000 in the ld script file is a relative address. Is >it right? Yes. Cheers Anders

2 1

RE: [U-Boot-Users] Question on pre-loader to U-Boot
by Zhang, Chris (Ex CH01) 14 Oct '05

14 Oct '05

Thanks Larsen, So the . = 0x0000 0000 in the ld script file is a relative address. Is it right? Regards, zl -----Original Message----- From: Anders Larsen [mailto:alarsen@rea.de] Sent: 2005 10 13 19:44 To: Zhang, Chris (Ex CH01) Cc: u-boot-users(a)lists.sourceforge.net; wd(a)denx.de Subject: Re: [U-Boot-Users] Question on pre-loader to U-Boot "Zhang, Chris (Ex CH01)" <Chris.Zhang(a)honeywell.com> schreibt: >I am using at91rm9200dk u-boot from ATMEL. > >I noticed that ATMEL uses programs called loader.bin and boot.bin to >load U-Boot into SDRAM. The Load Address is 0x21f00000 (the upper 1M). > >My question is how does this value is choosen for U-Boot? I guess it is >related to linker behavior of U-Boot (right?), but there is no clue to >conclude such kind of address. Thanks for any hints. $ cat board/at91rm9200dk/config.mk TEXT_BASE = 0x21f00000 Cheers Anders

2 1

[U-Boot-Users] [PATCH] OMAP 5912/OSK: update EMIFS CS1 timings
by Kevin Hilman 13 Oct '05

13 Oct '05

The following patch adds some wait states to the EMIFS timings for CS1. Problems have been seen in the linux kernel's smc91x network driver due to improper bus timings. The latest 2.6 OMAP kernels currently have a workaround, but this fix belongs in u-boot. -- Kevin Hilman MontaVista Software -- http://www.mvista.com/

1 0

Re: [U-Boot-Users] Replacing AT91 u-boot
by kentropy 13 Oct '05

13 Oct '05

Peter, your explanation is fantastic ans exhaustive. > Only for this procedure you have to remove R159! Or if you destroy the existing u-boot in Parallel Flash ;-) > I can definitely confirm, that u-boot-1.1.2 works fine in that case. If > needed, I can send you the u-boot config. Could you please send it to me ? > Hope, that helps a step further... Yes, sometimes help and readme aren't clear enough for newbies ;-)

2 1

[U-Boot-Users] [PATCH] trivial bugfix, #ifdef CONFIG_SKIP_LOWLEVEL_INIT added in arm920t/start.S
by Peter Menzebach 13 Oct '05

13 Oct '05

The ifdef around cpu_init_crit was added, otherwise a reference to "lowlevel_init" still exists and could not be resolved by the linker. Best regards Peter Menzebach CHANGELOG: Patch by Peter Menzebach, 2005-10-13 ifdef CONFIG_SKIP_LOWLEVEL_INIT around cpu_init_crit added in cpu/arm920t/start.S --- u-boot/cpu/arm920t/start.S.orig 2005-10-06 23:47:43.000000000 +0200 +++ u-boot/cpu/arm920t/start.S 2005-10-13 18:56:27.000000000 +0200 @@ -237,6 +237,7 @@ */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -264,7 +265,7 @@ bl lowlevel_init mov lr, ip mov pc, lr - +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* *************************************************************************

1 0

[U-Boot-Users] Flash configuration
by Jose França (Ext_GTBC) 13 Oct '05

13 Oct '05

Hello u all! I'm configuring u-boot (for the first time) so that i can have 2 flash eprom chips, in two different banks, for a mpc8272 based board. They are organized the following way: BOOT Flash -> starts at 0xFFF00000 and has 512KB of size. (read-only) Linux Flash -> starts at 0x50000000 and has 64MB of size. (CFI compatible) Since CFG_FLASH_BASE is used throughout the u-boot code as a reference, which one should it be? The boot flash address or the linux flash address? I'm really confused here... All is setup so that the processor starts to boot from 0xFFF00000 and the reset vector set to 0xFFF00100. Should I use the cfi_flash driver, provided by u-boot? Or should I write a flash.c in my board directory (this is done already)? Do I have to change anything when I use the driver? Thanks in advance! Filipe

3 2

[U-Boot-Users] [Patch] Clean up lvalues in two places for gcc 4.0
by Jerry Van Baren 13 Oct '05

13 Oct '05

Hi Wolfgang, Attached is a patch I did last night (2005-10-12) to fix two places where gcc 4.0 refused to compile due to the lvalue constructs no longer being supported. The patches compile, I have not executed the resulting code: please double-check for correctness. fs/jffs2/compr_rubin.c | 3 ++- net/net.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) ---- Changelog ---- Clean up lvalue issues for gcc 4.0 Patch by Jerry Van Baren, 12 October 2005 Signed-off-by: Jerry Van Baren <gerald.vanbaren(a)smiths-aerospace.com> ---- Best regards, gvb Clean up lvalue issues for gcc 4.0 Patch by Jerry Van Baren, 12 October 2005 --- commit b62be760bf00fe3564dec9ab6da7c8503b1420aa tree 6859adbc0d2ef302dcc4b4a3d5dc7490593235fa parent 3df5bea0b0bddc196bf952c51d1dd54d966b82ba author Jerry Van Baren <vanbaren(a)dellserver.lan> Wed, 12 Oct 2005 21:52:39 -0400 committer Jerry Van Baren <vanbaren(a)dellserver.lan> Wed, 12 Oct 2005 21:52:39 -0400 fs/jffs2/compr_rubin.c | 3 ++- net/net.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/fs/jffs2/compr_rubin.c b/fs/jffs2/compr_rubin.c index cf01f88..c1c28f3 100644 --- a/fs/jffs2/compr_rubin.c +++ b/fs/jffs2/compr_rubin.c @@ -86,7 +86,8 @@ void rubin_do_decompress(unsigned char * rec_q |= (temp >> (bit++ ^ 7)) & 1; if (bit > 31) { bit = 0; - temp = *(++((u32 *) in)); + in += sizeof(u32); + temp = *(u32 *)in; } } i0 = (bits[i] * p) >> 8; diff --git a/net/net.c b/net/net.c index 11b7700..ce2c9a6 100644 --- a/net/net.c +++ b/net/net.c @@ -819,7 +819,8 @@ static ushort CDP_compute_csum(const uch buff++; } while (len > 1) { - result += *((const ushort *)buff)++; + result += *(const ushort *)buff; + buff += sizeof(ushort); if (result & 0x80000000) result = (result & 0xFFFF) + (result >> 16); len -= 2;

2 2

[U-Boot-Users] printf with u-boot-1.1.2
by Shakthi Kannan 13 Oct '05

13 Oct '05

Greetings! I am using u-boot-1.1.2 with CodeSourcery's 3.4.3 cross-toolchain for ARM on the Versatile PB-ARM926EJ-S board. u-boot compiles fine. The hello_world.c in examples/ compiles fine. From the given example, I have removed all statements except the printf statement. It compiles fine. I load it address 04000000 (SDRAM on board, top bank). I execute it using "go 04000000", it runs and exits with rc=0x0. But, I don't see the printf string being printed. Only one character gets printed. I am wondering if printf uses \r after every character gets printed, so it basically overwrites. I am able to display a character, using putc(). getc() also works fine. These work if I load it a SDRAM address, say, 0x05000000, and give the entry point as 05000000 itself (go 05000000). But, the documentation mentions offset 0x4 as entry point. I'd appreciate any feedback on what I am doing wrong and how I can get the printf working. Thanks, SK -- Shakthi Kannan, MS Software Engineer, Specsoft (Hexaware Technologies) [E]: shakthimaan(a)yahoo.com [M]: (91) 98407-87007 [W]: http://www.shakthimaan.com [L]: Chennai, India __________________________________ Yahoo! Mail - PC Magazine Editors' Choice 2005 http://mail.yahoo.com

2 3

RE: [U-Boot-Users] broken rsync to U-Boot git archive
by Martin Krause 13 Oct '05

13 Oct '05

Hi Bryan, u-boot-users-admin(a)lists.sourceforge.net wrote on : > git clone rsync://source.denx.net/git/u-boot.git somedir > appears to be broken, at least when I tried it just now, I got errors I've done a quick test with cg-clone mkr@tq-sewsrv-4:~/git> cg-clone rsync://source.denx.net/git/u-boot.git u-boot_rsync defaulting to local storage area WARNING: The rsync access method is DEPRECATED and will be REMOVED in the future! receiving file list ... done .git/refs/heads/.origin-fetching sent 94 bytes received 144 bytes 476.00 bytes/sec total size is 41 speedup is 0.17 receiving file list ... done progress: 3428 objects, 17798822 bytes, 100% done info/packs pack/pack-2a2ae5b5d29e02e7330c674195b3423487f83452.idx pack/pack-2a2ae5b5d29e02e7330c674195b3423487f83452.pack pack/pack-a9332d1f4f7916094b9ebeef60378603168d77e2.idx pack/pack-a9332d1f4f7916094b9ebeef60378603168d77e2.pack sent 68739 bytes received 35065972 bytes 32790.21 bytes/sec total size is 34737257 speedup is 0.99 receiving file list ... done LABEL_2002_11_05_0120 [...] U_BOOT_0_1_0 sent 2461 bytes received 11842 bytes 28606.00 bytes/sec total size is 4879 speedup is 0.34 New branch: 0f3f901496b19c46937bfb0ebf142004bd564f1c Cloned to u-boot_rsync/ (origin rsync://source.denx.net/git/u-boot.git available as branch "origin") mkr@tq-sewsrv-4:~/git> Seems to work without problems. > rsync --version == 2.6.5 > git core == 0.99.4 > cogito == 0.13 > OS == Ubuntu Breezy Badger Preview Release I'm using: - git version 0.99.7.GIT - cogito-0.15.1 (b06f2a707963c8712f7a6bbd4b89bae758bcf92a) - rsync version 2.6.3 protocol version 28 - SuSE Linux 9.3 (i586) Regards, Martin

3 2

[U-Boot-Users] Question on pre-loader to U-Boot
by Zhang, Chris (Ex CH01) 13 Oct '05

13 Oct '05

Hello everyone, I am using at91rm9200dk u-boot from ATMEL. I noticed that ATMEL uses programs called loader.bin and boot.bin to load U-Boot into SDRAM. The Load Address is 0x21f00000 (the upper 1M). My question is how does this value is choosen for U-Boot? I guess it is related to linker behavior of U-Boot (right?), but there is no clue to conclude such kind of address. Thanks for any hints. Regards, zl

4 3

[U-Boot-Users] Cleanup of arm920t/start.s
by Paolo Broggini 13 Oct '05

13 Oct '05

Dear all, I would like to cleanup the file cpu/arm920t/start.S by moving the s3c24x0 specific code to their respective boards lowlevel_init.S Are there any particular reasons why this code should stay in start.S ? If I submit a patch, the smdk24x0 boards maintainers (or anybody else) can test it ? (I don't have the HW) Best regards -P.Broggini

2 2

Re: [U-Boot-Users] Debugging U-Boot on arm920t using BDI2000
by Ioritz Irazustabarrena 13 Oct '05

13 Oct '05

In the last post I forgot to tell that I'm porting U-Boot from Motorola's MX1FS2 board (ARM920t). My board's hardware is very similar. I've debugged U-Boot on SDRAM using BDI2000 to copy the image to SDRAM, but the bootloader doesn't work when it starts from flash, so the problem is on the relocation of code. As I said on the last post, I can't debug the relocation code. Some configuration parameters and addresses: SDRAM: 32 bit bus 32MB: 0x08000000-0x0A000000 FLASH: 16 bit bus 16MB: 0x10000000-0x11000000 TEXT_BASE = 0x8f00000 CFG_MONITOR_BASE=CFG_FLASH_BASE 0x10000000 arm-linux-objdump -D u-boot: 08f00000 <_start>: 8f00000: ea000012 b 8f00050 <reset> ... arm-linux-objdump -h u-boot: u-boot: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 000138a4 08f00000 08f00000 00008000 2**5 ... As I concluded in the previous post, it seems that the binary it's only compiled to be run from sdram, not from flash because LMA is 0x8f00000 but I think it should be 0x0000 or 0x10000000. Is this correct? Any help will be appreciated! Thanks in advance. Best regards. Ioritz _________________________________________________________________ Dale rienda suelta a tu tiempo libre. Encuentra mil ideas para exprimir tu ocio con MSN Entretenimiento. http://entretenimiento.msn.es/

1 0

[U-Boot-Users] [PATCH] eliminate assumptions about dataflash layout
by Anders Larsen 13 Oct '05

13 Oct '05

Hi, the dataflash driver contains a hard-coded partition table which might suit one particular board (which I doubt, however) but certainly isn't generally applicable. Furthermore, it write-protects the first two partitions, which violates the U-Boot standard of allowing the user enough rope to shoot himself in the foot. Besides, the dataflash partitions aren't even on sector boundaries (the dataflash chips have rather unusual sector sizes; 528 or 1056 bytes, which makes one wonder what the folks at Atmel are smoking). The patch below places the entire dataflash in one (writable) partition. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Don't write-protect arbitrary areas of Atmel dataflash Patch by Anders Larsen, 13 Oct 2005 --- drivers/dataflash.c | 7 ++----- include/dataflash.h | 4 ++-- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/dataflash.c b/drivers/dataflash.c index ded0395..a558dba 100644 --- a/drivers/dataflash.c +++ b/drivers/dataflash.c @@ -33,10 +33,7 @@ int cs[][CFG_MAX_DATAFLASH_BANKS] = { /*define the area offsets*/ dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0, 0x7fff, FLAG_PROTECT_SET}, /* ROM code */ - {0x8000, 0x1ffff, FLAG_PROTECT_SET}, /* u-boot code */ - {0x20000, 0x27fff, FLAG_PROTECT_CLEAR}, /* u-boot environment */ - {0x28000, 0x1fffff, FLAG_PROTECT_CLEAR}, /* data area size to tune */ + {0, 0x1fffff, FLAG_PROTECT_CLEAR}, /* size tuned below */ }; extern void AT91F_SpiInit (void); @@ -110,7 +107,7 @@ int AT91F_DataflashInit (void) break; } /* set the last area end to the dataflash size*/ - area_list[NB_DATAFLASH_AREA -1].end = + area_list[NB_DATAFLASH_AREA-1].end = (dataflash_info[i].Device.pages_number * dataflash_info[i].Device.pages_size)-1; diff --git a/include/dataflash.h b/include/dataflash.h index 650454e..825eec6 100644 --- a/include/dataflash.h +++ b/include/dataflash.h @@ -37,8 +37,8 @@ #include <asm/arch/hardware.h> #include "config.h" -/*number of protected area*/ -#define NB_DATAFLASH_AREA 4 +/*number of areas*/ +#define NB_DATAFLASH_AREA 1 /*define the area structure*/ typedef struct {

1 0

[U-Boot-Users] [PATCH] Add Flat OF tree support.
by Pantelis Antoniou 13 Oct '05

13 Oct '05

Hi all. As you well know, as part of the ongoing cleanup of the linux trees regarding PPC, it has been decreed that the preferred way to pass bootloader information shall be the flat OF tree. http://ozlabs.org/pipermail/linuxppc-dev/2005-August/019408.html http://ozlabs.org/pipermail/linuxppc-dev/2005-August/019362.html The following patch (broken in two parts), implements just that. Please be aware that in order to test it, you'll need a fairly recent dtc tool, which is available by git at rsync://ozlabs.org/dtc/dtc.git The xxd binary dumper is needed too which I got from ftp://ftp.uni-erlangen.de/pub/utilities/etc/xxd-1.10.tar.gz Linux patches will follow... Awaiting comments. Regards Pantelis P.S. Sorry for cross-posting, but it seems to be appropriate at this time. diff --git a/common/Makefile b/common/Makefile --- a/common/Makefile +++ b/common/Makefile @@ -51,7 +51,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug. memsize.o miiphybb.o miiphyutil.o \ s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o \ usb.o usb_kbd.o usb_storage.o \ - virtex2.o xilinx.o + virtex2.o xilinx.o ft_build.o OBJS = $(AOBJS) $(COBJS) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -34,6 +34,10 @@ #include <environment.h> #include <asm/byteorder.h> +#ifdef CONFIG_OF_FLAT_TREE +#include <ft_build.h> +#endif + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -487,6 +491,9 @@ fixup_silent_linux () } #endif /* CONFIG_SILENT_CONSOLE */ +extern const unsigned char oftree_dtb[]; +extern const unsigned int oftree_dtb_len; + #ifdef CONFIG_PPC static void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, @@ -509,6 +516,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl bd_t *kbd; void (*kernel)(bd_t *, ulong, ulong, ulong, ulong); image_header_t *hdr = &header; +#ifdef CONFIG_OF_FLAT_TREE + char *of_flat_tree; +#endif if ((s = getenv ("initrd_high")) != NULL) { /* a value of "no" or a similar string will act like 0, @@ -773,16 +783,24 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl initrd_start = 0; initrd_end = 0; } - +#ifdef CONFIG_OF_FLAT_TREE + if (initrd_start == 0) + of_flat_tree = (char *)(((ulong)kbd - OF_FLAT_TREE_MAX_SIZE) & ~0xF); + else + of_flat_tree = (char *)((initrd_start - OF_FLAT_TREE_MAX_SIZE) & ~0xF); +#endif debug ("## Transferring control to Linux (at address %08lx) ...\n", (ulong)kernel); SHOW_BOOT_PROGRESS (15); +#ifndef CONFIG_OF_FLAT_TREE + #if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) unlock_ram_in_cache(); #endif + /* * Linux Kernel Parameters: * r3: ptr to board info data @@ -792,6 +810,25 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int fl * r7: End of command line string */ (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); +#else + + ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd); + /* ft_dump_blob(of_flat_tree); */ + +#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) + unlock_ram_in_cache(); +#endif + /* + * Linux Kernel Parameters: + * r3: ptr to board info data + * r4: initrd_start or 0 if no initrd + * r5: initrd_end - unused if r4 is 0 + * r6: Start of command line string + * r7: End of command line string + */ + (*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, cmd_start, cmd_end); + +#endif } #endif /* CONFIG_PPC */ diff --git a/common/ft_build.c b/common/ft_build.c new file mode 100644 --- /dev/null +++ b/common/ft_build.c @@ -0,0 +1,751 @@ +/* + * OF flat tree builder + */ + +#include <common.h> +#include <malloc.h> +#include <environment.h> + +#include <asm/errno.h> + +#include <ft_build.h> + +#ifdef CONFIG_OF_FLAT_TREE + +/* align addr on a size boundary - adjust address up if needed -- Cort */ +#define _ALIGN(addr,size) (((addr)+(size)-1)&(~((size)-1))) + +static void ft_put_word(struct ft_cxt *cxt, u32 v) +{ + if (cxt->overflow) /* do nothing */ + return; + + /* check for overflow */ + if (cxt->p + 4 > cxt->pstr) { + cxt->overflow = 1; + return; + } + + *(u32 *) cxt->p = cpu_to_be32(v); + cxt->p += 4; +} + +static inline void ft_put_bin(struct ft_cxt *cxt, const void *data, int sz) +{ + u8 *p; + + if (cxt->overflow) /* do nothing */ + return; + + /* next pointer pos */ + p = (u8 *) _ALIGN((unsigned long)cxt->p + sz, 4); + + /* check for overflow */ + if (p > cxt->pstr) { + cxt->overflow = 1; + return; + } + + memcpy(cxt->p, data, sz); + if ((sz & 3) != 0) + memset(cxt->p + sz, 0, 4 - (sz & 3)); + cxt->p = p; +} + +void ft_begin_node(struct ft_cxt *cxt, const char *name) +{ + ft_put_word(cxt, OF_DT_BEGIN_NODE); + ft_put_bin(cxt, name, strlen(name) + 1); +} + +void ft_end_node(struct ft_cxt *cxt) +{ + ft_put_word(cxt, OF_DT_END_NODE); +} + +void ft_nop(struct ft_cxt *cxt) +{ + ft_put_word(cxt, OF_DT_NOP); +} + +static int lookup_string(struct ft_cxt *cxt, const char *name) +{ + u8 *p; + + p = cxt->pstr; + while (p < cxt->pstr_begin) { + if (strcmp(p, name) == 0) + return p - cxt->p_begin; + p += strlen(p) + 1; + } + + return -1; +} + +void ft_prop(struct ft_cxt *cxt, const char *name, const void *data, int sz) +{ + int len, off; + + if (cxt->overflow) + return; + + len = strlen(name) + 1; + + off = lookup_string(cxt, name); + if (off == -1) { + /* check if we have space */ + if (cxt->p + 12 + sz + len > cxt->pstr) { + cxt->overflow = 1; + return; + } + + cxt->pstr -= len; + memcpy(cxt->pstr, name, len); + off = cxt->pstr - cxt->p_begin; + } + + /* now put offset from beginning of *STRUCTURE* */ + /* will be fixed up at the end */ + ft_put_word(cxt, OF_DT_PROP); + ft_put_word(cxt, sz); + ft_put_word(cxt, off); + ft_put_bin(cxt, data, sz); +} + +void ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str) +{ + ft_prop(cxt, name, str, strlen(str) + 1); +} + +void ft_prop_int(struct ft_cxt *cxt, const char *name, int val) +{ + u32 v = cpu_to_be32((u32) val); + + ft_prop(cxt, name, &v, 4); +} + +/* start construction of the flat OF tree */ +void ft_begin(struct ft_cxt *cxt, void *blob, int max_size) +{ + struct boot_param_header *bph = blob; + u32 off; + + /* clear the cxt */ + memset(cxt, 0, sizeof(*cxt)); + + cxt->bph = bph; + cxt->max_size = max_size; + + /* zero everything in the header area */ + memset(bph, 0, sizeof(*bph)); + + bph->magic = cpu_to_be32(OF_DT_HEADER); + bph->version = cpu_to_be32(0x10); + bph->last_comp_version = cpu_to_be32(0x10); + + /* start pointers */ + cxt->pres_begin = (u8 *) _ALIGN((unsigned long)(bph + 1), 8); + cxt->pres = cxt->pres_begin; + + off = (unsigned long)cxt->pres_begin - (unsigned long)bph; + bph->off_mem_rsvmap = cpu_to_be32(off); + + ((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */ + ((u64 *) cxt->pres)[1] = 0; + + cxt->p_anchor = cxt->pres + 16; /* over the terminator */ +} + +/* add a reserver physical area to the rsvmap */ +void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size) +{ + ((u64 *) cxt->pres)[0] = cpu_to_be64(physaddr); /* phys = 0, size = 0, terminate */ + ((u64 *) cxt->pres)[1] = cpu_to_be64(size); + + cxt->pres += 18; /* advance */ + + ((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */ + ((u64 *) cxt->pres)[1] = 0; + + /* keep track of size */ + cxt->res_size = cxt->pres + 16 - cxt->pres_begin; + + cxt->p_anchor = cxt->pres + 16; /* over the terminator */ +} + +void ft_begin_tree(struct ft_cxt *cxt) +{ + cxt->p_begin = cxt->p_anchor; + cxt->pstr_begin = (char *)cxt->bph + cxt->max_size; /* point at the end */ + + cxt->p = cxt->p_begin; + cxt->pstr = cxt->pstr_begin; +} + +int ft_end_tree(struct ft_cxt *cxt) +{ + struct boot_param_header *bph = cxt->bph; + int off, sz, sz1; + u32 tag, v; + u8 *p; + + ft_put_word(cxt, OF_DT_END); + + if (cxt->overflow) + return -ENOMEM; + + /* size of the areas */ + cxt->struct_size = cxt->p - cxt->p_begin; + cxt->strings_size = cxt->pstr_begin - cxt->pstr; + + /* the offset we must move */ + off = (cxt->pstr_begin - cxt->p_begin) - cxt->strings_size; + + /* the new strings start */ + cxt->pstr_begin = cxt->p_begin + cxt->struct_size; + + /* move the whole string area */ + memmove(cxt->pstr_begin, cxt->pstr, cxt->strings_size); + + /* now perform the fixup of the strings */ + p = cxt->p_begin; + while ((tag = be32_to_cpu(*(u32 *) p)) != OF_DT_END) { + p += 4; + + if (tag == OF_DT_BEGIN_NODE) { + p = (u8 *) _ALIGN((unsigned long)p + strlen(p) + 1, 4); + continue; + } + + if (tag == OF_DT_END_NODE || tag == OF_DT_NOP) + continue; + + if (tag != OF_DT_PROP) + return -EINVAL; + + sz = be32_to_cpu(*(u32 *) p); + p += 4; + + v = be32_to_cpu(*(u32 *) p); + v -= off; + *(u32 *) p = cpu_to_be32(v); /* move down */ + p += 4; + + p = (u8 *) _ALIGN((unsigned long)p + sz, 4); + } + + /* fix sizes */ + p = (char *)cxt->bph; + sz = (cxt->pstr_begin + cxt->strings_size) - p; + sz1 = _ALIGN(sz, 16); /* align at 16 bytes */ + if (sz != sz1) + memset(p + sz, 0, sz1 - sz); + bph->totalsize = cpu_to_be32(sz1); + bph->off_dt_struct = cpu_to_be32(cxt->p_begin - p); + bph->off_dt_strings = cpu_to_be32(cxt->pstr_begin - p); + + /* the new strings start */ + cxt->pstr_begin = cxt->p_begin + cxt->struct_size; + cxt->pstr = cxt->pstr_begin + cxt->strings_size; + + return 0; +} + +/**********************************************************************/ + +static inline int isprint(int c) +{ + return c >= 0x20 && c <= 0x7e; +} + +static int is_printable_string(const void *data, int len) +{ + const char *s = data; + const char *ss; + + /* zero length is not */ + if (len == 0) + return 0; + + /* must terminate with zero */ + if (s[len - 1] != '\0') + return 0; + + ss = s; + while (*s && isprint(*s)) + s++; + + /* not zero, or not done yet */ + if (*s != '\0' || (s + 1 - ss) < len) + return 0; + + return 1; +} + +static void print_data(const void *data, int len) +{ + int i; + const u8 *s; + + /* no data, don't print */ + if (len == 0) + return; + + if (is_printable_string(data, len)) { + printf(" = \"%s\"", (char *)data); + return; + } + + switch (len) { + case 1: /* byte */ + printf(" = <0x%02x>", (*(u8 *) data) & 0xff); + break; + case 2: /* half-word */ + printf(" = <0x%04x>", be16_to_cpu(*(u16 *) data) & 0xffff); + break; + case 4: /* word */ + printf(" = <0x%08x>", be32_to_cpu(*(u32 *) data) & 0xffffffffU); + break; + case 8: /* double-word */ + printf(" = <0x%16llx>", be64_to_cpu(*(uint64_t *) data)); + break; + default: /* anything else... hexdump */ + printf(" = ["); + for (i = 0, s = data; i < len; i++) + printf("%02x%s", s[i], i < len - 1 ? " " : ""); + printf("]"); + + break; + } +} + +void ft_dump_blob(const void *bphp) +{ + const struct boot_param_header *bph = bphp; + const uint64_t *p_rsvmap = (const uint64_t *) + ((const char *)bph + be32_to_cpu(bph->off_mem_rsvmap)); + const u32 *p_struct = (const u32 *) + ((const char *)bph + be32_to_cpu(bph->off_dt_struct)); + const u32 *p_strings = (const u32 *) + ((const char *)bph + be32_to_cpu(bph->off_dt_strings)); + u32 tag; + const u32 *p; + const char *s, *t; + int depth, sz, shift; + int i; + uint64_t addr, size; + + depth = 0; + shift = 4; + + for (i = 0;; i++) { + addr = be64_to_cpu(p_rsvmap[i * 2]); + size = be64_to_cpu(p_rsvmap[i * 2 + 1]); + if (addr == 0 && size == 0) + break; + + printf("/memreserve/ 0x%llx 0x%llx;\n", addr, size); + } + + p = p_struct; + while ((tag = be32_to_cpu(*p++)) != OF_DT_END) { + + /* printf("tag: 0x%08x (%d)\n", tag, p - p_struct); */ + + if (tag == OF_DT_BEGIN_NODE) { + s = (const char *)p; + p = (u32 *) _ALIGN((unsigned long)p + strlen(s) + 1, 4); + + printf("%*s%s {\n", depth * shift, "", s); + + depth++; + continue; + } + + if (tag == OF_DT_END_NODE) { + depth--; + + printf("%*s};\n", depth * shift, ""); + continue; + } + + if (tag == OF_DT_NOP) { + printf("%*s[NOP]\n", depth * shift, ""); + continue; + } + + if (tag != OF_DT_PROP) { + fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", + depth * shift, "", tag); + break; + } + sz = be32_to_cpu(*p++); + s = (const char *)p_strings + be32_to_cpu(*p++); + t = (const char *)p; + p = (const u32 *)_ALIGN((unsigned long)p + sz, 4); + printf("%*s%s", depth * shift, "", s); + print_data(t, sz); + printf(";\n"); + } +} + +void ft_backtrack_node(struct ft_cxt *cxt) +{ + if (be32_to_cpu(*(u32 *) (cxt->p - 4)) != OF_DT_END_NODE) + return; /* XXX only for node */ + + cxt->p -= 4; +} + +/* note that the root node of the blob is "peeled" off */ +void ft_merge_blob(struct ft_cxt *cxt, void *blob) +{ + struct boot_param_header *bph = (struct boot_param_header *)blob; + u32 *p_struct = (u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_struct)); + u32 *p_strings = + (u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_strings)); + u32 tag, *p; + char *s, *t; + int depth, sz; + + if (be32_to_cpu(*(u32 *) (cxt->p - 4)) != OF_DT_END_NODE) + return; /* XXX only for node */ + + cxt->p -= 4; + + depth = 0; + p = p_struct; + while ((tag = be32_to_cpu(*p++)) != OF_DT_END) { + + /* printf("tag: 0x%08x (%d) - %d\n", tag, p - p_struct, depth); */ + + if (tag == OF_DT_BEGIN_NODE) { + s = (char *)p; + p = (u32 *) _ALIGN((unsigned long)p + strlen(s) + 1, 4); + + if (depth++ > 0) + ft_begin_node(cxt, s); + + continue; + } + + if (tag == OF_DT_END_NODE) { + ft_end_node(cxt); + if (--depth == 0) + break; + continue; + } + + if (tag == OF_DT_NOP) + continue; + + if (tag != OF_DT_PROP) + break; + + sz = be32_to_cpu(*p++); + s = (char *)p_strings + be32_to_cpu(*p++); + t = (char *)p; + p = (u32 *) _ALIGN((unsigned long)p + sz, 4); + + ft_prop(cxt, s, t, sz); + } +} + +void *ft_get_prop(void *bphp, const char *propname, int *szp) +{ + struct boot_param_header *bph = bphp; + uint32_t *p_struct = + (uint32_t *) ((char *)bph + be32_to_cpu(bph->off_dt_struct)); + uint32_t *p_strings = + (uint32_t *) ((char *)bph + be32_to_cpu(bph->off_dt_strings)); + uint32_t version = be32_to_cpu(bph->version); + uint32_t tag; + uint32_t *p; + char *s, *t; + char *ss; + int sz; + static char path[256], prop[256]; + + path[0] = '\0'; + + p = p_struct; + while ((tag = be32_to_cpu(*p++)) != OF_DT_END) { + + if (tag == OF_DT_BEGIN_NODE) { + s = (char *)p; + p = (uint32_t *) _ALIGN((unsigned long)p + strlen(s) + + 1, 4); + strcat(path, s); + strcat(path, "/"); + continue; + } + + if (tag == OF_DT_END_NODE) { + path[strlen(path) - 1] = '\0'; + ss = strrchr(path, '/'); + if (ss != NULL) + ss[1] = '\0'; + continue; + } + + if (tag == OF_DT_NOP) + continue; + + if (tag != OF_DT_PROP) + break; + + sz = be32_to_cpu(*p++); + s = (char *)p_strings + be32_to_cpu(*p++); + if (version < 0x10 && sz >= 8) + p = (uint32_t *) _ALIGN((unsigned long)p, 8); + t = (char *)p; + p = (uint32_t *) _ALIGN((unsigned long)p + sz, 4); + + strcpy(prop, path); + strcat(prop, s); + + if (strcmp(prop, propname) == 0) { + *szp = sz; + return t; + } + } + + return NULL; +} + +/********************************************************************/ + +extern unsigned char oftree_dtb[]; +extern unsigned int oftree_dtb_len; + +/* Function that returns a character from the environment */ +extern uchar(*env_get_char) (int); + +void ft_setup(void *blob, int size, bd_t * bd) +{ + DECLARE_GLOBAL_DATA_PTR; + u8 *end; + u32 *p; + int len; + struct ft_cxt cxt; + int i, k, nxt; + static char tmpenv[256]; + char *s, *lval, *rval; + ulong clock; + + ft_begin(&cxt, blob, size); + + /* fs_add_rsvmap not used */ + + ft_begin_tree(&cxt); + + ft_begin_node(&cxt, ""); + + ft_end_node(&cxt); + + /* copy RO tree */ + ft_merge_blob(&cxt, oftree_dtb); + + /* back into root */ + ft_backtrack_node(&cxt); + + ft_begin_node(&cxt, "u-boot-env"); + + for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { + for (nxt = i; env_get_char(nxt) != '\0'; ++nxt) ; + s = tmpenv; + for (k = i; k < nxt && s < &tmpenv[sizeof(tmpenv) - 1]; ++k) + *s++ = env_get_char(k); + *s++ = '\0'; + lval = tmpenv; + s = strchr(tmpenv, '='); + if (s != NULL) { + *s++ = '\0'; + rval = s; + } else + continue; + ft_prop_str(&cxt, lval, rval); + } + + ft_end_node(&cxt); + + ft_begin_node(&cxt, "chosen"); + + ft_prop_str(&cxt, "name", "chosen"); + ft_prop_str(&cxt, "bootargs", getenv("bootargs")); + ft_prop_int(&cxt, "linux,platform", 0x600); /* what is this? */ + + ft_end_node(&cxt); + + ft_end_node(&cxt); /* end root */ + + ft_end_tree(&cxt); + + /* + printf("merged OF-tree\n"); + ft_dump_blob(blob); + */ + + /* paste the bd_t at the end of the flat tree */ + end = (char *)blob + + be32_to_cpu(((struct boot_param_header *)blob)->totalsize); + memcpy(end, bd, sizeof(*bd)); + +#ifdef __powerpc__ + + p = ft_get_prop(blob, "/u-boot-bd_t/memstart", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_memstart); + + p = ft_get_prop(blob, "/u-boot-bd_t/memsize", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_memsize); + + p = ft_get_prop(blob, "/u-boot-bd_t/flashstart", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_flashstart); + + p = ft_get_prop(blob, "/u-boot-bd_t/flashsize", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_flashsize); + + p = ft_get_prop(blob, "/u-boot-bd_t/flashoffset", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_flashoffset); + + p = ft_get_prop(blob, "/u-boot-bd_t/sramstart", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_sramstart); + + p = ft_get_prop(blob, "/u-boot-bd_t/sramsize", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_sramsize); + +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \ + || defined(CONFIG_E500) + p = ft_get_prop(blob, "/u-boot-bd_t/immr_base", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_immr_base); +#endif + +#if defined(CONFIG_MPC5xxx) + p = ft_get_prop(blob, "/u-boot-bd_t/mbar_base", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_mbar_base); +#endif + +#if defined(CONFIG_MPC83XX) + p = ft_get_prop(blob, "/u-boot-bd_t/immrbar", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_immrbar); +#endif + +#if defined(CONFIG_MPC8220) + p = ft_get_prop(blob, "/u-boot-bd_t/mbar_base", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_mbar_base); + + p = ft_get_prop(blob, "/u-boot-bd_t/inpfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_nipfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/pcifreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_pcifreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/pevfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_pevfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/flbfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_flbfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/vcofreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_vcofreq); +#endif + + p = ft_get_prop(blob, "/u-boot-bd_t/bootflags", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_bootflags); + + p = ft_get_prop(blob, "/u-boot-bd_t/ip_addr", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_ip_addr); + + p = ft_get_prop(blob, "/u-boot-bd_t/enetaddr", &len); + if (p != NULL) + memcpy(p, bd->bi_enetaddr, 6); + + p = ft_get_prop(blob, "/u-boot-bd_t/ethspeed", &len); + if (p != NULL) + *p = cpu_to_be32((uint32_t) bd->bi_ethspeed); + + p = ft_get_prop(blob, "/u-boot-bd_t/intfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_intfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/busfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_busfreq); + +#ifdef CONFIG_CPM2 + + p = ft_get_prop(blob, "/u-boot-bd_t/cpmfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_cpmfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/brgfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_brgfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/sccfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_sccfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/vco", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_vco); +#endif + +#if defined(CONFIG_MPC5xxx) + + p = ft_get_prop(blob, "/u-boot-bd_t/ipbfreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_ipbfreq); + + p = ft_get_prop(blob, "/u-boot-bd_t/pcifreq", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_pcifreq); +#endif + + p = ft_get_prop(blob, "/u-boot-bd_t/baudrate", &len); + if (p != NULL) + *p = cpu_to_be32(bd->bi_baudrate); + +#if defined(CONFIG_8xx) + clock = gd->cpu_clk; +#elif defined(CONFIG_8260) + clock = gd->brg_clk; +#else + clock = 0; +#endif + p = ft_get_prop(blob, "/cpus/" OF_CPU "/clock-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + + p = ft_get_prop(blob, "/cpus/" OF_CPU "/timebase-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock / 4); /* XXX I'm just guessing */ + +#endif /* __powerpc__ */ + + /* + printf("final OF-tree\n"); + ft_dump_blob(blob); + */ + +} + +#endif diff --git a/include/ft_build.h b/include/ft_build.h new file mode 100644 --- /dev/null +++ b/include/ft_build.h @@ -0,0 +1,66 @@ +/* + * OF Flat tree builder + * + */ + +#ifndef FT_BUILD_H +#define FT_BUILD_H + +#include <linux/types.h> +#include <asm/u-boot.h> + +/* Definitions used by the flattened device tree */ +#define OF_DT_HEADER 0xd00dfeed /* marker */ +#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */ +#define OF_DT_END_NODE 0x2 /* End node */ +#define OF_DT_PROP 0x3 /* Property: name off, size, + * content */ +#define OF_DT_NOP 0x4 /* nop */ +#define OF_DT_END 0x9 + +#define OF_DT_VERSION 0x10 + +struct boot_param_header { + u32 magic; /* magic word OF_DT_HEADER */ + u32 totalsize; /* total size of DT block */ + u32 off_dt_struct; /* offset to structure */ + u32 off_dt_strings; /* offset to strings */ + u32 off_mem_rsvmap; /* offset to memory reserve map */ + u32 version; /* format version */ + u32 last_comp_version; /* last compatible version */ + /* version 2 fields below */ + u32 boot_cpuid_phys; /* Physical CPU id we're booting on */ + /* version 3 fields below */ + u32 dt_strings_size; /* size of the DT strings block */ +}; + +struct ft_cxt { + struct boot_param_header *bph; + int max_size; /* maximum size of tree */ + int overflow; /* set when this happens */ + u8 *p, *pstr, *pres; /* running pointers */ + u8 *p_begin, *pstr_begin, *pres_begin; /* starting pointers */ + u8 *p_anchor; /* start of constructed area */ + int struct_size, strings_size, res_size; +}; + +void ft_begin_node(struct ft_cxt *cxt, const char *name); +void ft_end_node(struct ft_cxt *cxt); + +void ft_begin_tree(struct ft_cxt *cxt); +int ft_end_tree(struct ft_cxt *cxt); + +void ft_nop(struct ft_cxt *cxt); +void ft_prop(struct ft_cxt *cxt, const char *name, const void *data, int sz); +void ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str); +void ft_prop_int(struct ft_cxt *cxt, const char *name, int val); +void ft_begin(struct ft_cxt *cxt, void *blob, int max_size); +void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size); + +void ft_setup(void *blob, int size, bd_t * bd); + +void ft_dump_blob(const void *bphp); +void ft_merge_blob(struct ft_cxt *cxt, void *blob); +void *ft_get_prop(void *bphp, const char *propname, int *szp); + +#endif diff --git a/board/stxxtc/Makefile b/board/stxxtc/Makefile --- a/board/stxxtc/Makefile +++ b/board/stxxtc/Makefile @@ -25,11 +25,19 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o +OBJS = $(BOARD).o oftree.o $(LIB): .depend $(OBJS) $(AR) crv $@ $(OBJS) +%.dtb: %.dts + dtc -f -V 0x10 -I dts -O dtb $< >$@ + +%.c: %.dtb + xxd -i $< \ + | sed -e "s/^unsigned char/const unsigned char/g" \ + | sed -e "s/^unsigned int/const unsigned int/g" > $@ + ######################################################################### .depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) @@ -38,3 +46,4 @@ $(LIB): .depend $(OBJS) sinclude .depend ######################################################################### + diff --git a/board/stxxtc/oftree.dts b/board/stxxtc/oftree.dts new file mode 100644 --- /dev/null +++ b/board/stxxtc/oftree.dts @@ -0,0 +1,52 @@ +/ { + model = "STXXTC V1"; + compatible = "STXXTC"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + linux,phandle = <1>; + #address-cells = <1>; + #size-cells = <0>; + PowerPC,MPC870@0 { + linux,phandle = <3>; + name = "PowerPC,MPC870"; + device_type = "cpu"; + reg = <0>; + clock-frequency = <0>; /* place-holder for runtime fillup */ + timebase-frequency = <0>; /* dido */ + linux,boot-cpu; + i-cache-size = <2000>; + d-cache-size = <2000>; + 32-bit; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <00000000 00000000 00000000 20000000>; + }; + + /* copy of the bd_t information (place-holders) */ + u-boot-bd_t { + memstart = <0>; + memsize = <0>; + flashstart = <0>; + flashsize = <0>; + flashoffset = <0>; + sramstart = <0>; + sramsize = <0>; + + immr_base = <0>; + + bootflags = <0>; + ip_addr = <0>; + enetaddr = [ 00 00 00 00 00 00 ]; + ethspeed = <0>; + intfreq = <0>; + busfreq = <0>; + + baudrate = <0>; + }; + +}; diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c --- a/board/stxxtc/stxxtc.c +++ b/board/stxxtc/stxxtc.c @@ -38,6 +38,13 @@ #include <watchdog.h> #endif +#include <ft_build.h> + +/****************************************************************/ + +extern const unsigned char oftree_dtb[]; +extern const unsigned int oftree_dtb_len; + /****************************************************************/ /* some sane bit macros */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -574,19 +574,14 @@ typedef unsigned int led_id_t; #define CONFIG_CRC32_VERIFY 1 #define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1 -/* Note: change below for your network setting!!! - * This was done just to facilitate manufacturing test and configuration. - */ -#define CONFIG_ETHADDR 00:e0:0c:07:9b:8a +/*****************************************************************************/ -#define CONFIG_SERVERIP 192.168.08.1 -#define CONFIG_IPADDR 192.168.08.85 -#define CONFIG_GATEWAYIP 192.168.08.1 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_HOSTNAME stx_xtc -#define CONFIG_ROOTPATH /xtcroot -#define CONFIG_BOOTFILE uImage -#define CONFIG_LOADADDR 0x1000000 +/* pass open firmware flat tree */ +#define CONFIG_OF_FLAT_TREE 1 +/* maximum size of the flat tree (8K) */ +#define OF_FLAT_TREE_MAX_SIZE 8192 + +#define OF_CPU "PowerPC,MPC870@0" #endif /* __CONFIG_H */

2 9

[U-Boot-Users] Question on multiple images stored in a table...
by sjhill＠realitydiluted.com 12 Oct '05

12 Oct '05

Greetings. I apologize if this has been discussed previously. The mailing list search function was painful for me. My question has to do with how the 'image_header_t' defined in 'include/image.h' is used. For my application, I want a list all of the images present in my system to be available at boot time such that I do not have do a 'imls' command to know where and what all of my images are my system. I would like to create an array of 'image_header_t' structures in flash that I would burn with my U-Boot image. During boot, I would read an I/O pin requesting that a certain image be booted independent of where it is located in flash memory. Has anyone done something similar to this? Thanks. -Steve

2 1

Re: [U-Boot-Users] Re: Problem building U-Boot for ARM target
by Paolo Broggini 12 Oct '05

12 Oct '05

Peter Pearse ha scritto: > Paolo Broggini wrote: > >>Now the questions are: >>1) Why the CFLAGS is in the macro since cc-option should check the >> compiler support for a particular option? Indeed the cc-option >> contained in config.mk is exactly the same as theone contained in >>linux kernel 2.6.x makefile. > > Because I cut and pasted it without thinking, and it worked for me > - $(CFLAGS) should be dropped. > I've added it to my todo list, you're welcome to submit a patch. I'll do it. Thanks again. -P.Broggini

1 0

Re: [U-Boot-Users] Re: Problem building U-Boot for ARM target
by Paolo Broggini 12 Oct '05

12 Oct '05

Peter Pearse ha scritto: > > No question is stupid - just giving you the info. I mean, it is quite obvious that it works by you (... and probably by a lot of other people to) > > Depends how much time you have available to sort the bug.... > Sometimes it's worth it in the long run. Definitely! but I'm far to be a "guru" in the make stuff. >>I tried the macro cc-option "by hand" (so without $CFLAGS) in a bash >> >> shell and I got the same results as above, i.e. the check > for option >> -mapcs-32 fails but the compiler support it and indeed the compilation >> works fine! May be a bug? Sorry forget about this I was making a mistake :-( The script suggested by Catalin works perfectly either in a bash or a sh shell. On the other hand, the U-Boot build process fails in both shell. So I have investigated a little bit the macro cc-option: cc-option = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \ > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;) I tried to drop the CFLAGS variable from the macro: cc-option = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null \ > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;) and the build process worked fine i.e. the check for -mapcs-32 was OK. Next step, in order to see the content of CFLAGS, I modified the macro as: cc-option = $(shell echo "$(CFLAGS)" > ./flags.txt; if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \ > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;) and this revealed that among a lot of other otions it contains the failing option -mabi=apcs-gnu !!! But this option is not set by anybody else just by: PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) So it is obvious why cc-option returns the wrong option! Now the questions are: 1) Why the CFLAGS is in the macro since cc-option should check the compiler support for a particular option? Indeed the cc-option contained in config.mk is exactly the same as theone contained in linux kernel 2.6.x makefile. 2) How is it possible that CFLAGS contains the failing option since $(call cc-option,-mapcs-32,-mabi=apcs-gnu) is not yet processed and not set by anybody else? 3) Why if I replace -mapcs-32 with -g everything works fine? I wish I never tried that!! Please Peter or Catalin since your compiler support both -mapcs-32 and -mabi=apcs-gnu options could you try the following? PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mfoo) Thanks for your patience! -P.Broggini

1 0

[U-Boot-Users] i.MX support for scb9328 cleaned up
by Konstantin Kletschke 12 Oct '05

12 Oct '05

I cleaned up board support for the scb9328 board. I did changes to the scb9328.h, it is very much more readable more. Many timings have been tuned, the system is much faster now. Also the board/scb9328/flash.c is removed, the patch will delete it! The cfi_flash.c is used now. If anybody is interested, it is at http://www.ludenkalle.de/u-boot-1.1.2-imx1/u-boot-1.1.2-imx1.diff It contains the code unlocking intel k3 devices. splitdiff output is at http://www.ludenkalle.de/u-boot-1.1.2-imx1/u-boot-1.1.2_* (directory viewing on http://www.ludenkalle.de/u-boot-1.1.2-imx1/ is allowed). May be I could get advice what still looks odd so I can fix it, so the stuff could be apllied. Or it can be applied as is... Regards, Konsti -- GPG KeyID EF62FCEF Fingerprint: 13C9 B16B 9844 EC15 CC2E A080 1E69 3FDA EF62 FCEF

3 12

[U-Boot-Users] Problem building U-Boot for ARM target
by Paolo Broggini 11 Oct '05

11 Oct '05

Dear all, I'm using the GCC 3.2 toolchain for building U-Boot (current head of git) for an ARM target. I get the following error: cc1: invalid option 'abi=apcs-gnu' This option (correct me if I'm wrong) was introduced with a recent patch by Peter Pearse. Digging a bit in gcc.gnu.org it appears that this option comes only with GCC 4.0! Is this a known behaviour? BTW: removing this option from 'cpu/armxxx/config.mk' U-Boot builds fine! Best regards -P.Broggini

2 8

[U-Boot-Users] Re: U-Boot 1.1.3 does not boot with MPC8349E
by Florian Behrens 11 Oct '05

11 Oct '05

Hi, thanks for your help, but finally I found the problem myself (pulling out the USB TAP instead of a BDI2000 ;-). The text segment in U-Boot 1.1.3 is placed at 0xFE700000 in board/mpc8349ads/config.mk, while the README.mpc83xxads says to flash it to 0xFE000000. Changing the text segment address makes it working! You may choose to change either the README or the config.mk. Regards, Florian. Machen Sie aus 14 Cent spielend bis zu 100 Euro! Die neue Gaming-Area von Arcor - über 50 Onlinespiele im Angebot. http://www.arcor.de/rd/emf-gaming-1

1 0

[U-Boot-Users] [PATCH] AS option "allow_branch_to_undefined" removed into mips support
by Rodolfo Giometti 11 Oct '05

11 Oct '05

Hello, the attached patch agaist u-boot-1.1.3 (thanks to Tim Braun <tim.braun(a)librestream.com>) allow to remove the mips(el)-linux-as option named "allow_branch_to_undefined". I tested it with GNU assembler version 2.16.1. Also it fixes endianness support and adds support for toolchains named mips-linux- or mipsel-linux- (the former still untested). Ciao, Rodolfo -- GNU/Linux Solutions e-mail: giometti(a)linux.it Linux Device Driver giometti(a)enneenne.com Embedded Systems home page: giometti.enneenne.com UNIX programming phone: +39 349 2432127

1 0

[U-Boot-Users] [PATCH] Target for each ARM supplied & supported combination of board and core module.
by Peter Pearse 11 Oct '05

11 Oct '05

Wolfgang Attached gzipped patch is intended to supply a separate target for each ARM supplied & supported combination of board and core module, whilst meeting U-Boot code style requirements, as we have discussed. It produces a working build of u-boot for each target. The configuration for each target is provided by inserting a link to the base board configuration header e.g. include/configs/integratorap.h. This link is removed by make clean. I hope this is acceptable. Patch produced using cg-diff in GIT cg-updated Tue Oct 11 15:01:56 BST 2005 CHANGELOG Provide targets for all ARM supplied & supported base-board/core module combinations. Patch by Peter Pearse, 11 Oct 2005. Regards Peter

1 0

Re: [U-Boot-Users] Debugging U-Boot on arm920t using BDI2000
by Ioritz Irazustabarrena Murgiondo 11 Oct '05

11 Oct '05

First Question: If I have understood everything correctly, u-boot ALWAYS relocates itselfs to RAM. This is the code in Start.S in cpu/arm920t that makes the relocation. relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debugaitor This is how I get the values that _start and _TEXT_BASE take: arm-unknown-linux-gnu-gdb u-boot GNU gdb 6.2.1 Copyright 2004 Free Software Foundation, Inc. ... This GDB was configured as "--host=i686-pc-linux-gnu --target=arm-unknown-linux-gnu"... (gdb) info address _start Symbol "_start" is at 0x8f00000 in a file compiled without debugging. (gdb) info address _TEXT_BASE Symbol "_TEXT_BASE" is at 0x8f00040 in a file compiled without debugging. (gdb) x/1xw 0x8f00040 0x8f00040 <_TEXT_BASE>: 0x08f00000 (gdb) Both addresses TEXT_BASE & _start are SDRAM. According to this, this code will never relocate. Is this correct ?. u-boot$ arm-unknown-linux-gnu-objdump -h u-boot u-boot: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 000138a4 08f00000 08f00000 00008000 2**5 What I conclude is that the binary is prepared to be loaded and executed only from SDRAM. In fact, I´ve loaded u-boot in sdram (0x8f00000) using bdi2000, I have defined CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT and I have been able to debug u-boot using gdb. I know this is not the right way to debug u-boot. In conclusion, there are two things I don't understand: * I think that LMA address of text section should be Flash 0x10000000. Because the code must be loaded in non-volatile memory. VMA of course, should be SDRAM 0x8f00000. * I think that the code that makes the relocation must be loaded and executed from flash. VMA 0x10000000 and LMA 0x10000000. Second Question. You have told me that: > But for that you have to tell the debugger that the code is running > from an address that is different from the link address). This is what I´ve done: iim@viggen:~/.../u-boot-1.1.3$ arm-unknown-linux-gnu-gdb u-boot GNU gdb 6.3 ... This GDB was configured as "--host=i686-pc-linux-gnu --target=arm-unknown-linux-gnu"... (gdb) symbol-file Discard symbol table from `/.../u-boot-1.1.3/u-boot'? (y or n) y No symbol file now. (gdb) add-symbol-file u-boot 0x0000 add symbol table from file "u-boot" at .text_addr = 0x0 (y or n) y Reading symbols from /.../u-boot-1.1.3/u-boot...done. (gdb) b _start_armboot Breakpoint 1 at 0x8f00394: file /.../u-boot-1.1.3/cpu/arm920t/start.S, line 435. (gdb) target remote 192.168.1.5:2001 Remote debugging using 192.168.1.5:2001 0x08f001c0 in ?? () (gdb) c Continuing. But the breakpoint is still in sdram (0x8f00394), and the program doesn´t stop in the breakpoint. Regards. Ioritz.

1 0

[U-Boot-Users] Problems with MPC8247, HRCW, PCI_MODCK and PLL multiplication factors
by Ron Kellam 11 Oct '05

11 Oct '05

I've a custom MPC8247, 32MB 64-bit SDRAM, 32MB 16-bit Flash, PCI-less system that I'm trying to bring up. In short, my current problem is that the PCI_MODCK bit in the SCCR register does not reflect the PCI_MODCK bit in the Hard Reset Configuration Word. Thus I can't get the clocks I want. The HRCW is 0x0A04F25A. The key elements of this are: - BPS = 10 for 16-bit flash - CIP = 1 for Exceptions at 0x000n_nnnn - PLLBP = 0 for Normal operation - ISB = 100 for Internal Space Base at 0xF0000000 - BMS = 1 for Boot Memory Space at 0x0000_0000..0x01FF_FFFF - PCI_MODCK = 1 for PCI low frequency range - MODCK_H = 1010 also - MODCK[1-3] - tied to 000 The Clock Configuration I'm after is from Table 16 of the MPC8272 Hardware Spec: MODCK_H-MODCK[1-3] = 1010_000: CPM Mult Fact = 2, CPU Mult Fact = 2, PCI Div Fact = 6 to give the following clocks from a 133MHz CLKIN - MAIN_CLK = 266Mhz - CPM_CLK = 133MHz - BUS_CLK = 133Mhz = CLKIN - SCC_CLK = 66MHz - BRG_CLK = 16.6Mhz - PCI_CLK = xx (don't really care) - CORE_CLK = 266Mhz Using the BDI2000 to break at reset, I get: - SCCR = 0x00000019 (which indicates PCI_MODCK=0, and wrong PCIDF) - SCMR = 0x1A510002 I've validated that the HRCW is actually getting read and used, as I can freely change ISB, CS6PC and other bits, and get the expected results. I've also commented out everything in the BDI2000 config bar the setting of SYPCR to disable the watchdog, so I don't think it's the BDI buggering things up. Does anyone have any ideas? I've scoured the Hardware Spec, Reference Manual, Errata, U-Boot mailing list and PPC Embedded mailing list, and turned up no useful information. Thanks in advance, Ron Kellam

1 1

RE: [U-Boot-Users] Problems with MPC8247, HRCW, PCI_MODCK and PLL multiplication factors
by Rune Torgersen 11 Oct '05

11 Oct '05

> From: Ron Kellam > In short, my current problem is that the PCI_MODCK bit in the > SCCR register does not reflect the PCI_MODCK bit in the Hard > Reset Configuration Word. Thus I can't get the clocks I want. Sounds like the PCI is enabled in hardware, because then the MODCK_H bits in the HRCW are ignored and the MODCK_H pins on the CPU are used instead.

2 1

[U-Boot-Users] at91 and lxt971 phy
by zoldnap＠freemail.hu 10 Oct '05

10 Oct '05

Hi! Is there someone using the combo in $SUBJECT? I'm using a modified at91rm9200dk.h config file, the ethernet relevant section: #define CONFIG_DRIVER_ETHER #define CONFIG_NET_RETRY_COUNT 20 /* * MII PHY configuration * */ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ /* 32usec min. for LXT971A */ #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ #define CONFIG_ETHADDR 02:80:ad:20:31:c8 #define CONFIG_IPADDR 192.168.0.100 #define CONFIG_SERVERIP 192.168.0.2 (for the full setup, see the bottom of the mail) after starting u-boot i do: U-Boot> tftp 21000000 zImage PHY not connected!! TFTP from server 192.168.0.2; our IP address is 192.168.0.100 Filename 'zImage'. Load address: 0x21000000 Loading: T T T T T T T T T T T T T T T T T T T T Abort U-Boot> On the server PC i'm using tftp-hpa server. Here is the dump of the ethernet traffic: 18:59:38.903037 arp who-has 192.168.0.2 tell 192.168.0.100 18:59:39.160951 arp reply 192.168.0.2 is-at 00:50:8d:53:ec:34 18:59:43.902587 arp who-has 192.168.0.2 tell 192.168.0.100 18:59:43.902626 arp reply 192.168.0.2 is-at 00:50:8d:53:ec:34 18:59:58.903396 IP 192.168.0.100.1373 > 192.168.0.2.tftp: 25 RRQ "zImage" octet timeout 5 18:59:58.918175 IP 192.168.0.2.32968 > 192.168.0.100.1373: UDP, length: 12 19:00:03.903759 IP 192.168.0.100.1373 > 192.168.0.2.tftp: 25 RRQ "zImage" octet timeout 5 19:00:03.905782 IP 192.168.0.2.32971 > 192.168.0.100.1373: UDP, length: 12 19:00:03.906187 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:03.906590 IP 192.168.0.2.32971 > 192.168.0.100.1373: UDP, length: 516 19:00:03.917236 arp who-has 192.168.0.100 tell 192.168.0.2 19:00:03.917566 arp reply 192.168.0.100 is-at 02:80:ad:20:31:c8 19:00:03.923288 IP 192.168.0.2.32968 > 192.168.0.100.1373: UDP, length: 12 19:00:08.903911 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:08.907847 IP 192.168.0.2.32971 > 192.168.0.100.1373: UDP, length: 516 19:00:13.904233 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:13.923953 IP 192.168.0.2.32968 > 192.168.0.100.1373: UDP, length: 12 19:00:18.904649 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:18.912829 IP 192.168.0.2.32971 > 192.168.0.100.1373: UDP, length: 516 19:00:23.904979 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:28.905379 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:33.905692 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:33.928161 IP 192.168.0.2.32968 > 192.168.0.100.1373: UDP, length: 12 19:00:38.906060 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:38.917350 IP 192.168.0.2.32971 > 192.168.0.100.1373: UDP, length: 516 19:00:38.926918 arp who-has 192.168.0.100 tell 192.168.0.2 19:00:39.926751 arp who-has 192.168.0.100 tell 192.168.0.2 19:00:39.927037 arp reply 192.168.0.100 is-at 02:80:ad:20:31:c8 19:00:43.906424 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:53.907197 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:00:58.907554 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:01:03.907910 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 19:01:08.908269 IP 192.168.0.100.1373 > 192.168.0.2.32971: UDP, length: 4 It looks like that u-boot is ignoring the returned packages for some reason. Maybe u-boot is still configured to think that the phy is a dm9161, as on the original AT91 DK board? How to change that to the LXT971? What could be that cause that outgoing packages are OK, but incoming packages are ignored? I'd appreciate any hints on this! Regards, Zoli

1 0

[U-Boot-Users] Bug in AT91RM9200.h
by Steven Scholz 10 Oct '05

10 Oct '05

Guys, A while ago I sent the following the the linux arm ML. I am sure this applies to U-Boot as well! > I just noticed the following: > > in incluse/asm-arm/mach-at91rm9200/AT91RM9200.h > > #define AT91C_SMC2_DBW (0x1 << 13) // (SMC2) Data Bus Width > > and drivers/pcmcia/at91_cf.c uses code like > > csr &= ~AT91C_SMC2_DBW; > > BUT: > > According to the User Man the "DBW: Data Bus Width" field is _TWO_ bits. > Thus it should be > > #define AT91C_SMC2_DBW (0x3 << 13) // (SMC2) Data Bus Width So please apply this trivial. * Fix define in AT91RM9200.h Patch by Steven Scholz, 10 Oct 2005 -- Steven Index: u-boot/include/asm-arm/arch-at91rm9200/AT91RM9200.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/asm-arm/arch-at91rm9200/AT91RM9200.h,v retrieving revision 1.11 diff -u -r1.11 AT91RM9200.h --- u-boot/include/asm-arm/arch-at91rm9200/AT91RM9200.h 4 Oct 2005 23:52:35 -0000 1.11 +++ u-boot/include/asm-arm/arch-at91rm9200/AT91RM9200.h 10 Oct 2005 12:20:39 -0000 @@ -255,7 +255,7 @@ #define AT91C_SMC2_WSEN ((unsigned int) 0x1 << 7) /* (SMC2) Wait State Enable */ #define AT91C_SMC2_TDF ((unsigned int) 0xF << 8) /* (SMC2) Data Float Time */ #define AT91C_SMC2_BAT ((unsigned int) 0x1 << 12) /* (SMC2) Byte Access Type */ -#define AT91C_SMC2_DBW ((unsigned int) 0x1 << 13) /* (SMC2) Data Bus Width */ +#define AT91C_SMC2_DBW ((unsigned int) 0x3 << 13) /* (SMC2) Data Bus Width */ #define AT91C_SMC2_DBW_16 ((unsigned int) 0x1 << 13) /* (SMC2) 16-bit. */ #define AT91C_SMC2_DBW_8 ((unsigned int) 0x2 << 13) /* (SMC2) 8-bit. */ #define AT91C_SMC2_DRP ((unsigned int) 0x1 << 15) /* (SMC2) Data Read Protocol */

1 1

[U-Boot-Users] [PATCH] Make target for all ARM supplied and supported development boards - patch 007
by Peter Pearse 10 Oct '05

10 Oct '05

The attached patch provides a make target for all ARM supplied and supported development boards. It also ensures that all boards use the preferred mechanism for initial setup. I have modified the other boards using arm cpus sx1 ns9750dev omap1510inn omap1610inn omap2420h4 omap5912osk omap730p2 to use the same mechanism. It replaces my rejected patch 006 (thanks for the comments & suggestions Wolfgang) which contained an unintentional change to MAKEALL. The patch was made against the GIT head:- commit bccae9039e59ac09a776429119389a6a4e679fd7 tree 9361bea6cc2bca3d22876433406886cfc1e359de parent 6ebc79211420cd856c9825cf3ade8bd6fd54fee5 author Wolfgang Denk <wd(a)pollux.denx.de> Thu, 06 Oct 2005 01:50:50 +0200 committer Wolfgang Denk <wd(a)pollux.denx.de> Thu, 06 Oct 2005 01:50:50 +0200 Tested with MAKEALL (unpatched ;-} ) arm. CHANGELOG: Provide make target for all ARM supplied & supported development boards Ensure all boards use lowlevel_init(), rather than platformsetup(). Patch 007 from Peter Pearse <peter.pearse(a)arm.com> 7th Oct 2005 Regards Peter Pearse

3 5

[U-Boot-Users] dataflash problem
by zoldnap＠freemail.hu 10 Oct '05

10 Oct '05

Hi, I'm using u-boot 1.1.3 with an AT91 board, however I'm having problems with the dataflash support: U-Boot downloaded successfully U-Boot 1.1.3 (Oct 9 2005 - 21:49:00) U-Boot code: 21F00000 -> 21F149B8 BSS: -> 21F19290 RAM Configuration: Bank #0: 20000000 32 MB Atmel: Flash: 0 kB DataFlash:AT45DB161 Nb pages: 4096 Page Size: 528 Size= 2162688 bytes Logical address: 0xC0000000 Area 0: C0000000 to C0007FFF (RO) Area 1: C0008000 to C001FFFF (RO) Area 2: C0020000 to C0027FFF Area 3: C0028000 to C020FFFF *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial U-Boot> flinfo DataFlash:AT45DB161 Nb pages: 4096 Page Size: 528 Size= 2162688 bytes Logical address: 0xC0000000 Area 0: C0000000 to C0007FFF (RO) Area 1: C0008000 to C001FFFF (RO) Area 2: C0020000 to C0027FFF Area 3: C0028000 to C020FFFF Bank # 1: Atmel: Unknown Chip Type U-Boot> md C0020000 c0020000:Error Timeout -F- Data Abort detected To me, this seems like u-boot is not honouring that C0000000 should be mapped to the dataflash, instead it wants to read the physical memory at C0000000 which is obviously non existing on this platform. the "about the "Atmel: Flash: 0 kB" message is normal, since I'm having no NAND and using the atmel developed loader.bin for booting u-boot. SPI support also seems to be okay, since it recognizes the exact type of my dataflash device.. Can you give some hints how to start finding out what is causing this problem? Best regards, Zoli Here is my at91rm9200dk.h: /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ /* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define USE_920T_MMU 1 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CFG_USE_MAIN_OSCILLATOR 1 /* flash */ #define MC_PUIA_VAL 0x00000000 #define MC_PUP_VAL 0x00000000 #define MC_PUER_VAL 0x00000000 #define MC_ASR_VAL 0x00000000 #define MC_AASR_VAL 0x00000000 #define EBI_CFGR_VAL 0x00000000 #define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ #define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ #define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ #define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ /* sdram */ #define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ #define PIOC_BSR_VAL 0x00000000 #define PIOC_PDR_VAL 0xFFFF0000 #define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ #define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */ #define SDRAM 0x20000000 /* address of the SDRAM */ #define SDRAM1 0x20000080 /* address of the SDRAM */ #define SDRAM_VAL 0x00000000 /* value written to SDRAM */ #define SDRC_MR_VAL 0x00000002 /* Precharge All */ #define SDRC_MR_VAL1 0x00000004 /* refresh */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* * Size of malloc() pool */ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_BAUDRATE 115200 /* * Hardware drivers */ /* define one of these to choose the DBGU, USART0 or USART1 as console */ #define CONFIG_DBGU #undef CONFIG_USART0 #undef CONFIG_USART1 #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ #define CONFIG_BOOTDELAY 3 /* #define CONFIG_ENV_OVERWRITE 1 */ #define CONFIG_COMMANDS \ ((CONFIG_CMD_DFL | \ CFG_CMD_DHCP ) & \ ~(CFG_CMD_BDI | \ CFG_CMD_IMI | \ CFG_CMD_AUTOSCRIPT | \ CFG_CMD_FPGA | \ CFG_CMD_MISC | \ CFG_CMD_LOADS )) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> #define CFG_MAX_NAND_DEVICE 0 /* Max number of NAND devices */ #define SECTORSIZE 512 #define ADDR_COLUMN 1 #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 #define NAND_MAX_CHIPS 1 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) #define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) #define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) #define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) #define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) #define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) /* the following are NOP's in our implementation */ #define NAND_CTL_CLRALE(nandptr) #define NAND_CTL_SETALE(nandptr) #define NAND_CTL_CLRCLE(nandptr) #define NAND_CTL_SETCLE(nandptr) #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ #define CFG_MEMTEST_START PHYS_SDRAM #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - (1024*1024) #define CONFIG_DRIVER_ETHER #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_HAS_DATAFLASH 1 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) #define CFG_MAX_DATAFLASH_BANKS 2 #define CFG_MAX_DATAFLASH_PAGES 16384 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ #define PHYS_FLASH_1 0x10000000 #define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */ #define CFG_FLASH_BASE PHYS_FLASH_1 #define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 256 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ #undef CFG_ENV_IS_IN_DATAFLASH #ifdef CFG_ENV_IS_IN_DATAFLASH #define CFG_ENV_OFFSET 0x20000 #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) #define CFG_ENV_SIZE 0x2000 /* 0x8000 */ #else #define CFG_ENV_IS_IN_FLASH 1 #ifdef CONFIG_SKIP_LOWLEVEL_INIT #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ #define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ #else #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */ #define CFG_ENV_SIZE 0x2000 /* 0x8000 */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CFG_ENV_IS_IN_DATAFLASH */ #define CFG_LOAD_ADDR 0x21000000 /* default load address */ #ifdef CONFIG_SKIP_LOWLEVEL_INIT #define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ #define CFG_U_BOOT_BASE PHYS_FLASH_1 #define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ #else #define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ #define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */#define CFG_PBSIZE (CFG_CBSIZE +sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #ifndef __ASSEMBLY__ /*----------------------------------------------------------------------- * Board specific extension for bd_info * * This structure is embedded in the global bd_info (bd_t) structure * and can be used by the board specific code (eg board/...) */ struct bd_info_ext { /* helper variable for board environment handling * * env_crc_valid == 0 => uninitialised * env_crc_valid > 0 => environment crc in flash is valid * env_crc_valid < 0 => environment crc in flash is invalid */ int env_crc_valid; }; #endif #define CFG_HZ 1000 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ /* AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #error CONFIG_USE_IRQ not supported #endif #endif #define CFG_AUTO_COMPLETE 1 -- zoldnap(a)freemail.hu <zoldnap(a)freemail.hu>

2 2

[U-Boot-Users] [PATCH] Remove warnings - patch PMP008
by Peter Pearse 10 Oct '05

10 Oct '05

The attached, gzipped, patch removes warnings left by my patch 006 and uses a nicer mechanism to manipulate the load scripts to load the cpu code of the core module. Patch made against cg-update of GIT head at Fri Oct 7 16:09:29 BST 2005 Tested with MAKEALL arm. CHANGELOG: Remove warnings form cpu/arm720t & cpu/arm1136 files. sed the linker scripts, rather than pre-process them. Patch by Peter Pearse, 7 Oct 2005 Regards Peter Pearse

2 2

Re: [U-Boot-Users] (no subject)
by Wolfgang Denk 09 Oct '05

09 Oct '05

Dear Cliff, your port of U-Boot for the pxa255_idp has been broken since it was added, without any patches / fixes in my queue? Are you still maintaining this board? Or is it broken and orphaned and should be removed? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de About the use of language: it is impossible to sharpen a pencil with a blunt ax. It is equally vain to try to do it with ten blunt axes instead. -- Edsger Dijkstra

1 0

[U-Boot-Users] (no subject)
by Andy Fleming 09 Oct '05

09 Oct '05

Here's a patch which puts the PHYs for the 3rd and 4th eTSECS into RGMII mode on the 8548 CDS.

2 1

[U-Boot-Users] NS7520 processor support patch
by Arthur Shipkowski 09 Oct '05

09 Oct '05

This patch adds support for the NS7520 processor as CONFIG_NETARM_NS7520. The patch adds its support to the current Net+ARM related files when possible. The sole exception is the Ethernet driver, because the Ethernet support is not like that on the prior Net+ARM parts nor like that on the NS9750. This patch has been tested against current CVS with MAKEALL arm. CHANGELOG: * Patch by Art Shipkowski, 12 May 2005: Implemented support for the NetSilicon NS7520 processor. Art Shipkowski Videon Central Software Engineer (814)235-1111 x307 art(a)videon-central.com

2 1

[U-Boot-Users] cfi_flash.c bug regarding intel k3 devices
by Konstantin Kletschke 09 Oct '05

09 Oct '05

Hi! cfi_flash.c handles intel k3 devices not correct, they power up with all sectors locked. Similair to flash_unlock_seq for amd devices, there must exist a flash_unlock_seq_intelk3 to do this for intel devices. --- u-boot-1.1.2/drivers/cfi_flash.c 2004-12-18 23:35:45.000000000 +0100 +++ u-boot-1.1.2-imx1/drivers/cfi_flash.c 2005-05-12 15:59:06.000000000 +0200 @@ -111,6 +111,9 @@ #define AMD_ADDR_START 0x555 #define AMD_ADDR_ACK 0x2AA +#define INTEL_CMD_UNLOCK_START 0x60 +#define INTEL_CMD_UNLOCK_ACK 0xD0 + #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 @@ -180,6 +183,7 @@ static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf); static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect); +static void flash_unlock_seq_intelk3 (flash_info_t * info, flash_sect_t sect); static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); @@ -239,7 +243,6 @@ } #endif - /*----------------------------------------------------------------------- * read a character at a port width address */ @@ -397,6 +400,7 @@ switch (info->vendor) { case CFI_CMDSET_INTEL_STANDARD: case CFI_CMDSET_INTEL_EXTENDED: + flash_unlock_seq_intelk3 (info, sect); flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS); flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE); flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM); @@ -858,6 +862,12 @@ flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK); } +static void flash_unlock_seq_intelk3 (flash_info_t * info, flash_sect_t sect) +{ + flash_write_cmd (info, sect, 0, INTEL_CMD_UNLOCK_START); + flash_write_cmd (info, sect, 0, INTEL_CMD_UNLOCK_ACK); +} + /*----------------------------------------------------------------------- */ static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) May be there must be added an "if" to filter intel k3 devices only, can somebody confirm this? Regards, Konsti -- GPG KeyID EF62FCEF Fingerprint: 13C9 B16B 9844 EC15 CC2E A080 1E69 3FDA EF62 FCEF

3 6

[U-Boot-Users] [PATCH][BUGFIX] AT91RM9200: eliminate hard-coded buffer address
by Anders Larsen 09 Oct '05

09 Oct '05

Hi, the driver for the AT91RM9200 on-chip Ethernet interface uses a hard-coded address of the transfer buffer descriptor table. This is a ticking time-bomb (well, in fact it just blew up here overwriting U-Boot), AND the driver will not work at all on boards with less than 16MiB of RAM. The patch below lets the linker decide where to place the buffer (due to this, I had to change the start-address for the csb637 board - AFAICT other AT91RM9200-based boards are not impaired by the larger size of U-Boot). The Atmel errata #11 states that the transfer buffer descriptor table must be aligned on a 16-word boundary. As it turned out, this is insufficient - it seems the table must be aligned on a boundary at least as large as the table itself (in Linux this is not an issue - the table is aligned on a PAGE_SIZE (4096) boundary). Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Eliminate the hard-coded address of the Ethernet transfer buffer Patch by Anders Larsen, 07 Oct 2005 --- board/csb637/config.mk | 2 +- cpu/arm920t/at91rm9200/ether.c | 23 ++++++++--------------- 2 files changed, 9 insertions(+), 16 deletions(-) diff --git a/board/csb637/config.mk b/board/csb637/config.mk --- a/board/csb637/config.mk +++ b/board/csb637/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23fe0000 +TEXT_BASE = 0x23fc0000 diff --git a/cpu/arm920t/at91rm9200/ether.c b/cpu/arm920t/at91rm9200/ether.c --- a/cpu/arm920t/at91rm9200/ether.c +++ b/cpu/arm920t/at91rm9200/ether.c @@ -44,21 +44,19 @@ typedef struct { #define RBF_LOCAL2 (1<<24) #define RBF_LOCAL1 (1<<23) -/* Emac Buffers in last 512KBytes of SDRAM*/ -/* Be careful, buffer size is limited to 512KBytes !!! */ -#define RBF_FRAMEMAX 100 -/*#define RBF_FRAMEMEM 0x200000 */ -#define RBF_FRAMEMEM 0x21F80000 +#define RBF_FRAMEMAX 64 #define RBF_FRAMELEN 0x600 -#define RBF_FRAMEBTD RBF_FRAMEMEM -#define RBF_FRAMEBUF (RBF_FRAMEMEM + RBF_FRAMEMAX*sizeof(rbf_t)) - - #ifdef CONFIG_DRIVER_ETHER #if (CONFIG_COMMANDS & CFG_CMD_NET) +/* alignment as per Errata #11 (64 bytes) is insufficient! */ +rbf_t rbfdt[RBF_FRAMEMAX] __attribute((aligned(512))); +rbf_t *rbfp; + +unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN] __attribute((aligned(4))); + /* structure to interface the PHY */ AT91S_PhyOps PhyOps; @@ -153,9 +150,6 @@ UCHAR at91rm9200_EmacWritePhy (AT91PS_EM } -rbf_t *rbfdt; -rbf_t *rbfp; - int eth_init (bd_t * bd) { int ret; @@ -188,9 +182,8 @@ int eth_init (bd_t * bd) p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */ /* Init Ehternet buffers */ - rbfdt = (rbf_t *) RBF_FRAMEBTD; for (i = 0; i < RBF_FRAMEMAX; i++) { - rbfdt[i].addr = RBF_FRAMEBUF + RBF_FRAMELEN * i; + rbfdt[i].addr = rbf_framebuf[i]; rbfdt[i].size = 0; } rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;

2 1

[U-Boot-Users] [PATCH] Fix ARM compilation error
by Anders Larsen 09 Oct '05

09 Oct '05

Hi, the patch below eliminates two calls of the libgcc helper functions _divsi3 and _modsi3 when using a (standard) Hardware-FP toolchain (the unsigned counterparts _udivsi3 and _umodsi3 are already included in libarm.a). "For historical reasons", the ARM community uses toolchains built for hardware-FP, even though so far no ARM CPU comes with FPU. Go figure. Cheers Anders Signed-off-by: Anders Larsen <alarsen(a)rea.de> CHANGELOG: Fixed compilation for ARM when using a (standard) Hard-FP toolchain Patch by Anders Larsen, 07 Oct 2005 --- drivers/cfi_flash.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -221,7 +221,7 @@ static void flash_printqry (flash_info_t cfiptr_t cptr; int x, y; - for (x = 0; x < 0x40; x += 16 / info->portwidth) { + for (x = 0; x < 0x40; x += 16U / info->portwidth) { cptr.cp = flash_make_addr (info, sect, x + FLASH_OFFSET_CFI_RESP); @@ -807,7 +807,7 @@ static void flash_make_cmd (flash_info_t #else for (i = 1; i <= info->portwidth; i++) #endif - *cp++ = (i % info->chipwidth) ? '\0' : cmd; + *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd; } /*

2 1

[U-Boot-Users] problem about transplant u-boot to S3C44B0
by du rui 08 Oct '05

08 Oct '05

I have transplant u-boot to my S3C44B0 board and i run hello world demo but it's prompt => go c008000 ## Starting application at 0x0C008000 ... then it's dead i want know what reason cause it __________________________________ Start your day with Yahoo! - Make it your home page! http://www.yahoo.com/r/hs

2 1

[U-Boot-Users] can u-boot relocate to sram
by K.M.Yin 07 Oct '05

07 Oct '05

Dear sir we want to relocate the u-boot to sram instead of DDR ram after boot up from flash. is it possible to achieved that just change the relocated address which is referred by the start.S. Best Regards K.M.Yin

2 1

[U-Boot-Users] how to port u-boot to DM270 on DM270GHK EVB
by Lu yunfeng 07 Oct '05

07 Oct '05

> Dear all, > > Can anybody tell me how to port u-boot to DM270 on TI DM270GHK EBV? how many files must be modified? I just need a serial poer and a network port(CS8900) for internace. > > Regards, > Yunfeng >

1 0

[U-Boot-Users] how to port u-boot to DM270 on DM270GHK EVB
by Lu yunfeng 07 Oct '05

07 Oct '05

Dear all , I 'm a fresh man to u-boot! My boss want me to port u-boot to TI DM270, how many file must be modified in u-boot directory tree? can any one tell me the general procedure of porting the u-boot to DM270? Regards, YF.

2 3

RE: [U-Boot-Users] [PATCH] - OMAP242x fix for GP device booting.
by Woodruff, Richard 06 Oct '05

06 Oct '05

Wolfgang, I'll submit something early next week. I'm currently unable to spend cycles. Your suggested compile work around seems fine as what is on head isn't currently in a workable state. Where it left last, I'll do a pull and submit to just fix internals. Then we will see about the cfi_flash driver. GP_DEVICE has had two definitions I'm not sure how they crossed in the patch order. Regards, Richard W. > -----Original Message----- > From: wd(a)denx.de [mailto:wd@denx.de] > Sent: Thursday, October 06, 2005 3:46 PM > To: Woodruff, Richard > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: [U-Boot-Users] [PATCH] - OMAP242x fix for GP device booting. > > Dear Richard, > > in message <71555548814716479478431542AA5F8A0197FEDC(a)dlee2k04.ent.ti.com> > you wrote: > > > > This patch fixes booting on OMAP242x GP devices, and it unlocks a GP > > Actually it does not - it breaks compiling the code. > > > SRAM suitable for DSS subsystem access. One other minor change is to > > the DDR's DLL count value when used in unlock mode. This change allows > > standard low speed operation for 100MHz DDR's. > > The change to "include/asm-arm/arch-arm1136/omap2420.h" redefines > GP_DEVICE; I'll comment out the second (new) definition for now, but > I'm pretty sure that this is wrong. > > Please submit a patch. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de > Physician: One upon whom we set our hopes when ill and our dogs when > well. - Ambrose Bierce

2 1

RE: [U-Boot-Users] [PATCH] - OMAP242x fix for GP device booting.
by Woodruff, Richard 06 Oct '05

06 Oct '05

Sorry for the top reply. Mailed to quickly. Regards, Richard W.

1 0

[U-Boot-Users] Burst I/O on PPC440GP
by Gregg Nemas 06 Oct '05

06 Oct '05

I am trying to perform I/O with a device attached to the external peripheral bus on a PPC440GP embedded processor. I am able to address the device and read and write to it, but I am only able to do non-burst I/O. Do I need to do something special to enable burst transactions? I've programmed the EBC0_B5CR and EBC0_B5AP device control registers appropriately to enable burst mode, but the transactions are still single I/O. I've been testing this by using the u-boot mw.l command. Do I need to use PPC-specific instructions to perform burst I/O, or should an ordinary programmed I/O (using 32-bit write operations) be automatically queued up and converted to burst transactions? The TLB I've added for the I/O region has the caching inhibit (I) and guarded (G) bits set. Does caching or speculative access need to be enabled to allow bursting? Even if I added a TLB entry, it wouldn't do me any good in Linux, since it manages TLBs itself. So how would I do this from a Linux kernel driver? Thanks. Gregg

3 3

[U-Boot-Users] [PATCH] - OMAP242x fix for GP device booting.
by Woodruff, Richard 06 Oct '05

06 Oct '05

Hello, This patch fixes booting on OMAP242x GP devices, and it unlocks a GP SRAM suitable for DSS subsystem access. One other minor change is to the DDR's DLL count value when used in unlock mode. This change allows standard low speed operation for 100MHz DDR's. Regards, Richard W.

2 2

[U-Boot-Users] [PATCH] driver for SMSC lan911x ethernet chips
by Tim Braun 06 Oct '05

06 Oct '05

Here's a patch to u-boot 1.1.3 which provides a driver (CONFIG_NET_MULTI style) for the SMSC 911x chips. It's based on minimal changes to the SMSC simple reference driver for linux. My u-boot development is done using a uclibc little-endian MIPS tool chain under cygwin, so there are a few tweaks in the patch file for that. I believe the driver itself is target processor / toolchain independent. CHANGELOG entry : * Patch by Tim Braun, 05/10/06: Add support for SMSC LAN911x ethernet devices. Define CONFIG_LAN911x_BASE and CONFIG_DRIVER_LAN911x to use it. Tim Braun, Sr. Des. Eng. LibreStream Technologies 200-55 Rothwell Rd. Winnipeg R3P 2M5

1 0

Re: [U-Boot-Users] [PATCH] AMD/Spansion write buffer support, splitted
by Wolfgang Denk 06 Oct '05

06 Oct '05

Dear Alex, in message <1128604461.4345232d18143@webmail.televes.com:443> you wrote: > > > Are these two patches in alternative? Or additional? Or just for > > disussion? Or what? > > So, Should I say alternative?. Maybe the second is most a RFC. I understand that I should dump the first and apply the second one? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "If you want to eat hippopatomus, you've got to pay the freight." - attributed to an IBM guy, about why IBM software uses so much memory

2 1

Re: [U-Boot-Users] [PATCH] AMD/Spansion write buffer support, splitted
by Wolfgang Denk 06 Oct '05

06 Oct '05

Dear Alex, in message <1125386352.431408702216a@webmail.televes.com:443> you wrote: > > This patch: > - Adds flash_write_cfibuffer support for AMD/Spansion Flashes. > > This was splitted from previous patch. I am confused. I have two messages from you (sent from different addresses, but both on Tue, 30 Aug 2005, with two different patches: > Signed-off-by: Thomas Schaefer <thomas.schaefer(a)kontron.com> > Signed-off-by: Alexandre Bastos <alebas(a)televes.com> > > CHANGELOG: > * Add support for AMD/Spansion Flashes in flash_write_cfibuffer > Patch by Alex Bastos and Thomas Schaefer, 2005-08-29 ... > Content-Type: text/x-patch; name="20050830_cfi_flash_A.diff" and [no CHANGELOG entry] ... > It may be enough shifting the address each time it is needed > (in fact, only two times). > >Suggestions? ... > Content-Type: text/x-patch; name="20050830_cfi_flash_B.diff" Are these two patches in alternative? Or additional? Or just for disussion? Or what? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de I paid too much for it, but its worth it.

2 1

[U-Boot-Users] [PATCH] Make target for all ARM supplied and supported - patch 006
by Peter Pearse 06 Oct '05

06 Oct '05

The attached patch provides a make target for all ARM supplied and supported development boards. I hope the approach adopted here is more acceptable than my previous attempt of 29 Sept 2005. It also ensures that all boards use the preferred mechanism for initial setup. I have modified the other boards using arm cpus sx1 ns9750dev omap1510inn omap1610inn omap2420h4 omap5912osk omap730p2 to use the same mechanism. None of the maintainers have objected and it is "only" a matter of changing the function name, file name & Makefile entry for each. Patch against GITHead updated 6th Oct 2005. Tested with MAKEALL arm. CHANGELOG: Patch 006 from Peter Pearse <peter.pearse(a)arm.com> 6th Oct 2005 Provide make target for all ARM supplied & supported development boards Ensure all boards use lowlevel_init(), rather than platformsetup(). Regards Peter.pearse

1 0

[U-Boot-Users] " Problem in copying files into /mnt/jffs2 directory "
by nreddy＠netenrich.com 06 Oct '05

06 Oct '05

Hi All, I am working on PPC405ep (walnut board) board which has 4MB AMD flash and working fine . Recently we have increased FLASH size to 8MB and modified Flash drivers accordingly. I have taken some help from uboot users. Thanks for giving such kind of invaluable help. Now the system is up and running well, but i get into some other problem like when copying files to /mnt/jffs2 directory it is taking so much extra time to copy files. But when i was using 4MB flash it was taking 1/4 of this time. Can some one throw a lite on this. Thanks & Regards, --Nagi

2 1