April 2004 - U-Boot

[U-Boot-Users] PATCH: PCMCIA and PXA250
by Leon KUKOVEC 19 Apr '04

19 Apr '04

Hi Wolfgang, I have removed the Linux system header files and modified only include/linux/io.h with #ifdef for PXA. Let me know if you need anything else, PS: hopefully not :-) -- Best Regards, Leon.

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[U-Boot-Users] Updated JSE board support patch
by Stephen Williams 19 Apr '04

19 Apr '04

It wasn't clear, but I believe the JSE board patch was rejected. So I remade it here, with updates to address the complaints. And for the record, I thought I would have send a Changelog entry with the last patch attempt. This is relative CVS as of 5:00pm PDT. Changelog entry * Patch by Stephen Williams, 15 April 2004 - Add board support and config files for Picture Elements JSE board - Add Stephen Williams to MAINTAINERS file for the JSE board. Really, I'm *trying* to get this right. -- Steve Williams "The woods are lovely, dark and deep. steve at XXXXXXXXXX But I have promises to keep, http://www.XXXXXXXXXX and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep."

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[U-Boot-Users] mpc8245 changed from u-boot-1.0.0 to uboot-1.0.2
by Matthew S. McClintock 19 Apr '04

19 Apr '04

Hi all, I've run into a problem on our board with the latest u-boot-1.0.2. Prior to this problem u-boot-1.0.0 worked flawlessly. So I am assuming the problem is from a change between those two versions. The problem is pretty simple, when u-boot is copying itself from flash to ram it does not get copied correctly. If I step through the copying of u-boot from flash to ram it copies fine, however if I let it copy at full speed it does not get copied correctly. It seems like a memory timing issue. But nothing has changed in cpu/mpc824x/cpu_init.c. I've briefly looked through everything and I have not discovered any obvious changes that could be causing this problem. So I was hoping someone has seen something similar recently with their mpc824x boards? Or if anyone else has any ideas about something that might have changed? Thanks, Matthew -- Matthew S. McClintock <mattsm(a)arlut.utexas.edu>

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[U-Boot-Users] U-Boot-1.1.0 released
by Wolfgang Denk 19 Apr '04

19 Apr '04

Hello everybody, U-Boot version 1.1.0 has been released. ====================================================================== Major new features in U-Boot 1.1.0: ====================================================================== * New processors: Coldfire, IBM 440GX, NET+50, NEC VR4131, NIOS, S3C44B0 * New boards: ARM: B2, Integrator AP, Integrator CP, NS9750, OMAP1610 Innovator, PB926EJ-S, SX1, XM250 NET+50: ModNET50 NIOS: ADNP/ESC1, DK-1S10, DK-1C20 PPC: CSB272, eXalion, KUP4X, ML300, Ocotea, PM520, PM828 MIPS: TB0229 (VR4131) * New features: - Reiserfs support - Gigabit Ethernet support for 440GX - USB Console support - PS/2 keyboard support - IDE and USB support for MPC5200 - IDE LBA48 support - NFS boot support - "itest" command - variable CPU clock on MPC859/866 family systems And of course lots of other extensions and fixes. Special thanks to everybody who contributed code, fixes, comments or critique and thius helped to make U-Boot a great project. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de I'm a programmer: I don't buy software, I write it. -- Tom Christiansen

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[U-Boot-Users] TFTP boot in u-boot
by Kruthi 19 Apr '04

19 Apr '04

Hi, I am trying to do some porting for the blackfin bf533 processor. Currently i am working with tftp boot. I am able to transfer a file from the host to the target. Now i need to boot the linux image on the target. I am just taking the bf533 2.4 kernel available in the blackfin site and i want to boot this via tftp. i just say tftpboot 1000 linux.dxe. (Actually an elf header gets added to the contents of around 94 bytes. So i even tried loading the linux.dxe to (1000 - 94), i have compared the objdump with the VDSP contents. Its just 1to1. when i say go 1000, it simply hangs. When i try to stop VDSP and load the PC with 1000 and say go also it hangs. Do i need to do something else? I also tried by creating uImage as mentioned under README. Is it really required? Pls let me know how can i boot this linux image from my bootloader? regards kruthi

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[U-Boot-Users] [patch] ocotea - Fix hang when both DIMM slots are populated
by Jarrett Redd 18 Apr '04

18 Apr '04

This patch was given to me by Travis Sawyer and tested by me. It simply adds an additional TLB entry for mapping the second DIMM slot. -Jarrett Redd __________________________________ Do you Yahoo!? Yahoo! Small Business $15K Web Design Giveaway http://promotions.yahoo.com/design_giveaway/

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[U-Boot-Users] Patch to support RPC/STx 8560
by Dan Malek 18 Apr '04

18 Apr '04

Hi Wolfgang. Here is a patch that adds support for the RPC Electronics/STx GP3 8560 board. Thanks. -- Dan

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[U-Boot-Users] Re: PATCH: bi_iic_fast[] initialization
by Wolfgang Denk 18 Apr '04

18 Apr '04

Dear Tolunay, in message <14824.216.110.51.8.1079378410.squirrel(a)www.orkun.us> you wrote: > > * Allow bi_iic_fast[] to be initialized via env. variable "i2cfast" I think you should rework this patch. At the moment, you call getenv() in board_init_f() - but board_init_f() is still running from flash, which means that we don't have a full C runtime environment (uninitialized BSS, no writable data, limited stack space) so the use of getenv() is not allowd in that function. You may use getenv_r() instead. Please send a fix. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de The most difficult thing in the world is to know how to do a thing and to watch someone else doing it wrong, without commenting. -- T.H. White

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[U-Boot-Users] [patch] SDRAM module auto detection for Debris board
by Sangmoon Kim 18 Apr '04

18 Apr '04

Hi, This patch adds SDRAM module auto detection for Debris board, and move debris_config to a proper position in Makefile. It does the fallowing 1. update CHANGELOG 2. update Makefile to move debris_config to a proper position(74xx_7xx -> 824x). 3. update board/etin/debris/debris.c to add SDRAM module auto detection. 4. update include/configs/debris.h to support 512MB SDRAM module Regards, Sangmoon Kim

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[U-Boot-Users] [PATCH] MPC826x PCI fixes
by Rune Torgersen 18 Apr '04

18 Apr '04

This patch fixes some problems with PCI on the 8266 CHANGELOG - Rune Torgersen Fixed some PCI problems on the MPC8266ADS board Fixed the location of some PCI entries in the immap structure Rune Torgersen System Developer Innovative Systems LLC 1000 Innovative Drive Mitchell, SD 57301 Ph: 605-995-6120 www.innovsys.com

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[U-Boot-Users] Need help booting linux on 8265 eval board
by 18 Apr '04

18 Apr '04

Hi, I have problem booting linux on 8265 eval board. when I boot the linux kernel, the board be dead. the registers look like to be some default values(use powertap pro). I try u-boot1.1, ppcboot1.1.5; linux kernel 2.4.4 2.4.18 2.4.20. (1)about kernel vim Makefile, arch=ppc CROSS_COMPILE=ppc_82xx vim arch/ppc/platforms/ads826x.h, IMAP_ADDR=0x04700000 BCSR=0x04500000 then make mrproper/make ads826x_config/make oldconfig/make dep/make pImage (bd info struct is quite same between uboot and linux) Is there anything I had ignored? (2)let's see!(I add some "printf" to display values, "console=ttyS0,9600" is added) => bootm ffa00000 ffc00000 ## Booting image at ffa00000 ... Image Name: Linux-2.4.20-pre7ncsd1 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 634729 Bytes = 619 kB = 0 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Current stack ends at 0x03F7FC48 => set upper limit to 0x00800000 ## cmdline at 0x007FFF00 ... 0x007FFF23 memstart = 0x00000000 memsize = 0x04000000 flashstart = 0xFF800000 flashsize = 0x00800000 flashoffset = 0x00000000 sramstart = 0x00000000 sramsize = 0x00000000 immr_base = 0x04700000 bootflags = 0x00000001 vco = 266.666 MHz sccfreq = 66.666 MHz brgfreq = 16.666 MHz intfreq = 166.666 MHz cpmfreq = 133.333 MHz busfreq = 33.333 MHz ethaddr = 00:10:EC:00:30:8C IP addr = 8.6.0.1 baudrate = 9600 bps ## Loading RAMDisk Image at ffc00000 ... Image Name: Simple Ramdisk-Image Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size: 567988 Bytes = 554 kB = 0 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## initrd at 0xFFC00040 ... 0xFFC8AAF3 (len=567988=0x8AAB4) Loading Ramdisk to 03ef4000, end 03f7eab4 ... OK ## Transferring control to Linux (at address 00000000) ... then the board is dead and the LED(FCC link) coruscate . (I have modified clock calculations for this board. it's the reason?) any ideas? thanks a lot! -- liu liutomorrow(a)hotmail.com _________________________________________________________________ 免费下载 MSN Explorer: http://explorer.msn.com/lccn/

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[U-Boot-Users] Re: help :the problems about creating jffs2
by Wolfgang Denk 18 Apr '04

18 Apr '04

In message <BAY9-F5xRVVfdY6hlHK0005a0ad(a)hotmail.com> you wrote: > > To: u-boot-users-request(a)lists.sourceforge.net Please NEVER send regular messages to the u-boot-users-request address; please use the u-boot-users address for all regular postings. > > > help:The following is a detailed description of the problems. > I modified some parameters of the drivers/mtd/maps/rpxlite.c This is NOT a U-Boot file. > and my mainboard the volumn of flash is :16M; but after compiling the > kernel, which can't run ?the wrong message is following: > ## Transferring control to Linux (at address 00000000) ... This is NOT a U-Boot problem. > Kernel command line: console=ttyS0,9600 root=/dev/nfs rw > nfsroot=172.16.115.2:/workspace/myfilesystem/target > ip=172.16.115.7:172.16.115.2:172.16.115.254:255.255.255.0::eth0:off > panic=1 ... > Kernel panic: Failed to create the TCP control socket. > <0>Rebooting in 1 seconds.. Looks like your kernel is misconfigured (no support for IP auto-configuration and/or root filesystem over NFS?). But this has nothing to do with U-Boot. > another question is : > static struct mtd_partition partition_info[]={ > { name: "UBOOT", > offset: 0, > size: BOOT_PARTITION_SIZE_KiB*1024 }, > { name: "JFFS2", > offset: BOOT_PARTITION_SIZE_KiB*1024, > size: (APP_PARTITION_SIZE_KiB)*1024 }, > { name: "KERNEL", > offset: > (BOOT_PARTITION_SIZE_KiB+APP_PARTITION_SIZE_KiB)*1024 } > }; > I plan to modify like this ,which is ok?static struct mtd_partition > fs_partition_info[]={} > this struct is needed? Yes, it is needed if you use static partition map. But this has NOTHING to do with U-Boot. Please don't post questions that are off-topic. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de The inappropriate cannot be beautiful. - Frank Lloyd Wright _The Future of Architecture_ (1953)

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[U-Boot-Users] [PATCH] LBA48 fixes
by Rune Torgersen 18 Apr '04

18 Apr '04

* Patch by Rune Torgersen, 16 Apr 2004: LBA48 fixes: Fixes references to variables dev_desc->lba48support (renamed to dev_desc->lba48) and dev_desc->lba48 (deleted, uses dev_desc->lba instead) Fixes typewarning on (*blockread) function in block_dev_desc when CFG_64BIT_LBA is set Rune Torgersen System Developer Innovative Systems LLC 1000 Innovative Drive Mitchell, SD 57301 Ph: 605-995-6120 www.innovsys.com

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[U-Boot-Users] [patch #6/6] Trivial fixes
by Pantelis Antoniou 18 Apr '04

18 Apr '04

Wolfgang hi. The following patch fixes a trivial warning and add to the driver makefile a forgotten file. Regards Pantelis diff -ruNb u-boot-original/common/console.c u-boot-work/common/console.c --- u-boot-original/common/console.c 2004-03-24 00:14:12.000000000 +0200 +++ u-boot-work/common/console.c 2004-04-16 18:38:02.508688648 +0300 @@ -412,6 +412,9 @@ DECLARE_GLOBAL_DATA_PTR; char *stdinname, *stdoutname, *stderrname; device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL; +#ifdef CFG_CONSOLE_ENV_OVERWRITE + int i; +#endif /* set default handlers at first */ gd->jt[XF_getc] = serial_getc; diff -ruNb u-boot-original/drivers/Makefile u-boot-work/drivers/Makefile --- u-boot-original/drivers/Makefile 2004-04-16 00:16:42.000000000 +0300 +++ u-boot-work/drivers/Makefile 2004-04-16 18:38:02.556681352 +0300 @@ -43,7 +43,7 @@ smc91111.o smiLynxEM.o status_led.o sym53c8xx.o \ ti_pci1410a.o tigon3.o w83c553f.o omap1510_i2c.o \ usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \ - videomodes.o + videomodes.o sed156x.o all: $(LIB) common/console.c | 3 +++ drivers/Makefile | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-)

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[U-Boot-Users] [patch #5/6] Various network related fixes.
by Pantelis Antoniou 18 Apr '04

18 Apr '04

Wolfgang hi. The following patch fixes (I hope) the ARM compilation problem and implements the "once" functionality for the netretry variable. Regards Pantelis diff -ruNb u-boot-original/README u-boot-work/README --- u-boot-original/README 2004-04-16 02:14:49.000000000 +0300 +++ u-boot-work/README 2004-04-16 19:28:29.278549688 +0300 @@ -2244,6 +2244,9 @@ netretry - When set to "no" each network operation will either succeed or fail without retrying. + When set to "once" the network operation will + fail when all the available network interfaces + are tried once without success. Useful on scripts which control the retry operation themselves. diff -ruNb u-boot-original/common/cmd_net.c u-boot-work/common/cmd_net.c --- u-boot-original/common/cmd_net.c 2004-04-16 00:48:48.000000000 +0300 +++ u-boot-work/common/cmd_net.c 2004-04-16 18:38:02.505689104 +0300 @@ -139,16 +139,6 @@ if (NetOurNISDomain[0]) setenv("domain", NetOurNISDomain); - if (ntohs(NetOurVLAN) != (ushort)-1) { - VLAN_to_string(NetOurVLAN, tmp); - setenv("vlan", tmp); - } - - if (ntohs(NetOurNativeVLAN) != (ushort)-1) { - VLAN_to_string(NetOurNativeVLAN, tmp); - setenv("vlan", tmp); - } - } static int netboot_common (int proto, cmd_tbl_t *cmdtp, int argc, char *argv[]) diff -ruNb u-boot-original/net/net.c u-boot-work/net/net.c --- u-boot-original/net/net.c 2004-04-16 00:48:55.000000000 +0300 +++ u-boot-work/net/net.c 2004-04-16 18:38:02.690660984 +0300 @@ -132,8 +132,10 @@ static int NetDevExists = 0; /* At least one device configured */ #endif -ushort NetOurVLAN = ntohs(-1); /* default is without VLAN */ -ushort NetOurNativeVLAN = htons(-1); /* dido */ +/* XXX in both little & big endian machines -1 == ntohs(-1) */ +/* XXX let's hope nobody ports u-boot to a PDP-11 :-) */ +ushort NetOurVLAN = -1; /* default is without VLAN */ +ushort NetOurNativeVLAN = -1; /* dido */ char BootFile[128]; /* Boot File name */ @@ -523,9 +525,15 @@ NetStartAgain(void) { DECLARE_GLOBAL_DATA_PTR; - char *s; + char *nretry; + int noretry = 0, once = 0; - if ((s = getenv("netretry")) != NULL && *s == 'n') { + nretry = getenv("netretry"); + if (nretry != NULL) { + noretry = *nretry == 'n'; + once = *nretry == 'o'; + } + if (noretry) { eth_halt(); NetState = NETLOOP_FAIL; return; @@ -541,7 +549,7 @@ if (NetRestartWrap) { NetRestartWrap = 0; - if (NetDevExists) + if (NetDevExists && !once) { NetSetTimeout(10 * CFG_HZ, startAgainTimeout); NetSetHandler(startAgainHandler); README | 3 +++ common/cmd_net.c | 10 ---------- net/net.c | 18 +++++++++++++----- 3 files changed, 16 insertions(+), 15 deletions(-)

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[U-Boot-Users] [patch #3/6] FEC fix for 8xx processors.
by Pantelis Antoniou 18 Apr '04

18 Apr '04

Wolfgang hi. The following patch fixes the compilation problems noticed earlier for any board that did dynamic allocation of dpram such as hermes. Please note that these boards leak dpram and something more radical must be done to fix them. It also fixes the problems with the crashes of linux because of packets received early by properly shutting down the FEC. Regards Pantelis diff -ruNb u-boot-original/README u-boot-work/README --- u-boot-original/README 2004-04-16 02:14:49.000000000 +0300 +++ u-boot-work/README 2004-04-16 19:28:29.278549688 +0300 @@ -1943,6 +1943,28 @@ CFG_POCMR2_MASK_ATTRIB: (MPC826x only) Overrides the default PCI memory map in cpu/mpc8260/pci.c if set. +- CONFIG_ETHER_ON_FEC[12] + Define to enable FEC[12] on a 8xx series processor. + +- CONFIG_FEC[12]_PHY + Define to the hardcoded phy address which corresponds + to the given FEC. + + i.e. + #define CONFIG_FEC1_PHY 4 + means that the phy with address 4 is connected to FEC1 + + When set to -1, means to probe for first available. + +- CONFIG_FEC[12]_PHY_NORXERR + The PHY does not have a RXERR line (RMII only). + (so program the FEC to ignore it). + +- CONFIG_RMII + Enable RMII mode for all FECs. + Note that this is a global option, we can't + have one FEC in standard MII mode and another in RMII mode. + Building the Software: ====================== diff -ruNb u-boot-original/cpu/mpc8xx/fec.c u-boot-work/cpu/mpc8xx/fec.c --- u-boot-original/cpu/mpc8xx/fec.c 2004-04-16 00:31:56.000000000 +0300 +++ u-boot-work/cpu/mpc8xx/fec.c 2004-04-16 19:18:56.396640976 +0300 @@ -60,22 +60,22 @@ { int ether_index; int fecp_offset; - int bd_offset; int phy_addr; int actual_phy_addr; + int initialized; } ether_fcc_info[] = { #if defined(CONFIG_ETHER_ON_FEC1) { 0, offsetof(immap_t, im_cpm.cp_fec1), - CPM_FEC_BASE, #if defined(CONFIG_FEC1_PHY) CONFIG_FEC1_PHY, #else -1, /* discover */ #endif -1, + 0, }, #endif @@ -83,13 +83,13 @@ { 1, offsetof(immap_t, im_cpm.cp_fec2), - CPM_FEC_BASE + 0x50, #if defined(CONFIG_FEC2_PHY) CONFIG_FEC2_PHY, #else -1, #endif -1, + 0, }, #endif }; @@ -383,6 +383,11 @@ */ fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1; +#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) + /* our PHYs are the limit at 2.5 MHz */ + fecp->fec_mii_speed <<= 1; +#endif + #if defined(CONFIG_DUET) && defined(WANT_MII) /* use MDC for MII */ immr->im_ioport.iop_pdpar |= 0x0080; @@ -695,6 +700,14 @@ efis->actual_phy_addr = efis->phy_addr; } #if defined(CONFIG_MII) && defined(CONFIG_RMII) + + /* the MII interface is connected to FEC1 + so for the miiphy_xxx function to work we must + call mii_init since fec_halt messes the thing up */ + + if (efis->ether_index != 0) + mii_init(); + /* * adapt the RMII speed to the speed of the phy */ @@ -719,25 +732,43 @@ /* And last, try to fill Rx Buffer Descriptors */ fecp->fec_r_des_active = 0x01000000; /* Descriptor polling active */ + efis->initialized = 1; + return 1; } static void fec_halt(struct eth_device* dev) { -#if 0 - volatile immap_t *immr = (immap_t *)CFG_IMMR; - immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); -#endif -} + struct ether_fcc_info_s *efis = dev->priv; + volatile fec_t *fecp = (volatile fec_t *)(CFG_IMMR + efis->fecp_offset); + int i; -#if 0 -void restart(void) -{ - volatile immap_t *immr = (immap_t *)CFG_IMMR; - immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); + /* avoid halt if initialized; mii gets stuck otherwise */ + if (!efis->initialized) + return; + + /* Whack a reset. + * A delay is required between a reset of the FEC block and + * initialization of other FEC registers because the reset takes + * some time to complete. If you don't delay, subsequent writes + * to FEC registers might get killed by the reset routine which is + * still in progress. + */ + + fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET; + for (i = 0; + (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY); + ++i) { + udelay (1); + } + if (i == FEC_RESET_DELAY) { + printf ("FEC_RESET_DELAY timeout\n"); + return; + } + + efis->initialized = 0; } -#endif #if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) @@ -781,14 +812,20 @@ { uint mii_reply; volatile fec_t *ep; + int cnt; ep = &(((immap_t *)CFG_IMMR)->im_cpm.cp_fec); ep->fec_mii_data = mii_cmd; /* command to phy */ /* wait for mii complete */ - while (!(ep->fec_ievent & FEC_ENET_MII)) - ; /* spin until done */ + cnt = 0; + while (!(ep->fec_ievent & FEC_ENET_MII)) { + if (++cnt > 1000) { + printf("mii_send STUCK!\n"); + break; + } + } mii_reply = ep->fec_mii_data; /* result from phy */ ep->fec_ievent = FEC_ENET_MII; /* clear MII complete */ #if 0 @@ -870,8 +907,6 @@ #if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) && !defined(CONFIG_BITBANGMII) -static int mii_init_done = 0; - /**************************************************************************** * mii_init -- Initialize the MII for MII command without ethernet * This function is a subset of eth_init @@ -883,10 +918,6 @@ volatile fec_t *fecp = &(immr->im_cpm.cp_fec); int i, j; - if (mii_init_done != 0) { - return; - } - for (j = 0; j < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); j++) { /* Whack a reset. @@ -924,8 +955,6 @@ */ fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN; } - - mii_init_done = 1; } /***************************************************************************** README | 22 +++++++++++++++ cpu/mpc8xx/fec.c | 77 +++++++++++++++++++++++++++++++++++++------------------ 2 files changed, 75 insertions(+), 24 deletions(-)

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[U-Boot-Users] [patch #1/6] Intracom board update
by Pantelis Antoniou 18 Apr '04

18 Apr '04

Hi Wolfgang. The following patch adds support for a new version of an Intracom board and fixes various other things on others. Regards Pantelis diff -ruNb u-boot-original/Makefile u-boot-work/Makefile --- u-boot-original/Makefile 2004-04-16 02:23:39.000000000 +0300 +++ u-boot-work/Makefile 2004-04-16 18:38:02.222732120 +0300 @@ -401,8 +401,18 @@ } @./mkconfig -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia +xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1)) + +NETPHONE_V2_config \ NETPHONE_config: unconfig - @./mkconfig $(@:_config=) ppc mpc8xx netphone + @ >include/config.h + @[ -z "$(findstring NETPHONE_config,$@)" ] || \ + { echo "#define CONFIG_NETPHONE_VERSION 1" >>include/config.h ; \ + } + @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \ + { echo "#define CONFIG_NETPHONE_VERSION 2" >>include/config.h ; \ + } + @./mkconfig -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone xtract_NETTA = $(subst _ISDN,,$(subst _config,,$1)) diff -ruNb u-boot-original/board/netphone/flash.c u-boot-work/board/netphone/flash.c --- u-boot-original/board/netphone/flash.c 2004-04-15 21:22:42.000000000 +0300 +++ u-boot-work/board/netphone/flash.c 2004-04-16 18:38:02.448697768 +0300 @@ -41,6 +41,9 @@ volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size; +#if CONFIG_NETPHONE_VERSION == 2 + unsigned long size1; +#endif int i; /* Init: no FLASHes known */ @@ -82,6 +85,25 @@ flash_info[0].size = size; +#if CONFIG_NETPHONE_VERSION == 2 + size1 = flash_get_size((vu_long *) FLASH_BASE4_PRELIM, &flash_info[1]); + + if (flash_info[1].flash_id == FLASH_UNKNOWN && size1 > 0) { + printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", size1, size1 << 20); + } + + /* Remap FLASH according to real size */ + memctl->memc_or4 = CFG_OR_TIMING_FLASH | (-size1 & 0xFFFF8000); + memctl->memc_br4 = (CFG_FLASH_BASE4 & BR_BA_MSK) | (memctl->memc_br4 & ~(BR_BA_MSK)); + + /* Re-do sizing to get full correct info */ + size1 = flash_get_size((vu_long *) CFG_FLASH_BASE4, &flash_info[1]); + + flash_get_offsets(CFG_FLASH_BASE4, &flash_info[1]); + + size += size1; +#endif + return (size); } diff -ruNb u-boot-original/board/netphone/netphone.c u-boot-work/board/netphone/netphone.c --- u-boot-original/board/netphone/netphone.c 2004-04-15 21:22:42.000000000 +0300 +++ u-boot-work/board/netphone/netphone.c 2004-04-16 18:38:02.449697616 +0300 @@ -1,5 +1,6 @@ /* * (C) Copyright 2000-2004 + * Pantelis Antoniou, Intracom S.A., panto(a)intracom.gr * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. * * See file CREDITS for list of people who contributed to this @@ -61,7 +62,7 @@ int checkboard(void) { - printf ("Intracom NetPhone\n"); + printf ("Intracom NetPhone V%d\n", CONFIG_NETPHONE_VERSION); return (0); } @@ -105,30 +106,30 @@ #define BS_1110 0x0E000000 #define BS_1111 0x0F000000 -#define A10_AAAA 0x00000000 -#define A10_AAA0 0x00200000 -#define A10_AAA1 0x00300000 -#define A10_000A 0x00800000 -#define A10_0000 0x00A00000 -#define A10_0001 0x00B00000 -#define A10_111A 0x00C00000 -#define A10_1110 0x00E00000 -#define A10_1111 0x00F00000 - -#define RAS_0000 0x00000000 -#define RAS_0001 0x00040000 -#define RAS_1110 0x00080000 -#define RAS_1111 0x000C0000 - -#define CAS_0000 0x00000000 -#define CAS_0001 0x00010000 -#define CAS_1110 0x00020000 -#define CAS_1111 0x00030000 - -#define WE_0000 0x00000000 -#define WE_0001 0x00004000 -#define WE_1110 0x00008000 -#define WE_1111 0x0000C000 +#define GPL0_AAAA 0x00000000 +#define GPL0_AAA0 0x00200000 +#define GPL0_AAA1 0x00300000 +#define GPL0_000A 0x00800000 +#define GPL0_0000 0x00A00000 +#define GPL0_0001 0x00B00000 +#define GPL0_111A 0x00C00000 +#define GPL0_1110 0x00E00000 +#define GPL0_1111 0x00F00000 + +#define GPL1_0000 0x00000000 +#define GPL1_0001 0x00040000 +#define GPL1_1110 0x00080000 +#define GPL1_1111 0x000C0000 + +#define GPL2_0000 0x00000000 +#define GPL2_0001 0x00010000 +#define GPL2_1110 0x00020000 +#define GPL2_1111 0x00030000 + +#define GPL3_0000 0x00000000 +#define GPL3_0001 0x00004000 +#define GPL3_1110 0x00008000 +#define GPL3_1111 0x0000C000 #define GPL4_0000 0x00000000 #define GPL4_0001 0x00001000 @@ -155,6 +156,31 @@ #define LAST 0x00000001 +#define A10_AAAA GPL0_AAAA +#define A10_AAA0 GPL0_AAA0 +#define A10_AAA1 GPL0_AAA1 +#define A10_000A GPL0_000A +#define A10_0000 GPL0_0000 +#define A10_0001 GPL0_0001 +#define A10_111A GPL0_111A +#define A10_1110 GPL0_1110 +#define A10_1111 GPL0_1111 + +#define RAS_0000 GPL1_0000 +#define RAS_0001 GPL1_0001 +#define RAS_1110 GPL1_1110 +#define RAS_1111 GPL1_1111 + +#define CAS_0000 GPL2_0000 +#define CAS_0001 GPL2_0001 +#define CAS_1110 GPL2_1110 +#define CAS_1111 GPL2_1111 + +#define WE_0000 GPL3_0000 +#define WE_0001 GPL3_0001 +#define WE_1110 GPL3_1110 +#define WE_1111 GPL3_1111 + /* #define CAS_LATENCY 3 */ #define CAS_LATENCY 2 @@ -270,6 +296,55 @@ CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST, }; +#if CONFIG_NETPHONE_VERSION == 2 +static const uint nandcs_table[0x40] = { + /* RSS */ + CS_1000 | GPL4_1111 | GPL5_1111 | UTA, + CS_0000 | GPL4_1110 | GPL5_1111 | UTA, + CS_0000 | GPL4_0000 | GPL5_1111 | UTA, + CS_0000 | GPL4_0000 | GPL5_1111 | UTA, + CS_0000 | GPL4_0000 | GPL5_1111, + CS_0000 | GPL4_0001 | GPL5_1111 | UTA, + CS_0000 | GPL4_1111 | GPL5_1111 | UTA, + CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */ + + /* RBS */ + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* WSS */ + CS_1000 | GPL4_1111 | GPL5_1110 | UTA, + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, + CS_0000 | GPL4_1111 | GPL5_0000 | UTA, + CS_0000 | GPL4_1111 | GPL5_0001 | UTA, + CS_0000 | GPL4_1111 | GPL5_1111 | UTA, + CS_0000 | GPL4_1111 | GPL5_1111, + CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, + + /* WBS */ + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* UPT */ + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* EXC */ + CS_0001 | LAST, + _NOT_USED_, + + /* REG */ + CS_1110 , + CS_0001 | LAST, +}; +#endif + /* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */ /* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */ #define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU) @@ -329,7 +404,7 @@ volatile memctl8xx_t *memctl = &immap->im_memctl; long int size; - upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint)); + upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0])); /* * Preliminary prescaler for refresh @@ -384,17 +459,6 @@ size = get_ram_size((long *)0, SDRAM_MAX_SIZE); -#if 0 - printf("check 0\n"); - check_ram(( 0 << 20), (2 << 20)); - printf("check 16\n"); - check_ram((16 << 20), (2 << 20)); - printf("check 32\n"); - check_ram((32 << 20), (2 << 20)); - printf("check 48\n"); - check_ram((48 << 20), (2 << 20)); -#endif - if (size == 0) { printf("SIZE is zero: LOOP on 0\n"); for (;;) { @@ -447,19 +511,30 @@ #define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30)) #define PB_SP_DIRVAL 0 +#if CONFIG_NETPHONE_VERSION == 1 #define PC_GP_INMASK _BW(12) #define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15)) +#elif CONFIG_NETPHONE_VERSION == 2 +#define PC_GP_INMASK (_BW(13) | _BW(15)) +#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12)) +#endif #define PC_SP_MASK 0 #define PC_SOVAL 0 #define PC_INTVAL 0 #define PC_GP_OUTVAL (_BW(10) | _BW(11)) #define PC_SP_DIRVAL 0 +#if CONFIG_NETPHONE_VERSION == 1 #define PE_GP_INMASK _B(31) #define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30)) +#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28)) +#elif CONFIG_NETPHONE_VERSION == 2 +#define PE_GP_INMASK _BR(28, 31) +#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27)) +#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27)) +#endif #define PE_SP_MASK 0 #define PE_ODR_VAL 0 -#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28)) #define PE_SP_DIRVAL 0 int board_early_init_f(void) @@ -470,17 +545,23 @@ volatile memctl8xx_t *memctl = &immap->im_memctl; /* NAND chip select */ +#if CONFIG_NETPHONE_VERSION == 1 memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX); memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); +#elif CONFIG_NETPHONE_VERSION == 2 + upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0])); + memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS); + memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA); + memctl->memc_mamr = 0; /* all clear */ +#endif /* DSP chip select */ memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX); memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V); - /* External register chip select */ - memctl->memc_or4 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK); - memctl->memc_br4 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V); - +#if CONFIG_NETPHONE_VERSION == 1 + memctl->memc_br4 &= ~BR_V; +#endif memctl->memc_br5 &= ~BR_V; memctl->memc_br6 &= ~BR_V; memctl->memc_br7 &= ~BR_V; @@ -588,6 +669,13 @@ { int i; +#if CONFIG_NETPHONE_VERSION == 2 + /* assert peripheral reset */ + ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12); + for (i = 0; i < 10; i++) + udelay(1000); + ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12); +#endif reset_phys(); /* check in order to enable the local console */ diff -ruNb u-boot-original/board/netphone/phone_console.c u-boot-work/board/netphone/phone_console.c --- u-boot-original/board/netphone/phone_console.c 2004-04-15 21:22:42.000000000 +0300 +++ u-boot-work/board/netphone/phone_console.c 2004-04-16 18:38:02.449697616 +0300 @@ -62,6 +62,7 @@ #define KP_FORCE_DELAY_HZ (CFG_HZ/2) /* key was force pressed */ #define KP_IDLE_DELAY_HZ (CFG_HZ/2) /* key was released and idle */ +#if CONFIG_NETPHONE_VERSION == 1 #define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) #define KP_SPI_RXD_MASK 0x0008 @@ -70,6 +71,16 @@ #define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat) #define KP_SPI_CLK_MASK 0x0001 +#elif CONFIG_NETPHONE_VERSION == 2 +#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) +#define KP_SPI_RXD_MASK 0x00000008 + +#define KP_SPI_TXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) +#define KP_SPI_TXD_MASK 0x00000004 + +#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat) +#define KP_SPI_CLK_MASK 0x00000002 +#endif #define KP_CS_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat) #define KP_CS_MASK 0x00000010 @@ -975,9 +986,19 @@ val = 0x80 | (row_mask & 0x7F); (void)kp_data_transfer(val); +#if CONFIG_NETPHONE_VERSION == 1 col_mask = kp_data_transfer(val) & 0x0F; +#elif CONFIG_NETPHONE_VERSION == 2 + col_mask = ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & 0x0f; + /* XXX FUCK FUCK FUCK FUCK FUCK!!!! */ + col_mask = ((col_mask & 0x08) >> 3) | /* BKBR1 */ + ((col_mask & 0x04) << 1) | /* BKBR2 */ + (col_mask & 0x02) | /* BKBR3 */ + ((col_mask & 0x01) << 2); /* BKBR4 */ +#endif /* printf("col_mask(row_mask = 0x%x) -> col_mask = 0x%x\n", row_mask, col_mask); */ + return col_mask; } diff -ruNb u-boot-original/include/configs/NETPHONE.h u-boot-work/include/configs/NETPHONE.h --- u-boot-original/include/configs/NETPHONE.h 2004-04-15 21:22:44.000000000 +0300 +++ u-boot-work/include/configs/NETPHONE.h 2004-04-16 19:00:31.264646576 +0300 @@ -29,6 +29,10 @@ #ifndef __CONFIG_H #define __CONFIG_H +#if !defined(CONFIG_NETPHONE_VERSION) || CONFIG_NETPHONE_VERSION > 2 +#error Unsupported CONFIG_NETPHONE version +#endif + /* * High Level Configuration Options * (easy to change) @@ -46,6 +50,7 @@ /* #define CONFIG_XIN 10000000 */ #define CONFIG_XIN 50000000 #define MPC8XX_HZ 120000000 +/* #define MPC8XX_HZ 66666666 */ #define CONFIG_8xx_GCLK_FREQ MPC8XX_HZ @@ -174,6 +179,11 @@ #endif #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#if CONFIG_NETPHONE_VERSION == 2 +#define CFG_FLASH_BASE4 0x40080000 +#endif + +#define CFG_RESET_ADDRESS 0x80000000 /* * For booting Linux, the board info and command line data @@ -185,7 +195,11 @@ /*----------------------------------------------------------------------- * FLASH organization */ +#if CONFIG_NETPHONE_VERSION == 1 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#elif CONFIG_NETPHONE_VERSION == 2 +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#endif #define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ @@ -302,6 +316,10 @@ #define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \ (0 << PLPRCR_S_SHIFT) | (6 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \ PLPRCR_TEXPS) +#elif MPC8XX_HZ == 66666666 +#define CFG_PLPRCR ((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \ + (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \ + PLPRCR_TEXPS) #else #error unsupported CPU freq for XIN = 50MHz #endif @@ -363,6 +381,16 @@ #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V ) +#if CONFIG_NETPHONE_VERSION == 2 + +#define FLASH_BASE4_PRELIM 0x40080000 /* FLASH bank #1 */ + +#define CFG_OR4_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) +#define CFG_OR4_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) +#define CFG_BR4_PRELIM ((FLASH_BASE4_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V ) + +#endif + /* * BR3 and OR3 (SDRAM) * @@ -454,11 +482,9 @@ #define DSP_SIZE 0x00010000 /* 64K */ #define NAND_SIZE 0x00010000 /* 64K */ -#define ER_SIZE 0x00010000 /* 64K */ #define DSP_BASE 0xF1000000 #define NAND_BASE 0xF1010000 -#define ER_BASE 0xF1020000 /****************************************************************/ @@ -507,11 +533,23 @@ (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ } while(0) +#if CONFIG_NETPHONE_VERSION == 1 #define NAND_WAIT_READY(nand) \ do { \ + int _tries = 0; \ while ((((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ - ; \ + if (++_tries > 100000) \ + break; \ + } while (0) +#elif CONFIG_NETPHONE_VERSION == 2 +#define NAND_WAIT_READY(nand) \ + do { \ + int _tries = 0; \ + while ((((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ + if (++_tries > 100000) \ + break; \ } while (0) +#endif #define WRITE_NAND_COMMAND(d, adr) \ do { \ @@ -533,7 +571,12 @@ /*****************************************************************************/ +#if CONFIG_NETPHONE_VERSION == 1 #define STATUS_LED_BIT 0x00000008 /* bit 28 */ +#elif CONFIG_NETPHONE_VERSION == 2 +#define STATUS_LED_BIT 0x00000080 /* bit 24 */ +#endif + #define STATUS_LED_PERIOD (CFG_HZ / 2) #define STATUS_LED_STATE STATUS_LED_BLINKING @@ -566,6 +609,13 @@ /*********************************************************************************************************** + ---------------------------------------------------------------------------------------------- + + (V1) version 1 of the board + (V2) version 2 of the board + + ---------------------------------------------------------------------------------------------- + Pin definitions: +------+----------------+--------+------------------------------------------------------------ @@ -585,20 +635,64 @@ | PB30 | SPI_CLK | Output | SPI Clock | PC10 | DISPA0 | Output | Display A0 | PC11 | BACKLIGHT | Output | Display backlit - | PC12 | SPI2RXD | Input | 2nd SPI RXD - | PC13 | SPI2TXD | Output | 2nd SPI TXD - | PC15 | SPI2CLK | Output | 2nd SPI CLK + | PC12 | SPI2RXD | Input | (V1) 2nd SPI RXD + | | IO_RESET | Output | (V2) General I/O reset + | PC13 | SPI2TXD | Output | (V1) 2nd SPI TXD (V1) + | | HOOK | Input | (V2) Hook input interrupt + | PC15 | SPI2CLK | Output | (V1) 2nd SPI CLK + | | F_RY_BY | Input | (V2) NAND F_RY_BY | PE17 | F_ALE | Output | NAND F_ALE | PE18 | F_CLE | Output | NAND F_CLE | PE20 | F_CE | Output | NAND F_CE - | PE24 | SPICS_SCOUT | Output | Codec chip select + | PE24 | SPICS_SCOUT | Output | (V1) Codec chip select + | | LED | Output | (V2) LED | PE27 | SPICS_ER | Output | External serial register CS - | PE28 | LEDIO1 | Output | LED - | PE29 | LEDIO2 | Output | LED hook for A (TA2) - | PE30 | LEDIO3 | Output | LED hook for A (TA2) - | PE31 | F_RY_BY | Input | NAND F_RY_BY + | PE28 | LEDIO1 | Output | (V1) LED + | | BKBR1 | Input | (V2) Keyboard input scan + | PE29 | LEDIO2 | Output | (V1) LED hook for A (TA2) + | | BKBR2 | Input | (V2) Keyboard input scan + | PE30 | LEDIO3 | Output | (V1) LED hook for A (TA2) + | | BKBR3 | Input | (V2) Keyboard input scan + | PE31 | F_RY_BY | Input | (V1) NAND F_RY_BY + | | BKBR4 | Input | (V2) Keyboard input scan +------+----------------+--------+--------------------------------------------------- + ---------------------------------------------------------------------------------------------- + + Serial register input: + + +------+----------------+------------------------------------------------------------ + | # | Name | Comment + +------+----------------+------------------------------------------------------------ + | 0 | BKBR1 | (V1) Keyboard input scan + | 1 | BKBR3 | (V1) Keyboard input scan + | 2 | BKBR4 | (V1) Keyboard input scan + | 3 | BKBR2 | (V1) Keyboard input scan + | 4 | HOOK | (V1) Hook switch + | 5 | BT_LINK | (V1) Bluetooth link status + | 6 | HOST_WAKE | (V1) Bluetooth host wake up + | 7 | OK_ETH | (V1) Cisco inline power OK status + +------+----------------+------------------------------------------------------------ + + ---------------------------------------------------------------------------------------------- + + Serial register output: + + +------+----------------+------------------------------------------------------------ + | # | Name | Comment + +------+----------------+------------------------------------------------------------ + | 0 | KEY1 | Keyboard output scan + | 1 | KEY2 | Keyboard output scan + | 2 | KEY3 | Keyboard output scan + | 3 | KEY4 | Keyboard output scan + | 4 | KEY5 | Keyboard output scan + | 5 | KEY6 | Keyboard output scan + | 6 | KEY7 | Keyboard output scan + | 7 | BT_WAKE | Bluetooth wake up + +------+----------------+------------------------------------------------------------ + + ---------------------------------------------------------------------------------------------- + Chip selects: +------+----------------+------------------------------------------------------------ @@ -608,8 +702,11 @@ | CS1 | CS_FLASH | NAND flash | CS2 | CS_DSP | DSP | CS3 | DCS_DRAM | DRAM + | CS4 | CS_FLASH2 | (V2) 2nd flash +------+----------------+------------------------------------------------------------ + ---------------------------------------------------------------------------------------------- + Interrupts: +------+----------------+------------------------------------------------------------ @@ -621,6 +718,8 @@ | IRQ7 | IRQ_MAX | MAX 3100 interrupt +------+----------------+------------------------------------------------------------ + ---------------------------------------------------------------------------------------------- + Interrupts on PCMCIA pins: +------+----------------+------------------------------------------------------------ @@ -630,6 +729,8 @@ | IP_A1| PHY2_LINK | Link status changed for #2 Ethernet interface | IP_A2| RMII1_MDINT | PHY interrupt for #1 | IP_A3| RMII2_MDINT | PHY interrupt for #2 + | IP_A5| HOST_WAKE | (V2) Bluetooth host wake + | IP_A6| OK_ETH | (V2) Cisco inline power OK +------+----------------+------------------------------------------------------------ *************************************************************************************************/ @@ -691,4 +792,11 @@ /*************************************************************************************************/ +#define CONFIG_CRC32_VERIFY 1 + +/*************************************************************************************************/ + +#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1 + +/*************************************************************************************************/ #endif /* __CONFIG_H */ diff -ruNb u-boot-original/include/configs/NETTA.h u-boot-work/include/configs/NETTA.h --- u-boot-original/include/configs/NETTA.h 2004-04-15 21:22:44.000000000 +0300 +++ u-boot-work/include/configs/NETTA.h 2004-04-16 19:00:40.862187528 +0300 @@ -117,6 +117,7 @@ CFG_CMD_MII | \ CFG_CMD_PCMCIA | CFG_CMD_IDE | CFG_CMD_FAT | \ CFG_CMD_DIAG | \ + CFG_CMD_NFS | \ CFG_CMD_CDP \ ) @@ -742,4 +743,12 @@ /*************************************************************************************************/ +#define CONFIG_CRC32_VERIFY 1 + +/*************************************************************************************************/ + +#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE 1 + +/*************************************************************************************************/ + #endif /* __CONFIG_H */ Makefile | 12 ++ board/netphone/flash.c | 22 +++++ board/netphone/netphone.c | 172 ++++++++++++++++++++++++++++++----------- board/netphone/phone_console.c | 21 +++++ include/configs/NETPHONE.h | 130 ++++++++++++++++++++++++++++-- include/configs/NETTA.h | 9 ++ 6 files changed, 312 insertions(+), 54 deletions(-)

2 1

RE: [U-Boot-Users] (no subject)
by Alan J. Luse 16 Apr '04

16 Apr '04

John- Arabella software has done a build of U-Boot for the Motorola MPC885ADS board. I have a working binary from Arabella. I am in the process of building my own adaptation for our hardware; the DUET_ADS_config in the current release version is supposed to build for the MPC885ADS. Alan J. Luse Embedded Systems Engineer Time America, Inc. 51 West Third Street, Suite 310 Tempe, AZ 85281 Voice: (480) 296-0408 Fax: (480) 296-0444 -----Original Message----- From: u-boot-users-admin(a)lists.sourceforge.net [mailto:u-boot-users-admin@lists.sourceforge.net] On Behalf Of Kerl, John Sent: Friday, 16 April 2004 2:30 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] (no subject) Is anyone starting work on 885 support? We have an 885 board coming up very soon, so I will be happy to help out. ------------------------------------------------------- This SF.Net email is sponsored by: IBM Linux Tutorials Free Linux tutorial presented by Daniel Robbins, President and CEO of GenToo technologies. Learn everything from fundamentals to system administration.http://ads.osdn.com/?ad_id70&alloc_id638&op=ick _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

1 0

[U-Boot-Users] (no subject)
by Kerl, John 16 Apr '04

16 Apr '04

Is anyone starting work on 885 support? We have an 885 board coming up very soon, so I will be happy to help out.

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RE: [U-Boot-Users] [PATCH] LBA48 compile problem
by Rune Torgersen 16 Apr '04

16 Apr '04

> > I also got some compiler warnings with CFG_64BIT_LBA enabled. > > For which board is this? Is it listed in the MAKEALL script? > If not - why? It is for a custom board. Havent gotten around to make a patch and submitting it yet. (8266 based) And as far as I know, noone else is using 64 bit LBA48 support yet. (and I can get by just fine witout it also, since my harddrive is only 250GB)

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[U-Boot-Users] [PATCH] Intel Assabet SA-1110 based board port
by George G. Davis 16 Apr '04

16 Apr '04

Greetings, I humbly submit this trivial board port for the Intel Assabet with Neponset expansion module. This is yet another SA-1110 based board which is EOL but still useful to me for Linux development and testing. This patch is based on latest CVS HEAD +/- a few hours. Thanks! -- Regards, George

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[U-Boot-Users] Add support for Picture Elements JSE board
by Stephen Williams 16 Apr '04

16 Apr '04

The attached patch adds to U-Boot support for the Picture Elements JSE board, which is PPC405GPr and a few other specific devices. It also adds me as the maintainer in the MAINTAINERS file. -- Steve Williams "The woods are lovely, dark and deep. steve at XXXXXXXXXX But I have promises to keep, http://www.XXXXXXXXXX and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep."

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RE: [U-Boot-Users] [PATCH] LBA48 compile problem
by Rune Torgersen 16 Apr '04

16 Apr '04

When you reformatted the original LBA48 support, some variables got renamed and mixed. Esp one called lba48support was renamed lba48, and anotherone called lba48 was deleted, and references were not changed. I also got some compiler warnings with CFG_64BIT_LBA enabled. I will resubmit a patch agains 1.1.0, so ignore this one. > -----Original Message----- > From: wd(a)denx.de [mailto:wd@denx.de] > Sent: Thursday, April 15, 2004 17:40 > To: Rune Torgersen > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: [U-Boot-Users] [PATCH] LBA48 compile problem > > > In message > <DCEAAC0833DD314AB0B58112AD99B93B06DAAA(a)ismail.innsys.innovsys > .com> you wrote: > > > > Here is a small patch that fixes LBA48 support so it > compiles cleanly > > Which actual compile problem are you trying to fix? > I don't get any related build errors when running MAKEALL. > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: > wd(a)denx.de The human mind ordinarily operates at only > ten percent of its capacity. The rest is overhead for the > operating system. >

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RE: [U-Boot-Users] [PATCH] LBA48 compile problem
by Rune Torgersen 16 Apr '04

16 Apr '04

It also needs: --- ../u-boot/include/part.h 2004-03-16 19:13:08.000000000 -0600 +++ include/part.h 2004-03-31 15:59:50.000000000 -0600 @@ -22,7 +22,7 @@ */ #ifndef _PART_H #define _PART_H - +#include <ide.h> typedef struct block_dev_desc { int if_type; /* type of the interface */

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[U-Boot-Users] [PATCH] LBA48 compile problem
by Rune Torgersen 16 Apr '04

16 Apr '04

Here is a small patch that fixes LBA48 support so it compiles cleanly CHANGELOG - Rune Torgersen Fixed LBA48 support Rune Torgersen System Developer Innovative Systems LLC 1000 Innovative Drive Mitchell, SD 57301 Ph: 605-995-6120 www.innovsys.com

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