October 2004 - U-Boot

[U-Boot-Users] New NAND code
by Stefan Roese 10 Aug '06

10 Aug '06

Hi! I was just wondering about state of the NAND code. When I remember correctly a pretty big rewrite was done but not commited yet. Is the last patch sent to this list from Pantelis Antoniou on 5th May still the latest version? Best regards, Stefan

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[U-Boot-Users] [PATCH] support for CF/IDE on PCMCIA for PXA25X
by Christian Pell 13 Aug '05

13 Aug '05

Hi, I tried this with some different CFs with FAT file-systems on them. There is a README in the patch itself that goes in documentation directory. Bye, -- Christian Pellegrin <chri(a)ascensit.com>, <c.pellegrin(a)eurotech.it>, <chri(a)infis.univ.ts.it>, <c.pellegrin(a)exadron.com>

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[U-Boot-Users] u-boot 1.1.1 and USB mass storage devices
by Shannon Holland 03 Aug '05

03 Aug '05

Hello, We are using u-boot on a Samsung S3C2410 based board and have USB mostly working using the arm920t USB driver. I say mostly working as some mass storage devices work fine, but most do not. Typically the behavior we see when they don't work is a "usb reset" reports the correct number of devices, a "usb tree" will return the correct device tree but "usb scan" will typically return a lot of CLI:TIMEOUT errors and seemingly never return. Sometimes it is able to find the storage device, but reading from it (it has a FAT16 filesystem) will return similar errors. I'm curious if these are known problems or likely to be something in the way we have (or have not) set up usb? Might anyone have some recommendations as to where to start looking? Thanks for any help! Shannon

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[U-Boot-Users] mkimage for DOS
by Dave Westwood 10 Jun '05

10 Jun '05

long shot really, but does anyone have a working executable mkimage for DOS or a dos window in windows (don't flame me for using windows !!)

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Re: [U-Boot-Users] Support for Samsung 1Giga bit NAND device
by Laurent Mohin 01 Jun '05

01 Jun '05

Andy, U-boot 1.1.0 doesn't provide support for NAND flash with a page size of 2K-byte instead of 512 byte (and you're right, theses devices require special handling). Pantelis Antoniou submitted a patch on 2004-04-30 which seems to manage these new chips, but I don't think it has been added to the latest CVS tree. By the way, Samsung also offer 1 Giga bit devices with a 512 byte page size (K9K1G08UOM - Manufacturer ID : 0xEC, Chip ID: 0x79). Hope this helps, Laurent Andy Hawkins <a.hawkins(a)cabletime.com> Sent by: u-boot-users-admin(a)lists.sourceforge.net 14/06/04 13:40 To: u-boot-users(a)lists.sourceforge.net cc: Subject: [U-Boot-Users] Support for Samsung 1Giga bit NAND device Hi, Can anyone tell me if U-Boot has support for the Samsung 1 Giga Bit NAND devices (Manufacturer ID: 0xec, Chip ID: 0xf1)? I understand these devices have an unusually large block size, that needs special handling. Is this correct? Thanks. Andy ------------------------------------------------------- This SF.Net email is sponsored by the new InstallShield X. >From Windows to Linux, servers to mobile, InstallShield X is the one installation-authoring solution that does it all. Learn more and evaluate today! http://www.installshield.com/Dev2Dev/0504 _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] Re: u-boot error message
by Detlev Zundel 03 Apr '05

03 Apr '05

Hello Bruce, > I used u-boot-1.1.1 to boot linux.My target board is ALTERA DK1C20 and cpu is > nios.I used tools/mkimage to encapsulate a linux kernel image with header > information.But it display some error messages,it like that: > > > > [root@a901 u-boot-20040316cvs]# tools/mkimage -n 'linux kernel' \ > >> -A nios -O linux -T kernel -C none -a 1010000 -e 1010000 \ > >> -d /opt/cdk4nios/src/u-boot-20040316cvs/linux.bin uimage > > > > Invalid CPU Type - valid names are: alpha, arm, x86, ia64, mips, mips64, ppc, > s3 90, sh, sparc, sparc64, m68k > > > > Because my cpu is nios,so my linux kernel can't boot.Can you tell me what can i > do? > > Ps:my name is Bruce Hm, I haven't worked with a NIOS system, but obviously the port forgot to include support in the mkimage tool. cmd_bootm.c tests for those values so that might be your problem. Try the attached patch and maybe some NIOS people on this mailing list can speak up. Cheers Detlev PS: Mail F'up-to set to u-boot-users(a)lists.sourceforge.net -- (define Y (lambda (f) ((lambda (g) (f (lambda (x) ((g g) x)))) (lambda (g) (f (lambda (x) ((g g) x)))))))

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[U-Boot-Users] Missing 440GX SDRAM Controller reset?
by David Adair 03 Apr '05

03 Apr '05

I have this same problem described a few months ago and corrected by adding the SDRAM controller reset present in the PIBS code but missing in rev 1.1.1 of u-boot e.g: mtsdr(sdr_srst, 0x00200000); mtsdr(sdr_srst, 0x00000000); Was this left out on purpose? It seems like if the BDI configuration can cause a hang then a warm-reboot is going to be problematic too?? > Re: problems with BDI2000 / u-boot / Linux on IBM 440GX Ocotea reference board > > The first problem is if I try to run u-boot from flash with a BDI2000 > > connected (i.e. do "reset" and "go" commands), then u-boot starts > > running but hangs in the SDRAM init. Specifically, it hangs waiting > > for the MRS Command Complete status bit to be set. > > IIRC I ran into the same thing, all I needed to do was remove the sdram > configuration from the config for the BDI.

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[U-Boot-Users] PATCH: Removing all these "extern void reset_cpu()"
by Steven Scholz 03 Apr '05

03 Apr '05

Hi there, please consider the patch attached. CHANGELOG: * Patch by Steven Scholz, 25 Oct 2004: - Replace all "extern void reset_cpu()" with one occurence of "void reset_cpu (ulong addr)" in include/common.h -- Steven Scholz Index: cpu/arm720t/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm720t/cpu.c,v retrieving revision 1.6 diff -p -u -r1.6 cpu.c --- cpu/arm720t/cpu.c 1 Aug 2004 22:48:19 -0000 1.6 +++ cpu/arm720t/cpu.c 25 Oct 2004 14:03:13 -0000 @@ -84,8 +84,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); /*NOTREACHED*/ Index: cpu/arm720t/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm720t/interrupts.c,v retrieving revision 1.6 diff -p -u -r1.6 interrupts.c --- cpu/arm720t/interrupts.c 11 Jul 2004 22:19:27 -0000 1.6 +++ cpu/arm720t/interrupts.c 25 Oct 2004 14:03:13 -0000 @@ -31,8 +31,6 @@ #include <asm/proc-armv/ptrace.h> #include <asm/hardware.h> -extern void reset_cpu(ulong addr); - #ifndef CONFIG_NETARM /* we always count down the max. */ #define TIMER_LOAD_VAL 0xffff Index: cpu/arm920t/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm920t/cpu.c,v retrieving revision 1.3 diff -p -u -r1.3 cpu.c --- cpu/arm920t/cpu.c 8 Feb 2004 19:38:43 -0000 1.3 +++ cpu/arm920t/cpu.c 25 Oct 2004 14:03:13 -0000 @@ -124,8 +124,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); /*NOTREACHED*/ Index: cpu/arm920t/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm920t/interrupts.c,v retrieving revision 1.6 diff -p -u -r1.6 interrupts.c --- cpu/arm920t/interrupts.c 1 Aug 2004 22:48:19 -0000 1.6 +++ cpu/arm920t/interrupts.c 25 Oct 2004 14:03:13 -0000 @@ -34,8 +34,6 @@ #include <arm920t.h> #include <asm/proc-armv/ptrace.h> -extern void reset_cpu(ulong addr); - #ifdef CONFIG_USE_IRQ /* enable IRQ interrupts */ void enable_interrupts (void) Index: cpu/arm920t/s3c24x0/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm920t/s3c24x0/interrupts.c,v retrieving revision 1.1 diff -p -u -r1.1 interrupts.c --- cpu/arm920t/s3c24x0/interrupts.c 9 Oct 2004 22:21:30 -0000 1.1 +++ cpu/arm920t/s3c24x0/interrupts.c 25 Oct 2004 14:03:13 -0000 @@ -39,7 +39,6 @@ #include <s3c2410.h> #endif -extern void reset_cpu(ulong addr); int timer_load_val = 0; /* macro to read the 16 bit timer */ Index: cpu/arm925t/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm925t/cpu.c,v retrieving revision 1.3 diff -p -u -r1.3 cpu.c --- cpu/arm925t/cpu.c 8 Feb 2004 19:38:43 -0000 1.3 +++ cpu/arm925t/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -125,8 +125,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); /*NOTREACHED*/ Index: cpu/arm925t/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm925t/interrupts.c,v retrieving revision 1.6 diff -p -u -r1.6 interrupts.c --- cpu/arm925t/interrupts.c 25 Apr 2004 14:37:30 -0000 1.6 +++ cpu/arm925t/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -38,7 +38,6 @@ #include <asm/proc-armv/ptrace.h> -extern void reset_cpu(ulong addr); #define TIMER_LOAD_VAL 0xffffffff /* macro to read the 32 bit timer */ Index: cpu/arm926ejs/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm926ejs/cpu.c,v retrieving revision 1.3 diff -p -u -r1.3 cpu.c --- cpu/arm926ejs/cpu.c 8 Feb 2004 19:38:43 -0000 1.3 +++ cpu/arm926ejs/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -125,8 +125,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); /*NOTREACHED*/ Index: cpu/arm926ejs/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/arm926ejs/interrupts.c,v retrieving revision 1.7 diff -p -u -r1.7 interrupts.c --- cpu/arm926ejs/interrupts.c 23 Mar 2004 21:43:08 -0000 1.7 +++ cpu/arm926ejs/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -40,7 +40,6 @@ #include <asm/proc-armv/ptrace.h> -extern void reset_cpu(ulong addr); #define TIMER_LOAD_VAL 0xffffffff /* macro to read the 32 bit timer */ Index: cpu/at91rm9200/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/at91rm9200/cpu.c,v retrieving revision 1.9 diff -p -u -r1.9 cpu.c --- cpu/at91rm9200/cpu.c 10 Oct 2004 20:23:59 -0000 1.9 +++ cpu/at91rm9200/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -115,8 +115,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag { #ifdef CFG_SOFT_RESET - extern void reset_cpu(ulong addr); - disable_interrupts(); reset_cpu(0); #else Index: cpu/at91rm9200/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/at91rm9200/interrupts.c,v retrieving revision 1.6 diff -p -u -r1.6 interrupts.c --- cpu/at91rm9200/interrupts.c 11 Oct 2004 22:25:50 -0000 1.6 +++ cpu/at91rm9200/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -35,8 +35,6 @@ #include <asm/arch/hardware.h> #include <asm/proc/ptrace.h> -extern void reset_cpu(ulong addr); - /* the number of clocks per CFG_HZ */ #define TIMER_LOAD_VAL (CFG_HZ_CLOCK/CFG_HZ) Index: cpu/i386/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/i386/cpu.c,v retrieving revision 1.3 diff -p -u -r1.3 cpu.c --- cpu/i386/cpu.c 27 Jun 2003 21:32:33 -0000 1.3 +++ cpu/i386/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -50,8 +50,6 @@ int cpu_init(void) int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu(ulong addr); - printf ("resetting ...\n"); udelay(50000); /* wait 50 ms */ disable_interrupts(); Index: cpu/ixp/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/ixp/cpu.c,v retrieving revision 1.2 diff -p -u -r1.2 cpu.c --- cpu/ixp/cpu.c 8 Feb 2004 19:38:44 -0000 1.2 +++ cpu/ixp/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -76,8 +76,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - printf ("resetting ...\n"); udelay (50000); /* wait 50 ms */ Index: cpu/ixp/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/ixp/interrupts.c,v retrieving revision 1.2 diff -p -u -r1.2 interrupts.c --- cpu/ixp/interrupts.c 15 Oct 2003 23:53:51 -0000 1.2 +++ cpu/ixp/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -30,8 +30,6 @@ #include <common.h> #include <asm/arch/ixp425.h> -extern void reset_cpu (ulong addr); - #ifdef CONFIG_USE_IRQ /* enable IRQ/FIQ interrupts */ void enable_interrupts (void) Index: cpu/lh7a40x/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/lh7a40x/cpu.c,v retrieving revision 1.1 diff -p -u -r1.1 cpu.c --- cpu/lh7a40x/cpu.c 9 Jun 2004 13:37:53 -0000 1.1 +++ cpu/lh7a40x/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -124,8 +124,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); /*NOTREACHED*/ Index: cpu/lh7a40x/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/lh7a40x/interrupts.c,v retrieving revision 1.2 diff -p -u -r1.2 interrupts.c --- cpu/lh7a40x/interrupts.c 10 Jun 2004 21:55:34 -0000 1.2 +++ cpu/lh7a40x/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -35,7 +35,6 @@ #include <asm/proc-armv/ptrace.h> -extern void reset_cpu(ulong addr); static ulong timer_load_val = 0; /* macro to read the 16 bit timer */ Index: cpu/pxa/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/pxa/cpu.c,v retrieving revision 1.5 diff -p -u -r1.5 cpu.c --- cpu/pxa/cpu.c 8 Feb 2004 19:38:44 -0000 1.5 +++ cpu/pxa/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -74,8 +74,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - printf ("resetting ...\n"); udelay (50000); /* wait 50 ms */ Index: cpu/pxa/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/pxa/interrupts.c,v retrieving revision 1.4 diff -p -u -r1.4 interrupts.c --- cpu/pxa/interrupts.c 9 Jun 2004 13:37:53 -0000 1.4 +++ cpu/pxa/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -29,8 +29,6 @@ #include <common.h> #include <asm/arch/pxa-regs.h> -extern void reset_cpu (ulong addr); - #ifdef CONFIG_USE_IRQ /* enable IRQ/FIQ interrupts */ void enable_interrupts (void) Index: cpu/s3c44b0/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/s3c44b0/cpu.c,v retrieving revision 1.2 diff -p -u -r1.2 cpu.c --- cpu/s3c44b0/cpu.c 17 Oct 2004 21:12:11 -0000 1.2 +++ cpu/s3c44b0/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -86,8 +86,6 @@ void reset_cpu (ulong addr) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - disable_interrupts (); reset_cpu (0); Index: cpu/s3c44b0/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/s3c44b0/interrupts.c,v retrieving revision 1.1 diff -p -u -r1.1 interrupts.c --- cpu/s3c44b0/interrupts.c 24 Feb 2004 00:16:44 -0000 1.1 +++ cpu/s3c44b0/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -29,8 +29,6 @@ #include <asm/proc-armv/ptrace.h> -extern void reset_cpu(ulong addr); - /* we always count down the max. */ #define TIMER_LOAD_VAL 0xffff Index: cpu/sa1100/cpu.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/sa1100/cpu.c,v retrieving revision 1.3 diff -p -u -r1.3 cpu.c --- cpu/sa1100/cpu.c 8 Feb 2004 19:38:44 -0000 1.3 +++ cpu/sa1100/cpu.c 25 Oct 2004 14:03:14 -0000 @@ -73,8 +73,6 @@ int cleanup_before_linux (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - extern void reset_cpu (ulong addr); - printf ("resetting ...\n"); udelay (50000); /* wait 50 ms */ Index: cpu/sa1100/interrupts.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/sa1100/interrupts.c,v retrieving revision 1.3 diff -p -u -r1.3 interrupts.c --- cpu/sa1100/interrupts.c 14 Mar 2004 15:20:56 -0000 1.3 +++ cpu/sa1100/interrupts.c 25 Oct 2004 14:03:14 -0000 @@ -31,8 +31,6 @@ #include <asm/proc-armv/ptrace.h> -extern void reset_cpu (ulong addr); - #ifdef CONFIG_USE_IRQ /* enable IRQ/FIQ interrupts */ void enable_interrupts (void) Index: include/common.h =================================================================== RCS file: /cvsroot/u-boot/u-boot/include/common.h,v retrieving revision 1.46 diff -p -u -r1.46 common.h --- include/common.h 10 Oct 2004 18:41:14 -0000 1.46 +++ include/common.h 25 Oct 2004 14:03:15 -0000 @@ -378,6 +378,7 @@ int checkicache (void); int checkdcache (void); void upmconfig (unsigned int, unsigned int *, unsigned int); ulong get_tbclk (void); +void reset_cpu (ulong addr); /* $(CPU)/serial.c */ int serial_init (void);

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[U-Boot-Users] Resending PATCH: Support for Motorola HiddenDragon board
by Santoso, Yusdi 03 Apr '05

03 Apr '05

Arrgh...ignore my first patch...I send a wrong patch version, the first one was agains the 2004-08-18 build. This is the correct one based on the daily snapshot. So sorry.... Thanks, Yusdi

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[U-Boot-Users] common/serial.c patch
by Curtis, Allen 03 Apr '05

03 Apr '05

This is a patch to support multiple serial ports. Existing code will compile and run without modification. I hope you find this useful. THX

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