June 2003 - U-Boot

[U-Boot-Users] [PATCH] Enable device and console for ARM (II).
by Woodruff, Richard 20 Jun '03

20 Jun '03

Here is an updated patch against u-boot.0.3.0 with console_init_f defined. I added the call into what appears to be the proper place, into the init_sequence[], just like the PPC code does. I tested and traced through the code and was able to use control^c as expected from things like md. Sorry for missing this the first time. Regards, Richard Woodruff -------------------------------------------- Hi, This update enables the standard device abstraction for ARM and enables the console member. It also initializes bi_baudrate for ARM. The superficial effect of this is coninfo works with out hanging a system. More importantly it enables devices, including the console. The only little bit stopping some of this from working before is that common/devices.c was written such that it was not relocation agnostic (Current ARM code do not do the selective relocation which the PPC ports appear to do). Everything I've tried so far still works as before (or better), and the console seems to work on my ARM board. Regards, Richard Woodruff

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RE: [U-Boot-Users] [PATCH] Enable device and console for ARM.
by Woodruff, Richard 20 Jun '03

20 Jun '03

I was doing a little looking and I noticed that gd->have_console was not being set (is normally set in console_init_f() ). Further greps of the code for ARM show its only used in common/console.c/ctrlc() . Being that the ARM generic code never sets it (nor is it done anywhere else), the function probably didn't work before. I just changed my code (patch I sent) to do : Console_init_f(); /* set have_console = 1 */ Console_init_r(); /* complete console init */ I won't test this till tomorrow but it is obvious that have_console should be set. I can resubmit the patch if you like, or just know to add this. * One other comment on this enabling the console patch...it should fix a bug which is in common/boot_cmd.c/read_record() . read_record currently EXPECTS syscalls_tbl to have been allocated, and it dereferences the table looking for a console device. Prior to this patch the ARM code failed to ever allocate this small table at all. So, it was likely a dereference of a uninitilized structure. Regards, Richard W. -----Original Message----- From: Woodruff, Richard Sent: Sunday, June 15, 2003 5:05 PM To: u-boot-users(a)lists.sourceforge.net Cc: 'Wolfgang Denk' Subject: [U-Boot-Users] [PATCH] Enable device and console for ARM. Hi, This update enables the standard device abstraction for ARM and enables the console member. It also initializes bi_baudrate for ARM. The superficial effect of this is coninfo works with out hanging a system. More importantly it enables devices, including the console. The only little bit stopping some of this from working before is that common/devices.c was written such that it was not relocation agnostic (Current ARM code do not do the selective relocation which the PPC ports appear to do). Everything I've tried so far still works as before (or better), and the console seems to work on my ARM board. Regards, Richard Woodruff

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[U-Boot-Users] [PATCH] Enable device and console for ARM.
by Woodruff, Richard 20 Jun '03

20 Jun '03

Hi, This update enables the standard device abstraction for ARM and enables the console member. It also initializes bi_baudrate for ARM. The superficial effect of this is coninfo works with out hanging a system. More importantly it enables devices, including the console. The only little bit stopping some of this from working before is that common/devices.c was written such that it was not relocation agnostic (Current ARM code do not do the selective relocation which the PPC ports appear to do). Everything I've tried so far still works as before (or better), and the console seems to work on my ARM board. Regards, Richard Woodruff

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[U-Boot-Users] Re: [PATCH] 4/4: some general patches
by Wolfgang Denk 20 Jun '03

20 Jun '03

In message <20030614163658.GE26793(a)pengutronix.de> you wrote: > > 405gp_enet.c: > ------------- > The code shall only be compiled when the user has chosen to use the 4xx > onchip ethernet device. This is not necessarily true on _all_ 4xx boards > - CONFIG_MII defines the behaviour. This is not correct. CONFIG_MII is not used in any 4xx related code except to enable the MII utils. It has nothing to do with calling or not calling ppc_4xx_eth_initialize(). Rejected. > cmd_boot.c: > ----------- > This code has been in u-boot forever. It was removed by one of my > cleanup patches some time ago while moving a piece of code to another > location. It hasn't found it's way back into the code since then. Added. > common.h: > --------- > Add a generic debugX macro, without changing the existing printk macros, > as suggested by WD some time ago. Added. > eth.c: > ------ > Compile code only if 4xx CPU _and_ MII was selected. See above. Rejected. > mach-types.h: > ------------- > Update to latest arm.linux.org.uk master list. Added. > README: > ------- > Add hint for minicom users :-) Added. > tag.h: > ------ > Put ARM tag handling into separate file. Patch by Holger Schurig. If this is ARM specific code, I don't want to see it in include/ Please put it in include/asm-arm/ or include/asm-arm/arch/ Rejected. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de If I had to live my life again, I'd make the same mistakes, only sooner. -- Tallulah Bankhead

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[U-Boot-Users] [PATCH] 3/4: CSB226 update
by Robert Schwebel 20 Jun '03

20 Jun '03

Hi, this is an update for the Cogent CSB226 board. Robert -- Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry Braunschweiger Str. 79, 31134 Hildesheim, Germany Handelsregister: Amtsgericht Hildesheim, HRA 2686 Phone: +49-5121-28619-0 | Fax: +49-5121-28619-4

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[U-Boot-Users] Re: [PATCH] 1/4: Board support for Logotronic DL
by Wolfgang Denk 19 Jun '03

19 Jun '03

In message <20030614163045.GB26793(a)pengutronix.de> you wrote: > > This is a board support package for the Logotronic DL datalogger board. Added, but this is the very last time that I accept such a patch: * CHANGELOG entry missing * MAINTAINERS entry missing * Credits entry missing (?) * single patch split into 9 separate files * using C++ comments in non-C++ files (include/configs/logodl.h, board/logodl/flash.c) * trailing white space (board/logodl/flash.c, board/logodl/logodl.c) * not compile clean: logodl.c:41: `MACH_TYPE_LOGODL' undeclared (first use in this function) Note that the calculation of the required image size in flash has changed; I recommend to fix your flash driver / linker script. I will check this in to CVS as is, i. e. the code is NOT COMPILE CLEAN. Please submit a fix (new patch) ASAP. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de Don't tell me how hard you work. Tell me how much you get done. -- James J. Ling

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[U-Boot-Users] [PATCH] IBM 750FX support
by Tom Guilliams 19 Jun '03

19 Jun '03

The attached patch file adds support the IBM750FX processor. As discussed yesterday on the mailing list, to enable support a "CONFIG_750FX" option has been added for the new HID1 pll multipliers table as well as the additional 4 IBATS and 4 DBATS setup. Modified files are - README cpu/74xx_7xx/cpu.c cpu/74xx_7xx/speed.c cpu/74xx_7xx/start.S include/74xx_7xx.h include/asm-ppc/processor.h First submitted patch. Awaiting your comments. Tom

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[U-Boot-Users] Re: [PATCH] 1/4: Board support for Logotronic DL
by Wolfgang Denk 19 Jun '03

19 Jun '03

In message <20030614163045.GB26793(a)pengutronix.de> you wrote: > > This is a board support package for the Logotronic DL datalogger board. Note to everybody: I just added two new "rules" to the "Submitting Patches" section in the README: * If one logical set of modifications affects or creates several files, all these changes shall be submitted in a SINGLE patch file. * Changesets that contain different, unrelated modifications shall be submitted as SEPARATE patches, one patch per changeset. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de You can fool some of the people all of the time, and You can fool all of the people some of the time, but You can't fool mom.

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[U-Boot-Users] Patch: MII support for MPC8260ADS (correction)
by Yuli Barcohen 19 Jun '03

19 Jun '03

I'm sorry, wrong MPC8260ADS.h diff was sent. Correct diff is attached. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== --- include/configs/MPC8260ADS.h 2003-06-12 13:49:35.000000000 +0300 +++ Arabella/u-boot/include/configs/MPC8260ADS.h 2003-06-12 13:52:10.000000000 +0300 @@ -7,6 +7,10 @@ * Note: my board is a PILOT rev. * Note: the mpc8260ads doesn't come with a proper Ethernet MAC address. * + * (C) Copyright 2003 Arabella Software Ltd. + * Yuli Barcohen <yuli(a)arabellasw.com> + * Added support for SDRAM DIMMs SPD EEPROM, MII. + * * See file CREDITS for list of people who contributed to this * project. * @@ -26,10 +30,6 @@ * MA 02111-1307 USA */ -/* - * Config header file for a MPC8260ADS Pilot 16M Ram Simm, 8Mbytes Flash Simm - */ - #ifndef __CONFIG_H #define __CONFIG_H @@ -77,23 +77,45 @@ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ -#define CONFIG_ETHER_INDEX 2 /* which channel for ether */ -#if (CONFIG_ETHER_INDEX == 2) +#ifdef CONFIG_ETHER_ON_FCC + +#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */ +#if (CONFIG_ETHER_INDEX == 2) /* * - Rx-CLK is CLK13 * - Tx-CLK is CLK14 * - Select bus for bd/buffers (see 28-13) - * - Half duplex + * - Full duplex */ # define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) # define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) # define CFG_CPMFCR_RAMTYPE 0 -# define CFG_FCC_PSMR 0 +# define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) #endif /* CONFIG_ETHER_INDEX */ +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ +/* + * GPIO pins used for bit-banged MII communications + */ +#define MDIO_PORT 2 /* Port C */ +#define MDIO_ACTIVE (iop->pdir |= 0x00400000) +#define MDIO_TRISTATE (iop->pdir &= ~0x00400000) +#define MDIO_READ ((iop->pdat & 0x00400000) != 0) + +#define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \ + else iop->pdat &= ~0x00400000 + +#define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ + else iop->pdat &= ~0x00200000 + +#define MIIDELAY udelay(1) + +#endif /* CONFIG_ETHER_ON_FCC */ + /* other options */ #define CONFIG_HARD_I2C 1 /* To enable I2C support */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ @@ -128,7 +150,6 @@ CFG_CMD_JFFS2 | \ CFG_CMD_KGDB | \ CFG_CMD_NAND | \ - CFG_CMD_MII | \ CFG_CMD_PCI | \ CFG_CMD_PCMCIA | \ CFG_CMD_SCSI | \ @@ -171,9 +192,6 @@ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ - /* for versions < 2.4.5-pre5 */ - #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ @@ -238,8 +256,8 @@ #ifndef CFG_RAMBOOT # define CFG_ENV_IS_IN_FLASH 1 -# define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) -# define CFG_ENV_SECT_SIZE 0x40000 +# define CFG_ENV_SECT_SIZE 0x40000 +# define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE) #else # define CFG_ENV_IS_IN_NVRAM 1 # define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)

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[U-Boot-Users] Patch: Fix for incorrect HRCW on MPC8260ADS
by Yuli Barcohen 19 Jun '03

19 Jun '03

Hi, On some MPC8260ADS boards, the FPGA (BCSR) supplies Hardware Reset Configuration Word (HRCW) which disables BADDR29-31 pins. As a result of this initialisation, every command must be 8-byte aligned to be fetched. Of course, PPC commands are 4-byte aligned so the board simply does not work. Attached patch fixes the problem by changing SIUMCR. Patch's commands are 8-byte aligned by nops. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== --- cpu/mpc8260/start.S 2003-06-12 12:25:22.000000000 +0300 +++ Arabella/u-boot/cpu/mpc8260/start.S 2003-06-12 13:43:18.000000000 +0300 @@ -161,9 +161,9 @@ _hrcw_table: .globl _start _start: li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/ + nop b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 + nop .globl _start_warm _start_warm: @@ -171,6 +171,18 @@ _start_warm: b boot_warm boot_cold: +#if defined(CONFIG_MPC8260ADS) + lis r3, CFG_DEFAULT_IMMR@h + nop + lwz r4, 0(r3) + nop + rlwinm r4, r4, 0, 8, 5 + nop + oris r4, r4, 0x0200 + nop + stw r4, 0(r3) + nop +#endif /* CONFIG_MPC8260ADS */ boot_warm: mfmsr r5 /* save msr contents */ Fix incorrect SIUMCR initialisation caused by wrong Hard Reset configuration word supplied by FPGA on some MPC8260ADS boards

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[U-Boot-Users] Patch: MII support for MPC8260ADS board
by Yuli Barcohen 19 Jun '03

19 Jun '03

Hi, I added MII command support to MPC8260ADS U-Boot port. Also on this board, Ethernet PHY is configured by means of configuration pins in such a way that it does not work at 100Mb/s. This patch fixes the problem. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli(a)arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ======================================================================== --- board/mpc8260ads/mpc8260ads.c 2003-06-12 12:23:46.000000000 +0300 +++ Arabella/u-boot/board/mpc8260ads/mpc8260ads.c 2003-06-11 16:49:05.000000000 +0300 @@ -9,6 +9,10 @@ * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth(a)lineo.com * Added support for the 16M dram simm on the 8260ads boards * + * (C) Copyright 2003 Arabella Software Ltd. + * Yuli Barcohen <yuli(a)arabellasw.com> + * Added support for SDRAM DIMMs SPD EEPROM, MII, Ethernet PHY init. + * * See file CREDITS for list of people who contributed to this * project. * @@ -33,6 +37,7 @@ #include <mpc8260.h> #include <i2c.h> #include <spd.h> +#include <miiphy.h> /* * I/O Port configuration table @@ -129,8 +134,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ - /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */ - /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */ + /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Rx Clock (CLK13) */ + /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Tx Clock (CLK14) */ /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */ /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */ /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */ @@ -138,8 +143,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */ /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */ /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */ - /* PC10 */ { 1, 1, 0, 0, 0, 0 }, /* LXT970 FETHMDC */ - /* PC9 */ { 1, 1, 0, 0, 0, 0 }, /* LXT970 FETHMDIO */ + /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* LXT970 FETHMDC */ + /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* LXT970 FETHMDIO */ /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */ /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ @@ -153,8 +158,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port D */ { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ - /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ + /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART RxD */ + /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 UART TxD */ /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */ /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */ /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */ @@ -169,14 +174,14 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ - /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */ - /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */ + /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */ + /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */ /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ - /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ - /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ + /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ + /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ @@ -188,32 +193,33 @@ const iop_conf_t iop_conf_tab[4][32] = { } }; -typedef struct bscr_ { - unsigned long bcsr0; - unsigned long bcsr1; - unsigned long bcsr2; - unsigned long bcsr3; - unsigned long bcsr4; - unsigned long bcsr5; - unsigned long bcsr6; - unsigned long bcsr7; -} bcsr_t; - void reset_phy (void) { - volatile bcsr_t *bcsr = (bcsr_t *) CFG_BCSR; + vu_long *bcsr = (vu_long *)CFG_BCSR; /* reset the FEC port */ - bcsr->bcsr1 &= ~FETH_RST; - bcsr->bcsr1 |= FETH_RST; + bcsr[1] &= ~FETH_RST; + udelay(2); + bcsr[1] |= FETH_RST; + udelay(1000); +#ifdef CONFIG_MII + /* + * Ethernet PHY is configured (by means of configuration pins) + * to work at 10Mb/s only. We reconfigure it using MII + * to advertise all capabilities, including 100Mb/s, and + * restart autonegotiation. + */ + miiphy_write(0, PHY_ANAR, 0x01E1); /* Advertise all capabilities */ + miiphy_write(0, PHY_DCR, 0x0000); /* Do not bypass Rx/Tx (de)scrambler */ + miiphy_write(0, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); +#endif /* CONFIG_MII */ } - int board_pre_init (void) { - volatile bcsr_t *bcsr = (bcsr_t *) CFG_BCSR; + vu_long *bcsr = (vu_long *)CFG_BCSR; - bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1; + bcsr[1] = ~FETHIEN & ~RS232EN_1; return 0; } /* * (C) Copyright 2001 * Stuart Hughes <stuarth(a)lineo.com> * This file is based on similar values for other boards found in other * U-Boot config files, and some that I found in the mpc8260ads manual. * * Note: my board is a PILOT rev. * Note: the mpc8260ads doesn't come with a proper Ethernet MAC address. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ /* * Config header file for a MPC8260ADS Pilot 16M Ram Simm, 8Mbytes Flash Simm */ #ifndef __CONFIG_H #define __CONFIG_H /* * High Level Configuration Options * (easy to change) */ #define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */ #define CONFIG_MPC8260ADS 1 /* ...on motorola ads board */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ /* allow serial and ethaddr to be overwritten */ #define CONFIG_ENV_OVERWRITE /* * select serial console configuration * * if either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4 * for SCC). * * if CONFIG_CONS_NONE is defined, then the serial console routines must * defined elsewhere (for example, on the cogent platform, there are serial * ports on the motherboard which are used for the serial console - see * cogent/cma101/serial.[ch]). */ #undef CONFIG_CONS_ON_SMC /* define if console on SMC */ #define CONFIG_CONS_ON_SCC /* define if console on SCC */ #undef CONFIG_CONS_NONE /* define if console on something else */ #define CONFIG_CONS_INDEX 1 /* which serial channel for console */ /* * select ethernet configuration * * if either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, then * CONFIG_ETHER_INDEX must be set to the channel number (1-4 for SCC, 1-3 * for FCC) * * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be * defined elsewhere (as for the console), or CFG_CMD_NET must be removed * from CONFIG_COMMANDS to remove support for networking. */ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ #define CONFIG_ETHER_INDEX 2 /* which channel for ether */ #if (CONFIG_ETHER_INDEX == 2) /* * - Rx-CLK is CLK13 * - Tx-CLK is CLK14 * - Select bus for bd/buffers (see 28-13) * - Half duplex */ # define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) # define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) # define CFG_CPMFCR_RAMTYPE 0 # define CFG_FCC_PSMR 0 #endif /* CONFIG_ETHER_INDEX */ /* other options */ #define CONFIG_HARD_I2C 1 /* To enable I2C support */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F #if defined(CONFIG_SPD_EEPROM) && !defined(CONFIG_SPD_ADDR) #define CONFIG_SPD_ADDR 0x50 #endif #ifndef CONFIG_SDRAM_PBI #define CONFIG_SDRAM_PBI 1 /* By default, use page-based interleaving */ #endif #ifndef CONFIG_8260_CLKIN #define CONFIG_8260_CLKIN 66666666 /* in Hz */ #endif #define CONFIG_BAUDRATE 115200 #define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \ CFG_CMD_BEDBUG | \ CFG_CMD_BMP | \ CFG_CMD_BSP | \ CFG_CMD_DATE | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_HWFLOW | \ CFG_CMD_IDE | \ CFG_CMD_JFFS2 | \ CFG_CMD_KGDB | \ CFG_CMD_NAND | \ CFG_CMD_MII | \ CFG_CMD_PCI | \ CFG_CMD_PCMCIA | \ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ CFG_CMD_VFD | \ CFG_CMD_USB ) ) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOOTCOMMAND "bootm 100000" /* autoboot command */ #define CONFIG_BOOTARGS "root=/dev/ram rw" #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */ #define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */ #undef CONFIG_KGDB_NONE /* define if kgdb on something else */ #define CONFIG_KGDB_INDEX 2 /* which serial channel for kgdb */ #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */ #endif #undef CONFIG_WATCHDOG /* disable platform specific watchdog */ /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ /* for versions < 2.4.5-pre5 */ #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } #define CFG_FLASH_BASE 0xff800000 #define FLASH_BASE 0xff800000 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ #define CFG_MAX_FLASH_SECT 32 /* max num of sects on one chip */ #define CFG_FLASH_SIZE 8 #define CFG_FLASH_ERASE_TOUT 8000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */ /* this is stuff came out of the Motorola docs */ #define CFG_DEFAULT_IMMR 0x0F010000 #define CFG_IMMR 0xF0000000 #define CFG_BCSR 0x04500000 #define CFG_SDRAM_BASE 0x00000000 #define CFG_LSDRAM_BASE 0x04000000 #define RS232EN_1 0x02000002 #define RS232EN_2 0x01000001 #define FETHIEN 0x08000008 #define FETH_RST 0x04000004 #define CFG_INIT_RAM_ADDR CFG_IMMR #define CFG_INIT_RAM_END 0x4000 /* End of used area in DPRAM */ #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET /* 0x0EA28205 */ #define CFG_HRCW_MASTER ( ( HRCW_BPS11 | HRCW_CIP ) |\ ( HRCW_L2CPC10 | HRCW_DPPC10 | HRCW_ISB010 ) |\ ( HRCW_BMS | HRCW_APPC10 ) |\ ( HRCW_MODCK_H0101 ) \ ) /* no slaves */ #define CFG_HRCW_SLAVE1 0 #define CFG_HRCW_SLAVE2 0 #define CFG_HRCW_SLAVE3 0 #define CFG_HRCW_SLAVE4 0 #define CFG_HRCW_SLAVE5 0 #define CFG_HRCW_SLAVE6 0 #define CFG_HRCW_SLAVE7 0 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CFG_MONITOR_BASE TEXT_BASE #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) # define CFG_RAMBOOT #endif #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #ifndef CFG_RAMBOOT # define CFG_ENV_IS_IN_FLASH 1 # define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) # define CFG_ENV_SECT_SIZE 0x40000 #else # define CFG_ENV_IS_IN_NVRAM 1 # define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) # define CFG_ENV_SIZE 0x200 #endif /* CFG_RAMBOOT */ #define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif #define CFG_HID0_INIT 0 #define CFG_HID0_FINAL (HID0_ICE | HID0_IFEM | HID0_ABE ) #define CFG_HID2 0 #define CFG_SYPCR 0xFFFFFFC3 #define CFG_BCR 0x100C0000 #define CFG_SIUMCR 0x0A200000 #define CFG_SCCR 0x00000000 #define CFG_BR0_PRELIM 0xFF801801 #define CFG_OR0_PRELIM 0xFF800836 #define CFG_BR1_PRELIM 0x04501801 #define CFG_OR1_PRELIM 0xFFFF8010 #define CFG_RMR 0 #define CFG_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE) #define CFG_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE) #define CFG_RCCR 0 #define CFG_PSDMR 0x016EB452 #define CFG_MPTPR 0x00001900 #define CFG_PSRT 0x00000021 #define CFG_RESET_ADDRESS 0x04400000 #endif /* __CONFIG_H */ - Add MII support for MPC8260ADS board - Fix Ethernet PHY initialisation for MPC8260ADS board to allow 100Mb/s full-duplex work

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[U-Boot-Users] Status LEDs status?
by Pantelis Antoniou 19 Jun '03

19 Jun '03

Hi I face the following problem. In a new version of my board with a mpc850 the location of the status leds moved to an external register, instead of being on a CPU port. However the status LED code assumes that the LEDs are on a port. As I scanned the other cpu directories I saw that the status led code is copied in each of them. I dont want to special case the status_led code with my board, so I'm inclined to make a new status led interface in the common or drivers directory. IMHO the duplication of the status led code and it's placement in the cpu directory is not very intuitive. Your thoughts on that? Regards Pantelis

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RE: [U-Boot-Users] Return convention for eth_init() ?
by Woodruff, Richard 19 Jun '03

19 Jun '03

Sorry about the HTML. My win machine which is on the side for mail, seems to sneak settings changes in. Should I add an error check into ./net/net.c's NetLoop? It seems that trying to write to the hardware if it didn't respond or had a problem could cause problems with our own board, and possibly the network its on. Unfortunately, as many of the eth_ints don't report errors uniformly it would break some code...I could change other code bits, but I can't test them... Oh well, I'll probably report the error properly, and forget to add the check. I of coarse can change it locally but I'd rather not diverge to much. Regards, Richard W. > -----Original Message----- > From: Wolfgang Denk [mailto:wd@denx.de] > Sent: Thursday, June 19, 2003 11:34 AM > To: Woodruff, Richard > Cc: U-Boot Users > Subject: Re: [U-Boot-Users] Return convention for eth_init() ? > > > In message > <FD2AC9A020DDD51194710008C7089B20053D4C90(a)dlee17.itg.ti.com> > you wrote: > > > > Is there any "correct" convention for the value eth_init() > is supposed > > to return? grep'ing/cscop'ing the code seems to indicate that there > > Return 0 for success, -1 for error. > > > isn't.....what should it be.... if there is no consistent > return then > > perhaps it should be changed to return a void. Being > silly, I checked for > > errors and tried to report them back, unfortunately none of the > > upstream users check for errors. Thankfully, the control^c > now works > > for me. > > You are right, there is little error checking in place as is, > but we should keep this option open. > > > ------_=_NextPart_001_01C33678.735DDCCA > > Content-Type: text/html > > > > <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> > > <HTML><HEAD> <META HTTP-EQUIV="Content-Type" CONTENT="text/html; > > charset=us-ascii"> <TITLE>Message</TITLE> > > Please do not send HTML messages. > > Please send plain text only. > > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: > wd(a)denx.de The most exciting phrase to hear in science, the > one that heralds new discoveries, is not "Eureka!" (I found > it!) but "That's funny ..." > -- Isaac Asimov >

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[U-Boot-Users] Return convention for eth_init() ?
by Woodruff, Richard 19 Jun '03

19 Jun '03

Hi, Is there any "correct" convention for the value eth_init() is supposed to return? grep'ing/cscop'ing the code seems to indicate that there isn't.....what should it be.... if there is no consistent return then perhaps it should be changed to return a void. Being silly, I checked for errors and tried to report them back, unfortunately none of the upstream users check for errors. Thankfully, the control^c now works for me. Regards, Richard W.

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[U-Boot-Users] [PATCH] 8xx: fix initialation bug/race condition between u-boot & linux
by Pantelis Antoniou 19 Jun '03

19 Jun '03

Hi all Sorry in advance for cross-posting but this is a problem that affects both the boot loader and the kernel. In my 8xx board we use u-boot in order to boot linux. My troubles began when for dpram conflict reasons we moved from using a console on an SMC to a max3100 SPI/UART converter chip. I was still using the SMC console in u-boot, but when tried to use this chip as a driver for the boot console and removing the CPM console, strange panics appeared in the ethernet driver. After some interesting debugging sessions the problem was discovered to be this: The u-boot loader upon finishing the decompression of the kernel image it just jumps into the kernel without resetting the CP. The kernel however resets the CP only when configured to apply a u-patch. The UART in the CP is still active however, and the descriptors in dpram end up overlapping. The attached patch fixes the common problem by performing the CP reset every time. This is only a bandaid however, because under network load at the time of booting, i.e. broadcast packets or rebooting after a crash and another end sending non TCP packets, we still crash. It is still possible for a packet to be received and placed in memory by DMA before the kernel reaching the point where the ethernet controller is initialized. [boot jumps into kernel ] [kernel starts executing ] <--- incoming packet write in memory XXX possible corruption XXX [init ethernet controller] The proper way to address the problem is for the loader to stop any DMA capable peripherals before executing the kernel. The fix for my case is a simple reset of the CP, but I believe that this is a problem that should be looked upon by the maintainers. IMHO it is good practice for the kernel too to issue a reset to it's peripherals as soon as possible in order to minimize the chances of that happening. Regards Pantelis --- commproc-orig.c Tue Jun 17 15:12:27 2003 +++ commproc.c Tue Jun 17 15:13:31 2003 @@ -115,7 +115,6 @@ imp = (immap_t *)IMAP_ADDR; commproc = (cpm8xx_t *)&imp->im_cpm; -#ifdef CONFIG_UCODE_PATCH /* Perform a reset. */ commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG); @@ -124,6 +123,7 @@ */ while (commproc->cp_cpcr & CPM_CR_FLG); +#ifdef CONFIG_UCODE_PATCH cpm_load_patch(imp); #endif

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[U-Boot-Users] Re: U-Boot-Users -- confirmation of subscription -- request 555372
by Mic 19 Jun '03

19 Jun '03

On Thu, 2003-06-19 at 09:03, u-boot-users-request(a)lists.sourceforge.net wrote: > U-Boot-Users -- confirmation of subscription -- request 555372 > > We have received a request from 194.237.142.7 for subscription of your > email address, <mic(a)switchboard.ericsson.se>, to the > u-boot-users(a)lists.sourceforge.net mailing list. To confirm the > request, please send a message to > u-boot-users-request(a)lists.sourceforge.net, and either: > > - maintain the subject line as is (the reply's additional "Re:" is > ok), > > - or include the following line - and only the following line - in the > message body: > > confirm 555372 > > (Simply sending a 'reply' to this message should work from most email > interfaces, since that usually leaves the subject line in the right > form.) > > If you do not wish to subscribe to this list, please simply disregard > this message. Send questions to > u-boot-users-admin(a)lists.sourceforge.net.

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RE: [U-Boot-Users] ether mac auto override.
by Woodruff, Richard 18 Jun '03

18 Jun '03

Yes. I've read that and inspected many of the drivers and I've yet to find one which implements the whole specification, especially as it relates to validating the mac address. Is there a good example which you can point to? I did take a few looks into the kernel/drivers/net sources and no good examples jumped out. The 91c111 can run with our with out an eeprom. Just because you have an eeprom there is no guarantee the mac is correct, just like there is nothing which say the user inputted it correctly. I recall working with some code in the past which did some validation of the mac, but I am unable to find it (not broadcast, not multicast, not 0, ...). The closest thing to validation a couple of the drivers do is a checksum over the eeprom this gives you some confidence but its not a validation. Its sort of picky to worry about it at this level, but it would be nice to find something good. I'll likely end up throwing in a simple check, followed by setting the local address to what the env asked for or ... If none, what in the rom, if none, the default which is there already. Regards, Richard W. > -----Original Message----- > From: Wolfgang Denk [mailto:wd@denx.de] > Sent: Wednesday, June 18, 2003 2:56 AM > To: Woodruff, Richard > Cc: u-boot-users(a)lists.sourceforge.net > Subject: Re: [U-Boot-Users] ether mac auto override. > > > Dear Richard, > > in message > <FD2AC9A020DDD51194710008C7089B20053D4C87(a)dlee17.itg.ti.com> > you wrote: > > > > Should u-boot define a standard way to override the mac > address that > > an ethernet chip will use (if that chip allows it)? Back when I > > enabled the > > There is already such a definition. > > See the 3rd and following paragraphs in section "Note for > Redundant Ethernet Interfaces" in the README (Text > starting "If the network interface stores some valid MAC address..."). > > > 91c111 for my board, it took a couple of looks to notice that the > > ethaddr environment variable was not used by the > driver...but it was > > for things like > > Then the driver should be fixed. > > > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: > wd(a)denx.de Murder is contrary to the laws of man and God. > -- M-5 Computer, "The Ultimate Computer", stardate 4731.3 >

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[U-Boot-Users] Re: U-boot for Discovery II DB-64360
by Brian Waite 18 Jun '03

18 Jun '03

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 There are a small number of us who are working on completing the port of u-boot to the 64360. We are working out of aour own CVS treee until we can get a resonable clean tree. If you want I can see about getting you a tar ball of CVS access. Thanks Brian On Wednesday 18 June 2003 10:33 am, mss59(a)att.net wrote: > Hi: > Has anyone used U-boot for Discovery II Chip (Galilio DB64360) Eval > Board. Any pointers will be greatly appreciated. > > Thanks > > Ravi Shanker// > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) iD8DBQE+8JzsmxLCz0u+Ko8RApYTAJ0dvwpbDeFeN1kDmiEthKlIQYCSsACdGkD0 JSNObztTknKRipMi2+DJLMI= =6bW2 -----END PGP SIGNATURE-----

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[U-Boot-Users] U-boot for Discovery II DB-64360
by mss59＠att.net 18 Jun '03

18 Jun '03

Hi: Has anyone used U-boot for Discovery II Chip (Galilio DB64360) Eval Board. Any pointers will be greatly appreciated. Thanks Ravi Shanker//

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[U-Boot-Users] U-Boot support for MV64360
by Chaitanya Pasupala 18 Jun '03

18 Jun '03

hi, I want to add U-Boot support for Marvel MV64360 system controller with 750FX processor. I would like to know if the work in this direction has already been taken up. In such a case, I wish to know where I can get the latest source. thanks :) chaitanya.

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[U-Boot-Users] U-Boot 750FX CPU support
by Tom Guilliams 18 Jun '03

18 Jun '03

I'm adding support for the IBM 750FX processor and I have a question about how to add this support in the u-boot/cpu/74xx directory. The files that would be affeted are start.S - to accommodate the additional 8 BATS (total 8 instruction, 8 data) routines effected: invalidate_bats(), setup_bats() speed.c - the 750FX needs a unique multiplier table (hid1_multipliers_x_10) routines effected: get_clocks() Should this be #ifdef CONFIG_750FX build rule? If not, should there be some processor identification in the routines effected to take the correct action? This would be unique to the 750FX right now but future CPUs may need this too. Thanks, Tom

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[U-Boot-Users] ether mac auto override.
by Woodruff, Richard 18 Jun '03

18 Jun '03

Hi, Should u-boot define a standard way to override the mac address that an ethernet chip will use (if that chip allows it)? Back when I enabled the 91c111 for my board, it took a couple of looks to notice that the ethaddr environment variable was not used by the driver...but it was for things like ARP. That driver defaults to ... probably an experimental mac address, and there is no attempt to sync it with the environment variable which is visible with printenv. I ended up doing the override to match the environment in misc_init_r() which worked just fine, however, it seemed that where the bd_data.bi_enetaddr is initialized in lib_arm/board.c would be a good place to call some standard override function. Any opinions? Regards, Richard Woodruff

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[U-Boot-Users] cvs access error
by Zhao Hongda 18 Jun '03

18 Jun '03

I want to checkout a u-boot cvs source tree, but got following error: #cvs -d :pserver:anonymous@cvs.sourceforge.net:/cvsroot/u-boot login Logging in to :pserver:anonymous@cvs.sourceforge.net:2401/cvsroot/u-boot CVS password:(Enter) cvs [login aborted]: recv() from server cvs.sourceforge.net: EOF what should I do? Hongda Zhao 2003/6/17

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Re: [U-Boot-Users] Booting Linux from hard drive
by Mark.Lightfoot＠sita.aero 17 Jun '03

17 Jun '03

Wolfgang, I think I understand the solution. But I'm not sure. Are you saying. Create a partition which is not formatted with a file system and whose sole purpose is to contain a kernel image. Then, modify the diskboot command to read the contents of that partition into memory and execute. Regards, Mark. ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>< Mark Lightfoot - Software Designer - SITA 777 Walker's Line, Burlington, Ontario, Canada, L7N 2G1 905-681-5575 mark.lightfoot(a)sita.aero ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>< Wolfgang Denk <wd(a)denx.de> To: Mark.Lightfoot(a)sita.aero Sent by: cc: u-boot-users(a)lists.sourceforge.net wd(a)denx.de Subject: Re: [U-Boot-Users] Booting Linux from hard drive 06/16/2003 05:32 PM Dear Mark, in message <OF2C06A494.5C13BDD5-ON85256D47.0073E4F0-85256D47.0075138E(a)sita.aero> you wrote: > > Can anyone suggest a method to have U-Boot boot Linux from a hard drive on > a PowerPC architecture? You have to adapt the existing IDE/ATA code so it can talk to your IDE controller. Then you can use the "diskboot" command to load a kernel image from a disk partition. > I'm in the process of completing a port of U-Boot to the Motorola PrPMC800 > which is uses a PowerPC MPC7410 processor. My goal is to have U-Boot boot > Linux from a hard drive instead of from flash. I've just completed the Works fine on a couple of boards already. > PCI/IDE support for this. I thought I could have U-Boot load Lilo or Grub. What the h*ll do you need lilo or grub for? You got U-Boot! :-) Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de The sooner our happiness together begins, the longer it will last. -- Miramanee, "The Paradise Syndrome", stardate 4842.6

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RE: [U-Boot-Users] Support on TI's OMAP 1510/161x
by Woodruff, Richard 17 Jun '03

17 Jun '03

Hello, I've got it running for a custom 1510 based board for a project I'm working on. I know others in TI are getting it running on the 161x platforms. Work is preliminary and I'm not sure which version will end up being merged back into the main u-boot tree. The 1510 has an ARM925T which from a u-boot point of view is slightly different from the ARM920T code which can be found in the existing u-boot tree (they both are however ARMv4). As far as the DSP goes, the code I'll end up using won't do much except boot the DSP into idle mode. The DSP is more or less a slave to the ARM core so its really the OS's job to do anything with the DSP...my opinion. The 16xx uses an ARM926EJ core which is (ARMv5) so its code should look a bit more different....mainly because the peripheral set and clocking is slightly different. If you are in a rush to get going I can likely give you a zip of what I've done....My code is for MY platform NOT the standard development board Innovator. I might move the code to Innovator, but it wouldn't be for several months....I think others here at TI will have something sooner than that. Regards, Richard W. -----Original Message----- From: Debbie Xu [mailto:dxu@intrinsyc.com] Sent: Tuesday, June 17, 2003 1:02 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] Support on TI's OMAP 1510/161x Hi, Is there any existing support at U-boot for Texas Instrument's OMAP 1510/1610/1611 chips? It inludes an ARM9 core which I believe is supported at U-Boot already. And it also includes a TMS320C55x core. is there any development undergoing for the TMS320C55x core supoprt? Thanks, Debbie ------------------------------------------------------- This SF.Net email is sponsored by: INetU Attention Web Developers & Consultants: Become An INetU Hosting Partner. Refer Dedicated Servers. We Manage Them. You Get 10% Monthly Commission! INetU Dedicated Managed Hosting http://www.inetu.net/partner/index.php _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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