May 2003 - U-Boot

[U-Boot-Users] SIS55x based boards
by Frank 21 May '03

21 May '03

Has anybody ported u-boot to the SIS55x (x86) based boards... __________________________________ Do you Yahoo!? The New Yahoo! Search - Faster. Easier. Bingo. http://search.yahoo.com

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Re: [U-Boot-Users] file transfer server
by Wolfgang Denk 20 May '03

20 May '03

In message <2692A548B75777458914AC89297DD7DA021CCFDB(a)bronze.dolby.net> you wrote: > > Actually I want to run a server on the board, so that anyone on the > network can transfer files to it. So how easy would it be to implement > something like this. It is not exactly difficult, but it makes no sense either. U-Boot is a boot loader, not a file server. If you need server functions, run an OS. Boot into Linux, fire up inetd and a FTP or TFTP server. Voila. No need to implement any new features. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de The ultimate barrier is one's viewpoint. - Terry Pratchett, _The Dark Side of the Sun_

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[U-Boot-Users] file transfer server
by Dhanuka, Anupam 20 May '03

20 May '03

Hi all I am using uboot for the ebony board. I want to be able to transfer a new firmware image to the board over the network. I would like to be able to connect to some sort of a server running on the board (by interrupting the boot sequence) through a client running on a remote system and interactively provide the server with a firmware image which can then be written by the server onto flash. Can someone tell me how this can be done? Thanks Anupam This message (including any attachments) may contain confidential information intended for a specific individual and purpose. If you are not the intended recipient, delete this message. If you are not the intended recipient, disclosing, copying, distributing, or taking any action based on this message is strictly prohibited.

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RE: [U-Boot-Users] [patch] MPC8266 March-C memory test
by Rune Torgersen 20 May '03

20 May '03

The slow version is written in C and should work on any platfrom. The fast version might work. Don't know if the 8xx is FPU compatible with the 82xx -----Original Message----- From: Nye Liu [mailto:nyet@mrv.com] Sent: Monday, May 19, 2003 5:09 PM To: Rune Torgersen Cc: U-BOOT (E-mail) Subject: Re: [U-Boot-Users] [patch] MPC8266 March-C memory test Should this also be portable to the 8xx[F]ADS platforms? I am currently debugging UPM/memory problems, and a real memory test would be invaluable :) On Mon, May 19, 2003 at 04:26:47PM -0500, Rune Torgersen wrote: > Patch to do full March-C- memory test on the MPC8266ADS board. > > Later on I will probably include it as a command, right now it runs as > test_dram() which is called first thing after SDRAM is initializes, and > before anything uses the SDRAM. > > Note: Fast version uses floating point assembly and is therefore PPC > specific. Generic version takes more than twice the amount of time to > complete. > (Fast version: ~50 sec on 256MB RAM, slow version ~1:50 on 256MB RAM) > ADS > Rune Torgersen > Software Developer > Innovative Systems > 1000 Innovative Drive > Mitchell, SD 57301 > Phone: 605-995-6120 > Fax: 605-995-0084 > email: runet(a)innovsys.com > www.innovsys.com > > > > > -- Nye Liu nliu(a)mrv.com (818) 772-6235x248 "Who would be stupid enough to quote a fictitious character?" -- Don Quixote

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[U-Boot-Users] [PATCH] ARTOS boot support for u-boot
by Pantelis Antoniou 20 May '03

20 May '03

Wolfgang hi The following patch against u-boot-0.3.0 adds support for booting ARTOS images using u-boot. ARTOS is a custom in-house operating system in use by my company. We're in the process of moving some features of our in house boot-loader over to u-boot. I present the features to the mailing list in case someone else is working in anything similar, and would like to coordinate our efforts. o VLAN support and TOS configuration and support. o Two level access password support. o Different boot-modes. o Cisco router like command interface with history and command completion. o UDP-based same-LAN terminal access. o Factory testing framework. o More DHCP parameters support. o CDP support. o DHCP lease time information passed to the loaded kernel. Looking forward to hear your suggestions. Regards Pantelis diff -ruNb u-boot-0.3.0-orig/CREDITS u-boot-0.3.0/CREDITS --- u-boot-0.3.0-orig/CREDITS Wed Apr 16 10:56:20 2003 +++ u-boot-0.3.0/CREDITS Thu Apr 17 14:32:28 2003 @@ -286,3 +286,7 @@ E: azu(a)sysgo.de D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM W: www.elinos.com + +N: Pantelis Antoniou +E: panto(a)intracom.gr +D: NETVIA board support, ARTOS support. diff -ruNb u-boot-0.3.0-orig/README u-boot-0.3.0/README --- u-boot-0.3.0-orig/README Wed Apr 16 10:56:20 2003 +++ u-boot-0.3.0/README Thu Apr 17 14:31:16 2003 @@ -343,7 +343,8 @@ CONFIG_GTH, CONFIG_RPXClassic, CONFIG_rsdproto, CONFIG_IAD210, CONFIG_RPXlite, CONFIG_sbc8260, CONFIG_EBONY, CONFIG_sacsng, CONFIG_FPS860L, - CONFIG_V37, CONFIG_ELPT860, CONFIG_CMI + CONFIG_V37, CONFIG_ELPT860, CONFIG_CMI, + CONFIG_NETVIA ARM based boards: ----------------- @@ -1726,7 +1727,7 @@ FPS850L_config Sandpoint8240_config sbc8260_config GENIETV_config TQM823L_config PIP405_config GEN860T_config EBONY_config FPS860L_config - ELPT860_config cmi_mpc5xx_config + ELPT860_config cmi_mpc5xx_config NETVIA_config Note: for some board special configuration names may exist; check if additional information is available from the board vendor; for @@ -2036,8 +2037,8 @@ * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD, 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks, - LynxOS, pSOS, QNX; - Currently supported: Linux, NetBSD, VxWorks, QNX). + LynxOS, pSOS, QNX, ARTOS; + Currently supported: Linux, NetBSD, VxWorks, QNX, ARTOS). * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86, IA64, MIPS, MIPS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; Currently supported: PowerPC). diff -ruNb u-boot-0.3.0-orig/common/cmd_bootm.c u-boot-0.3.0/common/cmd_bootm.c --- u-boot-0.3.0-orig/common/cmd_bootm.c Wed Apr 16 10:56:20 2003 +++ u-boot-0.3.0/common/cmd_bootm.c Wed Apr 16 13:24:15 2003 @@ -31,6 +31,7 @@ #include <image.h> #include <malloc.h> #include <zlib.h> +#include <environment.h> #include <asm/byteorder.h> #if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP) #include <rtc.h> @@ -104,6 +105,9 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ); int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ); #endif /* CFG_CMD_ELF */ +#ifdef CONFIG_PPC +static boot_os_Fcn do_bootm_artos; +#endif image_header_t header; @@ -326,6 +330,12 @@ addr, len_ptr, verify); break; #endif /* CFG_CMD_ELF */ +#ifdef CONFIG_PPC + case IH_OS_ARTOS: + do_bootm_artos (cmdtp, flag, argc, argv, + addr, len_ptr, verify); + break; +#endif } SHOW_BOOT_PROGRESS (-9); @@ -705,6 +715,88 @@ (*loader) (gd->bd, img_addr, consdev, cmdline); } +#ifdef CONFIG_PPC + +/* Function that returns a character from the environment */ +extern uchar (*env_get_char)(int); + +static void +do_bootm_artos (cmd_tbl_t *cmdtp, int flag, + int argc, char *argv[], + ulong addr, + ulong *len_ptr, + int verify) +{ + DECLARE_GLOBAL_DATA_PTR; + ulong top; + char *s, *cmdline; + char **fwenv, **ss; + int i, j, nxt, len, envno, envsz; + bd_t *kbd; + void (*entry)(bd_t *bd, char *cmdline, char **fwenv, ulong top); + image_header_t *hdr = &header; + + /* + * Booting an ARTOS kernel image + application + */ + + /* place data at the top of memory */ + top = gd->bd->bi_memstart + gd->bd->bi_memsize; + + /* first check the artos specific boot args, then the linux args*/ + if ((s = getenv("abootargs")) == NULL && (s = getenv("bootargs")) == NULL) + s = ""; + + /* get length of cmdline, and place it */ + len = strlen(s); + top = (top - (len + 1)) & ~0xF; + cmdline = (char *)top; + debug ("## cmdline at 0x%08lX ", top); + strcpy(cmdline, s); + + /* copy bdinfo */ + top = (top - sizeof(bd_t)) & ~0xF; + debug ("## bd at 0x%08lX ", top); + kbd = (bd_t *)top; + memcpy(kbd, gd->bd, sizeof(bd_t)); + + /* first find number of env entries, and their size */ + envno = 0; + envsz = 0; + for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { + for (nxt = i; env_get_char(nxt) != '\0'; ++nxt) + ; + envno++; + envsz += (nxt - i) + 1; /* plus trailing zero */ + } + envno++; /* plus the terminating zero */ + debug ("## %u envvars total size %u ", envno, envsz); + + top = (top - sizeof(char **)*envno) & ~0xF; + fwenv = (char **)top; + debug ("## fwenv at 0x%08lX ", top); + + top = (top - envsz) & ~0xF; + s = (char *)top; + ss = fwenv; + + /* now copy them */ + for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) { + for (nxt = i; env_get_char(nxt) != '\0'; ++nxt) + ; + *ss++ = s; + for (j = i; j < nxt; ++j) + *s++ = env_get_char(j); + *s++ = '\0'; + } + *ss++ = NULL; /* terminate */ + + entry = (void (*)(bd_t *, char *, char **, ulong))ntohl(hdr->ih_ep); + (*entry)(kbd, cmdline, fwenv, top); +} +#endif + + #if (CONFIG_COMMANDS & CFG_CMD_BOOTD) int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -826,6 +918,7 @@ case IH_OS_VXWORKS: os = "VxWorks"; break; case IH_OS_QNX: os = "QNX"; break; case IH_OS_U_BOOT: os = "U-Boot"; break; + case IH_OS_ARTOS: os = "ARTOS"; break; default: os = "Unknown OS"; break; } diff -ruNb u-boot-0.3.0-orig/include/image.h u-boot-0.3.0/include/image.h --- u-boot-0.3.0-orig/include/image.h Wed Apr 16 10:56:20 2003 +++ u-boot-0.3.0/include/image.h Wed Apr 16 10:56:51 2003 @@ -45,6 +45,7 @@ #define IH_OS_PSOS 15 /* pSOS */ #define IH_OS_QNX 16 /* QNX */ #define IH_OS_U_BOOT 17 /* Firmware */ +#define IH_OS_ARTOS 18 /* ARTOS */ /* * CPU Architecture Codes (supported by Linux) diff -ruNb u-boot-0.3.0-orig/tools/mkimage.c u-boot-0.3.0/tools/mkimage.c --- u-boot-0.3.0-orig/tools/mkimage.c Wed Apr 16 10:56:20 2003 +++ u-boot-0.3.0/tools/mkimage.c Wed Apr 16 10:56:51 2003 @@ -92,6 +92,7 @@ { IH_OS_PSOS, "psos", "pSOS", }, { IH_OS_QNX, "qnx", "QNX", }, { IH_OS_U_BOOT, "u-boot", "U-Boot", }, + { IH_OS_ARTOS, "artos", "ARTOS", }, { -1, "", "", }, };

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[U-Boot-Users] [PATCH] Support for new I2C RTC
by Steven Scholz 20 May '03

20 May '03

Hi there, the attached patch adds support for a I2C RTC DS1338 for Dallas/Maxim. DS1307 and DS1338 are basicly the same, they only differ in their supply voltage. * Patches by Steven Scholz, 11 Apr 2003 - Add support for RTC DS1338 Cheers, Steven Index: README =================================================================== RCS file: /home/cvsroot/u-boot/README,v retrieving revision 1.1.1.1 diff -p -u -r1.1.1.1 README --- README 5 Apr 2003 00:13:43 -0000 1.1.1.1 +++ README 11 Apr 2003 10:42:22 -0000 @@ -638,6 +638,7 @@ The following options need to be configu CONFIG_RTC_MC146818 - use MC146818 RTC CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC + CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC CONFIG_RTC_DS164x - use Dallas DS164x RTC - Timestamp Support: Index: rtc/ds1307.c =================================================================== RCS file: /home/cvsroot/u-boot/rtc/ds1307.c,v retrieving revision 1.1.1.1 diff -p -u -r1.1.1.1 ds1307.c --- rtc/ds1307.c 6 Mar 2003 21:26:28 -0000 1.1.1.1 +++ rtc/ds1307.c 10 Apr 2003 11:27:09 -0000 @@ -25,7 +25,7 @@ /* * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) - * DS1307 Real Time Clock (RTC). + * DS1307 and DS1338 Real Time Clock (RTC). * * based on ds1337.c */ @@ -35,7 +35,8 @@ #include <rtc.h> #include <i2c.h> -#if defined(CONFIG_RTC_DS1307) && (CONFIG_COMMANDS & CFG_CMD_DATE) +#if (defined(CONFIG_RTC_DS1307) || defined(CONFIG_RTC_DS1338) ) && \ + (CONFIG_COMMANDS & CFG_CMD_DATE) /*---------------------------------------------------------------------*/ #undef DEBUG_RTC @@ -200,4 +201,4 @@ static unsigned char bin2bcd (unsigned i return (((n / 10) << 4) | (n % 10)); } -#endif /* CONFIG_RTC_DS1307 && (CFG_COMMANDS & CFG_CMD_DATE) */ +#endif /* (CONFIG_RTC_DS1307 || CONFIG_RTC_DS1338) && (CFG_COMMANDS & CFG_CMD_DATE) */

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[U-Boot-Users] Loading from a CF card on the PCMCIA interface A P atch
by Rod Boyce 20 May '03

20 May '03

All, I have figured out my problem and have created a patch file to patch the file part_doc.c. This patch allows the command diskboot command to read from a partition inside an extended partition. <<part_dos.tar.gz>> Regards, Rod Boyce.

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[U-Boot-Users] Patch to allow CFG_NO_FLASH & CFG_LOADS.
by Christophe.LINDHEIMER＠fr.thalesgroup.com 20 May '03

20 May '03

Hi. A little patch to allow the use of CFG_NO_FLASH & CFG_LOADS. Chris. --- u-boot-0.3.0/common/cmd_boot.c 2003-04-07 10:39:32.000000000 +0200 +++ u-boot-0.3.1/common/cmd_boot.c 2003-05-20 10:27:48.000000000 +0200 @@ -332,6 +332,7 @@ load_serial (ulong offset) case SREC_DATA3: case SREC_DATA4: store_addr = addr + offset; +#ifndef CFG_NO_FLASH if (addr2info(store_addr)) { int rc; @@ -340,9 +341,14 @@ load_serial (ulong offset) flash_perror (rc); return (~0); } - } else { + } else + + { +#endif memcpy ((char *)(store_addr), binbuf, binlen); - } +#ifndef CFG_NO_FLASH + } +#endif if ((store_addr) < start_addr) start_addr = store_addr; if ((store_addr + binlen - 1) > end_addr)

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[U-Boot-Users] QNX
by Rune Torgersen 20 May '03

20 May '03

Hi Does anybody know how to get a QNX image to boot using u-boot (QNX 6.2.1) Rune Torgersen Software Developer Innovative Systems 1000 Innovative Drive Mitchell, SD 57301 Phone: 605-995-6120 Fax: 605-995-0084 email: runet(a)innovsys.com www.innovsys.com

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RE: [U-Boot-Users] Please explain this code in drivers/pci.c
by Rune Torgersen 20 May '03

20 May '03

>Subject: [U-Boot-Users] Please explain this code in drivers/pci.c >The value of bar_response is 0xffff8008 which looks good. This gives bar size of >0x8000 which also looks good. The value of mem is initially 0x90000000. So, >(mem - 1) = 0x8fffffff and (bar_size - 1) = 0x7fff). When these are or'd one gets >0x8fffffff and adding 1 gives 0x90000000. This result is that the card is given 4 >address bases all at 0x90000000. If the card wants 4 different memory regiuons, I assume it has 4 BAR registers? Each BAR must have the correct base address, so you have to add the size of the last region to the memory pointer before writing the address to the next BAR

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[U-Boot-Users] [PATCH] MPC8266ADS PCI support
by Rune Torgersen 19 May '03

19 May '03

Rune Torgersen Software Developer Innovative Systems 1000 Innovative Drive Mitchell, SD 57301 Phone: 605-995-6120 Fax: 605-995-0084 email: runet(a)innovsys.com www.innovsys.com

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[U-Boot-Users] Please explain this code in drivers/pci.c
by Donald White 19 May '03

19 May '03

Group, Please help me to understand the following code. It occurs in drivers/pci.c in the function pci_hose_config_device(). I have ported U-Boot 0.3.0 and HHL 2.0 to our custom MPC8265A board. It has one device on the PCI bus. The driver develop was wanting a specific memory space allocation for the device. So I created a PCI configuration table with the memory base of 0x90000000. The card wants 4 regions 0f 0x8000 bytes in size. The driver writer thinks this should be 0x90000000, 0x90008000, 0x90010000 and 0x90018000. This brings us to the code snippet: bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; bar_value = mem; mem = ((mem - 1) | (bar_size - 1)) + 1; The value of bar_response is 0xffff8008 which looks good. This gives bar size of 0x8000 which also looks good. The value of mem is initially 0x90000000. So, (mem - 1) = 0x8fffffff and (bar_size - 1) = 0x7fff). When these are or'd one gets 0x8fffffff and adding 1 gives 0x90000000. This result is that the card is given 4 address bases all at 0x90000000. Thanks for any help, Don

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RE: [U-Boot-Users] U-boot for 8245 boards
by Karoliya, Abhishek 18 May '03

18 May '03

Thanks Chris for the message but that isnt the case really. On startup ,typing INFO does give "COP freeze (startup)" but on typing ti gives "trace" and typing go gives "TARGET : entered Debug state " and than typing info Debug entry cause gives <reserved 0>. thanks Abhishek -----Original Message----- From: Chris Hallinan [mailto:clh@net1plus.com] Sent: Saturday, 17 May 2003 12:58 AM To: Karoliya, Abhishek; u-boot-users(a)lists.sourceforge.net Cc: u-boot-users(a)lists.sourceforge.net Subject: RE: [U-Boot-Users] U-boot for 8245 boards Abhishek Karoliya wrote: > I am trying to port U-boot to a customised 8245 board . > For the Initial bring up , I am using a working U-Boot > for another very > similar board. The problem is that, using > BDI 2000 debugger , The telnet Interface reports it to be > at reset address > fff0 0100 all the time and no amount of ti or go works > When I use gdb it also reports it to be stuck there and a > step command > results in gdb reporting that a stop signal received . > I tried setting break points ahead but no use. > > The BDI set-up is working as i tried it with working > image of vxWorks loader > bootrom. This does not necessarily indicate your setup is correct, which it likely isn't. When you do an 'info' command from Telnet, after typing 'ti' or 'go', do you see "Debug entry cause " COP freeze (startup)? This generally indicates that the 8245 has entered check stop state due to a hardware/configuration/setup/procesor initialization issue. You will have to debug it. Regards, Chris Hallinan DS4.COM, Inc

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[U-Boot-Users] MPC86xADS support
by Nye Liu 17 May '03

17 May '03

I just recieved the MPC86xADS eval board... anybody here have experience with it? -- Nye Liu nliu(a)mrv.com (818) 772-6235x248 "Who would be stupid enough to quote a fictitious character?" -- Don Quixote

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[U-Boot-Users] About define CFG_CMD_LOADS and CFG_NO_FLASH.
by Christophe.LINDHEIMER＠fr.thalesgroup.com 17 May '03

17 May '03

Hi. Why can't I use CFG_CMD_LOADS & CFG_NO_FLASH. It doesn't compile because load_serial function ( in cmd_boot.c ) needs some function for flash access ( not sure to understand why ... ) Need to add #ifndef CFG_NO_FLASH in load_serial ?? Thanks Chris

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[U-Boot-Users] U-boot for 8245 boards
by Karoliya, Abhishek 16 May '03

16 May '03

Hi, I am trying to port U-boot to a customised 8245 board . For the Initial bring up , I am using a working U-Boot for another very similar board. The problem is that, using BDI 2000 debugger , The telnet Interface reports it to be at reset address fff0 0100 all the time and no amount of ti or go works When I use gdb it also reports it to be stuck there and a step command results in gdb reporting that a stop signal received . I tried setting break points ahead but no use. The BDI set-up is working as i tried it with working image of vxWorks loader bootrom. Am I missing anything in u-boot compilation or anything to BDI to work or some problem with the code. Please illuminate... Thanks Abhishek

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[U-Boot-Users] About ColdFire port
by Ales Makarov 16 May '03

16 May '03

Some time ago there was some ColdFire port (5272 only) of PPCBoot from Bernhard Kuhn. I haven't chance to try it, but I was very statisfied with PPCBoot on PPC405. Now we play with ColdFire 5407 and it would be nice to have the U-Boot here. How is it with ColdFire port of U-Boot? Thanks. Ales

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[U-Boot-Users] linux image
by Nghiem, Tien 15 May '03

15 May '03

Hi everyone, I try to build a linux image for the MPC8260ADS: # cd <patch>/linux-2.4 # make MPC8260ADS_config I got the following error: # make MPC8260ADS_config make: *** No rule to make target `MPC8260ADS_config'. Stop. I got the same error if I did : # make ep8260_config make: *** No rule to make target `ep8260_config'. Stop. Could you tell me what I miss here? Thank you Tien Nghiem

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[U-Boot-Users] The problem on porting to similar FADS860 board
by John 15 May '03

15 May '03

Hello list! I've checked the archives, but have not found anyone using the 860 with my problem. I have a MPC860 board ported from FADS860 board. ( TEXT_BASE is also 0x2800000, but IMMR is 0x2200000). I have vxworks run OK on it. But when I am porting U-Boot on it. I met booting problem on it. For Example as following: (ELDK1.0 + U-boot-0.3.0) -------------------------------------------------------- located in /cpu/mpc8xx/start.S .globl _start .extern testLed _start: lis r3, 0x220 /* my IMMR addr is 0x2200000 */ ori r3, r3, 0x0000 mtspr 638, r3 /*IMMR SPR is 638*/ bl testLed /* this is to light LEDs on board(PA0 - PA3)*/ ---------------------------------------------------------- located in /cpu/mpc8xx/cpu_init.c void testLed(void) { int i,k; for(k=0;k<5;k++) { * ( (volatile unsigned short *) (0x2200000 + 0x950) ) = 0xA000; /* light LED */ for (i=0; i<0xFFFF;i++) {;}; * ( (volatile unsigned short *) (0x2200000 + 0x950) ) = 0x0000; /* unlight LED */ for (i=0; i<0xFFFF;i++) {;}; }; }; When I build to *.bin and burn into bootrom flash, after power on, the LEDs of board are not lighting. But, I tested these codes under Vxworks Bootrom code (rominit.S), that's OK. maybe it is linking problem? I 'm confused. Could you like to help me or give me any comments ? Thanks in advance! John

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[U-Boot-Users] 8260 64 bit access
by Rune Torgersen 15 May '03

15 May '03

Anybody know a efficient way of doing 64 bit loads, stores and compares? (on a 826x) I am doing a March-C based memory test, and need to get the number of instructions used in the loops down as much as possible. Rune Torgersen Software Developer Innovative Systems 1000 Innovative Drive Mitchell, SD 57301 Phone: 605-995-6120 Fax: 605-995-0084 email: runet(a)innovsys.com www.innovsys.com

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Re: [U-Boot-Users] [mpc8250 pci]
by Wolfgang Denk 15 May '03

15 May '03

In message <002201bf8dc4$b8309000$240110ac@jsbae> you wrote: > This is a multi-part message in MIME format. > > ------=_NextPart_000_001F_01BF8E10.27DEFF90 > Content-Type: text/plain; > charset="Windows-1252" > Content-Transfer-Encoding: base64 > > SGFzIGFueW9uZSBkb25lIGFueSB3b3JrIHdpdGggVS1Cb290IG9yIGxpbnV4IGtlcm5lbCBvbiBt > cGM4MjUwIHByb2Nlc3Nvcj8NCkNhbiBhbnlib2R5IGV4cGxhaW4gbWUgODI1MCBwY2kgYnJpZGdl > IHNldHRpbmcgZm9yIGluaXRpYWwgLi4uLg0KaSB1c2UgTW9udGF2aXN0YSBMaW51eCBrZXJuZWwg ... Please do not post base64 encoded messages. Post plain text only. > ------=_NextPart_000_001F_01BF8E10.27DEFF90 > Content-Type: text/html; > charset="Windows-1252" > Content-Transfer-Encoding: base64 > > PCFET0NUWVBFIEhUTUwgUFVCTElDICItLy9XM0MvL0RURCBIVE1MIDQuMCBUcmFuc2l0aW9uYWwv > L0VOIj4NCjxIVE1MPjxIRUFEPg0KPE1FVEEgaHR0cC1lcXVpdj1Db250ZW50LVR5cGUgY29udGVu ... Please no not post HTML. Please do not post base64 encoded messages. Post plain text only. Message unreadable, ignored. Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de Winners never talk about glorious victories. That's because they're the ones who see what the battlefield looks like afterwards. It's only the losers who have glorious victories. - Terry Pratchett, _Small Gods_

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RE: [U-Boot-Users] [mpc8250 pci]
by Rune Torgersen 15 May '03

15 May '03

Should be very similar to the 8265 and 8266 (since they are using the 8250 init function) You could also try some of the existing board configs that use 8250. -----Original Message----- From: ??? [mailto:jsbae@imctech.co.kr] Sent: Tuesday, March 14, 2000 8:51 AM To: U-BOOT Subject: [U-Boot-Users] [mpc8250 pci] Has anyone done any work with U-Boot or linux kernel on mpc8250 processor? Can anybody explain me 8250 pci bridge setting for initial .... i use Montavista Linux kernel 2.4.17 ..but this kernel is referenced ep8260board... this kernel not consideration to pic bridge .. **************************************************************************** ******* ??? (? ? ?) (?)IMC?? ????? ??2? ??:042-822-3486 ??:042-822-3483 ????: 019-434-2975 Jang-Sik Bae R&D Development Team 2 IMC Tech Co.,Ltd. Korea Tel:+82-42-822-3486 FAX:+82-42-822-3483 Mobile:+82-19-434-2975 E-mail : jsbae(a)imctech.co.kr <mailto:jsbae@imctech.co.kr> MSN ID : Feb_Overset(a)hotmail.com <mailto:Feb_Overset@hotmail.com> **************************************************************************** *******

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[U-Boot-Users] U-Boot on Alchemy AU1000
by Chris Hallinan 15 May '03

15 May '03

Has anyone done any work with U-Boot on the AU1000 processor? I would like to understand the level of effort required to port U-Boot to a board based on this processor. I am intimately familiar with PPCBoot/U-Boot on PowerPC platforms and numerous PPC implementations. However, I'm just starting the climb up the 'MIPS' learning curve. :) According to the AMD documentation, the AU1000 is based in the 'MIPS32' instruction set/architecture, which I presume is different from R3000/R4000 for which I see some level of support in the current U-Boot release. Grepping through a recent Linux source tree, I do see there is a specific CONFIG_CPU_* for MIPS32, and I've taken a brief look at where this is used. Specifically MMU and some CPU features appear to be handled differently from R3K/4K. I'd appreciate any input/feedback on what would be required to add support in U-Boot for this processor/architecture. Thanks in advance, Chris Hallinan DS4.COM, Inc.

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[U-Boot-Users] SDRAM I2C Rom contents
by Roel Loeffen 15 May '03

15 May '03

Hello, I'm compiling U-Boot for the EVB64260, which reads the SDRAM settings from a I2C rom. We've build our own board an also the I2C Rom is installed. Where can I find what the I2C Rom contents layout should be for SDRAM information? Thx Roel

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[U-Boot-Users] use and syntax of "=r"
by Paul,Kunal 15 May '03

15 May '03

hi all, i came across "=r" in the code of u-boot many times...can anybody explain me its use... i have been trying to copy a variable to SPR...will this help me.. thnx, kunal

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[U-Boot-Users] patch to support intel e1000 family
by Mark Rakes 14 May '03

14 May '03

Wolfgang, etc. this patch adds support for Intel e1000 gig cards. Tested in u-boot with Sandpoint 8245 and the PRO/1000 MT Copper card (82546-based) and in ppcboot against that card, and its 82546 fiber equivalent. ran Lindent :) ran MAKEALL. did a diff against top of CVS. let me know if I need to make any patch modifications. enjoy, -mark rakes CHANGELOG entry: * Patch by Mark Rakes, 14 May 2003: Add e1000 driver

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[U-Boot-Users] adding a command to write to regiters
by Paul,Kunal 14 May '03

14 May '03

hello all, i am workin on a custom board.i want to add commands for writing and reading to/from the CPU n PHY registers... can someone help me by telling me what all is required to be done...also i want to add a command to read and write boot n user flashes.... i need help on both. thnx... regards, kunal

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[U-Boot-Users] using both AMD n Intel sync strata flashes on a board
by Paul,Kunal 14 May '03

14 May '03

hi all, i have a custom board wherein i am using an AMD flash as the bootflash and an INTEL synchronous strata flash(K3 n K18) as the user flash...can anybody help me with hoe to go about porting the u-boot for both... thnx, regards, kunal

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[U-Boot-Users] walnut board
by Iser Flaum 14 May '03

14 May '03

first time user trying to run clone variation of the walnut bd. IBM demo board flash binary image (using PROM burner) runs (although having LAN problems to be debugged), and talks to the serial console ok. when trying to build the IBM provided source and makefile for this target, does not work (at least does not talk to console). already found one needed correction to the makefile.mak file .... the hbranch utility specified a wrong size flash (0x20000) instead of 0x80000 (512kB flash both on walnut demo and my clone). seeking information of other makefile.mak problems which may need correcting. it seems that the reset_entry block is being loaded at 0x2020 instead of 0x62020 (near the top of the flash). are there other alternative boot source/build tools available to get my board working? Iser Flaum (562) 926-6727 x113 iser(a)corelis.com

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Re: [U-Boot-Users] IBM 440GP Ebony board: Gigabit ethernet adapter
by Mark Rakes 14 May '03

14 May '03

I "ported" a polling-based driver from the Etherboot project, which in turn had ported it from the Intel Linux (interrupt-based) driver. I've used it with both the 82546-based Dual Gig Copper adapter (pro/1000 MT) and the 82546-based Dual Gig Fiber adapter (don't know the model # off hand). We don't have a 64 bit environment, and we don't do PCI-X, so I'm not sure what that part will take, but this should be a start, hopefully... good luck, -m On Tuesday, May 13, 2003, at 03:33 PM, Dhanuka, Anupam wrote: > Hi Mark > > Thanks for your response. > > I am not sure what you mean when you say "via Etherboot via Linux Intel > Driver". Could you elaborate? > > Is the e1000 same as the Server Adapter (I want to use 64 bits)? What > would the differences be for PCI-x support? > > I am sorry but I am fairly new to this Boot Loader area. I am not used > to the terminology yet. > > Thanks > > Anupam > > > > -----Original Message----- > From: Mark Rakes [mailto:mrakes@vivato.net] > > I have a working e1000 driver (via Etherboot via Linux Intel driver) > for ppcboot on PCI (not PCI-X). > > I haven't submitted it back to the list as we're still using ppcboot > 2.0 and I hadn't taken the time to do the "port" the driver to u-boot > yet. > > I'll try to do that in today, if I can... > > no promises on pci-x, though... > -Mark > > > On Tuesday, May 13, 2003, at 02:26 PM, Wolfgang Denk wrote: > >> Dear Anupam, >> >> in message <2692A548B75777458914AC89297DD7DA021CCCC6(a)bronze.dolby.net> > >> you wrote: >>> >>> I have the IBM "Ebony' reference board with IBM 440GP processor. I >>> want >>> to use the Intel 1000/MT Gigabit Server Adapter as a network > interface >>> to load the OS image over the network. The adapter is connected to > the >>> PCI-X slot. I was wondering if U-boot has support for such an >> >> No,not yet (AFAIK). >> >>> arrangement. If not then where can I find more help and if I were to >>> develop the driver for this adapter myself, then how feasible would > it >>> be. >> >> It's a routine job for some of the developers on this list, and out >> of reach for others. Sorry, but I don't know your level of >> experience.

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[U-Boot-Users] IBM 440GP Ebony board: Gigabit ethernet adapter
by Dhanuka, Anupam 13 May '03

13 May '03

Hi all I have the IBM "Ebony' reference board with IBM 440GP processor. I want to use the Intel 1000/MT Gigabit Server Adapter as a network interface to load the OS image over the network. The adapter is connected to the PCI-X slot. I was wondering if U-boot has support for such an arrangement. If not then where can I find more help and if I were to develop the driver for this adapter myself, then how feasible would it be. Help will be extremely appreciated. Anupam This message (including any attachments) may contain confidential information intended for a specific individual and purpose. If you are not the intended recipient, delete this message. If you are not the intended recipient, disclosing, copying, distributing, or taking any action based on this message is strictly prohibited.

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RE: [U-Boot-Users] strataflash.c
by Tom Guilliams 13 May '03

13 May '03

In a x16 device in x8 mode, the portwidth should be 1. However, CFI detection in strataflash.c will not work in this mode. It will look for the CFI QRY at 0x10, 0x11, 0x12 offsets when they're actually at double that offset (portwidth = 2). I agree that the portwidth is not be used correctly in the case of a x16 device in x8 mode. For the meantime, the hack I've made will sustain me until I or someone else can add support for this chipset mode to the driver. Tom -----Original Message----- From: Frank Smith [mailto:smith@amirix.com] Sent: Sunday, May 11, 2003 4:51 PM To: Tom Guilliams; u-boot-users(a)lists.sourceforge.net Cc: Frank Smith Subject: Re: [U-Boot-Users] strataflash.c Hi, The more I look into strataflash.c, the more I'm starting to think that it doesn't support x16 devices in x8 mode. The problem I see is that the 'portwidth' value is used to drive two things -- offset multiplier, and side of data reads/writes to the flash device. On a pure x16 device, the offset multiplier is 2 and the size of the data read/writes is 2. So portwidth is 2. On an x16 device in x8 mode, however, the offset multiplier is 2, but the size of data read/writes is 1. What should portwidth be...? I think the offset multiplier and size of data read/writes should be driven by *different* values. Or am I overlooking something obvious? Thanks, Frank. ----- Original Message ----- From: "Tom Guilliams" <tguilliams(a)sbs.com> To: "'Frank Smith'" <smith(a)amirix.com>; <u-boot-users(a)lists.sourceforge.net> Sent: Friday, May 09, 2003 7:14 PM Subject: RE: [U-Boot-Users] strataflash.c > Frank, > > I can tell you I've had some problems with a x16 in x8 mode in > strataflash.c. Basically, the flash_detect_cfi() routine detects my > E28F128J3A chip as portwidth 2 (x16) and chipwidth 1 (x8). All the > CFI info > is read correctly. However, any write accesses to chip (programming > or > erasing) fail upon the calculated offset (it's incorrectly doubled because > of portwidth being 2). > > I had to manually force the portwidth to 1 (x8) after the > flash_get_size() routine to make everything behave for any flash > operations. > > I don't think the "detect" logic is correct in terms of port and chip width > for "some" devices. However, the author - Brad Kemp - has said he's > had success on numerous other flash width devices. > > Your problem sounds exactly like mine. For a hack fix, set > > info->portwidth = 1; > > for the last thing flash_get_size() does before returning the size. > > Tom > > -----Original Message----- > From: Frank Smith [mailto:smith@amirix.com] > Sent: Friday, May 09, 2003 1:00 PM > To: u-boot-users(a)lists.sourceforge.net > Subject: [U-Boot-Users] strataflash.c > > > > Hello, > > I have a board with a couple of Intel RC28F320J3A Strataflash devices. One > device is wired to x16 mode, the other to x8 mode. > > I'm trying to use the strataflash.c driver with these flash chips. > The driver detects the flash that's in x16 mode, but not the one in x8 > mode. So I'm digging through the code to try to figure out what's up. > I've been successful in avoiding dealing with flash programming code > up until now in my life..... > > If anyone knows anything about whether strataflash.c was designed to > work with x16 devices in x8 mode, I'd love to hear from you! From what > I've seen > so far, I'm tending to think that it doesn't. > > > Thanks, > Frank. > > > ------------------------------------------------------- > Enterprise Linux Forum Conference & Expo, June 4-6, 2003, Santa Clara > The only event dedicated to issues related to Linux enterprise > solutions www.enterpriselinuxforum.com > > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users > > > ------------------------------------------------------- > Enterprise Linux Forum Conference & Expo, June 4-6, 2003, Santa Clara > The only event dedicated to issues related to Linux enterprise > solutions www.enterpriselinuxforum.com > > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users >

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RE: [U-Boot-Users] StrataFlash on PrPMC800
by Brad Kemp 13 May '03

13 May '03

Try ppmc8260/strataflash.c it autodetects the chip and port width Brad -----Original Message----- From: Mark.Lightfoot(a)sita.aero [mailto:Mark.Lightfoot@sita.aero] Sent: Tue 5/13/2003 2:13 PM To: u-boot-users(a)lists.sourceforge.net Cc: Subject: [U-Boot-Users] StrataFlash on PrPMC800 Hello, I've been working on a port of U-Boot for the Motorola PrPMC800 and I've come up against my first obstacle, CFI detection of the flash. The board implements two Intel 28F128J3 devices which, according to Motorola documentation, are each 8 bits wide residing on a 16 bit wide bus. I take that to mean they are interleaved to form a virtual 16 bit wide device. I've already taken care of mapping the devices into the CPU's address space. I borrowed the source code for flash support from the EVB64260 but it didn't work. It fails because it can determine the manufacture code Do any of the supported boards already support devices in a similar configuration? Could the source code possibly be reused for the PrPMC800? I don't know anything about how CFI works so I'm trying to avoid doing it from scratch. From the looks of it, it shouldn't be necessary to reinvent the wheel. But, if I've to start from scratch, anyone know of a good CFI tutorial. I've got the JEDEC docs but can make much of them yet. Regards, Mark. ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>< Mark Lightfoot - Software Designer - SITA 777 Walker's Line, Burlington, Ontario, Canada, L7N 2G1 905-681-5575 mark.lightfoot(a)sita.aero ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>< ------------------------------------------------------- Enterprise Linux Forum Conference & Expo, June 4-6, 2003, Santa Clara The only event dedicated to issues related to Linux enterprise solutions www.enterpriselinuxforum.com _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] StrataFlash on PrPMC800
by Mark.Lightfoot＠sita.aero 13 May '03

13 May '03

Hello, I've been working on a port of U-Boot for the Motorola PrPMC800 and I've come up against my first obstacle, CFI detection of the flash. The board implements two Intel 28F128J3 devices which, according to Motorola documentation, are each 8 bits wide residing on a 16 bit wide bus. I take that to mean they are interleaved to form a virtual 16 bit wide device. I've already taken care of mapping the devices into the CPU's address space. I borrowed the source code for flash support from the EVB64260 but it didn't work. It fails because it can determine the manufacture code Do any of the supported boards already support devices in a similar configuration? Could the source code possibly be reused for the PrPMC800? I don't know anything about how CFI works so I'm trying to avoid doing it from scratch. From the looks of it, it shouldn't be necessary to reinvent the wheel. But, if I've to start from scratch, anyone know of a good CFI tutorial. I've got the JEDEC docs but can make much of them yet. Regards, Mark. ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>< Mark Lightfoot - Software Designer - SITA 777 Walker's Line, Burlington, Ontario, Canada, L7N 2G1 905-681-5575 mark.lightfoot(a)sita.aero ><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><><

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[U-Boot-Users] How to debug u-boot?
by huasee 13 May '03

13 May '03

hi, How to debug u-boot?Is it necessarily to use emluator e.g.BDI2000? Can I use some software to debug (just as kgdb?)

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[U-Boot-Users] porting problem on porting to similar FADS860 board
by John 12 May '03

12 May '03

Hello list! I've checked the archives, but have not found anyone using the 860 with my problem. I have a MPC860 board ported from FADS860 board. ( TEXT_BASE is also 0x2800000, but IMMR is 0x2200000). I have vxworks run OK on it. But when I am porting U-Boot on it. I met booting problem on it. For Example as following: (ELDK1.0 + U-boot-0.3.0) ---------------------------------------------------------------------------------------- located in /cpu/mpc8xx/start.S .globl _start .extern testLed _start: lis r3, 0x220 /* my IMMR addr is 0x2200000 */ ori r3, r3, 0x0000 mtspr 638, r3 /*IMMR SPR is 638*/ bl testLed /* this is to light LEDs on board(PA0 - PA3)*/ ---------------------------------------------------------------------------------------- located in /cpu/mpc8xx/cpu_init.c void testLed(void) { int i,k; for(k=0;k<5;k++) { * ( (volatile unsigned short *) (0x2200000 + 0x950) ) = 0xA000; /* light LED */ for (i=0; i<0xFFFF;i++) {;}; * ( (volatile unsigned short *) (0x2200000 + 0x950) ) = 0x0000; /* unlight LED */ for (i=0; i<0xFFFF;i++) {;}; }; }; When I build to *.bin and burn into bootrom flash, after power on, the LEDs of board are not lighting. But, I tested these codes under Vxworks Bootrom code (rominit.S), that's OK. maybe it is linking problem? I 'm confused. Could you like to help me or give me any comments ? Thanks in advance! John

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[U-Boot-Users] linux doesn't boot when CS for initial cache disabled
by Thomas Schäfer 12 May '03

12 May '03

Here is what I did: I'm testing with an IBM Walnut board (PPC405GP) with u-boot 0.3.0 and 2.4.17 kernel from Montavista. After booting u-boot and loading the kernel via tftp, I submit the following commands on the console: => setdcr 12 0012: 00000004 ? 7 0012: 00000007 ? . => setdcr 13 0013: 400da000 ? 0 0013: 00000000 ? . This disables CS7, which is used for the temporary stack in my configuration. The kernel function start_here (arch/ppc/kernel/head_4xx.S) is the place where the MMU is used first. Setting a breakpoint (in my case at 0xc00022d0) and trying to trace from this point with my BDI2000 results in a data machine check interrupt: BDI>bi 0xc00022d0 Breakpoint identification is 0 BDI>go - TARGET: target has entered debug mode BDI>info Target state : debug mode Debug entry cause : instruction breakpoint Current PC : 0xc00022d0 Current CR : 0x24004004 Current MSR : 0x00001030 Current LR : 0x0000001c BDI>ti Target state : debug mode Debug entry cause : JTAG stop request Current PC : 0x00000280 Current CR : 0x28004004 Current MSR : 0x00000000 Current LR : 0xc0002b34 # Step timeout detected BDI> Unfortunately I have no idea why this happens. Looking at the register contents I found that the address of the temporary stack (0x40000000) is still stored in r2, but this should have no effect on booting the kernel??? BDI>rd GPR00: c00022d0 07f9f5e8 40000000 c10003c0 GPR04: c0000000 00000000 007ffc00 007ffc0e GPR08: 07fc9f10 000186a0 00000003 00000002 GPR12: 00000000 c01605b0 07fe5800 00000000 GPR16: 00000001 007ffc0e 007ffc00 ffffffff GPR20: 00000000 07fe2398 07f9fe88 00000002 GPR24: 00000000 00000000 007ffb90 007ffc0e GPR28: 007ffc00 00000000 00000000 007ffb90 CR : 24004004 MSR: 00001030 BDI> Any ideas? Best regards, Thomas Schaefer ____________________________________ GIGA STREAM - UMTS Technologies GmbH Konrad-Zuse-Str. 7 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: tschaefer(a)giga-stream.de

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RE: [U-Boot-Users] Change file location
by Rune Torgersen 12 May '03

12 May '03

>> There is currently a huge cludge, because the /cpu/mpc8260/pci.c is >> different for different boards based on the 826x cpu's. > >Oops?? We use the current version of cpu/mpc8260/pci.c omn several >boards already, without #ifdef's. > >> The better solution would be to move this file into the board specific >> directories. >> If not, I would have to do #ifdef around the whole file. > >Can you please explain why you think this is a board specific file? Because the PCI Maemory and IO map is defined there, and it does depend a bit on how you want the board set up. I guess it can be used for multiple boards if the memory map should be the same. I know the reason Andy changed the pci.c memory map, was to get a simpler memory layout in linux. Here is his motivation for changing it: * This file is a bit of a problem since the PCI memory map is hardcoded here in code common to all MPC8260 targets, but one memory map may not necessarily be appropriate for all targets. For now I just changed the hardcoded memory map to one that I like better. This probably broke the PM826 u-boot port. The memory map definition could be #ifdef'd for each board, or the memory map definition could be moved to the board configuration header file. My motivation here was to move the PCI I/O space from 0xA0000000 to 0xF4000000. Having all the I/O regions above 0xF0000000 allows Linux to efficiently map them all with one BAT register.

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RE: [U-Boot-Users] MMU setup in u-boot
by Jerry Van Baren 12 May '03

12 May '03

Sorry, you will have to go complex if you want to reach all your memory. gvb At 12:29 PM 5/12/2003 -0400, johny122(a)hotmail.com wrote: >Hi, > >Our processor is MPC7450. We have only one BAT left to setup SDRAM. The >other three BAT are used for L3, flash and PCI, and we have 1G memory. I am >thinking about using Page Address Translation method using hashing functions >as described in the Motorola green book. This method is quite complicated >and I dont know where to start with. Any of your feed back is appreciated. > >Thanks. ********************************************************************** This e-mail and any files transmitted with it may be confidential and may be legally privileged or otherwise exempt from disclosure under applicable law. This e-mail and its files are intended solely for the individual or entity to whom they are addressed and their content is the property of Smiths Aerospace. If you are not the intended recipient, please do not read, copy, use or disclose this communication. If you have received this e-mail in error please notify the e-mail administrator at postmaster(a)smiths-aerospace.com and then delete this e-mail, its files and any copies. This footnote also confirms that this e-mail message has been scanned for the presence of known computer viruses. Smiths addresses are changing! The new addresses are of the form firstname.lastname(a)smiths-aerospace.com. Please update your address books! Please begin using the new form immediately. ***********************************************************************

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[U-Boot-Users] MMU setup in u-boot
by john ashfield 12 May '03

12 May '03

Hi, u-boot setups MMU for maximum of 256M memory using Block Address Translation. Do you have any idea how to setup MMU for more than 256M (for example 1G of memory)? Thanks _________________________________________________________________ Help STOP SPAM with the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail

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RE: [U-Boot-Users] MMU setup in u-boot
by john ashfield 12 May '03

12 May '03

Hi, Our processor is MPC7450. We have only one BAT left to setup SDRAM. The other three BAT are used for L3, flash and PCI, and we have 1G memory. I am thinking about using Page Address Translation method using hashing functions as described in the Motorola green book. This method is quite complicated and I dont know where to start with. Any of your feed back is appreciated. Thanks. _________________________________________________________________ The new MSN 8: smart spam protection and 2 months FREE* http://join.msn.com/?page=features/junkmail

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[U-Boot-Users] ARM & Ethernet PHY ???
by Steven Scholz 12 May '03

12 May '03

Hi there, is there support for the LXT971 Ethernet PHY on ATM920T based boards ??? How about arm-linux? Thanks a million, Steven

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[U-Boot-Users] Re: what means this symbol "@"?
by Wells, Charles 12 May '03

12 May '03

>I've never figured out why someone would want to use addi instead of ori in >the second instruction of the load sequence. > >gvb Jerry, The only authoritative explanation I've seen comes from IBM's _The_PowerPC_Compiler_Writer's_Guide_; Steve Hoxey, et.al., 1/1996. Section 3.2.3.1 (p. 48-49) is entitled Loading a Constant into a Register. After discussing the different techniques, they say: "The add instructions are preferred to logical instructions because future PowerPC implementations may have a three-input adder, which permits executing the preceding two instructions (and other forms of add-feeding-add) in parallel, even though they are not independent." If your hand-crafted assembly language is being used to optimize an inner loop, then it may make a difference. If it's used in some one-time initialization code, it doesn't matter. BTW, the CWG is a wonderfully entertaining resource for folks that want to better understand the PowerPC architecture. It's available at: <http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF77852 56996007558C6> Regards, Charlie

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RE: [U-Boot-Users] strataflash.c
by Tom Guilliams 12 May '03

12 May '03

Frank, I can tell you I've had some problems with a x16 in x8 mode in strataflash.c. Basically, the flash_detect_cfi() routine detects my E28F128J3A chip as portwidth 2 (x16) and chipwidth 1 (x8). All the CFI info is read correctly. However, any write accesses to chip (programming or erasing) fail upon the calculated offset (it's incorrectly doubled because of portwidth being 2). I had to manually force the portwidth to 1 (x8) after the flash_get_size() routine to make everything behave for any flash operations. I don't think the "detect" logic is correct in terms of port and chip width for "some" devices. However, the author - Brad Kemp - has said he's had success on numerous other flash width devices. Your problem sounds exactly like mine. For a hack fix, set info->portwidth = 1; for the last thing flash_get_size() does before returning the size. Tom -----Original Message----- From: Frank Smith [mailto:smith@amirix.com] Sent: Friday, May 09, 2003 1:00 PM To: u-boot-users(a)lists.sourceforge.net Subject: [U-Boot-Users] strataflash.c Hello, I have a board with a couple of Intel RC28F320J3A Strataflash devices. One device is wired to x16 mode, the other to x8 mode. I'm trying to use the strataflash.c driver with these flash chips. The driver detects the flash that's in x16 mode, but not the one in x8 mode. So I'm digging through the code to try to figure out what's up. I've been successful in avoiding dealing with flash programming code up until now in my life..... If anyone knows anything about whether strataflash.c was designed to work with x16 devices in x8 mode, I'd love to hear from you! From what I've seen so far, I'm tending to think that it doesn't. Thanks, Frank. ------------------------------------------------------- Enterprise Linux Forum Conference & Expo, June 4-6, 2003, Santa Clara The only event dedicated to issues related to Linux enterprise solutions www.enterpriselinuxforum.com _______________________________________________ U-Boot-Users mailing list U-Boot-Users(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

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[U-Boot-Users] newbie's error on build u-boot
by Zhao Hongda 11 May '03

11 May '03

I'm trying to build u-boot with arm-linux-gcc(gcc 3.2.1, binutils 2.13.90.16, glic 2.3.1), but got the following error: cpu/xscale/start.S:Assembler messages: cpu/xscale/start.S:145 Error: internal_relocation(type: OFFSET_IMM) not fixed up <somethig like above> what should I do to solve this? Hongda Zhao by the way: it can be builded right under arm-linux-gcc 2.95.3.

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[U-Boot-Users] linux doesn't boot when CS for initial cache disabled
by Thomas Schäfer 10 May '03

10 May '03

Hi all, I want to port u-boot to a custom board based on the walnut board where CS0-CS7 are in use by separate chips. I tried to program CS4, which is used for temporary stack and data before relocation, with the settings for a chip after the relocation has been done. u-boot seems to work fine with this setting, global data structure and board info structure are located in RAM and contain the correct values. Loading a kernel via tftp works without problems. As soon as I'm trying to boot the kernel, the system hangs after the kernel has been uncompressed. Trying to debug the kernel boot sequence, I found that the function reloc_offset seems to hang in an endless loop. My question is: why is that CS for the temporary stack of u-boot important for the start sequence of the linux kernel? The Readme says that this stack and data area is only used before relocation of u-boot. Any comments would be appreciated Best regards, Thomas Schäfer ____________________________________ GIGA STREAM - UMTS Technologies GmbH Konrad-Zuse-Str. 7 66115 Saarbrücken Tel.: + 49 (0)681 / 95916 - 203 Fax: + 49 (0)681 / 95916 - 100 E-mail: tschaefer(a)giga-stream.de

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[U-Boot-Users] Change file location
by Rune Torgersen 10 May '03

10 May '03

Hi I am in the process of celaning up a patch to get PCI support to work on a MPC8266ADS board from Motorla. (Patch written by Andy Lowe from MontaVista) There is currently a huge cludge, because the /cpu/mpc8260/pci.c is different for different boards based on the 826x cpu's. The better solution would be to move this file into the board specific directories. If not, I would have to do #ifdef around the whole file. Rune Torgersen Software Developer Innovative Systems 1000 Innovative Drive Mitchell, SD 57301 Phone: 605-995-6120 Fax: 605-995-0084 email: runet(a)innovsys.com www.innovsys.com

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Re: [U-Boot-Users] [u-boot 3.0 porting to mpc8260 board]
by Wolfgang Denk 10 May '03

10 May '03

In message <001301bf88dd$03fdd520$240110ac@jsbae> you wrote: > This is a multi-part message in MIME format. > > ------=_NextPart_000_0010_01BF8928.73BCE680 > Content-Type: text/plain; > charset="ks_c_5601-1987" > Content-Transfer-Encoding: base64 > > SGVsbG8gYWxsLA0KSSd2ZSBnb3QgYSBwcm9ibGVtIHdpdGggcG9ydGluZyB1LWJvb3QgMy4wIG9u > IGFuIGVtYmVkZGVkIHN5c3RlbShtcGM4MjUwKQ0KaSB3YW5uYSBpbml0aWFsaXplIHBjaSBidXQg > LCAgaSBjYW4ndCBmaW5kIHBjaV9pbml0X2JvYXJkKCkgLi4uLnRoaXMgZnVuY3Rpb24gY2FsbGVk > IGJ5IHBjaV9pbml0KCkuDQphbmQgd2hlbiBpIGNhbGwgcGNpX21wYzgyNTBfaW5pdCgpPz8gaW4g > Y3B1L21wYzgyNjAvcGNpLmMNCg0KVGhhbmsgeW91Li4uLi4NCioqKioqKioqKioqKioqKioqKioq > KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq > KioqKioqDQoguejA5b3EICjb0SDt/iDj1SkNCiAowdYpSU1DxdfFqSC/rLG4sLO537rOILCzud8y > xsANCiDA/MitOjA0Mi04MjItMzQ4NiANCiDG0b26OjA0Mi04MjItMzQ4MyANCiDI3rTrwPzIrTog > MDE5LTQzNC0yOTc1DQogDQogSmFuZy1TaWsgQmFlIA0KIFImRCBEZXZlbG9wbWVudCBUZWFtIDIN > CiBJTUMgVGVjaCBDby4sTHRkLiBLb3JlYQ0KIFRlbDorODItNDItODIyLTM0ODYgDQogRkFYOis4 > Mi00Mi04MjItMzQ4MyANCiBNb2JpbGU6KzgyLTE5LTQzNC0yOTc1DQogDQogRS1tYWlsICA6IGpz > YmFlQGltY3RlY2guY28ua3INCiBNU04gSUQgOiBGZWJfT3ZlcnNldEBob3RtYWlsLmNvbQ0KDQoq > KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq > KioqKioqKioqKioqKioqKioqKioqKioqKg0KDQo= Please do not post base64 encoded messages to the list. Post plain text only. > ------=_NextPart_000_0010_01BF8928.73BCE680 > Content-Type: text/html; > charset="ks_c_5601-1987" > Content-Transfer-Encoding: base64 > > PCFET0NUWVBFIEhUTUwgUFVCTElDICItLy9XM0MvL0RURCBIVE1MIDQuMCBUcmFuc2l0aW9uYWwv > L0VOIj4NCjxIVE1MPjxIRUFEPg0KPE1FVEEgaHR0cC1lcXVpdj1Db250ZW50LVR5cGUgY29udGVu > dD0idGV4dC9odG1sOyBjaGFyc2V0PWtzX2NfNTYwMS0xOTg3Ij4NCjxNRVRBIGNvbnRlbnQ9Ik1T ... Please do not post base64 encoded messages to the list. Please do not post HTML to the list. Post plain text only. Message unreadable, ignored. Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de GUIs are virtually useless. Learn tools. They're configurable, scriptable, automatable, cron-able, interoperable, etc. We don't need no brain-dead winslurping monolithic claptrap. -- Tom Christiansen in 371140df@csnews

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Re: [U-Boot-Users] CodeWarrior U-Boot debug
by Jerry Van Baren 10 May '03

10 May '03

Sorry, no direct help on CodeWarrior but... stuck in the FP exception would tend to indicate a memory, probably a SDRAM, problem. This is a classic problem: SDRAM appears to work, but is misconfigured and cache burst reading doesn't work properly. This causes a lot of 0xFFs in the instruction stream and these map into FP instructions, causing the FP exception. Reading and writing RAM using your CodeWarrior is NOT a good test of SDRAM. Most often you need to do a burst read for it to fail. Burst reads occur (at this point in the game) only when doing an instruction fetch with the instruction cache enabled. Try running with instruction cache turned off. If it runs slowly but steady :-), you are in the 99% probability it is a SDRAM initialization issue. gvb At 02:25 PM 5/1/2003 -0400, RL(a)prodrive.nl wrote: >Hello, > >Has anyone of you ever used MetroWerks CodeWarrior to debug U-Boot? > >After I've succesfuly compiled the u-boot ELF and binairy I've programmed my >flash with the binairy. > >Next, I've made a CodeWarrior project using the ELF file output of the GNU >Compiler. > >I can connect to the PPC and I can view memory, but when I break the running >process, the cpu is always stuck at address 0x800 (floating point >exception). > >Also I cannot view the code in CodeWarrior?? > >Can someone help me? > >Thx Roel > > > > >------------------------------------------------------- >This sf.net email is sponsored by:ThinkGeek >Welcome to geek heaven. >http://thinkgeek.com/sf >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users ********************************************************************** This e-mail and any files transmitted with it may be confidential and may be legally privileged or otherwise exempt from disclosure under applicable law. This e-mail and its files are intended solely for the individual or entity to whom they are addressed and their content is the property of Smiths Aerospace. If you are not the intended recipient, please do not read, copy, use or disclose this communication. If you have received this e-mail in error please notify the e-mail administrator at postmaster(a)smiths-aerospace.com and then delete this e-mail, its files and any copies. This footnote also confirms that this e-mail message has been scanned for the presence of known computer viruses. Smiths addresses are changing! The new addresses are of the form firstname.lastname(a)smiths-aerospace.com. Please update your address books! Please begin using the new form immediately. ***********************************************************************

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[U-Boot-Users] strataflash.c
by Frank Smith 09 May '03

09 May '03

Hello, I have a board with a couple of Intel RC28F320J3A Strataflash devices. One device is wired to x16 mode, the other to x8 mode. I'm trying to use the strataflash.c driver with these flash chips. The driver detects the flash that's in x16 mode, but not the one in x8 mode. So I'm digging through the code to try to figure out what's up. I've been successful in avoiding dealing with flash programming code up until now in my life..... If anyone knows anything about whether strataflash.c was designed to work with x16 devices in x8 mode, I'd love to hear from you! >From what I've seen so far, I'm tending to think that it doesn't. Thanks, Frank.

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