January 2003 - U-Boot

[U-Boot-Users] Re: Any MV-64360 u-boot work in progress ?
by Rahman, Masoodur 21 Jan '03

21 Jan '03

Hi Brad, U can count me in . What is the processor u would be using with MV64360 ?? I am presently working on the kernel support for MV64360 + 750 FX regards rahman

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RE: [U-Boot-Users] weird power-on reset problem
by Rod Boyce 20 Jan '03

20 Jan '03

All, I have seen this happen to me when I enabled the watchdog test without enabling the watchdog. Also check the POST test setup. Rod

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[U-Boot-Users] Any MV-64360 u-boot work in progress?
by Bradley A. Bosch 20 Jan '03

20 Jan '03

Greetings, I have just joined the list. I have been experimenting on the side with U-Boot on an 8241 Sandpoint board and have it working well. (I will send patches once I have cleaned things up a bit.) Now I have been assigned the task of porting U-Boot to two hardware platforms. One includes the Marvell Discovery II (MV64360). I took a look at the hardware documentation and it looks like there are a _whole_ lot of changes from the MV64260 chip. I understand that Marvell has decided not to do this work. The Discovery II (and U-Boot) should be popular enough that others will want it working. Is anyone working on, or even considering working on, support for the Discovery II? I have an evaluation board on it's way (and I already use a BDI-2000 for my other work), but I _really_ would rather not have to do this all myself. Thanks. And thanks to those of you who have obviously invested so much time in developing this code! U-Boot seems to be pretty easy to work with. --Brad Bosch Senior Software Developer, Interphase

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Re: [U-Boot-Users] weird power-on reset problem
by Jerry Van Baren 18 Jan '03

18 Jan '03

Read your 860 manual Chapter 12. Three times. The difference between a power on reset (PORESET*) and a pushbutton (hardware reset or software induced reset) involves reading the configuration off the data bus and starting the clocks (PLL). When power is applied, the processor reads the configuration, sets up the PLLs, and lets them stabilize. On a pushbutton reset, the processor does NOT read the configuration and the clocks keep running however they were configured when power was applied. I would be very suspicious that your PLLs are not stabilizing in time. This would most likely be due to an unstable input clock or possibly due to unstable or noisy power supply voltages. From the 860 maunual, Chapter 12: "When PORESET signal is negated, the MODCK values are sampled and internally latched. To ensure proper operation, the PORESET signal should be asserted for a minimum of 3 microseconds." Question: Does your hardware ensure this? "When a hard reset event occurs, the MPC860 determines its initial mode of operation by sampling the values present on the data bus (D[0Ð31])..." Question: Does your hardware ensure the data bus lines are driven properly until after the initial mode of operation is established? Note that the manual says the processor leaves the reset state after PORESET is released _AND_ the PLLs are stable. PLL instability could stretch your start up time, causing problems. Question: Is your RSTCONF* being driven properly? gvb At 02:50 PM 1/17/2003 -0500, bren(a)sjtu.edu.cn wrote: >We have a very very weird problem. >When we power-on our MPC860 board, u-boot will stuck >before running in RAM. But once we reset the board >with the "reset push button", everything will be fine >as long as we DO NOT power-off. > >Obviously, there are some differences between power-on >reset and internal hardware reset and those differences >are where we make some mistakes. > >Can anyone help us? > >Thanks. > >Laudney Ren > >-- >An expert is one who knows more and more about less and less >until he knows absolutely everything about nothing. > > > >------------------------------------------------------- >This SF.NET email is sponsored by: Thawte.com >Understand how to protect your customers personal information by implementing >SSL on your Apache Web Server. Click here to get our FREE Thawte Apache >Guide: http://ads.sourceforge.net/cgi-bin/redirect.pl?thaw0029en >_______________________________________________ >U-Boot-Users mailing list >U-Boot-Users(a)lists.sourceforge.net >https://lists.sourceforge.net/lists/listinfo/u-boot-users ********************************************************************** This e-mail and any files transmitted with it are confidential and may be legally privileged or otherwise exempt from disclosure under applicable law. This e-mail and its files are intended solely for the individual or entity to whom they are addressed and their content is the property of Smiths Aerospace. If you are not the intended recipient, please do not read, copy, use or disclose this communication. If you have received this e-mail in error please notify the e-mail administrator at postmaster(a)si.com and then delete this e-mail, its files and any copies. This footnote also confirms that this e-mail message has been scanned for the presence of known computer viruses. ***********************************************************************

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[U-Boot-Users] MCR question
by Laudney Ren 18 Jan '03

18 Jan '03

Hi, all: From MPC860 User Manual, MCR has a field named "OP". when its value is 10, the operation is "RUN". The description for "RUN" in the manual is: "... the AMX bits of the UPM RAM word in this software initiatede pattern must all be set to 0b11. Thus, the address for this pattern is the value written to MAR. The data bus is not driven." My question is, what does the "pattern" mean? What's its use? What is the "address for the pattern"? Is this address a RAM address and the pattern will be read from this location? What is MAR for? Thanks. Laudney Ren -- An expert is one who knows more and more about less and less until he knows absolutely everything about nothing.

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[U-Boot-Users] weird power-on reset problem
by Laudney Ren 17 Jan '03

17 Jan '03

We have a very very weird problem. When we power-on our MPC860 board, u-boot will stuck before running in RAM. But once we reset the board with the "reset push button", everything will be fine as long as we DO NOT power-off. Obviously, there are some differences between power-on reset and internal hardware reset and those differences are where we make some mistakes. Can anyone help us? Thanks. Laudney Ren -- An expert is one who knows more and more about less and less until he knows absolutely everything about nothing.

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[U-Boot-Users] kernel parameters for ARM
by Robert Schwebel 17 Jan '03

17 Jan '03

Hi, I currently have the problem that on my PXA250 based board the kernel command line parameters from the u-boot environment variable "bootargs" are not actually transferred to the kernel. When looking at the code in lib_arm/armlinux.c:do_bootm_linux() I'm wondering how the code is intended to work: the setup_commandline_tag() function puts some stuff in the 'params' structure, but I cannot see that this information is passed on to the kernel. The kernel call does only transfer the architecture number, and the only other thing which could do the job is cleanup_before_linux() (which doesn't do it). Robert -- Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry Braunschweiger Str. 79, 31134 Hildesheim, Germany Handelsregister: Amtsgericht Hildesheim, HRA 2686 Phone: +49-5121-28619-0 | Fax: +49-5121-28619-4

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[U-Boot-Users] CVS server down?
by Robert Schwebel 16 Jan '03

16 Jan '03

Hi, Since yesterday I cannot access the CVS server. Did anybody else have this problem? Or is it on my site? Robert -- Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry Braunschweiger Str. 79, 31134 Hildesheim, Germany Handelsregister: Amtsgericht Hildesheim, HRA 2686 Phone: +49-5121-28619-0 | Fax: +49-5121-28619-4

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[U-Boot-Users] Re: [PATCH]: tools/envcrc.c
by Wolfgang Denk 15 Jan '03

15 Jan '03

In message <3E255A2B.7070009(a)sjtu.edu.cn> you wrote: > > In u-boot-0.2.0, the file "tools/envcrc.c" failed to consider > the difference between "normal env" and "redundand env". It > is a very obvious error. > > The patch is in the attachment. Please DO NOT DO THIS AGAIN!!! First, you've sent this patch before. So on first glance this message seems redundant. But on second look your patch contains completely different things: > --- /download/project/u-boot-0.2.0/MAKEALL Tue Nov 5 23:32:56 2002 > +++ embedded/code/u-boot-0.2.0/MAKEALL Tue Jan 14 22:20:41 2003 ... > --- /download/project/u-boot-0.2.0/Makefile Sun Dec 8 06:32:52 2002 > +++ embedded/code/u-boot-0.2.0/Makefile Tue Jan 14 22:22:35 2003 ... > --- /download/project/u-boot-0.2.0/README Wed Dec 18 01:53:43 2002 > +++ embedded/code/u-boot-0.2.0/README Tue Jan 14 22:06:11 2003 > @@ -203,6 +203,8 @@ > - board/pm826 Files specific to PM826 boards > - board/ppmc8260 > Files specific to PPMC8260 boards > +- board/procard > + Files specific to Motorola Processor Card Ummm.. please be a _little_ bit more precise. I guess there is more than one "Motorola Processor Card" (a better directory name might be handy, too). ... > --- /download/project/u-boot-0.2.0/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt Wed Oct 2 23:35:20 2002 > +++ embedded/code/u-boot-0.2.0/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt Thu Jan 1 08:00:00 1970 > @@ -1 +0,0 @@ > -This file is just to ensure that the directory is created. Why the hell do you do this? > --- /download/project/u-boot-0.2.0/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt Wed Oct 2 23:35:20 2002 > +++ embedded/code/u-boot-0.2.0/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt Thu Jan 1 08:00:00 1970 ... etc. REJECTED!!!! Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd(a)denx.de You humans have that emotional need to express gratitude. "You're welcome," I believe, is the correct response. -- Spock, "Bread and Circuses", stardate 4041.2

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[U-Boot-Users] cannot mount NFS root fs
by Laudney Ren 15 Jan '03

15 Jan '03

Hi, all: I used tftp to download kernel into SDRAM at 0x180000, and then went to boot the kernel. But error occurred when trying to mount root fs via NFS. The whole message is in the attachment. -- An expert is one who knows more and more about less and less until he knows absolutely everything about nothing. U-Boot 0.2.0 (Jan 15 2003 - 19:40:31) CPU: XPC860SRZPnnC1 at 50 MHz: 4 kB I-Cache 4 kB D-Cache MPC860 Processor Card SDRAM: 32 MB Top of RAM usable for U-Boot at: 02000000 Reserving 272k for U-Boot at: 01fbc000 Reserving 384k for malloc() at: 01f5c000 Reserving 60 Bytes for Board Info at: 01f5bfc4 Reserving 44 Bytes for Global Data at: 01f5bf98 Stack Pointer at: 01f5bf78 New Stack Pointer is: 01f5bf78 Now running in RAM - U-Boot at: 01fbc000 FLASH: 2 MB In: serial Out: serial Err: serial U-Boot relocated to 01fbc000 Net: SCC ETHERNET =>printenv bootargs=root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off bootcmd=bootp 0x00180000 baudrate=19200 loads_echo=1 ethaddr=52:54:ab:54:82:5e rootpath="/opt/ppc_8xx" bootfile="/tftpboot/pImage" stdin=serial stdout=serial stderr=serial Environment size: 296/1020 bytes =>bootcmd Trying SCC ETHERNET BOOTP broadcast 1 got BOOTP packet (src=67, dst=68, len=300 want_len=300) Filtering pkt = 0 Bootfile: /tftpboot/pImage Got good BOOTP ARP broadcast 1 Got good ARP - start TFTP TFTP from server 192.168.0.113; our IP address is 192.168.0.253 Filename '/tftpboot/pImage'. Load address: 0x180000 Loading: ################################################################# ########################### done Bytes transferred = 466491 (71e3b hex) =>printenv bootargs=root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off bootcmd=bootp 0x00180000 baudrate=19200 loads_echo=1 ethaddr=52:54:ab:54:82:5e stdin=serial stdout=serial stderr=serial bootfile=/tftpboot/pImage filesize=71e3b gatewayip=192.168.0.254 netmask=255.255.255.0 hostname=procard rootpath=/opt/ppc_8xx ipaddr=192.168.0.253 serverip=192.168.0.113 Environment size: 414/1020 bytes => =>bootm 0x180000 ## Booting image at 00180000 ... Image Name: Linux Kernel Image Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 466427 Bytes = 455.5 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Current stack ends at 0x01F5BC20 => set upper limit to 0x00800000 ## cmdline at 0x007FFF00 ... 0x007FFF72 bd address = 0x01F5BFC4 memstart = 0x00000000 memsize = 0x02000000 flashstart = 0xFFE00000 flashsize = 0x00200000 flashoffset = 0x00044000 sramstart = 0x00000000 sramsize = 0x00000000 immr_base = 0xFF000000 bootflags = 0x00000001 intfreq = 50 MHz busfreq = 50 MHz ethaddr = 52:54:AB:54:82:5E IP addr = 192.168.0.253 baudrate = 19200 bps No initrd ## Transferring control to Linux (at address 00000000) ... Linux version 2.4.18 (root@hi-jack) (gcc version 2.95.3 20010315 (release)) #1 Wed Jan 15 17:35:12 CST 2003 On node 0 totalpages: 8192 zone(0): 8192 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off Decrementer Frequency = 187500000/60 Warning: real time clock seems stuck! Calibrating delay loop... 49.86 BogoMIPS Memory: 30976k available (896k kernel code, 288k data, 52k init, 0k highmem) Dentry-cache hash table entries: 4096 (order: 3, 32768 bytes) Inode-cache hash table entries: 2048 (order: 2, 16384 bytes) Mount-cache hash table entries: 512 (order: 0, 4096 bytes) Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 8192 (order: 3, 32768 bytes) POSIX conformance testing by UNIFIX Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd CPM UART driver version 0.03 ttyS00 at 0x0280 is a SMC block: 64 slots per queue, batch=16 RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize eth0: CPM ENET Version 0.2 on SCC1, 52:54:ab:54:82:5e loop: loaded (max 8 devices) NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 2048 bind 2048) IP-Config: Unable to set interface netmask (-22). NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. Looking up port of RPC 100003/2 on 157.0.0.0 RPC: sendmsg returned error 101 portmap: RPC call returned error 101 Root-NFS: Unable to get nfsd port number from server, using default Looking up port of RPC 100005/1 on 157.0.0.0 RPC: sendmsg returned error 101 portmap: RPC call returned error 101 Root-NFS: Unable to get mountd port number from server, using default RPC: sendmsg returned error 101 mount: RPC call returned error 101 Root-NFS: Server returned error -101 while mounting /tftpboot/$(serverip):$(root path) VFS: Unable to mount root fs via NFS, trying floppy. VFS: Cannot open root device "nfs" or 02:00 Please append a correct "root=" boot option Kernel panic: VFS: Unable to mount root fs on 02:00 <0>Rebooting in 180 seconds..

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[U-Boot-Users] immediate error when jumping to in_ram
by Laudney Ren 15 Jan '03

15 Jan '03

Hi all: We're adding a new board support to u-boot-0.2.0. At start, some relevant informaton has been printed out. But as soon as we jump to in_ram to execute the second half of init, an error/exception ocurred. By looking at ICR, it seems to be a ITLB error. But we don't know what shall be done with it. Thanks in advance. BR, Laudney Ren -- An expert is one who knows more and more about less and less until he knows absolutely everything about nothing.

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[U-Boot-Users] I2C RTC for MPC8xx???
by Steven Scholz 14 Jan '03

14 Jan '03

Hi there, from looking at the sources it seems that a couple of Dalles RTCs are supported by U-Boot. Taking these as an example it wouldn't be too hard ta add a driver for a new, let's say DS1307 via I2C, would it? But how about Linux? How are these many RTCs supported by linux? Thanks a million, Steven

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[U-Boot-Users] PATCH: Add strtoul in syscall table
by Pierre AUBERT 14 Jan '03

14 Jan '03

Hi everybody, The following patch adds the strtoul entry in the syscall table. This function is very usefull for analyzing the command line arguments in standalone applications. CHANGELOG: * Patch by Pierre Aubert , 09 Dec 2002 Add strtoul in syscall table.

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[U-Boot-Users] Re: U-Boot Boot Sequence
by Martin Winistörfer 13 Jan '03

13 Jan '03

Hi, > > Since most MPC8xx and MPCxx both start executing at adress 0x100 there > > This is not necessarily true. It may be 0xFFF00100 as well, depending > on the HRCW... > This is true but lets assume we start from 0x100. > > What I dont understand is, that the label _start (In cpu/mpc8xx/start.S) > > will be placed to the runtime > > adress 0x100, but resides in the .text section which according to the > linker > > file > > (take as example board/cogent/u-boot.lds) wont probably start at > adresse > > 0x100 > > in the image. The .text section is located after the .interp section. > > See the README. I've already looked. Here is a part: > System Initialization: > ---------------------- > In the reset configuration, U-Boot starts at the reset entry point > (on most PowerPC systens at address 0x00000100). Because of the reset > configuration for CS0# this is a mirror of the onboard Flash memory. > To be able to re-map memory U-Boot then jumps to it's link address. What means link adress exactly? Run-Time adresses to RAM? On MPC5xx processors CS0 belongs to the external flash memory. You either set RCW to boot from external (CS0 asserted) or internal (onboard) flash. But anyway whether to boot from, at adress 0x100 must be the the _start label located. How (or where) do you set the _start label to this adress in U-Boot image? The other question was why to jump to the in_flash label? Following some subparts from the mailinglist thread "why jump at absolute address in start.S": > CFG_MONITOR_BASE is the physical address where you want the boot device to > reside. It will be used to program the memory controller registers which > select the boot device (OR0/BR0). As soon as the mask in OR0 is programmed > correctly, the boot device will disappear from the entire address space, and > be accessible only at the base address programmed in BR0. >This code jumps to the address that the boot device will appear at after you >program the memory controller registers, so that the boot device will not >disappear out from underneath you. When I look what happens before the jump to the in_flash label, I see, that there no BRx or ORx have been set. Actually we still running, still the flash is mirrored over the whole adress space. Anyway, what important is, are the following statments true: 1) We, for instance, burn U-Boot image to external flash 2) and start at adress 0x100. 3) Because code is relocatable, you can start executing where you like, for instance on adress X, depending on your processor. 4) You simply must ensure _start is at your entry point -> How is this done on the MPC8xx, since _start will be in .text and .text following .interp in the flash image? 5) Since we procced executing from _start in flash, -> why to jump to in_flash as already been mentioned? > Because the code is relocatable you can jump to any address you like - as > long as the offset within the boot device is correct. "_start" is the address > where the CPU will "start" execution - i.e. the hard reset vector. "in_flash" > is where we want to continue execution after the jump (its the next instruction > after the "blr" above - THEREFORE THIS REALLY ISN'T A JUMP BECAUSE YOU SIMPLY > EXECUTE THE NEXT INSTRUCTION). EXC_OFF_SYS_RESET is added because we need the > address to be relative to the start of the boot device, not the hard reset > vector. Best regards, Martin -- +++ GMX - Mail, Messaging & more http://www.gmx.net +++ NEU: Mit GMX ins Internet. Rund um die Uhr für 1 ct/ Min. surfen!

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[U-Boot-Users] U-Boot Boot Sequence
by Martin Winistörfer 12 Jan '03

12 Jan '03

Hello all, Im currently looking closely to the boot sequence for the MPC8xx but cant exactly figure it out how it works. Every hint is appreciated. Since most MPC8xx and MPCxx both start executing at adress 0x100 there must reside some code at this location at boot time. I assume the U-Boot image will be burned to the external flash (CS0) and we start from there (0x100). What I dont understand is, that the label _start (In cpu/mpc8xx/start.S) will be placed to the runtime adress 0x100, but resides in the .text section which according to the linker file (take as example board/cogent/u-boot.lds) wont probably start at adresse 0x100 in the image. The .text section is located after the .interp section. Are this assumptions true? I have another question concerns the adress calculation to in_flash label (Some guys already mentioned something about this on this list). The U-Boot image is located in flash (CS0) we start executing at adress 0x100 in flash somehow. MPC is now executing instruction by instruction until the following lines: > /* > * Calculate absolute address in FLASH and jump there > */ > > lis r3, CFG_MONITOR_BASE@h > ori r3, r3, CFG_MONITOR_BASE@l > addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET > mtlr r3 > blr My question is why to calculate the branch to in_flash and why adding the CFG_MONITOR_BASE? (dont be angry I know the same question has alredy been asked but....) Since _start label is placed to location 0x100 > . = EXC_OFF_SYS_RESET > .globl _start > _start: and location counter will increase until to the in_flash label (and further of course), the in_flash label will be always in a specific offset from the label _start. Why we cant simply leave it (the branch calculation) and simply executing the next instruction? (first instrution in in_flash) I really dont know whether I simply make a huge mess but please help me to clarify it. Best regards, Martin -- +++ GMX - Mail, Messaging & more http://www.gmx.net +++ NEU: Mit GMX ins Internet. Rund um die Uhr für 1 ct/ Min. surfen!

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[U-Boot-Users] PPCBoot vxworks question
by Timothy Canham 10 Jan '03

10 Jan '03

I am new to the list and new to PPCBoot/UBoot, so apologies in advance if this is old territory. I am trying to load a vxworks kernel located on an external server, using the typical vxworks boot loader. i.e., the vxworks boot loader loads a kernel from a remote server using rsh and jumps to it. From what I can see, PPCBoot has the bootvx command, but it appears to require that the vxworks kernel already be loaded to work. Can someone post the equivalent procedure to duplicate in PPCBoot what the vxworks boot loader does? -- ------- Timothy K. Canham Isaiah 26:3 tim(a)timcanham.com http://www.timcanham.com

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[U-Boot-Users] Configuring linux kernel for custom board
by My-Hong Vuong 08 Jan '03

08 Jan '03

Hi, I'm not to sure if this question is long overdue, but is there a guide somewhere to help me with customising linux for my custom board? At the moment, I have based my MPC860T around the fads860t configuration, making changes where I *think* are appropriate (i.e. getting rid of the BCSR references). I am concerned with the files I have added to the kernel are not "right" and want to verify the process of porting linux to a custom board. Thanks in advance, My Hong Vuong

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[U-Boot-Users] Linux - problems with the RTC?
by My-Hong Vuong 07 Jan '03

07 Jan '03

Hi, Hope you all had a great Xmas and New Years! :) I managed to get linux to visibly start executing through smc1 - it turns out that I had chosen the standard generic serial support option, when it was in fact, non-standard... oops! A new year, new problem... i'm afraid :( Here's a short listing of what I see at bootup : ----------------------------------------------------- ## Booting image at 01000000 ... Image Name: Linux-2.4.19-pre7 Created: 2003-01-07 1:50:16 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 595622 Bytes = 581.7 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Linux version 2.4.19-pre7 (myhong@nemo) (gcc version 3.0.4) #46 Tue Jan 7 12:49:52 EST 2003 On node 0 totalpages: 8192 zone(0): 8192 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: root=/dev/hda1 Decrementer Frequency = 78750000/60 ----- NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. /dev/ide/host0/bus0/target0/lun0: p1 /dev/ide/host0/bus0/target0/lun0: p1 VFS: Mounted root (ext2 filesystem) readonly. Mounted devfs on /dev Freeing unused kernel memory: 52k init init started: BusyBox v0.60.3 (2002.07.16-02:05+0000) multi-call binaryStarted device management daemon for /dev /dev/ide/host0/bus0/target0/lun0: p1 VFS: busy inodes on changed media.. /dev/ide/host0/bus0/target0/lun0: p1 SIOCSIFNETMASK: Cannot assign requested address eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX. eth0: status: link up, 10 Mbps Half Duplex, auto-negotiation complete. ----------------------------------------------------- At this point, linux hangs. Now, I'm not too familiar with what is supposed to happen next - but according to the output that i had on the fads860 board (i'm currenlty working on a custom design, mpc860T board), I am supposed to get something like: ----------------------------------------------------- Tue Jan 7 11:23:43 2003 VFS: busy inodes on changed media. mount: Mounting /dev/ide/host0/bus0/target0/lun0/part1 on /mnt/idedisk failed: No such file or directory Caught SIGHUP Please press Enter to activate this console. /dev/ide/host0/bus0/target0/lun0: p1 VFS: busy inodes on changed media.. /dev/ide/host0/bus0/target0/lun0: p1 BusyBox v0.60.3 (2002.07.16-02:05+0000) Built-in shell (ash) Enter 'help' for a list of built-in commands. root:/# ----------------------------------------------------- I can ping and telnet my target (sometimes) and i can get something like the above - however, i have to login and exit telnet to type anything at the prompt. Now, each time I do a "date" , I get the exact same response - i.e., my RTC seems to have halted. I don't get it... I can do "date" in PPCBoot and my seconds change. I put in some register dumps and I get: TBSCR: 0x00000103 RTCSC: 0x00000013 RTC: 0x5fffc058 PISCR: 0x00000004 SCCR: 0x03800000 how do i get my clock to tick?? Thanks in advance, My Hong Vuong

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[U-Boot-Users] USB OHCI support
by Laurent Mohin 06 Jan '03

06 Jan '03

Hello all, Are there some plan to support an OHCI USB host controller like the SMSC SLC90E66 in U-Boot? I plan to use either the Intel 82371 with an UHCI controller (for which I have support on U-Boot) or the Smsc chip on my own custom board. Laurent Mohin Acterna

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[U-Boot-Users] another question of relocate_code
by YanMin Qiao 04 Jan '03

04 Jan '03

Hi all: <u-boot>/cpu/mpc8xx/start.S .... relocate_code: mr r1, r3 /* Set new stack pointer */ mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ .... sub r15, r10, r4 /* First our own GOT */ add r14, r14, r15 /* the the one used by the C code */ add r30, r30, r15 ^^^ .... I have followed the code to the end of board_init_r(). I didn't figured out where r30 is used as mentioned. Thanks Best regards

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[U-Boot-Users] relocate_code
by YanMin Qiao 04 Jan '03

04 Jan '03

<u-boot>/cpu/mpc8xx/start.S .... .... .globl relocate_code relocate_code: mr r1, r3 /* Set new stack pointer */ mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ .... cmplw cr1,r3,r4 addi r0,r5,3 srwi. r0,r0,2 beq cr1,4f /* In place copy is not necessary */ beq 7f /* Protect against 0 count */ mtctr r0 bge cr1,2f ^^^^^^^^^^ why we need to differeciate the two situation, addr>CFG_MONITOR_BASE and addr<=CFG_MONITOR_BASE la r8,-4(r4) la r7,-4(r3) 1: lwzu r0,4(r8) stwu r0,4(r7) bdnz 1b b 4f 2: slwi r0,r0,2 <<----------------- i think above code will be enough for the two add r8,r4,r0 situation add r7,r3,r0 3: lwzu r0,-4(r8) stwu r0,-4(r7) bdnz 3b .... .... thnx best regards

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[U-Boot-Users] CFG_REMAP, CFG_PRELIM
by Laudney Ren 04 Jan '03

04 Jan '03

Hi, all: I'm modifying FADS860T.h to suite my custom board. I don't understand the following lines: -------------------------------------------------------------------------- #define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */ #define CFG_PRELIM_OR_AM 0xFF800000 /* OR addr mask */ /* FLASH timing: ACS = 10, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 0 */ #define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX) #define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) #ifdef USE_REAL_FLASH_VALUES /* * These values fit our FADS860T ... * The "default" behaviour with 1Mbyte initial doesn't work for us! */ #define CFG_OR0_PRELIM 0x0FFC00D34 /* Real values for the board */ #define CFG_BR0_PRELIM 0x02800001 /* Real values for the board */ #else #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) /* 8 Mbyte until detected */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BR_BA_MSK) | BR_V ) #endif /* BCSRx - Board Control and Status Registers */ #define CFG_OR1_REMAP CFG_OR0_REMAP #define CFG_OR1_PRELIM 0xffff8110 /* 64Kbyte address space */ #define CFG_BR1_PRELIM ((BCSR_ADDR) | BR_V ) --------------------------------------------------------------------------- what do those CFG_REMAP, CFG_PRELIM mean? What are their use? We have a 2M flash ROM in one single bank. We have 32M SDRAM. Nornally, we use CS0 for flash, CS5 for SDRAM. We map flash at oxffe00000 to 0xffffffff, and SDRAM at 0x00000000 to 0x01ffffff How should I set those CFGs accordingly? GREAT THANKS in advance. Laudney Ren

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[U-Boot-Users] a question about relocate_code in start.S
by YanMin Qiao 03 Jan '03

03 Jan '03

im reading the code of u-boot in <u-boot>/cpu/mpcxx/start.S under >relocate_code< symbol i can't figure the difference between _branch 1_ & _branch 2_ why cmp _the start addr of the future code in the mem_ and _the start of the flash_ ?? thnx best regards

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[U-Boot-Users] why jump at absolute address in start.S
by Laudney Ren 03 Jan '03

03 Jan '03

I'm reading cpu/mpc8xx/start.S and found the following: /* * Calculate absolute address in FLASH and jump there */ lis r3, CFG_MONITOR_BASE@h ori r3, r3, CFG_MONITOR_BASE@l addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET mtlr r3 blr Why do we need to calculate the absolutely address? Why should we do it here, instead of everywhere? Thanks. Laudney

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Re: [U-Boot-Users] why jump at absolute address in start.S
by Jerry Van Baren 03 Jan '03

03 Jan '03

At 09:19 PM 1/3/2003 -0500, bren(a)sjtu.edu.cn wrote: >Murray Jensen wrote: > > On Fri, 03 Jan 2003 11:47:22 +0800, Laudney Ren <bren(a)sjtu.edu.cn> >writes: > > > >>I'm reading cpu/mpc8xx/start.S and found the following: > >> > >> /* > >> * Calculate absolute address in FLASH and jump there > >> */ > >> > >> lis r3, CFG_MONITOR_BASE@h > >> ori r3, r3, CFG_MONITOR_BASE@l > >> addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET > >> mtlr r3 > >> blr > >> > >>Why do we need to calculate the absolutely address? > >>Why should we do it here, instead of everywhere? > > Another part of the puzzle for doing an absolute address jump is because the PowerPC relative jump is limited 24 bits (+/- 8Mbytes). If you are jumping to a location beyond the 24 bit jump range, for instance if your vector is at 0x100 but your ultimate u-boot code will be based at 0x80000000 (to pick an arbitrary example to illustrate the problem), a relative jump won't get you there. Since u-boot doesn't know a priori where the addresses will be on a given piece of hardware, this is the safe and effective method of getting to the right place on every system. Once you get to your final destination, relative addresses are fine since Wolfgang will never let u-boot code exceed 8Mbytes :-). gvb ********************************************************************** This e-mail and any files transmitted with it are confidential and may be legally privileged or otherwise exempt from disclosure under applicable law. This e-mail and its files are intended solely for the individual or entity to whom they are addressed and their content is the property of Smiths Aerospace. If you are not the intended recipient, please do not read, copy, use or disclose this communication. If you have received this e-mail in error please notify the e-mail administrator at postmaster(a)si.com and then delete this e-mail, its files and any copies. This footnote also confirms that this e-mail message has been scanned for the presence of known computer viruses. ***********************************************************************

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